2 * RTC class driver for "CMOS RTC": PCs, ACPI, etc
4 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
5 * Copyright (C) 2006 David Brownell (convert to new framework)
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
14 * The original "cmos clock" chip was an MC146818 chip, now obsolete.
15 * That defined the register interface now provided by all PCs, some
16 * non-PC systems, and incorporated into ACPI. Modern PC chipsets
17 * integrate an MC146818 clone in their southbridge, and boards use
18 * that instead of discrete clones like the DS12887 or M48T86. There
19 * are also clones that connect using the LPC bus.
21 * That register API is also used directly by various other drivers
22 * (notably for integrated NVRAM), infrastructure (x86 has code to
23 * bypass the RTC framework, directly reading the RTC during boot
24 * and updating minutes/seconds for systems using NTP synch) and
25 * utilities (like userspace 'hwclock', if no /dev node exists).
27 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
28 * interrupts disabled, holding the global rtc_lock, to exclude those
29 * other drivers and utilities on correctly configured systems.
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/interrupt.h>
35 #include <linux/spinlock.h>
36 #include <linux/platform_device.h>
37 #include <linux/mod_devicetable.h>
39 /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
40 #include <asm-generic/rtc.h>
43 struct rtc_device *rtc;
46 struct resource *iomem;
48 void (*wake_on)(struct device *);
49 void (*wake_off)(struct device *);
54 /* newer hardware extends the original register set */
60 /* both platform and pnp busses use negative numbers for invalid irqs */
61 #define is_valid_irq(n) ((n) >= 0)
63 static const char driver_name[] = "rtc_cmos";
65 /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
66 * always mask it against the irq enable bits in RTC_CONTROL. Bit values
67 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
69 #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
71 static inline int is_intr(u8 rtc_intr)
73 if (!(rtc_intr & RTC_IRQF))
75 return rtc_intr & RTC_IRQMASK;
78 /*----------------------------------------------------------------*/
80 /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
81 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
82 * used in a broken "legacy replacement" mode. The breakage includes
83 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
86 * When that broken mode is in use, platform glue provides a partial
87 * emulation of hardware RTC IRQ facilities using HPET #1. We don't
88 * want to use HPET for anything except those IRQs though...
90 #ifdef CONFIG_HPET_EMULATE_RTC
94 static inline int is_hpet_enabled(void)
99 static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
104 static inline int hpet_set_rtc_irq_bit(unsigned long mask)
110 hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
115 static inline int hpet_set_periodic_freq(unsigned long freq)
120 static inline int hpet_rtc_dropped_irq(void)
125 static inline int hpet_rtc_timer_init(void)
130 extern irq_handler_t hpet_rtc_interrupt;
132 static inline int hpet_register_irq_handler(irq_handler_t handler)
137 static inline int hpet_unregister_irq_handler(irq_handler_t handler)
144 /*----------------------------------------------------------------*/
146 static int cmos_read_time(struct device *dev, struct rtc_time *t)
148 /* REVISIT: if the clock has a "century" register, use
149 * that instead of the heuristic in get_rtc_time().
150 * That'll make Y3K compatility (year > 2070) easy!
156 static int cmos_set_time(struct device *dev, struct rtc_time *t)
158 /* REVISIT: set the "century" register if available
160 * NOTE: this ignores the issue whereby updating the seconds
161 * takes effect exactly 500ms after we write the register.
162 * (Also queueing and other delays before we get this far.)
164 return set_rtc_time(t);
167 static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
169 struct cmos_rtc *cmos = dev_get_drvdata(dev);
170 unsigned char rtc_control;
172 if (!is_valid_irq(cmos->irq))
175 /* Basic alarms only support hour, minute, and seconds fields.
176 * Some also support day and month, for alarms up to a year in
179 t->time.tm_mday = -1;
182 spin_lock_irq(&rtc_lock);
183 t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
184 t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
185 t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
187 if (cmos->day_alrm) {
188 /* ignore upper bits on readback per ACPI spec */
189 t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
190 if (!t->time.tm_mday)
191 t->time.tm_mday = -1;
193 if (cmos->mon_alrm) {
194 t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
200 rtc_control = CMOS_READ(RTC_CONTROL);
201 spin_unlock_irq(&rtc_lock);
203 /* REVISIT this assumes PC style usage: always BCD */
205 if (((unsigned)t->time.tm_sec) < 0x60)
206 t->time.tm_sec = BCD2BIN(t->time.tm_sec);
209 if (((unsigned)t->time.tm_min) < 0x60)
210 t->time.tm_min = BCD2BIN(t->time.tm_min);
213 if (((unsigned)t->time.tm_hour) < 0x24)
214 t->time.tm_hour = BCD2BIN(t->time.tm_hour);
216 t->time.tm_hour = -1;
218 if (cmos->day_alrm) {
219 if (((unsigned)t->time.tm_mday) <= 0x31)
220 t->time.tm_mday = BCD2BIN(t->time.tm_mday);
222 t->time.tm_mday = -1;
223 if (cmos->mon_alrm) {
224 if (((unsigned)t->time.tm_mon) <= 0x12)
225 t->time.tm_mon = BCD2BIN(t->time.tm_mon) - 1;
230 t->time.tm_year = -1;
232 t->enabled = !!(rtc_control & RTC_AIE);
238 static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
240 struct cmos_rtc *cmos = dev_get_drvdata(dev);
241 unsigned char mon, mday, hrs, min, sec;
242 unsigned char rtc_control, rtc_intr;
244 if (!is_valid_irq(cmos->irq))
247 /* REVISIT this assumes PC style usage: always BCD */
249 /* Writing 0xff means "don't care" or "match all". */
251 mon = t->time.tm_mon + 1;
252 mon = (mon <= 12) ? BIN2BCD(mon) : 0xff;
254 mday = t->time.tm_mday;
255 mday = (mday >= 1 && mday <= 31) ? BIN2BCD(mday) : 0xff;
257 hrs = t->time.tm_hour;
258 hrs = (hrs < 24) ? BIN2BCD(hrs) : 0xff;
260 min = t->time.tm_min;
261 min = (min < 60) ? BIN2BCD(min) : 0xff;
263 sec = t->time.tm_sec;
264 sec = (sec < 60) ? BIN2BCD(sec) : 0xff;
266 spin_lock_irq(&rtc_lock);
268 /* next rtc irq must not be from previous alarm setting */
269 rtc_control = CMOS_READ(RTC_CONTROL);
270 rtc_control &= ~RTC_AIE;
271 CMOS_WRITE(rtc_control, RTC_CONTROL);
272 hpet_mask_rtc_irq_bit(RTC_AIE);
274 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
275 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
276 if (is_intr(rtc_intr))
277 rtc_update_irq(cmos->rtc, 1, rtc_intr);
280 CMOS_WRITE(hrs, RTC_HOURS_ALARM);
281 CMOS_WRITE(min, RTC_MINUTES_ALARM);
282 CMOS_WRITE(sec, RTC_SECONDS_ALARM);
284 /* the system may support an "enhanced" alarm */
285 if (cmos->day_alrm) {
286 CMOS_WRITE(mday, cmos->day_alrm);
288 CMOS_WRITE(mon, cmos->mon_alrm);
291 /* FIXME the HPET alarm glue currently ignores day_alrm
294 hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec);
297 rtc_control |= RTC_AIE;
298 CMOS_WRITE(rtc_control, RTC_CONTROL);
299 hpet_set_rtc_irq_bit(RTC_AIE);
301 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
302 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
303 if (is_intr(rtc_intr))
304 rtc_update_irq(cmos->rtc, 1, rtc_intr);
307 spin_unlock_irq(&rtc_lock);
312 static int cmos_irq_set_freq(struct device *dev, int freq)
314 struct cmos_rtc *cmos = dev_get_drvdata(dev);
318 if (!is_valid_irq(cmos->irq))
321 /* 0 = no irqs; 1 = 2^15 Hz ... 15 = 2^0 Hz */
327 spin_lock_irqsave(&rtc_lock, flags);
328 hpet_set_periodic_freq(freq);
329 CMOS_WRITE(RTC_REF_CLCK_32KHZ | f, RTC_FREQ_SELECT);
330 spin_unlock_irqrestore(&rtc_lock, flags);
335 static int cmos_irq_set_state(struct device *dev, int enabled)
337 struct cmos_rtc *cmos = dev_get_drvdata(dev);
338 unsigned char rtc_control, rtc_intr;
341 if (!is_valid_irq(cmos->irq))
344 spin_lock_irqsave(&rtc_lock, flags);
345 rtc_control = CMOS_READ(RTC_CONTROL);
348 rtc_control |= RTC_PIE;
349 hpet_set_rtc_irq_bit(RTC_PIE);
351 rtc_control &= ~RTC_PIE;
352 hpet_mask_rtc_irq_bit(RTC_PIE);
354 CMOS_WRITE(rtc_control, RTC_CONTROL);
356 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
357 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
358 if (is_intr(rtc_intr))
359 rtc_update_irq(cmos->rtc, 1, rtc_intr);
361 spin_unlock_irqrestore(&rtc_lock, flags);
365 #if defined(CONFIG_RTC_INTF_DEV) || defined(CONFIG_RTC_INTF_DEV_MODULE)
368 cmos_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
370 struct cmos_rtc *cmos = dev_get_drvdata(dev);
371 unsigned char rtc_control, rtc_intr;
379 if (!is_valid_irq(cmos->irq))
382 /* PIE ON/OFF is handled by cmos_irq_set_state() */
387 spin_lock_irqsave(&rtc_lock, flags);
388 rtc_control = CMOS_READ(RTC_CONTROL);
390 case RTC_AIE_OFF: /* alarm off */
391 rtc_control &= ~RTC_AIE;
392 hpet_mask_rtc_irq_bit(RTC_AIE);
394 case RTC_AIE_ON: /* alarm on */
395 rtc_control |= RTC_AIE;
396 hpet_set_rtc_irq_bit(RTC_AIE);
398 case RTC_UIE_OFF: /* update off */
399 rtc_control &= ~RTC_UIE;
400 hpet_mask_rtc_irq_bit(RTC_UIE);
402 case RTC_UIE_ON: /* update on */
403 rtc_control |= RTC_UIE;
404 hpet_set_rtc_irq_bit(RTC_UIE);
407 CMOS_WRITE(rtc_control, RTC_CONTROL);
409 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
410 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
411 if (is_intr(rtc_intr))
412 rtc_update_irq(cmos->rtc, 1, rtc_intr);
414 spin_unlock_irqrestore(&rtc_lock, flags);
419 #define cmos_rtc_ioctl NULL
422 #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
424 static int cmos_procfs(struct device *dev, struct seq_file *seq)
426 struct cmos_rtc *cmos = dev_get_drvdata(dev);
427 unsigned char rtc_control, valid;
429 spin_lock_irq(&rtc_lock);
430 rtc_control = CMOS_READ(RTC_CONTROL);
431 valid = CMOS_READ(RTC_VALID);
432 spin_unlock_irq(&rtc_lock);
434 /* NOTE: at least ICH6 reports battery status using a different
435 * (non-RTC) bit; and SQWE is ignored on many current systems.
437 return seq_printf(seq,
438 "periodic_IRQ\t: %s\n"
440 "HPET_emulated\t: %s\n"
441 // "square_wave\t: %s\n"
444 "periodic_freq\t: %d\n"
445 "batt_status\t: %s\n",
446 (rtc_control & RTC_PIE) ? "yes" : "no",
447 (rtc_control & RTC_UIE) ? "yes" : "no",
448 is_hpet_enabled() ? "yes" : "no",
449 // (rtc_control & RTC_SQWE) ? "yes" : "no",
450 // (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
451 (rtc_control & RTC_DST_EN) ? "yes" : "no",
453 (valid & RTC_VRT) ? "okay" : "dead");
457 #define cmos_procfs NULL
460 static const struct rtc_class_ops cmos_rtc_ops = {
461 .ioctl = cmos_rtc_ioctl,
462 .read_time = cmos_read_time,
463 .set_time = cmos_set_time,
464 .read_alarm = cmos_read_alarm,
465 .set_alarm = cmos_set_alarm,
467 .irq_set_freq = cmos_irq_set_freq,
468 .irq_set_state = cmos_irq_set_state,
471 /*----------------------------------------------------------------*/
474 * All these chips have at least 64 bytes of address space, shared by
475 * RTC registers and NVRAM. Most of those bytes of NVRAM are used
476 * by boot firmware. Modern chips have 128 or 256 bytes.
479 #define NVRAM_OFFSET (RTC_REG_D + 1)
482 cmos_nvram_read(struct kobject *kobj, struct bin_attribute *attr,
483 char *buf, loff_t off, size_t count)
487 if (unlikely(off >= attr->size))
489 if ((off + count) > attr->size)
490 count = attr->size - off;
492 spin_lock_irq(&rtc_lock);
493 for (retval = 0, off += NVRAM_OFFSET; count--; retval++, off++)
494 *buf++ = CMOS_READ(off);
495 spin_unlock_irq(&rtc_lock);
501 cmos_nvram_write(struct kobject *kobj, struct bin_attribute *attr,
502 char *buf, loff_t off, size_t count)
504 struct cmos_rtc *cmos;
507 cmos = dev_get_drvdata(container_of(kobj, struct device, kobj));
508 if (unlikely(off >= attr->size))
510 if ((off + count) > attr->size)
511 count = attr->size - off;
513 /* NOTE: on at least PCs and Ataris, the boot firmware uses a
514 * checksum on part of the NVRAM data. That's currently ignored
515 * here. If userspace is smart enough to know what fields of
516 * NVRAM to update, updating checksums is also part of its job.
518 spin_lock_irq(&rtc_lock);
519 for (retval = 0, off += NVRAM_OFFSET; count--; retval++, off++) {
520 /* don't trash RTC registers */
521 if (off == cmos->day_alrm
522 || off == cmos->mon_alrm
523 || off == cmos->century)
526 CMOS_WRITE(*buf++, off);
528 spin_unlock_irq(&rtc_lock);
533 static struct bin_attribute nvram = {
536 .mode = S_IRUGO | S_IWUSR,
537 .owner = THIS_MODULE,
540 .read = cmos_nvram_read,
541 .write = cmos_nvram_write,
542 /* size gets set up later */
545 /*----------------------------------------------------------------*/
547 static struct cmos_rtc cmos_rtc;
549 static irqreturn_t cmos_interrupt(int irq, void *p)
554 spin_lock(&rtc_lock);
556 /* When the HPET interrupt handler calls us, the interrupt
557 * status is passed as arg1 instead of the irq number. But
558 * always clear irq status, even when HPET is in the way.
560 * Note that HPET and RTC are almost certainly out of phase,
561 * giving different IRQ status ...
563 irqstat = CMOS_READ(RTC_INTR_FLAGS);
564 rtc_control = CMOS_READ(RTC_CONTROL);
565 if (is_hpet_enabled())
566 irqstat = (unsigned long)irq & 0xF0;
567 irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
569 /* All Linux RTC alarms should be treated as if they were oneshot.
570 * Similar code may be needed in system wakeup paths, in case the
571 * alarm woke the system.
573 if (irqstat & RTC_AIE) {
574 rtc_control = CMOS_READ(RTC_CONTROL);
575 rtc_control &= ~RTC_AIE;
576 CMOS_WRITE(rtc_control, RTC_CONTROL);
577 hpet_mask_rtc_irq_bit(RTC_AIE);
579 CMOS_READ(RTC_INTR_FLAGS);
581 spin_unlock(&rtc_lock);
583 if (is_intr(irqstat)) {
584 rtc_update_irq(p, 1, irqstat);
594 #define INITSECTION __init
597 static int INITSECTION
598 cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
600 struct cmos_rtc_board_info *info = dev->platform_data;
602 unsigned char rtc_control;
603 unsigned address_space;
605 /* there can be only one ... */
612 /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
614 * REVISIT non-x86 systems may instead use memory space resources
615 * (needing ioremap etc), not i/o space resources like this ...
617 ports = request_region(ports->start,
618 ports->end + 1 - ports->start,
621 dev_dbg(dev, "i/o registers already in use\n");
625 cmos_rtc.irq = rtc_irq;
626 cmos_rtc.iomem = ports;
628 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
629 * driver did, but don't reject unknown configs. Old hardware
630 * won't address 128 bytes, and for now we ignore the way newer
631 * chips can address 256 bytes (using two more i/o ports).
633 #if defined(CONFIG_ATARI)
635 #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__)
638 #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
642 /* For ACPI systems extension info comes from the FADT. On others,
643 * board specific setup provides it as appropriate. Systems where
644 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
645 * some almost-clones) can provide hooks to make that behave.
647 * Note that ACPI doesn't preclude putting these registers into
648 * "extended" areas of the chip, including some that we won't yet
649 * expect CMOS_READ and friends to handle.
652 if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
653 cmos_rtc.day_alrm = info->rtc_day_alarm;
654 if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
655 cmos_rtc.mon_alrm = info->rtc_mon_alarm;
656 if (info->rtc_century && info->rtc_century < 128)
657 cmos_rtc.century = info->rtc_century;
659 if (info->wake_on && info->wake_off) {
660 cmos_rtc.wake_on = info->wake_on;
661 cmos_rtc.wake_off = info->wake_off;
665 cmos_rtc.rtc = rtc_device_register(driver_name, dev,
666 &cmos_rtc_ops, THIS_MODULE);
667 if (IS_ERR(cmos_rtc.rtc)) {
668 retval = PTR_ERR(cmos_rtc.rtc);
673 dev_set_drvdata(dev, &cmos_rtc);
674 rename_region(ports, cmos_rtc.rtc->dev.bus_id);
676 spin_lock_irq(&rtc_lock);
678 /* force periodic irq to CMOS reset default of 1024Hz;
680 * REVISIT it's been reported that at least one x86_64 ALI mobo
681 * doesn't use 32KHz here ... for portability we might need to
682 * do something about other clock frequencies.
684 cmos_rtc.rtc->irq_freq = 1024;
685 hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
686 CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
690 * NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
691 * allegedly some older rtcs need that to handle irqs properly
693 rtc_control = CMOS_READ(RTC_CONTROL);
694 rtc_control &= ~(RTC_PIE | RTC_AIE | RTC_UIE);
695 CMOS_WRITE(rtc_control, RTC_CONTROL);
696 hpet_mask_rtc_irq_bit(RTC_PIE | RTC_AIE | RTC_UIE);
698 CMOS_READ(RTC_INTR_FLAGS);
700 spin_unlock_irq(&rtc_lock);
702 /* FIXME teach the alarm code how to handle binary mode;
703 * <asm-generic/rtc.h> doesn't know 12-hour mode either.
705 if (!(rtc_control & RTC_24H) || (rtc_control & (RTC_DM_BINARY))) {
706 dev_dbg(dev, "only 24-hr BCD mode supported\n");
711 if (is_valid_irq(rtc_irq)) {
712 irq_handler_t rtc_cmos_int_handler;
714 if (is_hpet_enabled()) {
717 rtc_cmos_int_handler = hpet_rtc_interrupt;
718 err = hpet_register_irq_handler(cmos_interrupt);
720 printk(KERN_WARNING "hpet_register_irq_handler "
721 " failed in rtc_init().");
725 rtc_cmos_int_handler = cmos_interrupt;
727 retval = request_irq(rtc_irq, rtc_cmos_int_handler,
728 IRQF_DISABLED, cmos_rtc.rtc->dev.bus_id,
731 dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
735 hpet_rtc_timer_init();
737 /* export at least the first block of NVRAM */
738 nvram.size = address_space - NVRAM_OFFSET;
739 retval = sysfs_create_bin_file(&dev->kobj, &nvram);
741 dev_dbg(dev, "can't create nvram file? %d\n", retval);
745 pr_info("%s: alarms up to one %s%s%s\n",
746 cmos_rtc.rtc->dev.bus_id,
747 is_valid_irq(rtc_irq)
753 cmos_rtc.century ? ", y3k" : "",
754 is_hpet_enabled() ? ", hpet irqs" : "");
759 if (is_valid_irq(rtc_irq))
760 free_irq(rtc_irq, cmos_rtc.rtc);
763 rtc_device_unregister(cmos_rtc.rtc);
765 release_region(ports->start, ports->end + 1 - ports->start);
769 static void cmos_do_shutdown(void)
771 unsigned char rtc_control;
773 spin_lock_irq(&rtc_lock);
774 rtc_control = CMOS_READ(RTC_CONTROL);
775 rtc_control &= ~RTC_IRQMASK;
776 CMOS_WRITE(rtc_control, RTC_CONTROL);
777 hpet_mask_rtc_irq_bit(RTC_IRQMASK);
779 CMOS_READ(RTC_INTR_FLAGS);
780 spin_unlock_irq(&rtc_lock);
783 static void __exit cmos_do_remove(struct device *dev)
785 struct cmos_rtc *cmos = dev_get_drvdata(dev);
786 struct resource *ports;
790 sysfs_remove_bin_file(&dev->kobj, &nvram);
792 if (is_valid_irq(cmos->irq)) {
793 free_irq(cmos->irq, cmos->rtc);
794 hpet_unregister_irq_handler(cmos_interrupt);
797 rtc_device_unregister(cmos->rtc);
801 release_region(ports->start, ports->end + 1 - ports->start);
805 dev_set_drvdata(dev, NULL);
810 static int cmos_suspend(struct device *dev, pm_message_t mesg)
812 struct cmos_rtc *cmos = dev_get_drvdata(dev);
813 int do_wake = device_may_wakeup(dev);
816 /* only the alarm might be a wakeup event source */
817 spin_lock_irq(&rtc_lock);
818 cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
819 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
820 unsigned char irqstat;
824 mask = RTC_IRQMASK & ~RTC_AIE;
828 CMOS_WRITE(tmp, RTC_CONTROL);
829 hpet_mask_rtc_irq_bit(mask);
831 irqstat = CMOS_READ(RTC_INTR_FLAGS);
832 irqstat &= (tmp & RTC_IRQMASK) | RTC_IRQF;
833 if (is_intr(irqstat))
834 rtc_update_irq(cmos->rtc, 1, irqstat);
836 spin_unlock_irq(&rtc_lock);
839 cmos->enabled_wake = 1;
843 enable_irq_wake(cmos->irq);
846 pr_debug("%s: suspend%s, ctrl %02x\n",
847 cmos_rtc.rtc->dev.bus_id,
848 (tmp & RTC_AIE) ? ", alarm may wake" : "",
854 static int cmos_resume(struct device *dev)
856 struct cmos_rtc *cmos = dev_get_drvdata(dev);
857 unsigned char tmp = cmos->suspend_ctrl;
859 /* re-enable any irqs previously active */
860 if (tmp & RTC_IRQMASK) {
863 if (cmos->enabled_wake) {
867 disable_irq_wake(cmos->irq);
868 cmos->enabled_wake = 0;
871 spin_lock_irq(&rtc_lock);
873 CMOS_WRITE(tmp, RTC_CONTROL);
874 hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
876 mask = CMOS_READ(RTC_INTR_FLAGS);
877 mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
881 /* force one-shot behavior if HPET blocked
882 * the wake alarm's irq
884 rtc_update_irq(cmos->rtc, 1, mask);
886 hpet_mask_rtc_irq_bit(RTC_AIE);
887 } while (mask & RTC_AIE);
888 spin_unlock_irq(&rtc_lock);
891 pr_debug("%s: resume, ctrl %02x\n",
892 cmos_rtc.rtc->dev.bus_id,
899 #define cmos_suspend NULL
900 #define cmos_resume NULL
903 /*----------------------------------------------------------------*/
905 /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
906 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
907 * probably list them in similar PNPBIOS tables; so PNP is more common.
909 * We don't use legacy "poke at the hardware" probing. Ancient PCs that
910 * predate even PNPBIOS should set up platform_bus devices.
915 #include <linux/pnp.h>
918 cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
920 /* REVISIT paranoia argues for a shutdown notifier, since PNP
921 * drivers can't provide shutdown() methods to disable IRQs.
922 * Or better yet, fix PNP to allow those methods...
924 if (pnp_port_start(pnp,0) == 0x70 && !pnp_irq_valid(pnp,0))
925 /* Some machines contain a PNP entry for the RTC, but
926 * don't define the IRQ. It should always be safe to
927 * hardcode it in these cases
929 return cmos_do_probe(&pnp->dev,
930 pnp_get_resource(pnp, IORESOURCE_IO, 0), 8);
932 return cmos_do_probe(&pnp->dev,
933 pnp_get_resource(pnp, IORESOURCE_IO, 0),
937 static void __exit cmos_pnp_remove(struct pnp_dev *pnp)
939 cmos_do_remove(&pnp->dev);
944 static int cmos_pnp_suspend(struct pnp_dev *pnp, pm_message_t mesg)
946 return cmos_suspend(&pnp->dev, mesg);
949 static int cmos_pnp_resume(struct pnp_dev *pnp)
951 return cmos_resume(&pnp->dev);
955 #define cmos_pnp_suspend NULL
956 #define cmos_pnp_resume NULL
960 static const struct pnp_device_id rtc_ids[] = {
961 { .id = "PNP0b00", },
962 { .id = "PNP0b01", },
963 { .id = "PNP0b02", },
966 MODULE_DEVICE_TABLE(pnp, rtc_ids);
968 static struct pnp_driver cmos_pnp_driver = {
969 .name = (char *) driver_name,
971 .probe = cmos_pnp_probe,
972 .remove = __exit_p(cmos_pnp_remove),
974 /* flag ensures resume() gets called, and stops syslog spam */
975 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
976 .suspend = cmos_pnp_suspend,
977 .resume = cmos_pnp_resume,
980 #endif /* CONFIG_PNP */
982 /*----------------------------------------------------------------*/
984 /* Platform setup should have set up an RTC device, when PNP is
985 * unavailable ... this could happen even on (older) PCs.
988 static int __init cmos_platform_probe(struct platform_device *pdev)
990 return cmos_do_probe(&pdev->dev,
991 platform_get_resource(pdev, IORESOURCE_IO, 0),
992 platform_get_irq(pdev, 0));
995 static int __exit cmos_platform_remove(struct platform_device *pdev)
997 cmos_do_remove(&pdev->dev);
1001 static void cmos_platform_shutdown(struct platform_device *pdev)
1006 /* work with hotplug and coldplug */
1007 MODULE_ALIAS("platform:rtc_cmos");
1009 static struct platform_driver cmos_platform_driver = {
1010 .remove = __exit_p(cmos_platform_remove),
1011 .shutdown = cmos_platform_shutdown,
1013 .name = (char *) driver_name,
1014 .suspend = cmos_suspend,
1015 .resume = cmos_resume,
1019 static int __init cmos_init(void)
1022 if (pnp_platform_devices)
1023 return pnp_register_driver(&cmos_pnp_driver);
1025 return platform_driver_probe(&cmos_platform_driver,
1026 cmos_platform_probe);
1028 return platform_driver_probe(&cmos_platform_driver,
1029 cmos_platform_probe);
1030 #endif /* CONFIG_PNP */
1032 module_init(cmos_init);
1034 static void __exit cmos_exit(void)
1037 if (pnp_platform_devices)
1038 pnp_unregister_driver(&cmos_pnp_driver);
1040 platform_driver_unregister(&cmos_platform_driver);
1042 platform_driver_unregister(&cmos_platform_driver);
1043 #endif /* CONFIG_PNP */
1045 module_exit(cmos_exit);
1048 MODULE_AUTHOR("David Brownell");
1049 MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1050 MODULE_LICENSE("GPL");