drivers/rtc/rtc-omap.c

   1 /*
   2  * TI OMAP1 Real Time Clock interface for Linux
   3  *
   4  * Copyright (C) 2003 MontaVista Software, Inc.
   5  * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
   6  *
   7  * Copyright (C) 2006 David Brownell (new RTC framework)
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License
  11  * as published by the Free Software Foundation; either version
  12  * 2 of the License, or (at your option) any later version.
  13  */
  14
  15 #include <linux/kernel.h>
  16 #include <linux/init.h>
  17 #include <linux/module.h>
  18 #include <linux/ioport.h>
  19 #include <linux/delay.h>
  20 #include <linux/rtc.h>
  21 #include <linux/bcd.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/of.h>
  24 #include <linux/of_device.h>
  25 #include <linux/pm_runtime.h>
  26
  27 #include <asm/io.h>
  28
  29
  30 /* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock
  31  * with century-range alarm matching, driven by the 32kHz clock.
  32  *
  33  * The main user-visible ways it differs from PC RTCs are by omitting
  34  * "don't care" alarm fields and sub-second periodic IRQs, and having
  35  * an autoadjust mechanism to calibrate to the true oscillator rate.
  36  *
  37  * Board-specific wiring options include using split power mode with
  38  * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset),
  39  * and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from
  40  * low power modes) for OMAP1 boards (OMAP-L138 has this built into
  41  * the SoC). See the BOARD-SPECIFIC CUSTOMIZATION comment.
  42  */
  43
  44 #define DRIVER_NAME                     "omap_rtc"
  45
  46 #define OMAP_RTC_BASE                   0xfffb4800
  47
  48 /* RTC registers */
  49 #define OMAP_RTC_SECONDS_REG            0x00
  50 #define OMAP_RTC_MINUTES_REG            0x04
  51 #define OMAP_RTC_HOURS_REG              0x08
  52 #define OMAP_RTC_DAYS_REG               0x0C
  53 #define OMAP_RTC_MONTHS_REG             0x10
  54 #define OMAP_RTC_YEARS_REG              0x14
  55 #define OMAP_RTC_WEEKS_REG              0x18
  56
  57 #define OMAP_RTC_ALARM_SECONDS_REG      0x20
  58 #define OMAP_RTC_ALARM_MINUTES_REG      0x24
  59 #define OMAP_RTC_ALARM_HOURS_REG        0x28
  60 #define OMAP_RTC_ALARM_DAYS_REG         0x2c
  61 #define OMAP_RTC_ALARM_MONTHS_REG       0x30
  62 #define OMAP_RTC_ALARM_YEARS_REG        0x34
  63
  64 #define OMAP_RTC_CTRL_REG               0x40
  65 #define OMAP_RTC_STATUS_REG             0x44
  66 #define OMAP_RTC_INTERRUPTS_REG         0x48
  67
  68 #define OMAP_RTC_COMP_LSB_REG           0x4c
  69 #define OMAP_RTC_COMP_MSB_REG           0x50
  70 #define OMAP_RTC_OSC_REG                0x54
  71
  72 #define OMAP_RTC_KICK0_REG              0x6c
  73 #define OMAP_RTC_KICK1_REG              0x70
  74
  75 /* OMAP_RTC_CTRL_REG bit fields: */
  76 #define OMAP_RTC_CTRL_SPLIT             (1<<7)
  77 #define OMAP_RTC_CTRL_DISABLE           (1<<6)
  78 #define OMAP_RTC_CTRL_SET_32_COUNTER    (1<<5)
  79 #define OMAP_RTC_CTRL_TEST              (1<<4)
  80 #define OMAP_RTC_CTRL_MODE_12_24        (1<<3)
  81 #define OMAP_RTC_CTRL_AUTO_COMP         (1<<2)
  82 #define OMAP_RTC_CTRL_ROUND_30S         (1<<1)
  83 #define OMAP_RTC_CTRL_STOP              (1<<0)
  84
  85 /* OMAP_RTC_STATUS_REG bit fields: */
  86 #define OMAP_RTC_STATUS_POWER_UP        (1<<7)
  87 #define OMAP_RTC_STATUS_ALARM           (1<<6)
  88 #define OMAP_RTC_STATUS_1D_EVENT        (1<<5)
  89 #define OMAP_RTC_STATUS_1H_EVENT        (1<<4)
  90 #define OMAP_RTC_STATUS_1M_EVENT        (1<<3)
  91 #define OMAP_RTC_STATUS_1S_EVENT        (1<<2)
  92 #define OMAP_RTC_STATUS_RUN             (1<<1)
  93 #define OMAP_RTC_STATUS_BUSY            (1<<0)
  94
  95 /* OMAP_RTC_INTERRUPTS_REG bit fields: */
  96 #define OMAP_RTC_INTERRUPTS_IT_ALARM    (1<<3)
  97 #define OMAP_RTC_INTERRUPTS_IT_TIMER    (1<<2)
  98
  99 /* OMAP_RTC_KICKER values */
 100 #define KICK0_VALUE                     0x83e70b13
 101 #define KICK1_VALUE                     0x95a4f1e0
 102
 103 #define OMAP_RTC_HAS_KICKER             0x1
 104
 105 static void __iomem     *rtc_base;
 106
 107 #define rtc_read(addr)          readb(rtc_base + (addr))
 108 #define rtc_write(val, addr)    writeb(val, rtc_base + (addr))
 109
 110 #define rtc_writel(val, addr)   writel(val, rtc_base + (addr))
 111
 112
 113 /* we rely on the rtc framework to handle locking (rtc->ops_lock),
 114  * so the only other requirement is that register accesses which
 115  * require BUSY to be clear are made with IRQs locally disabled
 116  */
 117 static void rtc_wait_not_busy(void)
 118 {
 119         int     count = 0;
 120         u8      status;
 121
 122         /* BUSY may stay active for 1/32768 second (~30 usec) */
 123         for (count = 0; count < 50; count++) {
 124                 status = rtc_read(OMAP_RTC_STATUS_REG);
 125                 if ((status & (u8)OMAP_RTC_STATUS_BUSY) == 0)
 126                         break;
 127                 udelay(1);
 128         }
 129         /* now we have ~15 usec to read/write various registers */
 130 }
 131
 132 static irqreturn_t rtc_irq(int irq, void *rtc)
 133 {
 134         unsigned long           events = 0;
 135         u8                      irq_data;
 136
 137         irq_data = rtc_read(OMAP_RTC_STATUS_REG);
 138
 139         /* alarm irq? */
 140         if (irq_data & OMAP_RTC_STATUS_ALARM) {
 141                 rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
 142                 events |= RTC_IRQF | RTC_AF;
 143         }
 144
 145         /* 1/sec periodic/update irq? */
 146         if (irq_data & OMAP_RTC_STATUS_1S_EVENT)
 147                 events |= RTC_IRQF | RTC_UF;
 148
 149         rtc_update_irq(rtc, 1, events);
 150
 151         return IRQ_HANDLED;
 152 }
 153
 154 static int omap_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
 155 {
 156         u8 reg;
 157
 158         local_irq_disable();
 159         rtc_wait_not_busy();
 160         reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
 161         if (enabled)
 162                 reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
 163         else
 164                 reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
 165         rtc_wait_not_busy();
 166         rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
 167         local_irq_enable();
 168
 169         return 0;
 170 }
 171
 172 /* this hardware doesn't support "don't care" alarm fields */
 173 static int tm2bcd(struct rtc_time *tm)
 174 {
 175         if (rtc_valid_tm(tm) != 0)
 176                 return -EINVAL;
 177
 178         tm->tm_sec = bin2bcd(tm->tm_sec);
 179         tm->tm_min = bin2bcd(tm->tm_min);
 180         tm->tm_hour = bin2bcd(tm->tm_hour);
 181         tm->tm_mday = bin2bcd(tm->tm_mday);
 182
 183         tm->tm_mon = bin2bcd(tm->tm_mon + 1);
 184
 185         /* epoch == 1900 */
 186         if (tm->tm_year < 100 || tm->tm_year > 199)
 187                 return -EINVAL;
 188         tm->tm_year = bin2bcd(tm->tm_year - 100);
 189
 190         return 0;
 191 }
 192
 193 static void bcd2tm(struct rtc_time *tm)
 194 {
 195         tm->tm_sec = bcd2bin(tm->tm_sec);
 196         tm->tm_min = bcd2bin(tm->tm_min);
 197         tm->tm_hour = bcd2bin(tm->tm_hour);
 198         tm->tm_mday = bcd2bin(tm->tm_mday);
 199         tm->tm_mon = bcd2bin(tm->tm_mon) - 1;
 200         /* epoch == 1900 */
 201         tm->tm_year = bcd2bin(tm->tm_year) + 100;
 202 }
 203
 204
 205 static int omap_rtc_read_time(struct device *dev, struct rtc_time *tm)
 206 {
 207         /* we don't report wday/yday/isdst ... */
 208         local_irq_disable();
 209         rtc_wait_not_busy();
 210
 211         tm->tm_sec = rtc_read(OMAP_RTC_SECONDS_REG);
 212         tm->tm_min = rtc_read(OMAP_RTC_MINUTES_REG);
 213         tm->tm_hour = rtc_read(OMAP_RTC_HOURS_REG);
 214         tm->tm_mday = rtc_read(OMAP_RTC_DAYS_REG);
 215         tm->tm_mon = rtc_read(OMAP_RTC_MONTHS_REG);
 216         tm->tm_year = rtc_read(OMAP_RTC_YEARS_REG);
 217
 218         local_irq_enable();
 219
 220         bcd2tm(tm);
 221         return 0;
 222 }
 223
 224 static int omap_rtc_set_time(struct device *dev, struct rtc_time *tm)
 225 {
 226         if (tm2bcd(tm) < 0)
 227                 return -EINVAL;
 228         local_irq_disable();
 229         rtc_wait_not_busy();
 230
 231         rtc_write(tm->tm_year, OMAP_RTC_YEARS_REG);
 232         rtc_write(tm->tm_mon, OMAP_RTC_MONTHS_REG);
 233         rtc_write(tm->tm_mday, OMAP_RTC_DAYS_REG);
 234         rtc_write(tm->tm_hour, OMAP_RTC_HOURS_REG);
 235         rtc_write(tm->tm_min, OMAP_RTC_MINUTES_REG);
 236         rtc_write(tm->tm_sec, OMAP_RTC_SECONDS_REG);
 237
 238         local_irq_enable();
 239
 240         return 0;
 241 }
 242
 243 static int omap_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
 244 {
 245         local_irq_disable();
 246         rtc_wait_not_busy();
 247
 248         alm->time.tm_sec = rtc_read(OMAP_RTC_ALARM_SECONDS_REG);
 249         alm->time.tm_min = rtc_read(OMAP_RTC_ALARM_MINUTES_REG);
 250         alm->time.tm_hour = rtc_read(OMAP_RTC_ALARM_HOURS_REG);
 251         alm->time.tm_mday = rtc_read(OMAP_RTC_ALARM_DAYS_REG);
 252         alm->time.tm_mon = rtc_read(OMAP_RTC_ALARM_MONTHS_REG);
 253         alm->time.tm_year = rtc_read(OMAP_RTC_ALARM_YEARS_REG);
 254
 255         local_irq_enable();
 256
 257         bcd2tm(&alm->time);
 258         alm->enabled = !!(rtc_read(OMAP_RTC_INTERRUPTS_REG)
 259                         & OMAP_RTC_INTERRUPTS_IT_ALARM);
 260
 261         return 0;
 262 }
 263
 264 static int omap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
 265 {
 266         u8 reg;
 267
 268         if (tm2bcd(&alm->time) < 0)
 269                 return -EINVAL;
 270
 271         local_irq_disable();
 272         rtc_wait_not_busy();
 273
 274         rtc_write(alm->time.tm_year, OMAP_RTC_ALARM_YEARS_REG);
 275         rtc_write(alm->time.tm_mon, OMAP_RTC_ALARM_MONTHS_REG);
 276         rtc_write(alm->time.tm_mday, OMAP_RTC_ALARM_DAYS_REG);
 277         rtc_write(alm->time.tm_hour, OMAP_RTC_ALARM_HOURS_REG);
 278         rtc_write(alm->time.tm_min, OMAP_RTC_ALARM_MINUTES_REG);
 279         rtc_write(alm->time.tm_sec, OMAP_RTC_ALARM_SECONDS_REG);
 280
 281         reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
 282         if (alm->enabled)
 283                 reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
 284         else
 285                 reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
 286         rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
 287
 288         local_irq_enable();
 289
 290         return 0;
 291 }
 292
 293 static struct rtc_class_ops omap_rtc_ops = {
 294         .read_time      = omap_rtc_read_time,
 295         .set_time       = omap_rtc_set_time,
 296         .read_alarm     = omap_rtc_read_alarm,
 297         .set_alarm      = omap_rtc_set_alarm,
 298         .alarm_irq_enable = omap_rtc_alarm_irq_enable,
 299 };
 300
 301 static int omap_rtc_alarm;
 302 static int omap_rtc_timer;
 303
 304 #define OMAP_RTC_DATA_DA830_IDX 1
 305
 306 static struct platform_device_id omap_rtc_devtype[] = {
 307         {
 308                 .name   = DRIVER_NAME,
 309         }, {
 310                 .name   = "da830-rtc",
 311                 .driver_data = OMAP_RTC_HAS_KICKER,
 312         },
 313         {},
 314 };
 315 MODULE_DEVICE_TABLE(platform, omap_rtc_devtype);
 316
 317 static const struct of_device_id omap_rtc_of_match[] = {
 318         {       .compatible     = "ti,da830-rtc",
 319                 .data           = &omap_rtc_devtype[OMAP_RTC_DATA_DA830_IDX],
 320         },
 321         {},
 322 };
 323 MODULE_DEVICE_TABLE(of, omap_rtc_of_match);
 324
 325 static int __init omap_rtc_probe(struct platform_device *pdev)
 326 {
 327         struct resource         *res;
 328         struct rtc_device       *rtc;
 329         u8                      reg, new_ctrl;
 330         const struct platform_device_id *id_entry;
 331         const struct of_device_id *of_id;
 332
 333         of_id = of_match_device(omap_rtc_of_match, &pdev->dev);
 334         if (of_id)
 335                 pdev->id_entry = of_id->data;
 336
 337         omap_rtc_timer = platform_get_irq(pdev, 0);
 338         if (omap_rtc_timer <= 0) {
 339                 pr_debug("%s: no update irq?\n", pdev->name);
 340                 return -ENOENT;
 341         }
 342
 343         omap_rtc_alarm = platform_get_irq(pdev, 1);
 344         if (omap_rtc_alarm <= 0) {
 345                 pr_debug("%s: no alarm irq?\n", pdev->name);
 346                 return -ENOENT;
 347         }
 348
 349         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 350         if (!res) {
 351                 pr_debug("%s: RTC resource data missing\n", pdev->name);
 352                 return -ENOENT;
 353         }
 354
 355         rtc_base = devm_ioremap_resource(&pdev->dev, res);
 356         if (IS_ERR(rtc_base))
 357                 return PTR_ERR(rtc_base);
 358
 359         /* Enable the clock/module so that we can access the registers */
 360         pm_runtime_enable(&pdev->dev);
 361         pm_runtime_get_sync(&pdev->dev);
 362
 363         id_entry = platform_get_device_id(pdev);
 364         if (id_entry && (id_entry->driver_data & OMAP_RTC_HAS_KICKER)) {
 365                 rtc_writel(KICK0_VALUE, OMAP_RTC_KICK0_REG);
 366                 rtc_writel(KICK1_VALUE, OMAP_RTC_KICK1_REG);
 367         }
 368
 369         rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
 370                         &omap_rtc_ops, THIS_MODULE);
 371         if (IS_ERR(rtc)) {
 372                 pr_debug("%s: can't register RTC device, err %ld\n",
 373                         pdev->name, PTR_ERR(rtc));
 374                 goto fail0;
 375         }
 376         platform_set_drvdata(pdev, rtc);
 377
 378         /* clear pending irqs, and set 1/second periodic,
 379          * which we'll use instead of update irqs
 380          */
 381         rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
 382
 383         /* clear old status */
 384         reg = rtc_read(OMAP_RTC_STATUS_REG);
 385         if (reg & (u8) OMAP_RTC_STATUS_POWER_UP) {
 386                 pr_info("%s: RTC power up reset detected\n",
 387                         pdev->name);
 388                 rtc_write(OMAP_RTC_STATUS_POWER_UP, OMAP_RTC_STATUS_REG);
 389         }
 390         if (reg & (u8) OMAP_RTC_STATUS_ALARM)
 391                 rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
 392
 393         /* handle periodic and alarm irqs */
 394         if (devm_request_irq(&pdev->dev, omap_rtc_timer, rtc_irq, 0,
 395                         dev_name(&rtc->dev), rtc)) {
 396                 pr_debug("%s: RTC timer interrupt IRQ%d already claimed\n",
 397                         pdev->name, omap_rtc_timer);
 398                 goto fail0;
 399         }
 400         if ((omap_rtc_timer != omap_rtc_alarm) &&
 401                 (devm_request_irq(&pdev->dev, omap_rtc_alarm, rtc_irq, 0,
 402                         dev_name(&rtc->dev), rtc))) {
 403                 pr_debug("%s: RTC alarm interrupt IRQ%d already claimed\n",
 404                         pdev->name, omap_rtc_alarm);
 405                 goto fail0;
 406         }
 407
 408         /* On boards with split power, RTC_ON_NOFF won't reset the RTC */
 409         reg = rtc_read(OMAP_RTC_CTRL_REG);
 410         if (reg & (u8) OMAP_RTC_CTRL_STOP)
 411                 pr_info("%s: already running\n", pdev->name);
 412
 413         /* force to 24 hour mode */
 414         new_ctrl = reg & (OMAP_RTC_CTRL_SPLIT|OMAP_RTC_CTRL_AUTO_COMP);
 415         new_ctrl |= OMAP_RTC_CTRL_STOP;
 416
 417         /* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:
 418          *
 419          *  - Device wake-up capability setting should come through chip
 420          *    init logic. OMAP1 boards should initialize the "wakeup capable"
 421          *    flag in the platform device if the board is wired right for
 422          *    being woken up by RTC alarm. For OMAP-L138, this capability
 423          *    is built into the SoC by the "Deep Sleep" capability.
 424          *
 425          *  - Boards wired so RTC_ON_nOFF is used as the reset signal,
 426          *    rather than nPWRON_RESET, should forcibly enable split
 427          *    power mode.  (Some chip errata report that RTC_CTRL_SPLIT
 428          *    is write-only, and always reads as zero...)
 429          */
 430
 431         if (new_ctrl & (u8) OMAP_RTC_CTRL_SPLIT)
 432                 pr_info("%s: split power mode\n", pdev->name);
 433
 434         if (reg != new_ctrl)
 435                 rtc_write(new_ctrl, OMAP_RTC_CTRL_REG);
 436
 437         return 0;
 438
 439 fail0:
 440         if (id_entry && (id_entry->driver_data & OMAP_RTC_HAS_KICKER))
 441                 rtc_writel(0, OMAP_RTC_KICK0_REG);
 442         pm_runtime_put_sync(&pdev->dev);
 443         pm_runtime_disable(&pdev->dev);
 444         return -EIO;
 445 }
 446
 447 static int __exit omap_rtc_remove(struct platform_device *pdev)
 448 {
 449         const struct platform_device_id *id_entry =
 450                                 platform_get_device_id(pdev);
 451
 452         device_init_wakeup(&pdev->dev, 0);
 453
 454         /* leave rtc running, but disable irqs */
 455         rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
 456
 457         if (id_entry && (id_entry->driver_data & OMAP_RTC_HAS_KICKER))
 458                 rtc_writel(0, OMAP_RTC_KICK0_REG);
 459
 460         /* Disable the clock/module */
 461         pm_runtime_put_sync(&pdev->dev);
 462         pm_runtime_disable(&pdev->dev);
 463
 464         return 0;
 465 }
 466
 467 #ifdef CONFIG_PM_SLEEP
 468 static u8 irqstat;
 469
 470 static int omap_rtc_suspend(struct device *dev)
 471 {
 472         irqstat = rtc_read(OMAP_RTC_INTERRUPTS_REG);
 473
 474         /* FIXME the RTC alarm is not currently acting as a wakeup event
 475          * source, and in fact this enable() call is just saving a flag
 476          * that's never used...
 477          */
 478         if (device_may_wakeup(dev))
 479                 enable_irq_wake(omap_rtc_alarm);
 480         else
 481                 rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
 482
 483         /* Disable the clock/module */
 484         pm_runtime_put_sync(dev);
 485
 486         return 0;
 487 }
 488
 489 static int omap_rtc_resume(struct device *dev)
 490 {
 491         /* Enable the clock/module so that we can access the registers */
 492         pm_runtime_get_sync(dev);
 493
 494         if (device_may_wakeup(dev))
 495                 disable_irq_wake(omap_rtc_alarm);
 496         else
 497                 rtc_write(irqstat, OMAP_RTC_INTERRUPTS_REG);
 498         return 0;
 499 }
 500 #endif
 501
 502 static SIMPLE_DEV_PM_OPS(omap_rtc_pm_ops, omap_rtc_suspend, omap_rtc_resume);
 503
 504 static void omap_rtc_shutdown(struct platform_device *pdev)
 505 {
 506         rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
 507 }
 508
 509 MODULE_ALIAS("platform:omap_rtc");
 510 static struct platform_driver omap_rtc_driver = {
 511         .remove         = __exit_p(omap_rtc_remove),
 512         .shutdown       = omap_rtc_shutdown,
 513         .driver         = {
 514                 .name   = DRIVER_NAME,
 515                 .owner  = THIS_MODULE,
 516                 .pm     = &omap_rtc_pm_ops,
 517                 .of_match_table = of_match_ptr(omap_rtc_of_match),
 518         },
 519         .id_table       = omap_rtc_devtype,
 520 };
 521
 522 module_platform_driver_probe(omap_rtc_driver, omap_rtc_probe);
 523
 524 MODULE_AUTHOR("George G. Davis (and others)");
 525 MODULE_LICENSE("GPL");