2 * An i2c driver for the Xicor/Intersil X1205 RTC
3 * Copyright 2004 Karen Spearel
4 * Copyright 2005 Alessandro Zummo
6 * please send all reports to:
7 * Karen Spearel <kas111 at gmail dot com>
8 * Alessandro Zummo <a.zummo@towertech.it>
10 * based on a lot of other RTC drivers.
12 * Information and datasheet:
13 * http://www.intersil.com/cda/deviceinfo/0,1477,X1205,00.html
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
20 #include <linux/i2c.h>
21 #include <linux/bcd.h>
22 #include <linux/rtc.h>
23 #include <linux/delay.h>
24 #include <linux/module.h>
26 #define DRV_VERSION "1.0.8"
28 /* offsets into CCR area */
39 #define X1205_REG_SR 0x3F /* status register */
40 #define X1205_REG_Y2K 0x37
41 #define X1205_REG_DW 0x36
42 #define X1205_REG_YR 0x35
43 #define X1205_REG_MO 0x34
44 #define X1205_REG_DT 0x33
45 #define X1205_REG_HR 0x32
46 #define X1205_REG_MN 0x31
47 #define X1205_REG_SC 0x30
48 #define X1205_REG_DTR 0x13
49 #define X1205_REG_ATR 0x12
50 #define X1205_REG_INT 0x11
51 #define X1205_REG_0 0x10
52 #define X1205_REG_Y2K1 0x0F
53 #define X1205_REG_DWA1 0x0E
54 #define X1205_REG_YRA1 0x0D
55 #define X1205_REG_MOA1 0x0C
56 #define X1205_REG_DTA1 0x0B
57 #define X1205_REG_HRA1 0x0A
58 #define X1205_REG_MNA1 0x09
59 #define X1205_REG_SCA1 0x08
60 #define X1205_REG_Y2K0 0x07
61 #define X1205_REG_DWA0 0x06
62 #define X1205_REG_YRA0 0x05
63 #define X1205_REG_MOA0 0x04
64 #define X1205_REG_DTA0 0x03
65 #define X1205_REG_HRA0 0x02
66 #define X1205_REG_MNA0 0x01
67 #define X1205_REG_SCA0 0x00
69 #define X1205_CCR_BASE 0x30 /* Base address of CCR */
70 #define X1205_ALM0_BASE 0x00 /* Base address of ALARM0 */
72 #define X1205_SR_RTCF 0x01 /* Clock failure */
73 #define X1205_SR_WEL 0x02 /* Write Enable Latch */
74 #define X1205_SR_RWEL 0x04 /* Register Write Enable */
75 #define X1205_SR_AL0 0x20 /* Alarm 0 match */
77 #define X1205_DTR_DTR0 0x01
78 #define X1205_DTR_DTR1 0x02
79 #define X1205_DTR_DTR2 0x04
81 #define X1205_HR_MIL 0x80 /* Set in ccr.hour for 24 hr mode */
83 #define X1205_INT_AL0E 0x20 /* Alarm 0 enable */
85 static struct i2c_driver x1205_driver;
88 * In the routines that deal directly with the x1205 hardware, we use
89 * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch
90 * Epoch is initialized as 2000. Time is set to UTC.
92 static int x1205_get_datetime(struct i2c_client *client, struct rtc_time *tm,
93 unsigned char reg_base)
95 unsigned char dt_addr[2] = { 0, reg_base };
99 struct i2c_msg msgs[] = {
100 { client->addr, 0, 2, dt_addr }, /* setup read ptr */
101 { client->addr, I2C_M_RD, 8, buf }, /* read date */
104 /* read date registers */
105 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
106 dev_err(&client->dev, "%s: read error\n", __func__);
110 dev_dbg(&client->dev,
111 "%s: raw read data - sec=%02x, min=%02x, hr=%02x, "
112 "mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n",
114 buf[0], buf[1], buf[2], buf[3],
115 buf[4], buf[5], buf[6], buf[7]);
117 /* Mask out the enable bits if these are alarm registers */
118 if (reg_base < X1205_CCR_BASE)
119 for (i = 0; i <= 4; i++)
122 tm->tm_sec = bcd2bin(buf[CCR_SEC]);
123 tm->tm_min = bcd2bin(buf[CCR_MIN]);
124 tm->tm_hour = bcd2bin(buf[CCR_HOUR] & 0x3F); /* hr is 0-23 */
125 tm->tm_mday = bcd2bin(buf[CCR_MDAY]);
126 tm->tm_mon = bcd2bin(buf[CCR_MONTH]) - 1; /* mon is 0-11 */
127 tm->tm_year = bcd2bin(buf[CCR_YEAR])
128 + (bcd2bin(buf[CCR_Y2K]) * 100) - 1900;
129 tm->tm_wday = buf[CCR_WDAY];
131 dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
132 "mday=%d, mon=%d, year=%d, wday=%d\n",
134 tm->tm_sec, tm->tm_min, tm->tm_hour,
135 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
140 static int x1205_get_status(struct i2c_client *client, unsigned char *sr)
142 static unsigned char sr_addr[2] = { 0, X1205_REG_SR };
144 struct i2c_msg msgs[] = {
145 { client->addr, 0, 2, sr_addr }, /* setup read ptr */
146 { client->addr, I2C_M_RD, 1, sr }, /* read status */
149 /* read status register */
150 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
151 dev_err(&client->dev, "%s: read error\n", __func__);
158 static int x1205_set_datetime(struct i2c_client *client, struct rtc_time *tm,
159 u8 reg_base, unsigned char alm_enable)
162 unsigned char rdata[10] = { 0, reg_base };
163 unsigned char *buf = rdata + 2;
165 static const unsigned char wel[3] = { 0, X1205_REG_SR,
168 static const unsigned char rwel[3] = { 0, X1205_REG_SR,
169 X1205_SR_WEL | X1205_SR_RWEL };
171 static const unsigned char diswe[3] = { 0, X1205_REG_SR, 0 };
173 dev_dbg(&client->dev,
174 "%s: sec=%d min=%d hour=%d mday=%d mon=%d year=%d wday=%d\n",
175 __func__, tm->tm_sec, tm->tm_min, tm->tm_hour, tm->tm_mday,
176 tm->tm_mon, tm->tm_year, tm->tm_wday);
178 buf[CCR_SEC] = bin2bcd(tm->tm_sec);
179 buf[CCR_MIN] = bin2bcd(tm->tm_min);
181 /* set hour and 24hr bit */
182 buf[CCR_HOUR] = bin2bcd(tm->tm_hour) | X1205_HR_MIL;
184 buf[CCR_MDAY] = bin2bcd(tm->tm_mday);
187 buf[CCR_MONTH] = bin2bcd(tm->tm_mon + 1);
189 /* year, since the rtc epoch*/
190 buf[CCR_YEAR] = bin2bcd(tm->tm_year % 100);
191 buf[CCR_WDAY] = tm->tm_wday & 0x07;
192 buf[CCR_Y2K] = bin2bcd((tm->tm_year + 1900) / 100);
194 /* If writing alarm registers, set compare bits on registers 0-4 */
195 if (reg_base < X1205_CCR_BASE)
196 for (i = 0; i <= 4; i++)
199 /* this sequence is required to unlock the chip */
200 if ((xfer = i2c_master_send(client, wel, 3)) != 3) {
201 dev_err(&client->dev, "%s: wel - %d\n", __func__, xfer);
205 if ((xfer = i2c_master_send(client, rwel, 3)) != 3) {
206 dev_err(&client->dev, "%s: rwel - %d\n", __func__, xfer);
210 xfer = i2c_master_send(client, rdata, sizeof(rdata));
211 if (xfer != sizeof(rdata)) {
212 dev_err(&client->dev,
213 "%s: result=%d addr=%02x, data=%02x\n",
215 xfer, rdata[1], rdata[2]);
219 /* If we wrote to the nonvolatile region, wait 10msec for write cycle*/
220 if (reg_base < X1205_CCR_BASE) {
221 unsigned char al0e[3] = { 0, X1205_REG_INT, 0 };
225 /* ...and set or clear the AL0E bit in the INT register */
227 /* Need to set RWEL again as the write has cleared it */
228 xfer = i2c_master_send(client, rwel, 3);
230 dev_err(&client->dev,
231 "%s: aloe rwel - %d\n",
238 al0e[2] = X1205_INT_AL0E;
240 xfer = i2c_master_send(client, al0e, 3);
242 dev_err(&client->dev,
249 /* and wait 10msec again for this write to complete */
253 /* disable further writes */
254 if ((xfer = i2c_master_send(client, diswe, 3)) != 3) {
255 dev_err(&client->dev, "%s: diswe - %d\n", __func__, xfer);
262 static int x1205_fix_osc(struct i2c_client *client)
267 memset(&tm, 0, sizeof(tm));
269 err = x1205_set_datetime(client, &tm, X1205_CCR_BASE, 0);
271 dev_err(&client->dev, "unable to restart the oscillator\n");
276 static int x1205_get_dtrim(struct i2c_client *client, int *trim)
279 static unsigned char dtr_addr[2] = { 0, X1205_REG_DTR };
281 struct i2c_msg msgs[] = {
282 { client->addr, 0, 2, dtr_addr }, /* setup read ptr */
283 { client->addr, I2C_M_RD, 1, &dtr }, /* read dtr */
286 /* read dtr register */
287 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
288 dev_err(&client->dev, "%s: read error\n", __func__);
292 dev_dbg(&client->dev, "%s: raw dtr=%x\n", __func__, dtr);
296 if (dtr & X1205_DTR_DTR0)
299 if (dtr & X1205_DTR_DTR1)
302 if (dtr & X1205_DTR_DTR2)
308 static int x1205_get_atrim(struct i2c_client *client, int *trim)
311 static unsigned char atr_addr[2] = { 0, X1205_REG_ATR };
313 struct i2c_msg msgs[] = {
314 { client->addr, 0, 2, atr_addr }, /* setup read ptr */
315 { client->addr, I2C_M_RD, 1, &atr }, /* read atr */
318 /* read atr register */
319 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
320 dev_err(&client->dev, "%s: read error\n", __func__);
324 dev_dbg(&client->dev, "%s: raw atr=%x\n", __func__, atr);
326 /* atr is a two's complement value on 6 bits,
327 * perform sign extension. The formula is
328 * Catr = (atr * 0.25pF) + 11.00pF.
333 dev_dbg(&client->dev, "%s: raw atr=%x (%d)\n", __func__, atr, atr);
335 *trim = (atr * 250) + 11000;
337 dev_dbg(&client->dev, "%s: real=%d\n", __func__, *trim);
344 unsigned char reg, mask, min, max;
347 static int x1205_validate_client(struct i2c_client *client)
351 /* Probe array. We will read the register at the specified
352 * address and check if the given bits are zero.
354 static const unsigned char probe_zero_pattern[] = {
363 static const struct x1205_limit probe_limits_pattern[] = {
364 /* register, mask, min, max */
365 { X1205_REG_Y2K, 0xFF, 19, 20 },
366 { X1205_REG_DW, 0xFF, 0, 6 },
367 { X1205_REG_YR, 0xFF, 0, 99 },
368 { X1205_REG_MO, 0xFF, 0, 12 },
369 { X1205_REG_DT, 0xFF, 0, 31 },
370 { X1205_REG_HR, 0x7F, 0, 23 },
371 { X1205_REG_MN, 0xFF, 0, 59 },
372 { X1205_REG_SC, 0xFF, 0, 59 },
373 { X1205_REG_Y2K1, 0xFF, 19, 20 },
374 { X1205_REG_Y2K0, 0xFF, 19, 20 },
377 /* check that registers have bits a 0 where expected */
378 for (i = 0; i < ARRAY_SIZE(probe_zero_pattern); i += 2) {
381 unsigned char addr[2] = { 0, probe_zero_pattern[i] };
383 struct i2c_msg msgs[2] = {
384 { client->addr, 0, 2, addr },
385 { client->addr, I2C_M_RD, 1, &buf },
388 if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) {
389 dev_err(&client->dev,
390 "%s: could not read register %x\n",
391 __func__, probe_zero_pattern[i]);
396 if ((buf & probe_zero_pattern[i+1]) != 0) {
397 dev_err(&client->dev,
398 "%s: register=%02x, zero pattern=%d, value=%x\n",
399 __func__, probe_zero_pattern[i], i, buf);
405 /* check limits (only registers with bcd values) */
406 for (i = 0; i < ARRAY_SIZE(probe_limits_pattern); i++) {
407 unsigned char reg, value;
409 unsigned char addr[2] = { 0, probe_limits_pattern[i].reg };
411 struct i2c_msg msgs[2] = {
412 { client->addr, 0, 2, addr },
413 { client->addr, I2C_M_RD, 1, ® },
416 if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) {
417 dev_err(&client->dev,
418 "%s: could not read register %x\n",
419 __func__, probe_limits_pattern[i].reg);
424 value = bcd2bin(reg & probe_limits_pattern[i].mask);
426 if (value > probe_limits_pattern[i].max ||
427 value < probe_limits_pattern[i].min) {
428 dev_dbg(&client->dev,
429 "%s: register=%x, lim pattern=%d, value=%d\n",
430 __func__, probe_limits_pattern[i].reg,
440 static int x1205_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
443 unsigned char intreg, status;
444 static unsigned char int_addr[2] = { 0, X1205_REG_INT };
445 struct i2c_client *client = to_i2c_client(dev);
446 struct i2c_msg msgs[] = {
447 { client->addr, 0, 2, int_addr }, /* setup read ptr */
448 { client->addr, I2C_M_RD, 1, &intreg }, /* read INT register */
451 /* read interrupt register and status register */
452 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) {
453 dev_err(&client->dev, "%s: read error\n", __func__);
456 err = x1205_get_status(client, &status);
458 alrm->pending = (status & X1205_SR_AL0) ? 1 : 0;
459 alrm->enabled = (intreg & X1205_INT_AL0E) ? 1 : 0;
460 err = x1205_get_datetime(client, &alrm->time, X1205_ALM0_BASE);
465 static int x1205_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
467 return x1205_set_datetime(to_i2c_client(dev),
468 &alrm->time, X1205_ALM0_BASE, alrm->enabled);
471 static int x1205_rtc_read_time(struct device *dev, struct rtc_time *tm)
473 return x1205_get_datetime(to_i2c_client(dev),
477 static int x1205_rtc_set_time(struct device *dev, struct rtc_time *tm)
479 return x1205_set_datetime(to_i2c_client(dev),
480 tm, X1205_CCR_BASE, 0);
483 static int x1205_rtc_proc(struct device *dev, struct seq_file *seq)
485 int err, dtrim, atrim;
487 if ((err = x1205_get_dtrim(to_i2c_client(dev), &dtrim)) == 0)
488 seq_printf(seq, "digital_trim\t: %d ppm\n", dtrim);
490 if ((err = x1205_get_atrim(to_i2c_client(dev), &atrim)) == 0)
491 seq_printf(seq, "analog_trim\t: %d.%02d pF\n",
492 atrim / 1000, atrim % 1000);
496 static const struct rtc_class_ops x1205_rtc_ops = {
497 .proc = x1205_rtc_proc,
498 .read_time = x1205_rtc_read_time,
499 .set_time = x1205_rtc_set_time,
500 .read_alarm = x1205_rtc_read_alarm,
501 .set_alarm = x1205_rtc_set_alarm,
504 static ssize_t x1205_sysfs_show_atrim(struct device *dev,
505 struct device_attribute *attr, char *buf)
509 err = x1205_get_atrim(to_i2c_client(dev), &atrim);
513 return sprintf(buf, "%d.%02d pF\n", atrim / 1000, atrim % 1000);
515 static DEVICE_ATTR(atrim, S_IRUGO, x1205_sysfs_show_atrim, NULL);
517 static ssize_t x1205_sysfs_show_dtrim(struct device *dev,
518 struct device_attribute *attr, char *buf)
522 err = x1205_get_dtrim(to_i2c_client(dev), &dtrim);
526 return sprintf(buf, "%d ppm\n", dtrim);
528 static DEVICE_ATTR(dtrim, S_IRUGO, x1205_sysfs_show_dtrim, NULL);
530 static int x1205_sysfs_register(struct device *dev)
534 err = device_create_file(dev, &dev_attr_atrim);
538 err = device_create_file(dev, &dev_attr_dtrim);
540 device_remove_file(dev, &dev_attr_atrim);
545 static void x1205_sysfs_unregister(struct device *dev)
547 device_remove_file(dev, &dev_attr_atrim);
548 device_remove_file(dev, &dev_attr_dtrim);
552 static int x1205_probe(struct i2c_client *client,
553 const struct i2c_device_id *id)
557 struct rtc_device *rtc;
559 dev_dbg(&client->dev, "%s\n", __func__);
561 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
564 if (x1205_validate_client(client) < 0)
567 dev_info(&client->dev, "chip found, driver version " DRV_VERSION "\n");
569 rtc = rtc_device_register(x1205_driver.driver.name, &client->dev,
570 &x1205_rtc_ops, THIS_MODULE);
575 i2c_set_clientdata(client, rtc);
577 /* Check for power failures and eventually enable the osc */
578 if ((err = x1205_get_status(client, &sr)) == 0) {
579 if (sr & X1205_SR_RTCF) {
580 dev_err(&client->dev,
581 "power failure detected, "
582 "please set the clock\n");
584 x1205_fix_osc(client);
588 dev_err(&client->dev, "couldn't read status\n");
590 err = x1205_sysfs_register(&client->dev);
597 rtc_device_unregister(rtc);
602 static int x1205_remove(struct i2c_client *client)
604 struct rtc_device *rtc = i2c_get_clientdata(client);
606 rtc_device_unregister(rtc);
607 x1205_sysfs_unregister(&client->dev);
611 static const struct i2c_device_id x1205_id[] = {
615 MODULE_DEVICE_TABLE(i2c, x1205_id);
617 static struct i2c_driver x1205_driver = {
621 .probe = x1205_probe,
622 .remove = x1205_remove,
623 .id_table = x1205_id,
626 module_i2c_driver(x1205_driver);
629 "Karen Spearel <kas111 at gmail dot com>, "
630 "Alessandro Zummo <a.zummo@towertech.it>");
631 MODULE_DESCRIPTION("Xicor/Intersil X1205 RTC driver");
632 MODULE_LICENSE("GPL");
633 MODULE_VERSION(DRV_VERSION);