virtio-blk: allow toggling host cache between writeback and writethrough
[firefly-linux-kernel-4.4.55.git] / drivers / scsi / aacraid / aacraid.h
1 #ifndef dprintk
2 # define dprintk(x)
3 #endif
4 /* eg: if (nblank(dprintk(x))) */
5 #define _nblank(x) #x
6 #define nblank(x) _nblank(x)[0]
7
8 #include <linux/interrupt.h>
9
10 /*------------------------------------------------------------------------------
11  *              D E F I N E S
12  *----------------------------------------------------------------------------*/
13
14 #ifndef AAC_DRIVER_BUILD
15 # define AAC_DRIVER_BUILD 29800
16 # define AAC_DRIVER_BRANCH "-ms"
17 #endif
18 #define MAXIMUM_NUM_CONTAINERS  32
19
20 #define AAC_NUM_MGT_FIB         8
21 #define AAC_NUM_IO_FIB          (512 - AAC_NUM_MGT_FIB)
22 #define AAC_NUM_FIB             (AAC_NUM_IO_FIB + AAC_NUM_MGT_FIB)
23
24 #define AAC_MAX_LUN             (8)
25
26 #define AAC_MAX_HOSTPHYSMEMPAGES (0xfffff)
27 #define AAC_MAX_32BIT_SGBCOUNT  ((unsigned short)256)
28
29 #define AAC_DEBUG_INSTRUMENT_AIF_DELETE
30
31 /*
32  * These macros convert from physical channels to virtual channels
33  */
34 #define CONTAINER_CHANNEL               (0)
35 #define CONTAINER_TO_CHANNEL(cont)      (CONTAINER_CHANNEL)
36 #define CONTAINER_TO_ID(cont)           (cont)
37 #define CONTAINER_TO_LUN(cont)          (0)
38
39 #define aac_phys_to_logical(x)  ((x)+1)
40 #define aac_logical_to_phys(x)  ((x)?(x)-1:0)
41
42 /* #define AAC_DETAILED_STATUS_INFO */
43
44 struct diskparm
45 {
46         int heads;
47         int sectors;
48         int cylinders;
49 };
50
51
52 /*
53  *      Firmware constants
54  */
55
56 #define         CT_NONE                 0
57 #define         CT_OK                   218
58 #define         FT_FILESYS      8       /* ADAPTEC's "FSA"(tm) filesystem */
59 #define         FT_DRIVE        9       /* physical disk - addressable in scsi by bus/id/lun */
60
61 /*
62  *      Host side memory scatter gather list
63  *      Used by the adapter for read, write, and readdirplus operations
64  *      We have separate 32 and 64 bit version because even
65  *      on 64 bit systems not all cards support the 64 bit version
66  */
67 struct sgentry {
68         __le32  addr;   /* 32-bit address. */
69         __le32  count;  /* Length. */
70 };
71
72 struct user_sgentry {
73         u32     addr;   /* 32-bit address. */
74         u32     count;  /* Length. */
75 };
76
77 struct sgentry64 {
78         __le32  addr[2];        /* 64-bit addr. 2 pieces for data alignment */
79         __le32  count;  /* Length. */
80 };
81
82 struct user_sgentry64 {
83         u32     addr[2];        /* 64-bit addr. 2 pieces for data alignment */
84         u32     count;  /* Length. */
85 };
86
87 struct sgentryraw {
88         __le32          next;   /* reserved for F/W use */
89         __le32          prev;   /* reserved for F/W use */
90         __le32          addr[2];
91         __le32          count;
92         __le32          flags;  /* reserved for F/W use */
93 };
94
95 struct user_sgentryraw {
96         u32             next;   /* reserved for F/W use */
97         u32             prev;   /* reserved for F/W use */
98         u32             addr[2];
99         u32             count;
100         u32             flags;  /* reserved for F/W use */
101 };
102
103 struct sge_ieee1212 {
104         u32     addrLow;
105         u32     addrHigh;
106         u32     length;
107         u32     flags;
108 };
109
110 /*
111  *      SGMAP
112  *
113  *      This is the SGMAP structure for all commands that use
114  *      32-bit addressing.
115  */
116
117 struct sgmap {
118         __le32          count;
119         struct sgentry  sg[1];
120 };
121
122 struct user_sgmap {
123         u32             count;
124         struct user_sgentry     sg[1];
125 };
126
127 struct sgmap64 {
128         __le32          count;
129         struct sgentry64 sg[1];
130 };
131
132 struct user_sgmap64 {
133         u32             count;
134         struct user_sgentry64 sg[1];
135 };
136
137 struct sgmapraw {
138         __le32            count;
139         struct sgentryraw sg[1];
140 };
141
142 struct user_sgmapraw {
143         u32               count;
144         struct user_sgentryraw sg[1];
145 };
146
147 struct creation_info
148 {
149         u8              buildnum;               /* e.g., 588 */
150         u8              usec;                   /* e.g., 588 */
151         u8              via;                    /* e.g., 1 = FSU,
152                                                  *       2 = API
153                                                  */
154         u8              year;                   /* e.g., 1997 = 97 */
155         __le32          date;                   /*
156                                                  * unsigned     Month           :4;     // 1 - 12
157                                                  * unsigned     Day             :6;     // 1 - 32
158                                                  * unsigned     Hour            :6;     // 0 - 23
159                                                  * unsigned     Minute          :6;     // 0 - 60
160                                                  * unsigned     Second          :6;     // 0 - 60
161                                                  */
162         __le32          serial[2];                      /* e.g., 0x1DEADB0BFAFAF001 */
163 };
164
165
166 /*
167  *      Define all the constants needed for the communication interface
168  */
169
170 /*
171  *      Define how many queue entries each queue will have and the total
172  *      number of entries for the entire communication interface. Also define
173  *      how many queues we support.
174  *
175  *      This has to match the controller
176  */
177
178 #define NUMBER_OF_COMM_QUEUES  8   // 4 command; 4 response
179 #define HOST_HIGH_CMD_ENTRIES  4
180 #define HOST_NORM_CMD_ENTRIES  8
181 #define ADAP_HIGH_CMD_ENTRIES  4
182 #define ADAP_NORM_CMD_ENTRIES  512
183 #define HOST_HIGH_RESP_ENTRIES 4
184 #define HOST_NORM_RESP_ENTRIES 512
185 #define ADAP_HIGH_RESP_ENTRIES 4
186 #define ADAP_NORM_RESP_ENTRIES 8
187
188 #define TOTAL_QUEUE_ENTRIES  \
189     (HOST_NORM_CMD_ENTRIES + HOST_HIGH_CMD_ENTRIES + ADAP_NORM_CMD_ENTRIES + ADAP_HIGH_CMD_ENTRIES + \
190             HOST_NORM_RESP_ENTRIES + HOST_HIGH_RESP_ENTRIES + ADAP_NORM_RESP_ENTRIES + ADAP_HIGH_RESP_ENTRIES)
191
192
193 /*
194  *      Set the queues on a 16 byte alignment
195  */
196
197 #define QUEUE_ALIGNMENT         16
198
199 /*
200  *      The queue headers define the Communication Region queues. These
201  *      are physically contiguous and accessible by both the adapter and the
202  *      host. Even though all queue headers are in the same contiguous block
203  *      they will be represented as individual units in the data structures.
204  */
205
206 struct aac_entry {
207         __le32 size; /* Size in bytes of Fib which this QE points to */
208         __le32 addr; /* Receiver address of the FIB */
209 };
210
211 /*
212  *      The adapter assumes the ProducerIndex and ConsumerIndex are grouped
213  *      adjacently and in that order.
214  */
215
216 struct aac_qhdr {
217         __le64 header_addr;/* Address to hand the adapter to access
218                               to this queue head */
219         __le32 *producer; /* The producer index for this queue (host address) */
220         __le32 *consumer; /* The consumer index for this queue (host address) */
221 };
222
223 /*
224  *      Define all the events which the adapter would like to notify
225  *      the host of.
226  */
227
228 #define         HostNormCmdQue          1       /* Change in host normal priority command queue */
229 #define         HostHighCmdQue          2       /* Change in host high priority command queue */
230 #define         HostNormRespQue         3       /* Change in host normal priority response queue */
231 #define         HostHighRespQue         4       /* Change in host high priority response queue */
232 #define         AdapNormRespNotFull     5
233 #define         AdapHighRespNotFull     6
234 #define         AdapNormCmdNotFull      7
235 #define         AdapHighCmdNotFull      8
236 #define         SynchCommandComplete    9
237 #define         AdapInternalError       0xfe    /* The adapter detected an internal error shutting down */
238
239 /*
240  *      Define all the events the host wishes to notify the
241  *      adapter of. The first four values much match the Qid the
242  *      corresponding queue.
243  */
244
245 #define         AdapNormCmdQue          2
246 #define         AdapHighCmdQue          3
247 #define         AdapNormRespQue         6
248 #define         AdapHighRespQue         7
249 #define         HostShutdown            8
250 #define         HostPowerFail           9
251 #define         FatalCommError          10
252 #define         HostNormRespNotFull     11
253 #define         HostHighRespNotFull     12
254 #define         HostNormCmdNotFull      13
255 #define         HostHighCmdNotFull      14
256 #define         FastIo                  15
257 #define         AdapPrintfDone          16
258
259 /*
260  *      Define all the queues that the adapter and host use to communicate
261  *      Number them to match the physical queue layout.
262  */
263
264 enum aac_queue_types {
265         HostNormCmdQueue = 0,   /* Adapter to host normal priority command traffic */
266         HostHighCmdQueue,       /* Adapter to host high priority command traffic */
267         AdapNormCmdQueue,       /* Host to adapter normal priority command traffic */
268         AdapHighCmdQueue,       /* Host to adapter high priority command traffic */
269         HostNormRespQueue,      /* Adapter to host normal priority response traffic */
270         HostHighRespQueue,      /* Adapter to host high priority response traffic */
271         AdapNormRespQueue,      /* Host to adapter normal priority response traffic */
272         AdapHighRespQueue       /* Host to adapter high priority response traffic */
273 };
274
275 /*
276  *      Assign type values to the FSA communication data structures
277  */
278
279 #define         FIB_MAGIC       0x0001
280 #define         FIB_MAGIC2      0x0004
281 #define         FIB_MAGIC2_64   0x0005
282
283 /*
284  *      Define the priority levels the FSA communication routines support.
285  */
286
287 #define         FsaNormal       1
288
289 /* transport FIB header (PMC) */
290 struct aac_fib_xporthdr {
291         u64     HostAddress;    /* FIB host address w/o xport header */
292         u32     Size;           /* FIB size excluding xport header */
293         u32     Handle;         /* driver handle to reference the FIB */
294         u64     Reserved[2];
295 };
296
297 #define         ALIGN32         32
298
299 /*
300  * Define the FIB. The FIB is the where all the requested data and
301  * command information are put to the application on the FSA adapter.
302  */
303
304 struct aac_fibhdr {
305         __le32 XferState;       /* Current transfer state for this CCB */
306         __le16 Command;         /* Routing information for the destination */
307         u8 StructType;          /* Type FIB */
308         u8 Unused;              /* Unused */
309         __le16 Size;            /* Size of this FIB in bytes */
310         __le16 SenderSize;      /* Size of the FIB in the sender
311                                    (for response sizing) */
312         __le32 SenderFibAddress;  /* Host defined data in the FIB */
313         union {
314                 __le32 ReceiverFibAddress;/* Logical address of this FIB for
315                                      the adapter (old) */
316                 __le32 SenderFibAddressHigh;/* upper 32bit of phys. FIB address */
317                 __le32 TimeStamp;       /* otherwise timestamp for FW internal use */
318         } u;
319         u32 Handle;             /* FIB handle used for MSGU commnunication */
320         u32 Previous;           /* FW internal use */
321         u32 Next;               /* FW internal use */
322 };
323
324 struct hw_fib {
325         struct aac_fibhdr header;
326         u8 data[512-sizeof(struct aac_fibhdr)]; // Command specific data
327 };
328
329 /*
330  *      FIB commands
331  */
332
333 #define         TestCommandResponse             1
334 #define         TestAdapterCommand              2
335 /*
336  *      Lowlevel and comm commands
337  */
338 #define         LastTestCommand                 100
339 #define         ReinitHostNormCommandQueue      101
340 #define         ReinitHostHighCommandQueue      102
341 #define         ReinitHostHighRespQueue         103
342 #define         ReinitHostNormRespQueue         104
343 #define         ReinitAdapNormCommandQueue      105
344 #define         ReinitAdapHighCommandQueue      107
345 #define         ReinitAdapHighRespQueue         108
346 #define         ReinitAdapNormRespQueue         109
347 #define         InterfaceShutdown               110
348 #define         DmaCommandFib                   120
349 #define         StartProfile                    121
350 #define         TermProfile                     122
351 #define         SpeedTest                       123
352 #define         TakeABreakPt                    124
353 #define         RequestPerfData                 125
354 #define         SetInterruptDefTimer            126
355 #define         SetInterruptDefCount            127
356 #define         GetInterruptDefStatus           128
357 #define         LastCommCommand                 129
358 /*
359  *      Filesystem commands
360  */
361 #define         NuFileSystem                    300
362 #define         UFS                             301
363 #define         HostFileSystem                  302
364 #define         LastFileSystemCommand           303
365 /*
366  *      Container Commands
367  */
368 #define         ContainerCommand                500
369 #define         ContainerCommand64              501
370 #define         ContainerRawIo                  502
371 #define         ContainerRawIo2                 503
372 /*
373  *      Scsi Port commands (scsi passthrough)
374  */
375 #define         ScsiPortCommand                 600
376 #define         ScsiPortCommand64               601
377 /*
378  *      Misc house keeping and generic adapter initiated commands
379  */
380 #define         AifRequest                      700
381 #define         CheckRevision                   701
382 #define         FsaHostShutdown                 702
383 #define         RequestAdapterInfo              703
384 #define         IsAdapterPaused                 704
385 #define         SendHostTime                    705
386 #define         RequestSupplementAdapterInfo    706
387 #define         LastMiscCommand                 707
388
389 /*
390  * Commands that will target the failover level on the FSA adapter
391  */
392
393 enum fib_xfer_state {
394         HostOwned                       = (1<<0),
395         AdapterOwned                    = (1<<1),
396         FibInitialized                  = (1<<2),
397         FibEmpty                        = (1<<3),
398         AllocatedFromPool               = (1<<4),
399         SentFromHost                    = (1<<5),
400         SentFromAdapter                 = (1<<6),
401         ResponseExpected                = (1<<7),
402         NoResponseExpected              = (1<<8),
403         AdapterProcessed                = (1<<9),
404         HostProcessed                   = (1<<10),
405         HighPriority                    = (1<<11),
406         NormalPriority                  = (1<<12),
407         Async                           = (1<<13),
408         AsyncIo                         = (1<<13),      // rpbfix: remove with new regime
409         PageFileIo                      = (1<<14),      // rpbfix: remove with new regime
410         ShutdownRequest                 = (1<<15),
411         LazyWrite                       = (1<<16),      // rpbfix: remove with new regime
412         AdapterMicroFib                 = (1<<17),
413         BIOSFibPath                     = (1<<18),
414         FastResponseCapable             = (1<<19),
415         ApiFib                          = (1<<20),      /* Its an API Fib */
416         /* PMC NEW COMM: There is no more AIF data pending */
417         NoMoreAifDataAvailable          = (1<<21)
418 };
419
420 /*
421  *      The following defines needs to be updated any time there is an
422  *      incompatible change made to the aac_init structure.
423  */
424
425 #define ADAPTER_INIT_STRUCT_REVISION            3
426 #define ADAPTER_INIT_STRUCT_REVISION_4          4 // rocket science
427 #define ADAPTER_INIT_STRUCT_REVISION_6          6 /* PMC src */
428 #define ADAPTER_INIT_STRUCT_REVISION_7          7 /* Denali */
429
430 struct aac_init
431 {
432         __le32  InitStructRevision;
433         __le32  MiniPortRevision;
434         __le32  fsrev;
435         __le32  CommHeaderAddress;
436         __le32  FastIoCommAreaAddress;
437         __le32  AdapterFibsPhysicalAddress;
438         __le32  AdapterFibsVirtualAddress;
439         __le32  AdapterFibsSize;
440         __le32  AdapterFibAlign;
441         __le32  printfbuf;
442         __le32  printfbufsiz;
443         __le32  HostPhysMemPages;   /* number of 4k pages of host
444                                        physical memory */
445         __le32  HostElapsedSeconds; /* number of seconds since 1970. */
446         /*
447          * ADAPTER_INIT_STRUCT_REVISION_4 begins here
448          */
449         __le32  InitFlags;      /* flags for supported features */
450 #define INITFLAGS_NEW_COMM_SUPPORTED    0x00000001
451 #define INITFLAGS_DRIVER_USES_UTC_TIME  0x00000010
452 #define INITFLAGS_DRIVER_SUPPORTS_PM    0x00000020
453 #define INITFLAGS_NEW_COMM_TYPE1_SUPPORTED      0x00000040
454 #define INITFLAGS_FAST_JBOD_SUPPORTED   0x00000080
455 #define INITFLAGS_NEW_COMM_TYPE2_SUPPORTED      0x00000100
456         __le32  MaxIoCommands;  /* max outstanding commands */
457         __le32  MaxIoSize;      /* largest I/O command */
458         __le32  MaxFibSize;     /* largest FIB to adapter */
459         /* ADAPTER_INIT_STRUCT_REVISION_5 begins here */
460         __le32  MaxNumAif;      /* max number of aif */
461         /* ADAPTER_INIT_STRUCT_REVISION_6 begins here */
462         __le32  HostRRQ_AddrLow;
463         __le32  HostRRQ_AddrHigh;       /* Host RRQ (response queue) for SRC */
464 };
465
466 enum aac_log_level {
467         LOG_AAC_INIT                    = 10,
468         LOG_AAC_INFORMATIONAL           = 20,
469         LOG_AAC_WARNING                 = 30,
470         LOG_AAC_LOW_ERROR               = 40,
471         LOG_AAC_MEDIUM_ERROR            = 50,
472         LOG_AAC_HIGH_ERROR              = 60,
473         LOG_AAC_PANIC                   = 70,
474         LOG_AAC_DEBUG                   = 80,
475         LOG_AAC_WINDBG_PRINT            = 90
476 };
477
478 #define FSAFS_NTC_GET_ADAPTER_FIB_CONTEXT       0x030b
479 #define FSAFS_NTC_FIB_CONTEXT                   0x030c
480
481 struct aac_dev;
482 struct fib;
483 struct scsi_cmnd;
484
485 struct adapter_ops
486 {
487         /* Low level operations */
488         void (*adapter_interrupt)(struct aac_dev *dev);
489         void (*adapter_notify)(struct aac_dev *dev, u32 event);
490         void (*adapter_disable_int)(struct aac_dev *dev);
491         void (*adapter_enable_int)(struct aac_dev *dev);
492         int  (*adapter_sync_cmd)(struct aac_dev *dev, u32 command, u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6, u32 *status, u32 *r1, u32 *r2, u32 *r3, u32 *r4);
493         int  (*adapter_check_health)(struct aac_dev *dev);
494         int  (*adapter_restart)(struct aac_dev *dev, int bled);
495         /* Transport operations */
496         int  (*adapter_ioremap)(struct aac_dev * dev, u32 size);
497         irq_handler_t adapter_intr;
498         /* Packet operations */
499         int  (*adapter_deliver)(struct fib * fib);
500         int  (*adapter_bounds)(struct aac_dev * dev, struct scsi_cmnd * cmd, u64 lba);
501         int  (*adapter_read)(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u32 count);
502         int  (*adapter_write)(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u32 count, int fua);
503         int  (*adapter_scsi)(struct fib * fib, struct scsi_cmnd * cmd);
504         /* Administrative operations */
505         int  (*adapter_comm)(struct aac_dev * dev, int comm);
506 };
507
508 /*
509  *      Define which interrupt handler needs to be installed
510  */
511
512 struct aac_driver_ident
513 {
514         int     (*init)(struct aac_dev *dev);
515         char *  name;
516         char *  vname;
517         char *  model;
518         u16     channels;
519         int     quirks;
520 };
521 /*
522  * Some adapter firmware needs communication memory
523  * below 2gig. This tells the init function to set the
524  * dma mask such that fib memory will be allocated where the
525  * adapter firmware can get to it.
526  */
527 #define AAC_QUIRK_31BIT 0x0001
528
529 /*
530  * Some adapter firmware, when the raid card's cache is turned off, can not
531  * split up scatter gathers in order to deal with the limits of the
532  * underlying CHIM. This limit is 34 scatter gather elements.
533  */
534 #define AAC_QUIRK_34SG  0x0002
535
536 /*
537  * This adapter is a slave (no Firmware)
538  */
539 #define AAC_QUIRK_SLAVE 0x0004
540
541 /*
542  * This adapter is a master.
543  */
544 #define AAC_QUIRK_MASTER 0x0008
545
546 /*
547  * Some adapter firmware perform poorly when it must split up scatter gathers
548  * in order to deal with the limits of the underlying CHIM. This limit in this
549  * class of adapters is 17 scatter gather elements.
550  */
551 #define AAC_QUIRK_17SG  0x0010
552
553 /*
554  *      Some adapter firmware does not support 64 bit scsi passthrough
555  * commands.
556  */
557 #define AAC_QUIRK_SCSI_32       0x0020
558
559 /*
560  *      The adapter interface specs all queues to be located in the same
561  *      physically contiguous block. The host structure that defines the
562  *      commuication queues will assume they are each a separate physically
563  *      contiguous memory region that will support them all being one big
564  *      contiguous block.
565  *      There is a command and response queue for each level and direction of
566  *      commuication. These regions are accessed by both the host and adapter.
567  */
568
569 struct aac_queue {
570         u64                     logical;        /*address we give the adapter */
571         struct aac_entry        *base;          /*system virtual address */
572         struct aac_qhdr         headers;        /*producer,consumer q headers*/
573         u32                     entries;        /*Number of queue entries */
574         wait_queue_head_t       qfull;          /*Event to wait on if q full */
575         wait_queue_head_t       cmdready;       /*Cmd ready from the adapter */
576                 /* This is only valid for adapter to host command queues. */
577         spinlock_t              *lock;          /* Spinlock for this queue must take this lock before accessing the lock */
578         spinlock_t              lockdata;       /* Actual lock (used only on one side of the lock) */
579         struct list_head        cmdq;           /* A queue of FIBs which need to be prcessed by the FS thread. This is */
580                                                 /* only valid for command queues which receive entries from the adapter. */
581         u32                     numpending;     /* Number of entries on outstanding queue. */
582         struct aac_dev *        dev;            /* Back pointer to adapter structure */
583 };
584
585 /*
586  *      Message queues. The order here is important, see also the
587  *      queue type ordering
588  */
589
590 struct aac_queue_block
591 {
592         struct aac_queue queue[8];
593 };
594
595 /*
596  *      SaP1 Message Unit Registers
597  */
598
599 struct sa_drawbridge_CSR {
600                                 /*      Offset  |  Name */
601         __le32  reserved[10];   /*      00h-27h |  Reserved */
602         u8      LUT_Offset;     /*      28h     |  Lookup Table Offset */
603         u8      reserved1[3];   /*      29h-2bh |  Reserved */
604         __le32  LUT_Data;       /*      2ch     |  Looup Table Data */
605         __le32  reserved2[26];  /*      30h-97h |  Reserved */
606         __le16  PRICLEARIRQ;    /*      98h     |  Primary Clear Irq */
607         __le16  SECCLEARIRQ;    /*      9ah     |  Secondary Clear Irq */
608         __le16  PRISETIRQ;      /*      9ch     |  Primary Set Irq */
609         __le16  SECSETIRQ;      /*      9eh     |  Secondary Set Irq */
610         __le16  PRICLEARIRQMASK;/*      a0h     |  Primary Clear Irq Mask */
611         __le16  SECCLEARIRQMASK;/*      a2h     |  Secondary Clear Irq Mask */
612         __le16  PRISETIRQMASK;  /*      a4h     |  Primary Set Irq Mask */
613         __le16  SECSETIRQMASK;  /*      a6h     |  Secondary Set Irq Mask */
614         __le32  MAILBOX0;       /*      a8h     |  Scratchpad 0 */
615         __le32  MAILBOX1;       /*      ach     |  Scratchpad 1 */
616         __le32  MAILBOX2;       /*      b0h     |  Scratchpad 2 */
617         __le32  MAILBOX3;       /*      b4h     |  Scratchpad 3 */
618         __le32  MAILBOX4;       /*      b8h     |  Scratchpad 4 */
619         __le32  MAILBOX5;       /*      bch     |  Scratchpad 5 */
620         __le32  MAILBOX6;       /*      c0h     |  Scratchpad 6 */
621         __le32  MAILBOX7;       /*      c4h     |  Scratchpad 7 */
622         __le32  ROM_Setup_Data; /*      c8h     |  Rom Setup and Data */
623         __le32  ROM_Control_Addr;/*     cch     |  Rom Control and Address */
624         __le32  reserved3[12];  /*      d0h-ffh |  reserved */
625         __le32  LUT[64];        /*    100h-1ffh |  Lookup Table Entries */
626 };
627
628 #define Mailbox0        SaDbCSR.MAILBOX0
629 #define Mailbox1        SaDbCSR.MAILBOX1
630 #define Mailbox2        SaDbCSR.MAILBOX2
631 #define Mailbox3        SaDbCSR.MAILBOX3
632 #define Mailbox4        SaDbCSR.MAILBOX4
633 #define Mailbox5        SaDbCSR.MAILBOX5
634 #define Mailbox6        SaDbCSR.MAILBOX6
635 #define Mailbox7        SaDbCSR.MAILBOX7
636
637 #define DoorbellReg_p SaDbCSR.PRISETIRQ
638 #define DoorbellReg_s SaDbCSR.SECSETIRQ
639 #define DoorbellClrReg_p SaDbCSR.PRICLEARIRQ
640
641
642 #define DOORBELL_0      0x0001
643 #define DOORBELL_1      0x0002
644 #define DOORBELL_2      0x0004
645 #define DOORBELL_3      0x0008
646 #define DOORBELL_4      0x0010
647 #define DOORBELL_5      0x0020
648 #define DOORBELL_6      0x0040
649
650
651 #define PrintfReady     DOORBELL_5
652 #define PrintfDone      DOORBELL_5
653
654 struct sa_registers {
655         struct sa_drawbridge_CSR        SaDbCSR;                        /* 98h - c4h */
656 };
657
658
659 #define Sa_MINIPORT_REVISION                    1
660
661 #define sa_readw(AEP, CSR)              readl(&((AEP)->regs.sa->CSR))
662 #define sa_readl(AEP, CSR)              readl(&((AEP)->regs.sa->CSR))
663 #define sa_writew(AEP, CSR, value)      writew(value, &((AEP)->regs.sa->CSR))
664 #define sa_writel(AEP, CSR, value)      writel(value, &((AEP)->regs.sa->CSR))
665
666 /*
667  *      Rx Message Unit Registers
668  */
669
670 struct rx_mu_registers {
671                             /*  Local  | PCI*| Name */
672         __le32  ARSR;       /*  1300h  | 00h | APIC Register Select Register */
673         __le32  reserved0;  /*  1304h  | 04h | Reserved */
674         __le32  AWR;        /*  1308h  | 08h | APIC Window Register */
675         __le32  reserved1;  /*  130Ch  | 0Ch | Reserved */
676         __le32  IMRx[2];    /*  1310h  | 10h | Inbound Message Registers */
677         __le32  OMRx[2];    /*  1318h  | 18h | Outbound Message Registers */
678         __le32  IDR;        /*  1320h  | 20h | Inbound Doorbell Register */
679         __le32  IISR;       /*  1324h  | 24h | Inbound Interrupt
680                                                 Status Register */
681         __le32  IIMR;       /*  1328h  | 28h | Inbound Interrupt
682                                                 Mask Register */
683         __le32  ODR;        /*  132Ch  | 2Ch | Outbound Doorbell Register */
684         __le32  OISR;       /*  1330h  | 30h | Outbound Interrupt
685                                                 Status Register */
686         __le32  OIMR;       /*  1334h  | 34h | Outbound Interrupt
687                                                 Mask Register */
688         __le32  reserved2;  /*  1338h  | 38h | Reserved */
689         __le32  reserved3;  /*  133Ch  | 3Ch | Reserved */
690         __le32  InboundQueue;/* 1340h  | 40h | Inbound Queue Port relative to firmware */
691         __le32  OutboundQueue;/*1344h  | 44h | Outbound Queue Port relative to firmware */
692                             /* * Must access through ATU Inbound
693                                  Translation Window */
694 };
695
696 struct rx_inbound {
697         __le32  Mailbox[8];
698 };
699
700 #define INBOUNDDOORBELL_0       0x00000001
701 #define INBOUNDDOORBELL_1       0x00000002
702 #define INBOUNDDOORBELL_2       0x00000004
703 #define INBOUNDDOORBELL_3       0x00000008
704 #define INBOUNDDOORBELL_4       0x00000010
705 #define INBOUNDDOORBELL_5       0x00000020
706 #define INBOUNDDOORBELL_6       0x00000040
707
708 #define OUTBOUNDDOORBELL_0      0x00000001
709 #define OUTBOUNDDOORBELL_1      0x00000002
710 #define OUTBOUNDDOORBELL_2      0x00000004
711 #define OUTBOUNDDOORBELL_3      0x00000008
712 #define OUTBOUNDDOORBELL_4      0x00000010
713
714 #define InboundDoorbellReg      MUnit.IDR
715 #define OutboundDoorbellReg     MUnit.ODR
716
717 struct rx_registers {
718         struct rx_mu_registers          MUnit;          /* 1300h - 1347h */
719         __le32                          reserved1[2];   /* 1348h - 134ch */
720         struct rx_inbound               IndexRegs;
721 };
722
723 #define rx_readb(AEP, CSR)              readb(&((AEP)->regs.rx->CSR))
724 #define rx_readl(AEP, CSR)              readl(&((AEP)->regs.rx->CSR))
725 #define rx_writeb(AEP, CSR, value)      writeb(value, &((AEP)->regs.rx->CSR))
726 #define rx_writel(AEP, CSR, value)      writel(value, &((AEP)->regs.rx->CSR))
727
728 /*
729  *      Rkt Message Unit Registers (same as Rx, except a larger reserve region)
730  */
731
732 #define rkt_mu_registers rx_mu_registers
733 #define rkt_inbound rx_inbound
734
735 struct rkt_registers {
736         struct rkt_mu_registers         MUnit;           /* 1300h - 1347h */
737         __le32                          reserved1[1006]; /* 1348h - 22fch */
738         struct rkt_inbound              IndexRegs;       /* 2300h - */
739 };
740
741 #define rkt_readb(AEP, CSR)             readb(&((AEP)->regs.rkt->CSR))
742 #define rkt_readl(AEP, CSR)             readl(&((AEP)->regs.rkt->CSR))
743 #define rkt_writeb(AEP, CSR, value)     writeb(value, &((AEP)->regs.rkt->CSR))
744 #define rkt_writel(AEP, CSR, value)     writel(value, &((AEP)->regs.rkt->CSR))
745
746 /*
747  * PMC SRC message unit registers
748  */
749
750 #define src_inbound rx_inbound
751
752 struct src_mu_registers {
753                                 /*      PCI*| Name */
754         __le32  reserved0[8];   /*      00h | Reserved */
755         __le32  IDR;            /*      20h | Inbound Doorbell Register */
756         __le32  IISR;           /*      24h | Inbound Int. Status Register */
757         __le32  reserved1[3];   /*      28h | Reserved */
758         __le32  OIMR;           /*      34h | Outbound Int. Mask Register */
759         __le32  reserved2[25];  /*      38h | Reserved */
760         __le32  ODR_R;          /*      9ch | Outbound Doorbell Read */
761         __le32  ODR_C;          /*      a0h | Outbound Doorbell Clear */
762         __le32  reserved3[6];   /*      a4h | Reserved */
763         __le32  OMR;            /*      bch | Outbound Message Register */
764         __le32  IQ_L;           /*  c0h | Inbound Queue (Low address) */
765         __le32  IQ_H;           /*  c4h | Inbound Queue (High address) */
766 };
767
768 struct src_registers {
769         struct src_mu_registers MUnit;  /* 00h - c7h */
770         union {
771                 struct {
772                         __le32 reserved1[130790];       /* c8h - 7fc5fh */
773                         struct src_inbound IndexRegs;   /* 7fc60h */
774                 } tupelo;
775                 struct {
776                         __le32 reserved1[974];          /* c8h - fffh */
777                         struct src_inbound IndexRegs;   /* 1000h */
778                 } denali;
779         } u;
780 };
781
782 #define src_readb(AEP, CSR)             readb(&((AEP)->regs.src.bar0->CSR))
783 #define src_readl(AEP, CSR)             readl(&((AEP)->regs.src.bar0->CSR))
784 #define src_writeb(AEP, CSR, value)     writeb(value, \
785                                                 &((AEP)->regs.src.bar0->CSR))
786 #define src_writel(AEP, CSR, value)     writel(value, \
787                                                 &((AEP)->regs.src.bar0->CSR))
788
789 #define SRC_ODR_SHIFT           12
790 #define SRC_IDR_SHIFT           9
791
792 typedef void (*fib_callback)(void *ctxt, struct fib *fibctx);
793
794 struct aac_fib_context {
795         s16                     type;           // used for verification of structure
796         s16                     size;
797         u32                     unique;         // unique value representing this context
798         ulong                   jiffies;        // used for cleanup - dmb changed to ulong
799         struct list_head        next;           // used to link context's into a linked list
800         struct semaphore        wait_sem;       // this is used to wait for the next fib to arrive.
801         int                     wait;           // Set to true when thread is in WaitForSingleObject
802         unsigned long           count;          // total number of FIBs on FibList
803         struct list_head        fib_list;       // this holds fibs and their attachd hw_fibs
804 };
805
806 struct sense_data {
807         u8 error_code;          /* 70h (current errors), 71h(deferred errors) */
808         u8 valid:1;             /* A valid bit of one indicates that the information  */
809                                 /* field contains valid information as defined in the
810                                  * SCSI-2 Standard.
811                                  */
812         u8 segment_number;      /* Only used for COPY, COMPARE, or COPY AND VERIFY Commands */
813         u8 sense_key:4;         /* Sense Key */
814         u8 reserved:1;
815         u8 ILI:1;               /* Incorrect Length Indicator */
816         u8 EOM:1;               /* End Of Medium - reserved for random access devices */
817         u8 filemark:1;          /* Filemark - reserved for random access devices */
818
819         u8 information[4];      /* for direct-access devices, contains the unsigned
820                                  * logical block address or residue associated with
821                                  * the sense key
822                                  */
823         u8 add_sense_len;       /* number of additional sense bytes to follow this field */
824         u8 cmnd_info[4];        /* not used */
825         u8 ASC;                 /* Additional Sense Code */
826         u8 ASCQ;                /* Additional Sense Code Qualifier */
827         u8 FRUC;                /* Field Replaceable Unit Code - not used */
828         u8 bit_ptr:3;           /* indicates which byte of the CDB or parameter data
829                                  * was in error
830                                  */
831         u8 BPV:1;               /* bit pointer valid (BPV): 1- indicates that
832                                  * the bit_ptr field has valid value
833                                  */
834         u8 reserved2:2;
835         u8 CD:1;                /* command data bit: 1- illegal parameter in CDB.
836                                  * 0- illegal parameter in data.
837                                  */
838         u8 SKSV:1;
839         u8 field_ptr[2];        /* byte of the CDB or parameter data in error */
840 };
841
842 struct fsa_dev_info {
843         u64             last;
844         u64             size;
845         u32             type;
846         u32             config_waiting_on;
847         unsigned long   config_waiting_stamp;
848         u16             queue_depth;
849         u8              config_needed;
850         u8              valid;
851         u8              ro;
852         u8              locked;
853         u8              deleted;
854         char            devname[8];
855         struct sense_data sense_data;
856 };
857
858 struct fib {
859         void                    *next;  /* this is used by the allocator */
860         s16                     type;
861         s16                     size;
862         /*
863          *      The Adapter that this I/O is destined for.
864          */
865         struct aac_dev          *dev;
866         /*
867          *      This is the event the sendfib routine will wait on if the
868          *      caller did not pass one and this is synch io.
869          */
870         struct semaphore        event_wait;
871         spinlock_t              event_lock;
872
873         u32                     done;   /* gets set to 1 when fib is complete */
874         fib_callback            callback;
875         void                    *callback_data;
876         u32                     flags; // u32 dmb was ulong
877         /*
878          *      And for the internal issue/reply queues (we may be able
879          *      to merge these two)
880          */
881         struct list_head        fiblink;
882         void                    *data;
883         struct hw_fib           *hw_fib_va;             /* Actual shared object */
884         dma_addr_t              hw_fib_pa;              /* physical address of hw_fib*/
885 };
886
887 /*
888  *      Adapter Information Block
889  *
890  *      This is returned by the RequestAdapterInfo block
891  */
892
893 struct aac_adapter_info
894 {
895         __le32  platform;
896         __le32  cpu;
897         __le32  subcpu;
898         __le32  clock;
899         __le32  execmem;
900         __le32  buffermem;
901         __le32  totalmem;
902         __le32  kernelrev;
903         __le32  kernelbuild;
904         __le32  monitorrev;
905         __le32  monitorbuild;
906         __le32  hwrev;
907         __le32  hwbuild;
908         __le32  biosrev;
909         __le32  biosbuild;
910         __le32  cluster;
911         __le32  clusterchannelmask;
912         __le32  serial[2];
913         __le32  battery;
914         __le32  options;
915         __le32  OEM;
916 };
917
918 struct aac_supplement_adapter_info
919 {
920         u8      AdapterTypeText[17+1];
921         u8      Pad[2];
922         __le32  FlashMemoryByteSize;
923         __le32  FlashImageId;
924         __le32  MaxNumberPorts;
925         __le32  Version;
926         __le32  FeatureBits;
927         u8      SlotNumber;
928         u8      ReservedPad0[3];
929         u8      BuildDate[12];
930         __le32  CurrentNumberPorts;
931         struct {
932                 u8      AssemblyPn[8];
933                 u8      FruPn[8];
934                 u8      BatteryFruPn[8];
935                 u8      EcVersionString[8];
936                 u8      Tsid[12];
937         }       VpdInfo;
938         __le32  FlashFirmwareRevision;
939         __le32  FlashFirmwareBuild;
940         __le32  RaidTypeMorphOptions;
941         __le32  FlashFirmwareBootRevision;
942         __le32  FlashFirmwareBootBuild;
943         u8      MfgPcbaSerialNo[12];
944         u8      MfgWWNName[8];
945         __le32  SupportedOptions2;
946         __le32  StructExpansion;
947         /* StructExpansion == 1 */
948         __le32  FeatureBits3;
949         __le32  SupportedPerformanceModes;
950         __le32  ReservedForFutureGrowth[80];
951 };
952 #define AAC_FEATURE_FALCON      cpu_to_le32(0x00000010)
953 #define AAC_FEATURE_JBOD        cpu_to_le32(0x08000000)
954 /* SupportedOptions2 */
955 #define AAC_OPTION_MU_RESET             cpu_to_le32(0x00000001)
956 #define AAC_OPTION_IGNORE_RESET         cpu_to_le32(0x00000002)
957 #define AAC_OPTION_POWER_MANAGEMENT     cpu_to_le32(0x00000004)
958 #define AAC_OPTION_DOORBELL_RESET       cpu_to_le32(0x00004000)
959 #define AAC_SIS_VERSION_V3      3
960 #define AAC_SIS_SLOT_UNKNOWN    0xFF
961
962 #define GetBusInfo 0x00000009
963 struct aac_bus_info {
964         __le32  Command;        /* VM_Ioctl */
965         __le32  ObjType;        /* FT_DRIVE */
966         __le32  MethodId;       /* 1 = SCSI Layer */
967         __le32  ObjectId;       /* Handle */
968         __le32  CtlCmd;         /* GetBusInfo */
969 };
970
971 struct aac_bus_info_response {
972         __le32  Status;         /* ST_OK */
973         __le32  ObjType;
974         __le32  MethodId;       /* unused */
975         __le32  ObjectId;       /* unused */
976         __le32  CtlCmd;         /* unused */
977         __le32  ProbeComplete;
978         __le32  BusCount;
979         __le32  TargetsPerBus;
980         u8      InitiatorBusId[10];
981         u8      BusValid[10];
982 };
983
984 /*
985  * Battery platforms
986  */
987 #define AAC_BAT_REQ_PRESENT     (1)
988 #define AAC_BAT_REQ_NOTPRESENT  (2)
989 #define AAC_BAT_OPT_PRESENT     (3)
990 #define AAC_BAT_OPT_NOTPRESENT  (4)
991 #define AAC_BAT_NOT_SUPPORTED   (5)
992 /*
993  * cpu types
994  */
995 #define AAC_CPU_SIMULATOR       (1)
996 #define AAC_CPU_I960            (2)
997 #define AAC_CPU_STRONGARM       (3)
998
999 /*
1000  * Supported Options
1001  */
1002 #define AAC_OPT_SNAPSHOT                cpu_to_le32(1)
1003 #define AAC_OPT_CLUSTERS                cpu_to_le32(1<<1)
1004 #define AAC_OPT_WRITE_CACHE             cpu_to_le32(1<<2)
1005 #define AAC_OPT_64BIT_DATA              cpu_to_le32(1<<3)
1006 #define AAC_OPT_HOST_TIME_FIB           cpu_to_le32(1<<4)
1007 #define AAC_OPT_RAID50                  cpu_to_le32(1<<5)
1008 #define AAC_OPT_4GB_WINDOW              cpu_to_le32(1<<6)
1009 #define AAC_OPT_SCSI_UPGRADEABLE        cpu_to_le32(1<<7)
1010 #define AAC_OPT_SOFT_ERR_REPORT         cpu_to_le32(1<<8)
1011 #define AAC_OPT_SUPPORTED_RECONDITION   cpu_to_le32(1<<9)
1012 #define AAC_OPT_SGMAP_HOST64            cpu_to_le32(1<<10)
1013 #define AAC_OPT_ALARM                   cpu_to_le32(1<<11)
1014 #define AAC_OPT_NONDASD                 cpu_to_le32(1<<12)
1015 #define AAC_OPT_SCSI_MANAGED            cpu_to_le32(1<<13)
1016 #define AAC_OPT_RAID_SCSI_MODE          cpu_to_le32(1<<14)
1017 #define AAC_OPT_SUPPLEMENT_ADAPTER_INFO cpu_to_le32(1<<16)
1018 #define AAC_OPT_NEW_COMM                cpu_to_le32(1<<17)
1019 #define AAC_OPT_NEW_COMM_64             cpu_to_le32(1<<18)
1020 #define AAC_OPT_NEW_COMM_TYPE1          cpu_to_le32(1<<28)
1021 #define AAC_OPT_NEW_COMM_TYPE2          cpu_to_le32(1<<29)
1022 #define AAC_OPT_NEW_COMM_TYPE3          cpu_to_le32(1<<30)
1023 #define AAC_OPT_NEW_COMM_TYPE4          cpu_to_le32(1<<31)
1024
1025
1026 struct aac_dev
1027 {
1028         struct list_head        entry;
1029         const char              *name;
1030         int                     id;
1031
1032         /*
1033          *      negotiated FIB settings
1034          */
1035         unsigned                max_fib_size;
1036         unsigned                sg_tablesize;
1037         unsigned                max_num_aif;
1038
1039         /*
1040          *      Map for 128 fib objects (64k)
1041          */
1042         dma_addr_t              hw_fib_pa;
1043         struct hw_fib           *hw_fib_va;
1044         struct hw_fib           *aif_base_va;
1045         /*
1046          *      Fib Headers
1047          */
1048         struct fib              *fibs;
1049
1050         struct fib              *free_fib;
1051         spinlock_t              fib_lock;
1052
1053         struct aac_queue_block *queues;
1054         /*
1055          *      The user API will use an IOCTL to register itself to receive
1056          *      FIBs from the adapter.  The following list is used to keep
1057          *      track of all the threads that have requested these FIBs.  The
1058          *      mutex is used to synchronize access to all data associated
1059          *      with the adapter fibs.
1060          */
1061         struct list_head        fib_list;
1062
1063         struct adapter_ops      a_ops;
1064         unsigned long           fsrev;          /* Main driver's revision number */
1065
1066         resource_size_t         base_start;     /* main IO base */
1067         resource_size_t         dbg_base;       /* address of UART
1068                                                  * debug buffer */
1069
1070         resource_size_t         base_size, dbg_size;    /* Size of
1071                                                          *  mapped in region */
1072
1073         struct aac_init         *init;          /* Holds initialization info to communicate with adapter */
1074         dma_addr_t              init_pa;        /* Holds physical address of the init struct */
1075
1076         u32                     *host_rrq;      /* response queue
1077                                                  * if AAC_COMM_MESSAGE_TYPE1 */
1078
1079         dma_addr_t              host_rrq_pa;    /* phys. address */
1080         u32                     host_rrq_idx;   /* index into rrq buffer */
1081
1082         struct pci_dev          *pdev;          /* Our PCI interface */
1083         void *                  printfbuf;      /* pointer to buffer used for printf's from the adapter */
1084         void *                  comm_addr;      /* Base address of Comm area */
1085         dma_addr_t              comm_phys;      /* Physical Address of Comm area */
1086         size_t                  comm_size;
1087
1088         struct Scsi_Host        *scsi_host_ptr;
1089         int                     maximum_num_containers;
1090         int                     maximum_num_physicals;
1091         int                     maximum_num_channels;
1092         struct fsa_dev_info     *fsa_dev;
1093         struct task_struct      *thread;
1094         int                     cardtype;
1095
1096         /*
1097          *      The following is the device specific extension.
1098          */
1099 #ifndef AAC_MIN_FOOTPRINT_SIZE
1100 #       define AAC_MIN_FOOTPRINT_SIZE 8192
1101 #       define AAC_MIN_SRC_BAR0_SIZE 0x400000
1102 #       define AAC_MIN_SRC_BAR1_SIZE 0x800
1103 #       define AAC_MIN_SRCV_BAR0_SIZE 0x100000
1104 #       define AAC_MIN_SRCV_BAR1_SIZE 0x400
1105 #endif
1106         union
1107         {
1108                 struct sa_registers __iomem *sa;
1109                 struct rx_registers __iomem *rx;
1110                 struct rkt_registers __iomem *rkt;
1111                 struct {
1112                         struct src_registers __iomem *bar0;
1113                         char __iomem *bar1;
1114                 } src;
1115         } regs;
1116         volatile void __iomem *base, *dbg_base_mapped;
1117         volatile struct rx_inbound __iomem *IndexRegs;
1118         u32                     OIMR; /* Mask Register Cache */
1119         /*
1120          *      AIF thread states
1121          */
1122         u32                     aif_thread;
1123         struct aac_adapter_info adapter_info;
1124         struct aac_supplement_adapter_info supplement_adapter_info;
1125         /* These are in adapter info but they are in the io flow so
1126          * lets break them out so we don't have to do an AND to check them
1127          */
1128         u8                      nondasd_support;
1129         u8                      jbod;
1130         u8                      cache_protected;
1131         u8                      dac_support;
1132         u8                      needs_dac;
1133         u8                      raid_scsi_mode;
1134         u8                      comm_interface;
1135 #       define AAC_COMM_PRODUCER 0
1136 #       define AAC_COMM_MESSAGE  1
1137 #       define AAC_COMM_MESSAGE_TYPE1   3
1138 #       define AAC_COMM_MESSAGE_TYPE2   4
1139         u8                      raw_io_interface;
1140         u8                      raw_io_64;
1141         u8                      printf_enabled;
1142         u8                      in_reset;
1143         u8                      msi;
1144         int                     management_fib_count;
1145         spinlock_t              manage_lock;
1146         spinlock_t              sync_lock;
1147         int                     sync_mode;
1148         struct fib              *sync_fib;
1149         struct list_head        sync_fib_list;
1150 };
1151
1152 #define aac_adapter_interrupt(dev) \
1153         (dev)->a_ops.adapter_interrupt(dev)
1154
1155 #define aac_adapter_notify(dev, event) \
1156         (dev)->a_ops.adapter_notify(dev, event)
1157
1158 #define aac_adapter_disable_int(dev) \
1159         (dev)->a_ops.adapter_disable_int(dev)
1160
1161 #define aac_adapter_enable_int(dev) \
1162         (dev)->a_ops.adapter_enable_int(dev)
1163
1164 #define aac_adapter_sync_cmd(dev, command, p1, p2, p3, p4, p5, p6, status, r1, r2, r3, r4) \
1165         (dev)->a_ops.adapter_sync_cmd(dev, command, p1, p2, p3, p4, p5, p6, status, r1, r2, r3, r4)
1166
1167 #define aac_adapter_check_health(dev) \
1168         (dev)->a_ops.adapter_check_health(dev)
1169
1170 #define aac_adapter_restart(dev,bled) \
1171         (dev)->a_ops.adapter_restart(dev,bled)
1172
1173 #define aac_adapter_ioremap(dev, size) \
1174         (dev)->a_ops.adapter_ioremap(dev, size)
1175
1176 #define aac_adapter_deliver(fib) \
1177         ((fib)->dev)->a_ops.adapter_deliver(fib)
1178
1179 #define aac_adapter_bounds(dev,cmd,lba) \
1180         dev->a_ops.adapter_bounds(dev,cmd,lba)
1181
1182 #define aac_adapter_read(fib,cmd,lba,count) \
1183         ((fib)->dev)->a_ops.adapter_read(fib,cmd,lba,count)
1184
1185 #define aac_adapter_write(fib,cmd,lba,count,fua) \
1186         ((fib)->dev)->a_ops.adapter_write(fib,cmd,lba,count,fua)
1187
1188 #define aac_adapter_scsi(fib,cmd) \
1189         ((fib)->dev)->a_ops.adapter_scsi(fib,cmd)
1190
1191 #define aac_adapter_comm(dev,comm) \
1192         (dev)->a_ops.adapter_comm(dev, comm)
1193
1194 #define FIB_CONTEXT_FLAG_TIMED_OUT              (0x00000001)
1195 #define FIB_CONTEXT_FLAG                        (0x00000002)
1196 #define FIB_CONTEXT_FLAG_WAIT                   (0x00000004)
1197 #define FIB_CONTEXT_FLAG_FASTRESP               (0x00000008)
1198
1199 /*
1200  *      Define the command values
1201  */
1202
1203 #define         Null                    0
1204 #define         GetAttributes           1
1205 #define         SetAttributes           2
1206 #define         Lookup                  3
1207 #define         ReadLink                4
1208 #define         Read                    5
1209 #define         Write                   6
1210 #define         Create                  7
1211 #define         MakeDirectory           8
1212 #define         SymbolicLink            9
1213 #define         MakeNode                10
1214 #define         Removex                 11
1215 #define         RemoveDirectoryx        12
1216 #define         Rename                  13
1217 #define         Link                    14
1218 #define         ReadDirectory           15
1219 #define         ReadDirectoryPlus       16
1220 #define         FileSystemStatus        17
1221 #define         FileSystemInfo          18
1222 #define         PathConfigure           19
1223 #define         Commit                  20
1224 #define         Mount                   21
1225 #define         UnMount                 22
1226 #define         Newfs                   23
1227 #define         FsCheck                 24
1228 #define         FsSync                  25
1229 #define         SimReadWrite            26
1230 #define         SetFileSystemStatus     27
1231 #define         BlockRead               28
1232 #define         BlockWrite              29
1233 #define         NvramIoctl              30
1234 #define         FsSyncWait              31
1235 #define         ClearArchiveBit         32
1236 #define         SetAcl                  33
1237 #define         GetAcl                  34
1238 #define         AssignAcl               35
1239 #define         FaultInsertion          36      /* Fault Insertion Command */
1240 #define         CrazyCache              37      /* Crazycache */
1241
1242 #define         MAX_FSACOMMAND_NUM      38
1243
1244
1245 /*
1246  *      Define the status returns. These are very unixlike although
1247  *      most are not in fact used
1248  */
1249
1250 #define         ST_OK           0
1251 #define         ST_PERM         1
1252 #define         ST_NOENT        2
1253 #define         ST_IO           5
1254 #define         ST_NXIO         6
1255 #define         ST_E2BIG        7
1256 #define         ST_ACCES        13
1257 #define         ST_EXIST        17
1258 #define         ST_XDEV         18
1259 #define         ST_NODEV        19
1260 #define         ST_NOTDIR       20
1261 #define         ST_ISDIR        21
1262 #define         ST_INVAL        22
1263 #define         ST_FBIG         27
1264 #define         ST_NOSPC        28
1265 #define         ST_ROFS         30
1266 #define         ST_MLINK        31
1267 #define         ST_WOULDBLOCK   35
1268 #define         ST_NAMETOOLONG  63
1269 #define         ST_NOTEMPTY     66
1270 #define         ST_DQUOT        69
1271 #define         ST_STALE        70
1272 #define         ST_REMOTE       71
1273 #define         ST_NOT_READY    72
1274 #define         ST_BADHANDLE    10001
1275 #define         ST_NOT_SYNC     10002
1276 #define         ST_BAD_COOKIE   10003
1277 #define         ST_NOTSUPP      10004
1278 #define         ST_TOOSMALL     10005
1279 #define         ST_SERVERFAULT  10006
1280 #define         ST_BADTYPE      10007
1281 #define         ST_JUKEBOX      10008
1282 #define         ST_NOTMOUNTED   10009
1283 #define         ST_MAINTMODE    10010
1284 #define         ST_STALEACL     10011
1285
1286 /*
1287  *      On writes how does the client want the data written.
1288  */
1289
1290 #define CACHE_CSTABLE           1
1291 #define CACHE_UNSTABLE          2
1292
1293 /*
1294  *      Lets the client know at which level the data was committed on
1295  *      a write request
1296  */
1297
1298 #define CMFILE_SYNCH_NVRAM      1
1299 #define CMDATA_SYNCH_NVRAM      2
1300 #define CMFILE_SYNCH            3
1301 #define CMDATA_SYNCH            4
1302 #define CMUNSTABLE              5
1303
1304 #define RIO_TYPE_WRITE                  0x0000
1305 #define RIO_TYPE_READ                   0x0001
1306 #define RIO_SUREWRITE                   0x0008
1307
1308 #define RIO2_IO_TYPE                    0x0003
1309 #define RIO2_IO_TYPE_WRITE              0x0000
1310 #define RIO2_IO_TYPE_READ               0x0001
1311 #define RIO2_IO_TYPE_VERIFY             0x0002
1312 #define RIO2_IO_ERROR                   0x0004
1313 #define RIO2_IO_SUREWRITE               0x0008
1314 #define RIO2_SGL_CONFORMANT             0x0010
1315 #define RIO2_SG_FORMAT                  0xF000
1316 #define RIO2_SG_FORMAT_ARC              0x0000
1317 #define RIO2_SG_FORMAT_SRL              0x1000
1318 #define RIO2_SG_FORMAT_IEEE1212         0x2000
1319
1320 struct aac_read
1321 {
1322         __le32          command;
1323         __le32          cid;
1324         __le32          block;
1325         __le32          count;
1326         struct sgmap    sg;     // Must be last in struct because it is variable
1327 };
1328
1329 struct aac_read64
1330 {
1331         __le32          command;
1332         __le16          cid;
1333         __le16          sector_count;
1334         __le32          block;
1335         __le16          pad;
1336         __le16          flags;
1337         struct sgmap64  sg;     // Must be last in struct because it is variable
1338 };
1339
1340 struct aac_read_reply
1341 {
1342         __le32          status;
1343         __le32          count;
1344 };
1345
1346 struct aac_write
1347 {
1348         __le32          command;
1349         __le32          cid;
1350         __le32          block;
1351         __le32          count;
1352         __le32          stable; // Not used
1353         struct sgmap    sg;     // Must be last in struct because it is variable
1354 };
1355
1356 struct aac_write64
1357 {
1358         __le32          command;
1359         __le16          cid;
1360         __le16          sector_count;
1361         __le32          block;
1362         __le16          pad;
1363         __le16          flags;
1364         struct sgmap64  sg;     // Must be last in struct because it is variable
1365 };
1366 struct aac_write_reply
1367 {
1368         __le32          status;
1369         __le32          count;
1370         __le32          committed;
1371 };
1372
1373 struct aac_raw_io
1374 {
1375         __le32          block[2];
1376         __le32          count;
1377         __le16          cid;
1378         __le16          flags;          /* 00 W, 01 R */
1379         __le16          bpTotal;        /* reserved for F/W use */
1380         __le16          bpComplete;     /* reserved for F/W use */
1381         struct sgmapraw sg;
1382 };
1383
1384 struct aac_raw_io2 {
1385         __le32          blockLow;
1386         __le32          blockHigh;
1387         __le32          byteCount;
1388         __le16          cid;
1389         __le16          flags;          /* RIO2 flags */
1390         __le32          sgeFirstSize;   /* size of first sge el. */
1391         __le32          sgeNominalSize; /* size of 2nd sge el. (if conformant) */
1392         u8              sgeCnt;         /* only 8 bits required */
1393         u8              bpTotal;        /* reserved for F/W use */
1394         u8              bpComplete;     /* reserved for F/W use */
1395         u8              sgeFirstIndex;  /* reserved for F/W use */
1396         u8              unused[4];
1397         struct sge_ieee1212     sge[1];
1398 };
1399
1400 #define CT_FLUSH_CACHE 129
1401 struct aac_synchronize {
1402         __le32          command;        /* VM_ContainerConfig */
1403         __le32          type;           /* CT_FLUSH_CACHE */
1404         __le32          cid;
1405         __le32          parm1;
1406         __le32          parm2;
1407         __le32          parm3;
1408         __le32          parm4;
1409         __le32          count;  /* sizeof(((struct aac_synchronize_reply *)NULL)->data) */
1410 };
1411
1412 struct aac_synchronize_reply {
1413         __le32          dummy0;
1414         __le32          dummy1;
1415         __le32          status; /* CT_OK */
1416         __le32          parm1;
1417         __le32          parm2;
1418         __le32          parm3;
1419         __le32          parm4;
1420         __le32          parm5;
1421         u8              data[16];
1422 };
1423
1424 #define CT_POWER_MANAGEMENT     245
1425 #define CT_PM_START_UNIT        2
1426 #define CT_PM_STOP_UNIT         3
1427 #define CT_PM_UNIT_IMMEDIATE    1
1428 struct aac_power_management {
1429         __le32          command;        /* VM_ContainerConfig */
1430         __le32          type;           /* CT_POWER_MANAGEMENT */
1431         __le32          sub;            /* CT_PM_* */
1432         __le32          cid;
1433         __le32          parm;           /* CT_PM_sub_* */
1434 };
1435
1436 #define CT_PAUSE_IO    65
1437 #define CT_RELEASE_IO  66
1438 struct aac_pause {
1439         __le32          command;        /* VM_ContainerConfig */
1440         __le32          type;           /* CT_PAUSE_IO */
1441         __le32          timeout;        /* 10ms ticks */
1442         __le32          min;
1443         __le32          noRescan;
1444         __le32          parm3;
1445         __le32          parm4;
1446         __le32          count;  /* sizeof(((struct aac_pause_reply *)NULL)->data) */
1447 };
1448
1449 struct aac_srb
1450 {
1451         __le32          function;
1452         __le32          channel;
1453         __le32          id;
1454         __le32          lun;
1455         __le32          timeout;
1456         __le32          flags;
1457         __le32          count;          // Data xfer size
1458         __le32          retry_limit;
1459         __le32          cdb_size;
1460         u8              cdb[16];
1461         struct  sgmap   sg;
1462 };
1463
1464 /*
1465  * This and associated data structs are used by the
1466  * ioctl caller and are in cpu order.
1467  */
1468 struct user_aac_srb
1469 {
1470         u32             function;
1471         u32             channel;
1472         u32             id;
1473         u32             lun;
1474         u32             timeout;
1475         u32             flags;
1476         u32             count;          // Data xfer size
1477         u32             retry_limit;
1478         u32             cdb_size;
1479         u8              cdb[16];
1480         struct  user_sgmap      sg;
1481 };
1482
1483 #define         AAC_SENSE_BUFFERSIZE     30
1484
1485 struct aac_srb_reply
1486 {
1487         __le32          status;
1488         __le32          srb_status;
1489         __le32          scsi_status;
1490         __le32          data_xfer_length;
1491         __le32          sense_data_size;
1492         u8              sense_data[AAC_SENSE_BUFFERSIZE]; // Can this be SCSI_SENSE_BUFFERSIZE
1493 };
1494 /*
1495  * SRB Flags
1496  */
1497 #define         SRB_NoDataXfer           0x0000
1498 #define         SRB_DisableDisconnect    0x0004
1499 #define         SRB_DisableSynchTransfer 0x0008
1500 #define         SRB_BypassFrozenQueue    0x0010
1501 #define         SRB_DisableAutosense     0x0020
1502 #define         SRB_DataIn               0x0040
1503 #define         SRB_DataOut              0x0080
1504
1505 /*
1506  * SRB Functions - set in aac_srb->function
1507  */
1508 #define SRBF_ExecuteScsi        0x0000
1509 #define SRBF_ClaimDevice        0x0001
1510 #define SRBF_IO_Control         0x0002
1511 #define SRBF_ReceiveEvent       0x0003
1512 #define SRBF_ReleaseQueue       0x0004
1513 #define SRBF_AttachDevice       0x0005
1514 #define SRBF_ReleaseDevice      0x0006
1515 #define SRBF_Shutdown           0x0007
1516 #define SRBF_Flush              0x0008
1517 #define SRBF_AbortCommand       0x0010
1518 #define SRBF_ReleaseRecovery    0x0011
1519 #define SRBF_ResetBus           0x0012
1520 #define SRBF_ResetDevice        0x0013
1521 #define SRBF_TerminateIO        0x0014
1522 #define SRBF_FlushQueue         0x0015
1523 #define SRBF_RemoveDevice       0x0016
1524 #define SRBF_DomainValidation   0x0017
1525
1526 /*
1527  * SRB SCSI Status - set in aac_srb->scsi_status
1528  */
1529 #define SRB_STATUS_PENDING                  0x00
1530 #define SRB_STATUS_SUCCESS                  0x01
1531 #define SRB_STATUS_ABORTED                  0x02
1532 #define SRB_STATUS_ABORT_FAILED             0x03
1533 #define SRB_STATUS_ERROR                    0x04
1534 #define SRB_STATUS_BUSY                     0x05
1535 #define SRB_STATUS_INVALID_REQUEST          0x06
1536 #define SRB_STATUS_INVALID_PATH_ID          0x07
1537 #define SRB_STATUS_NO_DEVICE                0x08
1538 #define SRB_STATUS_TIMEOUT                  0x09
1539 #define SRB_STATUS_SELECTION_TIMEOUT        0x0A
1540 #define SRB_STATUS_COMMAND_TIMEOUT          0x0B
1541 #define SRB_STATUS_MESSAGE_REJECTED         0x0D
1542 #define SRB_STATUS_BUS_RESET                0x0E
1543 #define SRB_STATUS_PARITY_ERROR             0x0F
1544 #define SRB_STATUS_REQUEST_SENSE_FAILED     0x10
1545 #define SRB_STATUS_NO_HBA                   0x11
1546 #define SRB_STATUS_DATA_OVERRUN             0x12
1547 #define SRB_STATUS_UNEXPECTED_BUS_FREE      0x13
1548 #define SRB_STATUS_PHASE_SEQUENCE_FAILURE   0x14
1549 #define SRB_STATUS_BAD_SRB_BLOCK_LENGTH     0x15
1550 #define SRB_STATUS_REQUEST_FLUSHED          0x16
1551 #define SRB_STATUS_DELAYED_RETRY            0x17
1552 #define SRB_STATUS_INVALID_LUN              0x20
1553 #define SRB_STATUS_INVALID_TARGET_ID        0x21
1554 #define SRB_STATUS_BAD_FUNCTION             0x22
1555 #define SRB_STATUS_ERROR_RECOVERY           0x23
1556 #define SRB_STATUS_NOT_STARTED              0x24
1557 #define SRB_STATUS_NOT_IN_USE               0x30
1558 #define SRB_STATUS_FORCE_ABORT              0x31
1559 #define SRB_STATUS_DOMAIN_VALIDATION_FAIL   0x32
1560
1561 /*
1562  * Object-Server / Volume-Manager Dispatch Classes
1563  */
1564
1565 #define         VM_Null                 0
1566 #define         VM_NameServe            1
1567 #define         VM_ContainerConfig      2
1568 #define         VM_Ioctl                3
1569 #define         VM_FilesystemIoctl      4
1570 #define         VM_CloseAll             5
1571 #define         VM_CtBlockRead          6
1572 #define         VM_CtBlockWrite         7
1573 #define         VM_SliceBlockRead       8       /* raw access to configured "storage objects" */
1574 #define         VM_SliceBlockWrite      9
1575 #define         VM_DriveBlockRead       10      /* raw access to physical devices */
1576 #define         VM_DriveBlockWrite      11
1577 #define         VM_EnclosureMgt         12      /* enclosure management */
1578 #define         VM_Unused               13      /* used to be diskset management */
1579 #define         VM_CtBlockVerify        14
1580 #define         VM_CtPerf               15      /* performance test */
1581 #define         VM_CtBlockRead64        16
1582 #define         VM_CtBlockWrite64       17
1583 #define         VM_CtBlockVerify64      18
1584 #define         VM_CtHostRead64         19
1585 #define         VM_CtHostWrite64        20
1586 #define         VM_DrvErrTblLog         21
1587 #define         VM_NameServe64          22
1588
1589 #define         MAX_VMCOMMAND_NUM       23      /* used for sizing stats array - leave last */
1590
1591 /*
1592  *      Descriptive information (eg, vital stats)
1593  *      that a content manager might report.  The
1594  *      FileArray filesystem component is one example
1595  *      of a content manager.  Raw mode might be
1596  *      another.
1597  */
1598
1599 struct aac_fsinfo {
1600         __le32  fsTotalSize;    /* Consumed by fs, incl. metadata */
1601         __le32  fsBlockSize;
1602         __le32  fsFragSize;
1603         __le32  fsMaxExtendSize;
1604         __le32  fsSpaceUnits;
1605         __le32  fsMaxNumFiles;
1606         __le32  fsNumFreeFiles;
1607         __le32  fsInodeDensity;
1608 };      /* valid iff ObjType == FT_FILESYS && !(ContentState & FSCS_NOTCLEAN) */
1609
1610 union aac_contentinfo {
1611         struct aac_fsinfo filesys;      /* valid iff ObjType == FT_FILESYS && !(ContentState & FSCS_NOTCLEAN) */
1612 };
1613
1614 /*
1615  *      Query for Container Configuration Status
1616  */
1617
1618 #define CT_GET_CONFIG_STATUS 147
1619 struct aac_get_config_status {
1620         __le32          command;        /* VM_ContainerConfig */
1621         __le32          type;           /* CT_GET_CONFIG_STATUS */
1622         __le32          parm1;
1623         __le32          parm2;
1624         __le32          parm3;
1625         __le32          parm4;
1626         __le32          parm5;
1627         __le32          count;  /* sizeof(((struct aac_get_config_status_resp *)NULL)->data) */
1628 };
1629
1630 #define CFACT_CONTINUE 0
1631 #define CFACT_PAUSE    1
1632 #define CFACT_ABORT    2
1633 struct aac_get_config_status_resp {
1634         __le32          response; /* ST_OK */
1635         __le32          dummy0;
1636         __le32          status; /* CT_OK */
1637         __le32          parm1;
1638         __le32          parm2;
1639         __le32          parm3;
1640         __le32          parm4;
1641         __le32          parm5;
1642         struct {
1643                 __le32  action; /* CFACT_CONTINUE, CFACT_PAUSE or CFACT_ABORT */
1644                 __le16  flags;
1645                 __le16  count;
1646         }               data;
1647 };
1648
1649 /*
1650  *      Accept the configuration as-is
1651  */
1652
1653 #define CT_COMMIT_CONFIG 152
1654
1655 struct aac_commit_config {
1656         __le32          command;        /* VM_ContainerConfig */
1657         __le32          type;           /* CT_COMMIT_CONFIG */
1658 };
1659
1660 /*
1661  *      Query for Container Configuration Status
1662  */
1663
1664 #define CT_GET_CONTAINER_COUNT 4
1665 struct aac_get_container_count {
1666         __le32          command;        /* VM_ContainerConfig */
1667         __le32          type;           /* CT_GET_CONTAINER_COUNT */
1668 };
1669
1670 struct aac_get_container_count_resp {
1671         __le32          response; /* ST_OK */
1672         __le32          dummy0;
1673         __le32          MaxContainers;
1674         __le32          ContainerSwitchEntries;
1675         __le32          MaxPartitions;
1676 };
1677
1678
1679 /*
1680  *      Query for "mountable" objects, ie, objects that are typically
1681  *      associated with a drive letter on the client (host) side.
1682  */
1683
1684 struct aac_mntent {
1685         __le32                  oid;
1686         u8                      name[16];       /* if applicable */
1687         struct creation_info    create_info;    /* if applicable */
1688         __le32                  capacity;
1689         __le32                  vol;            /* substrate structure */
1690         __le32                  obj;            /* FT_FILESYS, etc. */
1691         __le32                  state;          /* unready for mounting,
1692                                                    readonly, etc. */
1693         union aac_contentinfo   fileinfo;       /* Info specific to content
1694                                                    manager (eg, filesystem) */
1695         __le32                  altoid;         /* != oid <==> snapshot or
1696                                                    broken mirror exists */
1697         __le32                  capacityhigh;
1698 };
1699
1700 #define FSCS_NOTCLEAN   0x0001  /* fsck is necessary before mounting */
1701 #define FSCS_READONLY   0x0002  /* possible result of broken mirror */
1702 #define FSCS_HIDDEN     0x0004  /* should be ignored - set during a clear */
1703 #define FSCS_NOT_READY  0x0008  /* Array spinning up to fulfil request */
1704
1705 struct aac_query_mount {
1706         __le32          command;
1707         __le32          type;
1708         __le32          count;
1709 };
1710
1711 struct aac_mount {
1712         __le32          status;
1713         __le32          type;           /* should be same as that requested */
1714         __le32          count;
1715         struct aac_mntent mnt[1];
1716 };
1717
1718 #define CT_READ_NAME 130
1719 struct aac_get_name {
1720         __le32          command;        /* VM_ContainerConfig */
1721         __le32          type;           /* CT_READ_NAME */
1722         __le32          cid;
1723         __le32          parm1;
1724         __le32          parm2;
1725         __le32          parm3;
1726         __le32          parm4;
1727         __le32          count;  /* sizeof(((struct aac_get_name_resp *)NULL)->data) */
1728 };
1729
1730 struct aac_get_name_resp {
1731         __le32          dummy0;
1732         __le32          dummy1;
1733         __le32          status; /* CT_OK */
1734         __le32          parm1;
1735         __le32          parm2;
1736         __le32          parm3;
1737         __le32          parm4;
1738         __le32          parm5;
1739         u8              data[16];
1740 };
1741
1742 #define CT_CID_TO_32BITS_UID 165
1743 struct aac_get_serial {
1744         __le32          command;        /* VM_ContainerConfig */
1745         __le32          type;           /* CT_CID_TO_32BITS_UID */
1746         __le32          cid;
1747 };
1748
1749 struct aac_get_serial_resp {
1750         __le32          dummy0;
1751         __le32          dummy1;
1752         __le32          status; /* CT_OK */
1753         __le32          uid;
1754 };
1755
1756 /*
1757  * The following command is sent to shut down each container.
1758  */
1759
1760 struct aac_close {
1761         __le32  command;
1762         __le32  cid;
1763 };
1764
1765 struct aac_query_disk
1766 {
1767         s32     cnum;
1768         s32     bus;
1769         s32     id;
1770         s32     lun;
1771         u32     valid;
1772         u32     locked;
1773         u32     deleted;
1774         s32     instance;
1775         s8      name[10];
1776         u32     unmapped;
1777 };
1778
1779 struct aac_delete_disk {
1780         u32     disknum;
1781         u32     cnum;
1782 };
1783
1784 struct fib_ioctl
1785 {
1786         u32     fibctx;
1787         s32     wait;
1788         char    __user *fib;
1789 };
1790
1791 struct revision
1792 {
1793         u32 compat;
1794         __le32 version;
1795         __le32 build;
1796 };
1797
1798
1799 /*
1800  *      Ugly - non Linux like ioctl coding for back compat.
1801  */
1802
1803 #define CTL_CODE(function, method) (                 \
1804     (4<< 16) | ((function) << 2) | (method) \
1805 )
1806
1807 /*
1808  *      Define the method codes for how buffers are passed for I/O and FS
1809  *      controls
1810  */
1811
1812 #define METHOD_BUFFERED                 0
1813 #define METHOD_NEITHER                  3
1814
1815 /*
1816  *      Filesystem ioctls
1817  */
1818
1819 #define FSACTL_SENDFIB                          CTL_CODE(2050, METHOD_BUFFERED)
1820 #define FSACTL_SEND_RAW_SRB                     CTL_CODE(2067, METHOD_BUFFERED)
1821 #define FSACTL_DELETE_DISK                      0x163
1822 #define FSACTL_QUERY_DISK                       0x173
1823 #define FSACTL_OPEN_GET_ADAPTER_FIB             CTL_CODE(2100, METHOD_BUFFERED)
1824 #define FSACTL_GET_NEXT_ADAPTER_FIB             CTL_CODE(2101, METHOD_BUFFERED)
1825 #define FSACTL_CLOSE_GET_ADAPTER_FIB            CTL_CODE(2102, METHOD_BUFFERED)
1826 #define FSACTL_MINIPORT_REV_CHECK               CTL_CODE(2107, METHOD_BUFFERED)
1827 #define FSACTL_GET_PCI_INFO                     CTL_CODE(2119, METHOD_BUFFERED)
1828 #define FSACTL_FORCE_DELETE_DISK                CTL_CODE(2120, METHOD_NEITHER)
1829 #define FSACTL_GET_CONTAINERS                   2131
1830 #define FSACTL_SEND_LARGE_FIB                   CTL_CODE(2138, METHOD_BUFFERED)
1831
1832
1833 struct aac_common
1834 {
1835         /*
1836          *      If this value is set to 1 then interrupt moderation will occur
1837          *      in the base commuication support.
1838          */
1839         u32 irq_mod;
1840         u32 peak_fibs;
1841         u32 zero_fibs;
1842         u32 fib_timeouts;
1843         /*
1844          *      Statistical counters in debug mode
1845          */
1846 #ifdef DBG
1847         u32 FibsSent;
1848         u32 FibRecved;
1849         u32 NoResponseSent;
1850         u32 NoResponseRecved;
1851         u32 AsyncSent;
1852         u32 AsyncRecved;
1853         u32 NormalSent;
1854         u32 NormalRecved;
1855 #endif
1856 };
1857
1858 extern struct aac_common aac_config;
1859
1860
1861 /*
1862  *      The following macro is used when sending and receiving FIBs. It is
1863  *      only used for debugging.
1864  */
1865
1866 #ifdef DBG
1867 #define FIB_COUNTER_INCREMENT(counter)          (counter)++
1868 #else
1869 #define FIB_COUNTER_INCREMENT(counter)
1870 #endif
1871
1872 /*
1873  *      Adapter direct commands
1874  *      Monitor/Kernel API
1875  */
1876
1877 #define BREAKPOINT_REQUEST              0x00000004
1878 #define INIT_STRUCT_BASE_ADDRESS        0x00000005
1879 #define READ_PERMANENT_PARAMETERS       0x0000000a
1880 #define WRITE_PERMANENT_PARAMETERS      0x0000000b
1881 #define HOST_CRASHING                   0x0000000d
1882 #define SEND_SYNCHRONOUS_FIB            0x0000000c
1883 #define COMMAND_POST_RESULTS            0x00000014
1884 #define GET_ADAPTER_PROPERTIES          0x00000019
1885 #define GET_DRIVER_BUFFER_PROPERTIES    0x00000023
1886 #define RCV_TEMP_READINGS               0x00000025
1887 #define GET_COMM_PREFERRED_SETTINGS     0x00000026
1888 #define IOP_RESET                       0x00001000
1889 #define IOP_RESET_ALWAYS                0x00001001
1890 #define RE_INIT_ADAPTER                 0x000000ee
1891
1892 /*
1893  *      Adapter Status Register
1894  *
1895  *  Phase Staus mailbox is 32bits:
1896  *      <31:16> = Phase Status
1897  *      <15:0>  = Phase
1898  *
1899  *      The adapter reports is present state through the phase.  Only
1900  *      a single phase should be ever be set.  Each phase can have multiple
1901  *      phase status bits to provide more detailed information about the
1902  *      state of the board.  Care should be taken to ensure that any phase
1903  *      status bits that are set when changing the phase are also valid
1904  *      for the new phase or be cleared out.  Adapter software (monitor,
1905  *      iflash, kernel) is responsible for properly maintining the phase
1906  *      status mailbox when it is running.
1907  *
1908  *      MONKER_API Phases
1909  *
1910  *      Phases are bit oriented.  It is NOT valid  to have multiple bits set
1911  */
1912
1913 #define SELF_TEST_FAILED                0x00000004
1914 #define MONITOR_PANIC                   0x00000020
1915 #define KERNEL_UP_AND_RUNNING           0x00000080
1916 #define KERNEL_PANIC                    0x00000100
1917
1918 /*
1919  *      Doorbell bit defines
1920  */
1921
1922 #define DoorBellSyncCmdAvailable        (1<<0)  /* Host -> Adapter */
1923 #define DoorBellPrintfDone              (1<<5)  /* Host -> Adapter */
1924 #define DoorBellAdapterNormCmdReady     (1<<1)  /* Adapter -> Host */
1925 #define DoorBellAdapterNormRespReady    (1<<2)  /* Adapter -> Host */
1926 #define DoorBellAdapterNormCmdNotFull   (1<<3)  /* Adapter -> Host */
1927 #define DoorBellAdapterNormRespNotFull  (1<<4)  /* Adapter -> Host */
1928 #define DoorBellPrintfReady             (1<<5)  /* Adapter -> Host */
1929 #define DoorBellAifPending              (1<<6)  /* Adapter -> Host */
1930
1931 /* PMC specific outbound doorbell bits */
1932 #define PmDoorBellResponseSent          (1<<1)  /* Adapter -> Host */
1933
1934 /*
1935  *      For FIB communication, we need all of the following things
1936  *      to send back to the user.
1937  */
1938
1939 #define         AifCmdEventNotify       1       /* Notify of event */
1940 #define                 AifEnConfigChange       3       /* Adapter configuration change */
1941 #define                 AifEnContainerChange    4       /* Container configuration change */
1942 #define                 AifEnDeviceFailure      5       /* SCSI device failed */
1943 #define                 AifEnEnclosureManagement 13     /* EM_DRIVE_* */
1944 #define                         EM_DRIVE_INSERTION      31
1945 #define                         EM_DRIVE_REMOVAL        32
1946 #define                 AifEnBatteryEvent       14      /* Change in Battery State */
1947 #define                 AifEnAddContainer       15      /* A new array was created */
1948 #define                 AifEnDeleteContainer    16      /* A container was deleted */
1949 #define                 AifEnExpEvent           23      /* Firmware Event Log */
1950 #define                 AifExeFirmwarePanic     3       /* Firmware Event Panic */
1951 #define                 AifHighPriority         3       /* Highest Priority Event */
1952 #define                 AifEnAddJBOD            30      /* JBOD created */
1953 #define                 AifEnDeleteJBOD         31      /* JBOD deleted */
1954
1955 #define         AifCmdJobProgress       2       /* Progress report */
1956 #define                 AifJobCtrZero   101     /* Array Zero progress */
1957 #define                 AifJobStsSuccess 1      /* Job completes */
1958 #define                 AifJobStsRunning 102    /* Job running */
1959 #define         AifCmdAPIReport         3       /* Report from other user of API */
1960 #define         AifCmdDriverNotify      4       /* Notify host driver of event */
1961 #define                 AifDenMorphComplete 200 /* A morph operation completed */
1962 #define                 AifDenVolumeExtendComplete 201 /* A volume extend completed */
1963 #define         AifReqJobList           100     /* Gets back complete job list */
1964 #define         AifReqJobsForCtr        101     /* Gets back jobs for specific container */
1965 #define         AifReqJobsForScsi       102     /* Gets back jobs for specific SCSI device */
1966 #define         AifReqJobReport         103     /* Gets back a specific job report or list of them */
1967 #define         AifReqTerminateJob      104     /* Terminates job */
1968 #define         AifReqSuspendJob        105     /* Suspends a job */
1969 #define         AifReqResumeJob         106     /* Resumes a job */
1970 #define         AifReqSendAPIReport     107     /* API generic report requests */
1971 #define         AifReqAPIJobStart       108     /* Start a job from the API */
1972 #define         AifReqAPIJobUpdate      109     /* Update a job report from the API */
1973 #define         AifReqAPIJobFinish      110     /* Finish a job from the API */
1974
1975 /* PMC NEW COMM: Request the event data */
1976 #define         AifReqEvent             200
1977
1978 /*
1979  *      Adapter Initiated FIB command structures. Start with the adapter
1980  *      initiated FIBs that really come from the adapter, and get responded
1981  *      to by the host.
1982  */
1983
1984 struct aac_aifcmd {
1985         __le32 command;         /* Tell host what type of notify this is */
1986         __le32 seqnum;          /* To allow ordering of reports (if necessary) */
1987         u8 data[1];             /* Undefined length (from kernel viewpoint) */
1988 };
1989
1990 /**
1991  *      Convert capacity to cylinders
1992  *      accounting for the fact capacity could be a 64 bit value
1993  *
1994  */
1995 static inline unsigned int cap_to_cyls(sector_t capacity, unsigned divisor)
1996 {
1997         sector_div(capacity, divisor);
1998         return capacity;
1999 }
2000
2001 /* SCp.phase values */
2002 #define AAC_OWNER_MIDLEVEL      0x101
2003 #define AAC_OWNER_LOWLEVEL      0x102
2004 #define AAC_OWNER_ERROR_HANDLER 0x103
2005 #define AAC_OWNER_FIRMWARE      0x106
2006
2007 const char *aac_driverinfo(struct Scsi_Host *);
2008 struct fib *aac_fib_alloc(struct aac_dev *dev);
2009 int aac_fib_setup(struct aac_dev *dev);
2010 void aac_fib_map_free(struct aac_dev *dev);
2011 void aac_fib_free(struct fib * context);
2012 void aac_fib_init(struct fib * context);
2013 void aac_printf(struct aac_dev *dev, u32 val);
2014 int aac_fib_send(u16 command, struct fib * context, unsigned long size, int priority, int wait, int reply, fib_callback callback, void *ctxt);
2015 int aac_consumer_get(struct aac_dev * dev, struct aac_queue * q, struct aac_entry **entry);
2016 void aac_consumer_free(struct aac_dev * dev, struct aac_queue * q, u32 qnum);
2017 int aac_fib_complete(struct fib * context);
2018 #define fib_data(fibctx) ((void *)(fibctx)->hw_fib_va->data)
2019 struct aac_dev *aac_init_adapter(struct aac_dev *dev);
2020 int aac_get_config_status(struct aac_dev *dev, int commit_flag);
2021 int aac_get_containers(struct aac_dev *dev);
2022 int aac_scsi_cmd(struct scsi_cmnd *cmd);
2023 int aac_dev_ioctl(struct aac_dev *dev, int cmd, void __user *arg);
2024 #ifndef shost_to_class
2025 #define shost_to_class(shost) &shost->shost_dev
2026 #endif
2027 ssize_t aac_get_serial_number(struct device *dev, char *buf);
2028 int aac_do_ioctl(struct aac_dev * dev, int cmd, void __user *arg);
2029 int aac_rx_init(struct aac_dev *dev);
2030 int aac_rkt_init(struct aac_dev *dev);
2031 int aac_nark_init(struct aac_dev *dev);
2032 int aac_sa_init(struct aac_dev *dev);
2033 int aac_src_init(struct aac_dev *dev);
2034 int aac_srcv_init(struct aac_dev *dev);
2035 int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_fib * hw_fib, int wait, struct fib * fibptr, unsigned long *nonotify);
2036 unsigned int aac_response_normal(struct aac_queue * q);
2037 unsigned int aac_command_normal(struct aac_queue * q);
2038 unsigned int aac_intr_normal(struct aac_dev *dev, u32 Index,
2039                         int isAif, int isFastResponse,
2040                         struct hw_fib *aif_fib);
2041 int aac_reset_adapter(struct aac_dev * dev, int forced);
2042 int aac_check_health(struct aac_dev * dev);
2043 int aac_command_thread(void *data);
2044 int aac_close_fib_context(struct aac_dev * dev, struct aac_fib_context *fibctx);
2045 int aac_fib_adapter_complete(struct fib * fibptr, unsigned short size);
2046 struct aac_driver_ident* aac_get_driver_ident(int devtype);
2047 int aac_get_adapter_info(struct aac_dev* dev);
2048 int aac_send_shutdown(struct aac_dev *dev);
2049 int aac_probe_container(struct aac_dev *dev, int cid);
2050 int _aac_rx_init(struct aac_dev *dev);
2051 int aac_rx_select_comm(struct aac_dev *dev, int comm);
2052 int aac_rx_deliver_producer(struct fib * fib);
2053 char * get_container_type(unsigned type);
2054 extern int numacb;
2055 extern int acbsize;
2056 extern char aac_driver_version[];
2057 extern int startup_timeout;
2058 extern int aif_timeout;
2059 extern int expose_physicals;
2060 extern int aac_reset_devices;
2061 extern int aac_msi;
2062 extern int aac_commit;
2063 extern int update_interval;
2064 extern int check_interval;
2065 extern int aac_check_reset;