drivers/scsi/be2iscsi/be_main.c

   1 /**
   2  * Copyright (C) 2005 - 2013 Emulex
   3  * All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License version 2
   7  * as published by the Free Software Foundation.  The full GNU General
   8  * Public License is included in this distribution in the file called COPYING.
   9  *
  10  * Written by: Jayamohan Kallickal (jayamohan.kallickal@emulex.com)
  11  *
  12  * Contact Information:
  13  * linux-drivers@emulex.com
  14  *
  15  * Emulex
  16  * 3333 Susan Street
  17  * Costa Mesa, CA 92626
  18  */
  19
  20 #include <linux/reboot.h>
  21 #include <linux/delay.h>
  22 #include <linux/slab.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/blkdev.h>
  25 #include <linux/pci.h>
  26 #include <linux/string.h>
  27 #include <linux/kernel.h>
  28 #include <linux/semaphore.h>
  29 #include <linux/iscsi_boot_sysfs.h>
  30 #include <linux/module.h>
  31 #include <linux/bsg-lib.h>
  32
  33 #include <scsi/libiscsi.h>
  34 #include <scsi/scsi_bsg_iscsi.h>
  35 #include <scsi/scsi_netlink.h>
  36 #include <scsi/scsi_transport_iscsi.h>
  37 #include <scsi/scsi_transport.h>
  38 #include <scsi/scsi_cmnd.h>
  39 #include <scsi/scsi_device.h>
  40 #include <scsi/scsi_host.h>
  41 #include <scsi/scsi.h>
  42 #include "be_main.h"
  43 #include "be_iscsi.h"
  44 #include "be_mgmt.h"
  45 #include "be_cmds.h"
  46
  47 static unsigned int be_iopoll_budget = 10;
  48 static unsigned int be_max_phys_size = 64;
  49 static unsigned int enable_msix = 1;
  50
  51 MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table);
  52 MODULE_DESCRIPTION(DRV_DESC " " BUILD_STR);
  53 MODULE_VERSION(BUILD_STR);
  54 MODULE_AUTHOR("Emulex Corporation");
  55 MODULE_LICENSE("GPL");
  56 module_param(be_iopoll_budget, int, 0);
  57 module_param(enable_msix, int, 0);
  58 module_param(be_max_phys_size, uint, S_IRUGO);
  59 MODULE_PARM_DESC(be_max_phys_size,
  60                 "Maximum Size (In Kilobytes) of physically contiguous "
  61                 "memory that can be allocated. Range is 16 - 128");
  62
  63 #define beiscsi_disp_param(_name)\
  64 ssize_t \
  65 beiscsi_##_name##_disp(struct device *dev,\
  66                         struct device_attribute *attrib, char *buf)     \
  67 {       \
  68         struct Scsi_Host *shost = class_to_shost(dev);\
  69         struct beiscsi_hba *phba = iscsi_host_priv(shost); \
  70         uint32_t param_val = 0; \
  71         param_val = phba->attr_##_name;\
  72         return snprintf(buf, PAGE_SIZE, "%d\n",\
  73                         phba->attr_##_name);\
  74 }
  75
  76 #define beiscsi_change_param(_name, _minval, _maxval, _defaval)\
  77 int \
  78 beiscsi_##_name##_change(struct beiscsi_hba *phba, uint32_t val)\
  79 {\
  80         if (val >= _minval && val <= _maxval) {\
  81                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
  82                             "BA_%d : beiscsi_"#_name" updated "\
  83                             "from 0x%x ==> 0x%x\n",\
  84                             phba->attr_##_name, val); \
  85                 phba->attr_##_name = val;\
  86                 return 0;\
  87         } \
  88         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT, \
  89                     "BA_%d beiscsi_"#_name" attribute "\
  90                     "cannot be updated to 0x%x, "\
  91                     "range allowed is ["#_minval" - "#_maxval"]\n", val);\
  92                 return -EINVAL;\
  93 }
  94
  95 #define beiscsi_store_param(_name)  \
  96 ssize_t \
  97 beiscsi_##_name##_store(struct device *dev,\
  98                          struct device_attribute *attr, const char *buf,\
  99                          size_t count) \
 100 { \
 101         struct Scsi_Host  *shost = class_to_shost(dev);\
 102         struct beiscsi_hba *phba = iscsi_host_priv(shost);\
 103         uint32_t param_val = 0;\
 104         if (!isdigit(buf[0]))\
 105                 return -EINVAL;\
 106         if (sscanf(buf, "%i", &param_val) != 1)\
 107                 return -EINVAL;\
 108         if (beiscsi_##_name##_change(phba, param_val) == 0) \
 109                 return strlen(buf);\
 110         else \
 111                 return -EINVAL;\
 112 }
 113
 114 #define beiscsi_init_param(_name, _minval, _maxval, _defval) \
 115 int \
 116 beiscsi_##_name##_init(struct beiscsi_hba *phba, uint32_t val) \
 117 { \
 118         if (val >= _minval && val <= _maxval) {\
 119                 phba->attr_##_name = val;\
 120                 return 0;\
 121         } \
 122         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
 123                     "BA_%d beiscsi_"#_name" attribute " \
 124                     "cannot be updated to 0x%x, "\
 125                     "range allowed is ["#_minval" - "#_maxval"]\n", val);\
 126         phba->attr_##_name = _defval;\
 127         return -EINVAL;\
 128 }
 129
 130 #define BEISCSI_RW_ATTR(_name, _minval, _maxval, _defval, _descp) \
 131 static uint beiscsi_##_name = _defval;\
 132 module_param(beiscsi_##_name, uint, S_IRUGO);\
 133 MODULE_PARM_DESC(beiscsi_##_name, _descp);\
 134 beiscsi_disp_param(_name)\
 135 beiscsi_change_param(_name, _minval, _maxval, _defval)\
 136 beiscsi_store_param(_name)\
 137 beiscsi_init_param(_name, _minval, _maxval, _defval)\
 138 DEVICE_ATTR(beiscsi_##_name, S_IRUGO | S_IWUSR,\
 139               beiscsi_##_name##_disp, beiscsi_##_name##_store)
 140
 141 /*
 142  * When new log level added update the
 143  * the MAX allowed value for log_enable
 144  */
 145 BEISCSI_RW_ATTR(log_enable, 0x00,
 146                 0xFF, 0x00, "Enable logging Bit Mask\n"
 147                 "\t\t\t\tInitialization Events  : 0x01\n"
 148                 "\t\t\t\tMailbox Events         : 0x02\n"
 149                 "\t\t\t\tMiscellaneous Events   : 0x04\n"
 150                 "\t\t\t\tError Handling         : 0x08\n"
 151                 "\t\t\t\tIO Path Events         : 0x10\n"
 152                 "\t\t\t\tConfiguration Path     : 0x20\n");
 153
 154 DEVICE_ATTR(beiscsi_drvr_ver, S_IRUGO, beiscsi_drvr_ver_disp, NULL);
 155 DEVICE_ATTR(beiscsi_adapter_family, S_IRUGO, beiscsi_adap_family_disp, NULL);
 156 DEVICE_ATTR(beiscsi_fw_ver, S_IRUGO, beiscsi_fw_ver_disp, NULL);
 157 DEVICE_ATTR(beiscsi_active_cid_count, S_IRUGO, beiscsi_active_cid_disp, NULL);
 158 struct device_attribute *beiscsi_attrs[] = {
 159         &dev_attr_beiscsi_log_enable,
 160         &dev_attr_beiscsi_drvr_ver,
 161         &dev_attr_beiscsi_adapter_family,
 162         &dev_attr_beiscsi_fw_ver,
 163         &dev_attr_beiscsi_active_cid_count,
 164         NULL,
 165 };
 166
 167 static char const *cqe_desc[] = {
 168         "RESERVED_DESC",
 169         "SOL_CMD_COMPLETE",
 170         "SOL_CMD_KILLED_DATA_DIGEST_ERR",
 171         "CXN_KILLED_PDU_SIZE_EXCEEDS_DSL",
 172         "CXN_KILLED_BURST_LEN_MISMATCH",
 173         "CXN_KILLED_AHS_RCVD",
 174         "CXN_KILLED_HDR_DIGEST_ERR",
 175         "CXN_KILLED_UNKNOWN_HDR",
 176         "CXN_KILLED_STALE_ITT_TTT_RCVD",
 177         "CXN_KILLED_INVALID_ITT_TTT_RCVD",
 178         "CXN_KILLED_RST_RCVD",
 179         "CXN_KILLED_TIMED_OUT",
 180         "CXN_KILLED_RST_SENT",
 181         "CXN_KILLED_FIN_RCVD",
 182         "CXN_KILLED_BAD_UNSOL_PDU_RCVD",
 183         "CXN_KILLED_BAD_WRB_INDEX_ERROR",
 184         "CXN_KILLED_OVER_RUN_RESIDUAL",
 185         "CXN_KILLED_UNDER_RUN_RESIDUAL",
 186         "CMD_KILLED_INVALID_STATSN_RCVD",
 187         "CMD_KILLED_INVALID_R2T_RCVD",
 188         "CMD_CXN_KILLED_LUN_INVALID",
 189         "CMD_CXN_KILLED_ICD_INVALID",
 190         "CMD_CXN_KILLED_ITT_INVALID",
 191         "CMD_CXN_KILLED_SEQ_OUTOFORDER",
 192         "CMD_CXN_KILLED_INVALID_DATASN_RCVD",
 193         "CXN_INVALIDATE_NOTIFY",
 194         "CXN_INVALIDATE_INDEX_NOTIFY",
 195         "CMD_INVALIDATED_NOTIFY",
 196         "UNSOL_HDR_NOTIFY",
 197         "UNSOL_DATA_NOTIFY",
 198         "UNSOL_DATA_DIGEST_ERROR_NOTIFY",
 199         "DRIVERMSG_NOTIFY",
 200         "CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN",
 201         "SOL_CMD_KILLED_DIF_ERR",
 202         "CXN_KILLED_SYN_RCVD",
 203         "CXN_KILLED_IMM_DATA_RCVD"
 204 };
 205
 206 static int beiscsi_slave_configure(struct scsi_device *sdev)
 207 {
 208         blk_queue_max_segment_size(sdev->request_queue, 65536);
 209         return 0;
 210 }
 211
 212 static int beiscsi_eh_abort(struct scsi_cmnd *sc)
 213 {
 214         struct iscsi_cls_session *cls_session;
 215         struct iscsi_task *aborted_task = (struct iscsi_task *)sc->SCp.ptr;
 216         struct beiscsi_io_task *aborted_io_task;
 217         struct iscsi_conn *conn;
 218         struct beiscsi_conn *beiscsi_conn;
 219         struct beiscsi_hba *phba;
 220         struct iscsi_session *session;
 221         struct invalidate_command_table *inv_tbl;
 222         struct be_dma_mem nonemb_cmd;
 223         unsigned int cid, tag, num_invalidate;
 224
 225         cls_session = starget_to_session(scsi_target(sc->device));
 226         session = cls_session->dd_data;
 227
 228         spin_lock_bh(&session->lock);
 229         if (!aborted_task || !aborted_task->sc) {
 230                 /* we raced */
 231                 spin_unlock_bh(&session->lock);
 232                 return SUCCESS;
 233         }
 234
 235         aborted_io_task = aborted_task->dd_data;
 236         if (!aborted_io_task->scsi_cmnd) {
 237                 /* raced or invalid command */
 238                 spin_unlock_bh(&session->lock);
 239                 return SUCCESS;
 240         }
 241         spin_unlock_bh(&session->lock);
 242         conn = aborted_task->conn;
 243         beiscsi_conn = conn->dd_data;
 244         phba = beiscsi_conn->phba;
 245
 246         /* invalidate iocb */
 247         cid = beiscsi_conn->beiscsi_conn_cid;
 248         inv_tbl = phba->inv_tbl;
 249         memset(inv_tbl, 0x0, sizeof(*inv_tbl));
 250         inv_tbl->cid = cid;
 251         inv_tbl->icd = aborted_io_task->psgl_handle->sgl_index;
 252         num_invalidate = 1;
 253         nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
 254                                 sizeof(struct invalidate_commands_params_in),
 255                                 &nonemb_cmd.dma);
 256         if (nonemb_cmd.va == NULL) {
 257                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
 258                             "BM_%d : Failed to allocate memory for"
 259                             "mgmt_invalidate_icds\n");
 260                 return FAILED;
 261         }
 262         nonemb_cmd.size = sizeof(struct invalidate_commands_params_in);
 263
 264         tag = mgmt_invalidate_icds(phba, inv_tbl, num_invalidate,
 265                                    cid, &nonemb_cmd);
 266         if (!tag) {
 267                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
 268                             "BM_%d : mgmt_invalidate_icds could not be"
 269                             "submitted\n");
 270                 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
 271                                     nonemb_cmd.va, nonemb_cmd.dma);
 272
 273                 return FAILED;
 274         }
 275
 276         beiscsi_mccq_compl(phba, tag, NULL, nonemb_cmd.va);
 277         pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
 278                             nonemb_cmd.va, nonemb_cmd.dma);
 279         return iscsi_eh_abort(sc);
 280 }
 281
 282 static int beiscsi_eh_device_reset(struct scsi_cmnd *sc)
 283 {
 284         struct iscsi_task *abrt_task;
 285         struct beiscsi_io_task *abrt_io_task;
 286         struct iscsi_conn *conn;
 287         struct beiscsi_conn *beiscsi_conn;
 288         struct beiscsi_hba *phba;
 289         struct iscsi_session *session;
 290         struct iscsi_cls_session *cls_session;
 291         struct invalidate_command_table *inv_tbl;
 292         struct be_dma_mem nonemb_cmd;
 293         unsigned int cid, tag, i, num_invalidate;
 294
 295         /* invalidate iocbs */
 296         cls_session = starget_to_session(scsi_target(sc->device));
 297         session = cls_session->dd_data;
 298         spin_lock_bh(&session->lock);
 299         if (!session->leadconn || session->state != ISCSI_STATE_LOGGED_IN) {
 300                 spin_unlock_bh(&session->lock);
 301                 return FAILED;
 302         }
 303         conn = session->leadconn;
 304         beiscsi_conn = conn->dd_data;
 305         phba = beiscsi_conn->phba;
 306         cid = beiscsi_conn->beiscsi_conn_cid;
 307         inv_tbl = phba->inv_tbl;
 308         memset(inv_tbl, 0x0, sizeof(*inv_tbl) * BE2_CMDS_PER_CXN);
 309         num_invalidate = 0;
 310         for (i = 0; i < conn->session->cmds_max; i++) {
 311                 abrt_task = conn->session->cmds[i];
 312                 abrt_io_task = abrt_task->dd_data;
 313                 if (!abrt_task->sc || abrt_task->state == ISCSI_TASK_FREE)
 314                         continue;
 315
 316                 if (abrt_task->sc->device->lun != abrt_task->sc->device->lun)
 317                         continue;
 318
 319                 inv_tbl->cid = cid;
 320                 inv_tbl->icd = abrt_io_task->psgl_handle->sgl_index;
 321                 num_invalidate++;
 322                 inv_tbl++;
 323         }
 324         spin_unlock_bh(&session->lock);
 325         inv_tbl = phba->inv_tbl;
 326
 327         nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
 328                                 sizeof(struct invalidate_commands_params_in),
 329                                 &nonemb_cmd.dma);
 330         if (nonemb_cmd.va == NULL) {
 331                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
 332                             "BM_%d : Failed to allocate memory for"
 333                             "mgmt_invalidate_icds\n");
 334                 return FAILED;
 335         }
 336         nonemb_cmd.size = sizeof(struct invalidate_commands_params_in);
 337         memset(nonemb_cmd.va, 0, nonemb_cmd.size);
 338         tag = mgmt_invalidate_icds(phba, inv_tbl, num_invalidate,
 339                                    cid, &nonemb_cmd);
 340         if (!tag) {
 341                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
 342                             "BM_%d : mgmt_invalidate_icds could not be"
 343                             " submitted\n");
 344                 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
 345                                     nonemb_cmd.va, nonemb_cmd.dma);
 346                 return FAILED;
 347         }
 348
 349         beiscsi_mccq_compl(phba, tag, NULL, nonemb_cmd.va);
 350         pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
 351                             nonemb_cmd.va, nonemb_cmd.dma);
 352         return iscsi_eh_device_reset(sc);
 353 }
 354
 355 static ssize_t beiscsi_show_boot_tgt_info(void *data, int type, char *buf)
 356 {
 357         struct beiscsi_hba *phba = data;
 358         struct mgmt_session_info *boot_sess = &phba->boot_sess;
 359         struct mgmt_conn_info *boot_conn = &boot_sess->conn_list[0];
 360         char *str = buf;
 361         int rc;
 362
 363         switch (type) {
 364         case ISCSI_BOOT_TGT_NAME:
 365                 rc = sprintf(buf, "%.*s\n",
 366                             (int)strlen(boot_sess->target_name),
 367                             (char *)&boot_sess->target_name);
 368                 break;
 369         case ISCSI_BOOT_TGT_IP_ADDR:
 370                 if (boot_conn->dest_ipaddr.ip_type == 0x1)
 371                         rc = sprintf(buf, "%pI4\n",
 372                                 (char *)&boot_conn->dest_ipaddr.addr);
 373                 else
 374                         rc = sprintf(str, "%pI6\n",
 375                                 (char *)&boot_conn->dest_ipaddr.addr);
 376                 break;
 377         case ISCSI_BOOT_TGT_PORT:
 378                 rc = sprintf(str, "%d\n", boot_conn->dest_port);
 379                 break;
 380
 381         case ISCSI_BOOT_TGT_CHAP_NAME:
 382                 rc = sprintf(str,  "%.*s\n",
 383                              boot_conn->negotiated_login_options.auth_data.chap.
 384                              target_chap_name_length,
 385                              (char *)&boot_conn->negotiated_login_options.
 386                              auth_data.chap.target_chap_name);
 387                 break;
 388         case ISCSI_BOOT_TGT_CHAP_SECRET:
 389                 rc = sprintf(str,  "%.*s\n",
 390                              boot_conn->negotiated_login_options.auth_data.chap.
 391                              target_secret_length,
 392                              (char *)&boot_conn->negotiated_login_options.
 393                              auth_data.chap.target_secret);
 394                 break;
 395         case ISCSI_BOOT_TGT_REV_CHAP_NAME:
 396                 rc = sprintf(str,  "%.*s\n",
 397                              boot_conn->negotiated_login_options.auth_data.chap.
 398                              intr_chap_name_length,
 399                              (char *)&boot_conn->negotiated_login_options.
 400                              auth_data.chap.intr_chap_name);
 401                 break;
 402         case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
 403                 rc = sprintf(str,  "%.*s\n",
 404                              boot_conn->negotiated_login_options.auth_data.chap.
 405                              intr_secret_length,
 406                              (char *)&boot_conn->negotiated_login_options.
 407                              auth_data.chap.intr_secret);
 408                 break;
 409         case ISCSI_BOOT_TGT_FLAGS:
 410                 rc = sprintf(str, "2\n");
 411                 break;
 412         case ISCSI_BOOT_TGT_NIC_ASSOC:
 413                 rc = sprintf(str, "0\n");
 414                 break;
 415         default:
 416                 rc = -ENOSYS;
 417                 break;
 418         }
 419         return rc;
 420 }
 421
 422 static ssize_t beiscsi_show_boot_ini_info(void *data, int type, char *buf)
 423 {
 424         struct beiscsi_hba *phba = data;
 425         char *str = buf;
 426         int rc;
 427
 428         switch (type) {
 429         case ISCSI_BOOT_INI_INITIATOR_NAME:
 430                 rc = sprintf(str, "%s\n", phba->boot_sess.initiator_iscsiname);
 431                 break;
 432         default:
 433                 rc = -ENOSYS;
 434                 break;
 435         }
 436         return rc;
 437 }
 438
 439 static ssize_t beiscsi_show_boot_eth_info(void *data, int type, char *buf)
 440 {
 441         struct beiscsi_hba *phba = data;
 442         char *str = buf;
 443         int rc;
 444
 445         switch (type) {
 446         case ISCSI_BOOT_ETH_FLAGS:
 447                 rc = sprintf(str, "2\n");
 448                 break;
 449         case ISCSI_BOOT_ETH_INDEX:
 450                 rc = sprintf(str, "0\n");
 451                 break;
 452         case ISCSI_BOOT_ETH_MAC:
 453                 rc  = beiscsi_get_macaddr(str, phba);
 454                 break;
 455         default:
 456                 rc = -ENOSYS;
 457                 break;
 458         }
 459         return rc;
 460 }
 461
 462
 463 static umode_t beiscsi_tgt_get_attr_visibility(void *data, int type)
 464 {
 465         umode_t rc;
 466
 467         switch (type) {
 468         case ISCSI_BOOT_TGT_NAME:
 469         case ISCSI_BOOT_TGT_IP_ADDR:
 470         case ISCSI_BOOT_TGT_PORT:
 471         case ISCSI_BOOT_TGT_CHAP_NAME:
 472         case ISCSI_BOOT_TGT_CHAP_SECRET:
 473         case ISCSI_BOOT_TGT_REV_CHAP_NAME:
 474         case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
 475         case ISCSI_BOOT_TGT_NIC_ASSOC:
 476         case ISCSI_BOOT_TGT_FLAGS:
 477                 rc = S_IRUGO;
 478                 break;
 479         default:
 480                 rc = 0;
 481                 break;
 482         }
 483         return rc;
 484 }
 485
 486 static umode_t beiscsi_ini_get_attr_visibility(void *data, int type)
 487 {
 488         umode_t rc;
 489
 490         switch (type) {
 491         case ISCSI_BOOT_INI_INITIATOR_NAME:
 492                 rc = S_IRUGO;
 493                 break;
 494         default:
 495                 rc = 0;
 496                 break;
 497         }
 498         return rc;
 499 }
 500
 501
 502 static umode_t beiscsi_eth_get_attr_visibility(void *data, int type)
 503 {
 504         umode_t rc;
 505
 506         switch (type) {
 507         case ISCSI_BOOT_ETH_FLAGS:
 508         case ISCSI_BOOT_ETH_MAC:
 509         case ISCSI_BOOT_ETH_INDEX:
 510                 rc = S_IRUGO;
 511                 break;
 512         default:
 513                 rc = 0;
 514                 break;
 515         }
 516         return rc;
 517 }
 518
 519 /*------------------- PCI Driver operations and data ----------------- */
 520 static DEFINE_PCI_DEVICE_TABLE(beiscsi_pci_id_table) = {
 521         { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
 522         { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
 523         { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
 524         { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
 525         { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
 526         { PCI_DEVICE(ELX_VENDOR_ID, OC_SKH_ID1) },
 527         { 0 }
 528 };
 529 MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table);
 530
 531
 532 static struct scsi_host_template beiscsi_sht = {
 533         .module = THIS_MODULE,
 534         .name = "Emulex 10Gbe open-iscsi Initiator Driver",
 535         .proc_name = DRV_NAME,
 536         .queuecommand = iscsi_queuecommand,
 537         .change_queue_depth = iscsi_change_queue_depth,
 538         .slave_configure = beiscsi_slave_configure,
 539         .target_alloc = iscsi_target_alloc,
 540         .eh_abort_handler = beiscsi_eh_abort,
 541         .eh_device_reset_handler = beiscsi_eh_device_reset,
 542         .eh_target_reset_handler = iscsi_eh_session_reset,
 543         .shost_attrs = beiscsi_attrs,
 544         .sg_tablesize = BEISCSI_SGLIST_ELEMENTS,
 545         .can_queue = BE2_IO_DEPTH,
 546         .this_id = -1,
 547         .max_sectors = BEISCSI_MAX_SECTORS,
 548         .cmd_per_lun = BEISCSI_CMD_PER_LUN,
 549         .use_clustering = ENABLE_CLUSTERING,
 550         .vendor_id = SCSI_NL_VID_TYPE_PCI | BE_VENDOR_ID,
 551
 552 };
 553
 554 static struct scsi_transport_template *beiscsi_scsi_transport;
 555
 556 static struct beiscsi_hba *beiscsi_hba_alloc(struct pci_dev *pcidev)
 557 {
 558         struct beiscsi_hba *phba;
 559         struct Scsi_Host *shost;
 560
 561         shost = iscsi_host_alloc(&beiscsi_sht, sizeof(*phba), 0);
 562         if (!shost) {
 563                 dev_err(&pcidev->dev,
 564                         "beiscsi_hba_alloc - iscsi_host_alloc failed\n");
 565                 return NULL;
 566         }
 567         shost->max_id = BE2_MAX_SESSIONS;
 568         shost->max_channel = 0;
 569         shost->max_cmd_len = BEISCSI_MAX_CMD_LEN;
 570         shost->max_lun = BEISCSI_NUM_MAX_LUN;
 571         shost->transportt = beiscsi_scsi_transport;
 572         phba = iscsi_host_priv(shost);
 573         memset(phba, 0, sizeof(*phba));
 574         phba->shost = shost;
 575         phba->pcidev = pci_dev_get(pcidev);
 576         pci_set_drvdata(pcidev, phba);
 577         phba->interface_handle = 0xFFFFFFFF;
 578
 579         if (iscsi_host_add(shost, &phba->pcidev->dev))
 580                 goto free_devices;
 581
 582         return phba;
 583
 584 free_devices:
 585         pci_dev_put(phba->pcidev);
 586         iscsi_host_free(phba->shost);
 587         return NULL;
 588 }
 589
 590 static void beiscsi_unmap_pci_function(struct beiscsi_hba *phba)
 591 {
 592         if (phba->csr_va) {
 593                 iounmap(phba->csr_va);
 594                 phba->csr_va = NULL;
 595         }
 596         if (phba->db_va) {
 597                 iounmap(phba->db_va);
 598                 phba->db_va = NULL;
 599         }
 600         if (phba->pci_va) {
 601                 iounmap(phba->pci_va);
 602                 phba->pci_va = NULL;
 603         }
 604 }
 605
 606 static int beiscsi_map_pci_bars(struct beiscsi_hba *phba,
 607                                 struct pci_dev *pcidev)
 608 {
 609         u8 __iomem *addr;
 610         int pcicfg_reg;
 611
 612         addr = ioremap_nocache(pci_resource_start(pcidev, 2),
 613                                pci_resource_len(pcidev, 2));
 614         if (addr == NULL)
 615                 return -ENOMEM;
 616         phba->ctrl.csr = addr;
 617         phba->csr_va = addr;
 618         phba->csr_pa.u.a64.address = pci_resource_start(pcidev, 2);
 619
 620         addr = ioremap_nocache(pci_resource_start(pcidev, 4), 128 * 1024);
 621         if (addr == NULL)
 622                 goto pci_map_err;
 623         phba->ctrl.db = addr;
 624         phba->db_va = addr;
 625         phba->db_pa.u.a64.address =  pci_resource_start(pcidev, 4);
 626
 627         if (phba->generation == BE_GEN2)
 628                 pcicfg_reg = 1;
 629         else
 630                 pcicfg_reg = 0;
 631
 632         addr = ioremap_nocache(pci_resource_start(pcidev, pcicfg_reg),
 633                                pci_resource_len(pcidev, pcicfg_reg));
 634
 635         if (addr == NULL)
 636                 goto pci_map_err;
 637         phba->ctrl.pcicfg = addr;
 638         phba->pci_va = addr;
 639         phba->pci_pa.u.a64.address = pci_resource_start(pcidev, pcicfg_reg);
 640         return 0;
 641
 642 pci_map_err:
 643         beiscsi_unmap_pci_function(phba);
 644         return -ENOMEM;
 645 }
 646
 647 static int beiscsi_enable_pci(struct pci_dev *pcidev)
 648 {
 649         int ret;
 650
 651         ret = pci_enable_device(pcidev);
 652         if (ret) {
 653                 dev_err(&pcidev->dev,
 654                         "beiscsi_enable_pci - enable device failed\n");
 655                 return ret;
 656         }
 657
 658         pci_set_master(pcidev);
 659         if (pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64))) {
 660                 ret = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32));
 661                 if (ret) {
 662                         dev_err(&pcidev->dev, "Could not set PCI DMA Mask\n");
 663                         pci_disable_device(pcidev);
 664                         return ret;
 665                 }
 666         }
 667         return 0;
 668 }
 669
 670 static int be_ctrl_init(struct beiscsi_hba *phba, struct pci_dev *pdev)
 671 {
 672         struct be_ctrl_info *ctrl = &phba->ctrl;
 673         struct be_dma_mem *mbox_mem_alloc = &ctrl->mbox_mem_alloced;
 674         struct be_dma_mem *mbox_mem_align = &ctrl->mbox_mem;
 675         int status = 0;
 676
 677         ctrl->pdev = pdev;
 678         status = beiscsi_map_pci_bars(phba, pdev);
 679         if (status)
 680                 return status;
 681         mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
 682         mbox_mem_alloc->va = pci_alloc_consistent(pdev,
 683                                                   mbox_mem_alloc->size,
 684                                                   &mbox_mem_alloc->dma);
 685         if (!mbox_mem_alloc->va) {
 686                 beiscsi_unmap_pci_function(phba);
 687                 return -ENOMEM;
 688         }
 689
 690         mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
 691         mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
 692         mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
 693         memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
 694         spin_lock_init(&ctrl->mbox_lock);
 695         spin_lock_init(&phba->ctrl.mcc_lock);
 696         spin_lock_init(&phba->ctrl.mcc_cq_lock);
 697
 698         return status;
 699 }
 700
 701 static void beiscsi_get_params(struct beiscsi_hba *phba)
 702 {
 703         phba->params.ios_per_ctrl = (phba->fw_config.iscsi_icd_count
 704                                     - (phba->fw_config.iscsi_cid_count
 705                                     + BE2_TMFS
 706                                     + BE2_NOPOUT_REQ));
 707         phba->params.cxns_per_ctrl = phba->fw_config.iscsi_cid_count;
 708         phba->params.asyncpdus_per_ctrl = phba->fw_config.iscsi_cid_count;
 709         phba->params.icds_per_ctrl = phba->fw_config.iscsi_icd_count;
 710         phba->params.num_sge_per_io = BE2_SGE;
 711         phba->params.defpdu_hdr_sz = BE2_DEFPDU_HDR_SZ;
 712         phba->params.defpdu_data_sz = BE2_DEFPDU_DATA_SZ;
 713         phba->params.eq_timer = 64;
 714         phba->params.num_eq_entries =
 715             (((BE2_CMDS_PER_CXN * 2 + phba->fw_config.iscsi_cid_count * 2
 716                                     + BE2_TMFS) / 512) + 1) * 512;
 717         phba->params.num_eq_entries = (phba->params.num_eq_entries < 1024)
 718                                 ? 1024 : phba->params.num_eq_entries;
 719         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
 720                     "BM_%d : phba->params.num_eq_entries=%d\n",
 721                     phba->params.num_eq_entries);
 722         phba->params.num_cq_entries =
 723             (((BE2_CMDS_PER_CXN * 2 +  phba->fw_config.iscsi_cid_count * 2
 724                                     + BE2_TMFS) / 512) + 1) * 512;
 725         phba->params.wrbs_per_cxn = 256;
 726 }
 727
 728 static void hwi_ring_eq_db(struct beiscsi_hba *phba,
 729                            unsigned int id, unsigned int clr_interrupt,
 730                            unsigned int num_processed,
 731                            unsigned char rearm, unsigned char event)
 732 {
 733         u32 val = 0;
 734         val |= id & DB_EQ_RING_ID_MASK;
 735         if (rearm)
 736                 val |= 1 << DB_EQ_REARM_SHIFT;
 737         if (clr_interrupt)
 738                 val |= 1 << DB_EQ_CLR_SHIFT;
 739         if (event)
 740                 val |= 1 << DB_EQ_EVNT_SHIFT;
 741         val |= num_processed << DB_EQ_NUM_POPPED_SHIFT;
 742         iowrite32(val, phba->db_va + DB_EQ_OFFSET);
 743 }
 744
 745 /**
 746  * be_isr_mcc - The isr routine of the driver.
 747  * @irq: Not used
 748  * @dev_id: Pointer to host adapter structure
 749  */
 750 static irqreturn_t be_isr_mcc(int irq, void *dev_id)
 751 {
 752         struct beiscsi_hba *phba;
 753         struct be_eq_entry *eqe = NULL;
 754         struct be_queue_info *eq;
 755         struct be_queue_info *mcc;
 756         unsigned int num_eq_processed;
 757         struct be_eq_obj *pbe_eq;
 758         unsigned long flags;
 759
 760         pbe_eq = dev_id;
 761         eq = &pbe_eq->q;
 762         phba =  pbe_eq->phba;
 763         mcc = &phba->ctrl.mcc_obj.cq;
 764         eqe = queue_tail_node(eq);
 765
 766         num_eq_processed = 0;
 767
 768         while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
 769                                 & EQE_VALID_MASK) {
 770                 if (((eqe->dw[offsetof(struct amap_eq_entry,
 771                      resource_id) / 32] &
 772                      EQE_RESID_MASK) >> 16) == mcc->id) {
 773                         spin_lock_irqsave(&phba->isr_lock, flags);
 774                         pbe_eq->todo_mcc_cq = true;
 775                         spin_unlock_irqrestore(&phba->isr_lock, flags);
 776                 }
 777                 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
 778                 queue_tail_inc(eq);
 779                 eqe = queue_tail_node(eq);
 780                 num_eq_processed++;
 781         }
 782         if (pbe_eq->todo_mcc_cq)
 783                 queue_work(phba->wq, &pbe_eq->work_cqs);
 784         if (num_eq_processed)
 785                 hwi_ring_eq_db(phba, eq->id, 1, num_eq_processed, 1, 1);
 786
 787         return IRQ_HANDLED;
 788 }
 789
 790 /**
 791  * be_isr_msix - The isr routine of the driver.
 792  * @irq: Not used
 793  * @dev_id: Pointer to host adapter structure
 794  */
 795 static irqreturn_t be_isr_msix(int irq, void *dev_id)
 796 {
 797         struct beiscsi_hba *phba;
 798         struct be_eq_entry *eqe = NULL;
 799         struct be_queue_info *eq;
 800         struct be_queue_info *cq;
 801         unsigned int num_eq_processed;
 802         struct be_eq_obj *pbe_eq;
 803         unsigned long flags;
 804
 805         pbe_eq = dev_id;
 806         eq = &pbe_eq->q;
 807         cq = pbe_eq->cq;
 808         eqe = queue_tail_node(eq);
 809
 810         phba = pbe_eq->phba;
 811         num_eq_processed = 0;
 812         if (blk_iopoll_enabled) {
 813                 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
 814                                         & EQE_VALID_MASK) {
 815                         if (!blk_iopoll_sched_prep(&pbe_eq->iopoll))
 816                                 blk_iopoll_sched(&pbe_eq->iopoll);
 817
 818                         AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
 819                         queue_tail_inc(eq);
 820                         eqe = queue_tail_node(eq);
 821                         num_eq_processed++;
 822                 }
 823         } else {
 824                 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
 825                                                 & EQE_VALID_MASK) {
 826                         spin_lock_irqsave(&phba->isr_lock, flags);
 827                         pbe_eq->todo_cq = true;
 828                         spin_unlock_irqrestore(&phba->isr_lock, flags);
 829                         AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
 830                         queue_tail_inc(eq);
 831                         eqe = queue_tail_node(eq);
 832                         num_eq_processed++;
 833                 }
 834
 835                 if (pbe_eq->todo_cq)
 836                         queue_work(phba->wq, &pbe_eq->work_cqs);
 837         }
 838
 839         if (num_eq_processed)
 840                 hwi_ring_eq_db(phba, eq->id, 1, num_eq_processed, 0, 1);
 841
 842         return IRQ_HANDLED;
 843 }
 844
 845 /**
 846  * be_isr - The isr routine of the driver.
 847  * @irq: Not used
 848  * @dev_id: Pointer to host adapter structure
 849  */
 850 static irqreturn_t be_isr(int irq, void *dev_id)
 851 {
 852         struct beiscsi_hba *phba;
 853         struct hwi_controller *phwi_ctrlr;
 854         struct hwi_context_memory *phwi_context;
 855         struct be_eq_entry *eqe = NULL;
 856         struct be_queue_info *eq;
 857         struct be_queue_info *cq;
 858         struct be_queue_info *mcc;
 859         unsigned long flags, index;
 860         unsigned int num_mcceq_processed, num_ioeq_processed;
 861         struct be_ctrl_info *ctrl;
 862         struct be_eq_obj *pbe_eq;
 863         int isr;
 864
 865         phba = dev_id;
 866         ctrl = &phba->ctrl;
 867         isr = ioread32(ctrl->csr + CEV_ISR0_OFFSET +
 868                        (PCI_FUNC(ctrl->pdev->devfn) * CEV_ISR_SIZE));
 869         if (!isr)
 870                 return IRQ_NONE;
 871
 872         phwi_ctrlr = phba->phwi_ctrlr;
 873         phwi_context = phwi_ctrlr->phwi_ctxt;
 874         pbe_eq = &phwi_context->be_eq[0];
 875
 876         eq = &phwi_context->be_eq[0].q;
 877         mcc = &phba->ctrl.mcc_obj.cq;
 878         index = 0;
 879         eqe = queue_tail_node(eq);
 880
 881         num_ioeq_processed = 0;
 882         num_mcceq_processed = 0;
 883         if (blk_iopoll_enabled) {
 884                 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
 885                                         & EQE_VALID_MASK) {
 886                         if (((eqe->dw[offsetof(struct amap_eq_entry,
 887                              resource_id) / 32] &
 888                              EQE_RESID_MASK) >> 16) == mcc->id) {
 889                                 spin_lock_irqsave(&phba->isr_lock, flags);
 890                                 pbe_eq->todo_mcc_cq = true;
 891                                 spin_unlock_irqrestore(&phba->isr_lock, flags);
 892                                 num_mcceq_processed++;
 893                         } else {
 894                                 if (!blk_iopoll_sched_prep(&pbe_eq->iopoll))
 895                                         blk_iopoll_sched(&pbe_eq->iopoll);
 896                                 num_ioeq_processed++;
 897                         }
 898                         AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
 899                         queue_tail_inc(eq);
 900                         eqe = queue_tail_node(eq);
 901                 }
 902                 if (num_ioeq_processed || num_mcceq_processed) {
 903                         if (pbe_eq->todo_mcc_cq)
 904                                 queue_work(phba->wq, &pbe_eq->work_cqs);
 905
 906                         if ((num_mcceq_processed) && (!num_ioeq_processed))
 907                                 hwi_ring_eq_db(phba, eq->id, 0,
 908                                               (num_ioeq_processed +
 909                                                num_mcceq_processed) , 1, 1);
 910                         else
 911                                 hwi_ring_eq_db(phba, eq->id, 0,
 912                                                (num_ioeq_processed +
 913                                                 num_mcceq_processed), 0, 1);
 914
 915                         return IRQ_HANDLED;
 916                 } else
 917                         return IRQ_NONE;
 918         } else {
 919                 cq = &phwi_context->be_cq[0];
 920                 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
 921                                                 & EQE_VALID_MASK) {
 922
 923                         if (((eqe->dw[offsetof(struct amap_eq_entry,
 924                              resource_id) / 32] &
 925                              EQE_RESID_MASK) >> 16) != cq->id) {
 926                                 spin_lock_irqsave(&phba->isr_lock, flags);
 927                                 pbe_eq->todo_mcc_cq = true;
 928                                 spin_unlock_irqrestore(&phba->isr_lock, flags);
 929                         } else {
 930                                 spin_lock_irqsave(&phba->isr_lock, flags);
 931                                 pbe_eq->todo_cq = true;
 932                                 spin_unlock_irqrestore(&phba->isr_lock, flags);
 933                         }
 934                         AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
 935                         queue_tail_inc(eq);
 936                         eqe = queue_tail_node(eq);
 937                         num_ioeq_processed++;
 938                 }
 939                 if (pbe_eq->todo_cq || pbe_eq->todo_mcc_cq)
 940                         queue_work(phba->wq, &pbe_eq->work_cqs);
 941
 942                 if (num_ioeq_processed) {
 943                         hwi_ring_eq_db(phba, eq->id, 0,
 944                                        num_ioeq_processed, 1, 1);
 945                         return IRQ_HANDLED;
 946                 } else
 947                         return IRQ_NONE;
 948         }
 949 }
 950
 951 static int beiscsi_init_irqs(struct beiscsi_hba *phba)
 952 {
 953         struct pci_dev *pcidev = phba->pcidev;
 954         struct hwi_controller *phwi_ctrlr;
 955         struct hwi_context_memory *phwi_context;
 956         int ret, msix_vec, i, j;
 957
 958         phwi_ctrlr = phba->phwi_ctrlr;
 959         phwi_context = phwi_ctrlr->phwi_ctxt;
 960
 961         if (phba->msix_enabled) {
 962                 for (i = 0; i < phba->num_cpus; i++) {
 963                         phba->msi_name[i] = kzalloc(BEISCSI_MSI_NAME,
 964                                                     GFP_KERNEL);
 965                         if (!phba->msi_name[i]) {
 966                                 ret = -ENOMEM;
 967                                 goto free_msix_irqs;
 968                         }
 969
 970                         sprintf(phba->msi_name[i], "beiscsi_%02x_%02x",
 971                                 phba->shost->host_no, i);
 972                         msix_vec = phba->msix_entries[i].vector;
 973                         ret = request_irq(msix_vec, be_isr_msix, 0,
 974                                           phba->msi_name[i],
 975                                           &phwi_context->be_eq[i]);
 976                         if (ret) {
 977                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
 978                                             "BM_%d : beiscsi_init_irqs-Failed to"
 979                                             "register msix for i = %d\n",
 980                                             i);
 981                                 kfree(phba->msi_name[i]);
 982                                 goto free_msix_irqs;
 983                         }
 984                 }
 985                 phba->msi_name[i] = kzalloc(BEISCSI_MSI_NAME, GFP_KERNEL);
 986                 if (!phba->msi_name[i]) {
 987                         ret = -ENOMEM;
 988                         goto free_msix_irqs;
 989                 }
 990                 sprintf(phba->msi_name[i], "beiscsi_mcc_%02x",
 991                         phba->shost->host_no);
 992                 msix_vec = phba->msix_entries[i].vector;
 993                 ret = request_irq(msix_vec, be_isr_mcc, 0, phba->msi_name[i],
 994                                   &phwi_context->be_eq[i]);
 995                 if (ret) {
 996                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT ,
 997                                     "BM_%d : beiscsi_init_irqs-"
 998                                     "Failed to register beiscsi_msix_mcc\n");
 999                         kfree(phba->msi_name[i]);
1000                         goto free_msix_irqs;
1001                 }
1002
1003         } else {
1004                 ret = request_irq(pcidev->irq, be_isr, IRQF_SHARED,
1005                                   "beiscsi", phba);
1006                 if (ret) {
1007                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
1008                                     "BM_%d : beiscsi_init_irqs-"
1009                                     "Failed to register irq\\n");
1010                         return ret;
1011                 }
1012         }
1013         return 0;
1014 free_msix_irqs:
1015         for (j = i - 1; j >= 0; j--) {
1016                 kfree(phba->msi_name[j]);
1017                 msix_vec = phba->msix_entries[j].vector;
1018                 free_irq(msix_vec, &phwi_context->be_eq[j]);
1019         }
1020         return ret;
1021 }
1022
1023 static void hwi_ring_cq_db(struct beiscsi_hba *phba,
1024                            unsigned int id, unsigned int num_processed,
1025                            unsigned char rearm, unsigned char event)
1026 {
1027         u32 val = 0;
1028         val |= id & DB_CQ_RING_ID_MASK;
1029         if (rearm)
1030                 val |= 1 << DB_CQ_REARM_SHIFT;
1031         val |= num_processed << DB_CQ_NUM_POPPED_SHIFT;
1032         iowrite32(val, phba->db_va + DB_CQ_OFFSET);
1033 }
1034
1035 static unsigned int
1036 beiscsi_process_async_pdu(struct beiscsi_conn *beiscsi_conn,
1037                           struct beiscsi_hba *phba,
1038                           struct pdu_base *ppdu,
1039                           unsigned long pdu_len,
1040                           void *pbuffer, unsigned long buf_len)
1041 {
1042         struct iscsi_conn *conn = beiscsi_conn->conn;
1043         struct iscsi_session *session = conn->session;
1044         struct iscsi_task *task;
1045         struct beiscsi_io_task *io_task;
1046         struct iscsi_hdr *login_hdr;
1047
1048         switch (ppdu->dw[offsetof(struct amap_pdu_base, opcode) / 32] &
1049                                                 PDUBASE_OPCODE_MASK) {
1050         case ISCSI_OP_NOOP_IN:
1051                 pbuffer = NULL;
1052                 buf_len = 0;
1053                 break;
1054         case ISCSI_OP_ASYNC_EVENT:
1055                 break;
1056         case ISCSI_OP_REJECT:
1057                 WARN_ON(!pbuffer);
1058                 WARN_ON(!(buf_len == 48));
1059                 beiscsi_log(phba, KERN_ERR,
1060                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1061                             "BM_%d : In ISCSI_OP_REJECT\n");
1062                 break;
1063         case ISCSI_OP_LOGIN_RSP:
1064         case ISCSI_OP_TEXT_RSP:
1065                 task = conn->login_task;
1066                 io_task = task->dd_data;
1067                 login_hdr = (struct iscsi_hdr *)ppdu;
1068                 login_hdr->itt = io_task->libiscsi_itt;
1069                 break;
1070         default:
1071                 beiscsi_log(phba, KERN_WARNING,
1072                             BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1073                             "BM_%d : Unrecognized opcode 0x%x in async msg\n",
1074                             (ppdu->
1075                              dw[offsetof(struct amap_pdu_base, opcode) / 32]
1076                              & PDUBASE_OPCODE_MASK));
1077                 return 1;
1078         }
1079
1080         spin_lock_bh(&session->lock);
1081         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)ppdu, pbuffer, buf_len);
1082         spin_unlock_bh(&session->lock);
1083         return 0;
1084 }
1085
1086 static struct sgl_handle *alloc_io_sgl_handle(struct beiscsi_hba *phba)
1087 {
1088         struct sgl_handle *psgl_handle;
1089
1090         if (phba->io_sgl_hndl_avbl) {
1091                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
1092                             "BM_%d : In alloc_io_sgl_handle,"
1093                             " io_sgl_alloc_index=%d\n",
1094                             phba->io_sgl_alloc_index);
1095
1096                 psgl_handle = phba->io_sgl_hndl_base[phba->
1097                                                 io_sgl_alloc_index];
1098                 phba->io_sgl_hndl_base[phba->io_sgl_alloc_index] = NULL;
1099                 phba->io_sgl_hndl_avbl--;
1100                 if (phba->io_sgl_alloc_index == (phba->params.
1101                                                  ios_per_ctrl - 1))
1102                         phba->io_sgl_alloc_index = 0;
1103                 else
1104                         phba->io_sgl_alloc_index++;
1105         } else
1106                 psgl_handle = NULL;
1107         return psgl_handle;
1108 }
1109
1110 static void
1111 free_io_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
1112 {
1113         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
1114                     "BM_%d : In free_,io_sgl_free_index=%d\n",
1115                     phba->io_sgl_free_index);
1116
1117         if (phba->io_sgl_hndl_base[phba->io_sgl_free_index]) {
1118                 /*
1119                  * this can happen if clean_task is called on a task that
1120                  * failed in xmit_task or alloc_pdu.
1121                  */
1122                  beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
1123                              "BM_%d : Double Free in IO SGL io_sgl_free_index=%d,"
1124                              "value there=%p\n", phba->io_sgl_free_index,
1125                              phba->io_sgl_hndl_base
1126                              [phba->io_sgl_free_index]);
1127                 return;
1128         }
1129         phba->io_sgl_hndl_base[phba->io_sgl_free_index] = psgl_handle;
1130         phba->io_sgl_hndl_avbl++;
1131         if (phba->io_sgl_free_index == (phba->params.ios_per_ctrl - 1))
1132                 phba->io_sgl_free_index = 0;
1133         else
1134                 phba->io_sgl_free_index++;
1135 }
1136
1137 /**
1138  * alloc_wrb_handle - To allocate a wrb handle
1139  * @phba: The hba pointer
1140  * @cid: The cid to use for allocation
1141  *
1142  * This happens under session_lock until submission to chip
1143  */
1144 struct wrb_handle *alloc_wrb_handle(struct beiscsi_hba *phba, unsigned int cid)
1145 {
1146         struct hwi_wrb_context *pwrb_context;
1147         struct hwi_controller *phwi_ctrlr;
1148         struct wrb_handle *pwrb_handle, *pwrb_handle_tmp;
1149         uint16_t cri_index = BE_GET_CRI_FROM_CID(cid);
1150
1151         phwi_ctrlr = phba->phwi_ctrlr;
1152         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1153         if (pwrb_context->wrb_handles_available >= 2) {
1154                 pwrb_handle = pwrb_context->pwrb_handle_base[
1155                                             pwrb_context->alloc_index];
1156                 pwrb_context->wrb_handles_available--;
1157                 if (pwrb_context->alloc_index ==
1158                                                 (phba->params.wrbs_per_cxn - 1))
1159                         pwrb_context->alloc_index = 0;
1160                 else
1161                         pwrb_context->alloc_index++;
1162                 pwrb_handle_tmp = pwrb_context->pwrb_handle_base[
1163                                                 pwrb_context->alloc_index];
1164                 pwrb_handle->nxt_wrb_index = pwrb_handle_tmp->wrb_index;
1165         } else
1166                 pwrb_handle = NULL;
1167         return pwrb_handle;
1168 }
1169
1170 /**
1171  * free_wrb_handle - To free the wrb handle back to pool
1172  * @phba: The hba pointer
1173  * @pwrb_context: The context to free from
1174  * @pwrb_handle: The wrb_handle to free
1175  *
1176  * This happens under session_lock until submission to chip
1177  */
1178 static void
1179 free_wrb_handle(struct beiscsi_hba *phba, struct hwi_wrb_context *pwrb_context,
1180                 struct wrb_handle *pwrb_handle)
1181 {
1182         pwrb_context->pwrb_handle_base[pwrb_context->free_index] = pwrb_handle;
1183         pwrb_context->wrb_handles_available++;
1184         if (pwrb_context->free_index == (phba->params.wrbs_per_cxn - 1))
1185                 pwrb_context->free_index = 0;
1186         else
1187                 pwrb_context->free_index++;
1188
1189         beiscsi_log(phba, KERN_INFO,
1190                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1191                     "BM_%d : FREE WRB: pwrb_handle=%p free_index=0x%x"
1192                     "wrb_handles_available=%d\n",
1193                     pwrb_handle, pwrb_context->free_index,
1194                     pwrb_context->wrb_handles_available);
1195 }
1196
1197 static struct sgl_handle *alloc_mgmt_sgl_handle(struct beiscsi_hba *phba)
1198 {
1199         struct sgl_handle *psgl_handle;
1200
1201         if (phba->eh_sgl_hndl_avbl) {
1202                 psgl_handle = phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index];
1203                 phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index] = NULL;
1204                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
1205                             "BM_%d : mgmt_sgl_alloc_index=%d=0x%x\n",
1206                             phba->eh_sgl_alloc_index,
1207                             phba->eh_sgl_alloc_index);
1208
1209                 phba->eh_sgl_hndl_avbl--;
1210                 if (phba->eh_sgl_alloc_index ==
1211                     (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl -
1212                      1))
1213                         phba->eh_sgl_alloc_index = 0;
1214                 else
1215                         phba->eh_sgl_alloc_index++;
1216         } else
1217                 psgl_handle = NULL;
1218         return psgl_handle;
1219 }
1220
1221 void
1222 free_mgmt_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
1223 {
1224
1225         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
1226                     "BM_%d : In  free_mgmt_sgl_handle,"
1227                     "eh_sgl_free_index=%d\n",
1228                     phba->eh_sgl_free_index);
1229
1230         if (phba->eh_sgl_hndl_base[phba->eh_sgl_free_index]) {
1231                 /*
1232                  * this can happen if clean_task is called on a task that
1233                  * failed in xmit_task or alloc_pdu.
1234                  */
1235                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_CONFIG,
1236                             "BM_%d : Double Free in eh SGL ,"
1237                             "eh_sgl_free_index=%d\n",
1238                             phba->eh_sgl_free_index);
1239                 return;
1240         }
1241         phba->eh_sgl_hndl_base[phba->eh_sgl_free_index] = psgl_handle;
1242         phba->eh_sgl_hndl_avbl++;
1243         if (phba->eh_sgl_free_index ==
1244             (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl - 1))
1245                 phba->eh_sgl_free_index = 0;
1246         else
1247                 phba->eh_sgl_free_index++;
1248 }
1249
1250 static void
1251 be_complete_io(struct beiscsi_conn *beiscsi_conn,
1252                 struct iscsi_task *task,
1253                 struct common_sol_cqe *csol_cqe)
1254 {
1255         struct beiscsi_io_task *io_task = task->dd_data;
1256         struct be_status_bhs *sts_bhs =
1257                                 (struct be_status_bhs *)io_task->cmd_bhs;
1258         struct iscsi_conn *conn = beiscsi_conn->conn;
1259         unsigned char *sense;
1260         u32 resid = 0, exp_cmdsn, max_cmdsn;
1261         u8 rsp, status, flags;
1262
1263         exp_cmdsn = csol_cqe->exp_cmdsn;
1264         max_cmdsn = (csol_cqe->exp_cmdsn +
1265                      csol_cqe->cmd_wnd - 1);
1266         rsp = csol_cqe->i_resp;
1267         status = csol_cqe->i_sts;
1268         flags = csol_cqe->i_flags;
1269         resid = csol_cqe->res_cnt;
1270
1271         if (!task->sc) {
1272                 if (io_task->scsi_cmnd)
1273                         scsi_dma_unmap(io_task->scsi_cmnd);
1274
1275                 return;
1276         }
1277         task->sc->result = (DID_OK << 16) | status;
1278         if (rsp != ISCSI_STATUS_CMD_COMPLETED) {
1279                 task->sc->result = DID_ERROR << 16;
1280                 goto unmap;
1281         }
1282
1283         /* bidi not initially supported */
1284         if (flags & (ISCSI_FLAG_CMD_UNDERFLOW | ISCSI_FLAG_CMD_OVERFLOW)) {
1285                 if (!status && (flags & ISCSI_FLAG_CMD_OVERFLOW))
1286                         task->sc->result = DID_ERROR << 16;
1287
1288                 if (flags & ISCSI_FLAG_CMD_UNDERFLOW) {
1289                         scsi_set_resid(task->sc, resid);
1290                         if (!status && (scsi_bufflen(task->sc) - resid <
1291                             task->sc->underflow))
1292                                 task->sc->result = DID_ERROR << 16;
1293                 }
1294         }
1295
1296         if (status == SAM_STAT_CHECK_CONDITION) {
1297                 u16 sense_len;
1298                 unsigned short *slen = (unsigned short *)sts_bhs->sense_info;
1299
1300                 sense = sts_bhs->sense_info + sizeof(unsigned short);
1301                 sense_len = be16_to_cpu(*slen);
1302                 memcpy(task->sc->sense_buffer, sense,
1303                        min_t(u16, sense_len, SCSI_SENSE_BUFFERSIZE));
1304         }
1305
1306         if (io_task->cmd_bhs->iscsi_hdr.flags & ISCSI_FLAG_CMD_READ)
1307                 conn->rxdata_octets += resid;
1308 unmap:
1309         scsi_dma_unmap(io_task->scsi_cmnd);
1310         iscsi_complete_scsi_task(task, exp_cmdsn, max_cmdsn);
1311 }
1312
1313 static void
1314 be_complete_logout(struct beiscsi_conn *beiscsi_conn,
1315                     struct iscsi_task *task,
1316                     struct common_sol_cqe *csol_cqe)
1317 {
1318         struct iscsi_logout_rsp *hdr;
1319         struct beiscsi_io_task *io_task = task->dd_data;
1320         struct iscsi_conn *conn = beiscsi_conn->conn;
1321
1322         hdr = (struct iscsi_logout_rsp *)task->hdr;
1323         hdr->opcode = ISCSI_OP_LOGOUT_RSP;
1324         hdr->t2wait = 5;
1325         hdr->t2retain = 0;
1326         hdr->flags = csol_cqe->i_flags;
1327         hdr->response = csol_cqe->i_resp;
1328         hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1329         hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1330                                      csol_cqe->cmd_wnd - 1);
1331
1332         hdr->dlength[0] = 0;
1333         hdr->dlength[1] = 0;
1334         hdr->dlength[2] = 0;
1335         hdr->hlength = 0;
1336         hdr->itt = io_task->libiscsi_itt;
1337         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1338 }
1339
1340 static void
1341 be_complete_tmf(struct beiscsi_conn *beiscsi_conn,
1342                  struct iscsi_task *task,
1343                  struct common_sol_cqe *csol_cqe)
1344 {
1345         struct iscsi_tm_rsp *hdr;
1346         struct iscsi_conn *conn = beiscsi_conn->conn;
1347         struct beiscsi_io_task *io_task = task->dd_data;
1348
1349         hdr = (struct iscsi_tm_rsp *)task->hdr;
1350         hdr->opcode = ISCSI_OP_SCSI_TMFUNC_RSP;
1351         hdr->flags = csol_cqe->i_flags;
1352         hdr->response = csol_cqe->i_resp;
1353         hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1354         hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1355                                      csol_cqe->cmd_wnd - 1);
1356
1357         hdr->itt = io_task->libiscsi_itt;
1358         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1359 }
1360
1361 static void
1362 hwi_complete_drvr_msgs(struct beiscsi_conn *beiscsi_conn,
1363                        struct beiscsi_hba *phba, struct sol_cqe *psol)
1364 {
1365         struct hwi_wrb_context *pwrb_context;
1366         struct wrb_handle *pwrb_handle = NULL;
1367         struct hwi_controller *phwi_ctrlr;
1368         struct iscsi_task *task;
1369         struct beiscsi_io_task *io_task;
1370         uint16_t wrb_index, cid, cri_index;
1371
1372         phwi_ctrlr = phba->phwi_ctrlr;
1373         if (is_chip_be2_be3r(phba)) {
1374                 wrb_index = AMAP_GET_BITS(struct amap_it_dmsg_cqe,
1375                                           wrb_idx, psol);
1376                 cid = AMAP_GET_BITS(struct amap_it_dmsg_cqe,
1377                                     cid, psol);
1378         } else {
1379                 wrb_index = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
1380                                           wrb_idx, psol);
1381                 cid = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
1382                                     cid, psol);
1383         }
1384
1385         cri_index = BE_GET_CRI_FROM_CID(cid);
1386         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1387         pwrb_handle = pwrb_context->pwrb_handle_basestd[wrb_index];
1388         task = pwrb_handle->pio_handle;
1389
1390         io_task = task->dd_data;
1391         memset(io_task->pwrb_handle->pwrb, 0, sizeof(struct iscsi_wrb));
1392         iscsi_put_task(task);
1393 }
1394
1395 static void
1396 be_complete_nopin_resp(struct beiscsi_conn *beiscsi_conn,
1397                         struct iscsi_task *task,
1398                         struct common_sol_cqe *csol_cqe)
1399 {
1400         struct iscsi_nopin *hdr;
1401         struct iscsi_conn *conn = beiscsi_conn->conn;
1402         struct beiscsi_io_task *io_task = task->dd_data;
1403
1404         hdr = (struct iscsi_nopin *)task->hdr;
1405         hdr->flags = csol_cqe->i_flags;
1406         hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1407         hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1408                                      csol_cqe->cmd_wnd - 1);
1409
1410         hdr->opcode = ISCSI_OP_NOOP_IN;
1411         hdr->itt = io_task->libiscsi_itt;
1412         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1413 }
1414
1415 static void adapter_get_sol_cqe(struct beiscsi_hba *phba,
1416                 struct sol_cqe *psol,
1417                 struct common_sol_cqe *csol_cqe)
1418 {
1419         if (is_chip_be2_be3r(phba)) {
1420                 csol_cqe->exp_cmdsn = AMAP_GET_BITS(struct amap_sol_cqe,
1421                                                     i_exp_cmd_sn, psol);
1422                 csol_cqe->res_cnt = AMAP_GET_BITS(struct amap_sol_cqe,
1423                                                   i_res_cnt, psol);
1424                 csol_cqe->cmd_wnd = AMAP_GET_BITS(struct amap_sol_cqe,
1425                                                   i_cmd_wnd, psol);
1426                 csol_cqe->wrb_index = AMAP_GET_BITS(struct amap_sol_cqe,
1427                                                     wrb_index, psol);
1428                 csol_cqe->cid = AMAP_GET_BITS(struct amap_sol_cqe,
1429                                               cid, psol);
1430                 csol_cqe->hw_sts = AMAP_GET_BITS(struct amap_sol_cqe,
1431                                                  hw_sts, psol);
1432                 csol_cqe->i_resp = AMAP_GET_BITS(struct amap_sol_cqe,
1433                                                  i_resp, psol);
1434                 csol_cqe->i_sts = AMAP_GET_BITS(struct amap_sol_cqe,
1435                                                 i_sts, psol);
1436                 csol_cqe->i_flags = AMAP_GET_BITS(struct amap_sol_cqe,
1437                                                   i_flags, psol);
1438         } else {
1439                 csol_cqe->exp_cmdsn = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1440                                                     i_exp_cmd_sn, psol);
1441                 csol_cqe->res_cnt = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1442                                                   i_res_cnt, psol);
1443                 csol_cqe->wrb_index = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1444                                                     wrb_index, psol);
1445                 csol_cqe->cid = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1446                                               cid, psol);
1447                 csol_cqe->hw_sts = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1448                                                  hw_sts, psol);
1449                 csol_cqe->cmd_wnd = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1450                                                   i_cmd_wnd, psol);
1451                 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1452                                   cmd_cmpl, psol))
1453                         csol_cqe->i_sts = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1454                                                         i_sts, psol);
1455                 else
1456                         csol_cqe->i_resp = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1457                                                          i_sts, psol);
1458                 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1459                                   u, psol))
1460                         csol_cqe->i_flags = ISCSI_FLAG_CMD_UNDERFLOW;
1461
1462                 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1463                                   o, psol))
1464                         csol_cqe->i_flags |= ISCSI_FLAG_CMD_OVERFLOW;
1465         }
1466 }
1467
1468
1469 static void hwi_complete_cmd(struct beiscsi_conn *beiscsi_conn,
1470                              struct beiscsi_hba *phba, struct sol_cqe *psol)
1471 {
1472         struct hwi_wrb_context *pwrb_context;
1473         struct wrb_handle *pwrb_handle;
1474         struct iscsi_wrb *pwrb = NULL;
1475         struct hwi_controller *phwi_ctrlr;
1476         struct iscsi_task *task;
1477         unsigned int type;
1478         struct iscsi_conn *conn = beiscsi_conn->conn;
1479         struct iscsi_session *session = conn->session;
1480         struct common_sol_cqe csol_cqe = {0};
1481         uint16_t cri_index = 0;
1482
1483         phwi_ctrlr = phba->phwi_ctrlr;
1484
1485         /* Copy the elements to a common structure */
1486         adapter_get_sol_cqe(phba, psol, &csol_cqe);
1487
1488         cri_index = BE_GET_CRI_FROM_CID(csol_cqe.cid);
1489         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1490
1491         pwrb_handle = pwrb_context->pwrb_handle_basestd[
1492                       csol_cqe.wrb_index];
1493
1494         task = pwrb_handle->pio_handle;
1495         pwrb = pwrb_handle->pwrb;
1496         type = ((struct beiscsi_io_task *)task->dd_data)->wrb_type;
1497
1498         spin_lock_bh(&session->lock);
1499         switch (type) {
1500         case HWH_TYPE_IO:
1501         case HWH_TYPE_IO_RD:
1502                 if ((task->hdr->opcode & ISCSI_OPCODE_MASK) ==
1503                      ISCSI_OP_NOOP_OUT)
1504                         be_complete_nopin_resp(beiscsi_conn, task, &csol_cqe);
1505                 else
1506                         be_complete_io(beiscsi_conn, task, &csol_cqe);
1507                 break;
1508
1509         case HWH_TYPE_LOGOUT:
1510                 if ((task->hdr->opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGOUT)
1511                         be_complete_logout(beiscsi_conn, task, &csol_cqe);
1512                 else
1513                         be_complete_tmf(beiscsi_conn, task, &csol_cqe);
1514                 break;
1515
1516         case HWH_TYPE_LOGIN:
1517                 beiscsi_log(phba, KERN_ERR,
1518                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1519                             "BM_%d :\t\t No HWH_TYPE_LOGIN Expected in"
1520                             " hwi_complete_cmd- Solicited path\n");
1521                 break;
1522
1523         case HWH_TYPE_NOP:
1524                 be_complete_nopin_resp(beiscsi_conn, task, &csol_cqe);
1525                 break;
1526
1527         default:
1528                 beiscsi_log(phba, KERN_WARNING,
1529                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1530                             "BM_%d : In hwi_complete_cmd, unknown type = %d"
1531                             "wrb_index 0x%x CID 0x%x\n", type,
1532                             csol_cqe.wrb_index,
1533                             csol_cqe.cid);
1534                 break;
1535         }
1536
1537         spin_unlock_bh(&session->lock);
1538 }
1539
1540 static struct list_head *hwi_get_async_busy_list(struct hwi_async_pdu_context
1541                                           *pasync_ctx, unsigned int is_header,
1542                                           unsigned int host_write_ptr)
1543 {
1544         if (is_header)
1545                 return &pasync_ctx->async_entry[host_write_ptr].
1546                     header_busy_list;
1547         else
1548                 return &pasync_ctx->async_entry[host_write_ptr].data_busy_list;
1549 }
1550
1551 static struct async_pdu_handle *
1552 hwi_get_async_handle(struct beiscsi_hba *phba,
1553                      struct beiscsi_conn *beiscsi_conn,
1554                      struct hwi_async_pdu_context *pasync_ctx,
1555                      struct i_t_dpdu_cqe *pdpdu_cqe, unsigned int *pcq_index)
1556 {
1557         struct be_bus_address phys_addr;
1558         struct list_head *pbusy_list;
1559         struct async_pdu_handle *pasync_handle = NULL;
1560         unsigned char is_header = 0;
1561         unsigned int index, dpl;
1562
1563         if (is_chip_be2_be3r(phba)) {
1564                 dpl = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1565                                     dpl, pdpdu_cqe);
1566                 index = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1567                                       index, pdpdu_cqe);
1568         } else {
1569                 dpl = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
1570                                     dpl, pdpdu_cqe);
1571                 index = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
1572                                       index, pdpdu_cqe);
1573         }
1574
1575         phys_addr.u.a32.address_lo =
1576                 (pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
1577                                         db_addr_lo) / 32] - dpl);
1578         phys_addr.u.a32.address_hi =
1579                 pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
1580                                        db_addr_hi) / 32];
1581
1582         phys_addr.u.a64.address =
1583                         *((unsigned long long *)(&phys_addr.u.a64.address));
1584
1585         switch (pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe, code) / 32]
1586                         & PDUCQE_CODE_MASK) {
1587         case UNSOL_HDR_NOTIFY:
1588                 is_header = 1;
1589
1590                  pbusy_list = hwi_get_async_busy_list(pasync_ctx,
1591                                                       is_header, index);
1592                 break;
1593         case UNSOL_DATA_NOTIFY:
1594                  pbusy_list = hwi_get_async_busy_list(pasync_ctx,
1595                                                       is_header, index);
1596                 break;
1597         default:
1598                 pbusy_list = NULL;
1599                 beiscsi_log(phba, KERN_WARNING,
1600                             BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1601                             "BM_%d : Unexpected code=%d\n",
1602                             pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
1603                             code) / 32] & PDUCQE_CODE_MASK);
1604                 return NULL;
1605         }
1606
1607         WARN_ON(list_empty(pbusy_list));
1608         list_for_each_entry(pasync_handle, pbusy_list, link) {
1609                 if (pasync_handle->pa.u.a64.address == phys_addr.u.a64.address)
1610                         break;
1611         }
1612
1613         WARN_ON(!pasync_handle);
1614
1615         pasync_handle->cri =
1616                         BE_GET_CRI_FROM_CID(beiscsi_conn->beiscsi_conn_cid);
1617         pasync_handle->is_header = is_header;
1618         pasync_handle->buffer_len = dpl;
1619         *pcq_index = index;
1620
1621         return pasync_handle;
1622 }
1623
1624 static unsigned int
1625 hwi_update_async_writables(struct beiscsi_hba *phba,
1626                             struct hwi_async_pdu_context *pasync_ctx,
1627                             unsigned int is_header, unsigned int cq_index)
1628 {
1629         struct list_head *pbusy_list;
1630         struct async_pdu_handle *pasync_handle;
1631         unsigned int num_entries, writables = 0;
1632         unsigned int *pep_read_ptr, *pwritables;
1633
1634         num_entries = pasync_ctx->num_entries;
1635         if (is_header) {
1636                 pep_read_ptr = &pasync_ctx->async_header.ep_read_ptr;
1637                 pwritables = &pasync_ctx->async_header.writables;
1638         } else {
1639                 pep_read_ptr = &pasync_ctx->async_data.ep_read_ptr;
1640                 pwritables = &pasync_ctx->async_data.writables;
1641         }
1642
1643         while ((*pep_read_ptr) != cq_index) {
1644                 (*pep_read_ptr)++;
1645                 *pep_read_ptr = (*pep_read_ptr) % num_entries;
1646
1647                 pbusy_list = hwi_get_async_busy_list(pasync_ctx, is_header,
1648                                                      *pep_read_ptr);
1649                 if (writables == 0)
1650                         WARN_ON(list_empty(pbusy_list));
1651
1652                 if (!list_empty(pbusy_list)) {
1653                         pasync_handle = list_entry(pbusy_list->next,
1654                                                    struct async_pdu_handle,
1655                                                    link);
1656                         WARN_ON(!pasync_handle);
1657                         pasync_handle->consumed = 1;
1658                 }
1659
1660                 writables++;
1661         }
1662
1663         if (!writables) {
1664                 beiscsi_log(phba, KERN_ERR,
1665                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1666                             "BM_%d : Duplicate notification received - index 0x%x!!\n",
1667                             cq_index);
1668                 WARN_ON(1);
1669         }
1670
1671         *pwritables = *pwritables + writables;
1672         return 0;
1673 }
1674
1675 static void hwi_free_async_msg(struct beiscsi_hba *phba,
1676                                        unsigned int cri)
1677 {
1678         struct hwi_controller *phwi_ctrlr;
1679         struct hwi_async_pdu_context *pasync_ctx;
1680         struct async_pdu_handle *pasync_handle, *tmp_handle;
1681         struct list_head *plist;
1682
1683         phwi_ctrlr = phba->phwi_ctrlr;
1684         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr);
1685
1686         plist  = &pasync_ctx->async_entry[cri].wait_queue.list;
1687
1688         list_for_each_entry_safe(pasync_handle, tmp_handle, plist, link) {
1689                 list_del(&pasync_handle->link);
1690
1691                 if (pasync_handle->is_header) {
1692                         list_add_tail(&pasync_handle->link,
1693                                       &pasync_ctx->async_header.free_list);
1694                         pasync_ctx->async_header.free_entries++;
1695                 } else {
1696                         list_add_tail(&pasync_handle->link,
1697                                       &pasync_ctx->async_data.free_list);
1698                         pasync_ctx->async_data.free_entries++;
1699                 }
1700         }
1701
1702         INIT_LIST_HEAD(&pasync_ctx->async_entry[cri].wait_queue.list);
1703         pasync_ctx->async_entry[cri].wait_queue.hdr_received = 0;
1704         pasync_ctx->async_entry[cri].wait_queue.bytes_received = 0;
1705 }
1706
1707 static struct phys_addr *
1708 hwi_get_ring_address(struct hwi_async_pdu_context *pasync_ctx,
1709                      unsigned int is_header, unsigned int host_write_ptr)
1710 {
1711         struct phys_addr *pasync_sge = NULL;
1712
1713         if (is_header)
1714                 pasync_sge = pasync_ctx->async_header.ring_base;
1715         else
1716                 pasync_sge = pasync_ctx->async_data.ring_base;
1717
1718         return pasync_sge + host_write_ptr;
1719 }
1720
1721 static void hwi_post_async_buffers(struct beiscsi_hba *phba,
1722                                    unsigned int is_header)
1723 {
1724         struct hwi_controller *phwi_ctrlr;
1725         struct hwi_async_pdu_context *pasync_ctx;
1726         struct async_pdu_handle *pasync_handle;
1727         struct list_head *pfree_link, *pbusy_list;
1728         struct phys_addr *pasync_sge;
1729         unsigned int ring_id, num_entries;
1730         unsigned int host_write_num;
1731         unsigned int writables;
1732         unsigned int i = 0;
1733         u32 doorbell = 0;
1734
1735         phwi_ctrlr = phba->phwi_ctrlr;
1736         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr);
1737         num_entries = pasync_ctx->num_entries;
1738
1739         if (is_header) {
1740                 writables = min(pasync_ctx->async_header.writables,
1741                                 pasync_ctx->async_header.free_entries);
1742                 pfree_link = pasync_ctx->async_header.free_list.next;
1743                 host_write_num = pasync_ctx->async_header.host_write_ptr;
1744                 ring_id = phwi_ctrlr->default_pdu_hdr.id;
1745         } else {
1746                 writables = min(pasync_ctx->async_data.writables,
1747                                 pasync_ctx->async_data.free_entries);
1748                 pfree_link = pasync_ctx->async_data.free_list.next;
1749                 host_write_num = pasync_ctx->async_data.host_write_ptr;
1750                 ring_id = phwi_ctrlr->default_pdu_data.id;
1751         }
1752
1753         writables = (writables / 8) * 8;
1754         if (writables) {
1755                 for (i = 0; i < writables; i++) {
1756                         pbusy_list =
1757                             hwi_get_async_busy_list(pasync_ctx, is_header,
1758                                                     host_write_num);
1759                         pasync_handle =
1760                             list_entry(pfree_link, struct async_pdu_handle,
1761                                                                 link);
1762                         WARN_ON(!pasync_handle);
1763                         pasync_handle->consumed = 0;
1764
1765                         pfree_link = pfree_link->next;
1766
1767                         pasync_sge = hwi_get_ring_address(pasync_ctx,
1768                                                 is_header, host_write_num);
1769
1770                         pasync_sge->hi = pasync_handle->pa.u.a32.address_lo;
1771                         pasync_sge->lo = pasync_handle->pa.u.a32.address_hi;
1772
1773                         list_move(&pasync_handle->link, pbusy_list);
1774
1775                         host_write_num++;
1776                         host_write_num = host_write_num % num_entries;
1777                 }
1778
1779                 if (is_header) {
1780                         pasync_ctx->async_header.host_write_ptr =
1781                                                         host_write_num;
1782                         pasync_ctx->async_header.free_entries -= writables;
1783                         pasync_ctx->async_header.writables -= writables;
1784                         pasync_ctx->async_header.busy_entries += writables;
1785                 } else {
1786                         pasync_ctx->async_data.host_write_ptr = host_write_num;
1787                         pasync_ctx->async_data.free_entries -= writables;
1788                         pasync_ctx->async_data.writables -= writables;
1789                         pasync_ctx->async_data.busy_entries += writables;
1790                 }
1791
1792                 doorbell |= ring_id & DB_DEF_PDU_RING_ID_MASK;
1793                 doorbell |= 1 << DB_DEF_PDU_REARM_SHIFT;
1794                 doorbell |= 0 << DB_DEF_PDU_EVENT_SHIFT;
1795                 doorbell |= (writables & DB_DEF_PDU_CQPROC_MASK)
1796                                         << DB_DEF_PDU_CQPROC_SHIFT;
1797
1798                 iowrite32(doorbell, phba->db_va + DB_RXULP0_OFFSET);
1799         }
1800 }
1801
1802 static void hwi_flush_default_pdu_buffer(struct beiscsi_hba *phba,
1803                                          struct beiscsi_conn *beiscsi_conn,
1804                                          struct i_t_dpdu_cqe *pdpdu_cqe)
1805 {
1806         struct hwi_controller *phwi_ctrlr;
1807         struct hwi_async_pdu_context *pasync_ctx;
1808         struct async_pdu_handle *pasync_handle = NULL;
1809         unsigned int cq_index = -1;
1810
1811         phwi_ctrlr = phba->phwi_ctrlr;
1812         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr);
1813
1814         pasync_handle = hwi_get_async_handle(phba, beiscsi_conn, pasync_ctx,
1815                                              pdpdu_cqe, &cq_index);
1816         BUG_ON(pasync_handle->is_header != 0);
1817         if (pasync_handle->consumed == 0)
1818                 hwi_update_async_writables(phba, pasync_ctx,
1819                                            pasync_handle->is_header, cq_index);
1820
1821         hwi_free_async_msg(phba, pasync_handle->cri);
1822         hwi_post_async_buffers(phba, pasync_handle->is_header);
1823 }
1824
1825 static unsigned int
1826 hwi_fwd_async_msg(struct beiscsi_conn *beiscsi_conn,
1827                   struct beiscsi_hba *phba,
1828                   struct hwi_async_pdu_context *pasync_ctx, unsigned short cri)
1829 {
1830         struct list_head *plist;
1831         struct async_pdu_handle *pasync_handle;
1832         void *phdr = NULL;
1833         unsigned int hdr_len = 0, buf_len = 0;
1834         unsigned int status, index = 0, offset = 0;
1835         void *pfirst_buffer = NULL;
1836         unsigned int num_buf = 0;
1837
1838         plist = &pasync_ctx->async_entry[cri].wait_queue.list;
1839
1840         list_for_each_entry(pasync_handle, plist, link) {
1841                 if (index == 0) {
1842                         phdr = pasync_handle->pbuffer;
1843                         hdr_len = pasync_handle->buffer_len;
1844                 } else {
1845                         buf_len = pasync_handle->buffer_len;
1846                         if (!num_buf) {
1847                                 pfirst_buffer = pasync_handle->pbuffer;
1848                                 num_buf++;
1849                         }
1850                         memcpy(pfirst_buffer + offset,
1851                                pasync_handle->pbuffer, buf_len);
1852                         offset += buf_len;
1853                 }
1854                 index++;
1855         }
1856
1857         status = beiscsi_process_async_pdu(beiscsi_conn, phba,
1858                                             phdr, hdr_len, pfirst_buffer,
1859                                             offset);
1860
1861         hwi_free_async_msg(phba, cri);
1862         return 0;
1863 }
1864
1865 static unsigned int
1866 hwi_gather_async_pdu(struct beiscsi_conn *beiscsi_conn,
1867                      struct beiscsi_hba *phba,
1868                      struct async_pdu_handle *pasync_handle)
1869 {
1870         struct hwi_async_pdu_context *pasync_ctx;
1871         struct hwi_controller *phwi_ctrlr;
1872         unsigned int bytes_needed = 0, status = 0;
1873         unsigned short cri = pasync_handle->cri;
1874         struct pdu_base *ppdu;
1875
1876         phwi_ctrlr = phba->phwi_ctrlr;
1877         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr);
1878
1879         list_del(&pasync_handle->link);
1880         if (pasync_handle->is_header) {
1881                 pasync_ctx->async_header.busy_entries--;
1882                 if (pasync_ctx->async_entry[cri].wait_queue.hdr_received) {
1883                         hwi_free_async_msg(phba, cri);
1884                         BUG();
1885                 }
1886
1887                 pasync_ctx->async_entry[cri].wait_queue.bytes_received = 0;
1888                 pasync_ctx->async_entry[cri].wait_queue.hdr_received = 1;
1889                 pasync_ctx->async_entry[cri].wait_queue.hdr_len =
1890                                 (unsigned short)pasync_handle->buffer_len;
1891                 list_add_tail(&pasync_handle->link,
1892                               &pasync_ctx->async_entry[cri].wait_queue.list);
1893
1894                 ppdu = pasync_handle->pbuffer;
1895                 bytes_needed = ((((ppdu->dw[offsetof(struct amap_pdu_base,
1896                         data_len_hi) / 32] & PDUBASE_DATALENHI_MASK) << 8) &
1897                         0xFFFF0000) | ((be16_to_cpu((ppdu->
1898                         dw[offsetof(struct amap_pdu_base, data_len_lo) / 32]
1899                         & PDUBASE_DATALENLO_MASK) >> 16)) & 0x0000FFFF));
1900
1901                 if (status == 0) {
1902                         pasync_ctx->async_entry[cri].wait_queue.bytes_needed =
1903                             bytes_needed;
1904
1905                         if (bytes_needed == 0)
1906                                 status = hwi_fwd_async_msg(beiscsi_conn, phba,
1907                                                            pasync_ctx, cri);
1908                 }
1909         } else {
1910                 pasync_ctx->async_data.busy_entries--;
1911                 if (pasync_ctx->async_entry[cri].wait_queue.hdr_received) {
1912                         list_add_tail(&pasync_handle->link,
1913                                       &pasync_ctx->async_entry[cri].wait_queue.
1914                                       list);
1915                         pasync_ctx->async_entry[cri].wait_queue.
1916                                 bytes_received +=
1917                                 (unsigned short)pasync_handle->buffer_len;
1918
1919                         if (pasync_ctx->async_entry[cri].wait_queue.
1920                             bytes_received >=
1921                             pasync_ctx->async_entry[cri].wait_queue.
1922                             bytes_needed)
1923                                 status = hwi_fwd_async_msg(beiscsi_conn, phba,
1924                                                            pasync_ctx, cri);
1925                 }
1926         }
1927         return status;
1928 }
1929
1930 static void hwi_process_default_pdu_ring(struct beiscsi_conn *beiscsi_conn,
1931                                          struct beiscsi_hba *phba,
1932                                          struct i_t_dpdu_cqe *pdpdu_cqe)
1933 {
1934         struct hwi_controller *phwi_ctrlr;
1935         struct hwi_async_pdu_context *pasync_ctx;
1936         struct async_pdu_handle *pasync_handle = NULL;
1937         unsigned int cq_index = -1;
1938
1939         phwi_ctrlr = phba->phwi_ctrlr;
1940         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr);
1941         pasync_handle = hwi_get_async_handle(phba, beiscsi_conn, pasync_ctx,
1942                                              pdpdu_cqe, &cq_index);
1943
1944         if (pasync_handle->consumed == 0)
1945                 hwi_update_async_writables(phba, pasync_ctx,
1946                                            pasync_handle->is_header, cq_index);
1947
1948         hwi_gather_async_pdu(beiscsi_conn, phba, pasync_handle);
1949         hwi_post_async_buffers(phba, pasync_handle->is_header);
1950 }
1951
1952 static void  beiscsi_process_mcc_isr(struct beiscsi_hba *phba)
1953 {
1954         struct be_queue_info *mcc_cq;
1955         struct  be_mcc_compl *mcc_compl;
1956         unsigned int num_processed = 0;
1957
1958         mcc_cq = &phba->ctrl.mcc_obj.cq;
1959         mcc_compl = queue_tail_node(mcc_cq);
1960         mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
1961         while (mcc_compl->flags & CQE_FLAGS_VALID_MASK) {
1962
1963                 if (num_processed >= 32) {
1964                         hwi_ring_cq_db(phba, mcc_cq->id,
1965                                         num_processed, 0, 0);
1966                         num_processed = 0;
1967                 }
1968                 if (mcc_compl->flags & CQE_FLAGS_ASYNC_MASK) {
1969                         /* Interpret flags as an async trailer */
1970                         if (is_link_state_evt(mcc_compl->flags))
1971                                 /* Interpret compl as a async link evt */
1972                                 beiscsi_async_link_state_process(phba,
1973                                 (struct be_async_event_link_state *) mcc_compl);
1974                         else
1975                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_MBOX,
1976                                             "BM_%d :  Unsupported Async Event, flags"
1977                                             " = 0x%08x\n",
1978                                             mcc_compl->flags);
1979                 } else if (mcc_compl->flags & CQE_FLAGS_COMPLETED_MASK) {
1980                         be_mcc_compl_process_isr(&phba->ctrl, mcc_compl);
1981                         atomic_dec(&phba->ctrl.mcc_obj.q.used);
1982                 }
1983
1984                 mcc_compl->flags = 0;
1985                 queue_tail_inc(mcc_cq);
1986                 mcc_compl = queue_tail_node(mcc_cq);
1987                 mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
1988                 num_processed++;
1989         }
1990
1991         if (num_processed > 0)
1992                 hwi_ring_cq_db(phba, mcc_cq->id, num_processed, 1, 0);
1993
1994 }
1995
1996 /**
1997  * beiscsi_process_cq()- Process the Completion Queue
1998  * @pbe_eq: Event Q on which the Completion has come
1999  *
2000  * return
2001  *     Number of Completion Entries processed.
2002  **/
2003 static unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq)
2004 {
2005         struct be_queue_info *cq;
2006         struct sol_cqe *sol;
2007         struct dmsg_cqe *dmsg;
2008         unsigned int num_processed = 0;
2009         unsigned int tot_nump = 0;
2010         unsigned short code = 0, cid = 0;
2011         uint16_t cri_index = 0;
2012         struct beiscsi_conn *beiscsi_conn;
2013         struct beiscsi_endpoint *beiscsi_ep;
2014         struct iscsi_endpoint *ep;
2015         struct beiscsi_hba *phba;
2016
2017         cq = pbe_eq->cq;
2018         sol = queue_tail_node(cq);
2019         phba = pbe_eq->phba;
2020
2021         while (sol->dw[offsetof(struct amap_sol_cqe, valid) / 32] &
2022                CQE_VALID_MASK) {
2023                 be_dws_le_to_cpu(sol, sizeof(struct sol_cqe));
2024
2025                  code = (sol->dw[offsetof(struct amap_sol_cqe, code) /
2026                          32] & CQE_CODE_MASK);
2027
2028                  /* Get the CID */
2029                 if (is_chip_be2_be3r(phba)) {
2030                         cid = AMAP_GET_BITS(struct amap_sol_cqe, cid, sol);
2031                 } else {
2032                         if ((code == DRIVERMSG_NOTIFY) ||
2033                             (code == UNSOL_HDR_NOTIFY) ||
2034                             (code == UNSOL_DATA_NOTIFY))
2035                                 cid = AMAP_GET_BITS(
2036                                                     struct amap_i_t_dpdu_cqe_v2,
2037                                                     cid, sol);
2038                          else
2039                                  cid = AMAP_GET_BITS(struct amap_sol_cqe_v2,
2040                                                      cid, sol);
2041                 }
2042
2043                 cri_index = BE_GET_CRI_FROM_CID(cid);
2044                 ep = phba->ep_array[cri_index];
2045                 beiscsi_ep = ep->dd_data;
2046                 beiscsi_conn = beiscsi_ep->conn;
2047
2048                 if (num_processed >= 32) {
2049                         hwi_ring_cq_db(phba, cq->id,
2050                                         num_processed, 0, 0);
2051                         tot_nump += num_processed;
2052                         num_processed = 0;
2053                 }
2054
2055                 switch (code) {
2056                 case SOL_CMD_COMPLETE:
2057                         hwi_complete_cmd(beiscsi_conn, phba, sol);
2058                         break;
2059                 case DRIVERMSG_NOTIFY:
2060                         beiscsi_log(phba, KERN_INFO,
2061                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2062                                     "BM_%d : Received %s[%d] on CID : %d\n",
2063                                     cqe_desc[code], code, cid);
2064
2065                         dmsg = (struct dmsg_cqe *)sol;
2066                         hwi_complete_drvr_msgs(beiscsi_conn, phba, sol);
2067                         break;
2068                 case UNSOL_HDR_NOTIFY:
2069                         beiscsi_log(phba, KERN_INFO,
2070                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2071                                     "BM_%d : Received %s[%d] on CID : %d\n",
2072                                     cqe_desc[code], code, cid);
2073
2074                         hwi_process_default_pdu_ring(beiscsi_conn, phba,
2075                                              (struct i_t_dpdu_cqe *)sol);
2076                         break;
2077                 case UNSOL_DATA_NOTIFY:
2078                         beiscsi_log(phba, KERN_INFO,
2079                                     BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2080                                     "BM_%d : Received %s[%d] on CID : %d\n",
2081                                     cqe_desc[code], code, cid);
2082
2083                         hwi_process_default_pdu_ring(beiscsi_conn, phba,
2084                                              (struct i_t_dpdu_cqe *)sol);
2085                         break;
2086                 case CXN_INVALIDATE_INDEX_NOTIFY:
2087                 case CMD_INVALIDATED_NOTIFY:
2088                 case CXN_INVALIDATE_NOTIFY:
2089                         beiscsi_log(phba, KERN_ERR,
2090                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2091                                     "BM_%d : Ignoring %s[%d] on CID : %d\n",
2092                                     cqe_desc[code], code, cid);
2093                         break;
2094                 case SOL_CMD_KILLED_DATA_DIGEST_ERR:
2095                 case CMD_KILLED_INVALID_STATSN_RCVD:
2096                 case CMD_KILLED_INVALID_R2T_RCVD:
2097                 case CMD_CXN_KILLED_LUN_INVALID:
2098                 case CMD_CXN_KILLED_ICD_INVALID:
2099                 case CMD_CXN_KILLED_ITT_INVALID:
2100                 case CMD_CXN_KILLED_SEQ_OUTOFORDER:
2101                 case CMD_CXN_KILLED_INVALID_DATASN_RCVD:
2102                         beiscsi_log(phba, KERN_ERR,
2103                                     BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2104                                     "BM_%d : Cmd Notification %s[%d] on CID : %d\n",
2105                                     cqe_desc[code], code,  cid);
2106                         break;
2107                 case UNSOL_DATA_DIGEST_ERROR_NOTIFY:
2108                         beiscsi_log(phba, KERN_ERR,
2109                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2110                                     "BM_%d :  Dropping %s[%d] on DPDU ring on CID : %d\n",
2111                                     cqe_desc[code], code, cid);
2112                         hwi_flush_default_pdu_buffer(phba, beiscsi_conn,
2113                                              (struct i_t_dpdu_cqe *) sol);
2114                         break;
2115                 case CXN_KILLED_PDU_SIZE_EXCEEDS_DSL:
2116                 case CXN_KILLED_BURST_LEN_MISMATCH:
2117                 case CXN_KILLED_AHS_RCVD:
2118                 case CXN_KILLED_HDR_DIGEST_ERR:
2119                 case CXN_KILLED_UNKNOWN_HDR:
2120                 case CXN_KILLED_STALE_ITT_TTT_RCVD:
2121                 case CXN_KILLED_INVALID_ITT_TTT_RCVD:
2122                 case CXN_KILLED_TIMED_OUT:
2123                 case CXN_KILLED_FIN_RCVD:
2124                 case CXN_KILLED_RST_SENT:
2125                 case CXN_KILLED_RST_RCVD:
2126                 case CXN_KILLED_BAD_UNSOL_PDU_RCVD:
2127                 case CXN_KILLED_BAD_WRB_INDEX_ERROR:
2128                 case CXN_KILLED_OVER_RUN_RESIDUAL:
2129                 case CXN_KILLED_UNDER_RUN_RESIDUAL:
2130                 case CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN:
2131                         beiscsi_log(phba, KERN_ERR,
2132                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2133                                     "BM_%d : Event %s[%d] received on CID : %d\n",
2134                                     cqe_desc[code], code, cid);
2135                         if (beiscsi_conn)
2136                                 iscsi_conn_failure(beiscsi_conn->conn,
2137                                                    ISCSI_ERR_CONN_FAILED);
2138                         break;
2139                 default:
2140                         beiscsi_log(phba, KERN_ERR,
2141                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2142                                     "BM_%d : Invalid CQE Event Received Code : %d"
2143                                     "CID 0x%x...\n",
2144                                     code, cid);
2145                         break;
2146                 }
2147
2148                 AMAP_SET_BITS(struct amap_sol_cqe, valid, sol, 0);
2149                 queue_tail_inc(cq);
2150                 sol = queue_tail_node(cq);
2151                 num_processed++;
2152         }
2153
2154         if (num_processed > 0) {
2155                 tot_nump += num_processed;
2156                 hwi_ring_cq_db(phba, cq->id, num_processed, 1, 0);
2157         }
2158         return tot_nump;
2159 }
2160
2161 void beiscsi_process_all_cqs(struct work_struct *work)
2162 {
2163         unsigned long flags;
2164         struct hwi_controller *phwi_ctrlr;
2165         struct hwi_context_memory *phwi_context;
2166         struct beiscsi_hba *phba;
2167         struct be_eq_obj *pbe_eq =
2168             container_of(work, struct be_eq_obj, work_cqs);
2169
2170         phba = pbe_eq->phba;
2171         phwi_ctrlr = phba->phwi_ctrlr;
2172         phwi_context = phwi_ctrlr->phwi_ctxt;
2173
2174         if (pbe_eq->todo_mcc_cq) {
2175                 spin_lock_irqsave(&phba->isr_lock, flags);
2176                 pbe_eq->todo_mcc_cq = false;
2177                 spin_unlock_irqrestore(&phba->isr_lock, flags);
2178                 beiscsi_process_mcc_isr(phba);
2179         }
2180
2181         if (pbe_eq->todo_cq) {
2182                 spin_lock_irqsave(&phba->isr_lock, flags);
2183                 pbe_eq->todo_cq = false;
2184                 spin_unlock_irqrestore(&phba->isr_lock, flags);
2185                 beiscsi_process_cq(pbe_eq);
2186         }
2187
2188         /* rearm EQ for further interrupts */
2189         hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
2190 }
2191
2192 static int be_iopoll(struct blk_iopoll *iop, int budget)
2193 {
2194         unsigned int ret;
2195         struct beiscsi_hba *phba;
2196         struct be_eq_obj *pbe_eq;
2197
2198         pbe_eq = container_of(iop, struct be_eq_obj, iopoll);
2199         ret = beiscsi_process_cq(pbe_eq);
2200         if (ret < budget) {
2201                 phba = pbe_eq->phba;
2202                 blk_iopoll_complete(iop);
2203                 beiscsi_log(phba, KERN_INFO,
2204                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2205                             "BM_%d : rearm pbe_eq->q.id =%d\n",
2206                             pbe_eq->q.id);
2207                 hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
2208         }
2209         return ret;
2210 }
2211
2212 static void
2213 hwi_write_sgl_v2(struct iscsi_wrb *pwrb, struct scatterlist *sg,
2214                   unsigned int num_sg, struct beiscsi_io_task *io_task)
2215 {
2216         struct iscsi_sge *psgl;
2217         unsigned int sg_len, index;
2218         unsigned int sge_len = 0;
2219         unsigned long long addr;
2220         struct scatterlist *l_sg;
2221         unsigned int offset;
2222
2223         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, iscsi_bhs_addr_lo, pwrb,
2224                       io_task->bhs_pa.u.a32.address_lo);
2225         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, iscsi_bhs_addr_hi, pwrb,
2226                       io_task->bhs_pa.u.a32.address_hi);
2227
2228         l_sg = sg;
2229         for (index = 0; (index < num_sg) && (index < 2); index++,
2230                         sg = sg_next(sg)) {
2231                 if (index == 0) {
2232                         sg_len = sg_dma_len(sg);
2233                         addr = (u64) sg_dma_address(sg);
2234                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2235                                       sge0_addr_lo, pwrb,
2236                                       lower_32_bits(addr));
2237                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2238                                       sge0_addr_hi, pwrb,
2239                                       upper_32_bits(addr));
2240                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2241                                       sge0_len, pwrb,
2242                                       sg_len);
2243                         sge_len = sg_len;
2244                 } else {
2245                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_r2t_offset,
2246                                       pwrb, sge_len);
2247                         sg_len = sg_dma_len(sg);
2248                         addr = (u64) sg_dma_address(sg);
2249                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2250                                       sge1_addr_lo, pwrb,
2251                                       lower_32_bits(addr));
2252                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2253                                       sge1_addr_hi, pwrb,
2254                                       upper_32_bits(addr));
2255                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2256                                       sge1_len, pwrb,
2257                                       sg_len);
2258                 }
2259         }
2260         psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2261         memset(psgl, 0, sizeof(*psgl) * BE2_SGE);
2262
2263         AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len - 2);
2264
2265         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2266                       io_task->bhs_pa.u.a32.address_hi);
2267         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2268                       io_task->bhs_pa.u.a32.address_lo);
2269
2270         if (num_sg == 1) {
2271                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2272                               1);
2273                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2274                               0);
2275         } else if (num_sg == 2) {
2276                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2277                               0);
2278                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2279                               1);
2280         } else {
2281                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2282                               0);
2283                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2284                               0);
2285         }
2286
2287         sg = l_sg;
2288         psgl++;
2289         psgl++;
2290         offset = 0;
2291         for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
2292                 sg_len = sg_dma_len(sg);
2293                 addr = (u64) sg_dma_address(sg);
2294                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2295                               lower_32_bits(addr));
2296                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2297                               upper_32_bits(addr));
2298                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, sg_len);
2299                 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, offset);
2300                 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2301                 offset += sg_len;
2302         }
2303         psgl--;
2304         AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2305 }
2306
2307 static void
2308 hwi_write_sgl(struct iscsi_wrb *pwrb, struct scatterlist *sg,
2309               unsigned int num_sg, struct beiscsi_io_task *io_task)
2310 {
2311         struct iscsi_sge *psgl;
2312         unsigned int sg_len, index;
2313         unsigned int sge_len = 0;
2314         unsigned long long addr;
2315         struct scatterlist *l_sg;
2316         unsigned int offset;
2317
2318         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
2319                                       io_task->bhs_pa.u.a32.address_lo);
2320         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
2321                                       io_task->bhs_pa.u.a32.address_hi);
2322
2323         l_sg = sg;
2324         for (index = 0; (index < num_sg) && (index < 2); index++,
2325                                                          sg = sg_next(sg)) {
2326                 if (index == 0) {
2327                         sg_len = sg_dma_len(sg);
2328                         addr = (u64) sg_dma_address(sg);
2329                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
2330                                                 ((u32)(addr & 0xFFFFFFFF)));
2331                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
2332                                                         ((u32)(addr >> 32)));
2333                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
2334                                                         sg_len);
2335                         sge_len = sg_len;
2336                 } else {
2337                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_r2t_offset,
2338                                                         pwrb, sge_len);
2339                         sg_len = sg_dma_len(sg);
2340                         addr = (u64) sg_dma_address(sg);
2341                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_lo, pwrb,
2342                                                 ((u32)(addr & 0xFFFFFFFF)));
2343                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_hi, pwrb,
2344                                                         ((u32)(addr >> 32)));
2345                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_len, pwrb,
2346                                                         sg_len);
2347                 }
2348         }
2349         psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2350         memset(psgl, 0, sizeof(*psgl) * BE2_SGE);
2351
2352         AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len - 2);
2353
2354         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2355                         io_task->bhs_pa.u.a32.address_hi);
2356         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2357                         io_task->bhs_pa.u.a32.address_lo);
2358
2359         if (num_sg == 1) {
2360                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2361                                                                 1);
2362                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2363                                                                 0);
2364         } else if (num_sg == 2) {
2365                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2366                                                                 0);
2367                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2368                                                                 1);
2369         } else {
2370                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2371                                                                 0);
2372                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2373                                                                 0);
2374         }
2375         sg = l_sg;
2376         psgl++;
2377         psgl++;
2378         offset = 0;
2379         for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
2380                 sg_len = sg_dma_len(sg);
2381                 addr = (u64) sg_dma_address(sg);
2382                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2383                                                 (addr & 0xFFFFFFFF));
2384                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2385                                                 (addr >> 32));
2386                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, sg_len);
2387                 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, offset);
2388                 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2389                 offset += sg_len;
2390         }
2391         psgl--;
2392         AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2393 }
2394
2395 /**
2396  * hwi_write_buffer()- Populate the WRB with task info
2397  * @pwrb: ptr to the WRB entry
2398  * @task: iscsi task which is to be executed
2399  **/
2400 static void hwi_write_buffer(struct iscsi_wrb *pwrb, struct iscsi_task *task)
2401 {
2402         struct iscsi_sge *psgl;
2403         struct beiscsi_io_task *io_task = task->dd_data;
2404         struct beiscsi_conn *beiscsi_conn = io_task->conn;
2405         struct beiscsi_hba *phba = beiscsi_conn->phba;
2406         uint8_t dsp_value = 0;
2407
2408         io_task->bhs_len = sizeof(struct be_nonio_bhs) - 2;
2409         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
2410                                 io_task->bhs_pa.u.a32.address_lo);
2411         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
2412                                 io_task->bhs_pa.u.a32.address_hi);
2413
2414         if (task->data) {
2415
2416                 /* Check for the data_count */
2417                 dsp_value = (task->data_count) ? 1 : 0;
2418
2419                 if (is_chip_be2_be3r(phba))
2420                         AMAP_SET_BITS(struct amap_iscsi_wrb, dsp,
2421                                       pwrb, dsp_value);
2422                 else
2423                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp,
2424                                       pwrb, dsp_value);
2425
2426                 /* Map addr only if there is data_count */
2427                 if (dsp_value) {
2428                         io_task->mtask_addr = pci_map_single(phba->pcidev,
2429                                                              task->data,
2430                                                              task->data_count,
2431                                                              PCI_DMA_TODEVICE);
2432                         io_task->mtask_data_count = task->data_count;
2433                 } else
2434                         io_task->mtask_addr = 0;
2435
2436                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
2437                               lower_32_bits(io_task->mtask_addr));
2438                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
2439                               upper_32_bits(io_task->mtask_addr));
2440                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
2441                                                 task->data_count);
2442
2443                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb, 1);
2444         } else {
2445                 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
2446                 io_task->mtask_addr = 0;
2447         }
2448
2449         psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2450
2451         AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len);
2452
2453         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2454                       io_task->bhs_pa.u.a32.address_hi);
2455         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2456                       io_task->bhs_pa.u.a32.address_lo);
2457         if (task->data) {
2458                 psgl++;
2459                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl, 0);
2460                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl, 0);
2461                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0);
2462                 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, 0);
2463                 AMAP_SET_BITS(struct amap_iscsi_sge, rsvd0, psgl, 0);
2464                 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2465
2466                 psgl++;
2467                 if (task->data) {
2468                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2469                                       lower_32_bits(io_task->mtask_addr));
2470                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2471                                       upper_32_bits(io_task->mtask_addr));
2472                 }
2473                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0x106);
2474         }
2475         AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2476 }
2477
2478 static void beiscsi_find_mem_req(struct beiscsi_hba *phba)
2479 {
2480         unsigned int num_cq_pages, num_async_pdu_buf_pages;
2481         unsigned int num_async_pdu_data_pages, wrb_sz_per_cxn;
2482         unsigned int num_async_pdu_buf_sgl_pages, num_async_pdu_data_sgl_pages;
2483
2484         num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \
2485                                       sizeof(struct sol_cqe));
2486         num_async_pdu_buf_pages =
2487                         PAGES_REQUIRED(phba->params.asyncpdus_per_ctrl * \
2488                                        phba->params.defpdu_hdr_sz);
2489         num_async_pdu_buf_sgl_pages =
2490                         PAGES_REQUIRED(phba->params.asyncpdus_per_ctrl * \
2491                                        sizeof(struct phys_addr));
2492         num_async_pdu_data_pages =
2493                         PAGES_REQUIRED(phba->params.asyncpdus_per_ctrl * \
2494                                        phba->params.defpdu_data_sz);
2495         num_async_pdu_data_sgl_pages =
2496                         PAGES_REQUIRED(phba->params.asyncpdus_per_ctrl * \
2497                                        sizeof(struct phys_addr));
2498
2499         phba->params.hwi_ws_sz = sizeof(struct hwi_controller);
2500
2501         phba->mem_req[ISCSI_MEM_GLOBAL_HEADER] = 2 *
2502                                                  BE_ISCSI_PDU_HEADER_SIZE;
2503         phba->mem_req[HWI_MEM_ADDN_CONTEXT] =
2504                                             sizeof(struct hwi_context_memory);
2505
2506
2507         phba->mem_req[HWI_MEM_WRB] = sizeof(struct iscsi_wrb)
2508             * (phba->params.wrbs_per_cxn)
2509             * phba->params.cxns_per_ctrl;
2510         wrb_sz_per_cxn =  sizeof(struct wrb_handle) *
2511                                  (phba->params.wrbs_per_cxn);
2512         phba->mem_req[HWI_MEM_WRBH] = roundup_pow_of_two((wrb_sz_per_cxn) *
2513                                 phba->params.cxns_per_ctrl);
2514
2515         phba->mem_req[HWI_MEM_SGLH] = sizeof(struct sgl_handle) *
2516                 phba->params.icds_per_ctrl;
2517         phba->mem_req[HWI_MEM_SGE] = sizeof(struct iscsi_sge) *
2518                 phba->params.num_sge_per_io * phba->params.icds_per_ctrl;
2519
2520         phba->mem_req[HWI_MEM_ASYNC_HEADER_BUF] =
2521                 num_async_pdu_buf_pages * PAGE_SIZE;
2522         phba->mem_req[HWI_MEM_ASYNC_DATA_BUF] =
2523                 num_async_pdu_data_pages * PAGE_SIZE;
2524         phba->mem_req[HWI_MEM_ASYNC_HEADER_RING] =
2525                 num_async_pdu_buf_sgl_pages * PAGE_SIZE;
2526         phba->mem_req[HWI_MEM_ASYNC_DATA_RING] =
2527                 num_async_pdu_data_sgl_pages * PAGE_SIZE;
2528         phba->mem_req[HWI_MEM_ASYNC_HEADER_HANDLE] =
2529                 phba->params.asyncpdus_per_ctrl *
2530                 sizeof(struct async_pdu_handle);
2531         phba->mem_req[HWI_MEM_ASYNC_DATA_HANDLE] =
2532                 phba->params.asyncpdus_per_ctrl *
2533                 sizeof(struct async_pdu_handle);
2534         phba->mem_req[HWI_MEM_ASYNC_PDU_CONTEXT] =
2535                 sizeof(struct hwi_async_pdu_context) +
2536                 (phba->params.cxns_per_ctrl * sizeof(struct hwi_async_entry));
2537 }
2538
2539 static int beiscsi_alloc_mem(struct beiscsi_hba *phba)
2540 {
2541         dma_addr_t bus_add;
2542         struct hwi_controller *phwi_ctrlr;
2543         struct be_mem_descriptor *mem_descr;
2544         struct mem_array *mem_arr, *mem_arr_orig;
2545         unsigned int i, j, alloc_size, curr_alloc_size;
2546
2547         phba->phwi_ctrlr = kzalloc(phba->params.hwi_ws_sz, GFP_KERNEL);
2548         if (!phba->phwi_ctrlr)
2549                 return -ENOMEM;
2550
2551         /* Allocate memory for wrb_context */
2552         phwi_ctrlr = phba->phwi_ctrlr;
2553         phwi_ctrlr->wrb_context = kzalloc(sizeof(struct hwi_wrb_context) *
2554                                           phba->params.cxns_per_ctrl,
2555                                           GFP_KERNEL);
2556         if (!phwi_ctrlr->wrb_context)
2557                 return -ENOMEM;
2558
2559         phba->init_mem = kcalloc(SE_MEM_MAX, sizeof(*mem_descr),
2560                                  GFP_KERNEL);
2561         if (!phba->init_mem) {
2562                 kfree(phwi_ctrlr->wrb_context);
2563                 kfree(phba->phwi_ctrlr);
2564                 return -ENOMEM;
2565         }
2566
2567         mem_arr_orig = kmalloc(sizeof(*mem_arr_orig) * BEISCSI_MAX_FRAGS_INIT,
2568                                GFP_KERNEL);
2569         if (!mem_arr_orig) {
2570                 kfree(phba->init_mem);
2571                 kfree(phwi_ctrlr->wrb_context);
2572                 kfree(phba->phwi_ctrlr);
2573                 return -ENOMEM;
2574         }
2575
2576         mem_descr = phba->init_mem;
2577         for (i = 0; i < SE_MEM_MAX; i++) {
2578                 j = 0;
2579                 mem_arr = mem_arr_orig;
2580                 alloc_size = phba->mem_req[i];
2581                 memset(mem_arr, 0, sizeof(struct mem_array) *
2582                        BEISCSI_MAX_FRAGS_INIT);
2583                 curr_alloc_size = min(be_max_phys_size * 1024, alloc_size);
2584                 do {
2585                         mem_arr->virtual_address = pci_alloc_consistent(
2586                                                         phba->pcidev,
2587                                                         curr_alloc_size,
2588                                                         &bus_add);
2589                         if (!mem_arr->virtual_address) {
2590                                 if (curr_alloc_size <= BE_MIN_MEM_SIZE)
2591                                         goto free_mem;
2592                                 if (curr_alloc_size -
2593                                         rounddown_pow_of_two(curr_alloc_size))
2594                                         curr_alloc_size = rounddown_pow_of_two
2595                                                              (curr_alloc_size);
2596                                 else
2597                                         curr_alloc_size = curr_alloc_size / 2;
2598                         } else {
2599                                 mem_arr->bus_address.u.
2600                                     a64.address = (__u64) bus_add;
2601                                 mem_arr->size = curr_alloc_size;
2602                                 alloc_size -= curr_alloc_size;
2603                                 curr_alloc_size = min(be_max_phys_size *
2604                                                       1024, alloc_size);
2605                                 j++;
2606                                 mem_arr++;
2607                         }
2608                 } while (alloc_size);
2609                 mem_descr->num_elements = j;
2610                 mem_descr->size_in_bytes = phba->mem_req[i];
2611                 mem_descr->mem_array = kmalloc(sizeof(*mem_arr) * j,
2612                                                GFP_KERNEL);
2613                 if (!mem_descr->mem_array)
2614                         goto free_mem;
2615
2616                 memcpy(mem_descr->mem_array, mem_arr_orig,
2617                        sizeof(struct mem_array) * j);
2618                 mem_descr++;
2619         }
2620         kfree(mem_arr_orig);
2621         return 0;
2622 free_mem:
2623         mem_descr->num_elements = j;
2624         while ((i) || (j)) {
2625                 for (j = mem_descr->num_elements; j > 0; j--) {
2626                         pci_free_consistent(phba->pcidev,
2627                                             mem_descr->mem_array[j - 1].size,
2628                                             mem_descr->mem_array[j - 1].
2629                                             virtual_address,
2630                                             (unsigned long)mem_descr->
2631                                             mem_array[j - 1].
2632                                             bus_address.u.a64.address);
2633                 }
2634                 if (i) {
2635                         i--;
2636                         kfree(mem_descr->mem_array);
2637                         mem_descr--;
2638                 }
2639         }
2640         kfree(mem_arr_orig);
2641         kfree(phba->init_mem);
2642         kfree(phba->phwi_ctrlr->wrb_context);
2643         kfree(phba->phwi_ctrlr);
2644         return -ENOMEM;
2645 }
2646
2647 static int beiscsi_get_memory(struct beiscsi_hba *phba)
2648 {
2649         beiscsi_find_mem_req(phba);
2650         return beiscsi_alloc_mem(phba);
2651 }
2652
2653 static void iscsi_init_global_templates(struct beiscsi_hba *phba)
2654 {
2655         struct pdu_data_out *pdata_out;
2656         struct pdu_nop_out *pnop_out;
2657         struct be_mem_descriptor *mem_descr;
2658
2659         mem_descr = phba->init_mem;
2660         mem_descr += ISCSI_MEM_GLOBAL_HEADER;
2661         pdata_out =
2662             (struct pdu_data_out *)mem_descr->mem_array[0].virtual_address;
2663         memset(pdata_out, 0, BE_ISCSI_PDU_HEADER_SIZE);
2664
2665         AMAP_SET_BITS(struct amap_pdu_data_out, opcode, pdata_out,
2666                       IIOC_SCSI_DATA);
2667
2668         pnop_out =
2669             (struct pdu_nop_out *)((unsigned char *)mem_descr->mem_array[0].
2670                                    virtual_address + BE_ISCSI_PDU_HEADER_SIZE);
2671
2672         memset(pnop_out, 0, BE_ISCSI_PDU_HEADER_SIZE);
2673         AMAP_SET_BITS(struct amap_pdu_nop_out, ttt, pnop_out, 0xFFFFFFFF);
2674         AMAP_SET_BITS(struct amap_pdu_nop_out, f_bit, pnop_out, 1);
2675         AMAP_SET_BITS(struct amap_pdu_nop_out, i_bit, pnop_out, 0);
2676 }
2677
2678 static int beiscsi_init_wrb_handle(struct beiscsi_hba *phba)
2679 {
2680         struct be_mem_descriptor *mem_descr_wrbh, *mem_descr_wrb;
2681         struct hwi_context_memory *phwi_ctxt;
2682         struct wrb_handle *pwrb_handle = NULL;
2683         struct hwi_controller *phwi_ctrlr;
2684         struct hwi_wrb_context *pwrb_context;
2685         struct iscsi_wrb *pwrb = NULL;
2686         unsigned int num_cxn_wrbh = 0;
2687         unsigned int num_cxn_wrb = 0, j, idx = 0, index;
2688
2689         mem_descr_wrbh = phba->init_mem;
2690         mem_descr_wrbh += HWI_MEM_WRBH;
2691
2692         mem_descr_wrb = phba->init_mem;
2693         mem_descr_wrb += HWI_MEM_WRB;
2694         phwi_ctrlr = phba->phwi_ctrlr;
2695
2696         /* Allocate memory for WRBQ */
2697         phwi_ctxt = phwi_ctrlr->phwi_ctxt;
2698         phwi_ctxt->be_wrbq = kzalloc(sizeof(struct be_queue_info) *
2699                                      phba->fw_config.iscsi_cid_count,
2700                                      GFP_KERNEL);
2701         if (!phwi_ctxt->be_wrbq) {
2702                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2703                             "BM_%d : WRBQ Mem Alloc Failed\n");
2704                 return -ENOMEM;
2705         }
2706
2707         for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
2708                 pwrb_context = &phwi_ctrlr->wrb_context[index];
2709                 pwrb_context->pwrb_handle_base =
2710                                 kzalloc(sizeof(struct wrb_handle *) *
2711                                         phba->params.wrbs_per_cxn, GFP_KERNEL);
2712                 if (!pwrb_context->pwrb_handle_base) {
2713                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2714                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
2715                         goto init_wrb_hndl_failed;
2716                 }
2717                 pwrb_context->pwrb_handle_basestd =
2718                                 kzalloc(sizeof(struct wrb_handle *) *
2719                                         phba->params.wrbs_per_cxn, GFP_KERNEL);
2720                 if (!pwrb_context->pwrb_handle_basestd) {
2721                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2722                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
2723                         goto init_wrb_hndl_failed;
2724                 }
2725                 if (!num_cxn_wrbh) {
2726                         pwrb_handle =
2727                                 mem_descr_wrbh->mem_array[idx].virtual_address;
2728                         num_cxn_wrbh = ((mem_descr_wrbh->mem_array[idx].size) /
2729                                         ((sizeof(struct wrb_handle)) *
2730                                          phba->params.wrbs_per_cxn));
2731                         idx++;
2732                 }
2733                 pwrb_context->alloc_index = 0;
2734                 pwrb_context->wrb_handles_available = 0;
2735                 pwrb_context->free_index = 0;
2736
2737                 if (num_cxn_wrbh) {
2738                         for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
2739                                 pwrb_context->pwrb_handle_base[j] = pwrb_handle;
2740                                 pwrb_context->pwrb_handle_basestd[j] =
2741                                                                 pwrb_handle;
2742                                 pwrb_context->wrb_handles_available++;
2743                                 pwrb_handle->wrb_index = j;
2744                                 pwrb_handle++;
2745                         }
2746                         num_cxn_wrbh--;
2747                 }
2748         }
2749         idx = 0;
2750         for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
2751                 pwrb_context = &phwi_ctrlr->wrb_context[index];
2752                 if (!num_cxn_wrb) {
2753                         pwrb = mem_descr_wrb->mem_array[idx].virtual_address;
2754                         num_cxn_wrb = (mem_descr_wrb->mem_array[idx].size) /
2755                                 ((sizeof(struct iscsi_wrb) *
2756                                   phba->params.wrbs_per_cxn));
2757                         idx++;
2758                 }
2759
2760                 if (num_cxn_wrb) {
2761                         for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
2762                                 pwrb_handle = pwrb_context->pwrb_handle_base[j];
2763                                 pwrb_handle->pwrb = pwrb;
2764                                 pwrb++;
2765                         }
2766                         num_cxn_wrb--;
2767                 }
2768         }
2769         return 0;
2770 init_wrb_hndl_failed:
2771         for (j = index; j > 0; j--) {
2772                 pwrb_context = &phwi_ctrlr->wrb_context[j];
2773                 kfree(pwrb_context->pwrb_handle_base);
2774                 kfree(pwrb_context->pwrb_handle_basestd);
2775         }
2776         return -ENOMEM;
2777 }
2778
2779 static int hwi_init_async_pdu_ctx(struct beiscsi_hba *phba)
2780 {
2781         struct hwi_controller *phwi_ctrlr;
2782         struct hba_parameters *p = &phba->params;
2783         struct hwi_async_pdu_context *pasync_ctx;
2784         struct async_pdu_handle *pasync_header_h, *pasync_data_h;
2785         unsigned int index, idx, num_per_mem, num_async_data;
2786         struct be_mem_descriptor *mem_descr;
2787
2788         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2789         mem_descr += HWI_MEM_ASYNC_PDU_CONTEXT;
2790
2791         phwi_ctrlr = phba->phwi_ctrlr;
2792         phwi_ctrlr->phwi_ctxt->pasync_ctx = (struct hwi_async_pdu_context *)
2793                                 mem_descr->mem_array[0].virtual_address;
2794         pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx;
2795         memset(pasync_ctx, 0, sizeof(*pasync_ctx));
2796
2797         pasync_ctx->async_entry = kzalloc(sizeof(struct hwi_async_entry) *
2798                                           phba->fw_config.iscsi_cid_count,
2799                                           GFP_KERNEL);
2800         if (!pasync_ctx->async_entry) {
2801                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2802                             "BM_%d : hwi_init_async_pdu_ctx Mem Alloc Failed\n");
2803                 return -ENOMEM;
2804         }
2805
2806         pasync_ctx->num_entries = p->asyncpdus_per_ctrl;
2807         pasync_ctx->buffer_size = p->defpdu_hdr_sz;
2808
2809         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2810         mem_descr += HWI_MEM_ASYNC_HEADER_BUF;
2811         if (mem_descr->mem_array[0].virtual_address) {
2812                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2813                             "BM_%d : hwi_init_async_pdu_ctx"
2814                             " HWI_MEM_ASYNC_HEADER_BUF va=%p\n",
2815                             mem_descr->mem_array[0].virtual_address);
2816         } else
2817                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
2818                             "BM_%d : No Virtual address\n");
2819
2820         pasync_ctx->async_header.va_base =
2821                         mem_descr->mem_array[0].virtual_address;
2822
2823         pasync_ctx->async_header.pa_base.u.a64.address =
2824                         mem_descr->mem_array[0].bus_address.u.a64.address;
2825
2826         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2827         mem_descr += HWI_MEM_ASYNC_HEADER_RING;
2828         if (mem_descr->mem_array[0].virtual_address) {
2829                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2830                             "BM_%d : hwi_init_async_pdu_ctx"
2831                             " HWI_MEM_ASYNC_HEADER_RING va=%p\n",
2832                             mem_descr->mem_array[0].virtual_address);
2833         } else
2834                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
2835                             "BM_%d : No Virtual address\n");
2836
2837         pasync_ctx->async_header.ring_base =
2838                         mem_descr->mem_array[0].virtual_address;
2839
2840         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2841         mem_descr += HWI_MEM_ASYNC_HEADER_HANDLE;
2842         if (mem_descr->mem_array[0].virtual_address) {
2843                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2844                             "BM_%d : hwi_init_async_pdu_ctx"
2845                             " HWI_MEM_ASYNC_HEADER_HANDLE va=%p\n",
2846                             mem_descr->mem_array[0].virtual_address);
2847         } else
2848                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
2849                             "BM_%d : No Virtual address\n");
2850
2851         pasync_ctx->async_header.handle_base =
2852                         mem_descr->mem_array[0].virtual_address;
2853         pasync_ctx->async_header.writables = 0;
2854         INIT_LIST_HEAD(&pasync_ctx->async_header.free_list);
2855
2856
2857         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2858         mem_descr += HWI_MEM_ASYNC_DATA_RING;
2859         if (mem_descr->mem_array[0].virtual_address) {
2860                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2861                             "BM_%d : hwi_init_async_pdu_ctx"
2862                             " HWI_MEM_ASYNC_DATA_RING va=%p\n",
2863                             mem_descr->mem_array[0].virtual_address);
2864         } else
2865                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
2866                             "BM_%d : No Virtual address\n");
2867
2868         pasync_ctx->async_data.ring_base =
2869                         mem_descr->mem_array[0].virtual_address;
2870
2871         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2872         mem_descr += HWI_MEM_ASYNC_DATA_HANDLE;
2873         if (!mem_descr->mem_array[0].virtual_address)
2874                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
2875                             "BM_%d : No Virtual address\n");
2876
2877         pasync_ctx->async_data.handle_base =
2878                         mem_descr->mem_array[0].virtual_address;
2879         pasync_ctx->async_data.writables = 0;
2880         INIT_LIST_HEAD(&pasync_ctx->async_data.free_list);
2881
2882         pasync_header_h =
2883                 (struct async_pdu_handle *)pasync_ctx->async_header.handle_base;
2884         pasync_data_h =
2885                 (struct async_pdu_handle *)pasync_ctx->async_data.handle_base;
2886
2887         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2888         mem_descr += HWI_MEM_ASYNC_DATA_BUF;
2889         if (mem_descr->mem_array[0].virtual_address) {
2890                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2891                             "BM_%d : hwi_init_async_pdu_ctx"
2892                             " HWI_MEM_ASYNC_DATA_BUF va=%p\n",
2893                             mem_descr->mem_array[0].virtual_address);
2894         } else
2895                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
2896                             "BM_%d : No Virtual address\n");
2897
2898         idx = 0;
2899         pasync_ctx->async_data.va_base =
2900                         mem_descr->mem_array[idx].virtual_address;
2901         pasync_ctx->async_data.pa_base.u.a64.address =
2902                         mem_descr->mem_array[idx].bus_address.u.a64.address;
2903
2904         num_async_data = ((mem_descr->mem_array[idx].size) /
2905                                 phba->params.defpdu_data_sz);
2906         num_per_mem = 0;
2907
2908         for (index = 0; index < p->asyncpdus_per_ctrl; index++) {
2909                 pasync_header_h->cri = -1;
2910                 pasync_header_h->index = (char)index;
2911                 INIT_LIST_HEAD(&pasync_header_h->link);
2912                 pasync_header_h->pbuffer =
2913                         (void *)((unsigned long)
2914                         (pasync_ctx->async_header.va_base) +
2915                         (p->defpdu_hdr_sz * index));
2916
2917                 pasync_header_h->pa.u.a64.address =
2918                         pasync_ctx->async_header.pa_base.u.a64.address +
2919                         (p->defpdu_hdr_sz * index);
2920
2921                 list_add_tail(&pasync_header_h->link,
2922                                 &pasync_ctx->async_header.free_list);
2923                 pasync_header_h++;
2924                 pasync_ctx->async_header.free_entries++;
2925                 pasync_ctx->async_header.writables++;
2926
2927                 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].wait_queue.list);
2928                 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
2929                                header_busy_list);
2930                 pasync_data_h->cri = -1;
2931                 pasync_data_h->index = (char)index;
2932                 INIT_LIST_HEAD(&pasync_data_h->link);
2933
2934                 if (!num_async_data) {
2935                         num_per_mem = 0;
2936                         idx++;
2937                         pasync_ctx->async_data.va_base =
2938                                 mem_descr->mem_array[idx].virtual_address;
2939                         pasync_ctx->async_data.pa_base.u.a64.address =
2940                                 mem_descr->mem_array[idx].
2941                                 bus_address.u.a64.address;
2942
2943                         num_async_data = ((mem_descr->mem_array[idx].size) /
2944                                         phba->params.defpdu_data_sz);
2945                 }
2946                 pasync_data_h->pbuffer =
2947                         (void *)((unsigned long)
2948                         (pasync_ctx->async_data.va_base) +
2949                         (p->defpdu_data_sz * num_per_mem));
2950
2951                 pasync_data_h->pa.u.a64.address =
2952                     pasync_ctx->async_data.pa_base.u.a64.address +
2953                     (p->defpdu_data_sz * num_per_mem);
2954                 num_per_mem++;
2955                 num_async_data--;
2956
2957                 list_add_tail(&pasync_data_h->link,
2958                               &pasync_ctx->async_data.free_list);
2959                 pasync_data_h++;
2960                 pasync_ctx->async_data.free_entries++;
2961                 pasync_ctx->async_data.writables++;
2962
2963                 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].data_busy_list);
2964         }
2965
2966         pasync_ctx->async_header.host_write_ptr = 0;
2967         pasync_ctx->async_header.ep_read_ptr = -1;
2968         pasync_ctx->async_data.host_write_ptr = 0;
2969         pasync_ctx->async_data.ep_read_ptr = -1;
2970
2971         return 0;
2972 }
2973
2974 static int
2975 be_sgl_create_contiguous(void *virtual_address,
2976                          u64 physical_address, u32 length,
2977                          struct be_dma_mem *sgl)
2978 {
2979         WARN_ON(!virtual_address);
2980         WARN_ON(!physical_address);
2981         WARN_ON(!length > 0);
2982         WARN_ON(!sgl);
2983
2984         sgl->va = virtual_address;
2985         sgl->dma = (unsigned long)physical_address;
2986         sgl->size = length;
2987
2988         return 0;
2989 }
2990
2991 static void be_sgl_destroy_contiguous(struct be_dma_mem *sgl)
2992 {
2993         memset(sgl, 0, sizeof(*sgl));
2994 }
2995
2996 static void
2997 hwi_build_be_sgl_arr(struct beiscsi_hba *phba,
2998                      struct mem_array *pmem, struct be_dma_mem *sgl)
2999 {
3000         if (sgl->va)
3001                 be_sgl_destroy_contiguous(sgl);
3002
3003         be_sgl_create_contiguous(pmem->virtual_address,
3004                                  pmem->bus_address.u.a64.address,
3005                                  pmem->size, sgl);
3006 }
3007
3008 static void
3009 hwi_build_be_sgl_by_offset(struct beiscsi_hba *phba,
3010                            struct mem_array *pmem, struct be_dma_mem *sgl)
3011 {
3012         if (sgl->va)
3013                 be_sgl_destroy_contiguous(sgl);
3014
3015         be_sgl_create_contiguous((unsigned char *)pmem->virtual_address,
3016                                  pmem->bus_address.u.a64.address,
3017                                  pmem->size, sgl);
3018 }
3019
3020 static int be_fill_queue(struct be_queue_info *q,
3021                 u16 len, u16 entry_size, void *vaddress)
3022 {
3023         struct be_dma_mem *mem = &q->dma_mem;
3024
3025         memset(q, 0, sizeof(*q));
3026         q->len = len;
3027         q->entry_size = entry_size;
3028         mem->size = len * entry_size;
3029         mem->va = vaddress;
3030         if (!mem->va)
3031                 return -ENOMEM;
3032         memset(mem->va, 0, mem->size);
3033         return 0;
3034 }
3035
3036 static int beiscsi_create_eqs(struct beiscsi_hba *phba,
3037                              struct hwi_context_memory *phwi_context)
3038 {
3039         unsigned int i, num_eq_pages;
3040         int ret = 0, eq_for_mcc;
3041         struct be_queue_info *eq;
3042         struct be_dma_mem *mem;
3043         void *eq_vaddress;
3044         dma_addr_t paddr;
3045
3046         num_eq_pages = PAGES_REQUIRED(phba->params.num_eq_entries * \
3047                                       sizeof(struct be_eq_entry));
3048
3049         if (phba->msix_enabled)
3050                 eq_for_mcc = 1;
3051         else
3052                 eq_for_mcc = 0;
3053         for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3054                 eq = &phwi_context->be_eq[i].q;
3055                 mem = &eq->dma_mem;
3056                 phwi_context->be_eq[i].phba = phba;
3057                 eq_vaddress = pci_alloc_consistent(phba->pcidev,
3058                                                      num_eq_pages * PAGE_SIZE,
3059                                                      &paddr);
3060                 if (!eq_vaddress)
3061                         goto create_eq_error;
3062
3063                 mem->va = eq_vaddress;
3064                 ret = be_fill_queue(eq, phba->params.num_eq_entries,
3065                                     sizeof(struct be_eq_entry), eq_vaddress);
3066                 if (ret) {
3067                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3068                                     "BM_%d : be_fill_queue Failed for EQ\n");
3069                         goto create_eq_error;
3070                 }
3071
3072                 mem->dma = paddr;
3073                 ret = beiscsi_cmd_eq_create(&phba->ctrl, eq,
3074                                             phwi_context->cur_eqd);
3075                 if (ret) {
3076                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3077                                     "BM_%d : beiscsi_cmd_eq_create"
3078                                     "Failed for EQ\n");
3079                         goto create_eq_error;
3080                 }
3081
3082                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3083                             "BM_%d : eqid = %d\n",
3084                             phwi_context->be_eq[i].q.id);
3085         }
3086         return 0;
3087 create_eq_error:
3088         for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3089                 eq = &phwi_context->be_eq[i].q;
3090                 mem = &eq->dma_mem;
3091                 if (mem->va)
3092                         pci_free_consistent(phba->pcidev, num_eq_pages
3093                                             * PAGE_SIZE,
3094                                             mem->va, mem->dma);
3095         }
3096         return ret;
3097 }
3098
3099 static int beiscsi_create_cqs(struct beiscsi_hba *phba,
3100                              struct hwi_context_memory *phwi_context)
3101 {
3102         unsigned int i, num_cq_pages;
3103         int ret = 0;
3104         struct be_queue_info *cq, *eq;
3105         struct be_dma_mem *mem;
3106         struct be_eq_obj *pbe_eq;
3107         void *cq_vaddress;
3108         dma_addr_t paddr;
3109
3110         num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \
3111                                       sizeof(struct sol_cqe));
3112
3113         for (i = 0; i < phba->num_cpus; i++) {
3114                 cq = &phwi_context->be_cq[i];
3115                 eq = &phwi_context->be_eq[i].q;
3116                 pbe_eq = &phwi_context->be_eq[i];
3117                 pbe_eq->cq = cq;
3118                 pbe_eq->phba = phba;
3119                 mem = &cq->dma_mem;
3120                 cq_vaddress = pci_alloc_consistent(phba->pcidev,
3121                                                      num_cq_pages * PAGE_SIZE,
3122                                                      &paddr);
3123                 if (!cq_vaddress)
3124                         goto create_cq_error;
3125                 ret = be_fill_queue(cq, phba->params.num_cq_entries,
3126                                     sizeof(struct sol_cqe), cq_vaddress);
3127                 if (ret) {
3128                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3129                                     "BM_%d : be_fill_queue Failed "
3130                                     "for ISCSI CQ\n");
3131                         goto create_cq_error;
3132                 }
3133
3134                 mem->dma = paddr;
3135                 ret = beiscsi_cmd_cq_create(&phba->ctrl, cq, eq, false,
3136                                             false, 0);
3137                 if (ret) {
3138                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3139                                     "BM_%d : beiscsi_cmd_eq_create"
3140                                     "Failed for ISCSI CQ\n");
3141                         goto create_cq_error;
3142                 }
3143                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3144                             "BM_%d : iscsi cq_id is %d for eq_id %d\n"
3145                             "iSCSI CQ CREATED\n", cq->id, eq->id);
3146         }
3147         return 0;
3148
3149 create_cq_error:
3150         for (i = 0; i < phba->num_cpus; i++) {
3151                 cq = &phwi_context->be_cq[i];
3152                 mem = &cq->dma_mem;
3153                 if (mem->va)
3154                         pci_free_consistent(phba->pcidev, num_cq_pages
3155                                             * PAGE_SIZE,
3156                                             mem->va, mem->dma);
3157         }
3158         return ret;
3159
3160 }
3161
3162 static int
3163 beiscsi_create_def_hdr(struct beiscsi_hba *phba,
3164                        struct hwi_context_memory *phwi_context,
3165                        struct hwi_controller *phwi_ctrlr,
3166                        unsigned int def_pdu_ring_sz)
3167 {
3168         unsigned int idx;
3169         int ret;
3170         struct be_queue_info *dq, *cq;
3171         struct be_dma_mem *mem;
3172         struct be_mem_descriptor *mem_descr;
3173         void *dq_vaddress;
3174
3175         idx = 0;
3176         dq = &phwi_context->be_def_hdrq;
3177         cq = &phwi_context->be_cq[0];
3178         mem = &dq->dma_mem;
3179         mem_descr = phba->init_mem;
3180         mem_descr += HWI_MEM_ASYNC_HEADER_RING;
3181         dq_vaddress = mem_descr->mem_array[idx].virtual_address;
3182         ret = be_fill_queue(dq, mem_descr->mem_array[0].size /
3183                             sizeof(struct phys_addr),
3184                             sizeof(struct phys_addr), dq_vaddress);
3185         if (ret) {
3186                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3187                             "BM_%d : be_fill_queue Failed for DEF PDU HDR\n");
3188                 return ret;
3189         }
3190         mem->dma = (unsigned long)mem_descr->mem_array[idx].
3191                                   bus_address.u.a64.address;
3192         ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dq,
3193                                               def_pdu_ring_sz,
3194                                               phba->params.defpdu_hdr_sz);
3195         if (ret) {
3196                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3197                             "BM_%d : be_cmd_create_default_pdu_queue Failed DEFHDR\n");
3198                 return ret;
3199         }
3200         phwi_ctrlr->default_pdu_hdr.id = phwi_context->be_def_hdrq.id;
3201         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3202                     "BM_%d : iscsi def pdu id is %d\n",
3203                     phwi_context->be_def_hdrq.id);
3204
3205         hwi_post_async_buffers(phba, 1);
3206         return 0;
3207 }
3208
3209 static int
3210 beiscsi_create_def_data(struct beiscsi_hba *phba,
3211                         struct hwi_context_memory *phwi_context,
3212                         struct hwi_controller *phwi_ctrlr,
3213                         unsigned int def_pdu_ring_sz)
3214 {
3215         unsigned int idx;
3216         int ret;
3217         struct be_queue_info *dataq, *cq;
3218         struct be_dma_mem *mem;
3219         struct be_mem_descriptor *mem_descr;
3220         void *dq_vaddress;
3221
3222         idx = 0;
3223         dataq = &phwi_context->be_def_dataq;
3224         cq = &phwi_context->be_cq[0];
3225         mem = &dataq->dma_mem;
3226         mem_descr = phba->init_mem;
3227         mem_descr += HWI_MEM_ASYNC_DATA_RING;
3228         dq_vaddress = mem_descr->mem_array[idx].virtual_address;
3229         ret = be_fill_queue(dataq, mem_descr->mem_array[0].size /
3230                             sizeof(struct phys_addr),
3231                             sizeof(struct phys_addr), dq_vaddress);
3232         if (ret) {
3233                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3234                             "BM_%d : be_fill_queue Failed for DEF PDU DATA\n");
3235                 return ret;
3236         }
3237         mem->dma = (unsigned long)mem_descr->mem_array[idx].
3238                                   bus_address.u.a64.address;
3239         ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dataq,
3240                                               def_pdu_ring_sz,
3241                                               phba->params.defpdu_data_sz);
3242         if (ret) {
3243                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3244                             "BM_%d be_cmd_create_default_pdu_queue"
3245                             " Failed for DEF PDU DATA\n");
3246                 return ret;
3247         }
3248         phwi_ctrlr->default_pdu_data.id = phwi_context->be_def_dataq.id;
3249         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3250                     "BM_%d : iscsi def data id is %d\n",
3251                     phwi_context->be_def_dataq.id);
3252
3253         hwi_post_async_buffers(phba, 0);
3254         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3255                     "BM_%d : DEFAULT PDU DATA RING CREATED\n");
3256
3257         return 0;
3258 }
3259
3260 static int
3261 beiscsi_post_pages(struct beiscsi_hba *phba)
3262 {
3263         struct be_mem_descriptor *mem_descr;
3264         struct mem_array *pm_arr;
3265         unsigned int page_offset, i;
3266         struct be_dma_mem sgl;
3267         int status;
3268
3269         mem_descr = phba->init_mem;
3270         mem_descr += HWI_MEM_SGE;
3271         pm_arr = mem_descr->mem_array;
3272
3273         page_offset = (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io *
3274                         phba->fw_config.iscsi_icd_start) / PAGE_SIZE;
3275         for (i = 0; i < mem_descr->num_elements; i++) {
3276                 hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
3277                 status = be_cmd_iscsi_post_sgl_pages(&phba->ctrl, &sgl,
3278                                                 page_offset,
3279                                                 (pm_arr->size / PAGE_SIZE));
3280                 page_offset += pm_arr->size / PAGE_SIZE;
3281                 if (status != 0) {
3282                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3283                                     "BM_%d : post sgl failed.\n");
3284                         return status;
3285                 }
3286                 pm_arr++;
3287         }
3288         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3289                     "BM_%d : POSTED PAGES\n");
3290         return 0;
3291 }
3292
3293 static void be_queue_free(struct beiscsi_hba *phba, struct be_queue_info *q)
3294 {
3295         struct be_dma_mem *mem = &q->dma_mem;
3296         if (mem->va) {
3297                 pci_free_consistent(phba->pcidev, mem->size,
3298                         mem->va, mem->dma);
3299                 mem->va = NULL;
3300         }
3301 }
3302
3303 static int be_queue_alloc(struct beiscsi_hba *phba, struct be_queue_info *q,
3304                 u16 len, u16 entry_size)
3305 {
3306         struct be_dma_mem *mem = &q->dma_mem;
3307
3308         memset(q, 0, sizeof(*q));
3309         q->len = len;
3310         q->entry_size = entry_size;
3311         mem->size = len * entry_size;
3312         mem->va = pci_alloc_consistent(phba->pcidev, mem->size, &mem->dma);
3313         if (!mem->va)
3314                 return -ENOMEM;
3315         memset(mem->va, 0, mem->size);
3316         return 0;
3317 }
3318
3319 static int
3320 beiscsi_create_wrb_rings(struct beiscsi_hba *phba,
3321                          struct hwi_context_memory *phwi_context,
3322                          struct hwi_controller *phwi_ctrlr)
3323 {
3324         unsigned int wrb_mem_index, offset, size, num_wrb_rings;
3325         u64 pa_addr_lo;
3326         unsigned int idx, num, i;
3327         struct mem_array *pwrb_arr;
3328         void *wrb_vaddr;
3329         struct be_dma_mem sgl;
3330         struct be_mem_descriptor *mem_descr;
3331         struct hwi_wrb_context *pwrb_context;
3332         int status;
3333
3334         idx = 0;
3335         mem_descr = phba->init_mem;
3336         mem_descr += HWI_MEM_WRB;
3337         pwrb_arr = kmalloc(sizeof(*pwrb_arr) * phba->params.cxns_per_ctrl,
3338                            GFP_KERNEL);
3339         if (!pwrb_arr) {
3340                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3341                             "BM_%d : Memory alloc failed in create wrb ring.\n");
3342                 return -ENOMEM;
3343         }
3344         wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
3345         pa_addr_lo = mem_descr->mem_array[idx].bus_address.u.a64.address;
3346         num_wrb_rings = mem_descr->mem_array[idx].size /
3347                 (phba->params.wrbs_per_cxn * sizeof(struct iscsi_wrb));
3348
3349         for (num = 0; num < phba->params.cxns_per_ctrl; num++) {
3350                 if (num_wrb_rings) {
3351                         pwrb_arr[num].virtual_address = wrb_vaddr;
3352                         pwrb_arr[num].bus_address.u.a64.address = pa_addr_lo;
3353                         pwrb_arr[num].size = phba->params.wrbs_per_cxn *
3354                                             sizeof(struct iscsi_wrb);
3355                         wrb_vaddr += pwrb_arr[num].size;
3356                         pa_addr_lo += pwrb_arr[num].size;
3357                         num_wrb_rings--;
3358                 } else {
3359                         idx++;
3360                         wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
3361                         pa_addr_lo = mem_descr->mem_array[idx].\
3362                                         bus_address.u.a64.address;
3363                         num_wrb_rings = mem_descr->mem_array[idx].size /
3364                                         (phba->params.wrbs_per_cxn *
3365                                         sizeof(struct iscsi_wrb));
3366                         pwrb_arr[num].virtual_address = wrb_vaddr;
3367                         pwrb_arr[num].bus_address.u.a64.address\
3368                                                 = pa_addr_lo;
3369                         pwrb_arr[num].size = phba->params.wrbs_per_cxn *
3370                                                  sizeof(struct iscsi_wrb);
3371                         wrb_vaddr += pwrb_arr[num].size;
3372                         pa_addr_lo   += pwrb_arr[num].size;
3373                         num_wrb_rings--;
3374                 }
3375         }
3376         for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
3377                 wrb_mem_index = 0;
3378                 offset = 0;
3379                 size = 0;
3380
3381                 hwi_build_be_sgl_by_offset(phba, &pwrb_arr[i], &sgl);
3382                 status = be_cmd_wrbq_create(&phba->ctrl, &sgl,
3383                                             &phwi_context->be_wrbq[i]);
3384                 if (status != 0) {
3385                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3386                                     "BM_%d : wrbq create failed.");
3387                         kfree(pwrb_arr);
3388                         return status;
3389                 }
3390                 pwrb_context = &phwi_ctrlr->wrb_context[i];
3391                 pwrb_context->cid = phwi_context->be_wrbq[i].id;
3392                 BE_SET_CID_TO_CRI(i, pwrb_context->cid);
3393         }
3394         kfree(pwrb_arr);
3395         return 0;
3396 }
3397
3398 static void free_wrb_handles(struct beiscsi_hba *phba)
3399 {
3400         unsigned int index;
3401         struct hwi_controller *phwi_ctrlr;
3402         struct hwi_wrb_context *pwrb_context;
3403
3404         phwi_ctrlr = phba->phwi_ctrlr;
3405         for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
3406                 pwrb_context = &phwi_ctrlr->wrb_context[index];
3407                 kfree(pwrb_context->pwrb_handle_base);
3408                 kfree(pwrb_context->pwrb_handle_basestd);
3409         }
3410 }
3411
3412 static void be_mcc_queues_destroy(struct beiscsi_hba *phba)
3413 {
3414         struct be_queue_info *q;
3415         struct be_ctrl_info *ctrl = &phba->ctrl;
3416
3417         q = &phba->ctrl.mcc_obj.q;
3418         if (q->created)
3419                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_MCCQ);
3420         be_queue_free(phba, q);
3421
3422         q = &phba->ctrl.mcc_obj.cq;
3423         if (q->created)
3424                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
3425         be_queue_free(phba, q);
3426 }
3427
3428 static void hwi_cleanup(struct beiscsi_hba *phba)
3429 {
3430         struct be_queue_info *q;
3431         struct be_ctrl_info *ctrl = &phba->ctrl;
3432         struct hwi_controller *phwi_ctrlr;
3433         struct hwi_context_memory *phwi_context;
3434         struct hwi_async_pdu_context *pasync_ctx;
3435         int i, eq_num;
3436
3437         phwi_ctrlr = phba->phwi_ctrlr;
3438         phwi_context = phwi_ctrlr->phwi_ctxt;
3439         for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
3440                 q = &phwi_context->be_wrbq[i];
3441                 if (q->created)
3442                         beiscsi_cmd_q_destroy(ctrl, q, QTYPE_WRBQ);
3443         }
3444         kfree(phwi_context->be_wrbq);
3445         free_wrb_handles(phba);
3446
3447         q = &phwi_context->be_def_hdrq;
3448         if (q->created)
3449                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);
3450
3451         q = &phwi_context->be_def_dataq;
3452         if (q->created)
3453                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);
3454
3455         beiscsi_cmd_q_destroy(ctrl, NULL, QTYPE_SGL);
3456
3457         for (i = 0; i < (phba->num_cpus); i++) {
3458                 q = &phwi_context->be_cq[i];
3459                 if (q->created)
3460                         beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
3461         }
3462         if (phba->msix_enabled)
3463                 eq_num = 1;
3464         else
3465                 eq_num = 0;
3466         for (i = 0; i < (phba->num_cpus + eq_num); i++) {
3467                 q = &phwi_context->be_eq[i].q;
3468                 if (q->created)
3469                         beiscsi_cmd_q_destroy(ctrl, q, QTYPE_EQ);
3470         }
3471         be_mcc_queues_destroy(phba);
3472
3473         pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx;
3474         kfree(pasync_ctx->async_entry);
3475         be_cmd_fw_uninit(ctrl);
3476 }
3477
3478 static int be_mcc_queues_create(struct beiscsi_hba *phba,
3479                                 struct hwi_context_memory *phwi_context)
3480 {
3481         struct be_queue_info *q, *cq;
3482         struct be_ctrl_info *ctrl = &phba->ctrl;
3483
3484         /* Alloc MCC compl queue */
3485         cq = &phba->ctrl.mcc_obj.cq;
3486         if (be_queue_alloc(phba, cq, MCC_CQ_LEN,
3487                         sizeof(struct be_mcc_compl)))
3488                 goto err;
3489         /* Ask BE to create MCC compl queue; */
3490         if (phba->msix_enabled) {
3491                 if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq
3492                                          [phba->num_cpus].q, false, true, 0))
3493                 goto mcc_cq_free;
3494         } else {
3495                 if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq[0].q,
3496                                           false, true, 0))
3497                 goto mcc_cq_free;
3498         }
3499
3500         /* Alloc MCC queue */
3501         q = &phba->ctrl.mcc_obj.q;
3502         if (be_queue_alloc(phba, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
3503                 goto mcc_cq_destroy;
3504
3505         /* Ask BE to create MCC queue */
3506         if (beiscsi_cmd_mccq_create(phba, q, cq))
3507                 goto mcc_q_free;
3508
3509         return 0;
3510
3511 mcc_q_free:
3512         be_queue_free(phba, q);
3513 mcc_cq_destroy:
3514         beiscsi_cmd_q_destroy(ctrl, cq, QTYPE_CQ);
3515 mcc_cq_free:
3516         be_queue_free(phba, cq);
3517 err:
3518         return -ENOMEM;
3519 }
3520
3521 /**
3522  * find_num_cpus()- Get the CPU online count
3523  * @phba: ptr to priv structure
3524  *
3525  * CPU count is used for creating EQ.
3526  **/
3527 static void find_num_cpus(struct beiscsi_hba *phba)
3528 {
3529         int  num_cpus = 0;
3530
3531         num_cpus = num_online_cpus();
3532
3533         switch (phba->generation) {
3534         case BE_GEN2:
3535         case BE_GEN3:
3536                 phba->num_cpus = (num_cpus > BEISCSI_MAX_NUM_CPUS) ?
3537                                   BEISCSI_MAX_NUM_CPUS : num_cpus;
3538                 break;
3539         case BE_GEN4:
3540                 phba->num_cpus = (num_cpus > OC_SKH_MAX_NUM_CPUS) ?
3541                                   OC_SKH_MAX_NUM_CPUS : num_cpus;
3542                 break;
3543         default:
3544                 phba->num_cpus = 1;
3545         }
3546 }
3547
3548 static int hwi_init_port(struct beiscsi_hba *phba)
3549 {
3550         struct hwi_controller *phwi_ctrlr;
3551         struct hwi_context_memory *phwi_context;
3552         unsigned int def_pdu_ring_sz;
3553         struct be_ctrl_info *ctrl = &phba->ctrl;
3554         int status;
3555
3556         def_pdu_ring_sz =
3557                 phba->params.asyncpdus_per_ctrl * sizeof(struct phys_addr);
3558         phwi_ctrlr = phba->phwi_ctrlr;
3559         phwi_context = phwi_ctrlr->phwi_ctxt;
3560         phwi_context->max_eqd = 0;
3561         phwi_context->min_eqd = 0;
3562         phwi_context->cur_eqd = 64;
3563         be_cmd_fw_initialize(&phba->ctrl);
3564
3565         status = beiscsi_create_eqs(phba, phwi_context);
3566         if (status != 0) {
3567                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3568                             "BM_%d : EQ not created\n");
3569                 goto error;
3570         }
3571
3572         status = be_mcc_queues_create(phba, phwi_context);
3573         if (status != 0)
3574                 goto error;
3575
3576         status = mgmt_check_supported_fw(ctrl, phba);
3577         if (status != 0) {
3578                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3579                             "BM_%d : Unsupported fw version\n");
3580                 goto error;
3581         }
3582
3583         status = beiscsi_create_cqs(phba, phwi_context);
3584         if (status != 0) {
3585                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3586                             "BM_%d : CQ not created\n");
3587                 goto error;
3588         }
3589
3590         status = beiscsi_create_def_hdr(phba, phwi_context, phwi_ctrlr,
3591                                         def_pdu_ring_sz);
3592         if (status != 0) {
3593                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3594                             "BM_%d : Default Header not created\n");
3595                 goto error;
3596         }
3597
3598         status = beiscsi_create_def_data(phba, phwi_context,
3599                                          phwi_ctrlr, def_pdu_ring_sz);
3600         if (status != 0) {
3601                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3602                             "BM_%d : Default Data not created\n");
3603                 goto error;
3604         }
3605
3606         status = beiscsi_post_pages(phba);
3607         if (status != 0) {
3608                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3609                             "BM_%d : Post SGL Pages Failed\n");
3610                 goto error;
3611         }
3612
3613         status = beiscsi_create_wrb_rings(phba, phwi_context, phwi_ctrlr);
3614         if (status != 0) {
3615                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3616                             "BM_%d : WRB Rings not created\n");
3617                 goto error;
3618         }
3619
3620         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3621                     "BM_%d : hwi_init_port success\n");
3622         return 0;
3623
3624 error:
3625         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3626                     "BM_%d : hwi_init_port failed");
3627         hwi_cleanup(phba);
3628         return status;
3629 }
3630
3631 static int hwi_init_controller(struct beiscsi_hba *phba)
3632 {
3633         struct hwi_controller *phwi_ctrlr;
3634
3635         phwi_ctrlr = phba->phwi_ctrlr;
3636         if (1 == phba->init_mem[HWI_MEM_ADDN_CONTEXT].num_elements) {
3637                 phwi_ctrlr->phwi_ctxt = (struct hwi_context_memory *)phba->
3638                     init_mem[HWI_MEM_ADDN_CONTEXT].mem_array[0].virtual_address;
3639                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3640                             "BM_%d :  phwi_ctrlr->phwi_ctxt=%p\n",
3641                             phwi_ctrlr->phwi_ctxt);
3642         } else {
3643                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3644                             "BM_%d : HWI_MEM_ADDN_CONTEXT is more "
3645                             "than one element.Failing to load\n");
3646                 return -ENOMEM;
3647         }
3648
3649         iscsi_init_global_templates(phba);
3650         if (beiscsi_init_wrb_handle(phba))
3651                 return -ENOMEM;
3652
3653         if (hwi_init_async_pdu_ctx(phba)) {
3654                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3655                             "BM_%d : hwi_init_async_pdu_ctx failed\n");
3656                 return -ENOMEM;
3657         }
3658
3659         if (hwi_init_port(phba) != 0) {
3660                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3661                             "BM_%d : hwi_init_controller failed\n");
3662
3663                 return -ENOMEM;
3664         }
3665         return 0;
3666 }
3667
3668 static void beiscsi_free_mem(struct beiscsi_hba *phba)
3669 {
3670         struct be_mem_descriptor *mem_descr;
3671         int i, j;
3672
3673         mem_descr = phba->init_mem;
3674         i = 0;
3675         j = 0;
3676         for (i = 0; i < SE_MEM_MAX; i++) {
3677                 for (j = mem_descr->num_elements; j > 0; j--) {
3678                         pci_free_consistent(phba->pcidev,
3679                           mem_descr->mem_array[j - 1].size,
3680                           mem_descr->mem_array[j - 1].virtual_address,
3681                           (unsigned long)mem_descr->mem_array[j - 1].
3682                           bus_address.u.a64.address);
3683                 }
3684                 kfree(mem_descr->mem_array);
3685                 mem_descr++;
3686         }
3687         kfree(phba->init_mem);
3688         kfree(phba->phwi_ctrlr->wrb_context);
3689         kfree(phba->phwi_ctrlr);
3690 }
3691
3692 static int beiscsi_init_controller(struct beiscsi_hba *phba)
3693 {
3694         int ret = -ENOMEM;
3695
3696         ret = beiscsi_get_memory(phba);
3697         if (ret < 0) {
3698                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3699                             "BM_%d : beiscsi_dev_probe -"
3700                             "Failed in beiscsi_alloc_memory\n");
3701                 return ret;
3702         }
3703
3704         ret = hwi_init_controller(phba);
3705         if (ret)
3706                 goto free_init;
3707         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3708                     "BM_%d : Return success from beiscsi_init_controller");
3709
3710         return 0;
3711
3712 free_init:
3713         beiscsi_free_mem(phba);
3714         return ret;
3715 }
3716
3717 static int beiscsi_init_sgl_handle(struct beiscsi_hba *phba)
3718 {
3719         struct be_mem_descriptor *mem_descr_sglh, *mem_descr_sg;
3720         struct sgl_handle *psgl_handle;
3721         struct iscsi_sge *pfrag;
3722         unsigned int arr_index, i, idx;
3723
3724         phba->io_sgl_hndl_avbl = 0;
3725         phba->eh_sgl_hndl_avbl = 0;
3726
3727         mem_descr_sglh = phba->init_mem;
3728         mem_descr_sglh += HWI_MEM_SGLH;
3729         if (1 == mem_descr_sglh->num_elements) {
3730                 phba->io_sgl_hndl_base = kzalloc(sizeof(struct sgl_handle *) *
3731                                                  phba->params.ios_per_ctrl,
3732                                                  GFP_KERNEL);
3733                 if (!phba->io_sgl_hndl_base) {
3734                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3735                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
3736                         return -ENOMEM;
3737                 }
3738                 phba->eh_sgl_hndl_base = kzalloc(sizeof(struct sgl_handle *) *
3739                                                  (phba->params.icds_per_ctrl -
3740                                                  phba->params.ios_per_ctrl),
3741                                                  GFP_KERNEL);
3742                 if (!phba->eh_sgl_hndl_base) {
3743                         kfree(phba->io_sgl_hndl_base);
3744                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3745                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
3746                         return -ENOMEM;
3747                 }
3748         } else {
3749                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3750                             "BM_%d : HWI_MEM_SGLH is more than one element."
3751                             "Failing to load\n");
3752                 return -ENOMEM;
3753         }
3754
3755         arr_index = 0;
3756         idx = 0;
3757         while (idx < mem_descr_sglh->num_elements) {
3758                 psgl_handle = mem_descr_sglh->mem_array[idx].virtual_address;
3759
3760                 for (i = 0; i < (mem_descr_sglh->mem_array[idx].size /
3761                       sizeof(struct sgl_handle)); i++) {
3762                         if (arr_index < phba->params.ios_per_ctrl) {
3763                                 phba->io_sgl_hndl_base[arr_index] = psgl_handle;
3764                                 phba->io_sgl_hndl_avbl++;
3765                                 arr_index++;
3766                         } else {
3767                                 phba->eh_sgl_hndl_base[arr_index -
3768                                         phba->params.ios_per_ctrl] =
3769                                                                 psgl_handle;
3770                                 arr_index++;
3771                                 phba->eh_sgl_hndl_avbl++;
3772                         }
3773                         psgl_handle++;
3774                 }
3775                 idx++;
3776         }
3777         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3778                     "BM_%d : phba->io_sgl_hndl_avbl=%d"
3779                     "phba->eh_sgl_hndl_avbl=%d\n",
3780                     phba->io_sgl_hndl_avbl,
3781                     phba->eh_sgl_hndl_avbl);
3782
3783         mem_descr_sg = phba->init_mem;
3784         mem_descr_sg += HWI_MEM_SGE;
3785         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3786                     "\n BM_%d : mem_descr_sg->num_elements=%d\n",
3787                     mem_descr_sg->num_elements);
3788
3789         arr_index = 0;
3790         idx = 0;
3791         while (idx < mem_descr_sg->num_elements) {
3792                 pfrag = mem_descr_sg->mem_array[idx].virtual_address;
3793
3794                 for (i = 0;
3795                      i < (mem_descr_sg->mem_array[idx].size) /
3796                      (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io);
3797                      i++) {
3798                         if (arr_index < phba->params.ios_per_ctrl)
3799                                 psgl_handle = phba->io_sgl_hndl_base[arr_index];
3800                         else
3801                                 psgl_handle = phba->eh_sgl_hndl_base[arr_index -
3802                                                 phba->params.ios_per_ctrl];
3803                         psgl_handle->pfrag = pfrag;
3804                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, pfrag, 0);
3805                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, pfrag, 0);
3806                         pfrag += phba->params.num_sge_per_io;
3807                         psgl_handle->sgl_index =
3808                                 phba->fw_config.iscsi_icd_start + arr_index++;
3809                 }
3810                 idx++;
3811         }
3812         phba->io_sgl_free_index = 0;
3813         phba->io_sgl_alloc_index = 0;
3814         phba->eh_sgl_free_index = 0;
3815         phba->eh_sgl_alloc_index = 0;
3816         return 0;
3817 }
3818
3819 static int hba_setup_cid_tbls(struct beiscsi_hba *phba)
3820 {
3821         int i;
3822
3823         phba->cid_array = kzalloc(sizeof(void *) * phba->params.cxns_per_ctrl,
3824                                   GFP_KERNEL);
3825         if (!phba->cid_array) {
3826                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3827                             "BM_%d : Failed to allocate memory in "
3828                             "hba_setup_cid_tbls\n");
3829                 return -ENOMEM;
3830         }
3831         phba->ep_array = kzalloc(sizeof(struct iscsi_endpoint *) *
3832                                  phba->params.cxns_per_ctrl, GFP_KERNEL);
3833         if (!phba->ep_array) {
3834                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3835                             "BM_%d : Failed to allocate memory in "
3836                             "hba_setup_cid_tbls\n");
3837                 kfree(phba->cid_array);
3838                 phba->cid_array = NULL;
3839                 return -ENOMEM;
3840         }
3841
3842         phba->conn_table = kzalloc(sizeof(struct beiscsi_conn *) *
3843                                    phba->params.cxns_per_ctrl, GFP_KERNEL);
3844         if (!phba->conn_table) {
3845                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3846                             "BM_%d : Failed to allocate memory in"
3847                             "hba_setup_cid_tbls\n");
3848
3849                 kfree(phba->cid_array);
3850                 kfree(phba->ep_array);
3851                 phba->cid_array = NULL;
3852                 phba->ep_array = NULL;
3853                 return -ENOMEM;
3854         }
3855
3856         for (i = 0; i < phba->params.cxns_per_ctrl; i++)
3857                 phba->cid_array[i] = phba->phwi_ctrlr->wrb_context[i].cid;
3858
3859         phba->avlbl_cids = phba->params.cxns_per_ctrl;
3860         return 0;
3861 }
3862
3863 static void hwi_enable_intr(struct beiscsi_hba *phba)
3864 {
3865         struct be_ctrl_info *ctrl = &phba->ctrl;
3866         struct hwi_controller *phwi_ctrlr;
3867         struct hwi_context_memory *phwi_context;
3868         struct be_queue_info *eq;
3869         u8 __iomem *addr;
3870         u32 reg, i;
3871         u32 enabled;
3872
3873         phwi_ctrlr = phba->phwi_ctrlr;
3874         phwi_context = phwi_ctrlr->phwi_ctxt;
3875
3876         addr = (u8 __iomem *) ((u8 __iomem *) ctrl->pcicfg +
3877                         PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET);
3878         reg = ioread32(addr);
3879
3880         enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
3881         if (!enabled) {
3882                 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
3883                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3884                             "BM_%d : reg =x%08x addr=%p\n", reg, addr);
3885                 iowrite32(reg, addr);
3886         }
3887
3888         if (!phba->msix_enabled) {
3889                 eq = &phwi_context->be_eq[0].q;
3890                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3891                             "BM_%d : eq->id=%d\n", eq->id);
3892
3893                 hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
3894         } else {
3895                 for (i = 0; i <= phba->num_cpus; i++) {
3896                         eq = &phwi_context->be_eq[i].q;
3897                         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3898                                     "BM_%d : eq->id=%d\n", eq->id);
3899                         hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
3900                 }
3901         }
3902 }
3903
3904 static void hwi_disable_intr(struct beiscsi_hba *phba)
3905 {
3906         struct be_ctrl_info *ctrl = &phba->ctrl;
3907
3908         u8 __iomem *addr = ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
3909         u32 reg = ioread32(addr);
3910
3911         u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
3912         if (enabled) {
3913                 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
3914                 iowrite32(reg, addr);
3915         } else
3916                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
3917                             "BM_%d : In hwi_disable_intr, Already Disabled\n");
3918 }
3919
3920 /**
3921  * beiscsi_get_boot_info()- Get the boot session info
3922  * @phba: The device priv structure instance
3923  *
3924  * Get the boot target info and store in driver priv structure
3925  *
3926  * return values
3927  *      Success: 0
3928  *      Failure: Non-Zero Value
3929  **/
3930 static int beiscsi_get_boot_info(struct beiscsi_hba *phba)
3931 {
3932         struct be_cmd_get_session_resp *session_resp;
3933         struct be_dma_mem nonemb_cmd;
3934         unsigned int tag;
3935         unsigned int s_handle;
3936         int ret = -ENOMEM;
3937
3938         /* Get the session handle of the boot target */
3939         ret = be_mgmt_get_boot_shandle(phba, &s_handle);
3940         if (ret) {
3941                 beiscsi_log(phba, KERN_ERR,
3942                             BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
3943                             "BM_%d : No boot session\n");
3944                 return ret;
3945         }
3946         nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
3947                                 sizeof(*session_resp),
3948                                 &nonemb_cmd.dma);
3949         if (nonemb_cmd.va == NULL) {
3950                 beiscsi_log(phba, KERN_ERR,
3951                             BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
3952                             "BM_%d : Failed to allocate memory for"
3953                             "beiscsi_get_session_info\n");
3954
3955                 return -ENOMEM;
3956         }
3957
3958         memset(nonemb_cmd.va, 0, sizeof(*session_resp));
3959         tag = mgmt_get_session_info(phba, s_handle,
3960                                     &nonemb_cmd);
3961         if (!tag) {
3962                 beiscsi_log(phba, KERN_ERR,
3963                             BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
3964                             "BM_%d : beiscsi_get_session_info"
3965                             " Failed\n");
3966
3967                 goto boot_freemem;
3968         }
3969
3970         ret = beiscsi_mccq_compl(phba, tag, NULL, nonemb_cmd.va);
3971         if (ret) {
3972                 beiscsi_log(phba, KERN_ERR,
3973                             BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
3974                             "BM_%d : beiscsi_get_session_info Failed");
3975                 goto boot_freemem;
3976         }
3977
3978         session_resp = nonemb_cmd.va ;
3979
3980         memcpy(&phba->boot_sess, &session_resp->session_info,
3981                sizeof(struct mgmt_session_info));
3982         ret = 0;
3983
3984 boot_freemem:
3985         pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
3986                     nonemb_cmd.va, nonemb_cmd.dma);
3987         return ret;
3988 }
3989
3990 static void beiscsi_boot_release(void *data)
3991 {
3992         struct beiscsi_hba *phba = data;
3993
3994         scsi_host_put(phba->shost);
3995 }
3996
3997 static int beiscsi_setup_boot_info(struct beiscsi_hba *phba)
3998 {
3999         struct iscsi_boot_kobj *boot_kobj;
4000
4001         /* get boot info using mgmt cmd */
4002         if (beiscsi_get_boot_info(phba))
4003                 /* Try to see if we can carry on without this */
4004                 return 0;
4005
4006         phba->boot_kset = iscsi_boot_create_host_kset(phba->shost->host_no);
4007         if (!phba->boot_kset)
4008                 return -ENOMEM;
4009
4010         /* get a ref because the show function will ref the phba */
4011         if (!scsi_host_get(phba->shost))
4012                 goto free_kset;
4013         boot_kobj = iscsi_boot_create_target(phba->boot_kset, 0, phba,
4014                                              beiscsi_show_boot_tgt_info,
4015                                              beiscsi_tgt_get_attr_visibility,
4016                                              beiscsi_boot_release);
4017         if (!boot_kobj)
4018                 goto put_shost;
4019
4020         if (!scsi_host_get(phba->shost))
4021                 goto free_kset;
4022         boot_kobj = iscsi_boot_create_initiator(phba->boot_kset, 0, phba,
4023                                                 beiscsi_show_boot_ini_info,
4024                                                 beiscsi_ini_get_attr_visibility,
4025                                                 beiscsi_boot_release);
4026         if (!boot_kobj)
4027                 goto put_shost;
4028
4029         if (!scsi_host_get(phba->shost))
4030                 goto free_kset;
4031         boot_kobj = iscsi_boot_create_ethernet(phba->boot_kset, 0, phba,
4032                                                beiscsi_show_boot_eth_info,
4033                                                beiscsi_eth_get_attr_visibility,
4034                                                beiscsi_boot_release);
4035         if (!boot_kobj)
4036                 goto put_shost;
4037         return 0;
4038
4039 put_shost:
4040         scsi_host_put(phba->shost);
4041 free_kset:
4042         iscsi_boot_destroy_kset(phba->boot_kset);
4043         return -ENOMEM;
4044 }
4045
4046 static int beiscsi_init_port(struct beiscsi_hba *phba)
4047 {
4048         int ret;
4049
4050         ret = beiscsi_init_controller(phba);
4051         if (ret < 0) {
4052                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4053                             "BM_%d : beiscsi_dev_probe - Failed in"
4054                             "beiscsi_init_controller\n");
4055                 return ret;
4056         }
4057         ret = beiscsi_init_sgl_handle(phba);
4058         if (ret < 0) {
4059                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4060                             "BM_%d : beiscsi_dev_probe - Failed in"
4061                             "beiscsi_init_sgl_handle\n");
4062                 goto do_cleanup_ctrlr;
4063         }
4064
4065         if (hba_setup_cid_tbls(phba)) {
4066                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4067                             "BM_%d : Failed in hba_setup_cid_tbls\n");
4068                 kfree(phba->io_sgl_hndl_base);
4069                 kfree(phba->eh_sgl_hndl_base);
4070                 goto do_cleanup_ctrlr;
4071         }
4072
4073         return ret;
4074
4075 do_cleanup_ctrlr:
4076         hwi_cleanup(phba);
4077         return ret;
4078 }
4079
4080 static void hwi_purge_eq(struct beiscsi_hba *phba)
4081 {
4082         struct hwi_controller *phwi_ctrlr;
4083         struct hwi_context_memory *phwi_context;
4084         struct be_queue_info *eq;
4085         struct be_eq_entry *eqe = NULL;
4086         int i, eq_msix;
4087         unsigned int num_processed;
4088
4089         phwi_ctrlr = phba->phwi_ctrlr;
4090         phwi_context = phwi_ctrlr->phwi_ctxt;
4091         if (phba->msix_enabled)
4092                 eq_msix = 1;
4093         else
4094                 eq_msix = 0;
4095
4096         for (i = 0; i < (phba->num_cpus + eq_msix); i++) {
4097                 eq = &phwi_context->be_eq[i].q;
4098                 eqe = queue_tail_node(eq);
4099                 num_processed = 0;
4100                 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
4101                                         & EQE_VALID_MASK) {
4102                         AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
4103                         queue_tail_inc(eq);
4104                         eqe = queue_tail_node(eq);
4105                         num_processed++;
4106                 }
4107
4108                 if (num_processed)
4109                         hwi_ring_eq_db(phba, eq->id, 1, num_processed, 1, 1);
4110         }
4111 }
4112
4113 static void beiscsi_clean_port(struct beiscsi_hba *phba)
4114 {
4115         int mgmt_status;
4116
4117         mgmt_status = mgmt_epfw_cleanup(phba, CMD_CONNECTION_CHUTE_0);
4118         if (mgmt_status)
4119                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
4120                             "BM_%d : mgmt_epfw_cleanup FAILED\n");
4121
4122         hwi_purge_eq(phba);
4123         hwi_cleanup(phba);
4124         kfree(phba->io_sgl_hndl_base);
4125         kfree(phba->eh_sgl_hndl_base);
4126         kfree(phba->cid_array);
4127         kfree(phba->ep_array);
4128         kfree(phba->conn_table);
4129 }
4130
4131 /**
4132  * beiscsi_free_mgmt_task_handles()- Free driver CXN resources
4133  * @beiscsi_conn: ptr to the conn to be cleaned up
4134  * @task: ptr to iscsi_task resource to be freed.
4135  *
4136  * Free driver mgmt resources binded to CXN.
4137  **/
4138 void
4139 beiscsi_free_mgmt_task_handles(struct beiscsi_conn *beiscsi_conn,
4140                                 struct iscsi_task *task)
4141 {
4142         struct beiscsi_io_task *io_task;
4143         struct beiscsi_hba *phba = beiscsi_conn->phba;
4144         struct hwi_wrb_context *pwrb_context;
4145         struct hwi_controller *phwi_ctrlr;
4146         uint16_t cri_index = BE_GET_CRI_FROM_CID(
4147                                 beiscsi_conn->beiscsi_conn_cid);
4148
4149         phwi_ctrlr = phba->phwi_ctrlr;
4150         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4151
4152         io_task = task->dd_data;
4153
4154         if (io_task->pwrb_handle) {
4155                 memset(io_task->pwrb_handle->pwrb, 0,
4156                        sizeof(struct iscsi_wrb));
4157                 free_wrb_handle(phba, pwrb_context,
4158                                 io_task->pwrb_handle);
4159                 io_task->pwrb_handle = NULL;
4160         }
4161
4162         if (io_task->psgl_handle) {
4163                 spin_lock_bh(&phba->mgmt_sgl_lock);
4164                 free_mgmt_sgl_handle(phba,
4165                                      io_task->psgl_handle);
4166                 io_task->psgl_handle = NULL;
4167                 spin_unlock_bh(&phba->mgmt_sgl_lock);
4168         }
4169
4170         if (io_task->mtask_addr)
4171                 pci_unmap_single(phba->pcidev,
4172                                  io_task->mtask_addr,
4173                                  io_task->mtask_data_count,
4174                                  PCI_DMA_TODEVICE);
4175 }
4176
4177 /**
4178  * beiscsi_cleanup_task()- Free driver resources of the task
4179  * @task: ptr to the iscsi task
4180  *
4181  **/
4182 static void beiscsi_cleanup_task(struct iscsi_task *task)
4183 {
4184         struct beiscsi_io_task *io_task = task->dd_data;
4185         struct iscsi_conn *conn = task->conn;
4186         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4187         struct beiscsi_hba *phba = beiscsi_conn->phba;
4188         struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
4189         struct hwi_wrb_context *pwrb_context;
4190         struct hwi_controller *phwi_ctrlr;
4191         uint16_t cri_index = BE_GET_CRI_FROM_CID(
4192                              beiscsi_conn->beiscsi_conn_cid);
4193
4194         phwi_ctrlr = phba->phwi_ctrlr;
4195         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4196
4197         if (io_task->cmd_bhs) {
4198                 pci_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
4199                               io_task->bhs_pa.u.a64.address);
4200                 io_task->cmd_bhs = NULL;
4201         }
4202
4203         if (task->sc) {
4204                 if (io_task->pwrb_handle) {
4205                         free_wrb_handle(phba, pwrb_context,
4206                                         io_task->pwrb_handle);
4207                         io_task->pwrb_handle = NULL;
4208                 }
4209
4210                 if (io_task->psgl_handle) {
4211                         spin_lock(&phba->io_sgl_lock);
4212                         free_io_sgl_handle(phba, io_task->psgl_handle);
4213                         spin_unlock(&phba->io_sgl_lock);
4214                         io_task->psgl_handle = NULL;
4215                 }
4216         } else {
4217                 if (!beiscsi_conn->login_in_progress)
4218                         beiscsi_free_mgmt_task_handles(beiscsi_conn, task);
4219         }
4220 }
4221
4222 void
4223 beiscsi_offload_connection(struct beiscsi_conn *beiscsi_conn,
4224                            struct beiscsi_offload_params *params)
4225 {
4226         struct wrb_handle *pwrb_handle;
4227         struct beiscsi_hba *phba = beiscsi_conn->phba;
4228         struct iscsi_task *task = beiscsi_conn->task;
4229         struct iscsi_session *session = task->conn->session;
4230         u32 doorbell = 0;
4231
4232         /*
4233          * We can always use 0 here because it is reserved by libiscsi for
4234          * login/startup related tasks.
4235          */
4236         beiscsi_conn->login_in_progress = 0;
4237         spin_lock_bh(&session->lock);
4238         beiscsi_cleanup_task(task);
4239         spin_unlock_bh(&session->lock);
4240
4241         pwrb_handle = alloc_wrb_handle(phba, beiscsi_conn->beiscsi_conn_cid);
4242
4243         /* Check for the adapter family */
4244         if (is_chip_be2_be3r(phba))
4245                 beiscsi_offload_cxn_v0(params, pwrb_handle,
4246                                        phba->init_mem);
4247         else
4248                 beiscsi_offload_cxn_v2(params, pwrb_handle);
4249
4250         be_dws_le_to_cpu(pwrb_handle->pwrb,
4251                          sizeof(struct iscsi_target_context_update_wrb));
4252
4253         doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4254         doorbell |= (pwrb_handle->wrb_index & DB_DEF_PDU_WRB_INDEX_MASK)
4255                              << DB_DEF_PDU_WRB_INDEX_SHIFT;
4256         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4257
4258         iowrite32(doorbell, phba->db_va + DB_TXULP0_OFFSET);
4259 }
4260
4261 static void beiscsi_parse_pdu(struct iscsi_conn *conn, itt_t itt,
4262                               int *index, int *age)
4263 {
4264         *index = (int)itt;
4265         if (age)
4266                 *age = conn->session->age;
4267 }
4268
4269 /**
4270  * beiscsi_alloc_pdu - allocates pdu and related resources
4271  * @task: libiscsi task
4272  * @opcode: opcode of pdu for task
4273  *
4274  * This is called with the session lock held. It will allocate
4275  * the wrb and sgl if needed for the command. And it will prep
4276  * the pdu's itt. beiscsi_parse_pdu will later translate
4277  * the pdu itt to the libiscsi task itt.
4278  */
4279 static int beiscsi_alloc_pdu(struct iscsi_task *task, uint8_t opcode)
4280 {
4281         struct beiscsi_io_task *io_task = task->dd_data;
4282         struct iscsi_conn *conn = task->conn;
4283         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4284         struct beiscsi_hba *phba = beiscsi_conn->phba;
4285         struct hwi_wrb_context *pwrb_context;
4286         struct hwi_controller *phwi_ctrlr;
4287         itt_t itt;
4288         uint16_t cri_index = 0;
4289         struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
4290         dma_addr_t paddr;
4291
4292         io_task->cmd_bhs = pci_pool_alloc(beiscsi_sess->bhs_pool,
4293                                           GFP_ATOMIC, &paddr);
4294         if (!io_task->cmd_bhs)
4295                 return -ENOMEM;
4296         io_task->bhs_pa.u.a64.address = paddr;
4297         io_task->libiscsi_itt = (itt_t)task->itt;
4298         io_task->conn = beiscsi_conn;
4299
4300         task->hdr = (struct iscsi_hdr *)&io_task->cmd_bhs->iscsi_hdr;
4301         task->hdr_max = sizeof(struct be_cmd_bhs);
4302         io_task->psgl_handle = NULL;
4303         io_task->pwrb_handle = NULL;
4304
4305         if (task->sc) {
4306                 spin_lock(&phba->io_sgl_lock);
4307                 io_task->psgl_handle = alloc_io_sgl_handle(phba);
4308                 spin_unlock(&phba->io_sgl_lock);
4309                 if (!io_task->psgl_handle) {
4310                         beiscsi_log(phba, KERN_ERR,
4311                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4312                                     "BM_%d : Alloc of IO_SGL_ICD Failed"
4313                                     "for the CID : %d\n",
4314                                     beiscsi_conn->beiscsi_conn_cid);
4315                         goto free_hndls;
4316                 }
4317                 io_task->pwrb_handle = alloc_wrb_handle(phba,
4318                                         beiscsi_conn->beiscsi_conn_cid);
4319                 if (!io_task->pwrb_handle) {
4320                         beiscsi_log(phba, KERN_ERR,
4321                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4322                                     "BM_%d : Alloc of WRB_HANDLE Failed"
4323                                     "for the CID : %d\n",
4324                                     beiscsi_conn->beiscsi_conn_cid);
4325                         goto free_io_hndls;
4326                 }
4327         } else {
4328                 io_task->scsi_cmnd = NULL;
4329                 if ((opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGIN) {
4330                         beiscsi_conn->task = task;
4331                         if (!beiscsi_conn->login_in_progress) {
4332                                 spin_lock(&phba->mgmt_sgl_lock);
4333                                 io_task->psgl_handle = (struct sgl_handle *)
4334                                                 alloc_mgmt_sgl_handle(phba);
4335                                 spin_unlock(&phba->mgmt_sgl_lock);
4336                                 if (!io_task->psgl_handle) {
4337                                         beiscsi_log(phba, KERN_ERR,
4338                                                     BEISCSI_LOG_IO |
4339                                                     BEISCSI_LOG_CONFIG,
4340                                                     "BM_%d : Alloc of MGMT_SGL_ICD Failed"
4341                                                     "for the CID : %d\n",
4342                                                     beiscsi_conn->
4343                                                     beiscsi_conn_cid);
4344                                         goto free_hndls;
4345                                 }
4346
4347                                 beiscsi_conn->login_in_progress = 1;
4348                                 beiscsi_conn->plogin_sgl_handle =
4349                                                         io_task->psgl_handle;
4350                                 io_task->pwrb_handle =
4351                                         alloc_wrb_handle(phba,
4352                                         beiscsi_conn->beiscsi_conn_cid);
4353                                 if (!io_task->pwrb_handle) {
4354                                         beiscsi_log(phba, KERN_ERR,
4355                                                     BEISCSI_LOG_IO |
4356                                                     BEISCSI_LOG_CONFIG,
4357                                                     "BM_%d : Alloc of WRB_HANDLE Failed"
4358                                                     "for the CID : %d\n",
4359                                                     beiscsi_conn->
4360                                                     beiscsi_conn_cid);
4361                                         goto free_mgmt_hndls;
4362                                 }
4363                                 beiscsi_conn->plogin_wrb_handle =
4364                                                         io_task->pwrb_handle;
4365
4366                         } else {
4367                                 io_task->psgl_handle =
4368                                                 beiscsi_conn->plogin_sgl_handle;
4369                                 io_task->pwrb_handle =
4370                                                 beiscsi_conn->plogin_wrb_handle;
4371                         }
4372                 } else {
4373                         spin_lock(&phba->mgmt_sgl_lock);
4374                         io_task->psgl_handle = alloc_mgmt_sgl_handle(phba);
4375                         spin_unlock(&phba->mgmt_sgl_lock);
4376                         if (!io_task->psgl_handle) {
4377                                 beiscsi_log(phba, KERN_ERR,
4378                                             BEISCSI_LOG_IO |
4379                                             BEISCSI_LOG_CONFIG,
4380                                             "BM_%d : Alloc of MGMT_SGL_ICD Failed"
4381                                             "for the CID : %d\n",
4382                                             beiscsi_conn->
4383                                             beiscsi_conn_cid);
4384                                 goto free_hndls;
4385                         }
4386                         io_task->pwrb_handle =
4387                                         alloc_wrb_handle(phba,
4388                                         beiscsi_conn->beiscsi_conn_cid);
4389                         if (!io_task->pwrb_handle) {
4390                                 beiscsi_log(phba, KERN_ERR,
4391                                             BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4392                                             "BM_%d : Alloc of WRB_HANDLE Failed"
4393                                             "for the CID : %d\n",
4394                                             beiscsi_conn->beiscsi_conn_cid);
4395                                 goto free_mgmt_hndls;
4396                         }
4397
4398                 }
4399         }
4400         itt = (itt_t) cpu_to_be32(((unsigned int)io_task->pwrb_handle->
4401                                  wrb_index << 16) | (unsigned int)
4402                                 (io_task->psgl_handle->sgl_index));
4403         io_task->pwrb_handle->pio_handle = task;
4404
4405         io_task->cmd_bhs->iscsi_hdr.itt = itt;
4406         return 0;
4407
4408 free_io_hndls:
4409         spin_lock(&phba->io_sgl_lock);
4410         free_io_sgl_handle(phba, io_task->psgl_handle);
4411         spin_unlock(&phba->io_sgl_lock);
4412         goto free_hndls;
4413 free_mgmt_hndls:
4414         spin_lock(&phba->mgmt_sgl_lock);
4415         free_mgmt_sgl_handle(phba, io_task->psgl_handle);
4416         io_task->psgl_handle = NULL;
4417         spin_unlock(&phba->mgmt_sgl_lock);
4418 free_hndls:
4419         phwi_ctrlr = phba->phwi_ctrlr;
4420         cri_index = BE_GET_CRI_FROM_CID(
4421         beiscsi_conn->beiscsi_conn_cid);
4422         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4423         if (io_task->pwrb_handle)
4424                 free_wrb_handle(phba, pwrb_context, io_task->pwrb_handle);
4425         io_task->pwrb_handle = NULL;
4426         pci_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
4427                       io_task->bhs_pa.u.a64.address);
4428         io_task->cmd_bhs = NULL;
4429         return -ENOMEM;
4430 }
4431 int beiscsi_iotask_v2(struct iscsi_task *task, struct scatterlist *sg,
4432                        unsigned int num_sg, unsigned int xferlen,
4433                        unsigned int writedir)
4434 {
4435
4436         struct beiscsi_io_task *io_task = task->dd_data;
4437         struct iscsi_conn *conn = task->conn;
4438         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4439         struct beiscsi_hba *phba = beiscsi_conn->phba;
4440         struct iscsi_wrb *pwrb = NULL;
4441         unsigned int doorbell = 0;
4442
4443         pwrb = io_task->pwrb_handle->pwrb;
4444
4445         io_task->cmd_bhs->iscsi_hdr.exp_statsn = 0;
4446         io_task->bhs_len = sizeof(struct be_cmd_bhs);
4447
4448         if (writedir) {
4449                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, type, pwrb,
4450                               INI_WR_CMD);
4451                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp, pwrb, 1);
4452         } else {
4453                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, type, pwrb,
4454                               INI_RD_CMD);
4455                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp, pwrb, 0);
4456         }
4457
4458         io_task->wrb_type = AMAP_GET_BITS(struct amap_iscsi_wrb_v2,
4459                                           type, pwrb);
4460
4461         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, lun, pwrb,
4462                       cpu_to_be16(*(unsigned short *)
4463                       &io_task->cmd_bhs->iscsi_hdr.lun));
4464         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, r2t_exp_dtl, pwrb, xferlen);
4465         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, wrb_idx, pwrb,
4466                       io_task->pwrb_handle->wrb_index);
4467         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, cmdsn_itt, pwrb,
4468                       be32_to_cpu(task->cmdsn));
4469         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sgl_idx, pwrb,
4470                       io_task->psgl_handle->sgl_index);
4471
4472         hwi_write_sgl_v2(pwrb, sg, num_sg, io_task);
4473         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb, pwrb,
4474                       io_task->pwrb_handle->nxt_wrb_index);
4475
4476         be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));
4477
4478         doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4479         doorbell |= (io_task->pwrb_handle->wrb_index &
4480                      DB_DEF_PDU_WRB_INDEX_MASK) <<
4481                      DB_DEF_PDU_WRB_INDEX_SHIFT;
4482         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4483         iowrite32(doorbell, phba->db_va + DB_TXULP0_OFFSET);
4484         return 0;
4485 }
4486
4487 static int beiscsi_iotask(struct iscsi_task *task, struct scatterlist *sg,
4488                           unsigned int num_sg, unsigned int xferlen,
4489                           unsigned int writedir)
4490 {
4491
4492         struct beiscsi_io_task *io_task = task->dd_data;
4493         struct iscsi_conn *conn = task->conn;
4494         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4495         struct beiscsi_hba *phba = beiscsi_conn->phba;
4496         struct iscsi_wrb *pwrb = NULL;
4497         unsigned int doorbell = 0;
4498
4499         pwrb = io_task->pwrb_handle->pwrb;
4500         io_task->cmd_bhs->iscsi_hdr.exp_statsn = 0;
4501         io_task->bhs_len = sizeof(struct be_cmd_bhs);
4502
4503         if (writedir) {
4504                 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4505                               INI_WR_CMD);
4506                 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 1);
4507         } else {
4508                 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4509                               INI_RD_CMD);
4510                 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
4511         }
4512
4513         io_task->wrb_type = AMAP_GET_BITS(struct amap_iscsi_wrb,
4514                                           type, pwrb);
4515
4516         AMAP_SET_BITS(struct amap_iscsi_wrb, lun, pwrb,
4517                       cpu_to_be16(*(unsigned short *)
4518                                   &io_task->cmd_bhs->iscsi_hdr.lun));
4519         AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb, xferlen);
4520         AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
4521                       io_task->pwrb_handle->wrb_index);
4522         AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
4523                       be32_to_cpu(task->cmdsn));
4524         AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
4525                       io_task->psgl_handle->sgl_index);
4526
4527         hwi_write_sgl(pwrb, sg, num_sg, io_task);
4528
4529         AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
4530                       io_task->pwrb_handle->nxt_wrb_index);
4531         be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));
4532
4533         doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4534         doorbell |= (io_task->pwrb_handle->wrb_index &
4535                      DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
4536         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4537
4538         iowrite32(doorbell, phba->db_va + DB_TXULP0_OFFSET);
4539         return 0;
4540 }
4541
4542 static int beiscsi_mtask(struct iscsi_task *task)
4543 {
4544         struct beiscsi_io_task *io_task = task->dd_data;
4545         struct iscsi_conn *conn = task->conn;
4546         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4547         struct beiscsi_hba *phba = beiscsi_conn->phba;
4548         struct iscsi_wrb *pwrb = NULL;
4549         unsigned int doorbell = 0;
4550         unsigned int cid;
4551         unsigned int pwrb_typeoffset = 0;
4552
4553         cid = beiscsi_conn->beiscsi_conn_cid;
4554         pwrb = io_task->pwrb_handle->pwrb;
4555         memset(pwrb, 0, sizeof(*pwrb));
4556
4557         if (is_chip_be2_be3r(phba)) {
4558                 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
4559                               be32_to_cpu(task->cmdsn));
4560                 AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
4561                               io_task->pwrb_handle->wrb_index);
4562                 AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
4563                               io_task->psgl_handle->sgl_index);
4564                 AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb,
4565                               task->data_count);
4566                 AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
4567                               io_task->pwrb_handle->nxt_wrb_index);
4568                 pwrb_typeoffset = BE_WRB_TYPE_OFFSET;
4569         } else {
4570                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, cmdsn_itt, pwrb,
4571                               be32_to_cpu(task->cmdsn));
4572                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, wrb_idx, pwrb,
4573                               io_task->pwrb_handle->wrb_index);
4574                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sgl_idx, pwrb,
4575                               io_task->psgl_handle->sgl_index);
4576                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, r2t_exp_dtl, pwrb,
4577                               task->data_count);
4578                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb, pwrb,
4579                               io_task->pwrb_handle->nxt_wrb_index);
4580                 pwrb_typeoffset = SKH_WRB_TYPE_OFFSET;
4581         }
4582
4583
4584         switch (task->hdr->opcode & ISCSI_OPCODE_MASK) {
4585         case ISCSI_OP_LOGIN:
4586                 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb, 1);
4587                 ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
4588                 hwi_write_buffer(pwrb, task);
4589                 break;
4590         case ISCSI_OP_NOOP_OUT:
4591                 if (task->hdr->ttt != ISCSI_RESERVED_TAG) {
4592                         ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
4593                         if (is_chip_be2_be3r(phba))
4594                                 AMAP_SET_BITS(struct amap_iscsi_wrb,
4595                                               dmsg, pwrb, 1);
4596                         else
4597                                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
4598                                               dmsg, pwrb, 1);
4599                 } else {
4600                         ADAPTER_SET_WRB_TYPE(pwrb, INI_RD_CMD, pwrb_typeoffset);
4601                         if (is_chip_be2_be3r(phba))
4602                                 AMAP_SET_BITS(struct amap_iscsi_wrb,
4603                                               dmsg, pwrb, 0);
4604                         else
4605                                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
4606                                               dmsg, pwrb, 0);
4607                 }
4608                 hwi_write_buffer(pwrb, task);
4609                 break;
4610         case ISCSI_OP_TEXT:
4611                 ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
4612                 hwi_write_buffer(pwrb, task);
4613                 break;
4614         case ISCSI_OP_SCSI_TMFUNC:
4615                 ADAPTER_SET_WRB_TYPE(pwrb, INI_TMF_CMD, pwrb_typeoffset);
4616                 hwi_write_buffer(pwrb, task);
4617                 break;
4618         case ISCSI_OP_LOGOUT:
4619                 ADAPTER_SET_WRB_TYPE(pwrb, HWH_TYPE_LOGOUT, pwrb_typeoffset);
4620                 hwi_write_buffer(pwrb, task);
4621                 break;
4622
4623         default:
4624                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4625                             "BM_%d : opcode =%d Not supported\n",
4626                             task->hdr->opcode & ISCSI_OPCODE_MASK);
4627
4628                 return -EINVAL;
4629         }
4630
4631         /* Set the task type */
4632         io_task->wrb_type = (is_chip_be2_be3r(phba)) ?
4633                 AMAP_GET_BITS(struct amap_iscsi_wrb, type, pwrb) :
4634                 AMAP_GET_BITS(struct amap_iscsi_wrb_v2, type, pwrb);
4635
4636         doorbell |= cid & DB_WRB_POST_CID_MASK;
4637         doorbell |= (io_task->pwrb_handle->wrb_index &
4638                      DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
4639         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4640         iowrite32(doorbell, phba->db_va + DB_TXULP0_OFFSET);
4641         return 0;
4642 }
4643
4644 static int beiscsi_task_xmit(struct iscsi_task *task)
4645 {
4646         struct beiscsi_io_task *io_task = task->dd_data;
4647         struct scsi_cmnd *sc = task->sc;
4648         struct beiscsi_hba *phba = NULL;
4649         struct scatterlist *sg;
4650         int num_sg;
4651         unsigned int  writedir = 0, xferlen = 0;
4652
4653         phba = ((struct beiscsi_conn *)task->conn->dd_data)->phba;
4654
4655         if (!sc)
4656                 return beiscsi_mtask(task);
4657
4658         io_task->scsi_cmnd = sc;
4659         num_sg = scsi_dma_map(sc);
4660         if (num_sg < 0) {
4661                 struct iscsi_conn *conn = task->conn;
4662                 struct beiscsi_hba *phba = NULL;
4663
4664                 phba = ((struct beiscsi_conn *)conn->dd_data)->phba;
4665                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_IO,
4666                             "BM_%d : scsi_dma_map Failed\n");
4667
4668                 return num_sg;
4669         }
4670         xferlen = scsi_bufflen(sc);
4671         sg = scsi_sglist(sc);
4672         if (sc->sc_data_direction == DMA_TO_DEVICE)
4673                 writedir = 1;
4674          else
4675                 writedir = 0;
4676
4677          return phba->iotask_fn(task, sg, num_sg, xferlen, writedir);
4678 }
4679
4680 /**
4681  * beiscsi_bsg_request - handle bsg request from ISCSI transport
4682  * @job: job to handle
4683  */
4684 static int beiscsi_bsg_request(struct bsg_job *job)
4685 {
4686         struct Scsi_Host *shost;
4687         struct beiscsi_hba *phba;
4688         struct iscsi_bsg_request *bsg_req = job->request;
4689         int rc = -EINVAL;
4690         unsigned int tag;
4691         struct be_dma_mem nonemb_cmd;
4692         struct be_cmd_resp_hdr *resp;
4693         struct iscsi_bsg_reply *bsg_reply = job->reply;
4694         unsigned short status, extd_status;
4695
4696         shost = iscsi_job_to_shost(job);
4697         phba = iscsi_host_priv(shost);
4698
4699         switch (bsg_req->msgcode) {
4700         case ISCSI_BSG_HST_VENDOR:
4701                 nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
4702                                         job->request_payload.payload_len,
4703                                         &nonemb_cmd.dma);
4704                 if (nonemb_cmd.va == NULL) {
4705                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4706                                     "BM_%d : Failed to allocate memory for "
4707                                     "beiscsi_bsg_request\n");
4708                         return -ENOMEM;
4709                 }
4710                 tag = mgmt_vendor_specific_fw_cmd(&phba->ctrl, phba, job,
4711                                                   &nonemb_cmd);
4712                 if (!tag) {
4713                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4714                                     "BM_%d : MBX Tag Allocation Failed\n");
4715
4716                         pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
4717                                             nonemb_cmd.va, nonemb_cmd.dma);
4718                         return -EAGAIN;
4719                 }
4720
4721                 rc = wait_event_interruptible_timeout(
4722                                         phba->ctrl.mcc_wait[tag],
4723                                         phba->ctrl.mcc_numtag[tag],
4724                                         msecs_to_jiffies(
4725                                         BEISCSI_HOST_MBX_TIMEOUT));
4726                 extd_status = (phba->ctrl.mcc_numtag[tag] & 0x0000FF00) >> 8;
4727                 status = phba->ctrl.mcc_numtag[tag] & 0x000000FF;
4728                 free_mcc_tag(&phba->ctrl, tag);
4729                 resp = (struct be_cmd_resp_hdr *)nonemb_cmd.va;
4730                 sg_copy_from_buffer(job->reply_payload.sg_list,
4731                                     job->reply_payload.sg_cnt,
4732                                     nonemb_cmd.va, (resp->response_length
4733                                     + sizeof(*resp)));
4734                 bsg_reply->reply_payload_rcv_len = resp->response_length;
4735                 bsg_reply->result = status;
4736                 bsg_job_done(job, bsg_reply->result,
4737                              bsg_reply->reply_payload_rcv_len);
4738                 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
4739                                     nonemb_cmd.va, nonemb_cmd.dma);
4740                 if (status || extd_status) {
4741                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4742                                     "BM_%d : MBX Cmd Failed"
4743                                     " status = %d extd_status = %d\n",
4744                                     status, extd_status);
4745
4746                         return -EIO;
4747                 } else {
4748                         rc = 0;
4749                 }
4750                 break;
4751
4752         default:
4753                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4754                                 "BM_%d : Unsupported bsg command: 0x%x\n",
4755                                 bsg_req->msgcode);
4756                 break;
4757         }
4758
4759         return rc;
4760 }
4761
4762 void beiscsi_hba_attrs_init(struct beiscsi_hba *phba)
4763 {
4764         /* Set the logging parameter */
4765         beiscsi_log_enable_init(phba, beiscsi_log_enable);
4766 }
4767
4768 /*
4769  * beiscsi_quiesce()- Cleanup Driver resources
4770  * @phba: Instance Priv structure
4771  *
4772  * Free the OS and HW resources held by the driver
4773  **/
4774 static void beiscsi_quiesce(struct beiscsi_hba *phba)
4775 {
4776         struct hwi_controller *phwi_ctrlr;
4777         struct hwi_context_memory *phwi_context;
4778         struct be_eq_obj *pbe_eq;
4779         unsigned int i, msix_vec;
4780
4781         phwi_ctrlr = phba->phwi_ctrlr;
4782         phwi_context = phwi_ctrlr->phwi_ctxt;
4783         hwi_disable_intr(phba);
4784         if (phba->msix_enabled) {
4785                 for (i = 0; i <= phba->num_cpus; i++) {
4786                         msix_vec = phba->msix_entries[i].vector;
4787                         free_irq(msix_vec, &phwi_context->be_eq[i]);
4788                         kfree(phba->msi_name[i]);
4789                 }
4790         } else
4791                 if (phba->pcidev->irq)
4792                         free_irq(phba->pcidev->irq, phba);
4793         pci_disable_msix(phba->pcidev);
4794         destroy_workqueue(phba->wq);
4795         if (blk_iopoll_enabled)
4796                 for (i = 0; i < phba->num_cpus; i++) {
4797                         pbe_eq = &phwi_context->be_eq[i];
4798                         blk_iopoll_disable(&pbe_eq->iopoll);
4799                 }
4800
4801         beiscsi_clean_port(phba);
4802         beiscsi_free_mem(phba);
4803
4804         beiscsi_unmap_pci_function(phba);
4805         pci_free_consistent(phba->pcidev,
4806                             phba->ctrl.mbox_mem_alloced.size,
4807                             phba->ctrl.mbox_mem_alloced.va,
4808                             phba->ctrl.mbox_mem_alloced.dma);
4809
4810         cancel_delayed_work_sync(&phba->beiscsi_hw_check_task);
4811 }
4812
4813 static void beiscsi_remove(struct pci_dev *pcidev)
4814 {
4815
4816         struct beiscsi_hba *phba = NULL;
4817
4818         phba = pci_get_drvdata(pcidev);
4819         if (!phba) {
4820                 dev_err(&pcidev->dev, "beiscsi_remove called with no phba\n");
4821                 return;
4822         }
4823
4824         beiscsi_destroy_def_ifaces(phba);
4825         beiscsi_quiesce(phba);
4826         iscsi_boot_destroy_kset(phba->boot_kset);
4827         iscsi_host_remove(phba->shost);
4828         pci_dev_put(phba->pcidev);
4829         iscsi_host_free(phba->shost);
4830         pci_disable_device(pcidev);
4831 }
4832
4833 static void beiscsi_shutdown(struct pci_dev *pcidev)
4834 {
4835
4836         struct beiscsi_hba *phba = NULL;
4837
4838         phba = (struct beiscsi_hba *)pci_get_drvdata(pcidev);
4839         if (!phba) {
4840                 dev_err(&pcidev->dev, "beiscsi_shutdown called with no phba\n");
4841                 return;
4842         }
4843
4844         beiscsi_quiesce(phba);
4845         pci_disable_device(pcidev);
4846 }
4847
4848 static void beiscsi_msix_enable(struct beiscsi_hba *phba)
4849 {
4850         int i, status;
4851
4852         for (i = 0; i <= phba->num_cpus; i++)
4853                 phba->msix_entries[i].entry = i;
4854
4855         status = pci_enable_msix(phba->pcidev, phba->msix_entries,
4856                                  (phba->num_cpus + 1));
4857         if (!status)
4858                 phba->msix_enabled = true;
4859
4860         return;
4861 }
4862
4863 /*
4864  * beiscsi_hw_health_check()- Check adapter health
4865  * @work: work item to check HW health
4866  *
4867  * Check if adapter in an unrecoverable state or not.
4868  **/
4869 static void
4870 beiscsi_hw_health_check(struct work_struct *work)
4871 {
4872         struct beiscsi_hba *phba =
4873                 container_of(work, struct beiscsi_hba,
4874                              beiscsi_hw_check_task.work);
4875
4876         beiscsi_ue_detect(phba);
4877
4878         schedule_delayed_work(&phba->beiscsi_hw_check_task,
4879                               msecs_to_jiffies(1000));
4880 }
4881
4882 static int beiscsi_dev_probe(struct pci_dev *pcidev,
4883                              const struct pci_device_id *id)
4884 {
4885         struct beiscsi_hba *phba = NULL;
4886         struct hwi_controller *phwi_ctrlr;
4887         struct hwi_context_memory *phwi_context;
4888         struct be_eq_obj *pbe_eq;
4889         int ret, i;
4890
4891         ret = beiscsi_enable_pci(pcidev);
4892         if (ret < 0) {
4893                 dev_err(&pcidev->dev,
4894                         "beiscsi_dev_probe - Failed to enable pci device\n");
4895                 return ret;
4896         }
4897
4898         phba = beiscsi_hba_alloc(pcidev);
4899         if (!phba) {
4900                 dev_err(&pcidev->dev,
4901                         "beiscsi_dev_probe - Failed in beiscsi_hba_alloc\n");
4902                 goto disable_pci;
4903         }
4904
4905         /* Initialize Driver configuration Paramters */
4906         beiscsi_hba_attrs_init(phba);
4907
4908         phba->fw_timeout = false;
4909
4910
4911         switch (pcidev->device) {
4912         case BE_DEVICE_ID1:
4913         case OC_DEVICE_ID1:
4914         case OC_DEVICE_ID2:
4915                 phba->generation = BE_GEN2;
4916                 phba->iotask_fn = beiscsi_iotask;
4917                 break;
4918         case BE_DEVICE_ID2:
4919         case OC_DEVICE_ID3:
4920                 phba->generation = BE_GEN3;
4921                 phba->iotask_fn = beiscsi_iotask;
4922                 break;
4923         case OC_SKH_ID1:
4924                 phba->generation = BE_GEN4;
4925                 phba->iotask_fn = beiscsi_iotask_v2;
4926                 break;
4927         default:
4928                 phba->generation = 0;
4929         }
4930
4931         if (enable_msix)
4932                 find_num_cpus(phba);
4933         else
4934                 phba->num_cpus = 1;
4935
4936         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4937                     "BM_%d : num_cpus = %d\n",
4938                     phba->num_cpus);
4939
4940         if (enable_msix) {
4941                 beiscsi_msix_enable(phba);
4942                 if (!phba->msix_enabled)
4943                         phba->num_cpus = 1;
4944         }
4945         ret = be_ctrl_init(phba, pcidev);
4946         if (ret) {
4947                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4948                             "BM_%d : beiscsi_dev_probe-"
4949                             "Failed in be_ctrl_init\n");
4950                 goto hba_free;
4951         }
4952
4953         ret = beiscsi_cmd_reset_function(phba);
4954         if (ret) {
4955                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4956                             "BM_%d : Reset Failed. Aborting Crashdump\n");
4957                 goto hba_free;
4958         }
4959         ret = be_chk_reset_complete(phba);
4960         if (ret) {
4961                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4962                             "BM_%d : Failed to get out of reset."
4963                             "Aborting Crashdump\n");
4964                 goto hba_free;
4965         }
4966
4967         spin_lock_init(&phba->io_sgl_lock);
4968         spin_lock_init(&phba->mgmt_sgl_lock);
4969         spin_lock_init(&phba->isr_lock);
4970         ret = mgmt_get_fw_config(&phba->ctrl, phba);
4971         if (ret != 0) {
4972                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4973                             "BM_%d : Error getting fw config\n");
4974                 goto free_port;
4975         }
4976         phba->shost->max_id = phba->fw_config.iscsi_cid_count;
4977         beiscsi_get_params(phba);
4978         phba->shost->can_queue = phba->params.ios_per_ctrl;
4979         ret = beiscsi_init_port(phba);
4980         if (ret < 0) {
4981                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4982                             "BM_%d : beiscsi_dev_probe-"
4983                             "Failed in beiscsi_init_port\n");
4984                 goto free_port;
4985         }
4986
4987         for (i = 0; i < MAX_MCC_CMD ; i++) {
4988                 init_waitqueue_head(&phba->ctrl.mcc_wait[i + 1]);
4989                 phba->ctrl.mcc_tag[i] = i + 1;
4990                 phba->ctrl.mcc_numtag[i + 1] = 0;
4991                 phba->ctrl.mcc_tag_available++;
4992         }
4993
4994         phba->ctrl.mcc_alloc_index = phba->ctrl.mcc_free_index = 0;
4995
4996         snprintf(phba->wq_name, sizeof(phba->wq_name), "beiscsi_%02x_wq",
4997                  phba->shost->host_no);
4998         phba->wq = alloc_workqueue(phba->wq_name, WQ_MEM_RECLAIM, 1);
4999         if (!phba->wq) {
5000                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5001                             "BM_%d : beiscsi_dev_probe-"
5002                             "Failed to allocate work queue\n");
5003                 goto free_twq;
5004         }
5005
5006         INIT_DELAYED_WORK(&phba->beiscsi_hw_check_task,
5007                           beiscsi_hw_health_check);
5008
5009         phwi_ctrlr = phba->phwi_ctrlr;
5010         phwi_context = phwi_ctrlr->phwi_ctxt;
5011
5012         if (blk_iopoll_enabled) {
5013                 for (i = 0; i < phba->num_cpus; i++) {
5014                         pbe_eq = &phwi_context->be_eq[i];
5015                         blk_iopoll_init(&pbe_eq->iopoll, be_iopoll_budget,
5016                                         be_iopoll);
5017                         blk_iopoll_enable(&pbe_eq->iopoll);
5018                 }
5019
5020                 i = (phba->msix_enabled) ? i : 0;
5021                 /* Work item for MCC handling */
5022                 pbe_eq = &phwi_context->be_eq[i];
5023                 INIT_WORK(&pbe_eq->work_cqs, beiscsi_process_all_cqs);
5024         } else {
5025                 if (phba->msix_enabled) {
5026                         for (i = 0; i <= phba->num_cpus; i++) {
5027                                 pbe_eq = &phwi_context->be_eq[i];
5028                                 INIT_WORK(&pbe_eq->work_cqs,
5029                                           beiscsi_process_all_cqs);
5030                         }
5031                 } else {
5032                                 pbe_eq = &phwi_context->be_eq[0];
5033                                 INIT_WORK(&pbe_eq->work_cqs,
5034                                           beiscsi_process_all_cqs);
5035                         }
5036         }
5037
5038         ret = beiscsi_init_irqs(phba);
5039         if (ret < 0) {
5040                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5041                             "BM_%d : beiscsi_dev_probe-"
5042                             "Failed to beiscsi_init_irqs\n");
5043                 goto free_blkenbld;
5044         }
5045         hwi_enable_intr(phba);
5046
5047         if (beiscsi_setup_boot_info(phba))
5048                 /*
5049                  * log error but continue, because we may not be using
5050                  * iscsi boot.
5051                  */
5052                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5053                             "BM_%d : Could not set up "
5054                             "iSCSI boot info.\n");
5055
5056         beiscsi_create_def_ifaces(phba);
5057         schedule_delayed_work(&phba->beiscsi_hw_check_task,
5058                               msecs_to_jiffies(1000));
5059
5060         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
5061                     "\n\n\n BM_%d : SUCCESS - DRIVER LOADED\n\n\n");
5062         return 0;
5063
5064 free_blkenbld:
5065         destroy_workqueue(phba->wq);
5066         if (blk_iopoll_enabled)
5067                 for (i = 0; i < phba->num_cpus; i++) {
5068                         pbe_eq = &phwi_context->be_eq[i];
5069                         blk_iopoll_disable(&pbe_eq->iopoll);
5070                 }
5071 free_twq:
5072         beiscsi_clean_port(phba);
5073         beiscsi_free_mem(phba);
5074 free_port:
5075         pci_free_consistent(phba->pcidev,
5076                             phba->ctrl.mbox_mem_alloced.size,
5077                             phba->ctrl.mbox_mem_alloced.va,
5078                            phba->ctrl.mbox_mem_alloced.dma);
5079         beiscsi_unmap_pci_function(phba);
5080 hba_free:
5081         if (phba->msix_enabled)
5082                 pci_disable_msix(phba->pcidev);
5083         iscsi_host_remove(phba->shost);
5084         pci_dev_put(phba->pcidev);
5085         iscsi_host_free(phba->shost);
5086 disable_pci:
5087         pci_disable_device(pcidev);
5088         return ret;
5089 }
5090
5091 struct iscsi_transport beiscsi_iscsi_transport = {
5092         .owner = THIS_MODULE,
5093         .name = DRV_NAME,
5094         .caps = CAP_RECOVERY_L0 | CAP_HDRDGST | CAP_TEXT_NEGO |
5095                 CAP_MULTI_R2T | CAP_DATADGST | CAP_DATA_PATH_OFFLOAD,
5096         .create_session = beiscsi_session_create,
5097         .destroy_session = beiscsi_session_destroy,
5098         .create_conn = beiscsi_conn_create,
5099         .bind_conn = beiscsi_conn_bind,
5100         .destroy_conn = iscsi_conn_teardown,
5101         .attr_is_visible = be2iscsi_attr_is_visible,
5102         .set_iface_param = be2iscsi_iface_set_param,
5103         .get_iface_param = be2iscsi_iface_get_param,
5104         .set_param = beiscsi_set_param,
5105         .get_conn_param = iscsi_conn_get_param,
5106         .get_session_param = iscsi_session_get_param,
5107         .get_host_param = beiscsi_get_host_param,
5108         .start_conn = beiscsi_conn_start,
5109         .stop_conn = iscsi_conn_stop,
5110         .send_pdu = iscsi_conn_send_pdu,
5111         .xmit_task = beiscsi_task_xmit,
5112         .cleanup_task = beiscsi_cleanup_task,
5113         .alloc_pdu = beiscsi_alloc_pdu,
5114         .parse_pdu_itt = beiscsi_parse_pdu,
5115         .get_stats = beiscsi_conn_get_stats,
5116         .get_ep_param = beiscsi_ep_get_param,
5117         .ep_connect = beiscsi_ep_connect,
5118         .ep_poll = beiscsi_ep_poll,
5119         .ep_disconnect = beiscsi_ep_disconnect,
5120         .session_recovery_timedout = iscsi_session_recovery_timedout,
5121         .bsg_request = beiscsi_bsg_request,
5122 };
5123
5124 static struct pci_driver beiscsi_pci_driver = {
5125         .name = DRV_NAME,
5126         .probe = beiscsi_dev_probe,
5127         .remove = beiscsi_remove,
5128         .shutdown = beiscsi_shutdown,
5129         .id_table = beiscsi_pci_id_table
5130 };
5131
5132
5133 static int __init beiscsi_module_init(void)
5134 {
5135         int ret;
5136
5137         beiscsi_scsi_transport =
5138                         iscsi_register_transport(&beiscsi_iscsi_transport);
5139         if (!beiscsi_scsi_transport) {
5140                 printk(KERN_ERR
5141                        "beiscsi_module_init - Unable to  register beiscsi transport.\n");
5142                 return -ENOMEM;
5143         }
5144         printk(KERN_INFO "In beiscsi_module_init, tt=%p\n",
5145                &beiscsi_iscsi_transport);
5146
5147         ret = pci_register_driver(&beiscsi_pci_driver);
5148         if (ret) {
5149                 printk(KERN_ERR
5150                        "beiscsi_module_init - Unable to  register beiscsi pci driver.\n");
5151                 goto unregister_iscsi_transport;
5152         }
5153         return 0;
5154
5155 unregister_iscsi_transport:
5156         iscsi_unregister_transport(&beiscsi_iscsi_transport);
5157         return ret;
5158 }
5159
5160 static void __exit beiscsi_module_exit(void)
5161 {
5162         pci_unregister_driver(&beiscsi_pci_driver);
5163         iscsi_unregister_transport(&beiscsi_iscsi_transport);
5164 }
5165
5166 module_init(beiscsi_module_init);
5167 module_exit(beiscsi_module_exit);