drivers/scsi/be2iscsi/be_main.c

   1 /**
   2  * Copyright (C) 2005 - 2011 Emulex
   3  * All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License version 2
   7  * as published by the Free Software Foundation.  The full GNU General
   8  * Public License is included in this distribution in the file called COPYING.
   9  *
  10  * Written by: Jayamohan Kallickal (jayamohan.kallickal@emulex.com)
  11  *
  12  * Contact Information:
  13  * linux-drivers@emulex.com
  14  *
  15  * Emulex
  16  * 3333 Susan Street
  17  * Costa Mesa, CA 92626
  18  */
  19
  20 #include <linux/reboot.h>
  21 #include <linux/delay.h>
  22 #include <linux/slab.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/blkdev.h>
  25 #include <linux/pci.h>
  26 #include <linux/string.h>
  27 #include <linux/kernel.h>
  28 #include <linux/semaphore.h>
  29 #include <linux/iscsi_boot_sysfs.h>
  30 #include <linux/module.h>
  31 #include <linux/bsg-lib.h>
  32
  33 #include <scsi/libiscsi.h>
  34 #include <scsi/scsi_bsg_iscsi.h>
  35 #include <scsi/scsi_netlink.h>
  36 #include <scsi/scsi_transport_iscsi.h>
  37 #include <scsi/scsi_transport.h>
  38 #include <scsi/scsi_cmnd.h>
  39 #include <scsi/scsi_device.h>
  40 #include <scsi/scsi_host.h>
  41 #include <scsi/scsi.h>
  42 #include "be_main.h"
  43 #include "be_iscsi.h"
  44 #include "be_mgmt.h"
  45 #include "be_cmds.h"
  46
  47 static unsigned int be_iopoll_budget = 10;
  48 static unsigned int be_max_phys_size = 64;
  49 static unsigned int enable_msix = 1;
  50 static unsigned int gcrashmode = 0;
  51 static unsigned int num_hba = 0;
  52
  53 MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table);
  54 MODULE_DESCRIPTION(DRV_DESC " " BUILD_STR);
  55 MODULE_VERSION(BUILD_STR);
  56 MODULE_AUTHOR("Emulex Corporation");
  57 MODULE_LICENSE("GPL");
  58 module_param(be_iopoll_budget, int, 0);
  59 module_param(enable_msix, int, 0);
  60 module_param(be_max_phys_size, uint, S_IRUGO);
  61 MODULE_PARM_DESC(be_max_phys_size,
  62                 "Maximum Size (In Kilobytes) of physically contiguous "
  63                 "memory that can be allocated. Range is 16 - 128");
  64
  65 #define beiscsi_disp_param(_name)\
  66 ssize_t \
  67 beiscsi_##_name##_disp(struct device *dev,\
  68                         struct device_attribute *attrib, char *buf)     \
  69 {       \
  70         struct Scsi_Host *shost = class_to_shost(dev);\
  71         struct beiscsi_hba *phba = iscsi_host_priv(shost); \
  72         uint32_t param_val = 0; \
  73         param_val = phba->attr_##_name;\
  74         return snprintf(buf, PAGE_SIZE, "%d\n",\
  75                         phba->attr_##_name);\
  76 }
  77
  78 #define beiscsi_change_param(_name, _minval, _maxval, _defaval)\
  79 int \
  80 beiscsi_##_name##_change(struct beiscsi_hba *phba, uint32_t val)\
  81 {\
  82         if (val >= _minval && val <= _maxval) {\
  83                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
  84                             "BA_%d : beiscsi_"#_name" updated "\
  85                             "from 0x%x ==> 0x%x\n",\
  86                             phba->attr_##_name, val); \
  87                 phba->attr_##_name = val;\
  88                 return 0;\
  89         } \
  90         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT, \
  91                     "BA_%d beiscsi_"#_name" attribute "\
  92                     "cannot be updated to 0x%x, "\
  93                     "range allowed is ["#_minval" - "#_maxval"]\n", val);\
  94                 return -EINVAL;\
  95 }
  96
  97 #define beiscsi_store_param(_name)  \
  98 ssize_t \
  99 beiscsi_##_name##_store(struct device *dev,\
 100                          struct device_attribute *attr, const char *buf,\
 101                          size_t count) \
 102 { \
 103         struct Scsi_Host  *shost = class_to_shost(dev);\
 104         struct beiscsi_hba *phba = iscsi_host_priv(shost);\
 105         uint32_t param_val = 0;\
 106         if (!isdigit(buf[0]))\
 107                 return -EINVAL;\
 108         if (sscanf(buf, "%i", &param_val) != 1)\
 109                 return -EINVAL;\
 110         if (beiscsi_##_name##_change(phba, param_val) == 0) \
 111                 return strlen(buf);\
 112         else \
 113                 return -EINVAL;\
 114 }
 115
 116 #define beiscsi_init_param(_name, _minval, _maxval, _defval) \
 117 int \
 118 beiscsi_##_name##_init(struct beiscsi_hba *phba, uint32_t val) \
 119 { \
 120         if (val >= _minval && val <= _maxval) {\
 121                 phba->attr_##_name = val;\
 122                 return 0;\
 123         } \
 124         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
 125                     "BA_%d beiscsi_"#_name" attribute " \
 126                     "cannot be updated to 0x%x, "\
 127                     "range allowed is ["#_minval" - "#_maxval"]\n", val);\
 128         phba->attr_##_name = _defval;\
 129         return -EINVAL;\
 130 }
 131
 132 #define BEISCSI_RW_ATTR(_name, _minval, _maxval, _defval, _descp) \
 133 static uint beiscsi_##_name = _defval;\
 134 module_param(beiscsi_##_name, uint, S_IRUGO);\
 135 MODULE_PARM_DESC(beiscsi_##_name, _descp);\
 136 beiscsi_disp_param(_name)\
 137 beiscsi_change_param(_name, _minval, _maxval, _defval)\
 138 beiscsi_store_param(_name)\
 139 beiscsi_init_param(_name, _minval, _maxval, _defval)\
 140 DEVICE_ATTR(beiscsi_##_name, S_IRUGO | S_IWUSR,\
 141               beiscsi_##_name##_disp, beiscsi_##_name##_store)
 142
 143 /*
 144  * When new log level added update the
 145  * the MAX allowed value for log_enable
 146  */
 147 BEISCSI_RW_ATTR(log_enable, 0x00,
 148                 0xFF, 0x00, "Enable logging Bit Mask\n"
 149                 "\t\t\t\tInitialization Events  : 0x01\n"
 150                 "\t\t\t\tMailbox Events         : 0x02\n"
 151                 "\t\t\t\tMiscellaneous Events   : 0x04\n"
 152                 "\t\t\t\tError Handling         : 0x08\n"
 153                 "\t\t\t\tIO Path Events         : 0x10\n"
 154                 "\t\t\t\tConfiguration Path     : 0x20\n");
 155
 156 struct device_attribute *beiscsi_attrs[] = {
 157         &dev_attr_beiscsi_log_enable,
 158         NULL,
 159 };
 160
 161 static char const *cqe_desc[] = {
 162         "RESERVED_DESC",
 163         "SOL_CMD_COMPLETE",
 164         "SOL_CMD_KILLED_DATA_DIGEST_ERR",
 165         "CXN_KILLED_PDU_SIZE_EXCEEDS_DSL",
 166         "CXN_KILLED_BURST_LEN_MISMATCH",
 167         "CXN_KILLED_AHS_RCVD",
 168         "CXN_KILLED_HDR_DIGEST_ERR",
 169         "CXN_KILLED_UNKNOWN_HDR",
 170         "CXN_KILLED_STALE_ITT_TTT_RCVD",
 171         "CXN_KILLED_INVALID_ITT_TTT_RCVD",
 172         "CXN_KILLED_RST_RCVD",
 173         "CXN_KILLED_TIMED_OUT",
 174         "CXN_KILLED_RST_SENT",
 175         "CXN_KILLED_FIN_RCVD",
 176         "CXN_KILLED_BAD_UNSOL_PDU_RCVD",
 177         "CXN_KILLED_BAD_WRB_INDEX_ERROR",
 178         "CXN_KILLED_OVER_RUN_RESIDUAL",
 179         "CXN_KILLED_UNDER_RUN_RESIDUAL",
 180         "CMD_KILLED_INVALID_STATSN_RCVD",
 181         "CMD_KILLED_INVALID_R2T_RCVD",
 182         "CMD_CXN_KILLED_LUN_INVALID",
 183         "CMD_CXN_KILLED_ICD_INVALID",
 184         "CMD_CXN_KILLED_ITT_INVALID",
 185         "CMD_CXN_KILLED_SEQ_OUTOFORDER",
 186         "CMD_CXN_KILLED_INVALID_DATASN_RCVD",
 187         "CXN_INVALIDATE_NOTIFY",
 188         "CXN_INVALIDATE_INDEX_NOTIFY",
 189         "CMD_INVALIDATED_NOTIFY",
 190         "UNSOL_HDR_NOTIFY",
 191         "UNSOL_DATA_NOTIFY",
 192         "UNSOL_DATA_DIGEST_ERROR_NOTIFY",
 193         "DRIVERMSG_NOTIFY",
 194         "CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN",
 195         "SOL_CMD_KILLED_DIF_ERR",
 196         "CXN_KILLED_SYN_RCVD",
 197         "CXN_KILLED_IMM_DATA_RCVD"
 198 };
 199
 200 static int beiscsi_slave_configure(struct scsi_device *sdev)
 201 {
 202         blk_queue_max_segment_size(sdev->request_queue, 65536);
 203         return 0;
 204 }
 205
 206 static int beiscsi_eh_abort(struct scsi_cmnd *sc)
 207 {
 208         struct iscsi_cls_session *cls_session;
 209         struct iscsi_task *aborted_task = (struct iscsi_task *)sc->SCp.ptr;
 210         struct beiscsi_io_task *aborted_io_task;
 211         struct iscsi_conn *conn;
 212         struct beiscsi_conn *beiscsi_conn;
 213         struct beiscsi_hba *phba;
 214         struct iscsi_session *session;
 215         struct invalidate_command_table *inv_tbl;
 216         struct be_dma_mem nonemb_cmd;
 217         unsigned int cid, tag, num_invalidate;
 218
 219         cls_session = starget_to_session(scsi_target(sc->device));
 220         session = cls_session->dd_data;
 221
 222         spin_lock_bh(&session->lock);
 223         if (!aborted_task || !aborted_task->sc) {
 224                 /* we raced */
 225                 spin_unlock_bh(&session->lock);
 226                 return SUCCESS;
 227         }
 228
 229         aborted_io_task = aborted_task->dd_data;
 230         if (!aborted_io_task->scsi_cmnd) {
 231                 /* raced or invalid command */
 232                 spin_unlock_bh(&session->lock);
 233                 return SUCCESS;
 234         }
 235         spin_unlock_bh(&session->lock);
 236         conn = aborted_task->conn;
 237         beiscsi_conn = conn->dd_data;
 238         phba = beiscsi_conn->phba;
 239
 240         /* invalidate iocb */
 241         cid = beiscsi_conn->beiscsi_conn_cid;
 242         inv_tbl = phba->inv_tbl;
 243         memset(inv_tbl, 0x0, sizeof(*inv_tbl));
 244         inv_tbl->cid = cid;
 245         inv_tbl->icd = aborted_io_task->psgl_handle->sgl_index;
 246         num_invalidate = 1;
 247         nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
 248                                 sizeof(struct invalidate_commands_params_in),
 249                                 &nonemb_cmd.dma);
 250         if (nonemb_cmd.va == NULL) {
 251                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
 252                             "BM_%d : Failed to allocate memory for"
 253                             "mgmt_invalidate_icds\n");
 254                 return FAILED;
 255         }
 256         nonemb_cmd.size = sizeof(struct invalidate_commands_params_in);
 257
 258         tag = mgmt_invalidate_icds(phba, inv_tbl, num_invalidate,
 259                                    cid, &nonemb_cmd);
 260         if (!tag) {
 261                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
 262                             "BM_%d : mgmt_invalidate_icds could not be"
 263                             "submitted\n");
 264                 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
 265                                     nonemb_cmd.va, nonemb_cmd.dma);
 266
 267                 return FAILED;
 268         } else {
 269                 wait_event_interruptible(phba->ctrl.mcc_wait[tag],
 270                                          phba->ctrl.mcc_numtag[tag]);
 271                 free_mcc_tag(&phba->ctrl, tag);
 272         }
 273         pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
 274                             nonemb_cmd.va, nonemb_cmd.dma);
 275         return iscsi_eh_abort(sc);
 276 }
 277
 278 static int beiscsi_eh_device_reset(struct scsi_cmnd *sc)
 279 {
 280         struct iscsi_task *abrt_task;
 281         struct beiscsi_io_task *abrt_io_task;
 282         struct iscsi_conn *conn;
 283         struct beiscsi_conn *beiscsi_conn;
 284         struct beiscsi_hba *phba;
 285         struct iscsi_session *session;
 286         struct iscsi_cls_session *cls_session;
 287         struct invalidate_command_table *inv_tbl;
 288         struct be_dma_mem nonemb_cmd;
 289         unsigned int cid, tag, i, num_invalidate;
 290
 291         /* invalidate iocbs */
 292         cls_session = starget_to_session(scsi_target(sc->device));
 293         session = cls_session->dd_data;
 294         spin_lock_bh(&session->lock);
 295         if (!session->leadconn || session->state != ISCSI_STATE_LOGGED_IN) {
 296                 spin_unlock_bh(&session->lock);
 297                 return FAILED;
 298         }
 299         conn = session->leadconn;
 300         beiscsi_conn = conn->dd_data;
 301         phba = beiscsi_conn->phba;
 302         cid = beiscsi_conn->beiscsi_conn_cid;
 303         inv_tbl = phba->inv_tbl;
 304         memset(inv_tbl, 0x0, sizeof(*inv_tbl) * BE2_CMDS_PER_CXN);
 305         num_invalidate = 0;
 306         for (i = 0; i < conn->session->cmds_max; i++) {
 307                 abrt_task = conn->session->cmds[i];
 308                 abrt_io_task = abrt_task->dd_data;
 309                 if (!abrt_task->sc || abrt_task->state == ISCSI_TASK_FREE)
 310                         continue;
 311
 312                 if (abrt_task->sc->device->lun != abrt_task->sc->device->lun)
 313                         continue;
 314
 315                 inv_tbl->cid = cid;
 316                 inv_tbl->icd = abrt_io_task->psgl_handle->sgl_index;
 317                 num_invalidate++;
 318                 inv_tbl++;
 319         }
 320         spin_unlock_bh(&session->lock);
 321         inv_tbl = phba->inv_tbl;
 322
 323         nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
 324                                 sizeof(struct invalidate_commands_params_in),
 325                                 &nonemb_cmd.dma);
 326         if (nonemb_cmd.va == NULL) {
 327                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
 328                             "BM_%d : Failed to allocate memory for"
 329                             "mgmt_invalidate_icds\n");
 330                 return FAILED;
 331         }
 332         nonemb_cmd.size = sizeof(struct invalidate_commands_params_in);
 333         memset(nonemb_cmd.va, 0, nonemb_cmd.size);
 334         tag = mgmt_invalidate_icds(phba, inv_tbl, num_invalidate,
 335                                    cid, &nonemb_cmd);
 336         if (!tag) {
 337                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
 338                             "BM_%d : mgmt_invalidate_icds could not be"
 339                             " submitted\n");
 340                 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
 341                                     nonemb_cmd.va, nonemb_cmd.dma);
 342                 return FAILED;
 343         } else {
 344                 wait_event_interruptible(phba->ctrl.mcc_wait[tag],
 345                                          phba->ctrl.mcc_numtag[tag]);
 346                 free_mcc_tag(&phba->ctrl, tag);
 347         }
 348         pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
 349                             nonemb_cmd.va, nonemb_cmd.dma);
 350         return iscsi_eh_device_reset(sc);
 351 }
 352
 353 static ssize_t beiscsi_show_boot_tgt_info(void *data, int type, char *buf)
 354 {
 355         struct beiscsi_hba *phba = data;
 356         struct mgmt_session_info *boot_sess = &phba->boot_sess;
 357         struct mgmt_conn_info *boot_conn = &boot_sess->conn_list[0];
 358         char *str = buf;
 359         int rc;
 360
 361         switch (type) {
 362         case ISCSI_BOOT_TGT_NAME:
 363                 rc = sprintf(buf, "%.*s\n",
 364                             (int)strlen(boot_sess->target_name),
 365                             (char *)&boot_sess->target_name);
 366                 break;
 367         case ISCSI_BOOT_TGT_IP_ADDR:
 368                 if (boot_conn->dest_ipaddr.ip_type == 0x1)
 369                         rc = sprintf(buf, "%pI4\n",
 370                                 (char *)&boot_conn->dest_ipaddr.addr);
 371                 else
 372                         rc = sprintf(str, "%pI6\n",
 373                                 (char *)&boot_conn->dest_ipaddr.addr);
 374                 break;
 375         case ISCSI_BOOT_TGT_PORT:
 376                 rc = sprintf(str, "%d\n", boot_conn->dest_port);
 377                 break;
 378
 379         case ISCSI_BOOT_TGT_CHAP_NAME:
 380                 rc = sprintf(str,  "%.*s\n",
 381                              boot_conn->negotiated_login_options.auth_data.chap.
 382                              target_chap_name_length,
 383                              (char *)&boot_conn->negotiated_login_options.
 384                              auth_data.chap.target_chap_name);
 385                 break;
 386         case ISCSI_BOOT_TGT_CHAP_SECRET:
 387                 rc = sprintf(str,  "%.*s\n",
 388                              boot_conn->negotiated_login_options.auth_data.chap.
 389                              target_secret_length,
 390                              (char *)&boot_conn->negotiated_login_options.
 391                              auth_data.chap.target_secret);
 392                 break;
 393         case ISCSI_BOOT_TGT_REV_CHAP_NAME:
 394                 rc = sprintf(str,  "%.*s\n",
 395                              boot_conn->negotiated_login_options.auth_data.chap.
 396                              intr_chap_name_length,
 397                              (char *)&boot_conn->negotiated_login_options.
 398                              auth_data.chap.intr_chap_name);
 399                 break;
 400         case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
 401                 rc = sprintf(str,  "%.*s\n",
 402                              boot_conn->negotiated_login_options.auth_data.chap.
 403                              intr_secret_length,
 404                              (char *)&boot_conn->negotiated_login_options.
 405                              auth_data.chap.intr_secret);
 406                 break;
 407         case ISCSI_BOOT_TGT_FLAGS:
 408                 rc = sprintf(str, "2\n");
 409                 break;
 410         case ISCSI_BOOT_TGT_NIC_ASSOC:
 411                 rc = sprintf(str, "0\n");
 412                 break;
 413         default:
 414                 rc = -ENOSYS;
 415                 break;
 416         }
 417         return rc;
 418 }
 419
 420 static ssize_t beiscsi_show_boot_ini_info(void *data, int type, char *buf)
 421 {
 422         struct beiscsi_hba *phba = data;
 423         char *str = buf;
 424         int rc;
 425
 426         switch (type) {
 427         case ISCSI_BOOT_INI_INITIATOR_NAME:
 428                 rc = sprintf(str, "%s\n", phba->boot_sess.initiator_iscsiname);
 429                 break;
 430         default:
 431                 rc = -ENOSYS;
 432                 break;
 433         }
 434         return rc;
 435 }
 436
 437 static ssize_t beiscsi_show_boot_eth_info(void *data, int type, char *buf)
 438 {
 439         struct beiscsi_hba *phba = data;
 440         char *str = buf;
 441         int rc;
 442
 443         switch (type) {
 444         case ISCSI_BOOT_ETH_FLAGS:
 445                 rc = sprintf(str, "2\n");
 446                 break;
 447         case ISCSI_BOOT_ETH_INDEX:
 448                 rc = sprintf(str, "0\n");
 449                 break;
 450         case ISCSI_BOOT_ETH_MAC:
 451                 rc  = beiscsi_get_macaddr(str, phba);
 452                 break;
 453         default:
 454                 rc = -ENOSYS;
 455                 break;
 456         }
 457         return rc;
 458 }
 459
 460
 461 static umode_t beiscsi_tgt_get_attr_visibility(void *data, int type)
 462 {
 463         umode_t rc;
 464
 465         switch (type) {
 466         case ISCSI_BOOT_TGT_NAME:
 467         case ISCSI_BOOT_TGT_IP_ADDR:
 468         case ISCSI_BOOT_TGT_PORT:
 469         case ISCSI_BOOT_TGT_CHAP_NAME:
 470         case ISCSI_BOOT_TGT_CHAP_SECRET:
 471         case ISCSI_BOOT_TGT_REV_CHAP_NAME:
 472         case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
 473         case ISCSI_BOOT_TGT_NIC_ASSOC:
 474         case ISCSI_BOOT_TGT_FLAGS:
 475                 rc = S_IRUGO;
 476                 break;
 477         default:
 478                 rc = 0;
 479                 break;
 480         }
 481         return rc;
 482 }
 483
 484 static umode_t beiscsi_ini_get_attr_visibility(void *data, int type)
 485 {
 486         umode_t rc;
 487
 488         switch (type) {
 489         case ISCSI_BOOT_INI_INITIATOR_NAME:
 490                 rc = S_IRUGO;
 491                 break;
 492         default:
 493                 rc = 0;
 494                 break;
 495         }
 496         return rc;
 497 }
 498
 499
 500 static umode_t beiscsi_eth_get_attr_visibility(void *data, int type)
 501 {
 502         umode_t rc;
 503
 504         switch (type) {
 505         case ISCSI_BOOT_ETH_FLAGS:
 506         case ISCSI_BOOT_ETH_MAC:
 507         case ISCSI_BOOT_ETH_INDEX:
 508                 rc = S_IRUGO;
 509                 break;
 510         default:
 511                 rc = 0;
 512                 break;
 513         }
 514         return rc;
 515 }
 516
 517 /*------------------- PCI Driver operations and data ----------------- */
 518 static DEFINE_PCI_DEVICE_TABLE(beiscsi_pci_id_table) = {
 519         { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
 520         { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
 521         { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
 522         { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
 523         { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
 524         { 0 }
 525 };
 526 MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table);
 527
 528
 529 static struct scsi_host_template beiscsi_sht = {
 530         .module = THIS_MODULE,
 531         .name = "Emulex 10Gbe open-iscsi Initiator Driver",
 532         .proc_name = DRV_NAME,
 533         .queuecommand = iscsi_queuecommand,
 534         .change_queue_depth = iscsi_change_queue_depth,
 535         .slave_configure = beiscsi_slave_configure,
 536         .target_alloc = iscsi_target_alloc,
 537         .eh_abort_handler = beiscsi_eh_abort,
 538         .eh_device_reset_handler = beiscsi_eh_device_reset,
 539         .eh_target_reset_handler = iscsi_eh_session_reset,
 540         .shost_attrs = beiscsi_attrs,
 541         .sg_tablesize = BEISCSI_SGLIST_ELEMENTS,
 542         .can_queue = BE2_IO_DEPTH,
 543         .this_id = -1,
 544         .max_sectors = BEISCSI_MAX_SECTORS,
 545         .cmd_per_lun = BEISCSI_CMD_PER_LUN,
 546         .use_clustering = ENABLE_CLUSTERING,
 547         .vendor_id = SCSI_NL_VID_TYPE_PCI | BE_VENDOR_ID,
 548
 549 };
 550
 551 static struct scsi_transport_template *beiscsi_scsi_transport;
 552
 553 static struct beiscsi_hba *beiscsi_hba_alloc(struct pci_dev *pcidev)
 554 {
 555         struct beiscsi_hba *phba;
 556         struct Scsi_Host *shost;
 557
 558         shost = iscsi_host_alloc(&beiscsi_sht, sizeof(*phba), 0);
 559         if (!shost) {
 560                 dev_err(&pcidev->dev,
 561                         "beiscsi_hba_alloc - iscsi_host_alloc failed\n");
 562                 return NULL;
 563         }
 564         shost->dma_boundary = pcidev->dma_mask;
 565         shost->max_id = BE2_MAX_SESSIONS;
 566         shost->max_channel = 0;
 567         shost->max_cmd_len = BEISCSI_MAX_CMD_LEN;
 568         shost->max_lun = BEISCSI_NUM_MAX_LUN;
 569         shost->transportt = beiscsi_scsi_transport;
 570         phba = iscsi_host_priv(shost);
 571         memset(phba, 0, sizeof(*phba));
 572         phba->shost = shost;
 573         phba->pcidev = pci_dev_get(pcidev);
 574         pci_set_drvdata(pcidev, phba);
 575         phba->interface_handle = 0xFFFFFFFF;
 576
 577         if (iscsi_host_add(shost, &phba->pcidev->dev))
 578                 goto free_devices;
 579
 580         return phba;
 581
 582 free_devices:
 583         pci_dev_put(phba->pcidev);
 584         iscsi_host_free(phba->shost);
 585         return NULL;
 586 }
 587
 588 static void beiscsi_unmap_pci_function(struct beiscsi_hba *phba)
 589 {
 590         if (phba->csr_va) {
 591                 iounmap(phba->csr_va);
 592                 phba->csr_va = NULL;
 593         }
 594         if (phba->db_va) {
 595                 iounmap(phba->db_va);
 596                 phba->db_va = NULL;
 597         }
 598         if (phba->pci_va) {
 599                 iounmap(phba->pci_va);
 600                 phba->pci_va = NULL;
 601         }
 602 }
 603
 604 static int beiscsi_map_pci_bars(struct beiscsi_hba *phba,
 605                                 struct pci_dev *pcidev)
 606 {
 607         u8 __iomem *addr;
 608         int pcicfg_reg;
 609
 610         addr = ioremap_nocache(pci_resource_start(pcidev, 2),
 611                                pci_resource_len(pcidev, 2));
 612         if (addr == NULL)
 613                 return -ENOMEM;
 614         phba->ctrl.csr = addr;
 615         phba->csr_va = addr;
 616         phba->csr_pa.u.a64.address = pci_resource_start(pcidev, 2);
 617
 618         addr = ioremap_nocache(pci_resource_start(pcidev, 4), 128 * 1024);
 619         if (addr == NULL)
 620                 goto pci_map_err;
 621         phba->ctrl.db = addr;
 622         phba->db_va = addr;
 623         phba->db_pa.u.a64.address =  pci_resource_start(pcidev, 4);
 624
 625         if (phba->generation == BE_GEN2)
 626                 pcicfg_reg = 1;
 627         else
 628                 pcicfg_reg = 0;
 629
 630         addr = ioremap_nocache(pci_resource_start(pcidev, pcicfg_reg),
 631                                pci_resource_len(pcidev, pcicfg_reg));
 632
 633         if (addr == NULL)
 634                 goto pci_map_err;
 635         phba->ctrl.pcicfg = addr;
 636         phba->pci_va = addr;
 637         phba->pci_pa.u.a64.address = pci_resource_start(pcidev, pcicfg_reg);
 638         return 0;
 639
 640 pci_map_err:
 641         beiscsi_unmap_pci_function(phba);
 642         return -ENOMEM;
 643 }
 644
 645 static int beiscsi_enable_pci(struct pci_dev *pcidev)
 646 {
 647         int ret;
 648
 649         ret = pci_enable_device(pcidev);
 650         if (ret) {
 651                 dev_err(&pcidev->dev,
 652                         "beiscsi_enable_pci - enable device failed\n");
 653                 return ret;
 654         }
 655
 656         pci_set_master(pcidev);
 657         if (pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64))) {
 658                 ret = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32));
 659                 if (ret) {
 660                         dev_err(&pcidev->dev, "Could not set PCI DMA Mask\n");
 661                         pci_disable_device(pcidev);
 662                         return ret;
 663                 }
 664         }
 665         return 0;
 666 }
 667
 668 static int be_ctrl_init(struct beiscsi_hba *phba, struct pci_dev *pdev)
 669 {
 670         struct be_ctrl_info *ctrl = &phba->ctrl;
 671         struct be_dma_mem *mbox_mem_alloc = &ctrl->mbox_mem_alloced;
 672         struct be_dma_mem *mbox_mem_align = &ctrl->mbox_mem;
 673         int status = 0;
 674
 675         ctrl->pdev = pdev;
 676         status = beiscsi_map_pci_bars(phba, pdev);
 677         if (status)
 678                 return status;
 679         mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
 680         mbox_mem_alloc->va = pci_alloc_consistent(pdev,
 681                                                   mbox_mem_alloc->size,
 682                                                   &mbox_mem_alloc->dma);
 683         if (!mbox_mem_alloc->va) {
 684                 beiscsi_unmap_pci_function(phba);
 685                 return -ENOMEM;
 686         }
 687
 688         mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
 689         mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
 690         mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
 691         memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
 692         spin_lock_init(&ctrl->mbox_lock);
 693         spin_lock_init(&phba->ctrl.mcc_lock);
 694         spin_lock_init(&phba->ctrl.mcc_cq_lock);
 695
 696         return status;
 697 }
 698
 699 static void beiscsi_get_params(struct beiscsi_hba *phba)
 700 {
 701         phba->params.ios_per_ctrl = (phba->fw_config.iscsi_icd_count
 702                                     - (phba->fw_config.iscsi_cid_count
 703                                     + BE2_TMFS
 704                                     + BE2_NOPOUT_REQ));
 705         phba->params.cxns_per_ctrl = phba->fw_config.iscsi_cid_count;
 706         phba->params.asyncpdus_per_ctrl = phba->fw_config.iscsi_cid_count * 2;
 707         phba->params.icds_per_ctrl = phba->fw_config.iscsi_icd_count;
 708         phba->params.num_sge_per_io = BE2_SGE;
 709         phba->params.defpdu_hdr_sz = BE2_DEFPDU_HDR_SZ;
 710         phba->params.defpdu_data_sz = BE2_DEFPDU_DATA_SZ;
 711         phba->params.eq_timer = 64;
 712         phba->params.num_eq_entries =
 713             (((BE2_CMDS_PER_CXN * 2 + phba->fw_config.iscsi_cid_count * 2
 714                                     + BE2_TMFS) / 512) + 1) * 512;
 715         phba->params.num_eq_entries = (phba->params.num_eq_entries < 1024)
 716                                 ? 1024 : phba->params.num_eq_entries;
 717         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
 718                     "BM_%d : phba->params.num_eq_entries=%d\n",
 719                     phba->params.num_eq_entries);
 720         phba->params.num_cq_entries =
 721             (((BE2_CMDS_PER_CXN * 2 +  phba->fw_config.iscsi_cid_count * 2
 722                                     + BE2_TMFS) / 512) + 1) * 512;
 723         phba->params.wrbs_per_cxn = 256;
 724 }
 725
 726 static void hwi_ring_eq_db(struct beiscsi_hba *phba,
 727                            unsigned int id, unsigned int clr_interrupt,
 728                            unsigned int num_processed,
 729                            unsigned char rearm, unsigned char event)
 730 {
 731         u32 val = 0;
 732         val |= id & DB_EQ_RING_ID_MASK;
 733         if (rearm)
 734                 val |= 1 << DB_EQ_REARM_SHIFT;
 735         if (clr_interrupt)
 736                 val |= 1 << DB_EQ_CLR_SHIFT;
 737         if (event)
 738                 val |= 1 << DB_EQ_EVNT_SHIFT;
 739         val |= num_processed << DB_EQ_NUM_POPPED_SHIFT;
 740         iowrite32(val, phba->db_va + DB_EQ_OFFSET);
 741 }
 742
 743 /**
 744  * be_isr_mcc - The isr routine of the driver.
 745  * @irq: Not used
 746  * @dev_id: Pointer to host adapter structure
 747  */
 748 static irqreturn_t be_isr_mcc(int irq, void *dev_id)
 749 {
 750         struct beiscsi_hba *phba;
 751         struct be_eq_entry *eqe = NULL;
 752         struct be_queue_info *eq;
 753         struct be_queue_info *mcc;
 754         unsigned int num_eq_processed;
 755         struct be_eq_obj *pbe_eq;
 756         unsigned long flags;
 757
 758         pbe_eq = dev_id;
 759         eq = &pbe_eq->q;
 760         phba =  pbe_eq->phba;
 761         mcc = &phba->ctrl.mcc_obj.cq;
 762         eqe = queue_tail_node(eq);
 763
 764         num_eq_processed = 0;
 765
 766         while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
 767                                 & EQE_VALID_MASK) {
 768                 if (((eqe->dw[offsetof(struct amap_eq_entry,
 769                      resource_id) / 32] &
 770                      EQE_RESID_MASK) >> 16) == mcc->id) {
 771                         spin_lock_irqsave(&phba->isr_lock, flags);
 772                         phba->todo_mcc_cq = 1;
 773                         spin_unlock_irqrestore(&phba->isr_lock, flags);
 774                 }
 775                 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
 776                 queue_tail_inc(eq);
 777                 eqe = queue_tail_node(eq);
 778                 num_eq_processed++;
 779         }
 780         if (phba->todo_mcc_cq)
 781                 queue_work(phba->wq, &phba->work_cqs);
 782         if (num_eq_processed)
 783                 hwi_ring_eq_db(phba, eq->id, 1, num_eq_processed, 1, 1);
 784
 785         return IRQ_HANDLED;
 786 }
 787
 788 /**
 789  * be_isr_msix - The isr routine of the driver.
 790  * @irq: Not used
 791  * @dev_id: Pointer to host adapter structure
 792  */
 793 static irqreturn_t be_isr_msix(int irq, void *dev_id)
 794 {
 795         struct beiscsi_hba *phba;
 796         struct be_eq_entry *eqe = NULL;
 797         struct be_queue_info *eq;
 798         struct be_queue_info *cq;
 799         unsigned int num_eq_processed;
 800         struct be_eq_obj *pbe_eq;
 801         unsigned long flags;
 802
 803         pbe_eq = dev_id;
 804         eq = &pbe_eq->q;
 805         cq = pbe_eq->cq;
 806         eqe = queue_tail_node(eq);
 807
 808         phba = pbe_eq->phba;
 809         num_eq_processed = 0;
 810         if (blk_iopoll_enabled) {
 811                 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
 812                                         & EQE_VALID_MASK) {
 813                         if (!blk_iopoll_sched_prep(&pbe_eq->iopoll))
 814                                 blk_iopoll_sched(&pbe_eq->iopoll);
 815
 816                         AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
 817                         queue_tail_inc(eq);
 818                         eqe = queue_tail_node(eq);
 819                         num_eq_processed++;
 820                 }
 821                 if (num_eq_processed)
 822                         hwi_ring_eq_db(phba, eq->id, 1, num_eq_processed, 0, 1);
 823
 824                 return IRQ_HANDLED;
 825         } else {
 826                 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
 827                                                 & EQE_VALID_MASK) {
 828                         spin_lock_irqsave(&phba->isr_lock, flags);
 829                         phba->todo_cq = 1;
 830                         spin_unlock_irqrestore(&phba->isr_lock, flags);
 831                         AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
 832                         queue_tail_inc(eq);
 833                         eqe = queue_tail_node(eq);
 834                         num_eq_processed++;
 835                 }
 836                 if (phba->todo_cq)
 837                         queue_work(phba->wq, &phba->work_cqs);
 838
 839                 if (num_eq_processed)
 840                         hwi_ring_eq_db(phba, eq->id, 1, num_eq_processed, 1, 1);
 841
 842                 return IRQ_HANDLED;
 843         }
 844 }
 845
 846 /**
 847  * be_isr - The isr routine of the driver.
 848  * @irq: Not used
 849  * @dev_id: Pointer to host adapter structure
 850  */
 851 static irqreturn_t be_isr(int irq, void *dev_id)
 852 {
 853         struct beiscsi_hba *phba;
 854         struct hwi_controller *phwi_ctrlr;
 855         struct hwi_context_memory *phwi_context;
 856         struct be_eq_entry *eqe = NULL;
 857         struct be_queue_info *eq;
 858         struct be_queue_info *cq;
 859         struct be_queue_info *mcc;
 860         unsigned long flags, index;
 861         unsigned int num_mcceq_processed, num_ioeq_processed;
 862         struct be_ctrl_info *ctrl;
 863         struct be_eq_obj *pbe_eq;
 864         int isr;
 865
 866         phba = dev_id;
 867         ctrl = &phba->ctrl;
 868         isr = ioread32(ctrl->csr + CEV_ISR0_OFFSET +
 869                        (PCI_FUNC(ctrl->pdev->devfn) * CEV_ISR_SIZE));
 870         if (!isr)
 871                 return IRQ_NONE;
 872
 873         phwi_ctrlr = phba->phwi_ctrlr;
 874         phwi_context = phwi_ctrlr->phwi_ctxt;
 875         pbe_eq = &phwi_context->be_eq[0];
 876
 877         eq = &phwi_context->be_eq[0].q;
 878         mcc = &phba->ctrl.mcc_obj.cq;
 879         index = 0;
 880         eqe = queue_tail_node(eq);
 881
 882         num_ioeq_processed = 0;
 883         num_mcceq_processed = 0;
 884         if (blk_iopoll_enabled) {
 885                 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
 886                                         & EQE_VALID_MASK) {
 887                         if (((eqe->dw[offsetof(struct amap_eq_entry,
 888                              resource_id) / 32] &
 889                              EQE_RESID_MASK) >> 16) == mcc->id) {
 890                                 spin_lock_irqsave(&phba->isr_lock, flags);
 891                                 phba->todo_mcc_cq = 1;
 892                                 spin_unlock_irqrestore(&phba->isr_lock, flags);
 893                                 num_mcceq_processed++;
 894                         } else {
 895                                 if (!blk_iopoll_sched_prep(&pbe_eq->iopoll))
 896                                         blk_iopoll_sched(&pbe_eq->iopoll);
 897                                 num_ioeq_processed++;
 898                         }
 899                         AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
 900                         queue_tail_inc(eq);
 901                         eqe = queue_tail_node(eq);
 902                 }
 903                 if (num_ioeq_processed || num_mcceq_processed) {
 904                         if (phba->todo_mcc_cq)
 905                                 queue_work(phba->wq, &phba->work_cqs);
 906
 907                         if ((num_mcceq_processed) && (!num_ioeq_processed))
 908                                 hwi_ring_eq_db(phba, eq->id, 0,
 909                                               (num_ioeq_processed +
 910                                                num_mcceq_processed) , 1, 1);
 911                         else
 912                                 hwi_ring_eq_db(phba, eq->id, 0,
 913                                                (num_ioeq_processed +
 914                                                 num_mcceq_processed), 0, 1);
 915
 916                         return IRQ_HANDLED;
 917                 } else
 918                         return IRQ_NONE;
 919         } else {
 920                 cq = &phwi_context->be_cq[0];
 921                 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
 922                                                 & EQE_VALID_MASK) {
 923
 924                         if (((eqe->dw[offsetof(struct amap_eq_entry,
 925                              resource_id) / 32] &
 926                              EQE_RESID_MASK) >> 16) != cq->id) {
 927                                 spin_lock_irqsave(&phba->isr_lock, flags);
 928                                 phba->todo_mcc_cq = 1;
 929                                 spin_unlock_irqrestore(&phba->isr_lock, flags);
 930                         } else {
 931                                 spin_lock_irqsave(&phba->isr_lock, flags);
 932                                 phba->todo_cq = 1;
 933                                 spin_unlock_irqrestore(&phba->isr_lock, flags);
 934                         }
 935                         AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
 936                         queue_tail_inc(eq);
 937                         eqe = queue_tail_node(eq);
 938                         num_ioeq_processed++;
 939                 }
 940                 if (phba->todo_cq || phba->todo_mcc_cq)
 941                         queue_work(phba->wq, &phba->work_cqs);
 942
 943                 if (num_ioeq_processed) {
 944                         hwi_ring_eq_db(phba, eq->id, 0,
 945                                        num_ioeq_processed, 1, 1);
 946                         return IRQ_HANDLED;
 947                 } else
 948                         return IRQ_NONE;
 949         }
 950 }
 951
 952 static int beiscsi_init_irqs(struct beiscsi_hba *phba)
 953 {
 954         struct pci_dev *pcidev = phba->pcidev;
 955         struct hwi_controller *phwi_ctrlr;
 956         struct hwi_context_memory *phwi_context;
 957         int ret, msix_vec, i, j;
 958
 959         phwi_ctrlr = phba->phwi_ctrlr;
 960         phwi_context = phwi_ctrlr->phwi_ctxt;
 961
 962         if (phba->msix_enabled) {
 963                 for (i = 0; i < phba->num_cpus; i++) {
 964                         phba->msi_name[i] = kzalloc(BEISCSI_MSI_NAME,
 965                                                     GFP_KERNEL);
 966                         if (!phba->msi_name[i]) {
 967                                 ret = -ENOMEM;
 968                                 goto free_msix_irqs;
 969                         }
 970
 971                         sprintf(phba->msi_name[i], "beiscsi_%02x_%02x",
 972                                 phba->shost->host_no, i);
 973                         msix_vec = phba->msix_entries[i].vector;
 974                         ret = request_irq(msix_vec, be_isr_msix, 0,
 975                                           phba->msi_name[i],
 976                                           &phwi_context->be_eq[i]);
 977                         if (ret) {
 978                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
 979                                             "BM_%d : beiscsi_init_irqs-Failed to"
 980                                             "register msix for i = %d\n",
 981                                             i);
 982                                 kfree(phba->msi_name[i]);
 983                                 goto free_msix_irqs;
 984                         }
 985                 }
 986                 phba->msi_name[i] = kzalloc(BEISCSI_MSI_NAME, GFP_KERNEL);
 987                 if (!phba->msi_name[i]) {
 988                         ret = -ENOMEM;
 989                         goto free_msix_irqs;
 990                 }
 991                 sprintf(phba->msi_name[i], "beiscsi_mcc_%02x",
 992                         phba->shost->host_no);
 993                 msix_vec = phba->msix_entries[i].vector;
 994                 ret = request_irq(msix_vec, be_isr_mcc, 0, phba->msi_name[i],
 995                                   &phwi_context->be_eq[i]);
 996                 if (ret) {
 997                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT ,
 998                                     "BM_%d : beiscsi_init_irqs-"
 999                                     "Failed to register beiscsi_msix_mcc\n");
1000                         kfree(phba->msi_name[i]);
1001                         goto free_msix_irqs;
1002                 }
1003
1004         } else {
1005                 ret = request_irq(pcidev->irq, be_isr, IRQF_SHARED,
1006                                   "beiscsi", phba);
1007                 if (ret) {
1008                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
1009                                     "BM_%d : beiscsi_init_irqs-"
1010                                     "Failed to register irq\\n");
1011                         return ret;
1012                 }
1013         }
1014         return 0;
1015 free_msix_irqs:
1016         for (j = i - 1; j >= 0; j--) {
1017                 kfree(phba->msi_name[j]);
1018                 msix_vec = phba->msix_entries[j].vector;
1019                 free_irq(msix_vec, &phwi_context->be_eq[j]);
1020         }
1021         return ret;
1022 }
1023
1024 static void hwi_ring_cq_db(struct beiscsi_hba *phba,
1025                            unsigned int id, unsigned int num_processed,
1026                            unsigned char rearm, unsigned char event)
1027 {
1028         u32 val = 0;
1029         val |= id & DB_CQ_RING_ID_MASK;
1030         if (rearm)
1031                 val |= 1 << DB_CQ_REARM_SHIFT;
1032         val |= num_processed << DB_CQ_NUM_POPPED_SHIFT;
1033         iowrite32(val, phba->db_va + DB_CQ_OFFSET);
1034 }
1035
1036 static unsigned int
1037 beiscsi_process_async_pdu(struct beiscsi_conn *beiscsi_conn,
1038                           struct beiscsi_hba *phba,
1039                           unsigned short cid,
1040                           struct pdu_base *ppdu,
1041                           unsigned long pdu_len,
1042                           void *pbuffer, unsigned long buf_len)
1043 {
1044         struct iscsi_conn *conn = beiscsi_conn->conn;
1045         struct iscsi_session *session = conn->session;
1046         struct iscsi_task *task;
1047         struct beiscsi_io_task *io_task;
1048         struct iscsi_hdr *login_hdr;
1049
1050         switch (ppdu->dw[offsetof(struct amap_pdu_base, opcode) / 32] &
1051                                                 PDUBASE_OPCODE_MASK) {
1052         case ISCSI_OP_NOOP_IN:
1053                 pbuffer = NULL;
1054                 buf_len = 0;
1055                 break;
1056         case ISCSI_OP_ASYNC_EVENT:
1057                 break;
1058         case ISCSI_OP_REJECT:
1059                 WARN_ON(!pbuffer);
1060                 WARN_ON(!(buf_len == 48));
1061                 beiscsi_log(phba, KERN_ERR,
1062                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1063                             "BM_%d : In ISCSI_OP_REJECT\n");
1064                 break;
1065         case ISCSI_OP_LOGIN_RSP:
1066         case ISCSI_OP_TEXT_RSP:
1067                 task = conn->login_task;
1068                 io_task = task->dd_data;
1069                 login_hdr = (struct iscsi_hdr *)ppdu;
1070                 login_hdr->itt = io_task->libiscsi_itt;
1071                 break;
1072         default:
1073                 beiscsi_log(phba, KERN_WARNING,
1074                             BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1075                             "BM_%d : Unrecognized opcode 0x%x in async msg\n",
1076                             (ppdu->
1077                              dw[offsetof(struct amap_pdu_base, opcode) / 32]
1078                              & PDUBASE_OPCODE_MASK));
1079                 return 1;
1080         }
1081
1082         spin_lock_bh(&session->lock);
1083         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)ppdu, pbuffer, buf_len);
1084         spin_unlock_bh(&session->lock);
1085         return 0;
1086 }
1087
1088 static struct sgl_handle *alloc_io_sgl_handle(struct beiscsi_hba *phba)
1089 {
1090         struct sgl_handle *psgl_handle;
1091
1092         if (phba->io_sgl_hndl_avbl) {
1093                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
1094                             "BM_%d : In alloc_io_sgl_handle,"
1095                             " io_sgl_alloc_index=%d\n",
1096                             phba->io_sgl_alloc_index);
1097
1098                 psgl_handle = phba->io_sgl_hndl_base[phba->
1099                                                 io_sgl_alloc_index];
1100                 phba->io_sgl_hndl_base[phba->io_sgl_alloc_index] = NULL;
1101                 phba->io_sgl_hndl_avbl--;
1102                 if (phba->io_sgl_alloc_index == (phba->params.
1103                                                  ios_per_ctrl - 1))
1104                         phba->io_sgl_alloc_index = 0;
1105                 else
1106                         phba->io_sgl_alloc_index++;
1107         } else
1108                 psgl_handle = NULL;
1109         return psgl_handle;
1110 }
1111
1112 static void
1113 free_io_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
1114 {
1115         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
1116                     "BM_%d : In free_,io_sgl_free_index=%d\n",
1117                     phba->io_sgl_free_index);
1118
1119         if (phba->io_sgl_hndl_base[phba->io_sgl_free_index]) {
1120                 /*
1121                  * this can happen if clean_task is called on a task that
1122                  * failed in xmit_task or alloc_pdu.
1123                  */
1124                  beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
1125                              "BM_%d : Double Free in IO SGL io_sgl_free_index=%d,"
1126                              "value there=%p\n", phba->io_sgl_free_index,
1127                              phba->io_sgl_hndl_base
1128                              [phba->io_sgl_free_index]);
1129                 return;
1130         }
1131         phba->io_sgl_hndl_base[phba->io_sgl_free_index] = psgl_handle;
1132         phba->io_sgl_hndl_avbl++;
1133         if (phba->io_sgl_free_index == (phba->params.ios_per_ctrl - 1))
1134                 phba->io_sgl_free_index = 0;
1135         else
1136                 phba->io_sgl_free_index++;
1137 }
1138
1139 /**
1140  * alloc_wrb_handle - To allocate a wrb handle
1141  * @phba: The hba pointer
1142  * @cid: The cid to use for allocation
1143  *
1144  * This happens under session_lock until submission to chip
1145  */
1146 struct wrb_handle *alloc_wrb_handle(struct beiscsi_hba *phba, unsigned int cid)
1147 {
1148         struct hwi_wrb_context *pwrb_context;
1149         struct hwi_controller *phwi_ctrlr;
1150         struct wrb_handle *pwrb_handle, *pwrb_handle_tmp;
1151
1152         phwi_ctrlr = phba->phwi_ctrlr;
1153         pwrb_context = &phwi_ctrlr->wrb_context[cid];
1154         if (pwrb_context->wrb_handles_available >= 2) {
1155                 pwrb_handle = pwrb_context->pwrb_handle_base[
1156                                             pwrb_context->alloc_index];
1157                 pwrb_context->wrb_handles_available--;
1158                 if (pwrb_context->alloc_index ==
1159                                                 (phba->params.wrbs_per_cxn - 1))
1160                         pwrb_context->alloc_index = 0;
1161                 else
1162                         pwrb_context->alloc_index++;
1163                 pwrb_handle_tmp = pwrb_context->pwrb_handle_base[
1164                                                 pwrb_context->alloc_index];
1165                 pwrb_handle->nxt_wrb_index = pwrb_handle_tmp->wrb_index;
1166         } else
1167                 pwrb_handle = NULL;
1168         return pwrb_handle;
1169 }
1170
1171 /**
1172  * free_wrb_handle - To free the wrb handle back to pool
1173  * @phba: The hba pointer
1174  * @pwrb_context: The context to free from
1175  * @pwrb_handle: The wrb_handle to free
1176  *
1177  * This happens under session_lock until submission to chip
1178  */
1179 static void
1180 free_wrb_handle(struct beiscsi_hba *phba, struct hwi_wrb_context *pwrb_context,
1181                 struct wrb_handle *pwrb_handle)
1182 {
1183         pwrb_context->pwrb_handle_base[pwrb_context->free_index] = pwrb_handle;
1184         pwrb_context->wrb_handles_available++;
1185         if (pwrb_context->free_index == (phba->params.wrbs_per_cxn - 1))
1186                 pwrb_context->free_index = 0;
1187         else
1188                 pwrb_context->free_index++;
1189
1190         beiscsi_log(phba, KERN_INFO,
1191                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1192                     "BM_%d : FREE WRB: pwrb_handle=%p free_index=0x%x"
1193                     "wrb_handles_available=%d\n",
1194                     pwrb_handle, pwrb_context->free_index,
1195                     pwrb_context->wrb_handles_available);
1196 }
1197
1198 static struct sgl_handle *alloc_mgmt_sgl_handle(struct beiscsi_hba *phba)
1199 {
1200         struct sgl_handle *psgl_handle;
1201
1202         if (phba->eh_sgl_hndl_avbl) {
1203                 psgl_handle = phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index];
1204                 phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index] = NULL;
1205                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
1206                             "BM_%d : mgmt_sgl_alloc_index=%d=0x%x\n",
1207                             phba->eh_sgl_alloc_index,
1208                             phba->eh_sgl_alloc_index);
1209
1210                 phba->eh_sgl_hndl_avbl--;
1211                 if (phba->eh_sgl_alloc_index ==
1212                     (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl -
1213                      1))
1214                         phba->eh_sgl_alloc_index = 0;
1215                 else
1216                         phba->eh_sgl_alloc_index++;
1217         } else
1218                 psgl_handle = NULL;
1219         return psgl_handle;
1220 }
1221
1222 void
1223 free_mgmt_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
1224 {
1225
1226         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
1227                     "BM_%d : In  free_mgmt_sgl_handle,"
1228                     "eh_sgl_free_index=%d\n",
1229                     phba->eh_sgl_free_index);
1230
1231         if (phba->eh_sgl_hndl_base[phba->eh_sgl_free_index]) {
1232                 /*
1233                  * this can happen if clean_task is called on a task that
1234                  * failed in xmit_task or alloc_pdu.
1235                  */
1236                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_CONFIG,
1237                             "BM_%d : Double Free in eh SGL ,"
1238                             "eh_sgl_free_index=%d\n",
1239                             phba->eh_sgl_free_index);
1240                 return;
1241         }
1242         phba->eh_sgl_hndl_base[phba->eh_sgl_free_index] = psgl_handle;
1243         phba->eh_sgl_hndl_avbl++;
1244         if (phba->eh_sgl_free_index ==
1245             (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl - 1))
1246                 phba->eh_sgl_free_index = 0;
1247         else
1248                 phba->eh_sgl_free_index++;
1249 }
1250
1251 static void
1252 be_complete_io(struct beiscsi_conn *beiscsi_conn,
1253                struct iscsi_task *task, struct sol_cqe *psol)
1254 {
1255         struct beiscsi_io_task *io_task = task->dd_data;
1256         struct be_status_bhs *sts_bhs =
1257                                 (struct be_status_bhs *)io_task->cmd_bhs;
1258         struct iscsi_conn *conn = beiscsi_conn->conn;
1259         unsigned char *sense;
1260         u32 resid = 0, exp_cmdsn, max_cmdsn;
1261         u8 rsp, status, flags;
1262
1263         exp_cmdsn = (psol->
1264                         dw[offsetof(struct amap_sol_cqe, i_exp_cmd_sn) / 32]
1265                         & SOL_EXP_CMD_SN_MASK);
1266         max_cmdsn = ((psol->
1267                         dw[offsetof(struct amap_sol_cqe, i_exp_cmd_sn) / 32]
1268                         & SOL_EXP_CMD_SN_MASK) +
1269                         ((psol->dw[offsetof(struct amap_sol_cqe, i_cmd_wnd)
1270                                 / 32] & SOL_CMD_WND_MASK) >> 24) - 1);
1271         rsp = ((psol->dw[offsetof(struct amap_sol_cqe, i_resp) / 32]
1272                                                 & SOL_RESP_MASK) >> 16);
1273         status = ((psol->dw[offsetof(struct amap_sol_cqe, i_sts) / 32]
1274                                                 & SOL_STS_MASK) >> 8);
1275         flags = ((psol->dw[offsetof(struct amap_sol_cqe, i_flags) / 32]
1276                                         & SOL_FLAGS_MASK) >> 24) | 0x80;
1277         if (!task->sc) {
1278                 if (io_task->scsi_cmnd)
1279                         scsi_dma_unmap(io_task->scsi_cmnd);
1280
1281                 return;
1282         }
1283         task->sc->result = (DID_OK << 16) | status;
1284         if (rsp != ISCSI_STATUS_CMD_COMPLETED) {
1285                 task->sc->result = DID_ERROR << 16;
1286                 goto unmap;
1287         }
1288
1289         /* bidi not initially supported */
1290         if (flags & (ISCSI_FLAG_CMD_UNDERFLOW | ISCSI_FLAG_CMD_OVERFLOW)) {
1291                 resid = (psol->dw[offsetof(struct amap_sol_cqe, i_res_cnt) /
1292                                 32] & SOL_RES_CNT_MASK);
1293
1294                 if (!status && (flags & ISCSI_FLAG_CMD_OVERFLOW))
1295                         task->sc->result = DID_ERROR << 16;
1296
1297                 if (flags & ISCSI_FLAG_CMD_UNDERFLOW) {
1298                         scsi_set_resid(task->sc, resid);
1299                         if (!status && (scsi_bufflen(task->sc) - resid <
1300                             task->sc->underflow))
1301                                 task->sc->result = DID_ERROR << 16;
1302                 }
1303         }
1304
1305         if (status == SAM_STAT_CHECK_CONDITION) {
1306                 u16 sense_len;
1307                 unsigned short *slen = (unsigned short *)sts_bhs->sense_info;
1308
1309                 sense = sts_bhs->sense_info + sizeof(unsigned short);
1310                 sense_len = be16_to_cpu(*slen);
1311                 memcpy(task->sc->sense_buffer, sense,
1312                        min_t(u16, sense_len, SCSI_SENSE_BUFFERSIZE));
1313         }
1314
1315         if (io_task->cmd_bhs->iscsi_hdr.flags & ISCSI_FLAG_CMD_READ) {
1316                 if (psol->dw[offsetof(struct amap_sol_cqe, i_res_cnt) / 32]
1317                                                         & SOL_RES_CNT_MASK)
1318                          conn->rxdata_octets += (psol->
1319                              dw[offsetof(struct amap_sol_cqe, i_res_cnt) / 32]
1320                              & SOL_RES_CNT_MASK);
1321         }
1322 unmap:
1323         scsi_dma_unmap(io_task->scsi_cmnd);
1324         iscsi_complete_scsi_task(task, exp_cmdsn, max_cmdsn);
1325 }
1326
1327 static void
1328 be_complete_logout(struct beiscsi_conn *beiscsi_conn,
1329                    struct iscsi_task *task, struct sol_cqe *psol)
1330 {
1331         struct iscsi_logout_rsp *hdr;
1332         struct beiscsi_io_task *io_task = task->dd_data;
1333         struct iscsi_conn *conn = beiscsi_conn->conn;
1334
1335         hdr = (struct iscsi_logout_rsp *)task->hdr;
1336         hdr->opcode = ISCSI_OP_LOGOUT_RSP;
1337         hdr->t2wait = 5;
1338         hdr->t2retain = 0;
1339         hdr->flags = ((psol->dw[offsetof(struct amap_sol_cqe, i_flags) / 32]
1340                                         & SOL_FLAGS_MASK) >> 24) | 0x80;
1341         hdr->response = (psol->dw[offsetof(struct amap_sol_cqe, i_resp) /
1342                                         32] & SOL_RESP_MASK);
1343         hdr->exp_cmdsn = cpu_to_be32(psol->
1344                         dw[offsetof(struct amap_sol_cqe, i_exp_cmd_sn) / 32]
1345                                         & SOL_EXP_CMD_SN_MASK);
1346         hdr->max_cmdsn = be32_to_cpu((psol->
1347                          dw[offsetof(struct amap_sol_cqe, i_exp_cmd_sn) / 32]
1348                                         & SOL_EXP_CMD_SN_MASK) +
1349                         ((psol->dw[offsetof(struct amap_sol_cqe, i_cmd_wnd)
1350                                         / 32] & SOL_CMD_WND_MASK) >> 24) - 1);
1351         hdr->dlength[0] = 0;
1352         hdr->dlength[1] = 0;
1353         hdr->dlength[2] = 0;
1354         hdr->hlength = 0;
1355         hdr->itt = io_task->libiscsi_itt;
1356         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1357 }
1358
1359 static void
1360 be_complete_tmf(struct beiscsi_conn *beiscsi_conn,
1361                 struct iscsi_task *task, struct sol_cqe *psol)
1362 {
1363         struct iscsi_tm_rsp *hdr;
1364         struct iscsi_conn *conn = beiscsi_conn->conn;
1365         struct beiscsi_io_task *io_task = task->dd_data;
1366
1367         hdr = (struct iscsi_tm_rsp *)task->hdr;
1368         hdr->opcode = ISCSI_OP_SCSI_TMFUNC_RSP;
1369         hdr->flags = ((psol->dw[offsetof(struct amap_sol_cqe, i_flags) / 32]
1370                                         & SOL_FLAGS_MASK) >> 24) | 0x80;
1371         hdr->response = (psol->dw[offsetof(struct amap_sol_cqe, i_resp) /
1372                                         32] & SOL_RESP_MASK);
1373         hdr->exp_cmdsn = cpu_to_be32(psol->dw[offsetof(struct amap_sol_cqe,
1374                                     i_exp_cmd_sn) / 32] & SOL_EXP_CMD_SN_MASK);
1375         hdr->max_cmdsn = be32_to_cpu((psol->dw[offsetof(struct amap_sol_cqe,
1376                         i_exp_cmd_sn) / 32] & SOL_EXP_CMD_SN_MASK) +
1377                         ((psol->dw[offsetof(struct amap_sol_cqe, i_cmd_wnd)
1378                         / 32] & SOL_CMD_WND_MASK) >> 24) - 1);
1379         hdr->itt = io_task->libiscsi_itt;
1380         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1381 }
1382
1383 static void
1384 hwi_complete_drvr_msgs(struct beiscsi_conn *beiscsi_conn,
1385                        struct beiscsi_hba *phba, struct sol_cqe *psol)
1386 {
1387         struct hwi_wrb_context *pwrb_context;
1388         struct wrb_handle *pwrb_handle = NULL;
1389         struct hwi_controller *phwi_ctrlr;
1390         struct iscsi_task *task;
1391         struct beiscsi_io_task *io_task;
1392         struct iscsi_conn *conn = beiscsi_conn->conn;
1393         struct iscsi_session *session = conn->session;
1394
1395         phwi_ctrlr = phba->phwi_ctrlr;
1396         pwrb_context = &phwi_ctrlr->wrb_context[((psol->
1397                                 dw[offsetof(struct amap_sol_cqe, cid) / 32] &
1398                                 SOL_CID_MASK) >> 6) -
1399                                 phba->fw_config.iscsi_cid_start];
1400         pwrb_handle = pwrb_context->pwrb_handle_basestd[((psol->
1401                                 dw[offsetof(struct amap_sol_cqe, wrb_index) /
1402                                 32] & SOL_WRB_INDEX_MASK) >> 16)];
1403         task = pwrb_handle->pio_handle;
1404
1405         io_task = task->dd_data;
1406         spin_lock_bh(&phba->mgmt_sgl_lock);
1407         free_mgmt_sgl_handle(phba, io_task->psgl_handle);
1408         spin_unlock_bh(&phba->mgmt_sgl_lock);
1409         spin_lock_bh(&session->lock);
1410         free_wrb_handle(phba, pwrb_context, pwrb_handle);
1411         spin_unlock_bh(&session->lock);
1412 }
1413
1414 static void
1415 be_complete_nopin_resp(struct beiscsi_conn *beiscsi_conn,
1416                        struct iscsi_task *task, struct sol_cqe *psol)
1417 {
1418         struct iscsi_nopin *hdr;
1419         struct iscsi_conn *conn = beiscsi_conn->conn;
1420         struct beiscsi_io_task *io_task = task->dd_data;
1421
1422         hdr = (struct iscsi_nopin *)task->hdr;
1423         hdr->flags = ((psol->dw[offsetof(struct amap_sol_cqe, i_flags) / 32]
1424                         & SOL_FLAGS_MASK) >> 24) | 0x80;
1425         hdr->exp_cmdsn = cpu_to_be32(psol->dw[offsetof(struct amap_sol_cqe,
1426                                      i_exp_cmd_sn) / 32] & SOL_EXP_CMD_SN_MASK);
1427         hdr->max_cmdsn = be32_to_cpu((psol->dw[offsetof(struct amap_sol_cqe,
1428                         i_exp_cmd_sn) / 32] & SOL_EXP_CMD_SN_MASK) +
1429                         ((psol->dw[offsetof(struct amap_sol_cqe, i_cmd_wnd)
1430                         / 32] & SOL_CMD_WND_MASK) >> 24) - 1);
1431         hdr->opcode = ISCSI_OP_NOOP_IN;
1432         hdr->itt = io_task->libiscsi_itt;
1433         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1434 }
1435
1436 static void hwi_complete_cmd(struct beiscsi_conn *beiscsi_conn,
1437                              struct beiscsi_hba *phba, struct sol_cqe *psol)
1438 {
1439         struct hwi_wrb_context *pwrb_context;
1440         struct wrb_handle *pwrb_handle;
1441         struct iscsi_wrb *pwrb = NULL;
1442         struct hwi_controller *phwi_ctrlr;
1443         struct iscsi_task *task;
1444         unsigned int type;
1445         struct iscsi_conn *conn = beiscsi_conn->conn;
1446         struct iscsi_session *session = conn->session;
1447
1448         phwi_ctrlr = phba->phwi_ctrlr;
1449         pwrb_context = &phwi_ctrlr->wrb_context[((psol->dw[offsetof
1450                                 (struct amap_sol_cqe, cid) / 32]
1451                                 & SOL_CID_MASK) >> 6) -
1452                                 phba->fw_config.iscsi_cid_start];
1453         pwrb_handle = pwrb_context->pwrb_handle_basestd[((psol->
1454                                 dw[offsetof(struct amap_sol_cqe, wrb_index) /
1455                                 32] & SOL_WRB_INDEX_MASK) >> 16)];
1456         task = pwrb_handle->pio_handle;
1457         pwrb = pwrb_handle->pwrb;
1458         type = (pwrb->dw[offsetof(struct amap_iscsi_wrb, type) / 32] &
1459                                  WRB_TYPE_MASK) >> 28;
1460
1461         spin_lock_bh(&session->lock);
1462         switch (type) {
1463         case HWH_TYPE_IO:
1464         case HWH_TYPE_IO_RD:
1465                 if ((task->hdr->opcode & ISCSI_OPCODE_MASK) ==
1466                      ISCSI_OP_NOOP_OUT)
1467                         be_complete_nopin_resp(beiscsi_conn, task, psol);
1468                 else
1469                         be_complete_io(beiscsi_conn, task, psol);
1470                 break;
1471
1472         case HWH_TYPE_LOGOUT:
1473                 if ((task->hdr->opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGOUT)
1474                         be_complete_logout(beiscsi_conn, task, psol);
1475                 else
1476                         be_complete_tmf(beiscsi_conn, task, psol);
1477
1478                 break;
1479
1480         case HWH_TYPE_LOGIN:
1481                 beiscsi_log(phba, KERN_ERR,
1482                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1483                             "BM_%d :\t\t No HWH_TYPE_LOGIN Expected in"
1484                             " hwi_complete_cmd- Solicited path\n");
1485                 break;
1486
1487         case HWH_TYPE_NOP:
1488                 be_complete_nopin_resp(beiscsi_conn, task, psol);
1489                 break;
1490
1491         default:
1492                 beiscsi_log(phba, KERN_WARNING,
1493                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1494                             "BM_%d : In hwi_complete_cmd, unknown type = %d"
1495                             "wrb_index 0x%x CID 0x%x\n", type,
1496                             ((psol->dw[offsetof(struct amap_iscsi_wrb,
1497                             type) / 32] & SOL_WRB_INDEX_MASK) >> 16),
1498                             ((psol->dw[offsetof(struct amap_sol_cqe,
1499                             cid) / 32] & SOL_CID_MASK) >> 6));
1500                 break;
1501         }
1502
1503         spin_unlock_bh(&session->lock);
1504 }
1505
1506 static struct list_head *hwi_get_async_busy_list(struct hwi_async_pdu_context
1507                                           *pasync_ctx, unsigned int is_header,
1508                                           unsigned int host_write_ptr)
1509 {
1510         if (is_header)
1511                 return &pasync_ctx->async_entry[host_write_ptr].
1512                     header_busy_list;
1513         else
1514                 return &pasync_ctx->async_entry[host_write_ptr].data_busy_list;
1515 }
1516
1517 static struct async_pdu_handle *
1518 hwi_get_async_handle(struct beiscsi_hba *phba,
1519                      struct beiscsi_conn *beiscsi_conn,
1520                      struct hwi_async_pdu_context *pasync_ctx,
1521                      struct i_t_dpdu_cqe *pdpdu_cqe, unsigned int *pcq_index)
1522 {
1523         struct be_bus_address phys_addr;
1524         struct list_head *pbusy_list;
1525         struct async_pdu_handle *pasync_handle = NULL;
1526         unsigned char is_header = 0;
1527
1528         phys_addr.u.a32.address_lo =
1529             pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe, db_addr_lo) / 32] -
1530             ((pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe, dpl) / 32]
1531                                                 & PDUCQE_DPL_MASK) >> 16);
1532         phys_addr.u.a32.address_hi =
1533             pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe, db_addr_hi) / 32];
1534
1535         phys_addr.u.a64.address =
1536                         *((unsigned long long *)(&phys_addr.u.a64.address));
1537
1538         switch (pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe, code) / 32]
1539                         & PDUCQE_CODE_MASK) {
1540         case UNSOL_HDR_NOTIFY:
1541                 is_header = 1;
1542
1543                 pbusy_list = hwi_get_async_busy_list(pasync_ctx, 1,
1544                         (pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
1545                         index) / 32] & PDUCQE_INDEX_MASK));
1546                 break;
1547         case UNSOL_DATA_NOTIFY:
1548                 pbusy_list = hwi_get_async_busy_list(pasync_ctx, 0, (pdpdu_cqe->
1549                                         dw[offsetof(struct amap_i_t_dpdu_cqe,
1550                                         index) / 32] & PDUCQE_INDEX_MASK));
1551                 break;
1552         default:
1553                 pbusy_list = NULL;
1554                 beiscsi_log(phba, KERN_WARNING,
1555                             BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1556                             "BM_%d : Unexpected code=%d\n",
1557                             pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
1558                             code) / 32] & PDUCQE_CODE_MASK);
1559                 return NULL;
1560         }
1561
1562         WARN_ON(list_empty(pbusy_list));
1563         list_for_each_entry(pasync_handle, pbusy_list, link) {
1564                 if (pasync_handle->pa.u.a64.address == phys_addr.u.a64.address)
1565                         break;
1566         }
1567
1568         WARN_ON(!pasync_handle);
1569
1570         pasync_handle->cri = (unsigned short)beiscsi_conn->beiscsi_conn_cid -
1571                                              phba->fw_config.iscsi_cid_start;
1572         pasync_handle->is_header = is_header;
1573         pasync_handle->buffer_len = ((pdpdu_cqe->
1574                         dw[offsetof(struct amap_i_t_dpdu_cqe, dpl) / 32]
1575                         & PDUCQE_DPL_MASK) >> 16);
1576
1577         *pcq_index = (pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
1578                         index) / 32] & PDUCQE_INDEX_MASK);
1579         return pasync_handle;
1580 }
1581
1582 static unsigned int
1583 hwi_update_async_writables(struct beiscsi_hba *phba,
1584                             struct hwi_async_pdu_context *pasync_ctx,
1585                             unsigned int is_header, unsigned int cq_index)
1586 {
1587         struct list_head *pbusy_list;
1588         struct async_pdu_handle *pasync_handle;
1589         unsigned int num_entries, writables = 0;
1590         unsigned int *pep_read_ptr, *pwritables;
1591
1592         num_entries = pasync_ctx->num_entries;
1593         if (is_header) {
1594                 pep_read_ptr = &pasync_ctx->async_header.ep_read_ptr;
1595                 pwritables = &pasync_ctx->async_header.writables;
1596         } else {
1597                 pep_read_ptr = &pasync_ctx->async_data.ep_read_ptr;
1598                 pwritables = &pasync_ctx->async_data.writables;
1599         }
1600
1601         while ((*pep_read_ptr) != cq_index) {
1602                 (*pep_read_ptr)++;
1603                 *pep_read_ptr = (*pep_read_ptr) % num_entries;
1604
1605                 pbusy_list = hwi_get_async_busy_list(pasync_ctx, is_header,
1606                                                      *pep_read_ptr);
1607                 if (writables == 0)
1608                         WARN_ON(list_empty(pbusy_list));
1609
1610                 if (!list_empty(pbusy_list)) {
1611                         pasync_handle = list_entry(pbusy_list->next,
1612                                                    struct async_pdu_handle,
1613                                                    link);
1614                         WARN_ON(!pasync_handle);
1615                         pasync_handle->consumed = 1;
1616                 }
1617
1618                 writables++;
1619         }
1620
1621         if (!writables) {
1622                 beiscsi_log(phba, KERN_ERR,
1623                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1624                             "BM_%d : Duplicate notification received - index 0x%x!!\n",
1625                             cq_index);
1626                 WARN_ON(1);
1627         }
1628
1629         *pwritables = *pwritables + writables;
1630         return 0;
1631 }
1632
1633 static void hwi_free_async_msg(struct beiscsi_hba *phba,
1634                                        unsigned int cri)
1635 {
1636         struct hwi_controller *phwi_ctrlr;
1637         struct hwi_async_pdu_context *pasync_ctx;
1638         struct async_pdu_handle *pasync_handle, *tmp_handle;
1639         struct list_head *plist;
1640
1641         phwi_ctrlr = phba->phwi_ctrlr;
1642         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr);
1643
1644         plist  = &pasync_ctx->async_entry[cri].wait_queue.list;
1645
1646         list_for_each_entry_safe(pasync_handle, tmp_handle, plist, link) {
1647                 list_del(&pasync_handle->link);
1648
1649                 if (pasync_handle->is_header) {
1650                         list_add_tail(&pasync_handle->link,
1651                                       &pasync_ctx->async_header.free_list);
1652                         pasync_ctx->async_header.free_entries++;
1653                 } else {
1654                         list_add_tail(&pasync_handle->link,
1655                                       &pasync_ctx->async_data.free_list);
1656                         pasync_ctx->async_data.free_entries++;
1657                 }
1658         }
1659
1660         INIT_LIST_HEAD(&pasync_ctx->async_entry[cri].wait_queue.list);
1661         pasync_ctx->async_entry[cri].wait_queue.hdr_received = 0;
1662         pasync_ctx->async_entry[cri].wait_queue.bytes_received = 0;
1663 }
1664
1665 static struct phys_addr *
1666 hwi_get_ring_address(struct hwi_async_pdu_context *pasync_ctx,
1667                      unsigned int is_header, unsigned int host_write_ptr)
1668 {
1669         struct phys_addr *pasync_sge = NULL;
1670
1671         if (is_header)
1672                 pasync_sge = pasync_ctx->async_header.ring_base;
1673         else
1674                 pasync_sge = pasync_ctx->async_data.ring_base;
1675
1676         return pasync_sge + host_write_ptr;
1677 }
1678
1679 static void hwi_post_async_buffers(struct beiscsi_hba *phba,
1680                                    unsigned int is_header)
1681 {
1682         struct hwi_controller *phwi_ctrlr;
1683         struct hwi_async_pdu_context *pasync_ctx;
1684         struct async_pdu_handle *pasync_handle;
1685         struct list_head *pfree_link, *pbusy_list;
1686         struct phys_addr *pasync_sge;
1687         unsigned int ring_id, num_entries;
1688         unsigned int host_write_num;
1689         unsigned int writables;
1690         unsigned int i = 0;
1691         u32 doorbell = 0;
1692
1693         phwi_ctrlr = phba->phwi_ctrlr;
1694         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr);
1695         num_entries = pasync_ctx->num_entries;
1696
1697         if (is_header) {
1698                 writables = min(pasync_ctx->async_header.writables,
1699                                 pasync_ctx->async_header.free_entries);
1700                 pfree_link = pasync_ctx->async_header.free_list.next;
1701                 host_write_num = pasync_ctx->async_header.host_write_ptr;
1702                 ring_id = phwi_ctrlr->default_pdu_hdr.id;
1703         } else {
1704                 writables = min(pasync_ctx->async_data.writables,
1705                                 pasync_ctx->async_data.free_entries);
1706                 pfree_link = pasync_ctx->async_data.free_list.next;
1707                 host_write_num = pasync_ctx->async_data.host_write_ptr;
1708                 ring_id = phwi_ctrlr->default_pdu_data.id;
1709         }
1710
1711         writables = (writables / 8) * 8;
1712         if (writables) {
1713                 for (i = 0; i < writables; i++) {
1714                         pbusy_list =
1715                             hwi_get_async_busy_list(pasync_ctx, is_header,
1716                                                     host_write_num);
1717                         pasync_handle =
1718                             list_entry(pfree_link, struct async_pdu_handle,
1719                                                                 link);
1720                         WARN_ON(!pasync_handle);
1721                         pasync_handle->consumed = 0;
1722
1723                         pfree_link = pfree_link->next;
1724
1725                         pasync_sge = hwi_get_ring_address(pasync_ctx,
1726                                                 is_header, host_write_num);
1727
1728                         pasync_sge->hi = pasync_handle->pa.u.a32.address_lo;
1729                         pasync_sge->lo = pasync_handle->pa.u.a32.address_hi;
1730
1731                         list_move(&pasync_handle->link, pbusy_list);
1732
1733                         host_write_num++;
1734                         host_write_num = host_write_num % num_entries;
1735                 }
1736
1737                 if (is_header) {
1738                         pasync_ctx->async_header.host_write_ptr =
1739                                                         host_write_num;
1740                         pasync_ctx->async_header.free_entries -= writables;
1741                         pasync_ctx->async_header.writables -= writables;
1742                         pasync_ctx->async_header.busy_entries += writables;
1743                 } else {
1744                         pasync_ctx->async_data.host_write_ptr = host_write_num;
1745                         pasync_ctx->async_data.free_entries -= writables;
1746                         pasync_ctx->async_data.writables -= writables;
1747                         pasync_ctx->async_data.busy_entries += writables;
1748                 }
1749
1750                 doorbell |= ring_id & DB_DEF_PDU_RING_ID_MASK;
1751                 doorbell |= 1 << DB_DEF_PDU_REARM_SHIFT;
1752                 doorbell |= 0 << DB_DEF_PDU_EVENT_SHIFT;
1753                 doorbell |= (writables & DB_DEF_PDU_CQPROC_MASK)
1754                                         << DB_DEF_PDU_CQPROC_SHIFT;
1755
1756                 iowrite32(doorbell, phba->db_va + DB_RXULP0_OFFSET);
1757         }
1758 }
1759
1760 static void hwi_flush_default_pdu_buffer(struct beiscsi_hba *phba,
1761                                          struct beiscsi_conn *beiscsi_conn,
1762                                          struct i_t_dpdu_cqe *pdpdu_cqe)
1763 {
1764         struct hwi_controller *phwi_ctrlr;
1765         struct hwi_async_pdu_context *pasync_ctx;
1766         struct async_pdu_handle *pasync_handle = NULL;
1767         unsigned int cq_index = -1;
1768
1769         phwi_ctrlr = phba->phwi_ctrlr;
1770         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr);
1771
1772         pasync_handle = hwi_get_async_handle(phba, beiscsi_conn, pasync_ctx,
1773                                              pdpdu_cqe, &cq_index);
1774         BUG_ON(pasync_handle->is_header != 0);
1775         if (pasync_handle->consumed == 0)
1776                 hwi_update_async_writables(phba, pasync_ctx,
1777                                            pasync_handle->is_header, cq_index);
1778
1779         hwi_free_async_msg(phba, pasync_handle->cri);
1780         hwi_post_async_buffers(phba, pasync_handle->is_header);
1781 }
1782
1783 static unsigned int
1784 hwi_fwd_async_msg(struct beiscsi_conn *beiscsi_conn,
1785                   struct beiscsi_hba *phba,
1786                   struct hwi_async_pdu_context *pasync_ctx, unsigned short cri)
1787 {
1788         struct list_head *plist;
1789         struct async_pdu_handle *pasync_handle;
1790         void *phdr = NULL;
1791         unsigned int hdr_len = 0, buf_len = 0;
1792         unsigned int status, index = 0, offset = 0;
1793         void *pfirst_buffer = NULL;
1794         unsigned int num_buf = 0;
1795
1796         plist = &pasync_ctx->async_entry[cri].wait_queue.list;
1797
1798         list_for_each_entry(pasync_handle, plist, link) {
1799                 if (index == 0) {
1800                         phdr = pasync_handle->pbuffer;
1801                         hdr_len = pasync_handle->buffer_len;
1802                 } else {
1803                         buf_len = pasync_handle->buffer_len;
1804                         if (!num_buf) {
1805                                 pfirst_buffer = pasync_handle->pbuffer;
1806                                 num_buf++;
1807                         }
1808                         memcpy(pfirst_buffer + offset,
1809                                pasync_handle->pbuffer, buf_len);
1810                         offset += buf_len;
1811                 }
1812                 index++;
1813         }
1814
1815         status = beiscsi_process_async_pdu(beiscsi_conn, phba,
1816                                            (beiscsi_conn->beiscsi_conn_cid -
1817                                             phba->fw_config.iscsi_cid_start),
1818                                             phdr, hdr_len, pfirst_buffer,
1819                                             offset);
1820
1821         hwi_free_async_msg(phba, cri);
1822         return 0;
1823 }
1824
1825 static unsigned int
1826 hwi_gather_async_pdu(struct beiscsi_conn *beiscsi_conn,
1827                      struct beiscsi_hba *phba,
1828                      struct async_pdu_handle *pasync_handle)
1829 {
1830         struct hwi_async_pdu_context *pasync_ctx;
1831         struct hwi_controller *phwi_ctrlr;
1832         unsigned int bytes_needed = 0, status = 0;
1833         unsigned short cri = pasync_handle->cri;
1834         struct pdu_base *ppdu;
1835
1836         phwi_ctrlr = phba->phwi_ctrlr;
1837         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr);
1838
1839         list_del(&pasync_handle->link);
1840         if (pasync_handle->is_header) {
1841                 pasync_ctx->async_header.busy_entries--;
1842                 if (pasync_ctx->async_entry[cri].wait_queue.hdr_received) {
1843                         hwi_free_async_msg(phba, cri);
1844                         BUG();
1845                 }
1846
1847                 pasync_ctx->async_entry[cri].wait_queue.bytes_received = 0;
1848                 pasync_ctx->async_entry[cri].wait_queue.hdr_received = 1;
1849                 pasync_ctx->async_entry[cri].wait_queue.hdr_len =
1850                                 (unsigned short)pasync_handle->buffer_len;
1851                 list_add_tail(&pasync_handle->link,
1852                               &pasync_ctx->async_entry[cri].wait_queue.list);
1853
1854                 ppdu = pasync_handle->pbuffer;
1855                 bytes_needed = ((((ppdu->dw[offsetof(struct amap_pdu_base,
1856                         data_len_hi) / 32] & PDUBASE_DATALENHI_MASK) << 8) &
1857                         0xFFFF0000) | ((be16_to_cpu((ppdu->
1858                         dw[offsetof(struct amap_pdu_base, data_len_lo) / 32]
1859                         & PDUBASE_DATALENLO_MASK) >> 16)) & 0x0000FFFF));
1860
1861                 if (status == 0) {
1862                         pasync_ctx->async_entry[cri].wait_queue.bytes_needed =
1863                             bytes_needed;
1864
1865                         if (bytes_needed == 0)
1866                                 status = hwi_fwd_async_msg(beiscsi_conn, phba,
1867                                                            pasync_ctx, cri);
1868                 }
1869         } else {
1870                 pasync_ctx->async_data.busy_entries--;
1871                 if (pasync_ctx->async_entry[cri].wait_queue.hdr_received) {
1872                         list_add_tail(&pasync_handle->link,
1873                                       &pasync_ctx->async_entry[cri].wait_queue.
1874                                       list);
1875                         pasync_ctx->async_entry[cri].wait_queue.
1876                                 bytes_received +=
1877                                 (unsigned short)pasync_handle->buffer_len;
1878
1879                         if (pasync_ctx->async_entry[cri].wait_queue.
1880                             bytes_received >=
1881                             pasync_ctx->async_entry[cri].wait_queue.
1882                             bytes_needed)
1883                                 status = hwi_fwd_async_msg(beiscsi_conn, phba,
1884                                                            pasync_ctx, cri);
1885                 }
1886         }
1887         return status;
1888 }
1889
1890 static void hwi_process_default_pdu_ring(struct beiscsi_conn *beiscsi_conn,
1891                                          struct beiscsi_hba *phba,
1892                                          struct i_t_dpdu_cqe *pdpdu_cqe)
1893 {
1894         struct hwi_controller *phwi_ctrlr;
1895         struct hwi_async_pdu_context *pasync_ctx;
1896         struct async_pdu_handle *pasync_handle = NULL;
1897         unsigned int cq_index = -1;
1898
1899         phwi_ctrlr = phba->phwi_ctrlr;
1900         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr);
1901         pasync_handle = hwi_get_async_handle(phba, beiscsi_conn, pasync_ctx,
1902                                              pdpdu_cqe, &cq_index);
1903
1904         if (pasync_handle->consumed == 0)
1905                 hwi_update_async_writables(phba, pasync_ctx,
1906                                            pasync_handle->is_header, cq_index);
1907
1908         hwi_gather_async_pdu(beiscsi_conn, phba, pasync_handle);
1909         hwi_post_async_buffers(phba, pasync_handle->is_header);
1910 }
1911
1912 static void  beiscsi_process_mcc_isr(struct beiscsi_hba *phba)
1913 {
1914         struct be_queue_info *mcc_cq;
1915         struct  be_mcc_compl *mcc_compl;
1916         unsigned int num_processed = 0;
1917
1918         mcc_cq = &phba->ctrl.mcc_obj.cq;
1919         mcc_compl = queue_tail_node(mcc_cq);
1920         mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
1921         while (mcc_compl->flags & CQE_FLAGS_VALID_MASK) {
1922
1923                 if (num_processed >= 32) {
1924                         hwi_ring_cq_db(phba, mcc_cq->id,
1925                                         num_processed, 0, 0);
1926                         num_processed = 0;
1927                 }
1928                 if (mcc_compl->flags & CQE_FLAGS_ASYNC_MASK) {
1929                         /* Interpret flags as an async trailer */
1930                         if (is_link_state_evt(mcc_compl->flags))
1931                                 /* Interpret compl as a async link evt */
1932                                 beiscsi_async_link_state_process(phba,
1933                                 (struct be_async_event_link_state *) mcc_compl);
1934                         else
1935                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_MBOX,
1936                                             "BM_%d :  Unsupported Async Event, flags"
1937                                             " = 0x%08x\n",
1938                                             mcc_compl->flags);
1939                 } else if (mcc_compl->flags & CQE_FLAGS_COMPLETED_MASK) {
1940                         be_mcc_compl_process_isr(&phba->ctrl, mcc_compl);
1941                         atomic_dec(&phba->ctrl.mcc_obj.q.used);
1942                 }
1943
1944                 mcc_compl->flags = 0;
1945                 queue_tail_inc(mcc_cq);
1946                 mcc_compl = queue_tail_node(mcc_cq);
1947                 mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
1948                 num_processed++;
1949         }
1950
1951         if (num_processed > 0)
1952                 hwi_ring_cq_db(phba, mcc_cq->id, num_processed, 1, 0);
1953
1954 }
1955
1956 /**
1957  * beiscsi_process_cq()- Process the Completion Queue
1958  * @pbe_eq: Event Q on which the Completion has come
1959  *
1960  * return
1961  *     Number of Completion Entries processed.
1962  **/
1963 static unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq)
1964 {
1965         struct be_queue_info *cq;
1966         struct sol_cqe *sol;
1967         struct dmsg_cqe *dmsg;
1968         unsigned int num_processed = 0;
1969         unsigned int tot_nump = 0;
1970         unsigned short code = 0, cid = 0;
1971         struct beiscsi_conn *beiscsi_conn;
1972         struct beiscsi_endpoint *beiscsi_ep;
1973         struct iscsi_endpoint *ep;
1974         struct beiscsi_hba *phba;
1975
1976         cq = pbe_eq->cq;
1977         sol = queue_tail_node(cq);
1978         phba = pbe_eq->phba;
1979
1980         while (sol->dw[offsetof(struct amap_sol_cqe, valid) / 32] &
1981                CQE_VALID_MASK) {
1982                 be_dws_le_to_cpu(sol, sizeof(struct sol_cqe));
1983
1984                 cid = ((sol->dw[offsetof(struct amap_sol_cqe, cid)/32] &
1985                       CQE_CID_MASK) >> 6);
1986                 code = (sol->dw[offsetof(struct amap_sol_cqe, code)/32] &
1987                        CQE_CODE_MASK);
1988                 ep = phba->ep_array[cid - phba->fw_config.iscsi_cid_start];
1989
1990                 beiscsi_ep = ep->dd_data;
1991                 beiscsi_conn = beiscsi_ep->conn;
1992
1993                 if (num_processed >= 32) {
1994                         hwi_ring_cq_db(phba, cq->id,
1995                                         num_processed, 0, 0);
1996                         tot_nump += num_processed;
1997                         num_processed = 0;
1998                 }
1999
2000                 switch (code) {
2001                 case SOL_CMD_COMPLETE:
2002                         hwi_complete_cmd(beiscsi_conn, phba, sol);
2003                         break;
2004                 case DRIVERMSG_NOTIFY:
2005                         beiscsi_log(phba, KERN_INFO,
2006                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2007                                     "BM_%d : Received %s[%d] on CID : %d\n",
2008                                     cqe_desc[code], code, cid);
2009
2010                         dmsg = (struct dmsg_cqe *)sol;
2011                         hwi_complete_drvr_msgs(beiscsi_conn, phba, sol);
2012                         break;
2013                 case UNSOL_HDR_NOTIFY:
2014                         beiscsi_log(phba, KERN_INFO,
2015                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2016                                     "BM_%d : Received %s[%d] on CID : %d\n",
2017                                     cqe_desc[code], code, cid);
2018
2019                         hwi_process_default_pdu_ring(beiscsi_conn, phba,
2020                                              (struct i_t_dpdu_cqe *)sol);
2021                         break;
2022                 case UNSOL_DATA_NOTIFY:
2023                         beiscsi_log(phba, KERN_INFO,
2024                                     BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2025                                     "BM_%d : Received %s[%d] on CID : %d\n",
2026                                     cqe_desc[code], code, cid);
2027
2028                         hwi_process_default_pdu_ring(beiscsi_conn, phba,
2029                                              (struct i_t_dpdu_cqe *)sol);
2030                         break;
2031                 case CXN_INVALIDATE_INDEX_NOTIFY:
2032                 case CMD_INVALIDATED_NOTIFY:
2033                 case CXN_INVALIDATE_NOTIFY:
2034                         beiscsi_log(phba, KERN_ERR,
2035                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2036                                     "BM_%d : Ignoring %s[%d] on CID : %d\n",
2037                                     cqe_desc[code], code, cid);
2038                         break;
2039                 case SOL_CMD_KILLED_DATA_DIGEST_ERR:
2040                 case CMD_KILLED_INVALID_STATSN_RCVD:
2041                 case CMD_KILLED_INVALID_R2T_RCVD:
2042                 case CMD_CXN_KILLED_LUN_INVALID:
2043                 case CMD_CXN_KILLED_ICD_INVALID:
2044                 case CMD_CXN_KILLED_ITT_INVALID:
2045                 case CMD_CXN_KILLED_SEQ_OUTOFORDER:
2046                 case CMD_CXN_KILLED_INVALID_DATASN_RCVD:
2047                         beiscsi_log(phba, KERN_ERR,
2048                                     BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2049                                     "BM_%d : Cmd Notification %s[%d] on CID : %d\n",
2050                                     cqe_desc[code], code,  cid);
2051                         break;
2052                 case UNSOL_DATA_DIGEST_ERROR_NOTIFY:
2053                         beiscsi_log(phba, KERN_ERR,
2054                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2055                                     "BM_%d :  Dropping %s[%d] on DPDU ring on CID : %d\n",
2056                                     cqe_desc[code], code, cid);
2057                         hwi_flush_default_pdu_buffer(phba, beiscsi_conn,
2058                                              (struct i_t_dpdu_cqe *) sol);
2059                         break;
2060                 case CXN_KILLED_PDU_SIZE_EXCEEDS_DSL:
2061                 case CXN_KILLED_BURST_LEN_MISMATCH:
2062                 case CXN_KILLED_AHS_RCVD:
2063                 case CXN_KILLED_HDR_DIGEST_ERR:
2064                 case CXN_KILLED_UNKNOWN_HDR:
2065                 case CXN_KILLED_STALE_ITT_TTT_RCVD:
2066                 case CXN_KILLED_INVALID_ITT_TTT_RCVD:
2067                 case CXN_KILLED_TIMED_OUT:
2068                 case CXN_KILLED_FIN_RCVD:
2069                 case CXN_KILLED_RST_SENT:
2070                 case CXN_KILLED_RST_RCVD:
2071                 case CXN_KILLED_BAD_UNSOL_PDU_RCVD:
2072                 case CXN_KILLED_BAD_WRB_INDEX_ERROR:
2073                 case CXN_KILLED_OVER_RUN_RESIDUAL:
2074                 case CXN_KILLED_UNDER_RUN_RESIDUAL:
2075                 case CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN:
2076                         beiscsi_log(phba, KERN_ERR,
2077                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2078                                     "BM_%d : Event %s[%d] received on CID : %d\n",
2079                                     cqe_desc[code], code, cid);
2080                         if (beiscsi_conn)
2081                                 iscsi_conn_failure(beiscsi_conn->conn,
2082                                                    ISCSI_ERR_CONN_FAILED);
2083                         break;
2084                 default:
2085                         beiscsi_log(phba, KERN_ERR,
2086                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2087                                     "BM_%d : Invalid CQE Event Received Code : %d"
2088                                     "CID 0x%x...\n",
2089                                     code, cid);
2090                         break;
2091                 }
2092
2093                 AMAP_SET_BITS(struct amap_sol_cqe, valid, sol, 0);
2094                 queue_tail_inc(cq);
2095                 sol = queue_tail_node(cq);
2096                 num_processed++;
2097         }
2098
2099         if (num_processed > 0) {
2100                 tot_nump += num_processed;
2101                 hwi_ring_cq_db(phba, cq->id, num_processed, 1, 0);
2102         }
2103         return tot_nump;
2104 }
2105
2106 void beiscsi_process_all_cqs(struct work_struct *work)
2107 {
2108         unsigned long flags;
2109         struct hwi_controller *phwi_ctrlr;
2110         struct hwi_context_memory *phwi_context;
2111         struct be_eq_obj *pbe_eq;
2112         struct beiscsi_hba *phba =
2113             container_of(work, struct beiscsi_hba, work_cqs);
2114
2115         phwi_ctrlr = phba->phwi_ctrlr;
2116         phwi_context = phwi_ctrlr->phwi_ctxt;
2117         if (phba->msix_enabled)
2118                 pbe_eq = &phwi_context->be_eq[phba->num_cpus];
2119         else
2120                 pbe_eq = &phwi_context->be_eq[0];
2121
2122         if (phba->todo_mcc_cq) {
2123                 spin_lock_irqsave(&phba->isr_lock, flags);
2124                 phba->todo_mcc_cq = 0;
2125                 spin_unlock_irqrestore(&phba->isr_lock, flags);
2126                 beiscsi_process_mcc_isr(phba);
2127         }
2128
2129         if (phba->todo_cq) {
2130                 spin_lock_irqsave(&phba->isr_lock, flags);
2131                 phba->todo_cq = 0;
2132                 spin_unlock_irqrestore(&phba->isr_lock, flags);
2133                 beiscsi_process_cq(pbe_eq);
2134         }
2135 }
2136
2137 static int be_iopoll(struct blk_iopoll *iop, int budget)
2138 {
2139         static unsigned int ret;
2140         struct beiscsi_hba *phba;
2141         struct be_eq_obj *pbe_eq;
2142
2143         pbe_eq = container_of(iop, struct be_eq_obj, iopoll);
2144         ret = beiscsi_process_cq(pbe_eq);
2145         if (ret < budget) {
2146                 phba = pbe_eq->phba;
2147                 blk_iopoll_complete(iop);
2148                 beiscsi_log(phba, KERN_INFO,
2149                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2150                             "BM_%d : rearm pbe_eq->q.id =%d\n",
2151                             pbe_eq->q.id);
2152                 hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
2153         }
2154         return ret;
2155 }
2156
2157 static void
2158 hwi_write_sgl(struct iscsi_wrb *pwrb, struct scatterlist *sg,
2159               unsigned int num_sg, struct beiscsi_io_task *io_task)
2160 {
2161         struct iscsi_sge *psgl;
2162         unsigned int sg_len, index;
2163         unsigned int sge_len = 0;
2164         unsigned long long addr;
2165         struct scatterlist *l_sg;
2166         unsigned int offset;
2167
2168         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
2169                                       io_task->bhs_pa.u.a32.address_lo);
2170         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
2171                                       io_task->bhs_pa.u.a32.address_hi);
2172
2173         l_sg = sg;
2174         for (index = 0; (index < num_sg) && (index < 2); index++,
2175                                                          sg = sg_next(sg)) {
2176                 if (index == 0) {
2177                         sg_len = sg_dma_len(sg);
2178                         addr = (u64) sg_dma_address(sg);
2179                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
2180                                                 ((u32)(addr & 0xFFFFFFFF)));
2181                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
2182                                                         ((u32)(addr >> 32)));
2183                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
2184                                                         sg_len);
2185                         sge_len = sg_len;
2186                 } else {
2187                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_r2t_offset,
2188                                                         pwrb, sge_len);
2189                         sg_len = sg_dma_len(sg);
2190                         addr = (u64) sg_dma_address(sg);
2191                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_lo, pwrb,
2192                                                 ((u32)(addr & 0xFFFFFFFF)));
2193                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_hi, pwrb,
2194                                                         ((u32)(addr >> 32)));
2195                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_len, pwrb,
2196                                                         sg_len);
2197                 }
2198         }
2199         psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2200         memset(psgl, 0, sizeof(*psgl) * BE2_SGE);
2201
2202         AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len - 2);
2203
2204         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2205                         io_task->bhs_pa.u.a32.address_hi);
2206         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2207                         io_task->bhs_pa.u.a32.address_lo);
2208
2209         if (num_sg == 1) {
2210                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2211                                                                 1);
2212                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2213                                                                 0);
2214         } else if (num_sg == 2) {
2215                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2216                                                                 0);
2217                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2218                                                                 1);
2219         } else {
2220                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2221                                                                 0);
2222                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2223                                                                 0);
2224         }
2225         sg = l_sg;
2226         psgl++;
2227         psgl++;
2228         offset = 0;
2229         for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
2230                 sg_len = sg_dma_len(sg);
2231                 addr = (u64) sg_dma_address(sg);
2232                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2233                                                 (addr & 0xFFFFFFFF));
2234                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2235                                                 (addr >> 32));
2236                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, sg_len);
2237                 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, offset);
2238                 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2239                 offset += sg_len;
2240         }
2241         psgl--;
2242         AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2243 }
2244
2245 static void hwi_write_buffer(struct iscsi_wrb *pwrb, struct iscsi_task *task)
2246 {
2247         struct iscsi_sge *psgl;
2248         unsigned long long addr;
2249         struct beiscsi_io_task *io_task = task->dd_data;
2250         struct beiscsi_conn *beiscsi_conn = io_task->conn;
2251         struct beiscsi_hba *phba = beiscsi_conn->phba;
2252
2253         io_task->bhs_len = sizeof(struct be_nonio_bhs) - 2;
2254         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
2255                                 io_task->bhs_pa.u.a32.address_lo);
2256         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
2257                                 io_task->bhs_pa.u.a32.address_hi);
2258
2259         if (task->data) {
2260                 if (task->data_count) {
2261                         AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 1);
2262                         addr = (u64) pci_map_single(phba->pcidev,
2263                                                     task->data,
2264                                                     task->data_count, 1);
2265                 } else {
2266                         AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
2267                         addr = 0;
2268                 }
2269                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
2270                                                 ((u32)(addr & 0xFFFFFFFF)));
2271                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
2272                                                 ((u32)(addr >> 32)));
2273                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
2274                                                 task->data_count);
2275
2276                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb, 1);
2277         } else {
2278                 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
2279                 addr = 0;
2280         }
2281
2282         psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2283
2284         AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len);
2285
2286         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2287                       io_task->bhs_pa.u.a32.address_hi);
2288         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2289                       io_task->bhs_pa.u.a32.address_lo);
2290         if (task->data) {
2291                 psgl++;
2292                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl, 0);
2293                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl, 0);
2294                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0);
2295                 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, 0);
2296                 AMAP_SET_BITS(struct amap_iscsi_sge, rsvd0, psgl, 0);
2297                 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2298
2299                 psgl++;
2300                 if (task->data) {
2301                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2302                                                 ((u32)(addr & 0xFFFFFFFF)));
2303                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2304                                                 ((u32)(addr >> 32)));
2305                 }
2306                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0x106);
2307         }
2308         AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2309 }
2310
2311 static void beiscsi_find_mem_req(struct beiscsi_hba *phba)
2312 {
2313         unsigned int num_cq_pages, num_async_pdu_buf_pages;
2314         unsigned int num_async_pdu_data_pages, wrb_sz_per_cxn;
2315         unsigned int num_async_pdu_buf_sgl_pages, num_async_pdu_data_sgl_pages;
2316
2317         num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \
2318                                       sizeof(struct sol_cqe));
2319         num_async_pdu_buf_pages =
2320                         PAGES_REQUIRED(phba->params.asyncpdus_per_ctrl * \
2321                                        phba->params.defpdu_hdr_sz);
2322         num_async_pdu_buf_sgl_pages =
2323                         PAGES_REQUIRED(phba->params.asyncpdus_per_ctrl * \
2324                                        sizeof(struct phys_addr));
2325         num_async_pdu_data_pages =
2326                         PAGES_REQUIRED(phba->params.asyncpdus_per_ctrl * \
2327                                        phba->params.defpdu_data_sz);
2328         num_async_pdu_data_sgl_pages =
2329                         PAGES_REQUIRED(phba->params.asyncpdus_per_ctrl * \
2330                                        sizeof(struct phys_addr));
2331
2332         phba->params.hwi_ws_sz = sizeof(struct hwi_controller);
2333
2334         phba->mem_req[ISCSI_MEM_GLOBAL_HEADER] = 2 *
2335                                                  BE_ISCSI_PDU_HEADER_SIZE;
2336         phba->mem_req[HWI_MEM_ADDN_CONTEXT] =
2337                                             sizeof(struct hwi_context_memory);
2338
2339
2340         phba->mem_req[HWI_MEM_WRB] = sizeof(struct iscsi_wrb)
2341             * (phba->params.wrbs_per_cxn)
2342             * phba->params.cxns_per_ctrl;
2343         wrb_sz_per_cxn =  sizeof(struct wrb_handle) *
2344                                  (phba->params.wrbs_per_cxn);
2345         phba->mem_req[HWI_MEM_WRBH] = roundup_pow_of_two((wrb_sz_per_cxn) *
2346                                 phba->params.cxns_per_ctrl);
2347
2348         phba->mem_req[HWI_MEM_SGLH] = sizeof(struct sgl_handle) *
2349                 phba->params.icds_per_ctrl;
2350         phba->mem_req[HWI_MEM_SGE] = sizeof(struct iscsi_sge) *
2351                 phba->params.num_sge_per_io * phba->params.icds_per_ctrl;
2352
2353         phba->mem_req[HWI_MEM_ASYNC_HEADER_BUF] =
2354                 num_async_pdu_buf_pages * PAGE_SIZE;
2355         phba->mem_req[HWI_MEM_ASYNC_DATA_BUF] =
2356                 num_async_pdu_data_pages * PAGE_SIZE;
2357         phba->mem_req[HWI_MEM_ASYNC_HEADER_RING] =
2358                 num_async_pdu_buf_sgl_pages * PAGE_SIZE;
2359         phba->mem_req[HWI_MEM_ASYNC_DATA_RING] =
2360                 num_async_pdu_data_sgl_pages * PAGE_SIZE;
2361         phba->mem_req[HWI_MEM_ASYNC_HEADER_HANDLE] =
2362                 phba->params.asyncpdus_per_ctrl *
2363                 sizeof(struct async_pdu_handle);
2364         phba->mem_req[HWI_MEM_ASYNC_DATA_HANDLE] =
2365                 phba->params.asyncpdus_per_ctrl *
2366                 sizeof(struct async_pdu_handle);
2367         phba->mem_req[HWI_MEM_ASYNC_PDU_CONTEXT] =
2368                 sizeof(struct hwi_async_pdu_context) +
2369                 (phba->params.cxns_per_ctrl * sizeof(struct hwi_async_entry));
2370 }
2371
2372 static int beiscsi_alloc_mem(struct beiscsi_hba *phba)
2373 {
2374         struct be_mem_descriptor *mem_descr;
2375         dma_addr_t bus_add;
2376         struct mem_array *mem_arr, *mem_arr_orig;
2377         unsigned int i, j, alloc_size, curr_alloc_size;
2378
2379         phba->phwi_ctrlr = kzalloc(phba->params.hwi_ws_sz, GFP_KERNEL);
2380         if (!phba->phwi_ctrlr)
2381                 return -ENOMEM;
2382
2383         phba->init_mem = kcalloc(SE_MEM_MAX, sizeof(*mem_descr),
2384                                  GFP_KERNEL);
2385         if (!phba->init_mem) {
2386                 kfree(phba->phwi_ctrlr);
2387                 return -ENOMEM;
2388         }
2389
2390         mem_arr_orig = kmalloc(sizeof(*mem_arr_orig) * BEISCSI_MAX_FRAGS_INIT,
2391                                GFP_KERNEL);
2392         if (!mem_arr_orig) {
2393                 kfree(phba->init_mem);
2394                 kfree(phba->phwi_ctrlr);
2395                 return -ENOMEM;
2396         }
2397
2398         mem_descr = phba->init_mem;
2399         for (i = 0; i < SE_MEM_MAX; i++) {
2400                 j = 0;
2401                 mem_arr = mem_arr_orig;
2402                 alloc_size = phba->mem_req[i];
2403                 memset(mem_arr, 0, sizeof(struct mem_array) *
2404                        BEISCSI_MAX_FRAGS_INIT);
2405                 curr_alloc_size = min(be_max_phys_size * 1024, alloc_size);
2406                 do {
2407                         mem_arr->virtual_address = pci_alloc_consistent(
2408                                                         phba->pcidev,
2409                                                         curr_alloc_size,
2410                                                         &bus_add);
2411                         if (!mem_arr->virtual_address) {
2412                                 if (curr_alloc_size <= BE_MIN_MEM_SIZE)
2413                                         goto free_mem;
2414                                 if (curr_alloc_size -
2415                                         rounddown_pow_of_two(curr_alloc_size))
2416                                         curr_alloc_size = rounddown_pow_of_two
2417                                                              (curr_alloc_size);
2418                                 else
2419                                         curr_alloc_size = curr_alloc_size / 2;
2420                         } else {
2421                                 mem_arr->bus_address.u.
2422                                     a64.address = (__u64) bus_add;
2423                                 mem_arr->size = curr_alloc_size;
2424                                 alloc_size -= curr_alloc_size;
2425                                 curr_alloc_size = min(be_max_phys_size *
2426                                                       1024, alloc_size);
2427                                 j++;
2428                                 mem_arr++;
2429                         }
2430                 } while (alloc_size);
2431                 mem_descr->num_elements = j;
2432                 mem_descr->size_in_bytes = phba->mem_req[i];
2433                 mem_descr->mem_array = kmalloc(sizeof(*mem_arr) * j,
2434                                                GFP_KERNEL);
2435                 if (!mem_descr->mem_array)
2436                         goto free_mem;
2437
2438                 memcpy(mem_descr->mem_array, mem_arr_orig,
2439                        sizeof(struct mem_array) * j);
2440                 mem_descr++;
2441         }
2442         kfree(mem_arr_orig);
2443         return 0;
2444 free_mem:
2445         mem_descr->num_elements = j;
2446         while ((i) || (j)) {
2447                 for (j = mem_descr->num_elements; j > 0; j--) {
2448                         pci_free_consistent(phba->pcidev,
2449                                             mem_descr->mem_array[j - 1].size,
2450                                             mem_descr->mem_array[j - 1].
2451                                             virtual_address,
2452                                             (unsigned long)mem_descr->
2453                                             mem_array[j - 1].
2454                                             bus_address.u.a64.address);
2455                 }
2456                 if (i) {
2457                         i--;
2458                         kfree(mem_descr->mem_array);
2459                         mem_descr--;
2460                 }
2461         }
2462         kfree(mem_arr_orig);
2463         kfree(phba->init_mem);
2464         kfree(phba->phwi_ctrlr);
2465         return -ENOMEM;
2466 }
2467
2468 static int beiscsi_get_memory(struct beiscsi_hba *phba)
2469 {
2470         beiscsi_find_mem_req(phba);
2471         return beiscsi_alloc_mem(phba);
2472 }
2473
2474 static void iscsi_init_global_templates(struct beiscsi_hba *phba)
2475 {
2476         struct pdu_data_out *pdata_out;
2477         struct pdu_nop_out *pnop_out;
2478         struct be_mem_descriptor *mem_descr;
2479
2480         mem_descr = phba->init_mem;
2481         mem_descr += ISCSI_MEM_GLOBAL_HEADER;
2482         pdata_out =
2483             (struct pdu_data_out *)mem_descr->mem_array[0].virtual_address;
2484         memset(pdata_out, 0, BE_ISCSI_PDU_HEADER_SIZE);
2485
2486         AMAP_SET_BITS(struct amap_pdu_data_out, opcode, pdata_out,
2487                       IIOC_SCSI_DATA);
2488
2489         pnop_out =
2490             (struct pdu_nop_out *)((unsigned char *)mem_descr->mem_array[0].
2491                                    virtual_address + BE_ISCSI_PDU_HEADER_SIZE);
2492
2493         memset(pnop_out, 0, BE_ISCSI_PDU_HEADER_SIZE);
2494         AMAP_SET_BITS(struct amap_pdu_nop_out, ttt, pnop_out, 0xFFFFFFFF);
2495         AMAP_SET_BITS(struct amap_pdu_nop_out, f_bit, pnop_out, 1);
2496         AMAP_SET_BITS(struct amap_pdu_nop_out, i_bit, pnop_out, 0);
2497 }
2498
2499 static int beiscsi_init_wrb_handle(struct beiscsi_hba *phba)
2500 {
2501         struct be_mem_descriptor *mem_descr_wrbh, *mem_descr_wrb;
2502         struct wrb_handle *pwrb_handle = NULL;
2503         struct hwi_controller *phwi_ctrlr;
2504         struct hwi_wrb_context *pwrb_context;
2505         struct iscsi_wrb *pwrb = NULL;
2506         unsigned int num_cxn_wrbh = 0;
2507         unsigned int num_cxn_wrb = 0, j, idx = 0, index;
2508
2509         mem_descr_wrbh = phba->init_mem;
2510         mem_descr_wrbh += HWI_MEM_WRBH;
2511
2512         mem_descr_wrb = phba->init_mem;
2513         mem_descr_wrb += HWI_MEM_WRB;
2514         phwi_ctrlr = phba->phwi_ctrlr;
2515
2516         for (index = 0; index < phba->params.cxns_per_ctrl * 2; index += 2) {
2517                 pwrb_context = &phwi_ctrlr->wrb_context[index];
2518                 pwrb_context->pwrb_handle_base =
2519                                 kzalloc(sizeof(struct wrb_handle *) *
2520                                         phba->params.wrbs_per_cxn, GFP_KERNEL);
2521                 if (!pwrb_context->pwrb_handle_base) {
2522                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2523                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
2524                         goto init_wrb_hndl_failed;
2525                 }
2526                 pwrb_context->pwrb_handle_basestd =
2527                                 kzalloc(sizeof(struct wrb_handle *) *
2528                                         phba->params.wrbs_per_cxn, GFP_KERNEL);
2529                 if (!pwrb_context->pwrb_handle_basestd) {
2530                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2531                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
2532                         goto init_wrb_hndl_failed;
2533                 }
2534                 if (!num_cxn_wrbh) {
2535                         pwrb_handle =
2536                                 mem_descr_wrbh->mem_array[idx].virtual_address;
2537                         num_cxn_wrbh = ((mem_descr_wrbh->mem_array[idx].size) /
2538                                         ((sizeof(struct wrb_handle)) *
2539                                          phba->params.wrbs_per_cxn));
2540                         idx++;
2541                 }
2542                 pwrb_context->alloc_index = 0;
2543                 pwrb_context->wrb_handles_available = 0;
2544                 pwrb_context->free_index = 0;
2545
2546                 if (num_cxn_wrbh) {
2547                         for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
2548                                 pwrb_context->pwrb_handle_base[j] = pwrb_handle;
2549                                 pwrb_context->pwrb_handle_basestd[j] =
2550                                                                 pwrb_handle;
2551                                 pwrb_context->wrb_handles_available++;
2552                                 pwrb_handle->wrb_index = j;
2553                                 pwrb_handle++;
2554                         }
2555                         num_cxn_wrbh--;
2556                 }
2557         }
2558         idx = 0;
2559         for (index = 0; index < phba->params.cxns_per_ctrl * 2; index += 2) {
2560                 pwrb_context = &phwi_ctrlr->wrb_context[index];
2561                 if (!num_cxn_wrb) {
2562                         pwrb = mem_descr_wrb->mem_array[idx].virtual_address;
2563                         num_cxn_wrb = (mem_descr_wrb->mem_array[idx].size) /
2564                                 ((sizeof(struct iscsi_wrb) *
2565                                   phba->params.wrbs_per_cxn));
2566                         idx++;
2567                 }
2568
2569                 if (num_cxn_wrb) {
2570                         for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
2571                                 pwrb_handle = pwrb_context->pwrb_handle_base[j];
2572                                 pwrb_handle->pwrb = pwrb;
2573                                 pwrb++;
2574                         }
2575                         num_cxn_wrb--;
2576                 }
2577         }
2578         return 0;
2579 init_wrb_hndl_failed:
2580         for (j = index; j > 0; j--) {
2581                 pwrb_context = &phwi_ctrlr->wrb_context[j];
2582                 kfree(pwrb_context->pwrb_handle_base);
2583                 kfree(pwrb_context->pwrb_handle_basestd);
2584         }
2585         return -ENOMEM;
2586 }
2587
2588 static void hwi_init_async_pdu_ctx(struct beiscsi_hba *phba)
2589 {
2590         struct hwi_controller *phwi_ctrlr;
2591         struct hba_parameters *p = &phba->params;
2592         struct hwi_async_pdu_context *pasync_ctx;
2593         struct async_pdu_handle *pasync_header_h, *pasync_data_h;
2594         unsigned int index, idx, num_per_mem, num_async_data;
2595         struct be_mem_descriptor *mem_descr;
2596
2597         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2598         mem_descr += HWI_MEM_ASYNC_PDU_CONTEXT;
2599
2600         phwi_ctrlr = phba->phwi_ctrlr;
2601         phwi_ctrlr->phwi_ctxt->pasync_ctx = (struct hwi_async_pdu_context *)
2602                                 mem_descr->mem_array[0].virtual_address;
2603         pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx;
2604         memset(pasync_ctx, 0, sizeof(*pasync_ctx));
2605
2606         pasync_ctx->num_entries = p->asyncpdus_per_ctrl;
2607         pasync_ctx->buffer_size = p->defpdu_hdr_sz;
2608
2609         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2610         mem_descr += HWI_MEM_ASYNC_HEADER_BUF;
2611         if (mem_descr->mem_array[0].virtual_address) {
2612                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2613                             "BM_%d : hwi_init_async_pdu_ctx"
2614                             " HWI_MEM_ASYNC_HEADER_BUF va=%p\n",
2615                             mem_descr->mem_array[0].virtual_address);
2616         } else
2617                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
2618                             "BM_%d : No Virtual address\n");
2619
2620         pasync_ctx->async_header.va_base =
2621                         mem_descr->mem_array[0].virtual_address;
2622
2623         pasync_ctx->async_header.pa_base.u.a64.address =
2624                         mem_descr->mem_array[0].bus_address.u.a64.address;
2625
2626         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2627         mem_descr += HWI_MEM_ASYNC_HEADER_RING;
2628         if (mem_descr->mem_array[0].virtual_address) {
2629                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2630                             "BM_%d : hwi_init_async_pdu_ctx"
2631                             " HWI_MEM_ASYNC_HEADER_RING va=%p\n",
2632                             mem_descr->mem_array[0].virtual_address);
2633         } else
2634                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
2635                             "BM_%d : No Virtual address\n");
2636
2637         pasync_ctx->async_header.ring_base =
2638                         mem_descr->mem_array[0].virtual_address;
2639
2640         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2641         mem_descr += HWI_MEM_ASYNC_HEADER_HANDLE;
2642         if (mem_descr->mem_array[0].virtual_address) {
2643                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2644                             "BM_%d : hwi_init_async_pdu_ctx"
2645                             " HWI_MEM_ASYNC_HEADER_HANDLE va=%p\n",
2646                             mem_descr->mem_array[0].virtual_address);
2647         } else
2648                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
2649                             "BM_%d : No Virtual address\n");
2650
2651         pasync_ctx->async_header.handle_base =
2652                         mem_descr->mem_array[0].virtual_address;
2653         pasync_ctx->async_header.writables = 0;
2654         INIT_LIST_HEAD(&pasync_ctx->async_header.free_list);
2655
2656
2657         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2658         mem_descr += HWI_MEM_ASYNC_DATA_RING;
2659         if (mem_descr->mem_array[0].virtual_address) {
2660                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2661                             "BM_%d : hwi_init_async_pdu_ctx"
2662                             " HWI_MEM_ASYNC_DATA_RING va=%p\n",
2663                             mem_descr->mem_array[0].virtual_address);
2664         } else
2665                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
2666                             "BM_%d : No Virtual address\n");
2667
2668         pasync_ctx->async_data.ring_base =
2669                         mem_descr->mem_array[0].virtual_address;
2670
2671         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2672         mem_descr += HWI_MEM_ASYNC_DATA_HANDLE;
2673         if (!mem_descr->mem_array[0].virtual_address)
2674                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
2675                             "BM_%d : No Virtual address\n");
2676
2677         pasync_ctx->async_data.handle_base =
2678                         mem_descr->mem_array[0].virtual_address;
2679         pasync_ctx->async_data.writables = 0;
2680         INIT_LIST_HEAD(&pasync_ctx->async_data.free_list);
2681
2682         pasync_header_h =
2683                 (struct async_pdu_handle *)pasync_ctx->async_header.handle_base;
2684         pasync_data_h =
2685                 (struct async_pdu_handle *)pasync_ctx->async_data.handle_base;
2686
2687         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2688         mem_descr += HWI_MEM_ASYNC_DATA_BUF;
2689         if (mem_descr->mem_array[0].virtual_address) {
2690                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2691                             "BM_%d : hwi_init_async_pdu_ctx"
2692                             " HWI_MEM_ASYNC_DATA_BUF va=%p\n",
2693                             mem_descr->mem_array[0].virtual_address);
2694         } else
2695                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
2696                             "BM_%d : No Virtual address\n");
2697
2698         idx = 0;
2699         pasync_ctx->async_data.va_base =
2700                         mem_descr->mem_array[idx].virtual_address;
2701         pasync_ctx->async_data.pa_base.u.a64.address =
2702                         mem_descr->mem_array[idx].bus_address.u.a64.address;
2703
2704         num_async_data = ((mem_descr->mem_array[idx].size) /
2705                                 phba->params.defpdu_data_sz);
2706         num_per_mem = 0;
2707
2708         for (index = 0; index < p->asyncpdus_per_ctrl; index++) {
2709                 pasync_header_h->cri = -1;
2710                 pasync_header_h->index = (char)index;
2711                 INIT_LIST_HEAD(&pasync_header_h->link);
2712                 pasync_header_h->pbuffer =
2713                         (void *)((unsigned long)
2714                         (pasync_ctx->async_header.va_base) +
2715                         (p->defpdu_hdr_sz * index));
2716
2717                 pasync_header_h->pa.u.a64.address =
2718                         pasync_ctx->async_header.pa_base.u.a64.address +
2719                         (p->defpdu_hdr_sz * index);
2720
2721                 list_add_tail(&pasync_header_h->link,
2722                                 &pasync_ctx->async_header.free_list);
2723                 pasync_header_h++;
2724                 pasync_ctx->async_header.free_entries++;
2725                 pasync_ctx->async_header.writables++;
2726
2727                 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].wait_queue.list);
2728                 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
2729                                header_busy_list);
2730                 pasync_data_h->cri = -1;
2731                 pasync_data_h->index = (char)index;
2732                 INIT_LIST_HEAD(&pasync_data_h->link);
2733
2734                 if (!num_async_data) {
2735                         num_per_mem = 0;
2736                         idx++;
2737                         pasync_ctx->async_data.va_base =
2738                                 mem_descr->mem_array[idx].virtual_address;
2739                         pasync_ctx->async_data.pa_base.u.a64.address =
2740                                 mem_descr->mem_array[idx].
2741                                 bus_address.u.a64.address;
2742
2743                         num_async_data = ((mem_descr->mem_array[idx].size) /
2744                                         phba->params.defpdu_data_sz);
2745                 }
2746                 pasync_data_h->pbuffer =
2747                         (void *)((unsigned long)
2748                         (pasync_ctx->async_data.va_base) +
2749                         (p->defpdu_data_sz * num_per_mem));
2750
2751                 pasync_data_h->pa.u.a64.address =
2752                     pasync_ctx->async_data.pa_base.u.a64.address +
2753                     (p->defpdu_data_sz * num_per_mem);
2754                 num_per_mem++;
2755                 num_async_data--;
2756
2757                 list_add_tail(&pasync_data_h->link,
2758                               &pasync_ctx->async_data.free_list);
2759                 pasync_data_h++;
2760                 pasync_ctx->async_data.free_entries++;
2761                 pasync_ctx->async_data.writables++;
2762
2763                 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].data_busy_list);
2764         }
2765
2766         pasync_ctx->async_header.host_write_ptr = 0;
2767         pasync_ctx->async_header.ep_read_ptr = -1;
2768         pasync_ctx->async_data.host_write_ptr = 0;
2769         pasync_ctx->async_data.ep_read_ptr = -1;
2770 }
2771
2772 static int
2773 be_sgl_create_contiguous(void *virtual_address,
2774                          u64 physical_address, u32 length,
2775                          struct be_dma_mem *sgl)
2776 {
2777         WARN_ON(!virtual_address);
2778         WARN_ON(!physical_address);
2779         WARN_ON(!length > 0);
2780         WARN_ON(!sgl);
2781
2782         sgl->va = virtual_address;
2783         sgl->dma = (unsigned long)physical_address;
2784         sgl->size = length;
2785
2786         return 0;
2787 }
2788
2789 static void be_sgl_destroy_contiguous(struct be_dma_mem *sgl)
2790 {
2791         memset(sgl, 0, sizeof(*sgl));
2792 }
2793
2794 static void
2795 hwi_build_be_sgl_arr(struct beiscsi_hba *phba,
2796                      struct mem_array *pmem, struct be_dma_mem *sgl)
2797 {
2798         if (sgl->va)
2799                 be_sgl_destroy_contiguous(sgl);
2800
2801         be_sgl_create_contiguous(pmem->virtual_address,
2802                                  pmem->bus_address.u.a64.address,
2803                                  pmem->size, sgl);
2804 }
2805
2806 static void
2807 hwi_build_be_sgl_by_offset(struct beiscsi_hba *phba,
2808                            struct mem_array *pmem, struct be_dma_mem *sgl)
2809 {
2810         if (sgl->va)
2811                 be_sgl_destroy_contiguous(sgl);
2812
2813         be_sgl_create_contiguous((unsigned char *)pmem->virtual_address,
2814                                  pmem->bus_address.u.a64.address,
2815                                  pmem->size, sgl);
2816 }
2817
2818 static int be_fill_queue(struct be_queue_info *q,
2819                 u16 len, u16 entry_size, void *vaddress)
2820 {
2821         struct be_dma_mem *mem = &q->dma_mem;
2822
2823         memset(q, 0, sizeof(*q));
2824         q->len = len;
2825         q->entry_size = entry_size;
2826         mem->size = len * entry_size;
2827         mem->va = vaddress;
2828         if (!mem->va)
2829                 return -ENOMEM;
2830         memset(mem->va, 0, mem->size);
2831         return 0;
2832 }
2833
2834 static int beiscsi_create_eqs(struct beiscsi_hba *phba,
2835                              struct hwi_context_memory *phwi_context)
2836 {
2837         unsigned int i, num_eq_pages;
2838         int ret = 0, eq_for_mcc;
2839         struct be_queue_info *eq;
2840         struct be_dma_mem *mem;
2841         void *eq_vaddress;
2842         dma_addr_t paddr;
2843
2844         num_eq_pages = PAGES_REQUIRED(phba->params.num_eq_entries * \
2845                                       sizeof(struct be_eq_entry));
2846
2847         if (phba->msix_enabled)
2848                 eq_for_mcc = 1;
2849         else
2850                 eq_for_mcc = 0;
2851         for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
2852                 eq = &phwi_context->be_eq[i].q;
2853                 mem = &eq->dma_mem;
2854                 phwi_context->be_eq[i].phba = phba;
2855                 eq_vaddress = pci_alloc_consistent(phba->pcidev,
2856                                                      num_eq_pages * PAGE_SIZE,
2857                                                      &paddr);
2858                 if (!eq_vaddress)
2859                         goto create_eq_error;
2860
2861                 mem->va = eq_vaddress;
2862                 ret = be_fill_queue(eq, phba->params.num_eq_entries,
2863                                     sizeof(struct be_eq_entry), eq_vaddress);
2864                 if (ret) {
2865                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2866                                     "BM_%d : be_fill_queue Failed for EQ\n");
2867                         goto create_eq_error;
2868                 }
2869
2870                 mem->dma = paddr;
2871                 ret = beiscsi_cmd_eq_create(&phba->ctrl, eq,
2872                                             phwi_context->cur_eqd);
2873                 if (ret) {
2874                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2875                                     "BM_%d : beiscsi_cmd_eq_create"
2876                                     "Failed for EQ\n");
2877                         goto create_eq_error;
2878                 }
2879
2880                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2881                             "BM_%d : eqid = %d\n",
2882                             phwi_context->be_eq[i].q.id);
2883         }
2884         return 0;
2885 create_eq_error:
2886         for (i = 0; i < (phba->num_cpus + 1); i++) {
2887                 eq = &phwi_context->be_eq[i].q;
2888                 mem = &eq->dma_mem;
2889                 if (mem->va)
2890                         pci_free_consistent(phba->pcidev, num_eq_pages
2891                                             * PAGE_SIZE,
2892                                             mem->va, mem->dma);
2893         }
2894         return ret;
2895 }
2896
2897 static int beiscsi_create_cqs(struct beiscsi_hba *phba,
2898                              struct hwi_context_memory *phwi_context)
2899 {
2900         unsigned int i, num_cq_pages;
2901         int ret = 0;
2902         struct be_queue_info *cq, *eq;
2903         struct be_dma_mem *mem;
2904         struct be_eq_obj *pbe_eq;
2905         void *cq_vaddress;
2906         dma_addr_t paddr;
2907
2908         num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \
2909                                       sizeof(struct sol_cqe));
2910
2911         for (i = 0; i < phba->num_cpus; i++) {
2912                 cq = &phwi_context->be_cq[i];
2913                 eq = &phwi_context->be_eq[i].q;
2914                 pbe_eq = &phwi_context->be_eq[i];
2915                 pbe_eq->cq = cq;
2916                 pbe_eq->phba = phba;
2917                 mem = &cq->dma_mem;
2918                 cq_vaddress = pci_alloc_consistent(phba->pcidev,
2919                                                      num_cq_pages * PAGE_SIZE,
2920                                                      &paddr);
2921                 if (!cq_vaddress)
2922                         goto create_cq_error;
2923                 ret = be_fill_queue(cq, phba->params.num_cq_entries,
2924                                     sizeof(struct sol_cqe), cq_vaddress);
2925                 if (ret) {
2926                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2927                                     "BM_%d : be_fill_queue Failed "
2928                                     "for ISCSI CQ\n");
2929                         goto create_cq_error;
2930                 }
2931
2932                 mem->dma = paddr;
2933                 ret = beiscsi_cmd_cq_create(&phba->ctrl, cq, eq, false,
2934                                             false, 0);
2935                 if (ret) {
2936                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2937                                     "BM_%d : beiscsi_cmd_eq_create"
2938                                     "Failed for ISCSI CQ\n");
2939                         goto create_cq_error;
2940                 }
2941                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2942                             "BM_%d : iscsi cq_id is %d for eq_id %d\n"
2943                             "iSCSI CQ CREATED\n", cq->id, eq->id);
2944         }
2945         return 0;
2946
2947 create_cq_error:
2948         for (i = 0; i < phba->num_cpus; i++) {
2949                 cq = &phwi_context->be_cq[i];
2950                 mem = &cq->dma_mem;
2951                 if (mem->va)
2952                         pci_free_consistent(phba->pcidev, num_cq_pages
2953                                             * PAGE_SIZE,
2954                                             mem->va, mem->dma);
2955         }
2956         return ret;
2957
2958 }
2959
2960 static int
2961 beiscsi_create_def_hdr(struct beiscsi_hba *phba,
2962                        struct hwi_context_memory *phwi_context,
2963                        struct hwi_controller *phwi_ctrlr,
2964                        unsigned int def_pdu_ring_sz)
2965 {
2966         unsigned int idx;
2967         int ret;
2968         struct be_queue_info *dq, *cq;
2969         struct be_dma_mem *mem;
2970         struct be_mem_descriptor *mem_descr;
2971         void *dq_vaddress;
2972
2973         idx = 0;
2974         dq = &phwi_context->be_def_hdrq;
2975         cq = &phwi_context->be_cq[0];
2976         mem = &dq->dma_mem;
2977         mem_descr = phba->init_mem;
2978         mem_descr += HWI_MEM_ASYNC_HEADER_RING;
2979         dq_vaddress = mem_descr->mem_array[idx].virtual_address;
2980         ret = be_fill_queue(dq, mem_descr->mem_array[0].size /
2981                             sizeof(struct phys_addr),
2982                             sizeof(struct phys_addr), dq_vaddress);
2983         if (ret) {
2984                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2985                             "BM_%d : be_fill_queue Failed for DEF PDU HDR\n");
2986                 return ret;
2987         }
2988         mem->dma = (unsigned long)mem_descr->mem_array[idx].
2989                                   bus_address.u.a64.address;
2990         ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dq,
2991                                               def_pdu_ring_sz,
2992                                               phba->params.defpdu_hdr_sz);
2993         if (ret) {
2994                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2995                             "BM_%d : be_cmd_create_default_pdu_queue Failed DEFHDR\n");
2996                 return ret;
2997         }
2998         phwi_ctrlr->default_pdu_hdr.id = phwi_context->be_def_hdrq.id;
2999         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3000                     "BM_%d : iscsi def pdu id is %d\n",
3001                     phwi_context->be_def_hdrq.id);
3002
3003         hwi_post_async_buffers(phba, 1);
3004         return 0;
3005 }
3006
3007 static int
3008 beiscsi_create_def_data(struct beiscsi_hba *phba,
3009                         struct hwi_context_memory *phwi_context,
3010                         struct hwi_controller *phwi_ctrlr,
3011                         unsigned int def_pdu_ring_sz)
3012 {
3013         unsigned int idx;
3014         int ret;
3015         struct be_queue_info *dataq, *cq;
3016         struct be_dma_mem *mem;
3017         struct be_mem_descriptor *mem_descr;
3018         void *dq_vaddress;
3019
3020         idx = 0;
3021         dataq = &phwi_context->be_def_dataq;
3022         cq = &phwi_context->be_cq[0];
3023         mem = &dataq->dma_mem;
3024         mem_descr = phba->init_mem;
3025         mem_descr += HWI_MEM_ASYNC_DATA_RING;
3026         dq_vaddress = mem_descr->mem_array[idx].virtual_address;
3027         ret = be_fill_queue(dataq, mem_descr->mem_array[0].size /
3028                             sizeof(struct phys_addr),
3029                             sizeof(struct phys_addr), dq_vaddress);
3030         if (ret) {
3031                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3032                             "BM_%d : be_fill_queue Failed for DEF PDU DATA\n");
3033                 return ret;
3034         }
3035         mem->dma = (unsigned long)mem_descr->mem_array[idx].
3036                                   bus_address.u.a64.address;
3037         ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dataq,
3038                                               def_pdu_ring_sz,
3039                                               phba->params.defpdu_data_sz);
3040         if (ret) {
3041                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3042                             "BM_%d be_cmd_create_default_pdu_queue"
3043                             " Failed for DEF PDU DATA\n");
3044                 return ret;
3045         }
3046         phwi_ctrlr->default_pdu_data.id = phwi_context->be_def_dataq.id;
3047         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3048                     "BM_%d : iscsi def data id is %d\n",
3049                     phwi_context->be_def_dataq.id);
3050
3051         hwi_post_async_buffers(phba, 0);
3052         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3053                     "BM_%d : DEFAULT PDU DATA RING CREATED\n");
3054
3055         return 0;
3056 }
3057
3058 static int
3059 beiscsi_post_pages(struct beiscsi_hba *phba)
3060 {
3061         struct be_mem_descriptor *mem_descr;
3062         struct mem_array *pm_arr;
3063         unsigned int page_offset, i;
3064         struct be_dma_mem sgl;
3065         int status;
3066
3067         mem_descr = phba->init_mem;
3068         mem_descr += HWI_MEM_SGE;
3069         pm_arr = mem_descr->mem_array;
3070
3071         page_offset = (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io *
3072                         phba->fw_config.iscsi_icd_start) / PAGE_SIZE;
3073         for (i = 0; i < mem_descr->num_elements; i++) {
3074                 hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
3075                 status = be_cmd_iscsi_post_sgl_pages(&phba->ctrl, &sgl,
3076                                                 page_offset,
3077                                                 (pm_arr->size / PAGE_SIZE));
3078                 page_offset += pm_arr->size / PAGE_SIZE;
3079                 if (status != 0) {
3080                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3081                                     "BM_%d : post sgl failed.\n");
3082                         return status;
3083                 }
3084                 pm_arr++;
3085         }
3086         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3087                     "BM_%d : POSTED PAGES\n");
3088         return 0;
3089 }
3090
3091 static void be_queue_free(struct beiscsi_hba *phba, struct be_queue_info *q)
3092 {
3093         struct be_dma_mem *mem = &q->dma_mem;
3094         if (mem->va) {
3095                 pci_free_consistent(phba->pcidev, mem->size,
3096                         mem->va, mem->dma);
3097                 mem->va = NULL;
3098         }
3099 }
3100
3101 static int be_queue_alloc(struct beiscsi_hba *phba, struct be_queue_info *q,
3102                 u16 len, u16 entry_size)
3103 {
3104         struct be_dma_mem *mem = &q->dma_mem;
3105
3106         memset(q, 0, sizeof(*q));
3107         q->len = len;
3108         q->entry_size = entry_size;
3109         mem->size = len * entry_size;
3110         mem->va = pci_alloc_consistent(phba->pcidev, mem->size, &mem->dma);
3111         if (!mem->va)
3112                 return -ENOMEM;
3113         memset(mem->va, 0, mem->size);
3114         return 0;
3115 }
3116
3117 static int
3118 beiscsi_create_wrb_rings(struct beiscsi_hba *phba,
3119                          struct hwi_context_memory *phwi_context,
3120                          struct hwi_controller *phwi_ctrlr)
3121 {
3122         unsigned int wrb_mem_index, offset, size, num_wrb_rings;
3123         u64 pa_addr_lo;
3124         unsigned int idx, num, i;
3125         struct mem_array *pwrb_arr;
3126         void *wrb_vaddr;
3127         struct be_dma_mem sgl;
3128         struct be_mem_descriptor *mem_descr;
3129         int status;
3130
3131         idx = 0;
3132         mem_descr = phba->init_mem;
3133         mem_descr += HWI_MEM_WRB;
3134         pwrb_arr = kmalloc(sizeof(*pwrb_arr) * phba->params.cxns_per_ctrl,
3135                            GFP_KERNEL);
3136         if (!pwrb_arr) {
3137                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3138                             "BM_%d : Memory alloc failed in create wrb ring.\n");
3139                 return -ENOMEM;
3140         }
3141         wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
3142         pa_addr_lo = mem_descr->mem_array[idx].bus_address.u.a64.address;
3143         num_wrb_rings = mem_descr->mem_array[idx].size /
3144                 (phba->params.wrbs_per_cxn * sizeof(struct iscsi_wrb));
3145
3146         for (num = 0; num < phba->params.cxns_per_ctrl; num++) {
3147                 if (num_wrb_rings) {
3148                         pwrb_arr[num].virtual_address = wrb_vaddr;
3149                         pwrb_arr[num].bus_address.u.a64.address = pa_addr_lo;
3150                         pwrb_arr[num].size = phba->params.wrbs_per_cxn *
3151                                             sizeof(struct iscsi_wrb);
3152                         wrb_vaddr += pwrb_arr[num].size;
3153                         pa_addr_lo += pwrb_arr[num].size;
3154                         num_wrb_rings--;
3155                 } else {
3156                         idx++;
3157                         wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
3158                         pa_addr_lo = mem_descr->mem_array[idx].\
3159                                         bus_address.u.a64.address;
3160                         num_wrb_rings = mem_descr->mem_array[idx].size /
3161                                         (phba->params.wrbs_per_cxn *
3162                                         sizeof(struct iscsi_wrb));
3163                         pwrb_arr[num].virtual_address = wrb_vaddr;
3164                         pwrb_arr[num].bus_address.u.a64.address\
3165                                                 = pa_addr_lo;
3166                         pwrb_arr[num].size = phba->params.wrbs_per_cxn *
3167                                                  sizeof(struct iscsi_wrb);
3168                         wrb_vaddr += pwrb_arr[num].size;
3169                         pa_addr_lo   += pwrb_arr[num].size;
3170                         num_wrb_rings--;
3171                 }
3172         }
3173         for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
3174                 wrb_mem_index = 0;
3175                 offset = 0;
3176                 size = 0;
3177
3178                 hwi_build_be_sgl_by_offset(phba, &pwrb_arr[i], &sgl);
3179                 status = be_cmd_wrbq_create(&phba->ctrl, &sgl,
3180                                             &phwi_context->be_wrbq[i]);
3181                 if (status != 0) {
3182                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3183                                     "BM_%d : wrbq create failed.");
3184                         kfree(pwrb_arr);
3185                         return status;
3186                 }
3187                 phwi_ctrlr->wrb_context[i * 2].cid = phwi_context->be_wrbq[i].
3188                                                                    id;
3189         }
3190         kfree(pwrb_arr);
3191         return 0;
3192 }
3193
3194 static void free_wrb_handles(struct beiscsi_hba *phba)
3195 {
3196         unsigned int index;
3197         struct hwi_controller *phwi_ctrlr;
3198         struct hwi_wrb_context *pwrb_context;
3199
3200         phwi_ctrlr = phba->phwi_ctrlr;
3201         for (index = 0; index < phba->params.cxns_per_ctrl * 2; index += 2) {
3202                 pwrb_context = &phwi_ctrlr->wrb_context[index];
3203                 kfree(pwrb_context->pwrb_handle_base);
3204                 kfree(pwrb_context->pwrb_handle_basestd);
3205         }
3206 }
3207
3208 static void be_mcc_queues_destroy(struct beiscsi_hba *phba)
3209 {
3210         struct be_queue_info *q;
3211         struct be_ctrl_info *ctrl = &phba->ctrl;
3212
3213         q = &phba->ctrl.mcc_obj.q;
3214         if (q->created)
3215                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_MCCQ);
3216         be_queue_free(phba, q);
3217
3218         q = &phba->ctrl.mcc_obj.cq;
3219         if (q->created)
3220                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
3221         be_queue_free(phba, q);
3222 }
3223
3224 static void hwi_cleanup(struct beiscsi_hba *phba)
3225 {
3226         struct be_queue_info *q;
3227         struct be_ctrl_info *ctrl = &phba->ctrl;
3228         struct hwi_controller *phwi_ctrlr;
3229         struct hwi_context_memory *phwi_context;
3230         int i, eq_num;
3231
3232         phwi_ctrlr = phba->phwi_ctrlr;
3233         phwi_context = phwi_ctrlr->phwi_ctxt;
3234         for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
3235                 q = &phwi_context->be_wrbq[i];
3236                 if (q->created)
3237                         beiscsi_cmd_q_destroy(ctrl, q, QTYPE_WRBQ);
3238         }
3239         free_wrb_handles(phba);
3240
3241         q = &phwi_context->be_def_hdrq;
3242         if (q->created)
3243                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);
3244
3245         q = &phwi_context->be_def_dataq;
3246         if (q->created)
3247                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);
3248
3249         beiscsi_cmd_q_destroy(ctrl, NULL, QTYPE_SGL);
3250
3251         for (i = 0; i < (phba->num_cpus); i++) {
3252                 q = &phwi_context->be_cq[i];
3253                 if (q->created)
3254                         beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
3255         }
3256         if (phba->msix_enabled)
3257                 eq_num = 1;
3258         else
3259                 eq_num = 0;
3260         for (i = 0; i < (phba->num_cpus + eq_num); i++) {
3261                 q = &phwi_context->be_eq[i].q;
3262                 if (q->created)
3263                         beiscsi_cmd_q_destroy(ctrl, q, QTYPE_EQ);
3264         }
3265         be_mcc_queues_destroy(phba);
3266 }
3267
3268 static int be_mcc_queues_create(struct beiscsi_hba *phba,
3269                                 struct hwi_context_memory *phwi_context)
3270 {
3271         struct be_queue_info *q, *cq;
3272         struct be_ctrl_info *ctrl = &phba->ctrl;
3273
3274         /* Alloc MCC compl queue */
3275         cq = &phba->ctrl.mcc_obj.cq;
3276         if (be_queue_alloc(phba, cq, MCC_CQ_LEN,
3277                         sizeof(struct be_mcc_compl)))
3278                 goto err;
3279         /* Ask BE to create MCC compl queue; */
3280         if (phba->msix_enabled) {
3281                 if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq
3282                                          [phba->num_cpus].q, false, true, 0))
3283                 goto mcc_cq_free;
3284         } else {
3285                 if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq[0].q,
3286                                           false, true, 0))
3287                 goto mcc_cq_free;
3288         }
3289
3290         /* Alloc MCC queue */
3291         q = &phba->ctrl.mcc_obj.q;
3292         if (be_queue_alloc(phba, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
3293                 goto mcc_cq_destroy;
3294
3295         /* Ask BE to create MCC queue */
3296         if (beiscsi_cmd_mccq_create(phba, q, cq))
3297                 goto mcc_q_free;
3298
3299         return 0;
3300
3301 mcc_q_free:
3302         be_queue_free(phba, q);
3303 mcc_cq_destroy:
3304         beiscsi_cmd_q_destroy(ctrl, cq, QTYPE_CQ);
3305 mcc_cq_free:
3306         be_queue_free(phba, cq);
3307 err:
3308         return -ENOMEM;
3309 }
3310
3311 static int find_num_cpus(void)
3312 {
3313         int  num_cpus = 0;
3314
3315         num_cpus = num_online_cpus();
3316         if (num_cpus >= MAX_CPUS)
3317                 num_cpus = MAX_CPUS - 1;
3318
3319         return num_cpus;
3320 }
3321
3322 static int hwi_init_port(struct beiscsi_hba *phba)
3323 {
3324         struct hwi_controller *phwi_ctrlr;
3325         struct hwi_context_memory *phwi_context;
3326         unsigned int def_pdu_ring_sz;
3327         struct be_ctrl_info *ctrl = &phba->ctrl;
3328         int status;
3329
3330         def_pdu_ring_sz =
3331                 phba->params.asyncpdus_per_ctrl * sizeof(struct phys_addr);
3332         phwi_ctrlr = phba->phwi_ctrlr;
3333         phwi_context = phwi_ctrlr->phwi_ctxt;
3334         phwi_context->max_eqd = 0;
3335         phwi_context->min_eqd = 0;
3336         phwi_context->cur_eqd = 64;
3337         be_cmd_fw_initialize(&phba->ctrl);
3338
3339         status = beiscsi_create_eqs(phba, phwi_context);
3340         if (status != 0) {
3341                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3342                             "BM_%d : EQ not created\n");
3343                 goto error;
3344         }
3345
3346         status = be_mcc_queues_create(phba, phwi_context);
3347         if (status != 0)
3348                 goto error;
3349
3350         status = mgmt_check_supported_fw(ctrl, phba);
3351         if (status != 0) {
3352                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3353                             "BM_%d : Unsupported fw version\n");
3354                 goto error;
3355         }
3356
3357         status = beiscsi_create_cqs(phba, phwi_context);
3358         if (status != 0) {
3359                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3360                             "BM_%d : CQ not created\n");
3361                 goto error;
3362         }
3363
3364         status = beiscsi_create_def_hdr(phba, phwi_context, phwi_ctrlr,
3365                                         def_pdu_ring_sz);
3366         if (status != 0) {
3367                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3368                             "BM_%d : Default Header not created\n");
3369                 goto error;
3370         }
3371
3372         status = beiscsi_create_def_data(phba, phwi_context,
3373                                          phwi_ctrlr, def_pdu_ring_sz);
3374         if (status != 0) {
3375                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3376                             "BM_%d : Default Data not created\n");
3377                 goto error;
3378         }
3379
3380         status = beiscsi_post_pages(phba);
3381         if (status != 0) {
3382                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3383                             "BM_%d : Post SGL Pages Failed\n");
3384                 goto error;
3385         }
3386
3387         status = beiscsi_create_wrb_rings(phba, phwi_context, phwi_ctrlr);
3388         if (status != 0) {
3389                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3390                             "BM_%d : WRB Rings not created\n");
3391                 goto error;
3392         }
3393
3394         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3395                     "BM_%d : hwi_init_port success\n");
3396         return 0;
3397
3398 error:
3399         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3400                     "BM_%d : hwi_init_port failed");
3401         hwi_cleanup(phba);
3402         return status;
3403 }
3404
3405 static int hwi_init_controller(struct beiscsi_hba *phba)
3406 {
3407         struct hwi_controller *phwi_ctrlr;
3408
3409         phwi_ctrlr = phba->phwi_ctrlr;
3410         if (1 == phba->init_mem[HWI_MEM_ADDN_CONTEXT].num_elements) {
3411                 phwi_ctrlr->phwi_ctxt = (struct hwi_context_memory *)phba->
3412                     init_mem[HWI_MEM_ADDN_CONTEXT].mem_array[0].virtual_address;
3413                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3414                             "BM_%d :  phwi_ctrlr->phwi_ctxt=%p\n",
3415                             phwi_ctrlr->phwi_ctxt);
3416         } else {
3417                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3418                             "BM_%d : HWI_MEM_ADDN_CONTEXT is more "
3419                             "than one element.Failing to load\n");
3420                 return -ENOMEM;
3421         }
3422
3423         iscsi_init_global_templates(phba);
3424         if (beiscsi_init_wrb_handle(phba))
3425                 return -ENOMEM;
3426
3427         hwi_init_async_pdu_ctx(phba);
3428         if (hwi_init_port(phba) != 0) {
3429                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3430                             "BM_%d : hwi_init_controller failed\n");
3431
3432                 return -ENOMEM;
3433         }
3434         return 0;
3435 }
3436
3437 static void beiscsi_free_mem(struct beiscsi_hba *phba)
3438 {
3439         struct be_mem_descriptor *mem_descr;
3440         int i, j;
3441
3442         mem_descr = phba->init_mem;
3443         i = 0;
3444         j = 0;
3445         for (i = 0; i < SE_MEM_MAX; i++) {
3446                 for (j = mem_descr->num_elements; j > 0; j--) {
3447                         pci_free_consistent(phba->pcidev,
3448                           mem_descr->mem_array[j - 1].size,
3449                           mem_descr->mem_array[j - 1].virtual_address,
3450                           (unsigned long)mem_descr->mem_array[j - 1].
3451                           bus_address.u.a64.address);
3452                 }
3453                 kfree(mem_descr->mem_array);
3454                 mem_descr++;
3455         }
3456         kfree(phba->init_mem);
3457         kfree(phba->phwi_ctrlr);
3458 }
3459
3460 static int beiscsi_init_controller(struct beiscsi_hba *phba)
3461 {
3462         int ret = -ENOMEM;
3463
3464         ret = beiscsi_get_memory(phba);
3465         if (ret < 0) {
3466                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3467                             "BM_%d : beiscsi_dev_probe -"
3468                             "Failed in beiscsi_alloc_memory\n");
3469                 return ret;
3470         }
3471
3472         ret = hwi_init_controller(phba);
3473         if (ret)
3474                 goto free_init;
3475         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3476                     "BM_%d : Return success from beiscsi_init_controller");
3477
3478         return 0;
3479
3480 free_init:
3481         beiscsi_free_mem(phba);
3482         return ret;
3483 }
3484
3485 static int beiscsi_init_sgl_handle(struct beiscsi_hba *phba)
3486 {
3487         struct be_mem_descriptor *mem_descr_sglh, *mem_descr_sg;
3488         struct sgl_handle *psgl_handle;
3489         struct iscsi_sge *pfrag;
3490         unsigned int arr_index, i, idx;
3491
3492         phba->io_sgl_hndl_avbl = 0;
3493         phba->eh_sgl_hndl_avbl = 0;
3494
3495         mem_descr_sglh = phba->init_mem;
3496         mem_descr_sglh += HWI_MEM_SGLH;
3497         if (1 == mem_descr_sglh->num_elements) {
3498                 phba->io_sgl_hndl_base = kzalloc(sizeof(struct sgl_handle *) *
3499                                                  phba->params.ios_per_ctrl,
3500                                                  GFP_KERNEL);
3501                 if (!phba->io_sgl_hndl_base) {
3502                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3503                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
3504                         return -ENOMEM;
3505                 }
3506                 phba->eh_sgl_hndl_base = kzalloc(sizeof(struct sgl_handle *) *
3507                                                  (phba->params.icds_per_ctrl -
3508                                                  phba->params.ios_per_ctrl),
3509                                                  GFP_KERNEL);
3510                 if (!phba->eh_sgl_hndl_base) {
3511                         kfree(phba->io_sgl_hndl_base);
3512                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3513                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
3514                         return -ENOMEM;
3515                 }
3516         } else {
3517                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3518                             "BM_%d : HWI_MEM_SGLH is more than one element."
3519                             "Failing to load\n");
3520                 return -ENOMEM;
3521         }
3522
3523         arr_index = 0;
3524         idx = 0;
3525         while (idx < mem_descr_sglh->num_elements) {
3526                 psgl_handle = mem_descr_sglh->mem_array[idx].virtual_address;
3527
3528                 for (i = 0; i < (mem_descr_sglh->mem_array[idx].size /
3529                       sizeof(struct sgl_handle)); i++) {
3530                         if (arr_index < phba->params.ios_per_ctrl) {
3531                                 phba->io_sgl_hndl_base[arr_index] = psgl_handle;
3532                                 phba->io_sgl_hndl_avbl++;
3533                                 arr_index++;
3534                         } else {
3535                                 phba->eh_sgl_hndl_base[arr_index -
3536                                         phba->params.ios_per_ctrl] =
3537                                                                 psgl_handle;
3538                                 arr_index++;
3539                                 phba->eh_sgl_hndl_avbl++;
3540                         }
3541                         psgl_handle++;
3542                 }
3543                 idx++;
3544         }
3545         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3546                     "BM_%d : phba->io_sgl_hndl_avbl=%d"
3547                     "phba->eh_sgl_hndl_avbl=%d\n",
3548                     phba->io_sgl_hndl_avbl,
3549                     phba->eh_sgl_hndl_avbl);
3550
3551         mem_descr_sg = phba->init_mem;
3552         mem_descr_sg += HWI_MEM_SGE;
3553         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3554                     "\n BM_%d : mem_descr_sg->num_elements=%d\n",
3555                     mem_descr_sg->num_elements);
3556
3557         arr_index = 0;
3558         idx = 0;
3559         while (idx < mem_descr_sg->num_elements) {
3560                 pfrag = mem_descr_sg->mem_array[idx].virtual_address;
3561
3562                 for (i = 0;
3563                      i < (mem_descr_sg->mem_array[idx].size) /
3564                      (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io);
3565                      i++) {
3566                         if (arr_index < phba->params.ios_per_ctrl)
3567                                 psgl_handle = phba->io_sgl_hndl_base[arr_index];
3568                         else
3569                                 psgl_handle = phba->eh_sgl_hndl_base[arr_index -
3570                                                 phba->params.ios_per_ctrl];
3571                         psgl_handle->pfrag = pfrag;
3572                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, pfrag, 0);
3573                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, pfrag, 0);
3574                         pfrag += phba->params.num_sge_per_io;
3575                         psgl_handle->sgl_index =
3576                                 phba->fw_config.iscsi_icd_start + arr_index++;
3577                 }
3578                 idx++;
3579         }
3580         phba->io_sgl_free_index = 0;
3581         phba->io_sgl_alloc_index = 0;
3582         phba->eh_sgl_free_index = 0;
3583         phba->eh_sgl_alloc_index = 0;
3584         return 0;
3585 }
3586
3587 static int hba_setup_cid_tbls(struct beiscsi_hba *phba)
3588 {
3589         int i, new_cid;
3590
3591         phba->cid_array = kzalloc(sizeof(void *) * phba->params.cxns_per_ctrl,
3592                                   GFP_KERNEL);
3593         if (!phba->cid_array) {
3594                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3595                             "BM_%d : Failed to allocate memory in "
3596                             "hba_setup_cid_tbls\n");
3597                 return -ENOMEM;
3598         }
3599         phba->ep_array = kzalloc(sizeof(struct iscsi_endpoint *) *
3600                                  phba->params.cxns_per_ctrl * 2, GFP_KERNEL);
3601         if (!phba->ep_array) {
3602                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3603                             "BM_%d : Failed to allocate memory in "
3604                             "hba_setup_cid_tbls\n");
3605                 kfree(phba->cid_array);
3606                 return -ENOMEM;
3607         }
3608         new_cid = phba->fw_config.iscsi_cid_start;
3609         for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
3610                 phba->cid_array[i] = new_cid;
3611                 new_cid += 2;
3612         }
3613         phba->avlbl_cids = phba->params.cxns_per_ctrl;
3614         return 0;
3615 }
3616
3617 static void hwi_enable_intr(struct beiscsi_hba *phba)
3618 {
3619         struct be_ctrl_info *ctrl = &phba->ctrl;
3620         struct hwi_controller *phwi_ctrlr;
3621         struct hwi_context_memory *phwi_context;
3622         struct be_queue_info *eq;
3623         u8 __iomem *addr;
3624         u32 reg, i;
3625         u32 enabled;
3626
3627         phwi_ctrlr = phba->phwi_ctrlr;
3628         phwi_context = phwi_ctrlr->phwi_ctxt;
3629
3630         addr = (u8 __iomem *) ((u8 __iomem *) ctrl->pcicfg +
3631                         PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET);
3632         reg = ioread32(addr);
3633
3634         enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
3635         if (!enabled) {
3636                 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
3637                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3638                             "BM_%d : reg =x%08x addr=%p\n", reg, addr);
3639                 iowrite32(reg, addr);
3640         }
3641
3642         if (!phba->msix_enabled) {
3643                 eq = &phwi_context->be_eq[0].q;
3644                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3645                             "BM_%d : eq->id=%d\n", eq->id);
3646
3647                 hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
3648         } else {
3649                 for (i = 0; i <= phba->num_cpus; i++) {
3650                         eq = &phwi_context->be_eq[i].q;
3651                         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3652                                     "BM_%d : eq->id=%d\n", eq->id);
3653                         hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
3654                 }
3655         }
3656 }
3657
3658 static void hwi_disable_intr(struct beiscsi_hba *phba)
3659 {
3660         struct be_ctrl_info *ctrl = &phba->ctrl;
3661
3662         u8 __iomem *addr = ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
3663         u32 reg = ioread32(addr);
3664
3665         u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
3666         if (enabled) {
3667                 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
3668                 iowrite32(reg, addr);
3669         } else
3670                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
3671                             "BM_%d : In hwi_disable_intr, Already Disabled\n");
3672 }
3673
3674 /**
3675  * beiscsi_get_boot_info()- Get the boot session info
3676  * @phba: The device priv structure instance
3677  *
3678  * Get the boot target info and store in driver priv structure
3679  *
3680  * return values
3681  *      Success: 0
3682  *      Failure: Non-Zero Value
3683  **/
3684 static int beiscsi_get_boot_info(struct beiscsi_hba *phba)
3685 {
3686         struct be_cmd_get_session_resp *session_resp;
3687         struct be_mcc_wrb *wrb;
3688         struct be_dma_mem nonemb_cmd;
3689         unsigned int tag, wrb_num;
3690         unsigned short status, extd_status;
3691         unsigned int s_handle;
3692         struct be_queue_info *mccq = &phba->ctrl.mcc_obj.q;
3693         int ret = -ENOMEM;
3694
3695         /* Get the session handle of the boot target */
3696         ret = be_mgmt_get_boot_shandle(phba, &s_handle);
3697         if (ret) {
3698                 beiscsi_log(phba, KERN_ERR,
3699                             BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
3700                             "BM_%d : No boot session\n");
3701                 return ret;
3702         }
3703         nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
3704                                 sizeof(*session_resp),
3705                                 &nonemb_cmd.dma);
3706         if (nonemb_cmd.va == NULL) {
3707                 beiscsi_log(phba, KERN_ERR,
3708                             BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
3709                             "BM_%d : Failed to allocate memory for"
3710                             "beiscsi_get_session_info\n");
3711
3712                 return -ENOMEM;
3713         }
3714
3715         memset(nonemb_cmd.va, 0, sizeof(*session_resp));
3716         tag = mgmt_get_session_info(phba, s_handle,
3717                                     &nonemb_cmd);
3718         if (!tag) {
3719                 beiscsi_log(phba, KERN_ERR,
3720                             BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
3721                             "BM_%d : beiscsi_get_session_info"
3722                             " Failed\n");
3723
3724                 goto boot_freemem;
3725         } else
3726                 wait_event_interruptible(phba->ctrl.mcc_wait[tag],
3727                                          phba->ctrl.mcc_numtag[tag]);
3728
3729         wrb_num = (phba->ctrl.mcc_numtag[tag] & 0x00FF0000) >> 16;
3730         extd_status = (phba->ctrl.mcc_numtag[tag] & 0x0000FF00) >> 8;
3731         status = phba->ctrl.mcc_numtag[tag] & 0x000000FF;
3732         if (status || extd_status) {
3733                 beiscsi_log(phba, KERN_ERR,
3734                             BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
3735                             "BM_%d : beiscsi_get_session_info Failed"
3736                             " status = %d extd_status = %d\n",
3737                             status, extd_status);
3738
3739                 free_mcc_tag(&phba->ctrl, tag);
3740                 goto boot_freemem;
3741         }
3742         wrb = queue_get_wrb(mccq, wrb_num);
3743         free_mcc_tag(&phba->ctrl, tag);
3744         session_resp = nonemb_cmd.va ;
3745
3746         memcpy(&phba->boot_sess, &session_resp->session_info,
3747                sizeof(struct mgmt_session_info));
3748         ret = 0;
3749
3750 boot_freemem:
3751         pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
3752                     nonemb_cmd.va, nonemb_cmd.dma);
3753         return ret;
3754 }
3755
3756 static void beiscsi_boot_release(void *data)
3757 {
3758         struct beiscsi_hba *phba = data;
3759
3760         scsi_host_put(phba->shost);
3761 }
3762
3763 static int beiscsi_setup_boot_info(struct beiscsi_hba *phba)
3764 {
3765         struct iscsi_boot_kobj *boot_kobj;
3766
3767         /* get boot info using mgmt cmd */
3768         if (beiscsi_get_boot_info(phba))
3769                 /* Try to see if we can carry on without this */
3770                 return 0;
3771
3772         phba->boot_kset = iscsi_boot_create_host_kset(phba->shost->host_no);
3773         if (!phba->boot_kset)
3774                 return -ENOMEM;
3775
3776         /* get a ref because the show function will ref the phba */
3777         if (!scsi_host_get(phba->shost))
3778                 goto free_kset;
3779         boot_kobj = iscsi_boot_create_target(phba->boot_kset, 0, phba,
3780                                              beiscsi_show_boot_tgt_info,
3781                                              beiscsi_tgt_get_attr_visibility,
3782                                              beiscsi_boot_release);
3783         if (!boot_kobj)
3784                 goto put_shost;
3785
3786         if (!scsi_host_get(phba->shost))
3787                 goto free_kset;
3788         boot_kobj = iscsi_boot_create_initiator(phba->boot_kset, 0, phba,
3789                                                 beiscsi_show_boot_ini_info,
3790                                                 beiscsi_ini_get_attr_visibility,
3791                                                 beiscsi_boot_release);
3792         if (!boot_kobj)
3793                 goto put_shost;
3794
3795         if (!scsi_host_get(phba->shost))
3796                 goto free_kset;
3797         boot_kobj = iscsi_boot_create_ethernet(phba->boot_kset, 0, phba,
3798                                                beiscsi_show_boot_eth_info,
3799                                                beiscsi_eth_get_attr_visibility,
3800                                                beiscsi_boot_release);
3801         if (!boot_kobj)
3802                 goto put_shost;
3803         return 0;
3804
3805 put_shost:
3806         scsi_host_put(phba->shost);
3807 free_kset:
3808         iscsi_boot_destroy_kset(phba->boot_kset);
3809         return -ENOMEM;
3810 }
3811
3812 static int beiscsi_init_port(struct beiscsi_hba *phba)
3813 {
3814         int ret;
3815
3816         ret = beiscsi_init_controller(phba);
3817         if (ret < 0) {
3818                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3819                             "BM_%d : beiscsi_dev_probe - Failed in"
3820                             "beiscsi_init_controller\n");
3821                 return ret;
3822         }
3823         ret = beiscsi_init_sgl_handle(phba);
3824         if (ret < 0) {
3825                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3826                             "BM_%d : beiscsi_dev_probe - Failed in"
3827                             "beiscsi_init_sgl_handle\n");
3828                 goto do_cleanup_ctrlr;
3829         }
3830
3831         if (hba_setup_cid_tbls(phba)) {
3832                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3833                             "BM_%d : Failed in hba_setup_cid_tbls\n");
3834                 kfree(phba->io_sgl_hndl_base);
3835                 kfree(phba->eh_sgl_hndl_base);
3836                 goto do_cleanup_ctrlr;
3837         }
3838
3839         return ret;
3840
3841 do_cleanup_ctrlr:
3842         hwi_cleanup(phba);
3843         return ret;
3844 }
3845
3846 static void hwi_purge_eq(struct beiscsi_hba *phba)
3847 {
3848         struct hwi_controller *phwi_ctrlr;
3849         struct hwi_context_memory *phwi_context;
3850         struct be_queue_info *eq;
3851         struct be_eq_entry *eqe = NULL;
3852         int i, eq_msix;
3853         unsigned int num_processed;
3854
3855         phwi_ctrlr = phba->phwi_ctrlr;
3856         phwi_context = phwi_ctrlr->phwi_ctxt;
3857         if (phba->msix_enabled)
3858                 eq_msix = 1;
3859         else
3860                 eq_msix = 0;
3861
3862         for (i = 0; i < (phba->num_cpus + eq_msix); i++) {
3863                 eq = &phwi_context->be_eq[i].q;
3864                 eqe = queue_tail_node(eq);
3865                 num_processed = 0;
3866                 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
3867                                         & EQE_VALID_MASK) {
3868                         AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
3869                         queue_tail_inc(eq);
3870                         eqe = queue_tail_node(eq);
3871                         num_processed++;
3872                 }
3873
3874                 if (num_processed)
3875                         hwi_ring_eq_db(phba, eq->id, 1, num_processed, 1, 1);
3876         }
3877 }
3878
3879 static void beiscsi_clean_port(struct beiscsi_hba *phba)
3880 {
3881         int mgmt_status;
3882
3883         mgmt_status = mgmt_epfw_cleanup(phba, CMD_CONNECTION_CHUTE_0);
3884         if (mgmt_status)
3885                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
3886                             "BM_%d : mgmt_epfw_cleanup FAILED\n");
3887
3888         hwi_purge_eq(phba);
3889         hwi_cleanup(phba);
3890         kfree(phba->io_sgl_hndl_base);
3891         kfree(phba->eh_sgl_hndl_base);
3892         kfree(phba->cid_array);
3893         kfree(phba->ep_array);
3894 }
3895
3896 static void beiscsi_cleanup_task(struct iscsi_task *task)
3897 {
3898         struct beiscsi_io_task *io_task = task->dd_data;
3899         struct iscsi_conn *conn = task->conn;
3900         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
3901         struct beiscsi_hba *phba = beiscsi_conn->phba;
3902         struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
3903         struct hwi_wrb_context *pwrb_context;
3904         struct hwi_controller *phwi_ctrlr;
3905
3906         phwi_ctrlr = phba->phwi_ctrlr;
3907         pwrb_context = &phwi_ctrlr->wrb_context[beiscsi_conn->beiscsi_conn_cid
3908                         - phba->fw_config.iscsi_cid_start];
3909
3910         if (io_task->cmd_bhs) {
3911                 pci_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
3912                               io_task->bhs_pa.u.a64.address);
3913                 io_task->cmd_bhs = NULL;
3914         }
3915
3916         if (task->sc) {
3917                 if (io_task->pwrb_handle) {
3918                         free_wrb_handle(phba, pwrb_context,
3919                                         io_task->pwrb_handle);
3920                         io_task->pwrb_handle = NULL;
3921                 }
3922
3923                 if (io_task->psgl_handle) {
3924                         spin_lock(&phba->io_sgl_lock);
3925                         free_io_sgl_handle(phba, io_task->psgl_handle);
3926                         spin_unlock(&phba->io_sgl_lock);
3927                         io_task->psgl_handle = NULL;
3928                 }
3929         } else {
3930                 if (!beiscsi_conn->login_in_progress) {
3931                         if (io_task->pwrb_handle) {
3932                                 free_wrb_handle(phba, pwrb_context,
3933                                                 io_task->pwrb_handle);
3934                                 io_task->pwrb_handle = NULL;
3935                         }
3936                         if (io_task->psgl_handle) {
3937                                 spin_lock(&phba->mgmt_sgl_lock);
3938                                 free_mgmt_sgl_handle(phba,
3939                                                      io_task->psgl_handle);
3940                                 spin_unlock(&phba->mgmt_sgl_lock);
3941                                 io_task->psgl_handle = NULL;
3942                         }
3943                 }
3944         }
3945 }
3946
3947 void
3948 beiscsi_offload_connection(struct beiscsi_conn *beiscsi_conn,
3949                            struct beiscsi_offload_params *params)
3950 {
3951         struct wrb_handle *pwrb_handle;
3952         struct iscsi_target_context_update_wrb *pwrb = NULL;
3953         struct be_mem_descriptor *mem_descr;
3954         struct beiscsi_hba *phba = beiscsi_conn->phba;
3955         struct iscsi_task *task = beiscsi_conn->task;
3956         struct iscsi_session *session = task->conn->session;
3957         u32 doorbell = 0;
3958
3959         /*
3960          * We can always use 0 here because it is reserved by libiscsi for
3961          * login/startup related tasks.
3962          */
3963         beiscsi_conn->login_in_progress = 0;
3964         spin_lock_bh(&session->lock);
3965         beiscsi_cleanup_task(task);
3966         spin_unlock_bh(&session->lock);
3967
3968         pwrb_handle = alloc_wrb_handle(phba, (beiscsi_conn->beiscsi_conn_cid -
3969                                        phba->fw_config.iscsi_cid_start));
3970         pwrb = (struct iscsi_target_context_update_wrb *)pwrb_handle->pwrb;
3971         memset(pwrb, 0, sizeof(*pwrb));
3972         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb,
3973                       max_burst_length, pwrb, params->dw[offsetof
3974                       (struct amap_beiscsi_offload_params,
3975                       max_burst_length) / 32]);
3976         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb,
3977                       max_send_data_segment_length, pwrb,
3978                       params->dw[offsetof(struct amap_beiscsi_offload_params,
3979                       max_send_data_segment_length) / 32]);
3980         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb,
3981                       first_burst_length,
3982                       pwrb,
3983                       params->dw[offsetof(struct amap_beiscsi_offload_params,
3984                       first_burst_length) / 32]);
3985
3986         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, erl, pwrb,
3987                       (params->dw[offsetof(struct amap_beiscsi_offload_params,
3988                       erl) / 32] & OFFLD_PARAMS_ERL));
3989         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, dde, pwrb,
3990                       (params->dw[offsetof(struct amap_beiscsi_offload_params,
3991                       dde) / 32] & OFFLD_PARAMS_DDE) >> 2);
3992         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, hde, pwrb,
3993                       (params->dw[offsetof(struct amap_beiscsi_offload_params,
3994                       hde) / 32] & OFFLD_PARAMS_HDE) >> 3);
3995         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, ir2t, pwrb,
3996                       (params->dw[offsetof(struct amap_beiscsi_offload_params,
3997                       ir2t) / 32] & OFFLD_PARAMS_IR2T) >> 4);
3998         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, imd, pwrb,
3999                       (params->dw[offsetof(struct amap_beiscsi_offload_params,
4000                        imd) / 32] & OFFLD_PARAMS_IMD) >> 5);
4001         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, stat_sn,
4002                       pwrb,
4003                       (params->dw[offsetof(struct amap_beiscsi_offload_params,
4004                       exp_statsn) / 32] + 1));
4005         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, type, pwrb,
4006                       0x7);
4007         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, wrb_idx,
4008                       pwrb, pwrb_handle->wrb_index);
4009         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, ptr2nextwrb,
4010                       pwrb, pwrb_handle->nxt_wrb_index);
4011         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb,
4012                         session_state, pwrb, 0);
4013         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, compltonack,
4014                       pwrb, 1);
4015         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, notpredblq,
4016                       pwrb, 0);
4017         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, mode, pwrb,
4018                       0);
4019
4020         mem_descr = phba->init_mem;
4021         mem_descr += ISCSI_MEM_GLOBAL_HEADER;
4022
4023         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb,
4024                         pad_buffer_addr_hi, pwrb,
4025                       mem_descr->mem_array[0].bus_address.u.a32.address_hi);
4026         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb,
4027                         pad_buffer_addr_lo, pwrb,
4028                       mem_descr->mem_array[0].bus_address.u.a32.address_lo);
4029
4030         be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_target_context_update_wrb));
4031
4032         doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4033         doorbell |= (pwrb_handle->wrb_index & DB_DEF_PDU_WRB_INDEX_MASK)
4034                              << DB_DEF_PDU_WRB_INDEX_SHIFT;
4035         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4036
4037         iowrite32(doorbell, phba->db_va + DB_TXULP0_OFFSET);
4038 }
4039
4040 static void beiscsi_parse_pdu(struct iscsi_conn *conn, itt_t itt,
4041                               int *index, int *age)
4042 {
4043         *index = (int)itt;
4044         if (age)
4045                 *age = conn->session->age;
4046 }
4047
4048 /**
4049  * beiscsi_alloc_pdu - allocates pdu and related resources
4050  * @task: libiscsi task
4051  * @opcode: opcode of pdu for task
4052  *
4053  * This is called with the session lock held. It will allocate
4054  * the wrb and sgl if needed for the command. And it will prep
4055  * the pdu's itt. beiscsi_parse_pdu will later translate
4056  * the pdu itt to the libiscsi task itt.
4057  */
4058 static int beiscsi_alloc_pdu(struct iscsi_task *task, uint8_t opcode)
4059 {
4060         struct beiscsi_io_task *io_task = task->dd_data;
4061         struct iscsi_conn *conn = task->conn;
4062         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4063         struct beiscsi_hba *phba = beiscsi_conn->phba;
4064         struct hwi_wrb_context *pwrb_context;
4065         struct hwi_controller *phwi_ctrlr;
4066         itt_t itt;
4067         struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
4068         dma_addr_t paddr;
4069
4070         io_task->cmd_bhs = pci_pool_alloc(beiscsi_sess->bhs_pool,
4071                                           GFP_ATOMIC, &paddr);
4072         if (!io_task->cmd_bhs)
4073                 return -ENOMEM;
4074         io_task->bhs_pa.u.a64.address = paddr;
4075         io_task->libiscsi_itt = (itt_t)task->itt;
4076         io_task->conn = beiscsi_conn;
4077
4078         task->hdr = (struct iscsi_hdr *)&io_task->cmd_bhs->iscsi_hdr;
4079         task->hdr_max = sizeof(struct be_cmd_bhs);
4080         io_task->psgl_handle = NULL;
4081         io_task->pwrb_handle = NULL;
4082
4083         if (task->sc) {
4084                 spin_lock(&phba->io_sgl_lock);
4085                 io_task->psgl_handle = alloc_io_sgl_handle(phba);
4086                 spin_unlock(&phba->io_sgl_lock);
4087                 if (!io_task->psgl_handle)
4088                         goto free_hndls;
4089                 io_task->pwrb_handle = alloc_wrb_handle(phba,
4090                                         beiscsi_conn->beiscsi_conn_cid -
4091                                         phba->fw_config.iscsi_cid_start);
4092                 if (!io_task->pwrb_handle)
4093                         goto free_io_hndls;
4094         } else {
4095                 io_task->scsi_cmnd = NULL;
4096                 if ((opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGIN) {
4097                         if (!beiscsi_conn->login_in_progress) {
4098                                 spin_lock(&phba->mgmt_sgl_lock);
4099                                 io_task->psgl_handle = (struct sgl_handle *)
4100                                                 alloc_mgmt_sgl_handle(phba);
4101                                 spin_unlock(&phba->mgmt_sgl_lock);
4102                                 if (!io_task->psgl_handle)
4103                                         goto free_hndls;
4104
4105                                 beiscsi_conn->login_in_progress = 1;
4106                                 beiscsi_conn->plogin_sgl_handle =
4107                                                         io_task->psgl_handle;
4108                                 io_task->pwrb_handle =
4109                                         alloc_wrb_handle(phba,
4110                                         beiscsi_conn->beiscsi_conn_cid -
4111                                         phba->fw_config.iscsi_cid_start);
4112                                 if (!io_task->pwrb_handle)
4113                                         goto free_io_hndls;
4114                                 beiscsi_conn->plogin_wrb_handle =
4115                                                         io_task->pwrb_handle;
4116
4117                         } else {
4118                                 io_task->psgl_handle =
4119                                                 beiscsi_conn->plogin_sgl_handle;
4120                                 io_task->pwrb_handle =
4121                                                 beiscsi_conn->plogin_wrb_handle;
4122                         }
4123                         beiscsi_conn->task = task;
4124                 } else {
4125                         spin_lock(&phba->mgmt_sgl_lock);
4126                         io_task->psgl_handle = alloc_mgmt_sgl_handle(phba);
4127                         spin_unlock(&phba->mgmt_sgl_lock);
4128                         if (!io_task->psgl_handle)
4129                                 goto free_hndls;
4130                         io_task->pwrb_handle =
4131                                         alloc_wrb_handle(phba,
4132                                         beiscsi_conn->beiscsi_conn_cid -
4133                                         phba->fw_config.iscsi_cid_start);
4134                         if (!io_task->pwrb_handle)
4135                                 goto free_mgmt_hndls;
4136
4137                 }
4138         }
4139         itt = (itt_t) cpu_to_be32(((unsigned int)io_task->pwrb_handle->
4140                                  wrb_index << 16) | (unsigned int)
4141                                 (io_task->psgl_handle->sgl_index));
4142         io_task->pwrb_handle->pio_handle = task;
4143
4144         io_task->cmd_bhs->iscsi_hdr.itt = itt;
4145         return 0;
4146
4147 free_io_hndls:
4148         spin_lock(&phba->io_sgl_lock);
4149         free_io_sgl_handle(phba, io_task->psgl_handle);
4150         spin_unlock(&phba->io_sgl_lock);
4151         goto free_hndls;
4152 free_mgmt_hndls:
4153         spin_lock(&phba->mgmt_sgl_lock);
4154         free_mgmt_sgl_handle(phba, io_task->psgl_handle);
4155         spin_unlock(&phba->mgmt_sgl_lock);
4156 free_hndls:
4157         phwi_ctrlr = phba->phwi_ctrlr;
4158         pwrb_context = &phwi_ctrlr->wrb_context[
4159                         beiscsi_conn->beiscsi_conn_cid -
4160                         phba->fw_config.iscsi_cid_start];
4161         if (io_task->pwrb_handle)
4162                 free_wrb_handle(phba, pwrb_context, io_task->pwrb_handle);
4163         io_task->pwrb_handle = NULL;
4164         pci_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
4165                       io_task->bhs_pa.u.a64.address);
4166         io_task->cmd_bhs = NULL;
4167         beiscsi_log(phba, KERN_ERR,
4168                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4169                     "BM_%d : Alloc of SGL_ICD Failed\n");
4170         return -ENOMEM;
4171 }
4172
4173 static int beiscsi_iotask(struct iscsi_task *task, struct scatterlist *sg,
4174                           unsigned int num_sg, unsigned int xferlen,
4175                           unsigned int writedir)
4176 {
4177
4178         struct beiscsi_io_task *io_task = task->dd_data;
4179         struct iscsi_conn *conn = task->conn;
4180         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4181         struct beiscsi_hba *phba = beiscsi_conn->phba;
4182         struct iscsi_wrb *pwrb = NULL;
4183         unsigned int doorbell = 0;
4184
4185         pwrb = io_task->pwrb_handle->pwrb;
4186         io_task->cmd_bhs->iscsi_hdr.exp_statsn = 0;
4187         io_task->bhs_len = sizeof(struct be_cmd_bhs);
4188
4189         if (writedir) {
4190                 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4191                               INI_WR_CMD);
4192                 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 1);
4193         } else {
4194                 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4195                               INI_RD_CMD);
4196                 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
4197         }
4198
4199         AMAP_SET_BITS(struct amap_iscsi_wrb, lun, pwrb,
4200                       cpu_to_be16(*(unsigned short *)
4201                                   &io_task->cmd_bhs->iscsi_hdr.lun));
4202         AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb, xferlen);
4203         AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
4204                       io_task->pwrb_handle->wrb_index);
4205         AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
4206                       be32_to_cpu(task->cmdsn));
4207         AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
4208                       io_task->psgl_handle->sgl_index);
4209
4210         hwi_write_sgl(pwrb, sg, num_sg, io_task);
4211
4212         AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
4213                       io_task->pwrb_handle->nxt_wrb_index);
4214         be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));
4215
4216         doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4217         doorbell |= (io_task->pwrb_handle->wrb_index &
4218                      DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
4219         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4220
4221         iowrite32(doorbell, phba->db_va + DB_TXULP0_OFFSET);
4222         return 0;
4223 }
4224
4225 static int beiscsi_mtask(struct iscsi_task *task)
4226 {
4227         struct beiscsi_io_task *io_task = task->dd_data;
4228         struct iscsi_conn *conn = task->conn;
4229         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4230         struct beiscsi_hba *phba = beiscsi_conn->phba;
4231         struct iscsi_wrb *pwrb = NULL;
4232         unsigned int doorbell = 0;
4233         unsigned int cid;
4234
4235         cid = beiscsi_conn->beiscsi_conn_cid;
4236         pwrb = io_task->pwrb_handle->pwrb;
4237         memset(pwrb, 0, sizeof(*pwrb));
4238         AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
4239                       be32_to_cpu(task->cmdsn));
4240         AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
4241                       io_task->pwrb_handle->wrb_index);
4242         AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
4243                       io_task->psgl_handle->sgl_index);
4244
4245         switch (task->hdr->opcode & ISCSI_OPCODE_MASK) {
4246         case ISCSI_OP_LOGIN:
4247                 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4248                               TGT_DM_CMD);
4249                 AMAP_SET_BITS(struct amap_iscsi_wrb, dmsg, pwrb, 0);
4250                 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb, 1);
4251                 hwi_write_buffer(pwrb, task);
4252                 break;
4253         case ISCSI_OP_NOOP_OUT:
4254                 if (task->hdr->ttt != ISCSI_RESERVED_TAG) {
4255                         AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4256                                       TGT_DM_CMD);
4257                         AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt,
4258                                       pwrb, 0);
4259                         AMAP_SET_BITS(struct amap_iscsi_wrb, dmsg, pwrb, 1);
4260                 } else {
4261                         AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4262                                       INI_RD_CMD);
4263                         AMAP_SET_BITS(struct amap_iscsi_wrb, dmsg, pwrb, 0);
4264                 }
4265                 hwi_write_buffer(pwrb, task);
4266                 break;
4267         case ISCSI_OP_TEXT:
4268                 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4269                               TGT_DM_CMD);
4270                 AMAP_SET_BITS(struct amap_iscsi_wrb, dmsg, pwrb, 0);
4271                 hwi_write_buffer(pwrb, task);
4272                 break;
4273         case ISCSI_OP_SCSI_TMFUNC:
4274                 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4275                               INI_TMF_CMD);
4276                 AMAP_SET_BITS(struct amap_iscsi_wrb, dmsg, pwrb, 0);
4277                 hwi_write_buffer(pwrb, task);
4278                 break;
4279         case ISCSI_OP_LOGOUT:
4280                 AMAP_SET_BITS(struct amap_iscsi_wrb, dmsg, pwrb, 0);
4281                 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4282                               HWH_TYPE_LOGOUT);
4283                 hwi_write_buffer(pwrb, task);
4284                 break;
4285
4286         default:
4287                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4288                             "BM_%d : opcode =%d Not supported\n",
4289                             task->hdr->opcode & ISCSI_OPCODE_MASK);
4290
4291                 return -EINVAL;
4292         }
4293
4294         AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb,
4295                       task->data_count);
4296         AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
4297                       io_task->pwrb_handle->nxt_wrb_index);
4298         be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));
4299
4300         doorbell |= cid & DB_WRB_POST_CID_MASK;
4301         doorbell |= (io_task->pwrb_handle->wrb_index &
4302                      DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
4303         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4304         iowrite32(doorbell, phba->db_va + DB_TXULP0_OFFSET);
4305         return 0;
4306 }
4307
4308 static int beiscsi_task_xmit(struct iscsi_task *task)
4309 {
4310         struct beiscsi_io_task *io_task = task->dd_data;
4311         struct scsi_cmnd *sc = task->sc;
4312         struct scatterlist *sg;
4313         int num_sg;
4314         unsigned int  writedir = 0, xferlen = 0;
4315
4316         if (!sc)
4317                 return beiscsi_mtask(task);
4318
4319         io_task->scsi_cmnd = sc;
4320         num_sg = scsi_dma_map(sc);
4321         if (num_sg < 0) {
4322                 struct iscsi_conn *conn = task->conn;
4323                 struct beiscsi_hba *phba = NULL;
4324
4325                 phba = ((struct beiscsi_conn *)conn->dd_data)->phba;
4326                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_IO,
4327                             "BM_%d : scsi_dma_map Failed\n");
4328
4329                 return num_sg;
4330         }
4331         xferlen = scsi_bufflen(sc);
4332         sg = scsi_sglist(sc);
4333         if (sc->sc_data_direction == DMA_TO_DEVICE)
4334                 writedir = 1;
4335          else
4336                 writedir = 0;
4337
4338         return beiscsi_iotask(task, sg, num_sg, xferlen, writedir);
4339 }
4340
4341 /**
4342  * beiscsi_bsg_request - handle bsg request from ISCSI transport
4343  * @job: job to handle
4344  */
4345 static int beiscsi_bsg_request(struct bsg_job *job)
4346 {
4347         struct Scsi_Host *shost;
4348         struct beiscsi_hba *phba;
4349         struct iscsi_bsg_request *bsg_req = job->request;
4350         int rc = -EINVAL;
4351         unsigned int tag;
4352         struct be_dma_mem nonemb_cmd;
4353         struct be_cmd_resp_hdr *resp;
4354         struct iscsi_bsg_reply *bsg_reply = job->reply;
4355         unsigned short status, extd_status;
4356
4357         shost = iscsi_job_to_shost(job);
4358         phba = iscsi_host_priv(shost);
4359
4360         switch (bsg_req->msgcode) {
4361         case ISCSI_BSG_HST_VENDOR:
4362                 nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
4363                                         job->request_payload.payload_len,
4364                                         &nonemb_cmd.dma);
4365                 if (nonemb_cmd.va == NULL) {
4366                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4367                                     "BM_%d : Failed to allocate memory for "
4368                                     "beiscsi_bsg_request\n");
4369                         return -EIO;
4370                 }
4371                 tag = mgmt_vendor_specific_fw_cmd(&phba->ctrl, phba, job,
4372                                                   &nonemb_cmd);
4373                 if (!tag) {
4374                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4375                                     "BM_%d : be_cmd_get_mac_addr Failed\n");
4376
4377                         pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
4378                                             nonemb_cmd.va, nonemb_cmd.dma);
4379                         return -EAGAIN;
4380                 } else
4381                         wait_event_interruptible(phba->ctrl.mcc_wait[tag],
4382                                                  phba->ctrl.mcc_numtag[tag]);
4383                 extd_status = (phba->ctrl.mcc_numtag[tag] & 0x0000FF00) >> 8;
4384                 status = phba->ctrl.mcc_numtag[tag] & 0x000000FF;
4385                 free_mcc_tag(&phba->ctrl, tag);
4386                 resp = (struct be_cmd_resp_hdr *)nonemb_cmd.va;
4387                 sg_copy_from_buffer(job->reply_payload.sg_list,
4388                                     job->reply_payload.sg_cnt,
4389                                     nonemb_cmd.va, (resp->response_length
4390                                     + sizeof(*resp)));
4391                 bsg_reply->reply_payload_rcv_len = resp->response_length;
4392                 bsg_reply->result = status;
4393                 bsg_job_done(job, bsg_reply->result,
4394                              bsg_reply->reply_payload_rcv_len);
4395                 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
4396                                     nonemb_cmd.va, nonemb_cmd.dma);
4397                 if (status || extd_status) {
4398                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4399                                     "BM_%d : be_cmd_get_mac_addr Failed"
4400                                     " status = %d extd_status = %d\n",
4401                                     status, extd_status);
4402
4403                         return -EIO;
4404                 }
4405                 break;
4406
4407         default:
4408                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4409                                 "BM_%d : Unsupported bsg command: 0x%x\n",
4410                                 bsg_req->msgcode);
4411                 break;
4412         }
4413
4414         return rc;
4415 }
4416
4417 void beiscsi_hba_attrs_init(struct beiscsi_hba *phba)
4418 {
4419         /* Set the logging parameter */
4420         beiscsi_log_enable_init(phba, beiscsi_log_enable);
4421 }
4422
4423 static void beiscsi_quiesce(struct beiscsi_hba *phba)
4424 {
4425         struct hwi_controller *phwi_ctrlr;
4426         struct hwi_context_memory *phwi_context;
4427         struct be_eq_obj *pbe_eq;
4428         unsigned int i, msix_vec;
4429         u8 *real_offset = 0;
4430         u32 value = 0;
4431
4432         phwi_ctrlr = phba->phwi_ctrlr;
4433         phwi_context = phwi_ctrlr->phwi_ctxt;
4434         hwi_disable_intr(phba);
4435         if (phba->msix_enabled) {
4436                 for (i = 0; i <= phba->num_cpus; i++) {
4437                         msix_vec = phba->msix_entries[i].vector;
4438                         free_irq(msix_vec, &phwi_context->be_eq[i]);
4439                         kfree(phba->msi_name[i]);
4440                 }
4441         } else
4442                 if (phba->pcidev->irq)
4443                         free_irq(phba->pcidev->irq, phba);
4444         pci_disable_msix(phba->pcidev);
4445         destroy_workqueue(phba->wq);
4446         if (blk_iopoll_enabled)
4447                 for (i = 0; i < phba->num_cpus; i++) {
4448                         pbe_eq = &phwi_context->be_eq[i];
4449                         blk_iopoll_disable(&pbe_eq->iopoll);
4450                 }
4451
4452         beiscsi_clean_port(phba);
4453         beiscsi_free_mem(phba);
4454         real_offset = (u8 *)phba->csr_va + MPU_EP_SEMAPHORE;
4455
4456         value = readl((void *)real_offset);
4457
4458         if (value & 0x00010000) {
4459                 value &= 0xfffeffff;
4460                 writel(value, (void *)real_offset);
4461         }
4462         beiscsi_unmap_pci_function(phba);
4463         pci_free_consistent(phba->pcidev,
4464                             phba->ctrl.mbox_mem_alloced.size,
4465                             phba->ctrl.mbox_mem_alloced.va,
4466                             phba->ctrl.mbox_mem_alloced.dma);
4467 }
4468
4469 static void beiscsi_remove(struct pci_dev *pcidev)
4470 {
4471
4472         struct beiscsi_hba *phba = NULL;
4473
4474         phba = pci_get_drvdata(pcidev);
4475         if (!phba) {
4476                 dev_err(&pcidev->dev, "beiscsi_remove called with no phba\n");
4477                 return;
4478         }
4479
4480         beiscsi_destroy_def_ifaces(phba);
4481         beiscsi_quiesce(phba);
4482         iscsi_boot_destroy_kset(phba->boot_kset);
4483         iscsi_host_remove(phba->shost);
4484         pci_dev_put(phba->pcidev);
4485         iscsi_host_free(phba->shost);
4486         pci_disable_device(pcidev);
4487 }
4488
4489 static void beiscsi_shutdown(struct pci_dev *pcidev)
4490 {
4491
4492         struct beiscsi_hba *phba = NULL;
4493
4494         phba = (struct beiscsi_hba *)pci_get_drvdata(pcidev);
4495         if (!phba) {
4496                 dev_err(&pcidev->dev, "beiscsi_shutdown called with no phba\n");
4497                 return;
4498         }
4499
4500         beiscsi_quiesce(phba);
4501         pci_disable_device(pcidev);
4502 }
4503
4504 static void beiscsi_msix_enable(struct beiscsi_hba *phba)
4505 {
4506         int i, status;
4507
4508         for (i = 0; i <= phba->num_cpus; i++)
4509                 phba->msix_entries[i].entry = i;
4510
4511         status = pci_enable_msix(phba->pcidev, phba->msix_entries,
4512                                  (phba->num_cpus + 1));
4513         if (!status)
4514                 phba->msix_enabled = true;
4515
4516         return;
4517 }
4518
4519 static int __devinit beiscsi_dev_probe(struct pci_dev *pcidev,
4520                                 const struct pci_device_id *id)
4521 {
4522         struct beiscsi_hba *phba = NULL;
4523         struct hwi_controller *phwi_ctrlr;
4524         struct hwi_context_memory *phwi_context;
4525         struct be_eq_obj *pbe_eq;
4526         int ret, num_cpus, i;
4527         u8 *real_offset = 0;
4528         u32 value = 0;
4529
4530         ret = beiscsi_enable_pci(pcidev);
4531         if (ret < 0) {
4532                 dev_err(&pcidev->dev,
4533                         "beiscsi_dev_probe - Failed to enable pci device\n");
4534                 return ret;
4535         }
4536
4537         phba = beiscsi_hba_alloc(pcidev);
4538         if (!phba) {
4539                 dev_err(&pcidev->dev,
4540                         "beiscsi_dev_probe - Failed in beiscsi_hba_alloc\n");
4541                 goto disable_pci;
4542         }
4543
4544         /* Initialize Driver configuration Paramters */
4545         beiscsi_hba_attrs_init(phba);
4546
4547         switch (pcidev->device) {
4548         case BE_DEVICE_ID1:
4549         case OC_DEVICE_ID1:
4550         case OC_DEVICE_ID2:
4551                 phba->generation = BE_GEN2;
4552                 break;
4553         case BE_DEVICE_ID2:
4554         case OC_DEVICE_ID3:
4555                 phba->generation = BE_GEN3;
4556                 break;
4557         default:
4558                 phba->generation = 0;
4559         }
4560
4561         if (enable_msix)
4562                 num_cpus = find_num_cpus();
4563         else
4564                 num_cpus = 1;
4565         phba->num_cpus = num_cpus;
4566         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4567                     "BM_%d : num_cpus = %d\n",
4568                     phba->num_cpus);
4569
4570         if (enable_msix) {
4571                 beiscsi_msix_enable(phba);
4572                 if (!phba->msix_enabled)
4573                         phba->num_cpus = 1;
4574         }
4575         ret = be_ctrl_init(phba, pcidev);
4576         if (ret) {
4577                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4578                             "BM_%d : beiscsi_dev_probe-"
4579                             "Failed in be_ctrl_init\n");
4580                 goto hba_free;
4581         }
4582
4583         if (!num_hba) {
4584                 real_offset = (u8 *)phba->csr_va + MPU_EP_SEMAPHORE;
4585                 value = readl((void *)real_offset);
4586                 if (value & 0x00010000) {
4587                         gcrashmode++;
4588                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4589                                     "BM_%d : Loading Driver in crashdump mode\n");
4590                         ret = beiscsi_cmd_reset_function(phba);
4591                         if (ret) {
4592                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4593                                             "BM_%d : Reset Failed. Aborting Crashdump\n");
4594                                 goto hba_free;
4595                         }
4596                         ret = be_chk_reset_complete(phba);
4597                         if (ret) {
4598                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4599                                             "BM_%d : Failed to get out of reset."
4600                                             "Aborting Crashdump\n");
4601                                 goto hba_free;
4602                         }
4603                 } else {
4604                         value |= 0x00010000;
4605                         writel(value, (void *)real_offset);
4606                         num_hba++;
4607                 }
4608         }
4609
4610         spin_lock_init(&phba->io_sgl_lock);
4611         spin_lock_init(&phba->mgmt_sgl_lock);
4612         spin_lock_init(&phba->isr_lock);
4613         ret = mgmt_get_fw_config(&phba->ctrl, phba);
4614         if (ret != 0) {
4615                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4616                             "BM_%d : Error getting fw config\n");
4617                 goto free_port;
4618         }
4619         phba->shost->max_id = phba->fw_config.iscsi_cid_count;
4620         beiscsi_get_params(phba);
4621         phba->shost->can_queue = phba->params.ios_per_ctrl;
4622         ret = beiscsi_init_port(phba);
4623         if (ret < 0) {
4624                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4625                             "BM_%d : beiscsi_dev_probe-"
4626                             "Failed in beiscsi_init_port\n");
4627                 goto free_port;
4628         }
4629
4630         for (i = 0; i < MAX_MCC_CMD ; i++) {
4631                 init_waitqueue_head(&phba->ctrl.mcc_wait[i + 1]);
4632                 phba->ctrl.mcc_tag[i] = i + 1;
4633                 phba->ctrl.mcc_numtag[i + 1] = 0;
4634                 phba->ctrl.mcc_tag_available++;
4635         }
4636
4637         phba->ctrl.mcc_alloc_index = phba->ctrl.mcc_free_index = 0;
4638
4639         snprintf(phba->wq_name, sizeof(phba->wq_name), "beiscsi_q_irq%u",
4640                  phba->shost->host_no);
4641         phba->wq = alloc_workqueue(phba->wq_name, WQ_MEM_RECLAIM, 1);
4642         if (!phba->wq) {
4643                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4644                             "BM_%d : beiscsi_dev_probe-"
4645                             "Failed to allocate work queue\n");
4646                 goto free_twq;
4647         }
4648
4649         INIT_WORK(&phba->work_cqs, beiscsi_process_all_cqs);
4650
4651         phwi_ctrlr = phba->phwi_ctrlr;
4652         phwi_context = phwi_ctrlr->phwi_ctxt;
4653         if (blk_iopoll_enabled) {
4654                 for (i = 0; i < phba->num_cpus; i++) {
4655                         pbe_eq = &phwi_context->be_eq[i];
4656                         blk_iopoll_init(&pbe_eq->iopoll, be_iopoll_budget,
4657                                         be_iopoll);
4658                         blk_iopoll_enable(&pbe_eq->iopoll);
4659                 }
4660         }
4661         ret = beiscsi_init_irqs(phba);
4662         if (ret < 0) {
4663                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4664                             "BM_%d : beiscsi_dev_probe-"
4665                             "Failed to beiscsi_init_irqs\n");
4666                 goto free_blkenbld;
4667         }
4668         hwi_enable_intr(phba);
4669
4670         if (beiscsi_setup_boot_info(phba))
4671                 /*
4672                  * log error but continue, because we may not be using
4673                  * iscsi boot.
4674                  */
4675                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4676                             "BM_%d : Could not set up "
4677                             "iSCSI boot info.\n");
4678
4679         beiscsi_create_def_ifaces(phba);
4680         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4681                     "\n\n\n BM_%d : SUCCESS - DRIVER LOADED\n\n\n");
4682         return 0;
4683
4684 free_blkenbld:
4685         destroy_workqueue(phba->wq);
4686         if (blk_iopoll_enabled)
4687                 for (i = 0; i < phba->num_cpus; i++) {
4688                         pbe_eq = &phwi_context->be_eq[i];
4689                         blk_iopoll_disable(&pbe_eq->iopoll);
4690                 }
4691 free_twq:
4692         beiscsi_clean_port(phba);
4693         beiscsi_free_mem(phba);
4694 free_port:
4695         real_offset = (u8 *)phba->csr_va + MPU_EP_SEMAPHORE;
4696
4697         value = readl((void *)real_offset);
4698
4699         if (value & 0x00010000) {
4700                 value &= 0xfffeffff;
4701                 writel(value, (void *)real_offset);
4702         }
4703
4704         pci_free_consistent(phba->pcidev,
4705                             phba->ctrl.mbox_mem_alloced.size,
4706                             phba->ctrl.mbox_mem_alloced.va,
4707                            phba->ctrl.mbox_mem_alloced.dma);
4708         beiscsi_unmap_pci_function(phba);
4709 hba_free:
4710         if (phba->msix_enabled)
4711                 pci_disable_msix(phba->pcidev);
4712         iscsi_host_remove(phba->shost);
4713         pci_dev_put(phba->pcidev);
4714         iscsi_host_free(phba->shost);
4715 disable_pci:
4716         pci_disable_device(pcidev);
4717         return ret;
4718 }
4719
4720 struct iscsi_transport beiscsi_iscsi_transport = {
4721         .owner = THIS_MODULE,
4722         .name = DRV_NAME,
4723         .caps = CAP_RECOVERY_L0 | CAP_HDRDGST | CAP_TEXT_NEGO |
4724                 CAP_MULTI_R2T | CAP_DATADGST | CAP_DATA_PATH_OFFLOAD,
4725         .create_session = beiscsi_session_create,
4726         .destroy_session = beiscsi_session_destroy,
4727         .create_conn = beiscsi_conn_create,
4728         .bind_conn = beiscsi_conn_bind,
4729         .destroy_conn = iscsi_conn_teardown,
4730         .attr_is_visible = be2iscsi_attr_is_visible,
4731         .set_iface_param = be2iscsi_iface_set_param,
4732         .get_iface_param = be2iscsi_iface_get_param,
4733         .set_param = beiscsi_set_param,
4734         .get_conn_param = iscsi_conn_get_param,
4735         .get_session_param = iscsi_session_get_param,
4736         .get_host_param = beiscsi_get_host_param,
4737         .start_conn = beiscsi_conn_start,
4738         .stop_conn = iscsi_conn_stop,
4739         .send_pdu = iscsi_conn_send_pdu,
4740         .xmit_task = beiscsi_task_xmit,
4741         .cleanup_task = beiscsi_cleanup_task,
4742         .alloc_pdu = beiscsi_alloc_pdu,
4743         .parse_pdu_itt = beiscsi_parse_pdu,
4744         .get_stats = beiscsi_conn_get_stats,
4745         .get_ep_param = beiscsi_ep_get_param,
4746         .ep_connect = beiscsi_ep_connect,
4747         .ep_poll = beiscsi_ep_poll,
4748         .ep_disconnect = beiscsi_ep_disconnect,
4749         .session_recovery_timedout = iscsi_session_recovery_timedout,
4750         .bsg_request = beiscsi_bsg_request,
4751 };
4752
4753 static struct pci_driver beiscsi_pci_driver = {
4754         .name = DRV_NAME,
4755         .probe = beiscsi_dev_probe,
4756         .remove = beiscsi_remove,
4757         .shutdown = beiscsi_shutdown,
4758         .id_table = beiscsi_pci_id_table
4759 };
4760
4761
4762 static int __init beiscsi_module_init(void)
4763 {
4764         int ret;
4765
4766         beiscsi_scsi_transport =
4767                         iscsi_register_transport(&beiscsi_iscsi_transport);
4768         if (!beiscsi_scsi_transport) {
4769                 printk(KERN_ERR
4770                        "beiscsi_module_init - Unable to  register beiscsi transport.\n");
4771                 return -ENOMEM;
4772         }
4773         printk(KERN_INFO "In beiscsi_module_init, tt=%p\n",
4774                &beiscsi_iscsi_transport);
4775
4776         ret = pci_register_driver(&beiscsi_pci_driver);
4777         if (ret) {
4778                 printk(KERN_ERR
4779                        "beiscsi_module_init - Unable to  register beiscsi pci driver.\n");
4780                 goto unregister_iscsi_transport;
4781         }
4782         return 0;
4783
4784 unregister_iscsi_transport:
4785         iscsi_unregister_transport(&beiscsi_iscsi_transport);
4786         return ret;
4787 }
4788
4789 static void __exit beiscsi_module_exit(void)
4790 {
4791         pci_unregister_driver(&beiscsi_pci_driver);
4792         iscsi_unregister_transport(&beiscsi_iscsi_transport);
4793 }
4794
4795 module_init(beiscsi_module_init);
4796 module_exit(beiscsi_module_exit);