drivers/scsi/be2iscsi/be_main.c

   1 /**
   2  * Copyright (C) 2005 - 2011 Emulex
   3  * All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License version 2
   7  * as published by the Free Software Foundation.  The full GNU General
   8  * Public License is included in this distribution in the file called COPYING.
   9  *
  10  * Written by: Jayamohan Kallickal (jayamohan.kallickal@emulex.com)
  11  *
  12  * Contact Information:
  13  * linux-drivers@emulex.com
  14  *
  15  * Emulex
  16  * 3333 Susan Street
  17  * Costa Mesa, CA 92626
  18  */
  19
  20 #include <linux/reboot.h>
  21 #include <linux/delay.h>
  22 #include <linux/slab.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/blkdev.h>
  25 #include <linux/pci.h>
  26 #include <linux/string.h>
  27 #include <linux/kernel.h>
  28 #include <linux/semaphore.h>
  29 #include <linux/iscsi_boot_sysfs.h>
  30 #include <linux/module.h>
  31 #include <linux/bsg-lib.h>
  32
  33 #include <scsi/libiscsi.h>
  34 #include <scsi/scsi_bsg_iscsi.h>
  35 #include <scsi/scsi_netlink.h>
  36 #include <scsi/scsi_transport_iscsi.h>
  37 #include <scsi/scsi_transport.h>
  38 #include <scsi/scsi_cmnd.h>
  39 #include <scsi/scsi_device.h>
  40 #include <scsi/scsi_host.h>
  41 #include <scsi/scsi.h>
  42 #include "be_main.h"
  43 #include "be_iscsi.h"
  44 #include "be_mgmt.h"
  45 #include "be_cmds.h"
  46
  47 static unsigned int be_iopoll_budget = 10;
  48 static unsigned int be_max_phys_size = 64;
  49 static unsigned int enable_msix = 1;
  50 static unsigned int gcrashmode = 0;
  51 static unsigned int num_hba = 0;
  52
  53 MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table);
  54 MODULE_DESCRIPTION(DRV_DESC " " BUILD_STR);
  55 MODULE_VERSION(BUILD_STR);
  56 MODULE_AUTHOR("Emulex Corporation");
  57 MODULE_LICENSE("GPL");
  58 module_param(be_iopoll_budget, int, 0);
  59 module_param(enable_msix, int, 0);
  60 module_param(be_max_phys_size, uint, S_IRUGO);
  61 MODULE_PARM_DESC(be_max_phys_size,
  62                 "Maximum Size (In Kilobytes) of physically contiguous "
  63                 "memory that can be allocated. Range is 16 - 128");
  64
  65 #define beiscsi_disp_param(_name)\
  66 ssize_t \
  67 beiscsi_##_name##_disp(struct device *dev,\
  68                         struct device_attribute *attrib, char *buf)     \
  69 {       \
  70         struct Scsi_Host *shost = class_to_shost(dev);\
  71         struct beiscsi_hba *phba = iscsi_host_priv(shost); \
  72         uint32_t param_val = 0; \
  73         param_val = phba->attr_##_name;\
  74         return snprintf(buf, PAGE_SIZE, "%d\n",\
  75                         phba->attr_##_name);\
  76 }
  77
  78 #define beiscsi_change_param(_name, _minval, _maxval, _defaval)\
  79 int \
  80 beiscsi_##_name##_change(struct beiscsi_hba *phba, uint32_t val)\
  81 {\
  82         if (val >= _minval && val <= _maxval) {\
  83                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
  84                             "BA_%d : beiscsi_"#_name" updated "\
  85                             "from 0x%x ==> 0x%x\n",\
  86                             phba->attr_##_name, val); \
  87                 phba->attr_##_name = val;\
  88                 return 0;\
  89         } \
  90         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT, \
  91                     "BA_%d beiscsi_"#_name" attribute "\
  92                     "cannot be updated to 0x%x, "\
  93                     "range allowed is ["#_minval" - "#_maxval"]\n", val);\
  94                 return -EINVAL;\
  95 }
  96
  97 #define beiscsi_store_param(_name)  \
  98 ssize_t \
  99 beiscsi_##_name##_store(struct device *dev,\
 100                          struct device_attribute *attr, const char *buf,\
 101                          size_t count) \
 102 { \
 103         struct Scsi_Host  *shost = class_to_shost(dev);\
 104         struct beiscsi_hba *phba = iscsi_host_priv(shost);\
 105         uint32_t param_val = 0;\
 106         if (!isdigit(buf[0]))\
 107                 return -EINVAL;\
 108         if (sscanf(buf, "%i", &param_val) != 1)\
 109                 return -EINVAL;\
 110         if (beiscsi_##_name##_change(phba, param_val) == 0) \
 111                 return strlen(buf);\
 112         else \
 113                 return -EINVAL;\
 114 }
 115
 116 #define beiscsi_init_param(_name, _minval, _maxval, _defval) \
 117 int \
 118 beiscsi_##_name##_init(struct beiscsi_hba *phba, uint32_t val) \
 119 { \
 120         if (val >= _minval && val <= _maxval) {\
 121                 phba->attr_##_name = val;\
 122                 return 0;\
 123         } \
 124         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
 125                     "BA_%d beiscsi_"#_name" attribute " \
 126                     "cannot be updated to 0x%x, "\
 127                     "range allowed is ["#_minval" - "#_maxval"]\n", val);\
 128         phba->attr_##_name = _defval;\
 129         return -EINVAL;\
 130 }
 131
 132 #define BEISCSI_RW_ATTR(_name, _minval, _maxval, _defval, _descp) \
 133 static uint beiscsi_##_name = _defval;\
 134 module_param(beiscsi_##_name, uint, S_IRUGO);\
 135 MODULE_PARM_DESC(beiscsi_##_name, _descp);\
 136 beiscsi_disp_param(_name)\
 137 beiscsi_change_param(_name, _minval, _maxval, _defval)\
 138 beiscsi_store_param(_name)\
 139 beiscsi_init_param(_name, _minval, _maxval, _defval)\
 140 DEVICE_ATTR(beiscsi_##_name, S_IRUGO | S_IWUSR,\
 141               beiscsi_##_name##_disp, beiscsi_##_name##_store)
 142
 143 /*
 144  * When new log level added update the
 145  * the MAX allowed value for log_enable
 146  */
 147 BEISCSI_RW_ATTR(log_enable, 0x00,
 148                 0xFF, 0x00, "Enable logging Bit Mask\n"
 149                 "\t\t\t\tInitialization Events  : 0x01\n"
 150                 "\t\t\t\tMailbox Events         : 0x02\n"
 151                 "\t\t\t\tMiscellaneous Events   : 0x04\n"
 152                 "\t\t\t\tError Handling         : 0x08\n"
 153                 "\t\t\t\tIO Path Events         : 0x10\n"
 154                 "\t\t\t\tConfiguration Path     : 0x20\n");
 155
 156 DEVICE_ATTR(beiscsi_drvr_ver, S_IRUGO, beiscsi_drvr_ver_disp, NULL);
 157 struct device_attribute *beiscsi_attrs[] = {
 158         &dev_attr_beiscsi_log_enable,
 159         &dev_attr_beiscsi_drvr_ver,
 160         NULL,
 161 };
 162
 163 static char const *cqe_desc[] = {
 164         "RESERVED_DESC",
 165         "SOL_CMD_COMPLETE",
 166         "SOL_CMD_KILLED_DATA_DIGEST_ERR",
 167         "CXN_KILLED_PDU_SIZE_EXCEEDS_DSL",
 168         "CXN_KILLED_BURST_LEN_MISMATCH",
 169         "CXN_KILLED_AHS_RCVD",
 170         "CXN_KILLED_HDR_DIGEST_ERR",
 171         "CXN_KILLED_UNKNOWN_HDR",
 172         "CXN_KILLED_STALE_ITT_TTT_RCVD",
 173         "CXN_KILLED_INVALID_ITT_TTT_RCVD",
 174         "CXN_KILLED_RST_RCVD",
 175         "CXN_KILLED_TIMED_OUT",
 176         "CXN_KILLED_RST_SENT",
 177         "CXN_KILLED_FIN_RCVD",
 178         "CXN_KILLED_BAD_UNSOL_PDU_RCVD",
 179         "CXN_KILLED_BAD_WRB_INDEX_ERROR",
 180         "CXN_KILLED_OVER_RUN_RESIDUAL",
 181         "CXN_KILLED_UNDER_RUN_RESIDUAL",
 182         "CMD_KILLED_INVALID_STATSN_RCVD",
 183         "CMD_KILLED_INVALID_R2T_RCVD",
 184         "CMD_CXN_KILLED_LUN_INVALID",
 185         "CMD_CXN_KILLED_ICD_INVALID",
 186         "CMD_CXN_KILLED_ITT_INVALID",
 187         "CMD_CXN_KILLED_SEQ_OUTOFORDER",
 188         "CMD_CXN_KILLED_INVALID_DATASN_RCVD",
 189         "CXN_INVALIDATE_NOTIFY",
 190         "CXN_INVALIDATE_INDEX_NOTIFY",
 191         "CMD_INVALIDATED_NOTIFY",
 192         "UNSOL_HDR_NOTIFY",
 193         "UNSOL_DATA_NOTIFY",
 194         "UNSOL_DATA_DIGEST_ERROR_NOTIFY",
 195         "DRIVERMSG_NOTIFY",
 196         "CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN",
 197         "SOL_CMD_KILLED_DIF_ERR",
 198         "CXN_KILLED_SYN_RCVD",
 199         "CXN_KILLED_IMM_DATA_RCVD"
 200 };
 201
 202 static int beiscsi_slave_configure(struct scsi_device *sdev)
 203 {
 204         blk_queue_max_segment_size(sdev->request_queue, 65536);
 205         return 0;
 206 }
 207
 208 static int beiscsi_eh_abort(struct scsi_cmnd *sc)
 209 {
 210         struct iscsi_cls_session *cls_session;
 211         struct iscsi_task *aborted_task = (struct iscsi_task *)sc->SCp.ptr;
 212         struct beiscsi_io_task *aborted_io_task;
 213         struct iscsi_conn *conn;
 214         struct beiscsi_conn *beiscsi_conn;
 215         struct beiscsi_hba *phba;
 216         struct iscsi_session *session;
 217         struct invalidate_command_table *inv_tbl;
 218         struct be_dma_mem nonemb_cmd;
 219         unsigned int cid, tag, num_invalidate;
 220
 221         cls_session = starget_to_session(scsi_target(sc->device));
 222         session = cls_session->dd_data;
 223
 224         spin_lock_bh(&session->lock);
 225         if (!aborted_task || !aborted_task->sc) {
 226                 /* we raced */
 227                 spin_unlock_bh(&session->lock);
 228                 return SUCCESS;
 229         }
 230
 231         aborted_io_task = aborted_task->dd_data;
 232         if (!aborted_io_task->scsi_cmnd) {
 233                 /* raced or invalid command */
 234                 spin_unlock_bh(&session->lock);
 235                 return SUCCESS;
 236         }
 237         spin_unlock_bh(&session->lock);
 238         conn = aborted_task->conn;
 239         beiscsi_conn = conn->dd_data;
 240         phba = beiscsi_conn->phba;
 241
 242         /* invalidate iocb */
 243         cid = beiscsi_conn->beiscsi_conn_cid;
 244         inv_tbl = phba->inv_tbl;
 245         memset(inv_tbl, 0x0, sizeof(*inv_tbl));
 246         inv_tbl->cid = cid;
 247         inv_tbl->icd = aborted_io_task->psgl_handle->sgl_index;
 248         num_invalidate = 1;
 249         nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
 250                                 sizeof(struct invalidate_commands_params_in),
 251                                 &nonemb_cmd.dma);
 252         if (nonemb_cmd.va == NULL) {
 253                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
 254                             "BM_%d : Failed to allocate memory for"
 255                             "mgmt_invalidate_icds\n");
 256                 return FAILED;
 257         }
 258         nonemb_cmd.size = sizeof(struct invalidate_commands_params_in);
 259
 260         tag = mgmt_invalidate_icds(phba, inv_tbl, num_invalidate,
 261                                    cid, &nonemb_cmd);
 262         if (!tag) {
 263                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
 264                             "BM_%d : mgmt_invalidate_icds could not be"
 265                             "submitted\n");
 266                 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
 267                                     nonemb_cmd.va, nonemb_cmd.dma);
 268
 269                 return FAILED;
 270         } else {
 271                 wait_event_interruptible(phba->ctrl.mcc_wait[tag],
 272                                          phba->ctrl.mcc_numtag[tag]);
 273                 free_mcc_tag(&phba->ctrl, tag);
 274         }
 275         pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
 276                             nonemb_cmd.va, nonemb_cmd.dma);
 277         return iscsi_eh_abort(sc);
 278 }
 279
 280 static int beiscsi_eh_device_reset(struct scsi_cmnd *sc)
 281 {
 282         struct iscsi_task *abrt_task;
 283         struct beiscsi_io_task *abrt_io_task;
 284         struct iscsi_conn *conn;
 285         struct beiscsi_conn *beiscsi_conn;
 286         struct beiscsi_hba *phba;
 287         struct iscsi_session *session;
 288         struct iscsi_cls_session *cls_session;
 289         struct invalidate_command_table *inv_tbl;
 290         struct be_dma_mem nonemb_cmd;
 291         unsigned int cid, tag, i, num_invalidate;
 292
 293         /* invalidate iocbs */
 294         cls_session = starget_to_session(scsi_target(sc->device));
 295         session = cls_session->dd_data;
 296         spin_lock_bh(&session->lock);
 297         if (!session->leadconn || session->state != ISCSI_STATE_LOGGED_IN) {
 298                 spin_unlock_bh(&session->lock);
 299                 return FAILED;
 300         }
 301         conn = session->leadconn;
 302         beiscsi_conn = conn->dd_data;
 303         phba = beiscsi_conn->phba;
 304         cid = beiscsi_conn->beiscsi_conn_cid;
 305         inv_tbl = phba->inv_tbl;
 306         memset(inv_tbl, 0x0, sizeof(*inv_tbl) * BE2_CMDS_PER_CXN);
 307         num_invalidate = 0;
 308         for (i = 0; i < conn->session->cmds_max; i++) {
 309                 abrt_task = conn->session->cmds[i];
 310                 abrt_io_task = abrt_task->dd_data;
 311                 if (!abrt_task->sc || abrt_task->state == ISCSI_TASK_FREE)
 312                         continue;
 313
 314                 if (abrt_task->sc->device->lun != abrt_task->sc->device->lun)
 315                         continue;
 316
 317                 inv_tbl->cid = cid;
 318                 inv_tbl->icd = abrt_io_task->psgl_handle->sgl_index;
 319                 num_invalidate++;
 320                 inv_tbl++;
 321         }
 322         spin_unlock_bh(&session->lock);
 323         inv_tbl = phba->inv_tbl;
 324
 325         nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
 326                                 sizeof(struct invalidate_commands_params_in),
 327                                 &nonemb_cmd.dma);
 328         if (nonemb_cmd.va == NULL) {
 329                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
 330                             "BM_%d : Failed to allocate memory for"
 331                             "mgmt_invalidate_icds\n");
 332                 return FAILED;
 333         }
 334         nonemb_cmd.size = sizeof(struct invalidate_commands_params_in);
 335         memset(nonemb_cmd.va, 0, nonemb_cmd.size);
 336         tag = mgmt_invalidate_icds(phba, inv_tbl, num_invalidate,
 337                                    cid, &nonemb_cmd);
 338         if (!tag) {
 339                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
 340                             "BM_%d : mgmt_invalidate_icds could not be"
 341                             " submitted\n");
 342                 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
 343                                     nonemb_cmd.va, nonemb_cmd.dma);
 344                 return FAILED;
 345         } else {
 346                 wait_event_interruptible(phba->ctrl.mcc_wait[tag],
 347                                          phba->ctrl.mcc_numtag[tag]);
 348                 free_mcc_tag(&phba->ctrl, tag);
 349         }
 350         pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
 351                             nonemb_cmd.va, nonemb_cmd.dma);
 352         return iscsi_eh_device_reset(sc);
 353 }
 354
 355 static ssize_t beiscsi_show_boot_tgt_info(void *data, int type, char *buf)
 356 {
 357         struct beiscsi_hba *phba = data;
 358         struct mgmt_session_info *boot_sess = &phba->boot_sess;
 359         struct mgmt_conn_info *boot_conn = &boot_sess->conn_list[0];
 360         char *str = buf;
 361         int rc;
 362
 363         switch (type) {
 364         case ISCSI_BOOT_TGT_NAME:
 365                 rc = sprintf(buf, "%.*s\n",
 366                             (int)strlen(boot_sess->target_name),
 367                             (char *)&boot_sess->target_name);
 368                 break;
 369         case ISCSI_BOOT_TGT_IP_ADDR:
 370                 if (boot_conn->dest_ipaddr.ip_type == 0x1)
 371                         rc = sprintf(buf, "%pI4\n",
 372                                 (char *)&boot_conn->dest_ipaddr.addr);
 373                 else
 374                         rc = sprintf(str, "%pI6\n",
 375                                 (char *)&boot_conn->dest_ipaddr.addr);
 376                 break;
 377         case ISCSI_BOOT_TGT_PORT:
 378                 rc = sprintf(str, "%d\n", boot_conn->dest_port);
 379                 break;
 380
 381         case ISCSI_BOOT_TGT_CHAP_NAME:
 382                 rc = sprintf(str,  "%.*s\n",
 383                              boot_conn->negotiated_login_options.auth_data.chap.
 384                              target_chap_name_length,
 385                              (char *)&boot_conn->negotiated_login_options.
 386                              auth_data.chap.target_chap_name);
 387                 break;
 388         case ISCSI_BOOT_TGT_CHAP_SECRET:
 389                 rc = sprintf(str,  "%.*s\n",
 390                              boot_conn->negotiated_login_options.auth_data.chap.
 391                              target_secret_length,
 392                              (char *)&boot_conn->negotiated_login_options.
 393                              auth_data.chap.target_secret);
 394                 break;
 395         case ISCSI_BOOT_TGT_REV_CHAP_NAME:
 396                 rc = sprintf(str,  "%.*s\n",
 397                              boot_conn->negotiated_login_options.auth_data.chap.
 398                              intr_chap_name_length,
 399                              (char *)&boot_conn->negotiated_login_options.
 400                              auth_data.chap.intr_chap_name);
 401                 break;
 402         case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
 403                 rc = sprintf(str,  "%.*s\n",
 404                              boot_conn->negotiated_login_options.auth_data.chap.
 405                              intr_secret_length,
 406                              (char *)&boot_conn->negotiated_login_options.
 407                              auth_data.chap.intr_secret);
 408                 break;
 409         case ISCSI_BOOT_TGT_FLAGS:
 410                 rc = sprintf(str, "2\n");
 411                 break;
 412         case ISCSI_BOOT_TGT_NIC_ASSOC:
 413                 rc = sprintf(str, "0\n");
 414                 break;
 415         default:
 416                 rc = -ENOSYS;
 417                 break;
 418         }
 419         return rc;
 420 }
 421
 422 static ssize_t beiscsi_show_boot_ini_info(void *data, int type, char *buf)
 423 {
 424         struct beiscsi_hba *phba = data;
 425         char *str = buf;
 426         int rc;
 427
 428         switch (type) {
 429         case ISCSI_BOOT_INI_INITIATOR_NAME:
 430                 rc = sprintf(str, "%s\n", phba->boot_sess.initiator_iscsiname);
 431                 break;
 432         default:
 433                 rc = -ENOSYS;
 434                 break;
 435         }
 436         return rc;
 437 }
 438
 439 static ssize_t beiscsi_show_boot_eth_info(void *data, int type, char *buf)
 440 {
 441         struct beiscsi_hba *phba = data;
 442         char *str = buf;
 443         int rc;
 444
 445         switch (type) {
 446         case ISCSI_BOOT_ETH_FLAGS:
 447                 rc = sprintf(str, "2\n");
 448                 break;
 449         case ISCSI_BOOT_ETH_INDEX:
 450                 rc = sprintf(str, "0\n");
 451                 break;
 452         case ISCSI_BOOT_ETH_MAC:
 453                 rc  = beiscsi_get_macaddr(str, phba);
 454                 break;
 455         default:
 456                 rc = -ENOSYS;
 457                 break;
 458         }
 459         return rc;
 460 }
 461
 462
 463 static umode_t beiscsi_tgt_get_attr_visibility(void *data, int type)
 464 {
 465         umode_t rc;
 466
 467         switch (type) {
 468         case ISCSI_BOOT_TGT_NAME:
 469         case ISCSI_BOOT_TGT_IP_ADDR:
 470         case ISCSI_BOOT_TGT_PORT:
 471         case ISCSI_BOOT_TGT_CHAP_NAME:
 472         case ISCSI_BOOT_TGT_CHAP_SECRET:
 473         case ISCSI_BOOT_TGT_REV_CHAP_NAME:
 474         case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
 475         case ISCSI_BOOT_TGT_NIC_ASSOC:
 476         case ISCSI_BOOT_TGT_FLAGS:
 477                 rc = S_IRUGO;
 478                 break;
 479         default:
 480                 rc = 0;
 481                 break;
 482         }
 483         return rc;
 484 }
 485
 486 static umode_t beiscsi_ini_get_attr_visibility(void *data, int type)
 487 {
 488         umode_t rc;
 489
 490         switch (type) {
 491         case ISCSI_BOOT_INI_INITIATOR_NAME:
 492                 rc = S_IRUGO;
 493                 break;
 494         default:
 495                 rc = 0;
 496                 break;
 497         }
 498         return rc;
 499 }
 500
 501
 502 static umode_t beiscsi_eth_get_attr_visibility(void *data, int type)
 503 {
 504         umode_t rc;
 505
 506         switch (type) {
 507         case ISCSI_BOOT_ETH_FLAGS:
 508         case ISCSI_BOOT_ETH_MAC:
 509         case ISCSI_BOOT_ETH_INDEX:
 510                 rc = S_IRUGO;
 511                 break;
 512         default:
 513                 rc = 0;
 514                 break;
 515         }
 516         return rc;
 517 }
 518
 519 /*------------------- PCI Driver operations and data ----------------- */
 520 static DEFINE_PCI_DEVICE_TABLE(beiscsi_pci_id_table) = {
 521         { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
 522         { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
 523         { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
 524         { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
 525         { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
 526         { 0 }
 527 };
 528 MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table);
 529
 530
 531 static struct scsi_host_template beiscsi_sht = {
 532         .module = THIS_MODULE,
 533         .name = "Emulex 10Gbe open-iscsi Initiator Driver",
 534         .proc_name = DRV_NAME,
 535         .queuecommand = iscsi_queuecommand,
 536         .change_queue_depth = iscsi_change_queue_depth,
 537         .slave_configure = beiscsi_slave_configure,
 538         .target_alloc = iscsi_target_alloc,
 539         .eh_abort_handler = beiscsi_eh_abort,
 540         .eh_device_reset_handler = beiscsi_eh_device_reset,
 541         .eh_target_reset_handler = iscsi_eh_session_reset,
 542         .shost_attrs = beiscsi_attrs,
 543         .sg_tablesize = BEISCSI_SGLIST_ELEMENTS,
 544         .can_queue = BE2_IO_DEPTH,
 545         .this_id = -1,
 546         .max_sectors = BEISCSI_MAX_SECTORS,
 547         .cmd_per_lun = BEISCSI_CMD_PER_LUN,
 548         .use_clustering = ENABLE_CLUSTERING,
 549         .vendor_id = SCSI_NL_VID_TYPE_PCI | BE_VENDOR_ID,
 550
 551 };
 552
 553 static struct scsi_transport_template *beiscsi_scsi_transport;
 554
 555 static struct beiscsi_hba *beiscsi_hba_alloc(struct pci_dev *pcidev)
 556 {
 557         struct beiscsi_hba *phba;
 558         struct Scsi_Host *shost;
 559
 560         shost = iscsi_host_alloc(&beiscsi_sht, sizeof(*phba), 0);
 561         if (!shost) {
 562                 dev_err(&pcidev->dev,
 563                         "beiscsi_hba_alloc - iscsi_host_alloc failed\n");
 564                 return NULL;
 565         }
 566         shost->dma_boundary = pcidev->dma_mask;
 567         shost->max_id = BE2_MAX_SESSIONS;
 568         shost->max_channel = 0;
 569         shost->max_cmd_len = BEISCSI_MAX_CMD_LEN;
 570         shost->max_lun = BEISCSI_NUM_MAX_LUN;
 571         shost->transportt = beiscsi_scsi_transport;
 572         phba = iscsi_host_priv(shost);
 573         memset(phba, 0, sizeof(*phba));
 574         phba->shost = shost;
 575         phba->pcidev = pci_dev_get(pcidev);
 576         pci_set_drvdata(pcidev, phba);
 577         phba->interface_handle = 0xFFFFFFFF;
 578
 579         if (iscsi_host_add(shost, &phba->pcidev->dev))
 580                 goto free_devices;
 581
 582         return phba;
 583
 584 free_devices:
 585         pci_dev_put(phba->pcidev);
 586         iscsi_host_free(phba->shost);
 587         return NULL;
 588 }
 589
 590 static void beiscsi_unmap_pci_function(struct beiscsi_hba *phba)
 591 {
 592         if (phba->csr_va) {
 593                 iounmap(phba->csr_va);
 594                 phba->csr_va = NULL;
 595         }
 596         if (phba->db_va) {
 597                 iounmap(phba->db_va);
 598                 phba->db_va = NULL;
 599         }
 600         if (phba->pci_va) {
 601                 iounmap(phba->pci_va);
 602                 phba->pci_va = NULL;
 603         }
 604 }
 605
 606 static int beiscsi_map_pci_bars(struct beiscsi_hba *phba,
 607                                 struct pci_dev *pcidev)
 608 {
 609         u8 __iomem *addr;
 610         int pcicfg_reg;
 611
 612         addr = ioremap_nocache(pci_resource_start(pcidev, 2),
 613                                pci_resource_len(pcidev, 2));
 614         if (addr == NULL)
 615                 return -ENOMEM;
 616         phba->ctrl.csr = addr;
 617         phba->csr_va = addr;
 618         phba->csr_pa.u.a64.address = pci_resource_start(pcidev, 2);
 619
 620         addr = ioremap_nocache(pci_resource_start(pcidev, 4), 128 * 1024);
 621         if (addr == NULL)
 622                 goto pci_map_err;
 623         phba->ctrl.db = addr;
 624         phba->db_va = addr;
 625         phba->db_pa.u.a64.address =  pci_resource_start(pcidev, 4);
 626
 627         if (phba->generation == BE_GEN2)
 628                 pcicfg_reg = 1;
 629         else
 630                 pcicfg_reg = 0;
 631
 632         addr = ioremap_nocache(pci_resource_start(pcidev, pcicfg_reg),
 633                                pci_resource_len(pcidev, pcicfg_reg));
 634
 635         if (addr == NULL)
 636                 goto pci_map_err;
 637         phba->ctrl.pcicfg = addr;
 638         phba->pci_va = addr;
 639         phba->pci_pa.u.a64.address = pci_resource_start(pcidev, pcicfg_reg);
 640         return 0;
 641
 642 pci_map_err:
 643         beiscsi_unmap_pci_function(phba);
 644         return -ENOMEM;
 645 }
 646
 647 static int beiscsi_enable_pci(struct pci_dev *pcidev)
 648 {
 649         int ret;
 650
 651         ret = pci_enable_device(pcidev);
 652         if (ret) {
 653                 dev_err(&pcidev->dev,
 654                         "beiscsi_enable_pci - enable device failed\n");
 655                 return ret;
 656         }
 657
 658         pci_set_master(pcidev);
 659         if (pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64))) {
 660                 ret = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32));
 661                 if (ret) {
 662                         dev_err(&pcidev->dev, "Could not set PCI DMA Mask\n");
 663                         pci_disable_device(pcidev);
 664                         return ret;
 665                 }
 666         }
 667         return 0;
 668 }
 669
 670 static int be_ctrl_init(struct beiscsi_hba *phba, struct pci_dev *pdev)
 671 {
 672         struct be_ctrl_info *ctrl = &phba->ctrl;
 673         struct be_dma_mem *mbox_mem_alloc = &ctrl->mbox_mem_alloced;
 674         struct be_dma_mem *mbox_mem_align = &ctrl->mbox_mem;
 675         int status = 0;
 676
 677         ctrl->pdev = pdev;
 678         status = beiscsi_map_pci_bars(phba, pdev);
 679         if (status)
 680                 return status;
 681         mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
 682         mbox_mem_alloc->va = pci_alloc_consistent(pdev,
 683                                                   mbox_mem_alloc->size,
 684                                                   &mbox_mem_alloc->dma);
 685         if (!mbox_mem_alloc->va) {
 686                 beiscsi_unmap_pci_function(phba);
 687                 return -ENOMEM;
 688         }
 689
 690         mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
 691         mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
 692         mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
 693         memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
 694         spin_lock_init(&ctrl->mbox_lock);
 695         spin_lock_init(&phba->ctrl.mcc_lock);
 696         spin_lock_init(&phba->ctrl.mcc_cq_lock);
 697
 698         return status;
 699 }
 700
 701 static void beiscsi_get_params(struct beiscsi_hba *phba)
 702 {
 703         phba->params.ios_per_ctrl = (phba->fw_config.iscsi_icd_count
 704                                     - (phba->fw_config.iscsi_cid_count
 705                                     + BE2_TMFS
 706                                     + BE2_NOPOUT_REQ));
 707         phba->params.cxns_per_ctrl = phba->fw_config.iscsi_cid_count;
 708         phba->params.asyncpdus_per_ctrl = phba->fw_config.iscsi_cid_count * 2;
 709         phba->params.icds_per_ctrl = phba->fw_config.iscsi_icd_count;
 710         phba->params.num_sge_per_io = BE2_SGE;
 711         phba->params.defpdu_hdr_sz = BE2_DEFPDU_HDR_SZ;
 712         phba->params.defpdu_data_sz = BE2_DEFPDU_DATA_SZ;
 713         phba->params.eq_timer = 64;
 714         phba->params.num_eq_entries =
 715             (((BE2_CMDS_PER_CXN * 2 + phba->fw_config.iscsi_cid_count * 2
 716                                     + BE2_TMFS) / 512) + 1) * 512;
 717         phba->params.num_eq_entries = (phba->params.num_eq_entries < 1024)
 718                                 ? 1024 : phba->params.num_eq_entries;
 719         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
 720                     "BM_%d : phba->params.num_eq_entries=%d\n",
 721                     phba->params.num_eq_entries);
 722         phba->params.num_cq_entries =
 723             (((BE2_CMDS_PER_CXN * 2 +  phba->fw_config.iscsi_cid_count * 2
 724                                     + BE2_TMFS) / 512) + 1) * 512;
 725         phba->params.wrbs_per_cxn = 256;
 726 }
 727
 728 static void hwi_ring_eq_db(struct beiscsi_hba *phba,
 729                            unsigned int id, unsigned int clr_interrupt,
 730                            unsigned int num_processed,
 731                            unsigned char rearm, unsigned char event)
 732 {
 733         u32 val = 0;
 734         val |= id & DB_EQ_RING_ID_MASK;
 735         if (rearm)
 736                 val |= 1 << DB_EQ_REARM_SHIFT;
 737         if (clr_interrupt)
 738                 val |= 1 << DB_EQ_CLR_SHIFT;
 739         if (event)
 740                 val |= 1 << DB_EQ_EVNT_SHIFT;
 741         val |= num_processed << DB_EQ_NUM_POPPED_SHIFT;
 742         iowrite32(val, phba->db_va + DB_EQ_OFFSET);
 743 }
 744
 745 /**
 746  * be_isr_mcc - The isr routine of the driver.
 747  * @irq: Not used
 748  * @dev_id: Pointer to host adapter structure
 749  */
 750 static irqreturn_t be_isr_mcc(int irq, void *dev_id)
 751 {
 752         struct beiscsi_hba *phba;
 753         struct be_eq_entry *eqe = NULL;
 754         struct be_queue_info *eq;
 755         struct be_queue_info *mcc;
 756         unsigned int num_eq_processed;
 757         struct be_eq_obj *pbe_eq;
 758         unsigned long flags;
 759
 760         pbe_eq = dev_id;
 761         eq = &pbe_eq->q;
 762         phba =  pbe_eq->phba;
 763         mcc = &phba->ctrl.mcc_obj.cq;
 764         eqe = queue_tail_node(eq);
 765
 766         num_eq_processed = 0;
 767
 768         while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
 769                                 & EQE_VALID_MASK) {
 770                 if (((eqe->dw[offsetof(struct amap_eq_entry,
 771                      resource_id) / 32] &
 772                      EQE_RESID_MASK) >> 16) == mcc->id) {
 773                         spin_lock_irqsave(&phba->isr_lock, flags);
 774                         phba->todo_mcc_cq = 1;
 775                         spin_unlock_irqrestore(&phba->isr_lock, flags);
 776                 }
 777                 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
 778                 queue_tail_inc(eq);
 779                 eqe = queue_tail_node(eq);
 780                 num_eq_processed++;
 781         }
 782         if (phba->todo_mcc_cq)
 783                 queue_work(phba->wq, &phba->work_cqs);
 784         if (num_eq_processed)
 785                 hwi_ring_eq_db(phba, eq->id, 1, num_eq_processed, 1, 1);
 786
 787         return IRQ_HANDLED;
 788 }
 789
 790 /**
 791  * be_isr_msix - The isr routine of the driver.
 792  * @irq: Not used
 793  * @dev_id: Pointer to host adapter structure
 794  */
 795 static irqreturn_t be_isr_msix(int irq, void *dev_id)
 796 {
 797         struct beiscsi_hba *phba;
 798         struct be_eq_entry *eqe = NULL;
 799         struct be_queue_info *eq;
 800         struct be_queue_info *cq;
 801         unsigned int num_eq_processed;
 802         struct be_eq_obj *pbe_eq;
 803         unsigned long flags;
 804
 805         pbe_eq = dev_id;
 806         eq = &pbe_eq->q;
 807         cq = pbe_eq->cq;
 808         eqe = queue_tail_node(eq);
 809
 810         phba = pbe_eq->phba;
 811         num_eq_processed = 0;
 812         if (blk_iopoll_enabled) {
 813                 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
 814                                         & EQE_VALID_MASK) {
 815                         if (!blk_iopoll_sched_prep(&pbe_eq->iopoll))
 816                                 blk_iopoll_sched(&pbe_eq->iopoll);
 817
 818                         AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
 819                         queue_tail_inc(eq);
 820                         eqe = queue_tail_node(eq);
 821                         num_eq_processed++;
 822                 }
 823                 if (num_eq_processed)
 824                         hwi_ring_eq_db(phba, eq->id, 1, num_eq_processed, 0, 1);
 825
 826                 return IRQ_HANDLED;
 827         } else {
 828                 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
 829                                                 & EQE_VALID_MASK) {
 830                         spin_lock_irqsave(&phba->isr_lock, flags);
 831                         phba->todo_cq = 1;
 832                         spin_unlock_irqrestore(&phba->isr_lock, flags);
 833                         AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
 834                         queue_tail_inc(eq);
 835                         eqe = queue_tail_node(eq);
 836                         num_eq_processed++;
 837                 }
 838                 if (phba->todo_cq)
 839                         queue_work(phba->wq, &phba->work_cqs);
 840
 841                 if (num_eq_processed)
 842                         hwi_ring_eq_db(phba, eq->id, 1, num_eq_processed, 1, 1);
 843
 844                 return IRQ_HANDLED;
 845         }
 846 }
 847
 848 /**
 849  * be_isr - The isr routine of the driver.
 850  * @irq: Not used
 851  * @dev_id: Pointer to host adapter structure
 852  */
 853 static irqreturn_t be_isr(int irq, void *dev_id)
 854 {
 855         struct beiscsi_hba *phba;
 856         struct hwi_controller *phwi_ctrlr;
 857         struct hwi_context_memory *phwi_context;
 858         struct be_eq_entry *eqe = NULL;
 859         struct be_queue_info *eq;
 860         struct be_queue_info *cq;
 861         struct be_queue_info *mcc;
 862         unsigned long flags, index;
 863         unsigned int num_mcceq_processed, num_ioeq_processed;
 864         struct be_ctrl_info *ctrl;
 865         struct be_eq_obj *pbe_eq;
 866         int isr;
 867
 868         phba = dev_id;
 869         ctrl = &phba->ctrl;
 870         isr = ioread32(ctrl->csr + CEV_ISR0_OFFSET +
 871                        (PCI_FUNC(ctrl->pdev->devfn) * CEV_ISR_SIZE));
 872         if (!isr)
 873                 return IRQ_NONE;
 874
 875         phwi_ctrlr = phba->phwi_ctrlr;
 876         phwi_context = phwi_ctrlr->phwi_ctxt;
 877         pbe_eq = &phwi_context->be_eq[0];
 878
 879         eq = &phwi_context->be_eq[0].q;
 880         mcc = &phba->ctrl.mcc_obj.cq;
 881         index = 0;
 882         eqe = queue_tail_node(eq);
 883
 884         num_ioeq_processed = 0;
 885         num_mcceq_processed = 0;
 886         if (blk_iopoll_enabled) {
 887                 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
 888                                         & EQE_VALID_MASK) {
 889                         if (((eqe->dw[offsetof(struct amap_eq_entry,
 890                              resource_id) / 32] &
 891                              EQE_RESID_MASK) >> 16) == mcc->id) {
 892                                 spin_lock_irqsave(&phba->isr_lock, flags);
 893                                 phba->todo_mcc_cq = 1;
 894                                 spin_unlock_irqrestore(&phba->isr_lock, flags);
 895                                 num_mcceq_processed++;
 896                         } else {
 897                                 if (!blk_iopoll_sched_prep(&pbe_eq->iopoll))
 898                                         blk_iopoll_sched(&pbe_eq->iopoll);
 899                                 num_ioeq_processed++;
 900                         }
 901                         AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
 902                         queue_tail_inc(eq);
 903                         eqe = queue_tail_node(eq);
 904                 }
 905                 if (num_ioeq_processed || num_mcceq_processed) {
 906                         if (phba->todo_mcc_cq)
 907                                 queue_work(phba->wq, &phba->work_cqs);
 908
 909                         if ((num_mcceq_processed) && (!num_ioeq_processed))
 910                                 hwi_ring_eq_db(phba, eq->id, 0,
 911                                               (num_ioeq_processed +
 912                                                num_mcceq_processed) , 1, 1);
 913                         else
 914                                 hwi_ring_eq_db(phba, eq->id, 0,
 915                                                (num_ioeq_processed +
 916                                                 num_mcceq_processed), 0, 1);
 917
 918                         return IRQ_HANDLED;
 919                 } else
 920                         return IRQ_NONE;
 921         } else {
 922                 cq = &phwi_context->be_cq[0];
 923                 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
 924                                                 & EQE_VALID_MASK) {
 925
 926                         if (((eqe->dw[offsetof(struct amap_eq_entry,
 927                              resource_id) / 32] &
 928                              EQE_RESID_MASK) >> 16) != cq->id) {
 929                                 spin_lock_irqsave(&phba->isr_lock, flags);
 930                                 phba->todo_mcc_cq = 1;
 931                                 spin_unlock_irqrestore(&phba->isr_lock, flags);
 932                         } else {
 933                                 spin_lock_irqsave(&phba->isr_lock, flags);
 934                                 phba->todo_cq = 1;
 935                                 spin_unlock_irqrestore(&phba->isr_lock, flags);
 936                         }
 937                         AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
 938                         queue_tail_inc(eq);
 939                         eqe = queue_tail_node(eq);
 940                         num_ioeq_processed++;
 941                 }
 942                 if (phba->todo_cq || phba->todo_mcc_cq)
 943                         queue_work(phba->wq, &phba->work_cqs);
 944
 945                 if (num_ioeq_processed) {
 946                         hwi_ring_eq_db(phba, eq->id, 0,
 947                                        num_ioeq_processed, 1, 1);
 948                         return IRQ_HANDLED;
 949                 } else
 950                         return IRQ_NONE;
 951         }
 952 }
 953
 954 static int beiscsi_init_irqs(struct beiscsi_hba *phba)
 955 {
 956         struct pci_dev *pcidev = phba->pcidev;
 957         struct hwi_controller *phwi_ctrlr;
 958         struct hwi_context_memory *phwi_context;
 959         int ret, msix_vec, i, j;
 960
 961         phwi_ctrlr = phba->phwi_ctrlr;
 962         phwi_context = phwi_ctrlr->phwi_ctxt;
 963
 964         if (phba->msix_enabled) {
 965                 for (i = 0; i < phba->num_cpus; i++) {
 966                         phba->msi_name[i] = kzalloc(BEISCSI_MSI_NAME,
 967                                                     GFP_KERNEL);
 968                         if (!phba->msi_name[i]) {
 969                                 ret = -ENOMEM;
 970                                 goto free_msix_irqs;
 971                         }
 972
 973                         sprintf(phba->msi_name[i], "beiscsi_%02x_%02x",
 974                                 phba->shost->host_no, i);
 975                         msix_vec = phba->msix_entries[i].vector;
 976                         ret = request_irq(msix_vec, be_isr_msix, 0,
 977                                           phba->msi_name[i],
 978                                           &phwi_context->be_eq[i]);
 979                         if (ret) {
 980                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
 981                                             "BM_%d : beiscsi_init_irqs-Failed to"
 982                                             "register msix for i = %d\n",
 983                                             i);
 984                                 kfree(phba->msi_name[i]);
 985                                 goto free_msix_irqs;
 986                         }
 987                 }
 988                 phba->msi_name[i] = kzalloc(BEISCSI_MSI_NAME, GFP_KERNEL);
 989                 if (!phba->msi_name[i]) {
 990                         ret = -ENOMEM;
 991                         goto free_msix_irqs;
 992                 }
 993                 sprintf(phba->msi_name[i], "beiscsi_mcc_%02x",
 994                         phba->shost->host_no);
 995                 msix_vec = phba->msix_entries[i].vector;
 996                 ret = request_irq(msix_vec, be_isr_mcc, 0, phba->msi_name[i],
 997                                   &phwi_context->be_eq[i]);
 998                 if (ret) {
 999                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT ,
1000                                     "BM_%d : beiscsi_init_irqs-"
1001                                     "Failed to register beiscsi_msix_mcc\n");
1002                         kfree(phba->msi_name[i]);
1003                         goto free_msix_irqs;
1004                 }
1005
1006         } else {
1007                 ret = request_irq(pcidev->irq, be_isr, IRQF_SHARED,
1008                                   "beiscsi", phba);
1009                 if (ret) {
1010                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
1011                                     "BM_%d : beiscsi_init_irqs-"
1012                                     "Failed to register irq\\n");
1013                         return ret;
1014                 }
1015         }
1016         return 0;
1017 free_msix_irqs:
1018         for (j = i - 1; j >= 0; j--) {
1019                 kfree(phba->msi_name[j]);
1020                 msix_vec = phba->msix_entries[j].vector;
1021                 free_irq(msix_vec, &phwi_context->be_eq[j]);
1022         }
1023         return ret;
1024 }
1025
1026 static void hwi_ring_cq_db(struct beiscsi_hba *phba,
1027                            unsigned int id, unsigned int num_processed,
1028                            unsigned char rearm, unsigned char event)
1029 {
1030         u32 val = 0;
1031         val |= id & DB_CQ_RING_ID_MASK;
1032         if (rearm)
1033                 val |= 1 << DB_CQ_REARM_SHIFT;
1034         val |= num_processed << DB_CQ_NUM_POPPED_SHIFT;
1035         iowrite32(val, phba->db_va + DB_CQ_OFFSET);
1036 }
1037
1038 static unsigned int
1039 beiscsi_process_async_pdu(struct beiscsi_conn *beiscsi_conn,
1040                           struct beiscsi_hba *phba,
1041                           unsigned short cid,
1042                           struct pdu_base *ppdu,
1043                           unsigned long pdu_len,
1044                           void *pbuffer, unsigned long buf_len)
1045 {
1046         struct iscsi_conn *conn = beiscsi_conn->conn;
1047         struct iscsi_session *session = conn->session;
1048         struct iscsi_task *task;
1049         struct beiscsi_io_task *io_task;
1050         struct iscsi_hdr *login_hdr;
1051
1052         switch (ppdu->dw[offsetof(struct amap_pdu_base, opcode) / 32] &
1053                                                 PDUBASE_OPCODE_MASK) {
1054         case ISCSI_OP_NOOP_IN:
1055                 pbuffer = NULL;
1056                 buf_len = 0;
1057                 break;
1058         case ISCSI_OP_ASYNC_EVENT:
1059                 break;
1060         case ISCSI_OP_REJECT:
1061                 WARN_ON(!pbuffer);
1062                 WARN_ON(!(buf_len == 48));
1063                 beiscsi_log(phba, KERN_ERR,
1064                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1065                             "BM_%d : In ISCSI_OP_REJECT\n");
1066                 break;
1067         case ISCSI_OP_LOGIN_RSP:
1068         case ISCSI_OP_TEXT_RSP:
1069                 task = conn->login_task;
1070                 io_task = task->dd_data;
1071                 login_hdr = (struct iscsi_hdr *)ppdu;
1072                 login_hdr->itt = io_task->libiscsi_itt;
1073                 break;
1074         default:
1075                 beiscsi_log(phba, KERN_WARNING,
1076                             BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1077                             "BM_%d : Unrecognized opcode 0x%x in async msg\n",
1078                             (ppdu->
1079                              dw[offsetof(struct amap_pdu_base, opcode) / 32]
1080                              & PDUBASE_OPCODE_MASK));
1081                 return 1;
1082         }
1083
1084         spin_lock_bh(&session->lock);
1085         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)ppdu, pbuffer, buf_len);
1086         spin_unlock_bh(&session->lock);
1087         return 0;
1088 }
1089
1090 static struct sgl_handle *alloc_io_sgl_handle(struct beiscsi_hba *phba)
1091 {
1092         struct sgl_handle *psgl_handle;
1093
1094         if (phba->io_sgl_hndl_avbl) {
1095                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
1096                             "BM_%d : In alloc_io_sgl_handle,"
1097                             " io_sgl_alloc_index=%d\n",
1098                             phba->io_sgl_alloc_index);
1099
1100                 psgl_handle = phba->io_sgl_hndl_base[phba->
1101                                                 io_sgl_alloc_index];
1102                 phba->io_sgl_hndl_base[phba->io_sgl_alloc_index] = NULL;
1103                 phba->io_sgl_hndl_avbl--;
1104                 if (phba->io_sgl_alloc_index == (phba->params.
1105                                                  ios_per_ctrl - 1))
1106                         phba->io_sgl_alloc_index = 0;
1107                 else
1108                         phba->io_sgl_alloc_index++;
1109         } else
1110                 psgl_handle = NULL;
1111         return psgl_handle;
1112 }
1113
1114 static void
1115 free_io_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
1116 {
1117         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
1118                     "BM_%d : In free_,io_sgl_free_index=%d\n",
1119                     phba->io_sgl_free_index);
1120
1121         if (phba->io_sgl_hndl_base[phba->io_sgl_free_index]) {
1122                 /*
1123                  * this can happen if clean_task is called on a task that
1124                  * failed in xmit_task or alloc_pdu.
1125                  */
1126                  beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
1127                              "BM_%d : Double Free in IO SGL io_sgl_free_index=%d,"
1128                              "value there=%p\n", phba->io_sgl_free_index,
1129                              phba->io_sgl_hndl_base
1130                              [phba->io_sgl_free_index]);
1131                 return;
1132         }
1133         phba->io_sgl_hndl_base[phba->io_sgl_free_index] = psgl_handle;
1134         phba->io_sgl_hndl_avbl++;
1135         if (phba->io_sgl_free_index == (phba->params.ios_per_ctrl - 1))
1136                 phba->io_sgl_free_index = 0;
1137         else
1138                 phba->io_sgl_free_index++;
1139 }
1140
1141 /**
1142  * alloc_wrb_handle - To allocate a wrb handle
1143  * @phba: The hba pointer
1144  * @cid: The cid to use for allocation
1145  *
1146  * This happens under session_lock until submission to chip
1147  */
1148 struct wrb_handle *alloc_wrb_handle(struct beiscsi_hba *phba, unsigned int cid)
1149 {
1150         struct hwi_wrb_context *pwrb_context;
1151         struct hwi_controller *phwi_ctrlr;
1152         struct wrb_handle *pwrb_handle, *pwrb_handle_tmp;
1153
1154         phwi_ctrlr = phba->phwi_ctrlr;
1155         pwrb_context = &phwi_ctrlr->wrb_context[cid];
1156         if (pwrb_context->wrb_handles_available >= 2) {
1157                 pwrb_handle = pwrb_context->pwrb_handle_base[
1158                                             pwrb_context->alloc_index];
1159                 pwrb_context->wrb_handles_available--;
1160                 if (pwrb_context->alloc_index ==
1161                                                 (phba->params.wrbs_per_cxn - 1))
1162                         pwrb_context->alloc_index = 0;
1163                 else
1164                         pwrb_context->alloc_index++;
1165                 pwrb_handle_tmp = pwrb_context->pwrb_handle_base[
1166                                                 pwrb_context->alloc_index];
1167                 pwrb_handle->nxt_wrb_index = pwrb_handle_tmp->wrb_index;
1168         } else
1169                 pwrb_handle = NULL;
1170         return pwrb_handle;
1171 }
1172
1173 /**
1174  * free_wrb_handle - To free the wrb handle back to pool
1175  * @phba: The hba pointer
1176  * @pwrb_context: The context to free from
1177  * @pwrb_handle: The wrb_handle to free
1178  *
1179  * This happens under session_lock until submission to chip
1180  */
1181 static void
1182 free_wrb_handle(struct beiscsi_hba *phba, struct hwi_wrb_context *pwrb_context,
1183                 struct wrb_handle *pwrb_handle)
1184 {
1185         pwrb_context->pwrb_handle_base[pwrb_context->free_index] = pwrb_handle;
1186         pwrb_context->wrb_handles_available++;
1187         if (pwrb_context->free_index == (phba->params.wrbs_per_cxn - 1))
1188                 pwrb_context->free_index = 0;
1189         else
1190                 pwrb_context->free_index++;
1191
1192         beiscsi_log(phba, KERN_INFO,
1193                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1194                     "BM_%d : FREE WRB: pwrb_handle=%p free_index=0x%x"
1195                     "wrb_handles_available=%d\n",
1196                     pwrb_handle, pwrb_context->free_index,
1197                     pwrb_context->wrb_handles_available);
1198 }
1199
1200 static struct sgl_handle *alloc_mgmt_sgl_handle(struct beiscsi_hba *phba)
1201 {
1202         struct sgl_handle *psgl_handle;
1203
1204         if (phba->eh_sgl_hndl_avbl) {
1205                 psgl_handle = phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index];
1206                 phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index] = NULL;
1207                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
1208                             "BM_%d : mgmt_sgl_alloc_index=%d=0x%x\n",
1209                             phba->eh_sgl_alloc_index,
1210                             phba->eh_sgl_alloc_index);
1211
1212                 phba->eh_sgl_hndl_avbl--;
1213                 if (phba->eh_sgl_alloc_index ==
1214                     (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl -
1215                      1))
1216                         phba->eh_sgl_alloc_index = 0;
1217                 else
1218                         phba->eh_sgl_alloc_index++;
1219         } else
1220                 psgl_handle = NULL;
1221         return psgl_handle;
1222 }
1223
1224 void
1225 free_mgmt_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
1226 {
1227
1228         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
1229                     "BM_%d : In  free_mgmt_sgl_handle,"
1230                     "eh_sgl_free_index=%d\n",
1231                     phba->eh_sgl_free_index);
1232
1233         if (phba->eh_sgl_hndl_base[phba->eh_sgl_free_index]) {
1234                 /*
1235                  * this can happen if clean_task is called on a task that
1236                  * failed in xmit_task or alloc_pdu.
1237                  */
1238                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_CONFIG,
1239                             "BM_%d : Double Free in eh SGL ,"
1240                             "eh_sgl_free_index=%d\n",
1241                             phba->eh_sgl_free_index);
1242                 return;
1243         }
1244         phba->eh_sgl_hndl_base[phba->eh_sgl_free_index] = psgl_handle;
1245         phba->eh_sgl_hndl_avbl++;
1246         if (phba->eh_sgl_free_index ==
1247             (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl - 1))
1248                 phba->eh_sgl_free_index = 0;
1249         else
1250                 phba->eh_sgl_free_index++;
1251 }
1252
1253 static void
1254 be_complete_io(struct beiscsi_conn *beiscsi_conn,
1255                struct iscsi_task *task, struct sol_cqe *psol)
1256 {
1257         struct beiscsi_io_task *io_task = task->dd_data;
1258         struct be_status_bhs *sts_bhs =
1259                                 (struct be_status_bhs *)io_task->cmd_bhs;
1260         struct iscsi_conn *conn = beiscsi_conn->conn;
1261         unsigned char *sense;
1262         u32 resid = 0, exp_cmdsn, max_cmdsn;
1263         u8 rsp, status, flags;
1264
1265         exp_cmdsn = (psol->
1266                         dw[offsetof(struct amap_sol_cqe, i_exp_cmd_sn) / 32]
1267                         & SOL_EXP_CMD_SN_MASK);
1268         max_cmdsn = ((psol->
1269                         dw[offsetof(struct amap_sol_cqe, i_exp_cmd_sn) / 32]
1270                         & SOL_EXP_CMD_SN_MASK) +
1271                         ((psol->dw[offsetof(struct amap_sol_cqe, i_cmd_wnd)
1272                                 / 32] & SOL_CMD_WND_MASK) >> 24) - 1);
1273         rsp = ((psol->dw[offsetof(struct amap_sol_cqe, i_resp) / 32]
1274                                                 & SOL_RESP_MASK) >> 16);
1275         status = ((psol->dw[offsetof(struct amap_sol_cqe, i_sts) / 32]
1276                                                 & SOL_STS_MASK) >> 8);
1277         flags = ((psol->dw[offsetof(struct amap_sol_cqe, i_flags) / 32]
1278                                         & SOL_FLAGS_MASK) >> 24) | 0x80;
1279         if (!task->sc) {
1280                 if (io_task->scsi_cmnd)
1281                         scsi_dma_unmap(io_task->scsi_cmnd);
1282
1283                 return;
1284         }
1285         task->sc->result = (DID_OK << 16) | status;
1286         if (rsp != ISCSI_STATUS_CMD_COMPLETED) {
1287                 task->sc->result = DID_ERROR << 16;
1288                 goto unmap;
1289         }
1290
1291         /* bidi not initially supported */
1292         if (flags & (ISCSI_FLAG_CMD_UNDERFLOW | ISCSI_FLAG_CMD_OVERFLOW)) {
1293                 resid = (psol->dw[offsetof(struct amap_sol_cqe, i_res_cnt) /
1294                                 32] & SOL_RES_CNT_MASK);
1295
1296                 if (!status && (flags & ISCSI_FLAG_CMD_OVERFLOW))
1297                         task->sc->result = DID_ERROR << 16;
1298
1299                 if (flags & ISCSI_FLAG_CMD_UNDERFLOW) {
1300                         scsi_set_resid(task->sc, resid);
1301                         if (!status && (scsi_bufflen(task->sc) - resid <
1302                             task->sc->underflow))
1303                                 task->sc->result = DID_ERROR << 16;
1304                 }
1305         }
1306
1307         if (status == SAM_STAT_CHECK_CONDITION) {
1308                 u16 sense_len;
1309                 unsigned short *slen = (unsigned short *)sts_bhs->sense_info;
1310
1311                 sense = sts_bhs->sense_info + sizeof(unsigned short);
1312                 sense_len = be16_to_cpu(*slen);
1313                 memcpy(task->sc->sense_buffer, sense,
1314                        min_t(u16, sense_len, SCSI_SENSE_BUFFERSIZE));
1315         }
1316
1317         if (io_task->cmd_bhs->iscsi_hdr.flags & ISCSI_FLAG_CMD_READ) {
1318                 if (psol->dw[offsetof(struct amap_sol_cqe, i_res_cnt) / 32]
1319                                                         & SOL_RES_CNT_MASK)
1320                          conn->rxdata_octets += (psol->
1321                              dw[offsetof(struct amap_sol_cqe, i_res_cnt) / 32]
1322                              & SOL_RES_CNT_MASK);
1323         }
1324 unmap:
1325         scsi_dma_unmap(io_task->scsi_cmnd);
1326         iscsi_complete_scsi_task(task, exp_cmdsn, max_cmdsn);
1327 }
1328
1329 static void
1330 be_complete_logout(struct beiscsi_conn *beiscsi_conn,
1331                    struct iscsi_task *task, struct sol_cqe *psol)
1332 {
1333         struct iscsi_logout_rsp *hdr;
1334         struct beiscsi_io_task *io_task = task->dd_data;
1335         struct iscsi_conn *conn = beiscsi_conn->conn;
1336
1337         hdr = (struct iscsi_logout_rsp *)task->hdr;
1338         hdr->opcode = ISCSI_OP_LOGOUT_RSP;
1339         hdr->t2wait = 5;
1340         hdr->t2retain = 0;
1341         hdr->flags = ((psol->dw[offsetof(struct amap_sol_cqe, i_flags) / 32]
1342                                         & SOL_FLAGS_MASK) >> 24) | 0x80;
1343         hdr->response = (psol->dw[offsetof(struct amap_sol_cqe, i_resp) /
1344                                         32] & SOL_RESP_MASK);
1345         hdr->exp_cmdsn = cpu_to_be32(psol->
1346                         dw[offsetof(struct amap_sol_cqe, i_exp_cmd_sn) / 32]
1347                                         & SOL_EXP_CMD_SN_MASK);
1348         hdr->max_cmdsn = be32_to_cpu((psol->
1349                          dw[offsetof(struct amap_sol_cqe, i_exp_cmd_sn) / 32]
1350                                         & SOL_EXP_CMD_SN_MASK) +
1351                         ((psol->dw[offsetof(struct amap_sol_cqe, i_cmd_wnd)
1352                                         / 32] & SOL_CMD_WND_MASK) >> 24) - 1);
1353         hdr->dlength[0] = 0;
1354         hdr->dlength[1] = 0;
1355         hdr->dlength[2] = 0;
1356         hdr->hlength = 0;
1357         hdr->itt = io_task->libiscsi_itt;
1358         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1359 }
1360
1361 static void
1362 be_complete_tmf(struct beiscsi_conn *beiscsi_conn,
1363                 struct iscsi_task *task, struct sol_cqe *psol)
1364 {
1365         struct iscsi_tm_rsp *hdr;
1366         struct iscsi_conn *conn = beiscsi_conn->conn;
1367         struct beiscsi_io_task *io_task = task->dd_data;
1368
1369         hdr = (struct iscsi_tm_rsp *)task->hdr;
1370         hdr->opcode = ISCSI_OP_SCSI_TMFUNC_RSP;
1371         hdr->flags = ((psol->dw[offsetof(struct amap_sol_cqe, i_flags) / 32]
1372                                         & SOL_FLAGS_MASK) >> 24) | 0x80;
1373         hdr->response = (psol->dw[offsetof(struct amap_sol_cqe, i_resp) /
1374                                         32] & SOL_RESP_MASK);
1375         hdr->exp_cmdsn = cpu_to_be32(psol->dw[offsetof(struct amap_sol_cqe,
1376                                     i_exp_cmd_sn) / 32] & SOL_EXP_CMD_SN_MASK);
1377         hdr->max_cmdsn = be32_to_cpu((psol->dw[offsetof(struct amap_sol_cqe,
1378                         i_exp_cmd_sn) / 32] & SOL_EXP_CMD_SN_MASK) +
1379                         ((psol->dw[offsetof(struct amap_sol_cqe, i_cmd_wnd)
1380                         / 32] & SOL_CMD_WND_MASK) >> 24) - 1);
1381         hdr->itt = io_task->libiscsi_itt;
1382         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1383 }
1384
1385 static void
1386 hwi_complete_drvr_msgs(struct beiscsi_conn *beiscsi_conn,
1387                        struct beiscsi_hba *phba, struct sol_cqe *psol)
1388 {
1389         struct hwi_wrb_context *pwrb_context;
1390         struct wrb_handle *pwrb_handle = NULL;
1391         struct hwi_controller *phwi_ctrlr;
1392         struct iscsi_task *task;
1393         struct beiscsi_io_task *io_task;
1394         struct iscsi_conn *conn = beiscsi_conn->conn;
1395         struct iscsi_session *session = conn->session;
1396
1397         phwi_ctrlr = phba->phwi_ctrlr;
1398         pwrb_context = &phwi_ctrlr->wrb_context[((psol->
1399                                 dw[offsetof(struct amap_sol_cqe, cid) / 32] &
1400                                 SOL_CID_MASK) >> 6) -
1401                                 phba->fw_config.iscsi_cid_start];
1402         pwrb_handle = pwrb_context->pwrb_handle_basestd[((psol->
1403                                 dw[offsetof(struct amap_sol_cqe, wrb_index) /
1404                                 32] & SOL_WRB_INDEX_MASK) >> 16)];
1405         task = pwrb_handle->pio_handle;
1406
1407         io_task = task->dd_data;
1408         spin_lock_bh(&phba->mgmt_sgl_lock);
1409         free_mgmt_sgl_handle(phba, io_task->psgl_handle);
1410         spin_unlock_bh(&phba->mgmt_sgl_lock);
1411         spin_lock_bh(&session->lock);
1412         free_wrb_handle(phba, pwrb_context, pwrb_handle);
1413         spin_unlock_bh(&session->lock);
1414 }
1415
1416 static void
1417 be_complete_nopin_resp(struct beiscsi_conn *beiscsi_conn,
1418                        struct iscsi_task *task, struct sol_cqe *psol)
1419 {
1420         struct iscsi_nopin *hdr;
1421         struct iscsi_conn *conn = beiscsi_conn->conn;
1422         struct beiscsi_io_task *io_task = task->dd_data;
1423
1424         hdr = (struct iscsi_nopin *)task->hdr;
1425         hdr->flags = ((psol->dw[offsetof(struct amap_sol_cqe, i_flags) / 32]
1426                         & SOL_FLAGS_MASK) >> 24) | 0x80;
1427         hdr->exp_cmdsn = cpu_to_be32(psol->dw[offsetof(struct amap_sol_cqe,
1428                                      i_exp_cmd_sn) / 32] & SOL_EXP_CMD_SN_MASK);
1429         hdr->max_cmdsn = be32_to_cpu((psol->dw[offsetof(struct amap_sol_cqe,
1430                         i_exp_cmd_sn) / 32] & SOL_EXP_CMD_SN_MASK) +
1431                         ((psol->dw[offsetof(struct amap_sol_cqe, i_cmd_wnd)
1432                         / 32] & SOL_CMD_WND_MASK) >> 24) - 1);
1433         hdr->opcode = ISCSI_OP_NOOP_IN;
1434         hdr->itt = io_task->libiscsi_itt;
1435         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1436 }
1437
1438 static void hwi_complete_cmd(struct beiscsi_conn *beiscsi_conn,
1439                              struct beiscsi_hba *phba, struct sol_cqe *psol)
1440 {
1441         struct hwi_wrb_context *pwrb_context;
1442         struct wrb_handle *pwrb_handle;
1443         struct iscsi_wrb *pwrb = NULL;
1444         struct hwi_controller *phwi_ctrlr;
1445         struct iscsi_task *task;
1446         unsigned int type;
1447         struct iscsi_conn *conn = beiscsi_conn->conn;
1448         struct iscsi_session *session = conn->session;
1449
1450         phwi_ctrlr = phba->phwi_ctrlr;
1451         pwrb_context = &phwi_ctrlr->wrb_context[((psol->dw[offsetof
1452                                 (struct amap_sol_cqe, cid) / 32]
1453                                 & SOL_CID_MASK) >> 6) -
1454                                 phba->fw_config.iscsi_cid_start];
1455         pwrb_handle = pwrb_context->pwrb_handle_basestd[((psol->
1456                                 dw[offsetof(struct amap_sol_cqe, wrb_index) /
1457                                 32] & SOL_WRB_INDEX_MASK) >> 16)];
1458         task = pwrb_handle->pio_handle;
1459         pwrb = pwrb_handle->pwrb;
1460         type = (pwrb->dw[offsetof(struct amap_iscsi_wrb, type) / 32] &
1461                                  WRB_TYPE_MASK) >> 28;
1462
1463         spin_lock_bh(&session->lock);
1464         switch (type) {
1465         case HWH_TYPE_IO:
1466         case HWH_TYPE_IO_RD:
1467                 if ((task->hdr->opcode & ISCSI_OPCODE_MASK) ==
1468                      ISCSI_OP_NOOP_OUT)
1469                         be_complete_nopin_resp(beiscsi_conn, task, psol);
1470                 else
1471                         be_complete_io(beiscsi_conn, task, psol);
1472                 break;
1473
1474         case HWH_TYPE_LOGOUT:
1475                 if ((task->hdr->opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGOUT)
1476                         be_complete_logout(beiscsi_conn, task, psol);
1477                 else
1478                         be_complete_tmf(beiscsi_conn, task, psol);
1479
1480                 break;
1481
1482         case HWH_TYPE_LOGIN:
1483                 beiscsi_log(phba, KERN_ERR,
1484                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1485                             "BM_%d :\t\t No HWH_TYPE_LOGIN Expected in"
1486                             " hwi_complete_cmd- Solicited path\n");
1487                 break;
1488
1489         case HWH_TYPE_NOP:
1490                 be_complete_nopin_resp(beiscsi_conn, task, psol);
1491                 break;
1492
1493         default:
1494                 beiscsi_log(phba, KERN_WARNING,
1495                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1496                             "BM_%d : In hwi_complete_cmd, unknown type = %d"
1497                             "wrb_index 0x%x CID 0x%x\n", type,
1498                             ((psol->dw[offsetof(struct amap_iscsi_wrb,
1499                             type) / 32] & SOL_WRB_INDEX_MASK) >> 16),
1500                             ((psol->dw[offsetof(struct amap_sol_cqe,
1501                             cid) / 32] & SOL_CID_MASK) >> 6));
1502                 break;
1503         }
1504
1505         spin_unlock_bh(&session->lock);
1506 }
1507
1508 static struct list_head *hwi_get_async_busy_list(struct hwi_async_pdu_context
1509                                           *pasync_ctx, unsigned int is_header,
1510                                           unsigned int host_write_ptr)
1511 {
1512         if (is_header)
1513                 return &pasync_ctx->async_entry[host_write_ptr].
1514                     header_busy_list;
1515         else
1516                 return &pasync_ctx->async_entry[host_write_ptr].data_busy_list;
1517 }
1518
1519 static struct async_pdu_handle *
1520 hwi_get_async_handle(struct beiscsi_hba *phba,
1521                      struct beiscsi_conn *beiscsi_conn,
1522                      struct hwi_async_pdu_context *pasync_ctx,
1523                      struct i_t_dpdu_cqe *pdpdu_cqe, unsigned int *pcq_index)
1524 {
1525         struct be_bus_address phys_addr;
1526         struct list_head *pbusy_list;
1527         struct async_pdu_handle *pasync_handle = NULL;
1528         unsigned char is_header = 0;
1529
1530         phys_addr.u.a32.address_lo =
1531             pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe, db_addr_lo) / 32] -
1532             ((pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe, dpl) / 32]
1533                                                 & PDUCQE_DPL_MASK) >> 16);
1534         phys_addr.u.a32.address_hi =
1535             pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe, db_addr_hi) / 32];
1536
1537         phys_addr.u.a64.address =
1538                         *((unsigned long long *)(&phys_addr.u.a64.address));
1539
1540         switch (pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe, code) / 32]
1541                         & PDUCQE_CODE_MASK) {
1542         case UNSOL_HDR_NOTIFY:
1543                 is_header = 1;
1544
1545                 pbusy_list = hwi_get_async_busy_list(pasync_ctx, 1,
1546                         (pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
1547                         index) / 32] & PDUCQE_INDEX_MASK));
1548                 break;
1549         case UNSOL_DATA_NOTIFY:
1550                 pbusy_list = hwi_get_async_busy_list(pasync_ctx, 0, (pdpdu_cqe->
1551                                         dw[offsetof(struct amap_i_t_dpdu_cqe,
1552                                         index) / 32] & PDUCQE_INDEX_MASK));
1553                 break;
1554         default:
1555                 pbusy_list = NULL;
1556                 beiscsi_log(phba, KERN_WARNING,
1557                             BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1558                             "BM_%d : Unexpected code=%d\n",
1559                             pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
1560                             code) / 32] & PDUCQE_CODE_MASK);
1561                 return NULL;
1562         }
1563
1564         WARN_ON(list_empty(pbusy_list));
1565         list_for_each_entry(pasync_handle, pbusy_list, link) {
1566                 if (pasync_handle->pa.u.a64.address == phys_addr.u.a64.address)
1567                         break;
1568         }
1569
1570         WARN_ON(!pasync_handle);
1571
1572         pasync_handle->cri = (unsigned short)beiscsi_conn->beiscsi_conn_cid -
1573                                              phba->fw_config.iscsi_cid_start;
1574         pasync_handle->is_header = is_header;
1575         pasync_handle->buffer_len = ((pdpdu_cqe->
1576                         dw[offsetof(struct amap_i_t_dpdu_cqe, dpl) / 32]
1577                         & PDUCQE_DPL_MASK) >> 16);
1578
1579         *pcq_index = (pdpdu_cqe->dw[offsetof(struct amap_i_t_dpdu_cqe,
1580                         index) / 32] & PDUCQE_INDEX_MASK);
1581         return pasync_handle;
1582 }
1583
1584 static unsigned int
1585 hwi_update_async_writables(struct beiscsi_hba *phba,
1586                             struct hwi_async_pdu_context *pasync_ctx,
1587                             unsigned int is_header, unsigned int cq_index)
1588 {
1589         struct list_head *pbusy_list;
1590         struct async_pdu_handle *pasync_handle;
1591         unsigned int num_entries, writables = 0;
1592         unsigned int *pep_read_ptr, *pwritables;
1593
1594         num_entries = pasync_ctx->num_entries;
1595         if (is_header) {
1596                 pep_read_ptr = &pasync_ctx->async_header.ep_read_ptr;
1597                 pwritables = &pasync_ctx->async_header.writables;
1598         } else {
1599                 pep_read_ptr = &pasync_ctx->async_data.ep_read_ptr;
1600                 pwritables = &pasync_ctx->async_data.writables;
1601         }
1602
1603         while ((*pep_read_ptr) != cq_index) {
1604                 (*pep_read_ptr)++;
1605                 *pep_read_ptr = (*pep_read_ptr) % num_entries;
1606
1607                 pbusy_list = hwi_get_async_busy_list(pasync_ctx, is_header,
1608                                                      *pep_read_ptr);
1609                 if (writables == 0)
1610                         WARN_ON(list_empty(pbusy_list));
1611
1612                 if (!list_empty(pbusy_list)) {
1613                         pasync_handle = list_entry(pbusy_list->next,
1614                                                    struct async_pdu_handle,
1615                                                    link);
1616                         WARN_ON(!pasync_handle);
1617                         pasync_handle->consumed = 1;
1618                 }
1619
1620                 writables++;
1621         }
1622
1623         if (!writables) {
1624                 beiscsi_log(phba, KERN_ERR,
1625                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1626                             "BM_%d : Duplicate notification received - index 0x%x!!\n",
1627                             cq_index);
1628                 WARN_ON(1);
1629         }
1630
1631         *pwritables = *pwritables + writables;
1632         return 0;
1633 }
1634
1635 static void hwi_free_async_msg(struct beiscsi_hba *phba,
1636                                        unsigned int cri)
1637 {
1638         struct hwi_controller *phwi_ctrlr;
1639         struct hwi_async_pdu_context *pasync_ctx;
1640         struct async_pdu_handle *pasync_handle, *tmp_handle;
1641         struct list_head *plist;
1642
1643         phwi_ctrlr = phba->phwi_ctrlr;
1644         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr);
1645
1646         plist  = &pasync_ctx->async_entry[cri].wait_queue.list;
1647
1648         list_for_each_entry_safe(pasync_handle, tmp_handle, plist, link) {
1649                 list_del(&pasync_handle->link);
1650
1651                 if (pasync_handle->is_header) {
1652                         list_add_tail(&pasync_handle->link,
1653                                       &pasync_ctx->async_header.free_list);
1654                         pasync_ctx->async_header.free_entries++;
1655                 } else {
1656                         list_add_tail(&pasync_handle->link,
1657                                       &pasync_ctx->async_data.free_list);
1658                         pasync_ctx->async_data.free_entries++;
1659                 }
1660         }
1661
1662         INIT_LIST_HEAD(&pasync_ctx->async_entry[cri].wait_queue.list);
1663         pasync_ctx->async_entry[cri].wait_queue.hdr_received = 0;
1664         pasync_ctx->async_entry[cri].wait_queue.bytes_received = 0;
1665 }
1666
1667 static struct phys_addr *
1668 hwi_get_ring_address(struct hwi_async_pdu_context *pasync_ctx,
1669                      unsigned int is_header, unsigned int host_write_ptr)
1670 {
1671         struct phys_addr *pasync_sge = NULL;
1672
1673         if (is_header)
1674                 pasync_sge = pasync_ctx->async_header.ring_base;
1675         else
1676                 pasync_sge = pasync_ctx->async_data.ring_base;
1677
1678         return pasync_sge + host_write_ptr;
1679 }
1680
1681 static void hwi_post_async_buffers(struct beiscsi_hba *phba,
1682                                    unsigned int is_header)
1683 {
1684         struct hwi_controller *phwi_ctrlr;
1685         struct hwi_async_pdu_context *pasync_ctx;
1686         struct async_pdu_handle *pasync_handle;
1687         struct list_head *pfree_link, *pbusy_list;
1688         struct phys_addr *pasync_sge;
1689         unsigned int ring_id, num_entries;
1690         unsigned int host_write_num;
1691         unsigned int writables;
1692         unsigned int i = 0;
1693         u32 doorbell = 0;
1694
1695         phwi_ctrlr = phba->phwi_ctrlr;
1696         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr);
1697         num_entries = pasync_ctx->num_entries;
1698
1699         if (is_header) {
1700                 writables = min(pasync_ctx->async_header.writables,
1701                                 pasync_ctx->async_header.free_entries);
1702                 pfree_link = pasync_ctx->async_header.free_list.next;
1703                 host_write_num = pasync_ctx->async_header.host_write_ptr;
1704                 ring_id = phwi_ctrlr->default_pdu_hdr.id;
1705         } else {
1706                 writables = min(pasync_ctx->async_data.writables,
1707                                 pasync_ctx->async_data.free_entries);
1708                 pfree_link = pasync_ctx->async_data.free_list.next;
1709                 host_write_num = pasync_ctx->async_data.host_write_ptr;
1710                 ring_id = phwi_ctrlr->default_pdu_data.id;
1711         }
1712
1713         writables = (writables / 8) * 8;
1714         if (writables) {
1715                 for (i = 0; i < writables; i++) {
1716                         pbusy_list =
1717                             hwi_get_async_busy_list(pasync_ctx, is_header,
1718                                                     host_write_num);
1719                         pasync_handle =
1720                             list_entry(pfree_link, struct async_pdu_handle,
1721                                                                 link);
1722                         WARN_ON(!pasync_handle);
1723                         pasync_handle->consumed = 0;
1724
1725                         pfree_link = pfree_link->next;
1726
1727                         pasync_sge = hwi_get_ring_address(pasync_ctx,
1728                                                 is_header, host_write_num);
1729
1730                         pasync_sge->hi = pasync_handle->pa.u.a32.address_lo;
1731                         pasync_sge->lo = pasync_handle->pa.u.a32.address_hi;
1732
1733                         list_move(&pasync_handle->link, pbusy_list);
1734
1735                         host_write_num++;
1736                         host_write_num = host_write_num % num_entries;
1737                 }
1738
1739                 if (is_header) {
1740                         pasync_ctx->async_header.host_write_ptr =
1741                                                         host_write_num;
1742                         pasync_ctx->async_header.free_entries -= writables;
1743                         pasync_ctx->async_header.writables -= writables;
1744                         pasync_ctx->async_header.busy_entries += writables;
1745                 } else {
1746                         pasync_ctx->async_data.host_write_ptr = host_write_num;
1747                         pasync_ctx->async_data.free_entries -= writables;
1748                         pasync_ctx->async_data.writables -= writables;
1749                         pasync_ctx->async_data.busy_entries += writables;
1750                 }
1751
1752                 doorbell |= ring_id & DB_DEF_PDU_RING_ID_MASK;
1753                 doorbell |= 1 << DB_DEF_PDU_REARM_SHIFT;
1754                 doorbell |= 0 << DB_DEF_PDU_EVENT_SHIFT;
1755                 doorbell |= (writables & DB_DEF_PDU_CQPROC_MASK)
1756                                         << DB_DEF_PDU_CQPROC_SHIFT;
1757
1758                 iowrite32(doorbell, phba->db_va + DB_RXULP0_OFFSET);
1759         }
1760 }
1761
1762 static void hwi_flush_default_pdu_buffer(struct beiscsi_hba *phba,
1763                                          struct beiscsi_conn *beiscsi_conn,
1764                                          struct i_t_dpdu_cqe *pdpdu_cqe)
1765 {
1766         struct hwi_controller *phwi_ctrlr;
1767         struct hwi_async_pdu_context *pasync_ctx;
1768         struct async_pdu_handle *pasync_handle = NULL;
1769         unsigned int cq_index = -1;
1770
1771         phwi_ctrlr = phba->phwi_ctrlr;
1772         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr);
1773
1774         pasync_handle = hwi_get_async_handle(phba, beiscsi_conn, pasync_ctx,
1775                                              pdpdu_cqe, &cq_index);
1776         BUG_ON(pasync_handle->is_header != 0);
1777         if (pasync_handle->consumed == 0)
1778                 hwi_update_async_writables(phba, pasync_ctx,
1779                                            pasync_handle->is_header, cq_index);
1780
1781         hwi_free_async_msg(phba, pasync_handle->cri);
1782         hwi_post_async_buffers(phba, pasync_handle->is_header);
1783 }
1784
1785 static unsigned int
1786 hwi_fwd_async_msg(struct beiscsi_conn *beiscsi_conn,
1787                   struct beiscsi_hba *phba,
1788                   struct hwi_async_pdu_context *pasync_ctx, unsigned short cri)
1789 {
1790         struct list_head *plist;
1791         struct async_pdu_handle *pasync_handle;
1792         void *phdr = NULL;
1793         unsigned int hdr_len = 0, buf_len = 0;
1794         unsigned int status, index = 0, offset = 0;
1795         void *pfirst_buffer = NULL;
1796         unsigned int num_buf = 0;
1797
1798         plist = &pasync_ctx->async_entry[cri].wait_queue.list;
1799
1800         list_for_each_entry(pasync_handle, plist, link) {
1801                 if (index == 0) {
1802                         phdr = pasync_handle->pbuffer;
1803                         hdr_len = pasync_handle->buffer_len;
1804                 } else {
1805                         buf_len = pasync_handle->buffer_len;
1806                         if (!num_buf) {
1807                                 pfirst_buffer = pasync_handle->pbuffer;
1808                                 num_buf++;
1809                         }
1810                         memcpy(pfirst_buffer + offset,
1811                                pasync_handle->pbuffer, buf_len);
1812                         offset += buf_len;
1813                 }
1814                 index++;
1815         }
1816
1817         status = beiscsi_process_async_pdu(beiscsi_conn, phba,
1818                                            (beiscsi_conn->beiscsi_conn_cid -
1819                                             phba->fw_config.iscsi_cid_start),
1820                                             phdr, hdr_len, pfirst_buffer,
1821                                             offset);
1822
1823         hwi_free_async_msg(phba, cri);
1824         return 0;
1825 }
1826
1827 static unsigned int
1828 hwi_gather_async_pdu(struct beiscsi_conn *beiscsi_conn,
1829                      struct beiscsi_hba *phba,
1830                      struct async_pdu_handle *pasync_handle)
1831 {
1832         struct hwi_async_pdu_context *pasync_ctx;
1833         struct hwi_controller *phwi_ctrlr;
1834         unsigned int bytes_needed = 0, status = 0;
1835         unsigned short cri = pasync_handle->cri;
1836         struct pdu_base *ppdu;
1837
1838         phwi_ctrlr = phba->phwi_ctrlr;
1839         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr);
1840
1841         list_del(&pasync_handle->link);
1842         if (pasync_handle->is_header) {
1843                 pasync_ctx->async_header.busy_entries--;
1844                 if (pasync_ctx->async_entry[cri].wait_queue.hdr_received) {
1845                         hwi_free_async_msg(phba, cri);
1846                         BUG();
1847                 }
1848
1849                 pasync_ctx->async_entry[cri].wait_queue.bytes_received = 0;
1850                 pasync_ctx->async_entry[cri].wait_queue.hdr_received = 1;
1851                 pasync_ctx->async_entry[cri].wait_queue.hdr_len =
1852                                 (unsigned short)pasync_handle->buffer_len;
1853                 list_add_tail(&pasync_handle->link,
1854                               &pasync_ctx->async_entry[cri].wait_queue.list);
1855
1856                 ppdu = pasync_handle->pbuffer;
1857                 bytes_needed = ((((ppdu->dw[offsetof(struct amap_pdu_base,
1858                         data_len_hi) / 32] & PDUBASE_DATALENHI_MASK) << 8) &
1859                         0xFFFF0000) | ((be16_to_cpu((ppdu->
1860                         dw[offsetof(struct amap_pdu_base, data_len_lo) / 32]
1861                         & PDUBASE_DATALENLO_MASK) >> 16)) & 0x0000FFFF));
1862
1863                 if (status == 0) {
1864                         pasync_ctx->async_entry[cri].wait_queue.bytes_needed =
1865                             bytes_needed;
1866
1867                         if (bytes_needed == 0)
1868                                 status = hwi_fwd_async_msg(beiscsi_conn, phba,
1869                                                            pasync_ctx, cri);
1870                 }
1871         } else {
1872                 pasync_ctx->async_data.busy_entries--;
1873                 if (pasync_ctx->async_entry[cri].wait_queue.hdr_received) {
1874                         list_add_tail(&pasync_handle->link,
1875                                       &pasync_ctx->async_entry[cri].wait_queue.
1876                                       list);
1877                         pasync_ctx->async_entry[cri].wait_queue.
1878                                 bytes_received +=
1879                                 (unsigned short)pasync_handle->buffer_len;
1880
1881                         if (pasync_ctx->async_entry[cri].wait_queue.
1882                             bytes_received >=
1883                             pasync_ctx->async_entry[cri].wait_queue.
1884                             bytes_needed)
1885                                 status = hwi_fwd_async_msg(beiscsi_conn, phba,
1886                                                            pasync_ctx, cri);
1887                 }
1888         }
1889         return status;
1890 }
1891
1892 static void hwi_process_default_pdu_ring(struct beiscsi_conn *beiscsi_conn,
1893                                          struct beiscsi_hba *phba,
1894                                          struct i_t_dpdu_cqe *pdpdu_cqe)
1895 {
1896         struct hwi_controller *phwi_ctrlr;
1897         struct hwi_async_pdu_context *pasync_ctx;
1898         struct async_pdu_handle *pasync_handle = NULL;
1899         unsigned int cq_index = -1;
1900
1901         phwi_ctrlr = phba->phwi_ctrlr;
1902         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr);
1903         pasync_handle = hwi_get_async_handle(phba, beiscsi_conn, pasync_ctx,
1904                                              pdpdu_cqe, &cq_index);
1905
1906         if (pasync_handle->consumed == 0)
1907                 hwi_update_async_writables(phba, pasync_ctx,
1908                                            pasync_handle->is_header, cq_index);
1909
1910         hwi_gather_async_pdu(beiscsi_conn, phba, pasync_handle);
1911         hwi_post_async_buffers(phba, pasync_handle->is_header);
1912 }
1913
1914 static void  beiscsi_process_mcc_isr(struct beiscsi_hba *phba)
1915 {
1916         struct be_queue_info *mcc_cq;
1917         struct  be_mcc_compl *mcc_compl;
1918         unsigned int num_processed = 0;
1919
1920         mcc_cq = &phba->ctrl.mcc_obj.cq;
1921         mcc_compl = queue_tail_node(mcc_cq);
1922         mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
1923         while (mcc_compl->flags & CQE_FLAGS_VALID_MASK) {
1924
1925                 if (num_processed >= 32) {
1926                         hwi_ring_cq_db(phba, mcc_cq->id,
1927                                         num_processed, 0, 0);
1928                         num_processed = 0;
1929                 }
1930                 if (mcc_compl->flags & CQE_FLAGS_ASYNC_MASK) {
1931                         /* Interpret flags as an async trailer */
1932                         if (is_link_state_evt(mcc_compl->flags))
1933                                 /* Interpret compl as a async link evt */
1934                                 beiscsi_async_link_state_process(phba,
1935                                 (struct be_async_event_link_state *) mcc_compl);
1936                         else
1937                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_MBOX,
1938                                             "BM_%d :  Unsupported Async Event, flags"
1939                                             " = 0x%08x\n",
1940                                             mcc_compl->flags);
1941                 } else if (mcc_compl->flags & CQE_FLAGS_COMPLETED_MASK) {
1942                         be_mcc_compl_process_isr(&phba->ctrl, mcc_compl);
1943                         atomic_dec(&phba->ctrl.mcc_obj.q.used);
1944                 }
1945
1946                 mcc_compl->flags = 0;
1947                 queue_tail_inc(mcc_cq);
1948                 mcc_compl = queue_tail_node(mcc_cq);
1949                 mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
1950                 num_processed++;
1951         }
1952
1953         if (num_processed > 0)
1954                 hwi_ring_cq_db(phba, mcc_cq->id, num_processed, 1, 0);
1955
1956 }
1957
1958 /**
1959  * beiscsi_process_cq()- Process the Completion Queue
1960  * @pbe_eq: Event Q on which the Completion has come
1961  *
1962  * return
1963  *     Number of Completion Entries processed.
1964  **/
1965 static unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq)
1966 {
1967         struct be_queue_info *cq;
1968         struct sol_cqe *sol;
1969         struct dmsg_cqe *dmsg;
1970         unsigned int num_processed = 0;
1971         unsigned int tot_nump = 0;
1972         unsigned short code = 0, cid = 0;
1973         struct beiscsi_conn *beiscsi_conn;
1974         struct beiscsi_endpoint *beiscsi_ep;
1975         struct iscsi_endpoint *ep;
1976         struct beiscsi_hba *phba;
1977
1978         cq = pbe_eq->cq;
1979         sol = queue_tail_node(cq);
1980         phba = pbe_eq->phba;
1981
1982         while (sol->dw[offsetof(struct amap_sol_cqe, valid) / 32] &
1983                CQE_VALID_MASK) {
1984                 be_dws_le_to_cpu(sol, sizeof(struct sol_cqe));
1985
1986                 cid = ((sol->dw[offsetof(struct amap_sol_cqe, cid)/32] &
1987                       CQE_CID_MASK) >> 6);
1988                 code = (sol->dw[offsetof(struct amap_sol_cqe, code)/32] &
1989                        CQE_CODE_MASK);
1990                 ep = phba->ep_array[cid - phba->fw_config.iscsi_cid_start];
1991
1992                 beiscsi_ep = ep->dd_data;
1993                 beiscsi_conn = beiscsi_ep->conn;
1994
1995                 if (num_processed >= 32) {
1996                         hwi_ring_cq_db(phba, cq->id,
1997                                         num_processed, 0, 0);
1998                         tot_nump += num_processed;
1999                         num_processed = 0;
2000                 }
2001
2002                 switch (code) {
2003                 case SOL_CMD_COMPLETE:
2004                         hwi_complete_cmd(beiscsi_conn, phba, sol);
2005                         break;
2006                 case DRIVERMSG_NOTIFY:
2007                         beiscsi_log(phba, KERN_INFO,
2008                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2009                                     "BM_%d : Received %s[%d] on CID : %d\n",
2010                                     cqe_desc[code], code, cid);
2011
2012                         dmsg = (struct dmsg_cqe *)sol;
2013                         hwi_complete_drvr_msgs(beiscsi_conn, phba, sol);
2014                         break;
2015                 case UNSOL_HDR_NOTIFY:
2016                         beiscsi_log(phba, KERN_INFO,
2017                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2018                                     "BM_%d : Received %s[%d] on CID : %d\n",
2019                                     cqe_desc[code], code, cid);
2020
2021                         hwi_process_default_pdu_ring(beiscsi_conn, phba,
2022                                              (struct i_t_dpdu_cqe *)sol);
2023                         break;
2024                 case UNSOL_DATA_NOTIFY:
2025                         beiscsi_log(phba, KERN_INFO,
2026                                     BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2027                                     "BM_%d : Received %s[%d] on CID : %d\n",
2028                                     cqe_desc[code], code, cid);
2029
2030                         hwi_process_default_pdu_ring(beiscsi_conn, phba,
2031                                              (struct i_t_dpdu_cqe *)sol);
2032                         break;
2033                 case CXN_INVALIDATE_INDEX_NOTIFY:
2034                 case CMD_INVALIDATED_NOTIFY:
2035                 case CXN_INVALIDATE_NOTIFY:
2036                         beiscsi_log(phba, KERN_ERR,
2037                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2038                                     "BM_%d : Ignoring %s[%d] on CID : %d\n",
2039                                     cqe_desc[code], code, cid);
2040                         break;
2041                 case SOL_CMD_KILLED_DATA_DIGEST_ERR:
2042                 case CMD_KILLED_INVALID_STATSN_RCVD:
2043                 case CMD_KILLED_INVALID_R2T_RCVD:
2044                 case CMD_CXN_KILLED_LUN_INVALID:
2045                 case CMD_CXN_KILLED_ICD_INVALID:
2046                 case CMD_CXN_KILLED_ITT_INVALID:
2047                 case CMD_CXN_KILLED_SEQ_OUTOFORDER:
2048                 case CMD_CXN_KILLED_INVALID_DATASN_RCVD:
2049                         beiscsi_log(phba, KERN_ERR,
2050                                     BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2051                                     "BM_%d : Cmd Notification %s[%d] on CID : %d\n",
2052                                     cqe_desc[code], code,  cid);
2053                         break;
2054                 case UNSOL_DATA_DIGEST_ERROR_NOTIFY:
2055                         beiscsi_log(phba, KERN_ERR,
2056                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2057                                     "BM_%d :  Dropping %s[%d] on DPDU ring on CID : %d\n",
2058                                     cqe_desc[code], code, cid);
2059                         hwi_flush_default_pdu_buffer(phba, beiscsi_conn,
2060                                              (struct i_t_dpdu_cqe *) sol);
2061                         break;
2062                 case CXN_KILLED_PDU_SIZE_EXCEEDS_DSL:
2063                 case CXN_KILLED_BURST_LEN_MISMATCH:
2064                 case CXN_KILLED_AHS_RCVD:
2065                 case CXN_KILLED_HDR_DIGEST_ERR:
2066                 case CXN_KILLED_UNKNOWN_HDR:
2067                 case CXN_KILLED_STALE_ITT_TTT_RCVD:
2068                 case CXN_KILLED_INVALID_ITT_TTT_RCVD:
2069                 case CXN_KILLED_TIMED_OUT:
2070                 case CXN_KILLED_FIN_RCVD:
2071                 case CXN_KILLED_RST_SENT:
2072                 case CXN_KILLED_RST_RCVD:
2073                 case CXN_KILLED_BAD_UNSOL_PDU_RCVD:
2074                 case CXN_KILLED_BAD_WRB_INDEX_ERROR:
2075                 case CXN_KILLED_OVER_RUN_RESIDUAL:
2076                 case CXN_KILLED_UNDER_RUN_RESIDUAL:
2077                 case CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN:
2078                         beiscsi_log(phba, KERN_ERR,
2079                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2080                                     "BM_%d : Event %s[%d] received on CID : %d\n",
2081                                     cqe_desc[code], code, cid);
2082                         if (beiscsi_conn)
2083                                 iscsi_conn_failure(beiscsi_conn->conn,
2084                                                    ISCSI_ERR_CONN_FAILED);
2085                         break;
2086                 default:
2087                         beiscsi_log(phba, KERN_ERR,
2088                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2089                                     "BM_%d : Invalid CQE Event Received Code : %d"
2090                                     "CID 0x%x...\n",
2091                                     code, cid);
2092                         break;
2093                 }
2094
2095                 AMAP_SET_BITS(struct amap_sol_cqe, valid, sol, 0);
2096                 queue_tail_inc(cq);
2097                 sol = queue_tail_node(cq);
2098                 num_processed++;
2099         }
2100
2101         if (num_processed > 0) {
2102                 tot_nump += num_processed;
2103                 hwi_ring_cq_db(phba, cq->id, num_processed, 1, 0);
2104         }
2105         return tot_nump;
2106 }
2107
2108 void beiscsi_process_all_cqs(struct work_struct *work)
2109 {
2110         unsigned long flags;
2111         struct hwi_controller *phwi_ctrlr;
2112         struct hwi_context_memory *phwi_context;
2113         struct be_eq_obj *pbe_eq;
2114         struct beiscsi_hba *phba =
2115             container_of(work, struct beiscsi_hba, work_cqs);
2116
2117         phwi_ctrlr = phba->phwi_ctrlr;
2118         phwi_context = phwi_ctrlr->phwi_ctxt;
2119         if (phba->msix_enabled)
2120                 pbe_eq = &phwi_context->be_eq[phba->num_cpus];
2121         else
2122                 pbe_eq = &phwi_context->be_eq[0];
2123
2124         if (phba->todo_mcc_cq) {
2125                 spin_lock_irqsave(&phba->isr_lock, flags);
2126                 phba->todo_mcc_cq = 0;
2127                 spin_unlock_irqrestore(&phba->isr_lock, flags);
2128                 beiscsi_process_mcc_isr(phba);
2129         }
2130
2131         if (phba->todo_cq) {
2132                 spin_lock_irqsave(&phba->isr_lock, flags);
2133                 phba->todo_cq = 0;
2134                 spin_unlock_irqrestore(&phba->isr_lock, flags);
2135                 beiscsi_process_cq(pbe_eq);
2136         }
2137 }
2138
2139 static int be_iopoll(struct blk_iopoll *iop, int budget)
2140 {
2141         static unsigned int ret;
2142         struct beiscsi_hba *phba;
2143         struct be_eq_obj *pbe_eq;
2144
2145         pbe_eq = container_of(iop, struct be_eq_obj, iopoll);
2146         ret = beiscsi_process_cq(pbe_eq);
2147         if (ret < budget) {
2148                 phba = pbe_eq->phba;
2149                 blk_iopoll_complete(iop);
2150                 beiscsi_log(phba, KERN_INFO,
2151                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2152                             "BM_%d : rearm pbe_eq->q.id =%d\n",
2153                             pbe_eq->q.id);
2154                 hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
2155         }
2156         return ret;
2157 }
2158
2159 static void
2160 hwi_write_sgl(struct iscsi_wrb *pwrb, struct scatterlist *sg,
2161               unsigned int num_sg, struct beiscsi_io_task *io_task)
2162 {
2163         struct iscsi_sge *psgl;
2164         unsigned int sg_len, index;
2165         unsigned int sge_len = 0;
2166         unsigned long long addr;
2167         struct scatterlist *l_sg;
2168         unsigned int offset;
2169
2170         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
2171                                       io_task->bhs_pa.u.a32.address_lo);
2172         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
2173                                       io_task->bhs_pa.u.a32.address_hi);
2174
2175         l_sg = sg;
2176         for (index = 0; (index < num_sg) && (index < 2); index++,
2177                                                          sg = sg_next(sg)) {
2178                 if (index == 0) {
2179                         sg_len = sg_dma_len(sg);
2180                         addr = (u64) sg_dma_address(sg);
2181                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
2182                                                 ((u32)(addr & 0xFFFFFFFF)));
2183                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
2184                                                         ((u32)(addr >> 32)));
2185                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
2186                                                         sg_len);
2187                         sge_len = sg_len;
2188                 } else {
2189                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_r2t_offset,
2190                                                         pwrb, sge_len);
2191                         sg_len = sg_dma_len(sg);
2192                         addr = (u64) sg_dma_address(sg);
2193                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_lo, pwrb,
2194                                                 ((u32)(addr & 0xFFFFFFFF)));
2195                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_hi, pwrb,
2196                                                         ((u32)(addr >> 32)));
2197                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_len, pwrb,
2198                                                         sg_len);
2199                 }
2200         }
2201         psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2202         memset(psgl, 0, sizeof(*psgl) * BE2_SGE);
2203
2204         AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len - 2);
2205
2206         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2207                         io_task->bhs_pa.u.a32.address_hi);
2208         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2209                         io_task->bhs_pa.u.a32.address_lo);
2210
2211         if (num_sg == 1) {
2212                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2213                                                                 1);
2214                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2215                                                                 0);
2216         } else if (num_sg == 2) {
2217                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2218                                                                 0);
2219                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2220                                                                 1);
2221         } else {
2222                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2223                                                                 0);
2224                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2225                                                                 0);
2226         }
2227         sg = l_sg;
2228         psgl++;
2229         psgl++;
2230         offset = 0;
2231         for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
2232                 sg_len = sg_dma_len(sg);
2233                 addr = (u64) sg_dma_address(sg);
2234                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2235                                                 (addr & 0xFFFFFFFF));
2236                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2237                                                 (addr >> 32));
2238                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, sg_len);
2239                 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, offset);
2240                 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2241                 offset += sg_len;
2242         }
2243         psgl--;
2244         AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2245 }
2246
2247 /**
2248  * hwi_write_buffer()- Populate the WRB with task info
2249  * @pwrb: ptr to the WRB entry
2250  * @task: iscsi task which is to be executed
2251  **/
2252 static void hwi_write_buffer(struct iscsi_wrb *pwrb, struct iscsi_task *task)
2253 {
2254         struct iscsi_sge *psgl;
2255         struct beiscsi_io_task *io_task = task->dd_data;
2256         struct beiscsi_conn *beiscsi_conn = io_task->conn;
2257         struct beiscsi_hba *phba = beiscsi_conn->phba;
2258
2259         io_task->bhs_len = sizeof(struct be_nonio_bhs) - 2;
2260         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
2261                                 io_task->bhs_pa.u.a32.address_lo);
2262         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
2263                                 io_task->bhs_pa.u.a32.address_hi);
2264
2265         if (task->data) {
2266                 if (task->data_count) {
2267                         AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 1);
2268                         io_task->mtask_addr = pci_map_single(phba->pcidev,
2269                                                              task->data,
2270                                                              task->data_count,
2271                                                              PCI_DMA_TODEVICE);
2272
2273                         io_task->mtask_data_count = task->data_count;
2274                 } else {
2275                         AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
2276                         io_task->mtask_addr = 0;
2277                 }
2278                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
2279                               lower_32_bits(io_task->mtask_addr));
2280                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
2281                               upper_32_bits(io_task->mtask_addr));
2282                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
2283                                                 task->data_count);
2284
2285                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb, 1);
2286         } else {
2287                 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
2288                 io_task->mtask_addr = 0;
2289         }
2290
2291         psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2292
2293         AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len);
2294
2295         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2296                       io_task->bhs_pa.u.a32.address_hi);
2297         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2298                       io_task->bhs_pa.u.a32.address_lo);
2299         if (task->data) {
2300                 psgl++;
2301                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl, 0);
2302                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl, 0);
2303                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0);
2304                 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, 0);
2305                 AMAP_SET_BITS(struct amap_iscsi_sge, rsvd0, psgl, 0);
2306                 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2307
2308                 psgl++;
2309                 if (task->data) {
2310                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2311                                       lower_32_bits(io_task->mtask_addr));
2312                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2313                                       upper_32_bits(io_task->mtask_addr));
2314                 }
2315                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0x106);
2316         }
2317         AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2318 }
2319
2320 static void beiscsi_find_mem_req(struct beiscsi_hba *phba)
2321 {
2322         unsigned int num_cq_pages, num_async_pdu_buf_pages;
2323         unsigned int num_async_pdu_data_pages, wrb_sz_per_cxn;
2324         unsigned int num_async_pdu_buf_sgl_pages, num_async_pdu_data_sgl_pages;
2325
2326         num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \
2327                                       sizeof(struct sol_cqe));
2328         num_async_pdu_buf_pages =
2329                         PAGES_REQUIRED(phba->params.asyncpdus_per_ctrl * \
2330                                        phba->params.defpdu_hdr_sz);
2331         num_async_pdu_buf_sgl_pages =
2332                         PAGES_REQUIRED(phba->params.asyncpdus_per_ctrl * \
2333                                        sizeof(struct phys_addr));
2334         num_async_pdu_data_pages =
2335                         PAGES_REQUIRED(phba->params.asyncpdus_per_ctrl * \
2336                                        phba->params.defpdu_data_sz);
2337         num_async_pdu_data_sgl_pages =
2338                         PAGES_REQUIRED(phba->params.asyncpdus_per_ctrl * \
2339                                        sizeof(struct phys_addr));
2340
2341         phba->params.hwi_ws_sz = sizeof(struct hwi_controller);
2342
2343         phba->mem_req[ISCSI_MEM_GLOBAL_HEADER] = 2 *
2344                                                  BE_ISCSI_PDU_HEADER_SIZE;
2345         phba->mem_req[HWI_MEM_ADDN_CONTEXT] =
2346                                             sizeof(struct hwi_context_memory);
2347
2348
2349         phba->mem_req[HWI_MEM_WRB] = sizeof(struct iscsi_wrb)
2350             * (phba->params.wrbs_per_cxn)
2351             * phba->params.cxns_per_ctrl;
2352         wrb_sz_per_cxn =  sizeof(struct wrb_handle) *
2353                                  (phba->params.wrbs_per_cxn);
2354         phba->mem_req[HWI_MEM_WRBH] = roundup_pow_of_two((wrb_sz_per_cxn) *
2355                                 phba->params.cxns_per_ctrl);
2356
2357         phba->mem_req[HWI_MEM_SGLH] = sizeof(struct sgl_handle) *
2358                 phba->params.icds_per_ctrl;
2359         phba->mem_req[HWI_MEM_SGE] = sizeof(struct iscsi_sge) *
2360                 phba->params.num_sge_per_io * phba->params.icds_per_ctrl;
2361
2362         phba->mem_req[HWI_MEM_ASYNC_HEADER_BUF] =
2363                 num_async_pdu_buf_pages * PAGE_SIZE;
2364         phba->mem_req[HWI_MEM_ASYNC_DATA_BUF] =
2365                 num_async_pdu_data_pages * PAGE_SIZE;
2366         phba->mem_req[HWI_MEM_ASYNC_HEADER_RING] =
2367                 num_async_pdu_buf_sgl_pages * PAGE_SIZE;
2368         phba->mem_req[HWI_MEM_ASYNC_DATA_RING] =
2369                 num_async_pdu_data_sgl_pages * PAGE_SIZE;
2370         phba->mem_req[HWI_MEM_ASYNC_HEADER_HANDLE] =
2371                 phba->params.asyncpdus_per_ctrl *
2372                 sizeof(struct async_pdu_handle);
2373         phba->mem_req[HWI_MEM_ASYNC_DATA_HANDLE] =
2374                 phba->params.asyncpdus_per_ctrl *
2375                 sizeof(struct async_pdu_handle);
2376         phba->mem_req[HWI_MEM_ASYNC_PDU_CONTEXT] =
2377                 sizeof(struct hwi_async_pdu_context) +
2378                 (phba->params.cxns_per_ctrl * sizeof(struct hwi_async_entry));
2379 }
2380
2381 static int beiscsi_alloc_mem(struct beiscsi_hba *phba)
2382 {
2383         struct be_mem_descriptor *mem_descr;
2384         dma_addr_t bus_add;
2385         struct mem_array *mem_arr, *mem_arr_orig;
2386         unsigned int i, j, alloc_size, curr_alloc_size;
2387
2388         phba->phwi_ctrlr = kzalloc(phba->params.hwi_ws_sz, GFP_KERNEL);
2389         if (!phba->phwi_ctrlr)
2390                 return -ENOMEM;
2391
2392         phba->init_mem = kcalloc(SE_MEM_MAX, sizeof(*mem_descr),
2393                                  GFP_KERNEL);
2394         if (!phba->init_mem) {
2395                 kfree(phba->phwi_ctrlr);
2396                 return -ENOMEM;
2397         }
2398
2399         mem_arr_orig = kmalloc(sizeof(*mem_arr_orig) * BEISCSI_MAX_FRAGS_INIT,
2400                                GFP_KERNEL);
2401         if (!mem_arr_orig) {
2402                 kfree(phba->init_mem);
2403                 kfree(phba->phwi_ctrlr);
2404                 return -ENOMEM;
2405         }
2406
2407         mem_descr = phba->init_mem;
2408         for (i = 0; i < SE_MEM_MAX; i++) {
2409                 j = 0;
2410                 mem_arr = mem_arr_orig;
2411                 alloc_size = phba->mem_req[i];
2412                 memset(mem_arr, 0, sizeof(struct mem_array) *
2413                        BEISCSI_MAX_FRAGS_INIT);
2414                 curr_alloc_size = min(be_max_phys_size * 1024, alloc_size);
2415                 do {
2416                         mem_arr->virtual_address = pci_alloc_consistent(
2417                                                         phba->pcidev,
2418                                                         curr_alloc_size,
2419                                                         &bus_add);
2420                         if (!mem_arr->virtual_address) {
2421                                 if (curr_alloc_size <= BE_MIN_MEM_SIZE)
2422                                         goto free_mem;
2423                                 if (curr_alloc_size -
2424                                         rounddown_pow_of_two(curr_alloc_size))
2425                                         curr_alloc_size = rounddown_pow_of_two
2426                                                              (curr_alloc_size);
2427                                 else
2428                                         curr_alloc_size = curr_alloc_size / 2;
2429                         } else {
2430                                 mem_arr->bus_address.u.
2431                                     a64.address = (__u64) bus_add;
2432                                 mem_arr->size = curr_alloc_size;
2433                                 alloc_size -= curr_alloc_size;
2434                                 curr_alloc_size = min(be_max_phys_size *
2435                                                       1024, alloc_size);
2436                                 j++;
2437                                 mem_arr++;
2438                         }
2439                 } while (alloc_size);
2440                 mem_descr->num_elements = j;
2441                 mem_descr->size_in_bytes = phba->mem_req[i];
2442                 mem_descr->mem_array = kmalloc(sizeof(*mem_arr) * j,
2443                                                GFP_KERNEL);
2444                 if (!mem_descr->mem_array)
2445                         goto free_mem;
2446
2447                 memcpy(mem_descr->mem_array, mem_arr_orig,
2448                        sizeof(struct mem_array) * j);
2449                 mem_descr++;
2450         }
2451         kfree(mem_arr_orig);
2452         return 0;
2453 free_mem:
2454         mem_descr->num_elements = j;
2455         while ((i) || (j)) {
2456                 for (j = mem_descr->num_elements; j > 0; j--) {
2457                         pci_free_consistent(phba->pcidev,
2458                                             mem_descr->mem_array[j - 1].size,
2459                                             mem_descr->mem_array[j - 1].
2460                                             virtual_address,
2461                                             (unsigned long)mem_descr->
2462                                             mem_array[j - 1].
2463                                             bus_address.u.a64.address);
2464                 }
2465                 if (i) {
2466                         i--;
2467                         kfree(mem_descr->mem_array);
2468                         mem_descr--;
2469                 }
2470         }
2471         kfree(mem_arr_orig);
2472         kfree(phba->init_mem);
2473         kfree(phba->phwi_ctrlr);
2474         return -ENOMEM;
2475 }
2476
2477 static int beiscsi_get_memory(struct beiscsi_hba *phba)
2478 {
2479         beiscsi_find_mem_req(phba);
2480         return beiscsi_alloc_mem(phba);
2481 }
2482
2483 static void iscsi_init_global_templates(struct beiscsi_hba *phba)
2484 {
2485         struct pdu_data_out *pdata_out;
2486         struct pdu_nop_out *pnop_out;
2487         struct be_mem_descriptor *mem_descr;
2488
2489         mem_descr = phba->init_mem;
2490         mem_descr += ISCSI_MEM_GLOBAL_HEADER;
2491         pdata_out =
2492             (struct pdu_data_out *)mem_descr->mem_array[0].virtual_address;
2493         memset(pdata_out, 0, BE_ISCSI_PDU_HEADER_SIZE);
2494
2495         AMAP_SET_BITS(struct amap_pdu_data_out, opcode, pdata_out,
2496                       IIOC_SCSI_DATA);
2497
2498         pnop_out =
2499             (struct pdu_nop_out *)((unsigned char *)mem_descr->mem_array[0].
2500                                    virtual_address + BE_ISCSI_PDU_HEADER_SIZE);
2501
2502         memset(pnop_out, 0, BE_ISCSI_PDU_HEADER_SIZE);
2503         AMAP_SET_BITS(struct amap_pdu_nop_out, ttt, pnop_out, 0xFFFFFFFF);
2504         AMAP_SET_BITS(struct amap_pdu_nop_out, f_bit, pnop_out, 1);
2505         AMAP_SET_BITS(struct amap_pdu_nop_out, i_bit, pnop_out, 0);
2506 }
2507
2508 static int beiscsi_init_wrb_handle(struct beiscsi_hba *phba)
2509 {
2510         struct be_mem_descriptor *mem_descr_wrbh, *mem_descr_wrb;
2511         struct wrb_handle *pwrb_handle = NULL;
2512         struct hwi_controller *phwi_ctrlr;
2513         struct hwi_wrb_context *pwrb_context;
2514         struct iscsi_wrb *pwrb = NULL;
2515         unsigned int num_cxn_wrbh = 0;
2516         unsigned int num_cxn_wrb = 0, j, idx = 0, index;
2517
2518         mem_descr_wrbh = phba->init_mem;
2519         mem_descr_wrbh += HWI_MEM_WRBH;
2520
2521         mem_descr_wrb = phba->init_mem;
2522         mem_descr_wrb += HWI_MEM_WRB;
2523         phwi_ctrlr = phba->phwi_ctrlr;
2524
2525         for (index = 0; index < phba->params.cxns_per_ctrl * 2; index += 2) {
2526                 pwrb_context = &phwi_ctrlr->wrb_context[index];
2527                 pwrb_context->pwrb_handle_base =
2528                                 kzalloc(sizeof(struct wrb_handle *) *
2529                                         phba->params.wrbs_per_cxn, GFP_KERNEL);
2530                 if (!pwrb_context->pwrb_handle_base) {
2531                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2532                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
2533                         goto init_wrb_hndl_failed;
2534                 }
2535                 pwrb_context->pwrb_handle_basestd =
2536                                 kzalloc(sizeof(struct wrb_handle *) *
2537                                         phba->params.wrbs_per_cxn, GFP_KERNEL);
2538                 if (!pwrb_context->pwrb_handle_basestd) {
2539                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2540                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
2541                         goto init_wrb_hndl_failed;
2542                 }
2543                 if (!num_cxn_wrbh) {
2544                         pwrb_handle =
2545                                 mem_descr_wrbh->mem_array[idx].virtual_address;
2546                         num_cxn_wrbh = ((mem_descr_wrbh->mem_array[idx].size) /
2547                                         ((sizeof(struct wrb_handle)) *
2548                                          phba->params.wrbs_per_cxn));
2549                         idx++;
2550                 }
2551                 pwrb_context->alloc_index = 0;
2552                 pwrb_context->wrb_handles_available = 0;
2553                 pwrb_context->free_index = 0;
2554
2555                 if (num_cxn_wrbh) {
2556                         for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
2557                                 pwrb_context->pwrb_handle_base[j] = pwrb_handle;
2558                                 pwrb_context->pwrb_handle_basestd[j] =
2559                                                                 pwrb_handle;
2560                                 pwrb_context->wrb_handles_available++;
2561                                 pwrb_handle->wrb_index = j;
2562                                 pwrb_handle++;
2563                         }
2564                         num_cxn_wrbh--;
2565                 }
2566         }
2567         idx = 0;
2568         for (index = 0; index < phba->params.cxns_per_ctrl * 2; index += 2) {
2569                 pwrb_context = &phwi_ctrlr->wrb_context[index];
2570                 if (!num_cxn_wrb) {
2571                         pwrb = mem_descr_wrb->mem_array[idx].virtual_address;
2572                         num_cxn_wrb = (mem_descr_wrb->mem_array[idx].size) /
2573                                 ((sizeof(struct iscsi_wrb) *
2574                                   phba->params.wrbs_per_cxn));
2575                         idx++;
2576                 }
2577
2578                 if (num_cxn_wrb) {
2579                         for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
2580                                 pwrb_handle = pwrb_context->pwrb_handle_base[j];
2581                                 pwrb_handle->pwrb = pwrb;
2582                                 pwrb++;
2583                         }
2584                         num_cxn_wrb--;
2585                 }
2586         }
2587         return 0;
2588 init_wrb_hndl_failed:
2589         for (j = index; j > 0; j--) {
2590                 pwrb_context = &phwi_ctrlr->wrb_context[j];
2591                 kfree(pwrb_context->pwrb_handle_base);
2592                 kfree(pwrb_context->pwrb_handle_basestd);
2593         }
2594         return -ENOMEM;
2595 }
2596
2597 static void hwi_init_async_pdu_ctx(struct beiscsi_hba *phba)
2598 {
2599         struct hwi_controller *phwi_ctrlr;
2600         struct hba_parameters *p = &phba->params;
2601         struct hwi_async_pdu_context *pasync_ctx;
2602         struct async_pdu_handle *pasync_header_h, *pasync_data_h;
2603         unsigned int index, idx, num_per_mem, num_async_data;
2604         struct be_mem_descriptor *mem_descr;
2605
2606         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2607         mem_descr += HWI_MEM_ASYNC_PDU_CONTEXT;
2608
2609         phwi_ctrlr = phba->phwi_ctrlr;
2610         phwi_ctrlr->phwi_ctxt->pasync_ctx = (struct hwi_async_pdu_context *)
2611                                 mem_descr->mem_array[0].virtual_address;
2612         pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx;
2613         memset(pasync_ctx, 0, sizeof(*pasync_ctx));
2614
2615         pasync_ctx->num_entries = p->asyncpdus_per_ctrl;
2616         pasync_ctx->buffer_size = p->defpdu_hdr_sz;
2617
2618         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2619         mem_descr += HWI_MEM_ASYNC_HEADER_BUF;
2620         if (mem_descr->mem_array[0].virtual_address) {
2621                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2622                             "BM_%d : hwi_init_async_pdu_ctx"
2623                             " HWI_MEM_ASYNC_HEADER_BUF va=%p\n",
2624                             mem_descr->mem_array[0].virtual_address);
2625         } else
2626                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
2627                             "BM_%d : No Virtual address\n");
2628
2629         pasync_ctx->async_header.va_base =
2630                         mem_descr->mem_array[0].virtual_address;
2631
2632         pasync_ctx->async_header.pa_base.u.a64.address =
2633                         mem_descr->mem_array[0].bus_address.u.a64.address;
2634
2635         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2636         mem_descr += HWI_MEM_ASYNC_HEADER_RING;
2637         if (mem_descr->mem_array[0].virtual_address) {
2638                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2639                             "BM_%d : hwi_init_async_pdu_ctx"
2640                             " HWI_MEM_ASYNC_HEADER_RING va=%p\n",
2641                             mem_descr->mem_array[0].virtual_address);
2642         } else
2643                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
2644                             "BM_%d : No Virtual address\n");
2645
2646         pasync_ctx->async_header.ring_base =
2647                         mem_descr->mem_array[0].virtual_address;
2648
2649         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2650         mem_descr += HWI_MEM_ASYNC_HEADER_HANDLE;
2651         if (mem_descr->mem_array[0].virtual_address) {
2652                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2653                             "BM_%d : hwi_init_async_pdu_ctx"
2654                             " HWI_MEM_ASYNC_HEADER_HANDLE va=%p\n",
2655                             mem_descr->mem_array[0].virtual_address);
2656         } else
2657                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
2658                             "BM_%d : No Virtual address\n");
2659
2660         pasync_ctx->async_header.handle_base =
2661                         mem_descr->mem_array[0].virtual_address;
2662         pasync_ctx->async_header.writables = 0;
2663         INIT_LIST_HEAD(&pasync_ctx->async_header.free_list);
2664
2665
2666         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2667         mem_descr += HWI_MEM_ASYNC_DATA_RING;
2668         if (mem_descr->mem_array[0].virtual_address) {
2669                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2670                             "BM_%d : hwi_init_async_pdu_ctx"
2671                             " HWI_MEM_ASYNC_DATA_RING va=%p\n",
2672                             mem_descr->mem_array[0].virtual_address);
2673         } else
2674                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
2675                             "BM_%d : No Virtual address\n");
2676
2677         pasync_ctx->async_data.ring_base =
2678                         mem_descr->mem_array[0].virtual_address;
2679
2680         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2681         mem_descr += HWI_MEM_ASYNC_DATA_HANDLE;
2682         if (!mem_descr->mem_array[0].virtual_address)
2683                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
2684                             "BM_%d : No Virtual address\n");
2685
2686         pasync_ctx->async_data.handle_base =
2687                         mem_descr->mem_array[0].virtual_address;
2688         pasync_ctx->async_data.writables = 0;
2689         INIT_LIST_HEAD(&pasync_ctx->async_data.free_list);
2690
2691         pasync_header_h =
2692                 (struct async_pdu_handle *)pasync_ctx->async_header.handle_base;
2693         pasync_data_h =
2694                 (struct async_pdu_handle *)pasync_ctx->async_data.handle_base;
2695
2696         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2697         mem_descr += HWI_MEM_ASYNC_DATA_BUF;
2698         if (mem_descr->mem_array[0].virtual_address) {
2699                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2700                             "BM_%d : hwi_init_async_pdu_ctx"
2701                             " HWI_MEM_ASYNC_DATA_BUF va=%p\n",
2702                             mem_descr->mem_array[0].virtual_address);
2703         } else
2704                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
2705                             "BM_%d : No Virtual address\n");
2706
2707         idx = 0;
2708         pasync_ctx->async_data.va_base =
2709                         mem_descr->mem_array[idx].virtual_address;
2710         pasync_ctx->async_data.pa_base.u.a64.address =
2711                         mem_descr->mem_array[idx].bus_address.u.a64.address;
2712
2713         num_async_data = ((mem_descr->mem_array[idx].size) /
2714                                 phba->params.defpdu_data_sz);
2715         num_per_mem = 0;
2716
2717         for (index = 0; index < p->asyncpdus_per_ctrl; index++) {
2718                 pasync_header_h->cri = -1;
2719                 pasync_header_h->index = (char)index;
2720                 INIT_LIST_HEAD(&pasync_header_h->link);
2721                 pasync_header_h->pbuffer =
2722                         (void *)((unsigned long)
2723                         (pasync_ctx->async_header.va_base) +
2724                         (p->defpdu_hdr_sz * index));
2725
2726                 pasync_header_h->pa.u.a64.address =
2727                         pasync_ctx->async_header.pa_base.u.a64.address +
2728                         (p->defpdu_hdr_sz * index);
2729
2730                 list_add_tail(&pasync_header_h->link,
2731                                 &pasync_ctx->async_header.free_list);
2732                 pasync_header_h++;
2733                 pasync_ctx->async_header.free_entries++;
2734                 pasync_ctx->async_header.writables++;
2735
2736                 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].wait_queue.list);
2737                 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
2738                                header_busy_list);
2739                 pasync_data_h->cri = -1;
2740                 pasync_data_h->index = (char)index;
2741                 INIT_LIST_HEAD(&pasync_data_h->link);
2742
2743                 if (!num_async_data) {
2744                         num_per_mem = 0;
2745                         idx++;
2746                         pasync_ctx->async_data.va_base =
2747                                 mem_descr->mem_array[idx].virtual_address;
2748                         pasync_ctx->async_data.pa_base.u.a64.address =
2749                                 mem_descr->mem_array[idx].
2750                                 bus_address.u.a64.address;
2751
2752                         num_async_data = ((mem_descr->mem_array[idx].size) /
2753                                         phba->params.defpdu_data_sz);
2754                 }
2755                 pasync_data_h->pbuffer =
2756                         (void *)((unsigned long)
2757                         (pasync_ctx->async_data.va_base) +
2758                         (p->defpdu_data_sz * num_per_mem));
2759
2760                 pasync_data_h->pa.u.a64.address =
2761                     pasync_ctx->async_data.pa_base.u.a64.address +
2762                     (p->defpdu_data_sz * num_per_mem);
2763                 num_per_mem++;
2764                 num_async_data--;
2765
2766                 list_add_tail(&pasync_data_h->link,
2767                               &pasync_ctx->async_data.free_list);
2768                 pasync_data_h++;
2769                 pasync_ctx->async_data.free_entries++;
2770                 pasync_ctx->async_data.writables++;
2771
2772                 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].data_busy_list);
2773         }
2774
2775         pasync_ctx->async_header.host_write_ptr = 0;
2776         pasync_ctx->async_header.ep_read_ptr = -1;
2777         pasync_ctx->async_data.host_write_ptr = 0;
2778         pasync_ctx->async_data.ep_read_ptr = -1;
2779 }
2780
2781 static int
2782 be_sgl_create_contiguous(void *virtual_address,
2783                          u64 physical_address, u32 length,
2784                          struct be_dma_mem *sgl)
2785 {
2786         WARN_ON(!virtual_address);
2787         WARN_ON(!physical_address);
2788         WARN_ON(!length > 0);
2789         WARN_ON(!sgl);
2790
2791         sgl->va = virtual_address;
2792         sgl->dma = (unsigned long)physical_address;
2793         sgl->size = length;
2794
2795         return 0;
2796 }
2797
2798 static void be_sgl_destroy_contiguous(struct be_dma_mem *sgl)
2799 {
2800         memset(sgl, 0, sizeof(*sgl));
2801 }
2802
2803 static void
2804 hwi_build_be_sgl_arr(struct beiscsi_hba *phba,
2805                      struct mem_array *pmem, struct be_dma_mem *sgl)
2806 {
2807         if (sgl->va)
2808                 be_sgl_destroy_contiguous(sgl);
2809
2810         be_sgl_create_contiguous(pmem->virtual_address,
2811                                  pmem->bus_address.u.a64.address,
2812                                  pmem->size, sgl);
2813 }
2814
2815 static void
2816 hwi_build_be_sgl_by_offset(struct beiscsi_hba *phba,
2817                            struct mem_array *pmem, struct be_dma_mem *sgl)
2818 {
2819         if (sgl->va)
2820                 be_sgl_destroy_contiguous(sgl);
2821
2822         be_sgl_create_contiguous((unsigned char *)pmem->virtual_address,
2823                                  pmem->bus_address.u.a64.address,
2824                                  pmem->size, sgl);
2825 }
2826
2827 static int be_fill_queue(struct be_queue_info *q,
2828                 u16 len, u16 entry_size, void *vaddress)
2829 {
2830         struct be_dma_mem *mem = &q->dma_mem;
2831
2832         memset(q, 0, sizeof(*q));
2833         q->len = len;
2834         q->entry_size = entry_size;
2835         mem->size = len * entry_size;
2836         mem->va = vaddress;
2837         if (!mem->va)
2838                 return -ENOMEM;
2839         memset(mem->va, 0, mem->size);
2840         return 0;
2841 }
2842
2843 static int beiscsi_create_eqs(struct beiscsi_hba *phba,
2844                              struct hwi_context_memory *phwi_context)
2845 {
2846         unsigned int i, num_eq_pages;
2847         int ret = 0, eq_for_mcc;
2848         struct be_queue_info *eq;
2849         struct be_dma_mem *mem;
2850         void *eq_vaddress;
2851         dma_addr_t paddr;
2852
2853         num_eq_pages = PAGES_REQUIRED(phba->params.num_eq_entries * \
2854                                       sizeof(struct be_eq_entry));
2855
2856         if (phba->msix_enabled)
2857                 eq_for_mcc = 1;
2858         else
2859                 eq_for_mcc = 0;
2860         for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
2861                 eq = &phwi_context->be_eq[i].q;
2862                 mem = &eq->dma_mem;
2863                 phwi_context->be_eq[i].phba = phba;
2864                 eq_vaddress = pci_alloc_consistent(phba->pcidev,
2865                                                      num_eq_pages * PAGE_SIZE,
2866                                                      &paddr);
2867                 if (!eq_vaddress)
2868                         goto create_eq_error;
2869
2870                 mem->va = eq_vaddress;
2871                 ret = be_fill_queue(eq, phba->params.num_eq_entries,
2872                                     sizeof(struct be_eq_entry), eq_vaddress);
2873                 if (ret) {
2874                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2875                                     "BM_%d : be_fill_queue Failed for EQ\n");
2876                         goto create_eq_error;
2877                 }
2878
2879                 mem->dma = paddr;
2880                 ret = beiscsi_cmd_eq_create(&phba->ctrl, eq,
2881                                             phwi_context->cur_eqd);
2882                 if (ret) {
2883                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2884                                     "BM_%d : beiscsi_cmd_eq_create"
2885                                     "Failed for EQ\n");
2886                         goto create_eq_error;
2887                 }
2888
2889                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2890                             "BM_%d : eqid = %d\n",
2891                             phwi_context->be_eq[i].q.id);
2892         }
2893         return 0;
2894 create_eq_error:
2895         for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
2896                 eq = &phwi_context->be_eq[i].q;
2897                 mem = &eq->dma_mem;
2898                 if (mem->va)
2899                         pci_free_consistent(phba->pcidev, num_eq_pages
2900                                             * PAGE_SIZE,
2901                                             mem->va, mem->dma);
2902         }
2903         return ret;
2904 }
2905
2906 static int beiscsi_create_cqs(struct beiscsi_hba *phba,
2907                              struct hwi_context_memory *phwi_context)
2908 {
2909         unsigned int i, num_cq_pages;
2910         int ret = 0;
2911         struct be_queue_info *cq, *eq;
2912         struct be_dma_mem *mem;
2913         struct be_eq_obj *pbe_eq;
2914         void *cq_vaddress;
2915         dma_addr_t paddr;
2916
2917         num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \
2918                                       sizeof(struct sol_cqe));
2919
2920         for (i = 0; i < phba->num_cpus; i++) {
2921                 cq = &phwi_context->be_cq[i];
2922                 eq = &phwi_context->be_eq[i].q;
2923                 pbe_eq = &phwi_context->be_eq[i];
2924                 pbe_eq->cq = cq;
2925                 pbe_eq->phba = phba;
2926                 mem = &cq->dma_mem;
2927                 cq_vaddress = pci_alloc_consistent(phba->pcidev,
2928                                                      num_cq_pages * PAGE_SIZE,
2929                                                      &paddr);
2930                 if (!cq_vaddress)
2931                         goto create_cq_error;
2932                 ret = be_fill_queue(cq, phba->params.num_cq_entries,
2933                                     sizeof(struct sol_cqe), cq_vaddress);
2934                 if (ret) {
2935                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2936                                     "BM_%d : be_fill_queue Failed "
2937                                     "for ISCSI CQ\n");
2938                         goto create_cq_error;
2939                 }
2940
2941                 mem->dma = paddr;
2942                 ret = beiscsi_cmd_cq_create(&phba->ctrl, cq, eq, false,
2943                                             false, 0);
2944                 if (ret) {
2945                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2946                                     "BM_%d : beiscsi_cmd_eq_create"
2947                                     "Failed for ISCSI CQ\n");
2948                         goto create_cq_error;
2949                 }
2950                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2951                             "BM_%d : iscsi cq_id is %d for eq_id %d\n"
2952                             "iSCSI CQ CREATED\n", cq->id, eq->id);
2953         }
2954         return 0;
2955
2956 create_cq_error:
2957         for (i = 0; i < phba->num_cpus; i++) {
2958                 cq = &phwi_context->be_cq[i];
2959                 mem = &cq->dma_mem;
2960                 if (mem->va)
2961                         pci_free_consistent(phba->pcidev, num_cq_pages
2962                                             * PAGE_SIZE,
2963                                             mem->va, mem->dma);
2964         }
2965         return ret;
2966
2967 }
2968
2969 static int
2970 beiscsi_create_def_hdr(struct beiscsi_hba *phba,
2971                        struct hwi_context_memory *phwi_context,
2972                        struct hwi_controller *phwi_ctrlr,
2973                        unsigned int def_pdu_ring_sz)
2974 {
2975         unsigned int idx;
2976         int ret;
2977         struct be_queue_info *dq, *cq;
2978         struct be_dma_mem *mem;
2979         struct be_mem_descriptor *mem_descr;
2980         void *dq_vaddress;
2981
2982         idx = 0;
2983         dq = &phwi_context->be_def_hdrq;
2984         cq = &phwi_context->be_cq[0];
2985         mem = &dq->dma_mem;
2986         mem_descr = phba->init_mem;
2987         mem_descr += HWI_MEM_ASYNC_HEADER_RING;
2988         dq_vaddress = mem_descr->mem_array[idx].virtual_address;
2989         ret = be_fill_queue(dq, mem_descr->mem_array[0].size /
2990                             sizeof(struct phys_addr),
2991                             sizeof(struct phys_addr), dq_vaddress);
2992         if (ret) {
2993                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2994                             "BM_%d : be_fill_queue Failed for DEF PDU HDR\n");
2995                 return ret;
2996         }
2997         mem->dma = (unsigned long)mem_descr->mem_array[idx].
2998                                   bus_address.u.a64.address;
2999         ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dq,
3000                                               def_pdu_ring_sz,
3001                                               phba->params.defpdu_hdr_sz);
3002         if (ret) {
3003                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3004                             "BM_%d : be_cmd_create_default_pdu_queue Failed DEFHDR\n");
3005                 return ret;
3006         }
3007         phwi_ctrlr->default_pdu_hdr.id = phwi_context->be_def_hdrq.id;
3008         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3009                     "BM_%d : iscsi def pdu id is %d\n",
3010                     phwi_context->be_def_hdrq.id);
3011
3012         hwi_post_async_buffers(phba, 1);
3013         return 0;
3014 }
3015
3016 static int
3017 beiscsi_create_def_data(struct beiscsi_hba *phba,
3018                         struct hwi_context_memory *phwi_context,
3019                         struct hwi_controller *phwi_ctrlr,
3020                         unsigned int def_pdu_ring_sz)
3021 {
3022         unsigned int idx;
3023         int ret;
3024         struct be_queue_info *dataq, *cq;
3025         struct be_dma_mem *mem;
3026         struct be_mem_descriptor *mem_descr;
3027         void *dq_vaddress;
3028
3029         idx = 0;
3030         dataq = &phwi_context->be_def_dataq;
3031         cq = &phwi_context->be_cq[0];
3032         mem = &dataq->dma_mem;
3033         mem_descr = phba->init_mem;
3034         mem_descr += HWI_MEM_ASYNC_DATA_RING;
3035         dq_vaddress = mem_descr->mem_array[idx].virtual_address;
3036         ret = be_fill_queue(dataq, mem_descr->mem_array[0].size /
3037                             sizeof(struct phys_addr),
3038                             sizeof(struct phys_addr), dq_vaddress);
3039         if (ret) {
3040                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3041                             "BM_%d : be_fill_queue Failed for DEF PDU DATA\n");
3042                 return ret;
3043         }
3044         mem->dma = (unsigned long)mem_descr->mem_array[idx].
3045                                   bus_address.u.a64.address;
3046         ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dataq,
3047                                               def_pdu_ring_sz,
3048                                               phba->params.defpdu_data_sz);
3049         if (ret) {
3050                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3051                             "BM_%d be_cmd_create_default_pdu_queue"
3052                             " Failed for DEF PDU DATA\n");
3053                 return ret;
3054         }
3055         phwi_ctrlr->default_pdu_data.id = phwi_context->be_def_dataq.id;
3056         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3057                     "BM_%d : iscsi def data id is %d\n",
3058                     phwi_context->be_def_dataq.id);
3059
3060         hwi_post_async_buffers(phba, 0);
3061         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3062                     "BM_%d : DEFAULT PDU DATA RING CREATED\n");
3063
3064         return 0;
3065 }
3066
3067 static int
3068 beiscsi_post_pages(struct beiscsi_hba *phba)
3069 {
3070         struct be_mem_descriptor *mem_descr;
3071         struct mem_array *pm_arr;
3072         unsigned int page_offset, i;
3073         struct be_dma_mem sgl;
3074         int status;
3075
3076         mem_descr = phba->init_mem;
3077         mem_descr += HWI_MEM_SGE;
3078         pm_arr = mem_descr->mem_array;
3079
3080         page_offset = (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io *
3081                         phba->fw_config.iscsi_icd_start) / PAGE_SIZE;
3082         for (i = 0; i < mem_descr->num_elements; i++) {
3083                 hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
3084                 status = be_cmd_iscsi_post_sgl_pages(&phba->ctrl, &sgl,
3085                                                 page_offset,
3086                                                 (pm_arr->size / PAGE_SIZE));
3087                 page_offset += pm_arr->size / PAGE_SIZE;
3088                 if (status != 0) {
3089                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3090                                     "BM_%d : post sgl failed.\n");
3091                         return status;
3092                 }
3093                 pm_arr++;
3094         }
3095         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3096                     "BM_%d : POSTED PAGES\n");
3097         return 0;
3098 }
3099
3100 static void be_queue_free(struct beiscsi_hba *phba, struct be_queue_info *q)
3101 {
3102         struct be_dma_mem *mem = &q->dma_mem;
3103         if (mem->va) {
3104                 pci_free_consistent(phba->pcidev, mem->size,
3105                         mem->va, mem->dma);
3106                 mem->va = NULL;
3107         }
3108 }
3109
3110 static int be_queue_alloc(struct beiscsi_hba *phba, struct be_queue_info *q,
3111                 u16 len, u16 entry_size)
3112 {
3113         struct be_dma_mem *mem = &q->dma_mem;
3114
3115         memset(q, 0, sizeof(*q));
3116         q->len = len;
3117         q->entry_size = entry_size;
3118         mem->size = len * entry_size;
3119         mem->va = pci_alloc_consistent(phba->pcidev, mem->size, &mem->dma);
3120         if (!mem->va)
3121                 return -ENOMEM;
3122         memset(mem->va, 0, mem->size);
3123         return 0;
3124 }
3125
3126 static int
3127 beiscsi_create_wrb_rings(struct beiscsi_hba *phba,
3128                          struct hwi_context_memory *phwi_context,
3129                          struct hwi_controller *phwi_ctrlr)
3130 {
3131         unsigned int wrb_mem_index, offset, size, num_wrb_rings;
3132         u64 pa_addr_lo;
3133         unsigned int idx, num, i;
3134         struct mem_array *pwrb_arr;
3135         void *wrb_vaddr;
3136         struct be_dma_mem sgl;
3137         struct be_mem_descriptor *mem_descr;
3138         int status;
3139
3140         idx = 0;
3141         mem_descr = phba->init_mem;
3142         mem_descr += HWI_MEM_WRB;
3143         pwrb_arr = kmalloc(sizeof(*pwrb_arr) * phba->params.cxns_per_ctrl,
3144                            GFP_KERNEL);
3145         if (!pwrb_arr) {
3146                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3147                             "BM_%d : Memory alloc failed in create wrb ring.\n");
3148                 return -ENOMEM;
3149         }
3150         wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
3151         pa_addr_lo = mem_descr->mem_array[idx].bus_address.u.a64.address;
3152         num_wrb_rings = mem_descr->mem_array[idx].size /
3153                 (phba->params.wrbs_per_cxn * sizeof(struct iscsi_wrb));
3154
3155         for (num = 0; num < phba->params.cxns_per_ctrl; num++) {
3156                 if (num_wrb_rings) {
3157                         pwrb_arr[num].virtual_address = wrb_vaddr;
3158                         pwrb_arr[num].bus_address.u.a64.address = pa_addr_lo;
3159                         pwrb_arr[num].size = phba->params.wrbs_per_cxn *
3160                                             sizeof(struct iscsi_wrb);
3161                         wrb_vaddr += pwrb_arr[num].size;
3162                         pa_addr_lo += pwrb_arr[num].size;
3163                         num_wrb_rings--;
3164                 } else {
3165                         idx++;
3166                         wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
3167                         pa_addr_lo = mem_descr->mem_array[idx].\
3168                                         bus_address.u.a64.address;
3169                         num_wrb_rings = mem_descr->mem_array[idx].size /
3170                                         (phba->params.wrbs_per_cxn *
3171                                         sizeof(struct iscsi_wrb));
3172                         pwrb_arr[num].virtual_address = wrb_vaddr;
3173                         pwrb_arr[num].bus_address.u.a64.address\
3174                                                 = pa_addr_lo;
3175                         pwrb_arr[num].size = phba->params.wrbs_per_cxn *
3176                                                  sizeof(struct iscsi_wrb);
3177                         wrb_vaddr += pwrb_arr[num].size;
3178                         pa_addr_lo   += pwrb_arr[num].size;
3179                         num_wrb_rings--;
3180                 }
3181         }
3182         for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
3183                 wrb_mem_index = 0;
3184                 offset = 0;
3185                 size = 0;
3186
3187                 hwi_build_be_sgl_by_offset(phba, &pwrb_arr[i], &sgl);
3188                 status = be_cmd_wrbq_create(&phba->ctrl, &sgl,
3189                                             &phwi_context->be_wrbq[i]);
3190                 if (status != 0) {
3191                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3192                                     "BM_%d : wrbq create failed.");
3193                         kfree(pwrb_arr);
3194                         return status;
3195                 }
3196                 phwi_ctrlr->wrb_context[i * 2].cid = phwi_context->be_wrbq[i].
3197                                                                    id;
3198         }
3199         kfree(pwrb_arr);
3200         return 0;
3201 }
3202
3203 static void free_wrb_handles(struct beiscsi_hba *phba)
3204 {
3205         unsigned int index;
3206         struct hwi_controller *phwi_ctrlr;
3207         struct hwi_wrb_context *pwrb_context;
3208
3209         phwi_ctrlr = phba->phwi_ctrlr;
3210         for (index = 0; index < phba->params.cxns_per_ctrl * 2; index += 2) {
3211                 pwrb_context = &phwi_ctrlr->wrb_context[index];
3212                 kfree(pwrb_context->pwrb_handle_base);
3213                 kfree(pwrb_context->pwrb_handle_basestd);
3214         }
3215 }
3216
3217 static void be_mcc_queues_destroy(struct beiscsi_hba *phba)
3218 {
3219         struct be_queue_info *q;
3220         struct be_ctrl_info *ctrl = &phba->ctrl;
3221
3222         q = &phba->ctrl.mcc_obj.q;
3223         if (q->created)
3224                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_MCCQ);
3225         be_queue_free(phba, q);
3226
3227         q = &phba->ctrl.mcc_obj.cq;
3228         if (q->created)
3229                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
3230         be_queue_free(phba, q);
3231 }
3232
3233 static void hwi_cleanup(struct beiscsi_hba *phba)
3234 {
3235         struct be_queue_info *q;
3236         struct be_ctrl_info *ctrl = &phba->ctrl;
3237         struct hwi_controller *phwi_ctrlr;
3238         struct hwi_context_memory *phwi_context;
3239         int i, eq_num;
3240
3241         phwi_ctrlr = phba->phwi_ctrlr;
3242         phwi_context = phwi_ctrlr->phwi_ctxt;
3243         for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
3244                 q = &phwi_context->be_wrbq[i];
3245                 if (q->created)
3246                         beiscsi_cmd_q_destroy(ctrl, q, QTYPE_WRBQ);
3247         }
3248         free_wrb_handles(phba);
3249
3250         q = &phwi_context->be_def_hdrq;
3251         if (q->created)
3252                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);
3253
3254         q = &phwi_context->be_def_dataq;
3255         if (q->created)
3256                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);
3257
3258         beiscsi_cmd_q_destroy(ctrl, NULL, QTYPE_SGL);
3259
3260         for (i = 0; i < (phba->num_cpus); i++) {
3261                 q = &phwi_context->be_cq[i];
3262                 if (q->created)
3263                         beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
3264         }
3265         if (phba->msix_enabled)
3266                 eq_num = 1;
3267         else
3268                 eq_num = 0;
3269         for (i = 0; i < (phba->num_cpus + eq_num); i++) {
3270                 q = &phwi_context->be_eq[i].q;
3271                 if (q->created)
3272                         beiscsi_cmd_q_destroy(ctrl, q, QTYPE_EQ);
3273         }
3274         be_mcc_queues_destroy(phba);
3275 }
3276
3277 static int be_mcc_queues_create(struct beiscsi_hba *phba,
3278                                 struct hwi_context_memory *phwi_context)
3279 {
3280         struct be_queue_info *q, *cq;
3281         struct be_ctrl_info *ctrl = &phba->ctrl;
3282
3283         /* Alloc MCC compl queue */
3284         cq = &phba->ctrl.mcc_obj.cq;
3285         if (be_queue_alloc(phba, cq, MCC_CQ_LEN,
3286                         sizeof(struct be_mcc_compl)))
3287                 goto err;
3288         /* Ask BE to create MCC compl queue; */
3289         if (phba->msix_enabled) {
3290                 if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq
3291                                          [phba->num_cpus].q, false, true, 0))
3292                 goto mcc_cq_free;
3293         } else {
3294                 if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq[0].q,
3295                                           false, true, 0))
3296                 goto mcc_cq_free;
3297         }
3298
3299         /* Alloc MCC queue */
3300         q = &phba->ctrl.mcc_obj.q;
3301         if (be_queue_alloc(phba, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
3302                 goto mcc_cq_destroy;
3303
3304         /* Ask BE to create MCC queue */
3305         if (beiscsi_cmd_mccq_create(phba, q, cq))
3306                 goto mcc_q_free;
3307
3308         return 0;
3309
3310 mcc_q_free:
3311         be_queue_free(phba, q);
3312 mcc_cq_destroy:
3313         beiscsi_cmd_q_destroy(ctrl, cq, QTYPE_CQ);
3314 mcc_cq_free:
3315         be_queue_free(phba, cq);
3316 err:
3317         return -ENOMEM;
3318 }
3319
3320 /**
3321  * find_num_cpus()- Get the CPU online count
3322  * @phba: ptr to priv structure
3323  *
3324  * CPU count is used for creating EQ.
3325  **/
3326 static void find_num_cpus(struct beiscsi_hba *phba)
3327 {
3328         int  num_cpus = 0;
3329
3330         num_cpus = num_online_cpus();
3331
3332         phba->num_cpus = (num_cpus >= BEISCSI_MAX_NUM_CPU) ?
3333                          (BEISCSI_MAX_NUM_CPU - 1) : num_cpus;
3334 }
3335
3336 static int hwi_init_port(struct beiscsi_hba *phba)
3337 {
3338         struct hwi_controller *phwi_ctrlr;
3339         struct hwi_context_memory *phwi_context;
3340         unsigned int def_pdu_ring_sz;
3341         struct be_ctrl_info *ctrl = &phba->ctrl;
3342         int status;
3343
3344         def_pdu_ring_sz =
3345                 phba->params.asyncpdus_per_ctrl * sizeof(struct phys_addr);
3346         phwi_ctrlr = phba->phwi_ctrlr;
3347         phwi_context = phwi_ctrlr->phwi_ctxt;
3348         phwi_context->max_eqd = 0;
3349         phwi_context->min_eqd = 0;
3350         phwi_context->cur_eqd = 64;
3351         be_cmd_fw_initialize(&phba->ctrl);
3352
3353         status = beiscsi_create_eqs(phba, phwi_context);
3354         if (status != 0) {
3355                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3356                             "BM_%d : EQ not created\n");
3357                 goto error;
3358         }
3359
3360         status = be_mcc_queues_create(phba, phwi_context);
3361         if (status != 0)
3362                 goto error;
3363
3364         status = mgmt_check_supported_fw(ctrl, phba);
3365         if (status != 0) {
3366                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3367                             "BM_%d : Unsupported fw version\n");
3368                 goto error;
3369         }
3370
3371         status = beiscsi_create_cqs(phba, phwi_context);
3372         if (status != 0) {
3373                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3374                             "BM_%d : CQ not created\n");
3375                 goto error;
3376         }
3377
3378         status = beiscsi_create_def_hdr(phba, phwi_context, phwi_ctrlr,
3379                                         def_pdu_ring_sz);
3380         if (status != 0) {
3381                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3382                             "BM_%d : Default Header not created\n");
3383                 goto error;
3384         }
3385
3386         status = beiscsi_create_def_data(phba, phwi_context,
3387                                          phwi_ctrlr, def_pdu_ring_sz);
3388         if (status != 0) {
3389                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3390                             "BM_%d : Default Data not created\n");
3391                 goto error;
3392         }
3393
3394         status = beiscsi_post_pages(phba);
3395         if (status != 0) {
3396                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3397                             "BM_%d : Post SGL Pages Failed\n");
3398                 goto error;
3399         }
3400
3401         status = beiscsi_create_wrb_rings(phba, phwi_context, phwi_ctrlr);
3402         if (status != 0) {
3403                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3404                             "BM_%d : WRB Rings not created\n");
3405                 goto error;
3406         }
3407
3408         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3409                     "BM_%d : hwi_init_port success\n");
3410         return 0;
3411
3412 error:
3413         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3414                     "BM_%d : hwi_init_port failed");
3415         hwi_cleanup(phba);
3416         return status;
3417 }
3418
3419 static int hwi_init_controller(struct beiscsi_hba *phba)
3420 {
3421         struct hwi_controller *phwi_ctrlr;
3422
3423         phwi_ctrlr = phba->phwi_ctrlr;
3424         if (1 == phba->init_mem[HWI_MEM_ADDN_CONTEXT].num_elements) {
3425                 phwi_ctrlr->phwi_ctxt = (struct hwi_context_memory *)phba->
3426                     init_mem[HWI_MEM_ADDN_CONTEXT].mem_array[0].virtual_address;
3427                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3428                             "BM_%d :  phwi_ctrlr->phwi_ctxt=%p\n",
3429                             phwi_ctrlr->phwi_ctxt);
3430         } else {
3431                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3432                             "BM_%d : HWI_MEM_ADDN_CONTEXT is more "
3433                             "than one element.Failing to load\n");
3434                 return -ENOMEM;
3435         }
3436
3437         iscsi_init_global_templates(phba);
3438         if (beiscsi_init_wrb_handle(phba))
3439                 return -ENOMEM;
3440
3441         hwi_init_async_pdu_ctx(phba);
3442         if (hwi_init_port(phba) != 0) {
3443                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3444                             "BM_%d : hwi_init_controller failed\n");
3445
3446                 return -ENOMEM;
3447         }
3448         return 0;
3449 }
3450
3451 static void beiscsi_free_mem(struct beiscsi_hba *phba)
3452 {
3453         struct be_mem_descriptor *mem_descr;
3454         int i, j;
3455
3456         mem_descr = phba->init_mem;
3457         i = 0;
3458         j = 0;
3459         for (i = 0; i < SE_MEM_MAX; i++) {
3460                 for (j = mem_descr->num_elements; j > 0; j--) {
3461                         pci_free_consistent(phba->pcidev,
3462                           mem_descr->mem_array[j - 1].size,
3463                           mem_descr->mem_array[j - 1].virtual_address,
3464                           (unsigned long)mem_descr->mem_array[j - 1].
3465                           bus_address.u.a64.address);
3466                 }
3467                 kfree(mem_descr->mem_array);
3468                 mem_descr++;
3469         }
3470         kfree(phba->init_mem);
3471         kfree(phba->phwi_ctrlr);
3472 }
3473
3474 static int beiscsi_init_controller(struct beiscsi_hba *phba)
3475 {
3476         int ret = -ENOMEM;
3477
3478         ret = beiscsi_get_memory(phba);
3479         if (ret < 0) {
3480                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3481                             "BM_%d : beiscsi_dev_probe -"
3482                             "Failed in beiscsi_alloc_memory\n");
3483                 return ret;
3484         }
3485
3486         ret = hwi_init_controller(phba);
3487         if (ret)
3488                 goto free_init;
3489         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3490                     "BM_%d : Return success from beiscsi_init_controller");
3491
3492         return 0;
3493
3494 free_init:
3495         beiscsi_free_mem(phba);
3496         return ret;
3497 }
3498
3499 static int beiscsi_init_sgl_handle(struct beiscsi_hba *phba)
3500 {
3501         struct be_mem_descriptor *mem_descr_sglh, *mem_descr_sg;
3502         struct sgl_handle *psgl_handle;
3503         struct iscsi_sge *pfrag;
3504         unsigned int arr_index, i, idx;
3505
3506         phba->io_sgl_hndl_avbl = 0;
3507         phba->eh_sgl_hndl_avbl = 0;
3508
3509         mem_descr_sglh = phba->init_mem;
3510         mem_descr_sglh += HWI_MEM_SGLH;
3511         if (1 == mem_descr_sglh->num_elements) {
3512                 phba->io_sgl_hndl_base = kzalloc(sizeof(struct sgl_handle *) *
3513                                                  phba->params.ios_per_ctrl,
3514                                                  GFP_KERNEL);
3515                 if (!phba->io_sgl_hndl_base) {
3516                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3517                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
3518                         return -ENOMEM;
3519                 }
3520                 phba->eh_sgl_hndl_base = kzalloc(sizeof(struct sgl_handle *) *
3521                                                  (phba->params.icds_per_ctrl -
3522                                                  phba->params.ios_per_ctrl),
3523                                                  GFP_KERNEL);
3524                 if (!phba->eh_sgl_hndl_base) {
3525                         kfree(phba->io_sgl_hndl_base);
3526                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3527                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
3528                         return -ENOMEM;
3529                 }
3530         } else {
3531                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3532                             "BM_%d : HWI_MEM_SGLH is more than one element."
3533                             "Failing to load\n");
3534                 return -ENOMEM;
3535         }
3536
3537         arr_index = 0;
3538         idx = 0;
3539         while (idx < mem_descr_sglh->num_elements) {
3540                 psgl_handle = mem_descr_sglh->mem_array[idx].virtual_address;
3541
3542                 for (i = 0; i < (mem_descr_sglh->mem_array[idx].size /
3543                       sizeof(struct sgl_handle)); i++) {
3544                         if (arr_index < phba->params.ios_per_ctrl) {
3545                                 phba->io_sgl_hndl_base[arr_index] = psgl_handle;
3546                                 phba->io_sgl_hndl_avbl++;
3547                                 arr_index++;
3548                         } else {
3549                                 phba->eh_sgl_hndl_base[arr_index -
3550                                         phba->params.ios_per_ctrl] =
3551                                                                 psgl_handle;
3552                                 arr_index++;
3553                                 phba->eh_sgl_hndl_avbl++;
3554                         }
3555                         psgl_handle++;
3556                 }
3557                 idx++;
3558         }
3559         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3560                     "BM_%d : phba->io_sgl_hndl_avbl=%d"
3561                     "phba->eh_sgl_hndl_avbl=%d\n",
3562                     phba->io_sgl_hndl_avbl,
3563                     phba->eh_sgl_hndl_avbl);
3564
3565         mem_descr_sg = phba->init_mem;
3566         mem_descr_sg += HWI_MEM_SGE;
3567         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3568                     "\n BM_%d : mem_descr_sg->num_elements=%d\n",
3569                     mem_descr_sg->num_elements);
3570
3571         arr_index = 0;
3572         idx = 0;
3573         while (idx < mem_descr_sg->num_elements) {
3574                 pfrag = mem_descr_sg->mem_array[idx].virtual_address;
3575
3576                 for (i = 0;
3577                      i < (mem_descr_sg->mem_array[idx].size) /
3578                      (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io);
3579                      i++) {
3580                         if (arr_index < phba->params.ios_per_ctrl)
3581                                 psgl_handle = phba->io_sgl_hndl_base[arr_index];
3582                         else
3583                                 psgl_handle = phba->eh_sgl_hndl_base[arr_index -
3584                                                 phba->params.ios_per_ctrl];
3585                         psgl_handle->pfrag = pfrag;
3586                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, pfrag, 0);
3587                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, pfrag, 0);
3588                         pfrag += phba->params.num_sge_per_io;
3589                         psgl_handle->sgl_index =
3590                                 phba->fw_config.iscsi_icd_start + arr_index++;
3591                 }
3592                 idx++;
3593         }
3594         phba->io_sgl_free_index = 0;
3595         phba->io_sgl_alloc_index = 0;
3596         phba->eh_sgl_free_index = 0;
3597         phba->eh_sgl_alloc_index = 0;
3598         return 0;
3599 }
3600
3601 static int hba_setup_cid_tbls(struct beiscsi_hba *phba)
3602 {
3603         int i, new_cid;
3604
3605         phba->cid_array = kzalloc(sizeof(void *) * phba->params.cxns_per_ctrl,
3606                                   GFP_KERNEL);
3607         if (!phba->cid_array) {
3608                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3609                             "BM_%d : Failed to allocate memory in "
3610                             "hba_setup_cid_tbls\n");
3611                 return -ENOMEM;
3612         }
3613         phba->ep_array = kzalloc(sizeof(struct iscsi_endpoint *) *
3614                                  phba->params.cxns_per_ctrl * 2, GFP_KERNEL);
3615         if (!phba->ep_array) {
3616                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3617                             "BM_%d : Failed to allocate memory in "
3618                             "hba_setup_cid_tbls\n");
3619                 kfree(phba->cid_array);
3620                 return -ENOMEM;
3621         }
3622         new_cid = phba->fw_config.iscsi_cid_start;
3623         for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
3624                 phba->cid_array[i] = new_cid;
3625                 new_cid += 2;
3626         }
3627         phba->avlbl_cids = phba->params.cxns_per_ctrl;
3628         return 0;
3629 }
3630
3631 static void hwi_enable_intr(struct beiscsi_hba *phba)
3632 {
3633         struct be_ctrl_info *ctrl = &phba->ctrl;
3634         struct hwi_controller *phwi_ctrlr;
3635         struct hwi_context_memory *phwi_context;
3636         struct be_queue_info *eq;
3637         u8 __iomem *addr;
3638         u32 reg, i;
3639         u32 enabled;
3640
3641         phwi_ctrlr = phba->phwi_ctrlr;
3642         phwi_context = phwi_ctrlr->phwi_ctxt;
3643
3644         addr = (u8 __iomem *) ((u8 __iomem *) ctrl->pcicfg +
3645                         PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET);
3646         reg = ioread32(addr);
3647
3648         enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
3649         if (!enabled) {
3650                 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
3651                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3652                             "BM_%d : reg =x%08x addr=%p\n", reg, addr);
3653                 iowrite32(reg, addr);
3654         }
3655
3656         if (!phba->msix_enabled) {
3657                 eq = &phwi_context->be_eq[0].q;
3658                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3659                             "BM_%d : eq->id=%d\n", eq->id);
3660
3661                 hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
3662         } else {
3663                 for (i = 0; i <= phba->num_cpus; i++) {
3664                         eq = &phwi_context->be_eq[i].q;
3665                         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3666                                     "BM_%d : eq->id=%d\n", eq->id);
3667                         hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
3668                 }
3669         }
3670 }
3671
3672 static void hwi_disable_intr(struct beiscsi_hba *phba)
3673 {
3674         struct be_ctrl_info *ctrl = &phba->ctrl;
3675
3676         u8 __iomem *addr = ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
3677         u32 reg = ioread32(addr);
3678
3679         u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
3680         if (enabled) {
3681                 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
3682                 iowrite32(reg, addr);
3683         } else
3684                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
3685                             "BM_%d : In hwi_disable_intr, Already Disabled\n");
3686 }
3687
3688 /**
3689  * beiscsi_get_boot_info()- Get the boot session info
3690  * @phba: The device priv structure instance
3691  *
3692  * Get the boot target info and store in driver priv structure
3693  *
3694  * return values
3695  *      Success: 0
3696  *      Failure: Non-Zero Value
3697  **/
3698 static int beiscsi_get_boot_info(struct beiscsi_hba *phba)
3699 {
3700         struct be_cmd_get_session_resp *session_resp;
3701         struct be_mcc_wrb *wrb;
3702         struct be_dma_mem nonemb_cmd;
3703         unsigned int tag, wrb_num;
3704         unsigned short status, extd_status;
3705         unsigned int s_handle;
3706         struct be_queue_info *mccq = &phba->ctrl.mcc_obj.q;
3707         int ret = -ENOMEM;
3708
3709         /* Get the session handle of the boot target */
3710         ret = be_mgmt_get_boot_shandle(phba, &s_handle);
3711         if (ret) {
3712                 beiscsi_log(phba, KERN_ERR,
3713                             BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
3714                             "BM_%d : No boot session\n");
3715                 return ret;
3716         }
3717         nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
3718                                 sizeof(*session_resp),
3719                                 &nonemb_cmd.dma);
3720         if (nonemb_cmd.va == NULL) {
3721                 beiscsi_log(phba, KERN_ERR,
3722                             BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
3723                             "BM_%d : Failed to allocate memory for"
3724                             "beiscsi_get_session_info\n");
3725
3726                 return -ENOMEM;
3727         }
3728
3729         memset(nonemb_cmd.va, 0, sizeof(*session_resp));
3730         tag = mgmt_get_session_info(phba, s_handle,
3731                                     &nonemb_cmd);
3732         if (!tag) {
3733                 beiscsi_log(phba, KERN_ERR,
3734                             BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
3735                             "BM_%d : beiscsi_get_session_info"
3736                             " Failed\n");
3737
3738                 goto boot_freemem;
3739         } else
3740                 wait_event_interruptible(phba->ctrl.mcc_wait[tag],
3741                                          phba->ctrl.mcc_numtag[tag]);
3742
3743         wrb_num = (phba->ctrl.mcc_numtag[tag] & 0x00FF0000) >> 16;
3744         extd_status = (phba->ctrl.mcc_numtag[tag] & 0x0000FF00) >> 8;
3745         status = phba->ctrl.mcc_numtag[tag] & 0x000000FF;
3746         if (status || extd_status) {
3747                 beiscsi_log(phba, KERN_ERR,
3748                             BEISCSI_LOG_INIT | BEISCSI_LOG_CONFIG,
3749                             "BM_%d : beiscsi_get_session_info Failed"
3750                             " status = %d extd_status = %d\n",
3751                             status, extd_status);
3752
3753                 free_mcc_tag(&phba->ctrl, tag);
3754                 goto boot_freemem;
3755         }
3756         wrb = queue_get_wrb(mccq, wrb_num);
3757         free_mcc_tag(&phba->ctrl, tag);
3758         session_resp = nonemb_cmd.va ;
3759
3760         memcpy(&phba->boot_sess, &session_resp->session_info,
3761                sizeof(struct mgmt_session_info));
3762         ret = 0;
3763
3764 boot_freemem:
3765         pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
3766                     nonemb_cmd.va, nonemb_cmd.dma);
3767         return ret;
3768 }
3769
3770 static void beiscsi_boot_release(void *data)
3771 {
3772         struct beiscsi_hba *phba = data;
3773
3774         scsi_host_put(phba->shost);
3775 }
3776
3777 static int beiscsi_setup_boot_info(struct beiscsi_hba *phba)
3778 {
3779         struct iscsi_boot_kobj *boot_kobj;
3780
3781         /* get boot info using mgmt cmd */
3782         if (beiscsi_get_boot_info(phba))
3783                 /* Try to see if we can carry on without this */
3784                 return 0;
3785
3786         phba->boot_kset = iscsi_boot_create_host_kset(phba->shost->host_no);
3787         if (!phba->boot_kset)
3788                 return -ENOMEM;
3789
3790         /* get a ref because the show function will ref the phba */
3791         if (!scsi_host_get(phba->shost))
3792                 goto free_kset;
3793         boot_kobj = iscsi_boot_create_target(phba->boot_kset, 0, phba,
3794                                              beiscsi_show_boot_tgt_info,
3795                                              beiscsi_tgt_get_attr_visibility,
3796                                              beiscsi_boot_release);
3797         if (!boot_kobj)
3798                 goto put_shost;
3799
3800         if (!scsi_host_get(phba->shost))
3801                 goto free_kset;
3802         boot_kobj = iscsi_boot_create_initiator(phba->boot_kset, 0, phba,
3803                                                 beiscsi_show_boot_ini_info,
3804                                                 beiscsi_ini_get_attr_visibility,
3805                                                 beiscsi_boot_release);
3806         if (!boot_kobj)
3807                 goto put_shost;
3808
3809         if (!scsi_host_get(phba->shost))
3810                 goto free_kset;
3811         boot_kobj = iscsi_boot_create_ethernet(phba->boot_kset, 0, phba,
3812                                                beiscsi_show_boot_eth_info,
3813                                                beiscsi_eth_get_attr_visibility,
3814                                                beiscsi_boot_release);
3815         if (!boot_kobj)
3816                 goto put_shost;
3817         return 0;
3818
3819 put_shost:
3820         scsi_host_put(phba->shost);
3821 free_kset:
3822         iscsi_boot_destroy_kset(phba->boot_kset);
3823         return -ENOMEM;
3824 }
3825
3826 static int beiscsi_init_port(struct beiscsi_hba *phba)
3827 {
3828         int ret;
3829
3830         ret = beiscsi_init_controller(phba);
3831         if (ret < 0) {
3832                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3833                             "BM_%d : beiscsi_dev_probe - Failed in"
3834                             "beiscsi_init_controller\n");
3835                 return ret;
3836         }
3837         ret = beiscsi_init_sgl_handle(phba);
3838         if (ret < 0) {
3839                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3840                             "BM_%d : beiscsi_dev_probe - Failed in"
3841                             "beiscsi_init_sgl_handle\n");
3842                 goto do_cleanup_ctrlr;
3843         }
3844
3845         if (hba_setup_cid_tbls(phba)) {
3846                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3847                             "BM_%d : Failed in hba_setup_cid_tbls\n");
3848                 kfree(phba->io_sgl_hndl_base);
3849                 kfree(phba->eh_sgl_hndl_base);
3850                 goto do_cleanup_ctrlr;
3851         }
3852
3853         return ret;
3854
3855 do_cleanup_ctrlr:
3856         hwi_cleanup(phba);
3857         return ret;
3858 }
3859
3860 static void hwi_purge_eq(struct beiscsi_hba *phba)
3861 {
3862         struct hwi_controller *phwi_ctrlr;
3863         struct hwi_context_memory *phwi_context;
3864         struct be_queue_info *eq;
3865         struct be_eq_entry *eqe = NULL;
3866         int i, eq_msix;
3867         unsigned int num_processed;
3868
3869         phwi_ctrlr = phba->phwi_ctrlr;
3870         phwi_context = phwi_ctrlr->phwi_ctxt;
3871         if (phba->msix_enabled)
3872                 eq_msix = 1;
3873         else
3874                 eq_msix = 0;
3875
3876         for (i = 0; i < (phba->num_cpus + eq_msix); i++) {
3877                 eq = &phwi_context->be_eq[i].q;
3878                 eqe = queue_tail_node(eq);
3879                 num_processed = 0;
3880                 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
3881                                         & EQE_VALID_MASK) {
3882                         AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
3883                         queue_tail_inc(eq);
3884                         eqe = queue_tail_node(eq);
3885                         num_processed++;
3886                 }
3887
3888                 if (num_processed)
3889                         hwi_ring_eq_db(phba, eq->id, 1, num_processed, 1, 1);
3890         }
3891 }
3892
3893 static void beiscsi_clean_port(struct beiscsi_hba *phba)
3894 {
3895         int mgmt_status;
3896
3897         mgmt_status = mgmt_epfw_cleanup(phba, CMD_CONNECTION_CHUTE_0);
3898         if (mgmt_status)
3899                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
3900                             "BM_%d : mgmt_epfw_cleanup FAILED\n");
3901
3902         hwi_purge_eq(phba);
3903         hwi_cleanup(phba);
3904         kfree(phba->io_sgl_hndl_base);
3905         kfree(phba->eh_sgl_hndl_base);
3906         kfree(phba->cid_array);
3907         kfree(phba->ep_array);
3908 }
3909
3910 /**
3911  * beiscsi_cleanup_task()- Free driver resources of the task
3912  * @task: ptr to the iscsi task
3913  *
3914  **/
3915 static void beiscsi_cleanup_task(struct iscsi_task *task)
3916 {
3917         struct beiscsi_io_task *io_task = task->dd_data;
3918         struct iscsi_conn *conn = task->conn;
3919         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
3920         struct beiscsi_hba *phba = beiscsi_conn->phba;
3921         struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
3922         struct hwi_wrb_context *pwrb_context;
3923         struct hwi_controller *phwi_ctrlr;
3924
3925         phwi_ctrlr = phba->phwi_ctrlr;
3926         pwrb_context = &phwi_ctrlr->wrb_context[beiscsi_conn->beiscsi_conn_cid
3927                         - phba->fw_config.iscsi_cid_start];
3928
3929         if (io_task->cmd_bhs) {
3930                 pci_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
3931                               io_task->bhs_pa.u.a64.address);
3932                 io_task->cmd_bhs = NULL;
3933         }
3934
3935         if (task->sc) {
3936                 if (io_task->pwrb_handle) {
3937                         free_wrb_handle(phba, pwrb_context,
3938                                         io_task->pwrb_handle);
3939                         io_task->pwrb_handle = NULL;
3940                 }
3941
3942                 if (io_task->psgl_handle) {
3943                         spin_lock(&phba->io_sgl_lock);
3944                         free_io_sgl_handle(phba, io_task->psgl_handle);
3945                         spin_unlock(&phba->io_sgl_lock);
3946                         io_task->psgl_handle = NULL;
3947                 }
3948         } else {
3949                 if (!beiscsi_conn->login_in_progress) {
3950                         if (io_task->pwrb_handle) {
3951                                 free_wrb_handle(phba, pwrb_context,
3952                                                 io_task->pwrb_handle);
3953                                 io_task->pwrb_handle = NULL;
3954                         }
3955                         if (io_task->psgl_handle) {
3956                                 spin_lock(&phba->mgmt_sgl_lock);
3957                                 free_mgmt_sgl_handle(phba,
3958                                                      io_task->psgl_handle);
3959                                 spin_unlock(&phba->mgmt_sgl_lock);
3960                                 io_task->psgl_handle = NULL;
3961                         }
3962                         if (io_task->mtask_addr) {
3963                                 pci_unmap_single(phba->pcidev,
3964                                                  io_task->mtask_addr,
3965                                                  io_task->mtask_data_count,
3966                                                  PCI_DMA_TODEVICE);
3967                                 io_task->mtask_addr = 0;
3968                         }
3969                 }
3970         }
3971 }
3972
3973 void
3974 beiscsi_offload_connection(struct beiscsi_conn *beiscsi_conn,
3975                            struct beiscsi_offload_params *params)
3976 {
3977         struct wrb_handle *pwrb_handle;
3978         struct iscsi_target_context_update_wrb *pwrb = NULL;
3979         struct be_mem_descriptor *mem_descr;
3980         struct beiscsi_hba *phba = beiscsi_conn->phba;
3981         struct iscsi_task *task = beiscsi_conn->task;
3982         struct iscsi_session *session = task->conn->session;
3983         u32 doorbell = 0;
3984
3985         /*
3986          * We can always use 0 here because it is reserved by libiscsi for
3987          * login/startup related tasks.
3988          */
3989         beiscsi_conn->login_in_progress = 0;
3990         spin_lock_bh(&session->lock);
3991         beiscsi_cleanup_task(task);
3992         spin_unlock_bh(&session->lock);
3993
3994         pwrb_handle = alloc_wrb_handle(phba, (beiscsi_conn->beiscsi_conn_cid -
3995                                        phba->fw_config.iscsi_cid_start));
3996         pwrb = (struct iscsi_target_context_update_wrb *)pwrb_handle->pwrb;
3997         memset(pwrb, 0, sizeof(*pwrb));
3998         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb,
3999                       max_burst_length, pwrb, params->dw[offsetof
4000                       (struct amap_beiscsi_offload_params,
4001                       max_burst_length) / 32]);
4002         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb,
4003                       max_send_data_segment_length, pwrb,
4004                       params->dw[offsetof(struct amap_beiscsi_offload_params,
4005                       max_send_data_segment_length) / 32]);
4006         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb,
4007                       first_burst_length,
4008                       pwrb,
4009                       params->dw[offsetof(struct amap_beiscsi_offload_params,
4010                       first_burst_length) / 32]);
4011
4012         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, erl, pwrb,
4013                       (params->dw[offsetof(struct amap_beiscsi_offload_params,
4014                       erl) / 32] & OFFLD_PARAMS_ERL));
4015         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, dde, pwrb,
4016                       (params->dw[offsetof(struct amap_beiscsi_offload_params,
4017                       dde) / 32] & OFFLD_PARAMS_DDE) >> 2);
4018         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, hde, pwrb,
4019                       (params->dw[offsetof(struct amap_beiscsi_offload_params,
4020                       hde) / 32] & OFFLD_PARAMS_HDE) >> 3);
4021         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, ir2t, pwrb,
4022                       (params->dw[offsetof(struct amap_beiscsi_offload_params,
4023                       ir2t) / 32] & OFFLD_PARAMS_IR2T) >> 4);
4024         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, imd, pwrb,
4025                       (params->dw[offsetof(struct amap_beiscsi_offload_params,
4026                        imd) / 32] & OFFLD_PARAMS_IMD) >> 5);
4027         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, stat_sn,
4028                       pwrb,
4029                       (params->dw[offsetof(struct amap_beiscsi_offload_params,
4030                       exp_statsn) / 32] + 1));
4031         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, type, pwrb,
4032                       0x7);
4033         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, wrb_idx,
4034                       pwrb, pwrb_handle->wrb_index);
4035         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, ptr2nextwrb,
4036                       pwrb, pwrb_handle->nxt_wrb_index);
4037         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb,
4038                         session_state, pwrb, 0);
4039         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, compltonack,
4040                       pwrb, 1);
4041         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, notpredblq,
4042                       pwrb, 0);
4043         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb, mode, pwrb,
4044                       0);
4045
4046         mem_descr = phba->init_mem;
4047         mem_descr += ISCSI_MEM_GLOBAL_HEADER;
4048
4049         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb,
4050                         pad_buffer_addr_hi, pwrb,
4051                       mem_descr->mem_array[0].bus_address.u.a32.address_hi);
4052         AMAP_SET_BITS(struct amap_iscsi_target_context_update_wrb,
4053                         pad_buffer_addr_lo, pwrb,
4054                       mem_descr->mem_array[0].bus_address.u.a32.address_lo);
4055
4056         be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_target_context_update_wrb));
4057
4058         doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4059         doorbell |= (pwrb_handle->wrb_index & DB_DEF_PDU_WRB_INDEX_MASK)
4060                              << DB_DEF_PDU_WRB_INDEX_SHIFT;
4061         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4062
4063         iowrite32(doorbell, phba->db_va + DB_TXULP0_OFFSET);
4064 }
4065
4066 static void beiscsi_parse_pdu(struct iscsi_conn *conn, itt_t itt,
4067                               int *index, int *age)
4068 {
4069         *index = (int)itt;
4070         if (age)
4071                 *age = conn->session->age;
4072 }
4073
4074 /**
4075  * beiscsi_alloc_pdu - allocates pdu and related resources
4076  * @task: libiscsi task
4077  * @opcode: opcode of pdu for task
4078  *
4079  * This is called with the session lock held. It will allocate
4080  * the wrb and sgl if needed for the command. And it will prep
4081  * the pdu's itt. beiscsi_parse_pdu will later translate
4082  * the pdu itt to the libiscsi task itt.
4083  */
4084 static int beiscsi_alloc_pdu(struct iscsi_task *task, uint8_t opcode)
4085 {
4086         struct beiscsi_io_task *io_task = task->dd_data;
4087         struct iscsi_conn *conn = task->conn;
4088         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4089         struct beiscsi_hba *phba = beiscsi_conn->phba;
4090         struct hwi_wrb_context *pwrb_context;
4091         struct hwi_controller *phwi_ctrlr;
4092         itt_t itt;
4093         struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
4094         dma_addr_t paddr;
4095
4096         io_task->cmd_bhs = pci_pool_alloc(beiscsi_sess->bhs_pool,
4097                                           GFP_ATOMIC, &paddr);
4098         if (!io_task->cmd_bhs)
4099                 return -ENOMEM;
4100         io_task->bhs_pa.u.a64.address = paddr;
4101         io_task->libiscsi_itt = (itt_t)task->itt;
4102         io_task->conn = beiscsi_conn;
4103
4104         task->hdr = (struct iscsi_hdr *)&io_task->cmd_bhs->iscsi_hdr;
4105         task->hdr_max = sizeof(struct be_cmd_bhs);
4106         io_task->psgl_handle = NULL;
4107         io_task->pwrb_handle = NULL;
4108
4109         if (task->sc) {
4110                 spin_lock(&phba->io_sgl_lock);
4111                 io_task->psgl_handle = alloc_io_sgl_handle(phba);
4112                 spin_unlock(&phba->io_sgl_lock);
4113                 if (!io_task->psgl_handle)
4114                         goto free_hndls;
4115                 io_task->pwrb_handle = alloc_wrb_handle(phba,
4116                                         beiscsi_conn->beiscsi_conn_cid -
4117                                         phba->fw_config.iscsi_cid_start);
4118                 if (!io_task->pwrb_handle)
4119                         goto free_io_hndls;
4120         } else {
4121                 io_task->scsi_cmnd = NULL;
4122                 if ((opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGIN) {
4123                         if (!beiscsi_conn->login_in_progress) {
4124                                 spin_lock(&phba->mgmt_sgl_lock);
4125                                 io_task->psgl_handle = (struct sgl_handle *)
4126                                                 alloc_mgmt_sgl_handle(phba);
4127                                 spin_unlock(&phba->mgmt_sgl_lock);
4128                                 if (!io_task->psgl_handle)
4129                                         goto free_hndls;
4130
4131                                 beiscsi_conn->login_in_progress = 1;
4132                                 beiscsi_conn->plogin_sgl_handle =
4133                                                         io_task->psgl_handle;
4134                                 io_task->pwrb_handle =
4135                                         alloc_wrb_handle(phba,
4136                                         beiscsi_conn->beiscsi_conn_cid -
4137                                         phba->fw_config.iscsi_cid_start);
4138                                 if (!io_task->pwrb_handle)
4139                                         goto free_io_hndls;
4140                                 beiscsi_conn->plogin_wrb_handle =
4141                                                         io_task->pwrb_handle;
4142
4143                         } else {
4144                                 io_task->psgl_handle =
4145                                                 beiscsi_conn->plogin_sgl_handle;
4146                                 io_task->pwrb_handle =
4147                                                 beiscsi_conn->plogin_wrb_handle;
4148                         }
4149                         beiscsi_conn->task = task;
4150                 } else {
4151                         spin_lock(&phba->mgmt_sgl_lock);
4152                         io_task->psgl_handle = alloc_mgmt_sgl_handle(phba);
4153                         spin_unlock(&phba->mgmt_sgl_lock);
4154                         if (!io_task->psgl_handle)
4155                                 goto free_hndls;
4156                         io_task->pwrb_handle =
4157                                         alloc_wrb_handle(phba,
4158                                         beiscsi_conn->beiscsi_conn_cid -
4159                                         phba->fw_config.iscsi_cid_start);
4160                         if (!io_task->pwrb_handle)
4161                                 goto free_mgmt_hndls;
4162
4163                 }
4164         }
4165         itt = (itt_t) cpu_to_be32(((unsigned int)io_task->pwrb_handle->
4166                                  wrb_index << 16) | (unsigned int)
4167                                 (io_task->psgl_handle->sgl_index));
4168         io_task->pwrb_handle->pio_handle = task;
4169
4170         io_task->cmd_bhs->iscsi_hdr.itt = itt;
4171         return 0;
4172
4173 free_io_hndls:
4174         spin_lock(&phba->io_sgl_lock);
4175         free_io_sgl_handle(phba, io_task->psgl_handle);
4176         spin_unlock(&phba->io_sgl_lock);
4177         goto free_hndls;
4178 free_mgmt_hndls:
4179         spin_lock(&phba->mgmt_sgl_lock);
4180         free_mgmt_sgl_handle(phba, io_task->psgl_handle);
4181         spin_unlock(&phba->mgmt_sgl_lock);
4182 free_hndls:
4183         phwi_ctrlr = phba->phwi_ctrlr;
4184         pwrb_context = &phwi_ctrlr->wrb_context[
4185                         beiscsi_conn->beiscsi_conn_cid -
4186                         phba->fw_config.iscsi_cid_start];
4187         if (io_task->pwrb_handle)
4188                 free_wrb_handle(phba, pwrb_context, io_task->pwrb_handle);
4189         io_task->pwrb_handle = NULL;
4190         pci_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
4191                       io_task->bhs_pa.u.a64.address);
4192         io_task->cmd_bhs = NULL;
4193         beiscsi_log(phba, KERN_ERR,
4194                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4195                     "BM_%d : Alloc of SGL_ICD Failed\n");
4196         return -ENOMEM;
4197 }
4198
4199 static int beiscsi_iotask(struct iscsi_task *task, struct scatterlist *sg,
4200                           unsigned int num_sg, unsigned int xferlen,
4201                           unsigned int writedir)
4202 {
4203
4204         struct beiscsi_io_task *io_task = task->dd_data;
4205         struct iscsi_conn *conn = task->conn;
4206         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4207         struct beiscsi_hba *phba = beiscsi_conn->phba;
4208         struct iscsi_wrb *pwrb = NULL;
4209         unsigned int doorbell = 0;
4210
4211         pwrb = io_task->pwrb_handle->pwrb;
4212         io_task->cmd_bhs->iscsi_hdr.exp_statsn = 0;
4213         io_task->bhs_len = sizeof(struct be_cmd_bhs);
4214
4215         if (writedir) {
4216                 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4217                               INI_WR_CMD);
4218                 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 1);
4219         } else {
4220                 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4221                               INI_RD_CMD);
4222                 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
4223         }
4224
4225         AMAP_SET_BITS(struct amap_iscsi_wrb, lun, pwrb,
4226                       cpu_to_be16(*(unsigned short *)
4227                                   &io_task->cmd_bhs->iscsi_hdr.lun));
4228         AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb, xferlen);
4229         AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
4230                       io_task->pwrb_handle->wrb_index);
4231         AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
4232                       be32_to_cpu(task->cmdsn));
4233         AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
4234                       io_task->psgl_handle->sgl_index);
4235
4236         hwi_write_sgl(pwrb, sg, num_sg, io_task);
4237
4238         AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
4239                       io_task->pwrb_handle->nxt_wrb_index);
4240         be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));
4241
4242         doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4243         doorbell |= (io_task->pwrb_handle->wrb_index &
4244                      DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
4245         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4246
4247         iowrite32(doorbell, phba->db_va + DB_TXULP0_OFFSET);
4248         return 0;
4249 }
4250
4251 static int beiscsi_mtask(struct iscsi_task *task)
4252 {
4253         struct beiscsi_io_task *io_task = task->dd_data;
4254         struct iscsi_conn *conn = task->conn;
4255         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4256         struct beiscsi_hba *phba = beiscsi_conn->phba;
4257         struct iscsi_wrb *pwrb = NULL;
4258         unsigned int doorbell = 0;
4259         unsigned int cid;
4260
4261         cid = beiscsi_conn->beiscsi_conn_cid;
4262         pwrb = io_task->pwrb_handle->pwrb;
4263         memset(pwrb, 0, sizeof(*pwrb));
4264         AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
4265                       be32_to_cpu(task->cmdsn));
4266         AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
4267                       io_task->pwrb_handle->wrb_index);
4268         AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
4269                       io_task->psgl_handle->sgl_index);
4270
4271         switch (task->hdr->opcode & ISCSI_OPCODE_MASK) {
4272         case ISCSI_OP_LOGIN:
4273                 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4274                               TGT_DM_CMD);
4275                 AMAP_SET_BITS(struct amap_iscsi_wrb, dmsg, pwrb, 0);
4276                 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb, 1);
4277                 hwi_write_buffer(pwrb, task);
4278                 break;
4279         case ISCSI_OP_NOOP_OUT:
4280                 if (task->hdr->ttt != ISCSI_RESERVED_TAG) {
4281                         AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4282                                       TGT_DM_CMD);
4283                         AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt,
4284                                       pwrb, 0);
4285                         AMAP_SET_BITS(struct amap_iscsi_wrb, dmsg, pwrb, 1);
4286                 } else {
4287                         AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4288                                       INI_RD_CMD);
4289                         AMAP_SET_BITS(struct amap_iscsi_wrb, dmsg, pwrb, 0);
4290                 }
4291                 hwi_write_buffer(pwrb, task);
4292                 break;
4293         case ISCSI_OP_TEXT:
4294                 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4295                               TGT_DM_CMD);
4296                 AMAP_SET_BITS(struct amap_iscsi_wrb, dmsg, pwrb, 0);
4297                 hwi_write_buffer(pwrb, task);
4298                 break;
4299         case ISCSI_OP_SCSI_TMFUNC:
4300                 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4301                               INI_TMF_CMD);
4302                 AMAP_SET_BITS(struct amap_iscsi_wrb, dmsg, pwrb, 0);
4303                 hwi_write_buffer(pwrb, task);
4304                 break;
4305         case ISCSI_OP_LOGOUT:
4306                 AMAP_SET_BITS(struct amap_iscsi_wrb, dmsg, pwrb, 0);
4307                 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4308                               HWH_TYPE_LOGOUT);
4309                 hwi_write_buffer(pwrb, task);
4310                 break;
4311
4312         default:
4313                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4314                             "BM_%d : opcode =%d Not supported\n",
4315                             task->hdr->opcode & ISCSI_OPCODE_MASK);
4316
4317                 return -EINVAL;
4318         }
4319
4320         AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb,
4321                       task->data_count);
4322         AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
4323                       io_task->pwrb_handle->nxt_wrb_index);
4324         be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));
4325
4326         doorbell |= cid & DB_WRB_POST_CID_MASK;
4327         doorbell |= (io_task->pwrb_handle->wrb_index &
4328                      DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
4329         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4330         iowrite32(doorbell, phba->db_va + DB_TXULP0_OFFSET);
4331         return 0;
4332 }
4333
4334 static int beiscsi_task_xmit(struct iscsi_task *task)
4335 {
4336         struct beiscsi_io_task *io_task = task->dd_data;
4337         struct scsi_cmnd *sc = task->sc;
4338         struct scatterlist *sg;
4339         int num_sg;
4340         unsigned int  writedir = 0, xferlen = 0;
4341
4342         if (!sc)
4343                 return beiscsi_mtask(task);
4344
4345         io_task->scsi_cmnd = sc;
4346         num_sg = scsi_dma_map(sc);
4347         if (num_sg < 0) {
4348                 struct iscsi_conn *conn = task->conn;
4349                 struct beiscsi_hba *phba = NULL;
4350
4351                 phba = ((struct beiscsi_conn *)conn->dd_data)->phba;
4352                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_IO,
4353                             "BM_%d : scsi_dma_map Failed\n");
4354
4355                 return num_sg;
4356         }
4357         xferlen = scsi_bufflen(sc);
4358         sg = scsi_sglist(sc);
4359         if (sc->sc_data_direction == DMA_TO_DEVICE)
4360                 writedir = 1;
4361          else
4362                 writedir = 0;
4363
4364         return beiscsi_iotask(task, sg, num_sg, xferlen, writedir);
4365 }
4366
4367 /**
4368  * beiscsi_bsg_request - handle bsg request from ISCSI transport
4369  * @job: job to handle
4370  */
4371 static int beiscsi_bsg_request(struct bsg_job *job)
4372 {
4373         struct Scsi_Host *shost;
4374         struct beiscsi_hba *phba;
4375         struct iscsi_bsg_request *bsg_req = job->request;
4376         int rc = -EINVAL;
4377         unsigned int tag;
4378         struct be_dma_mem nonemb_cmd;
4379         struct be_cmd_resp_hdr *resp;
4380         struct iscsi_bsg_reply *bsg_reply = job->reply;
4381         unsigned short status, extd_status;
4382
4383         shost = iscsi_job_to_shost(job);
4384         phba = iscsi_host_priv(shost);
4385
4386         switch (bsg_req->msgcode) {
4387         case ISCSI_BSG_HST_VENDOR:
4388                 nonemb_cmd.va = pci_alloc_consistent(phba->ctrl.pdev,
4389                                         job->request_payload.payload_len,
4390                                         &nonemb_cmd.dma);
4391                 if (nonemb_cmd.va == NULL) {
4392                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4393                                     "BM_%d : Failed to allocate memory for "
4394                                     "beiscsi_bsg_request\n");
4395                         return -EIO;
4396                 }
4397                 tag = mgmt_vendor_specific_fw_cmd(&phba->ctrl, phba, job,
4398                                                   &nonemb_cmd);
4399                 if (!tag) {
4400                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4401                                     "BM_%d : be_cmd_get_mac_addr Failed\n");
4402
4403                         pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
4404                                             nonemb_cmd.va, nonemb_cmd.dma);
4405                         return -EAGAIN;
4406                 } else
4407                         wait_event_interruptible(phba->ctrl.mcc_wait[tag],
4408                                                  phba->ctrl.mcc_numtag[tag]);
4409                 extd_status = (phba->ctrl.mcc_numtag[tag] & 0x0000FF00) >> 8;
4410                 status = phba->ctrl.mcc_numtag[tag] & 0x000000FF;
4411                 free_mcc_tag(&phba->ctrl, tag);
4412                 resp = (struct be_cmd_resp_hdr *)nonemb_cmd.va;
4413                 sg_copy_from_buffer(job->reply_payload.sg_list,
4414                                     job->reply_payload.sg_cnt,
4415                                     nonemb_cmd.va, (resp->response_length
4416                                     + sizeof(*resp)));
4417                 bsg_reply->reply_payload_rcv_len = resp->response_length;
4418                 bsg_reply->result = status;
4419                 bsg_job_done(job, bsg_reply->result,
4420                              bsg_reply->reply_payload_rcv_len);
4421                 pci_free_consistent(phba->ctrl.pdev, nonemb_cmd.size,
4422                                     nonemb_cmd.va, nonemb_cmd.dma);
4423                 if (status || extd_status) {
4424                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4425                                     "BM_%d : be_cmd_get_mac_addr Failed"
4426                                     " status = %d extd_status = %d\n",
4427                                     status, extd_status);
4428
4429                         return -EIO;
4430                 }
4431                 break;
4432
4433         default:
4434                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4435                                 "BM_%d : Unsupported bsg command: 0x%x\n",
4436                                 bsg_req->msgcode);
4437                 break;
4438         }
4439
4440         return rc;
4441 }
4442
4443 void beiscsi_hba_attrs_init(struct beiscsi_hba *phba)
4444 {
4445         /* Set the logging parameter */
4446         beiscsi_log_enable_init(phba, beiscsi_log_enable);
4447 }
4448
4449 static void beiscsi_quiesce(struct beiscsi_hba *phba)
4450 {
4451         struct hwi_controller *phwi_ctrlr;
4452         struct hwi_context_memory *phwi_context;
4453         struct be_eq_obj *pbe_eq;
4454         unsigned int i, msix_vec;
4455         u8 *real_offset = 0;
4456         u32 value = 0;
4457
4458         phwi_ctrlr = phba->phwi_ctrlr;
4459         phwi_context = phwi_ctrlr->phwi_ctxt;
4460         hwi_disable_intr(phba);
4461         if (phba->msix_enabled) {
4462                 for (i = 0; i <= phba->num_cpus; i++) {
4463                         msix_vec = phba->msix_entries[i].vector;
4464                         free_irq(msix_vec, &phwi_context->be_eq[i]);
4465                         kfree(phba->msi_name[i]);
4466                 }
4467         } else
4468                 if (phba->pcidev->irq)
4469                         free_irq(phba->pcidev->irq, phba);
4470         pci_disable_msix(phba->pcidev);
4471         destroy_workqueue(phba->wq);
4472         if (blk_iopoll_enabled)
4473                 for (i = 0; i < phba->num_cpus; i++) {
4474                         pbe_eq = &phwi_context->be_eq[i];
4475                         blk_iopoll_disable(&pbe_eq->iopoll);
4476                 }
4477
4478         beiscsi_clean_port(phba);
4479         beiscsi_free_mem(phba);
4480         real_offset = (u8 *)phba->csr_va + MPU_EP_SEMAPHORE;
4481
4482         value = readl((void *)real_offset);
4483
4484         if (value & 0x00010000) {
4485                 value &= 0xfffeffff;
4486                 writel(value, (void *)real_offset);
4487         }
4488         beiscsi_unmap_pci_function(phba);
4489         pci_free_consistent(phba->pcidev,
4490                             phba->ctrl.mbox_mem_alloced.size,
4491                             phba->ctrl.mbox_mem_alloced.va,
4492                             phba->ctrl.mbox_mem_alloced.dma);
4493 }
4494
4495 static void beiscsi_remove(struct pci_dev *pcidev)
4496 {
4497
4498         struct beiscsi_hba *phba = NULL;
4499
4500         phba = pci_get_drvdata(pcidev);
4501         if (!phba) {
4502                 dev_err(&pcidev->dev, "beiscsi_remove called with no phba\n");
4503                 return;
4504         }
4505
4506         beiscsi_destroy_def_ifaces(phba);
4507         beiscsi_quiesce(phba);
4508         iscsi_boot_destroy_kset(phba->boot_kset);
4509         iscsi_host_remove(phba->shost);
4510         pci_dev_put(phba->pcidev);
4511         iscsi_host_free(phba->shost);
4512         pci_disable_device(pcidev);
4513 }
4514
4515 static void beiscsi_shutdown(struct pci_dev *pcidev)
4516 {
4517
4518         struct beiscsi_hba *phba = NULL;
4519
4520         phba = (struct beiscsi_hba *)pci_get_drvdata(pcidev);
4521         if (!phba) {
4522                 dev_err(&pcidev->dev, "beiscsi_shutdown called with no phba\n");
4523                 return;
4524         }
4525
4526         beiscsi_quiesce(phba);
4527         pci_disable_device(pcidev);
4528 }
4529
4530 static void beiscsi_msix_enable(struct beiscsi_hba *phba)
4531 {
4532         int i, status;
4533
4534         for (i = 0; i <= phba->num_cpus; i++)
4535                 phba->msix_entries[i].entry = i;
4536
4537         status = pci_enable_msix(phba->pcidev, phba->msix_entries,
4538                                  (phba->num_cpus + 1));
4539         if (!status)
4540                 phba->msix_enabled = true;
4541
4542         return;
4543 }
4544
4545 static int __devinit beiscsi_dev_probe(struct pci_dev *pcidev,
4546                                 const struct pci_device_id *id)
4547 {
4548         struct beiscsi_hba *phba = NULL;
4549         struct hwi_controller *phwi_ctrlr;
4550         struct hwi_context_memory *phwi_context;
4551         struct be_eq_obj *pbe_eq;
4552         int ret, i;
4553         u8 *real_offset = 0;
4554         u32 value = 0;
4555
4556         ret = beiscsi_enable_pci(pcidev);
4557         if (ret < 0) {
4558                 dev_err(&pcidev->dev,
4559                         "beiscsi_dev_probe - Failed to enable pci device\n");
4560                 return ret;
4561         }
4562
4563         phba = beiscsi_hba_alloc(pcidev);
4564         if (!phba) {
4565                 dev_err(&pcidev->dev,
4566                         "beiscsi_dev_probe - Failed in beiscsi_hba_alloc\n");
4567                 goto disable_pci;
4568         }
4569
4570         /* Initialize Driver configuration Paramters */
4571         beiscsi_hba_attrs_init(phba);
4572
4573         switch (pcidev->device) {
4574         case BE_DEVICE_ID1:
4575         case OC_DEVICE_ID1:
4576         case OC_DEVICE_ID2:
4577                 phba->generation = BE_GEN2;
4578                 break;
4579         case BE_DEVICE_ID2:
4580         case OC_DEVICE_ID3:
4581                 phba->generation = BE_GEN3;
4582                 break;
4583         default:
4584                 phba->generation = 0;
4585         }
4586
4587         if (enable_msix)
4588                 find_num_cpus(phba);
4589         else
4590                 phba->num_cpus = 1;
4591
4592         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4593                     "BM_%d : num_cpus = %d\n",
4594                     phba->num_cpus);
4595
4596         if (enable_msix) {
4597                 beiscsi_msix_enable(phba);
4598                 if (!phba->msix_enabled)
4599                         phba->num_cpus = 1;
4600         }
4601         ret = be_ctrl_init(phba, pcidev);
4602         if (ret) {
4603                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4604                             "BM_%d : beiscsi_dev_probe-"
4605                             "Failed in be_ctrl_init\n");
4606                 goto hba_free;
4607         }
4608
4609         if (!num_hba) {
4610                 real_offset = (u8 *)phba->csr_va + MPU_EP_SEMAPHORE;
4611                 value = readl((void *)real_offset);
4612                 if (value & 0x00010000) {
4613                         gcrashmode++;
4614                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4615                                     "BM_%d : Loading Driver in crashdump mode\n");
4616                         ret = beiscsi_cmd_reset_function(phba);
4617                         if (ret) {
4618                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4619                                             "BM_%d : Reset Failed. Aborting Crashdump\n");
4620                                 goto hba_free;
4621                         }
4622                         ret = be_chk_reset_complete(phba);
4623                         if (ret) {
4624                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4625                                             "BM_%d : Failed to get out of reset."
4626                                             "Aborting Crashdump\n");
4627                                 goto hba_free;
4628                         }
4629                 } else {
4630                         value |= 0x00010000;
4631                         writel(value, (void *)real_offset);
4632                         num_hba++;
4633                 }
4634         }
4635
4636         spin_lock_init(&phba->io_sgl_lock);
4637         spin_lock_init(&phba->mgmt_sgl_lock);
4638         spin_lock_init(&phba->isr_lock);
4639         ret = mgmt_get_fw_config(&phba->ctrl, phba);
4640         if (ret != 0) {
4641                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4642                             "BM_%d : Error getting fw config\n");
4643                 goto free_port;
4644         }
4645         phba->shost->max_id = phba->fw_config.iscsi_cid_count;
4646         beiscsi_get_params(phba);
4647         phba->shost->can_queue = phba->params.ios_per_ctrl;
4648         ret = beiscsi_init_port(phba);
4649         if (ret < 0) {
4650                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4651                             "BM_%d : beiscsi_dev_probe-"
4652                             "Failed in beiscsi_init_port\n");
4653                 goto free_port;
4654         }
4655
4656         for (i = 0; i < MAX_MCC_CMD ; i++) {
4657                 init_waitqueue_head(&phba->ctrl.mcc_wait[i + 1]);
4658                 phba->ctrl.mcc_tag[i] = i + 1;
4659                 phba->ctrl.mcc_numtag[i + 1] = 0;
4660                 phba->ctrl.mcc_tag_available++;
4661         }
4662
4663         phba->ctrl.mcc_alloc_index = phba->ctrl.mcc_free_index = 0;
4664
4665         snprintf(phba->wq_name, sizeof(phba->wq_name), "beiscsi_q_irq%u",
4666                  phba->shost->host_no);
4667         phba->wq = alloc_workqueue(phba->wq_name, WQ_MEM_RECLAIM, 1);
4668         if (!phba->wq) {
4669                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4670                             "BM_%d : beiscsi_dev_probe-"
4671                             "Failed to allocate work queue\n");
4672                 goto free_twq;
4673         }
4674
4675         INIT_WORK(&phba->work_cqs, beiscsi_process_all_cqs);
4676
4677         phwi_ctrlr = phba->phwi_ctrlr;
4678         phwi_context = phwi_ctrlr->phwi_ctxt;
4679         if (blk_iopoll_enabled) {
4680                 for (i = 0; i < phba->num_cpus; i++) {
4681                         pbe_eq = &phwi_context->be_eq[i];
4682                         blk_iopoll_init(&pbe_eq->iopoll, be_iopoll_budget,
4683                                         be_iopoll);
4684                         blk_iopoll_enable(&pbe_eq->iopoll);
4685                 }
4686         }
4687         ret = beiscsi_init_irqs(phba);
4688         if (ret < 0) {
4689                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4690                             "BM_%d : beiscsi_dev_probe-"
4691                             "Failed to beiscsi_init_irqs\n");
4692                 goto free_blkenbld;
4693         }
4694         hwi_enable_intr(phba);
4695
4696         if (beiscsi_setup_boot_info(phba))
4697                 /*
4698                  * log error but continue, because we may not be using
4699                  * iscsi boot.
4700                  */
4701                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4702                             "BM_%d : Could not set up "
4703                             "iSCSI boot info.\n");
4704
4705         beiscsi_create_def_ifaces(phba);
4706         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4707                     "\n\n\n BM_%d : SUCCESS - DRIVER LOADED\n\n\n");
4708         return 0;
4709
4710 free_blkenbld:
4711         destroy_workqueue(phba->wq);
4712         if (blk_iopoll_enabled)
4713                 for (i = 0; i < phba->num_cpus; i++) {
4714                         pbe_eq = &phwi_context->be_eq[i];
4715                         blk_iopoll_disable(&pbe_eq->iopoll);
4716                 }
4717 free_twq:
4718         beiscsi_clean_port(phba);
4719         beiscsi_free_mem(phba);
4720 free_port:
4721         real_offset = (u8 *)phba->csr_va + MPU_EP_SEMAPHORE;
4722
4723         value = readl((void *)real_offset);
4724
4725         if (value & 0x00010000) {
4726                 value &= 0xfffeffff;
4727                 writel(value, (void *)real_offset);
4728         }
4729
4730         pci_free_consistent(phba->pcidev,
4731                             phba->ctrl.mbox_mem_alloced.size,
4732                             phba->ctrl.mbox_mem_alloced.va,
4733                            phba->ctrl.mbox_mem_alloced.dma);
4734         beiscsi_unmap_pci_function(phba);
4735 hba_free:
4736         if (phba->msix_enabled)
4737                 pci_disable_msix(phba->pcidev);
4738         iscsi_host_remove(phba->shost);
4739         pci_dev_put(phba->pcidev);
4740         iscsi_host_free(phba->shost);
4741 disable_pci:
4742         pci_disable_device(pcidev);
4743         return ret;
4744 }
4745
4746 struct iscsi_transport beiscsi_iscsi_transport = {
4747         .owner = THIS_MODULE,
4748         .name = DRV_NAME,
4749         .caps = CAP_RECOVERY_L0 | CAP_HDRDGST | CAP_TEXT_NEGO |
4750                 CAP_MULTI_R2T | CAP_DATADGST | CAP_DATA_PATH_OFFLOAD,
4751         .create_session = beiscsi_session_create,
4752         .destroy_session = beiscsi_session_destroy,
4753         .create_conn = beiscsi_conn_create,
4754         .bind_conn = beiscsi_conn_bind,
4755         .destroy_conn = iscsi_conn_teardown,
4756         .attr_is_visible = be2iscsi_attr_is_visible,
4757         .set_iface_param = be2iscsi_iface_set_param,
4758         .get_iface_param = be2iscsi_iface_get_param,
4759         .set_param = beiscsi_set_param,
4760         .get_conn_param = iscsi_conn_get_param,
4761         .get_session_param = iscsi_session_get_param,
4762         .get_host_param = beiscsi_get_host_param,
4763         .start_conn = beiscsi_conn_start,
4764         .stop_conn = iscsi_conn_stop,
4765         .send_pdu = iscsi_conn_send_pdu,
4766         .xmit_task = beiscsi_task_xmit,
4767         .cleanup_task = beiscsi_cleanup_task,
4768         .alloc_pdu = beiscsi_alloc_pdu,
4769         .parse_pdu_itt = beiscsi_parse_pdu,
4770         .get_stats = beiscsi_conn_get_stats,
4771         .get_ep_param = beiscsi_ep_get_param,
4772         .ep_connect = beiscsi_ep_connect,
4773         .ep_poll = beiscsi_ep_poll,
4774         .ep_disconnect = beiscsi_ep_disconnect,
4775         .session_recovery_timedout = iscsi_session_recovery_timedout,
4776         .bsg_request = beiscsi_bsg_request,
4777 };
4778
4779 static struct pci_driver beiscsi_pci_driver = {
4780         .name = DRV_NAME,
4781         .probe = beiscsi_dev_probe,
4782         .remove = beiscsi_remove,
4783         .shutdown = beiscsi_shutdown,
4784         .id_table = beiscsi_pci_id_table
4785 };
4786
4787
4788 static int __init beiscsi_module_init(void)
4789 {
4790         int ret;
4791
4792         beiscsi_scsi_transport =
4793                         iscsi_register_transport(&beiscsi_iscsi_transport);
4794         if (!beiscsi_scsi_transport) {
4795                 printk(KERN_ERR
4796                        "beiscsi_module_init - Unable to  register beiscsi transport.\n");
4797                 return -ENOMEM;
4798         }
4799         printk(KERN_INFO "In beiscsi_module_init, tt=%p\n",
4800                &beiscsi_iscsi_transport);
4801
4802         ret = pci_register_driver(&beiscsi_pci_driver);
4803         if (ret) {
4804                 printk(KERN_ERR
4805                        "beiscsi_module_init - Unable to  register beiscsi pci driver.\n");
4806                 goto unregister_iscsi_transport;
4807         }
4808         return 0;
4809
4810 unregister_iscsi_transport:
4811         iscsi_unregister_transport(&beiscsi_iscsi_transport);
4812         return ret;
4813 }
4814
4815 static void __exit beiscsi_module_exit(void)
4816 {
4817         pci_unregister_driver(&beiscsi_pci_driver);
4818         iscsi_unregister_transport(&beiscsi_iscsi_transport);
4819 }
4820
4821 module_init(beiscsi_module_init);
4822 module_exit(beiscsi_module_exit);