drivers/scsi/bnx2fc/bnx2fc_hwi.c

   1 /* bnx2fc_hwi.c: Broadcom NetXtreme II Linux FCoE offload driver.
   2  * This file contains the code that low level functions that interact
   3  * with 57712 FCoE firmware.
   4  *
   5  * Copyright (c) 2008 - 2011 Broadcom Corporation
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation.
  10  *
  11  * Written by: Bhanu Prakash Gollapudi (bprakash@broadcom.com)
  12  */
  13
  14 #include "bnx2fc.h"
  15
  16 DECLARE_PER_CPU(struct bnx2fc_percpu_s, bnx2fc_percpu);
  17
  18 static void bnx2fc_fastpath_notification(struct bnx2fc_hba *hba,
  19                                         struct fcoe_kcqe *new_cqe_kcqe);
  20 static void bnx2fc_process_ofld_cmpl(struct bnx2fc_hba *hba,
  21                                         struct fcoe_kcqe *ofld_kcqe);
  22 static void bnx2fc_process_enable_conn_cmpl(struct bnx2fc_hba *hba,
  23                                                 struct fcoe_kcqe *ofld_kcqe);
  24 static void bnx2fc_init_failure(struct bnx2fc_hba *hba, u32 err_code);
  25 static void bnx2fc_process_conn_destroy_cmpl(struct bnx2fc_hba *hba,
  26                                         struct fcoe_kcqe *destroy_kcqe);
  27
  28 int bnx2fc_send_stat_req(struct bnx2fc_hba *hba)
  29 {
  30         struct fcoe_kwqe_stat stat_req;
  31         struct kwqe *kwqe_arr[2];
  32         int num_kwqes = 1;
  33         int rc = 0;
  34
  35         memset(&stat_req, 0x00, sizeof(struct fcoe_kwqe_stat));
  36         stat_req.hdr.op_code = FCOE_KWQE_OPCODE_STAT;
  37         stat_req.hdr.flags =
  38                 (FCOE_KWQE_LAYER_CODE << FCOE_KWQE_HEADER_LAYER_CODE_SHIFT);
  39
  40         stat_req.stat_params_addr_lo = (u32) hba->stats_buf_dma;
  41         stat_req.stat_params_addr_hi = (u32) ((u64)hba->stats_buf_dma >> 32);
  42
  43         kwqe_arr[0] = (struct kwqe *) &stat_req;
  44
  45         if (hba->cnic && hba->cnic->submit_kwqes)
  46                 rc = hba->cnic->submit_kwqes(hba->cnic, kwqe_arr, num_kwqes);
  47
  48         return rc;
  49 }
  50
  51 /**
  52  * bnx2fc_send_fw_fcoe_init_msg - initiates initial handshake with FCoE f/w
  53  *
  54  * @hba:        adapter structure pointer
  55  *
  56  * Send down FCoE firmware init KWQEs which initiates the initial handshake
  57  *      with the f/w.
  58  *
  59  */
  60 int bnx2fc_send_fw_fcoe_init_msg(struct bnx2fc_hba *hba)
  61 {
  62         struct fcoe_kwqe_init1 fcoe_init1;
  63         struct fcoe_kwqe_init2 fcoe_init2;
  64         struct fcoe_kwqe_init3 fcoe_init3;
  65         struct kwqe *kwqe_arr[3];
  66         int num_kwqes = 3;
  67         int rc = 0;
  68
  69         if (!hba->cnic) {
  70                 printk(KERN_ERR PFX "hba->cnic NULL during fcoe fw init\n");
  71                 return -ENODEV;
  72         }
  73
  74         /* fill init1 KWQE */
  75         memset(&fcoe_init1, 0x00, sizeof(struct fcoe_kwqe_init1));
  76         fcoe_init1.hdr.op_code = FCOE_KWQE_OPCODE_INIT1;
  77         fcoe_init1.hdr.flags = (FCOE_KWQE_LAYER_CODE <<
  78                                         FCOE_KWQE_HEADER_LAYER_CODE_SHIFT);
  79
  80         fcoe_init1.num_tasks = hba->max_tasks;
  81         fcoe_init1.sq_num_wqes = BNX2FC_SQ_WQES_MAX;
  82         fcoe_init1.rq_num_wqes = BNX2FC_RQ_WQES_MAX;
  83         fcoe_init1.rq_buffer_log_size = BNX2FC_RQ_BUF_LOG_SZ;
  84         fcoe_init1.cq_num_wqes = BNX2FC_CQ_WQES_MAX;
  85         fcoe_init1.dummy_buffer_addr_lo = (u32) hba->dummy_buf_dma;
  86         fcoe_init1.dummy_buffer_addr_hi = (u32) ((u64)hba->dummy_buf_dma >> 32);
  87         fcoe_init1.task_list_pbl_addr_lo = (u32) hba->task_ctx_bd_dma;
  88         fcoe_init1.task_list_pbl_addr_hi =
  89                                 (u32) ((u64) hba->task_ctx_bd_dma >> 32);
  90         fcoe_init1.mtu = BNX2FC_MINI_JUMBO_MTU;
  91
  92         fcoe_init1.flags = (PAGE_SHIFT <<
  93                                 FCOE_KWQE_INIT1_LOG_PAGE_SIZE_SHIFT);
  94
  95         fcoe_init1.num_sessions_log = BNX2FC_NUM_MAX_SESS_LOG;
  96
  97         /* fill init2 KWQE */
  98         memset(&fcoe_init2, 0x00, sizeof(struct fcoe_kwqe_init2));
  99         fcoe_init2.hdr.op_code = FCOE_KWQE_OPCODE_INIT2;
 100         fcoe_init2.hdr.flags = (FCOE_KWQE_LAYER_CODE <<
 101                                         FCOE_KWQE_HEADER_LAYER_CODE_SHIFT);
 102
 103         fcoe_init2.hsi_major_version = FCOE_HSI_MAJOR_VERSION;
 104         fcoe_init2.hsi_minor_version = FCOE_HSI_MINOR_VERSION;
 105
 106
 107         fcoe_init2.hash_tbl_pbl_addr_lo = (u32) hba->hash_tbl_pbl_dma;
 108         fcoe_init2.hash_tbl_pbl_addr_hi = (u32)
 109                                            ((u64) hba->hash_tbl_pbl_dma >> 32);
 110
 111         fcoe_init2.t2_hash_tbl_addr_lo = (u32) hba->t2_hash_tbl_dma;
 112         fcoe_init2.t2_hash_tbl_addr_hi = (u32)
 113                                           ((u64) hba->t2_hash_tbl_dma >> 32);
 114
 115         fcoe_init2.t2_ptr_hash_tbl_addr_lo = (u32) hba->t2_hash_tbl_ptr_dma;
 116         fcoe_init2.t2_ptr_hash_tbl_addr_hi = (u32)
 117                                         ((u64) hba->t2_hash_tbl_ptr_dma >> 32);
 118
 119         fcoe_init2.free_list_count = BNX2FC_NUM_MAX_SESS;
 120
 121         /* fill init3 KWQE */
 122         memset(&fcoe_init3, 0x00, sizeof(struct fcoe_kwqe_init3));
 123         fcoe_init3.hdr.op_code = FCOE_KWQE_OPCODE_INIT3;
 124         fcoe_init3.hdr.flags = (FCOE_KWQE_LAYER_CODE <<
 125                                         FCOE_KWQE_HEADER_LAYER_CODE_SHIFT);
 126         fcoe_init3.error_bit_map_lo = 0xffffffff;
 127         fcoe_init3.error_bit_map_hi = 0xffffffff;
 128
 129         fcoe_init3.perf_config = 1;
 130
 131         kwqe_arr[0] = (struct kwqe *) &fcoe_init1;
 132         kwqe_arr[1] = (struct kwqe *) &fcoe_init2;
 133         kwqe_arr[2] = (struct kwqe *) &fcoe_init3;
 134
 135         if (hba->cnic && hba->cnic->submit_kwqes)
 136                 rc = hba->cnic->submit_kwqes(hba->cnic, kwqe_arr, num_kwqes);
 137
 138         return rc;
 139 }
 140 int bnx2fc_send_fw_fcoe_destroy_msg(struct bnx2fc_hba *hba)
 141 {
 142         struct fcoe_kwqe_destroy fcoe_destroy;
 143         struct kwqe *kwqe_arr[2];
 144         int num_kwqes = 1;
 145         int rc = -1;
 146
 147         /* fill destroy KWQE */
 148         memset(&fcoe_destroy, 0x00, sizeof(struct fcoe_kwqe_destroy));
 149         fcoe_destroy.hdr.op_code = FCOE_KWQE_OPCODE_DESTROY;
 150         fcoe_destroy.hdr.flags = (FCOE_KWQE_LAYER_CODE <<
 151                                         FCOE_KWQE_HEADER_LAYER_CODE_SHIFT);
 152         kwqe_arr[0] = (struct kwqe *) &fcoe_destroy;
 153
 154         if (hba->cnic && hba->cnic->submit_kwqes)
 155                 rc = hba->cnic->submit_kwqes(hba->cnic, kwqe_arr, num_kwqes);
 156         return rc;
 157 }
 158
 159 /**
 160  * bnx2fc_send_session_ofld_req - initiates FCoE Session offload process
 161  *
 162  * @port:               port structure pointer
 163  * @tgt:                bnx2fc_rport structure pointer
 164  */
 165 int bnx2fc_send_session_ofld_req(struct fcoe_port *port,
 166                                         struct bnx2fc_rport *tgt)
 167 {
 168         struct fc_lport *lport = port->lport;
 169         struct bnx2fc_interface *interface = port->priv;
 170         struct fcoe_ctlr *ctlr = bnx2fc_to_ctlr(interface);
 171         struct bnx2fc_hba *hba = interface->hba;
 172         struct kwqe *kwqe_arr[4];
 173         struct fcoe_kwqe_conn_offload1 ofld_req1;
 174         struct fcoe_kwqe_conn_offload2 ofld_req2;
 175         struct fcoe_kwqe_conn_offload3 ofld_req3;
 176         struct fcoe_kwqe_conn_offload4 ofld_req4;
 177         struct fc_rport_priv *rdata = tgt->rdata;
 178         struct fc_rport *rport = tgt->rport;
 179         int num_kwqes = 4;
 180         u32 port_id;
 181         int rc = 0;
 182         u16 conn_id;
 183
 184         /* Initialize offload request 1 structure */
 185         memset(&ofld_req1, 0x00, sizeof(struct fcoe_kwqe_conn_offload1));
 186
 187         ofld_req1.hdr.op_code = FCOE_KWQE_OPCODE_OFFLOAD_CONN1;
 188         ofld_req1.hdr.flags =
 189                 (FCOE_KWQE_LAYER_CODE << FCOE_KWQE_HEADER_LAYER_CODE_SHIFT);
 190
 191
 192         conn_id = (u16)tgt->fcoe_conn_id;
 193         ofld_req1.fcoe_conn_id = conn_id;
 194
 195
 196         ofld_req1.sq_addr_lo = (u32) tgt->sq_dma;
 197         ofld_req1.sq_addr_hi = (u32)((u64) tgt->sq_dma >> 32);
 198
 199         ofld_req1.rq_pbl_addr_lo = (u32) tgt->rq_pbl_dma;
 200         ofld_req1.rq_pbl_addr_hi = (u32)((u64) tgt->rq_pbl_dma >> 32);
 201
 202         ofld_req1.rq_first_pbe_addr_lo = (u32) tgt->rq_dma;
 203         ofld_req1.rq_first_pbe_addr_hi =
 204                                 (u32)((u64) tgt->rq_dma >> 32);
 205
 206         ofld_req1.rq_prod = 0x8000;
 207
 208         /* Initialize offload request 2 structure */
 209         memset(&ofld_req2, 0x00, sizeof(struct fcoe_kwqe_conn_offload2));
 210
 211         ofld_req2.hdr.op_code = FCOE_KWQE_OPCODE_OFFLOAD_CONN2;
 212         ofld_req2.hdr.flags =
 213                 (FCOE_KWQE_LAYER_CODE << FCOE_KWQE_HEADER_LAYER_CODE_SHIFT);
 214
 215         ofld_req2.tx_max_fc_pay_len = rdata->maxframe_size;
 216
 217         ofld_req2.cq_addr_lo = (u32) tgt->cq_dma;
 218         ofld_req2.cq_addr_hi = (u32)((u64)tgt->cq_dma >> 32);
 219
 220         ofld_req2.xferq_addr_lo = (u32) tgt->xferq_dma;
 221         ofld_req2.xferq_addr_hi = (u32)((u64)tgt->xferq_dma >> 32);
 222
 223         ofld_req2.conn_db_addr_lo = (u32)tgt->conn_db_dma;
 224         ofld_req2.conn_db_addr_hi = (u32)((u64)tgt->conn_db_dma >> 32);
 225
 226         /* Initialize offload request 3 structure */
 227         memset(&ofld_req3, 0x00, sizeof(struct fcoe_kwqe_conn_offload3));
 228
 229         ofld_req3.hdr.op_code = FCOE_KWQE_OPCODE_OFFLOAD_CONN3;
 230         ofld_req3.hdr.flags =
 231                 (FCOE_KWQE_LAYER_CODE << FCOE_KWQE_HEADER_LAYER_CODE_SHIFT);
 232
 233         ofld_req3.vlan_tag = interface->vlan_id <<
 234                                 FCOE_KWQE_CONN_OFFLOAD3_VLAN_ID_SHIFT;
 235         ofld_req3.vlan_tag |= 3 << FCOE_KWQE_CONN_OFFLOAD3_PRIORITY_SHIFT;
 236
 237         port_id = fc_host_port_id(lport->host);
 238         if (port_id == 0) {
 239                 BNX2FC_HBA_DBG(lport, "ofld_req: port_id = 0, link down?\n");
 240                 return -EINVAL;
 241         }
 242
 243         /*
 244          * Store s_id of the initiator for further reference. This will
 245          * be used during disable/destroy during linkdown processing as
 246          * when the lport is reset, the port_id also is reset to 0
 247          */
 248         tgt->sid = port_id;
 249         ofld_req3.s_id[0] = (port_id & 0x000000FF);
 250         ofld_req3.s_id[1] = (port_id & 0x0000FF00) >> 8;
 251         ofld_req3.s_id[2] = (port_id & 0x00FF0000) >> 16;
 252
 253         port_id = rport->port_id;
 254         ofld_req3.d_id[0] = (port_id & 0x000000FF);
 255         ofld_req3.d_id[1] = (port_id & 0x0000FF00) >> 8;
 256         ofld_req3.d_id[2] = (port_id & 0x00FF0000) >> 16;
 257
 258         ofld_req3.tx_total_conc_seqs = rdata->max_seq;
 259
 260         ofld_req3.tx_max_conc_seqs_c3 = rdata->max_seq;
 261         ofld_req3.rx_max_fc_pay_len  = lport->mfs;
 262
 263         ofld_req3.rx_total_conc_seqs = BNX2FC_MAX_SEQS;
 264         ofld_req3.rx_max_conc_seqs_c3 = BNX2FC_MAX_SEQS;
 265         ofld_req3.rx_open_seqs_exch_c3 = 1;
 266
 267         ofld_req3.confq_first_pbe_addr_lo = tgt->confq_dma;
 268         ofld_req3.confq_first_pbe_addr_hi = (u32)((u64) tgt->confq_dma >> 32);
 269
 270         /* set mul_n_port_ids supported flag to 0, until it is supported */
 271         ofld_req3.flags = 0;
 272         /*
 273         ofld_req3.flags |= (((lport->send_sp_features & FC_SP_FT_MNA) ? 1:0) <<
 274                             FCOE_KWQE_CONN_OFFLOAD3_B_MUL_N_PORT_IDS_SHIFT);
 275         */
 276         /* Info from PLOGI response */
 277         ofld_req3.flags |= (((rdata->sp_features & FC_SP_FT_EDTR) ? 1 : 0) <<
 278                              FCOE_KWQE_CONN_OFFLOAD3_B_E_D_TOV_RES_SHIFT);
 279
 280         ofld_req3.flags |= (((rdata->sp_features & FC_SP_FT_SEQC) ? 1 : 0) <<
 281                              FCOE_KWQE_CONN_OFFLOAD3_B_CONT_INCR_SEQ_CNT_SHIFT);
 282
 283         /*
 284          * Info from PRLI response, this info is used for sequence level error
 285          * recovery support
 286          */
 287         if (tgt->dev_type == TYPE_TAPE) {
 288                 ofld_req3.flags |= 1 <<
 289                                     FCOE_KWQE_CONN_OFFLOAD3_B_CONF_REQ_SHIFT;
 290                 ofld_req3.flags |= (((rdata->flags & FC_RP_FLAGS_REC_SUPPORTED)
 291                                     ? 1 : 0) <<
 292                                     FCOE_KWQE_CONN_OFFLOAD3_B_REC_VALID_SHIFT);
 293         }
 294
 295         /* vlan flag */
 296         ofld_req3.flags |= (interface->vlan_enabled <<
 297                             FCOE_KWQE_CONN_OFFLOAD3_B_VLAN_FLAG_SHIFT);
 298
 299         /* C2_VALID and ACK flags are not set as they are not supported */
 300
 301
 302         /* Initialize offload request 4 structure */
 303         memset(&ofld_req4, 0x00, sizeof(struct fcoe_kwqe_conn_offload4));
 304         ofld_req4.hdr.op_code = FCOE_KWQE_OPCODE_OFFLOAD_CONN4;
 305         ofld_req4.hdr.flags =
 306                 (FCOE_KWQE_LAYER_CODE << FCOE_KWQE_HEADER_LAYER_CODE_SHIFT);
 307
 308         ofld_req4.e_d_tov_timer_val = lport->e_d_tov / 20;
 309
 310
 311         ofld_req4.src_mac_addr_lo[0] =  port->data_src_addr[5];
 312                                                         /* local mac */
 313         ofld_req4.src_mac_addr_lo[1] =  port->data_src_addr[4];
 314         ofld_req4.src_mac_addr_mid[0] =  port->data_src_addr[3];
 315         ofld_req4.src_mac_addr_mid[1] =  port->data_src_addr[2];
 316         ofld_req4.src_mac_addr_hi[0] =  port->data_src_addr[1];
 317         ofld_req4.src_mac_addr_hi[1] =  port->data_src_addr[0];
 318         ofld_req4.dst_mac_addr_lo[0] =  ctlr->dest_addr[5];
 319                                                         /* fcf mac */
 320         ofld_req4.dst_mac_addr_lo[1] = ctlr->dest_addr[4];
 321         ofld_req4.dst_mac_addr_mid[0] = ctlr->dest_addr[3];
 322         ofld_req4.dst_mac_addr_mid[1] = ctlr->dest_addr[2];
 323         ofld_req4.dst_mac_addr_hi[0] = ctlr->dest_addr[1];
 324         ofld_req4.dst_mac_addr_hi[1] = ctlr->dest_addr[0];
 325
 326         ofld_req4.lcq_addr_lo = (u32) tgt->lcq_dma;
 327         ofld_req4.lcq_addr_hi = (u32)((u64) tgt->lcq_dma >> 32);
 328
 329         ofld_req4.confq_pbl_base_addr_lo = (u32) tgt->confq_pbl_dma;
 330         ofld_req4.confq_pbl_base_addr_hi =
 331                                         (u32)((u64) tgt->confq_pbl_dma >> 32);
 332
 333         kwqe_arr[0] = (struct kwqe *) &ofld_req1;
 334         kwqe_arr[1] = (struct kwqe *) &ofld_req2;
 335         kwqe_arr[2] = (struct kwqe *) &ofld_req3;
 336         kwqe_arr[3] = (struct kwqe *) &ofld_req4;
 337
 338         if (hba->cnic && hba->cnic->submit_kwqes)
 339                 rc = hba->cnic->submit_kwqes(hba->cnic, kwqe_arr, num_kwqes);
 340
 341         return rc;
 342 }
 343
 344 /**
 345  * bnx2fc_send_session_enable_req - initiates FCoE Session enablement
 346  *
 347  * @port:               port structure pointer
 348  * @tgt:                bnx2fc_rport structure pointer
 349  */
 350 int bnx2fc_send_session_enable_req(struct fcoe_port *port,
 351                                         struct bnx2fc_rport *tgt)
 352 {
 353         struct kwqe *kwqe_arr[2];
 354         struct bnx2fc_interface *interface = port->priv;
 355         struct fcoe_ctlr *ctlr = bnx2fc_to_ctlr(interface);
 356         struct bnx2fc_hba *hba = interface->hba;
 357         struct fcoe_kwqe_conn_enable_disable enbl_req;
 358         struct fc_lport *lport = port->lport;
 359         struct fc_rport *rport = tgt->rport;
 360         int num_kwqes = 1;
 361         int rc = 0;
 362         u32 port_id;
 363
 364         memset(&enbl_req, 0x00,
 365                sizeof(struct fcoe_kwqe_conn_enable_disable));
 366         enbl_req.hdr.op_code = FCOE_KWQE_OPCODE_ENABLE_CONN;
 367         enbl_req.hdr.flags =
 368                 (FCOE_KWQE_LAYER_CODE << FCOE_KWQE_HEADER_LAYER_CODE_SHIFT);
 369
 370         enbl_req.src_mac_addr_lo[0] =  port->data_src_addr[5];
 371                                                         /* local mac */
 372         enbl_req.src_mac_addr_lo[1] =  port->data_src_addr[4];
 373         enbl_req.src_mac_addr_mid[0] =  port->data_src_addr[3];
 374         enbl_req.src_mac_addr_mid[1] =  port->data_src_addr[2];
 375         enbl_req.src_mac_addr_hi[0] =  port->data_src_addr[1];
 376         enbl_req.src_mac_addr_hi[1] =  port->data_src_addr[0];
 377         memcpy(tgt->src_addr, port->data_src_addr, ETH_ALEN);
 378
 379         enbl_req.dst_mac_addr_lo[0] =  ctlr->dest_addr[5];
 380         enbl_req.dst_mac_addr_lo[1] =  ctlr->dest_addr[4];
 381         enbl_req.dst_mac_addr_mid[0] = ctlr->dest_addr[3];
 382         enbl_req.dst_mac_addr_mid[1] = ctlr->dest_addr[2];
 383         enbl_req.dst_mac_addr_hi[0] = ctlr->dest_addr[1];
 384         enbl_req.dst_mac_addr_hi[1] = ctlr->dest_addr[0];
 385
 386         port_id = fc_host_port_id(lport->host);
 387         if (port_id != tgt->sid) {
 388                 printk(KERN_ERR PFX "WARN: enable_req port_id = 0x%x,"
 389                                 "sid = 0x%x\n", port_id, tgt->sid);
 390                 port_id = tgt->sid;
 391         }
 392         enbl_req.s_id[0] = (port_id & 0x000000FF);
 393         enbl_req.s_id[1] = (port_id & 0x0000FF00) >> 8;
 394         enbl_req.s_id[2] = (port_id & 0x00FF0000) >> 16;
 395
 396         port_id = rport->port_id;
 397         enbl_req.d_id[0] = (port_id & 0x000000FF);
 398         enbl_req.d_id[1] = (port_id & 0x0000FF00) >> 8;
 399         enbl_req.d_id[2] = (port_id & 0x00FF0000) >> 16;
 400         enbl_req.vlan_tag = interface->vlan_id <<
 401                                 FCOE_KWQE_CONN_ENABLE_DISABLE_VLAN_ID_SHIFT;
 402         enbl_req.vlan_tag |= 3 << FCOE_KWQE_CONN_ENABLE_DISABLE_PRIORITY_SHIFT;
 403         enbl_req.vlan_flag = interface->vlan_enabled;
 404         enbl_req.context_id = tgt->context_id;
 405         enbl_req.conn_id = tgt->fcoe_conn_id;
 406
 407         kwqe_arr[0] = (struct kwqe *) &enbl_req;
 408
 409         if (hba->cnic && hba->cnic->submit_kwqes)
 410                 rc = hba->cnic->submit_kwqes(hba->cnic, kwqe_arr, num_kwqes);
 411         return rc;
 412 }
 413
 414 /**
 415  * bnx2fc_send_session_disable_req - initiates FCoE Session disable
 416  *
 417  * @port:               port structure pointer
 418  * @tgt:                bnx2fc_rport structure pointer
 419  */
 420 int bnx2fc_send_session_disable_req(struct fcoe_port *port,
 421                                     struct bnx2fc_rport *tgt)
 422 {
 423         struct bnx2fc_interface *interface = port->priv;
 424         struct fcoe_ctlr *ctlr = bnx2fc_to_ctlr(interface);
 425         struct bnx2fc_hba *hba = interface->hba;
 426         struct fcoe_kwqe_conn_enable_disable disable_req;
 427         struct kwqe *kwqe_arr[2];
 428         struct fc_rport *rport = tgt->rport;
 429         int num_kwqes = 1;
 430         int rc = 0;
 431         u32 port_id;
 432
 433         memset(&disable_req, 0x00,
 434                sizeof(struct fcoe_kwqe_conn_enable_disable));
 435         disable_req.hdr.op_code = FCOE_KWQE_OPCODE_DISABLE_CONN;
 436         disable_req.hdr.flags =
 437                 (FCOE_KWQE_LAYER_CODE << FCOE_KWQE_HEADER_LAYER_CODE_SHIFT);
 438
 439         disable_req.src_mac_addr_lo[0] =  tgt->src_addr[5];
 440         disable_req.src_mac_addr_lo[1] =  tgt->src_addr[4];
 441         disable_req.src_mac_addr_mid[0] =  tgt->src_addr[3];
 442         disable_req.src_mac_addr_mid[1] =  tgt->src_addr[2];
 443         disable_req.src_mac_addr_hi[0] =  tgt->src_addr[1];
 444         disable_req.src_mac_addr_hi[1] =  tgt->src_addr[0];
 445
 446         disable_req.dst_mac_addr_lo[0] =  ctlr->dest_addr[5];
 447         disable_req.dst_mac_addr_lo[1] =  ctlr->dest_addr[4];
 448         disable_req.dst_mac_addr_mid[0] = ctlr->dest_addr[3];
 449         disable_req.dst_mac_addr_mid[1] = ctlr->dest_addr[2];
 450         disable_req.dst_mac_addr_hi[0] = ctlr->dest_addr[1];
 451         disable_req.dst_mac_addr_hi[1] = ctlr->dest_addr[0];
 452
 453         port_id = tgt->sid;
 454         disable_req.s_id[0] = (port_id & 0x000000FF);
 455         disable_req.s_id[1] = (port_id & 0x0000FF00) >> 8;
 456         disable_req.s_id[2] = (port_id & 0x00FF0000) >> 16;
 457
 458
 459         port_id = rport->port_id;
 460         disable_req.d_id[0] = (port_id & 0x000000FF);
 461         disable_req.d_id[1] = (port_id & 0x0000FF00) >> 8;
 462         disable_req.d_id[2] = (port_id & 0x00FF0000) >> 16;
 463         disable_req.context_id = tgt->context_id;
 464         disable_req.conn_id = tgt->fcoe_conn_id;
 465         disable_req.vlan_tag = interface->vlan_id <<
 466                                 FCOE_KWQE_CONN_ENABLE_DISABLE_VLAN_ID_SHIFT;
 467         disable_req.vlan_tag |=
 468                         3 << FCOE_KWQE_CONN_ENABLE_DISABLE_PRIORITY_SHIFT;
 469         disable_req.vlan_flag = interface->vlan_enabled;
 470
 471         kwqe_arr[0] = (struct kwqe *) &disable_req;
 472
 473         if (hba->cnic && hba->cnic->submit_kwqes)
 474                 rc = hba->cnic->submit_kwqes(hba->cnic, kwqe_arr, num_kwqes);
 475
 476         return rc;
 477 }
 478
 479 /**
 480  * bnx2fc_send_session_destroy_req - initiates FCoE Session destroy
 481  *
 482  * @port:               port structure pointer
 483  * @tgt:                bnx2fc_rport structure pointer
 484  */
 485 int bnx2fc_send_session_destroy_req(struct bnx2fc_hba *hba,
 486                                         struct bnx2fc_rport *tgt)
 487 {
 488         struct fcoe_kwqe_conn_destroy destroy_req;
 489         struct kwqe *kwqe_arr[2];
 490         int num_kwqes = 1;
 491         int rc = 0;
 492
 493         memset(&destroy_req, 0x00, sizeof(struct fcoe_kwqe_conn_destroy));
 494         destroy_req.hdr.op_code = FCOE_KWQE_OPCODE_DESTROY_CONN;
 495         destroy_req.hdr.flags =
 496                 (FCOE_KWQE_LAYER_CODE << FCOE_KWQE_HEADER_LAYER_CODE_SHIFT);
 497
 498         destroy_req.context_id = tgt->context_id;
 499         destroy_req.conn_id = tgt->fcoe_conn_id;
 500
 501         kwqe_arr[0] = (struct kwqe *) &destroy_req;
 502
 503         if (hba->cnic && hba->cnic->submit_kwqes)
 504                 rc = hba->cnic->submit_kwqes(hba->cnic, kwqe_arr, num_kwqes);
 505
 506         return rc;
 507 }
 508
 509 static bool is_valid_lport(struct bnx2fc_hba *hba, struct fc_lport *lport)
 510 {
 511         struct bnx2fc_lport *blport;
 512
 513         spin_lock_bh(&hba->hba_lock);
 514         list_for_each_entry(blport, &hba->vports, list) {
 515                 if (blport->lport == lport) {
 516                         spin_unlock_bh(&hba->hba_lock);
 517                         return true;
 518                 }
 519         }
 520         spin_unlock_bh(&hba->hba_lock);
 521         return false;
 522
 523 }
 524
 525
 526 static void bnx2fc_unsol_els_work(struct work_struct *work)
 527 {
 528         struct bnx2fc_unsol_els *unsol_els;
 529         struct fc_lport *lport;
 530         struct bnx2fc_hba *hba;
 531         struct fc_frame *fp;
 532
 533         unsol_els = container_of(work, struct bnx2fc_unsol_els, unsol_els_work);
 534         lport = unsol_els->lport;
 535         fp = unsol_els->fp;
 536         hba = unsol_els->hba;
 537         if (is_valid_lport(hba, lport))
 538                 fc_exch_recv(lport, fp);
 539         kfree(unsol_els);
 540 }
 541
 542 void bnx2fc_process_l2_frame_compl(struct bnx2fc_rport *tgt,
 543                                    unsigned char *buf,
 544                                    u32 frame_len, u16 l2_oxid)
 545 {
 546         struct fcoe_port *port = tgt->port;
 547         struct fc_lport *lport = port->lport;
 548         struct bnx2fc_interface *interface = port->priv;
 549         struct bnx2fc_unsol_els *unsol_els;
 550         struct fc_frame_header *fh;
 551         struct fc_frame *fp;
 552         struct sk_buff *skb;
 553         u32 payload_len;
 554         u32 crc;
 555         u8 op;
 556
 557
 558         unsol_els = kzalloc(sizeof(*unsol_els), GFP_ATOMIC);
 559         if (!unsol_els) {
 560                 BNX2FC_TGT_DBG(tgt, "Unable to allocate unsol_work\n");
 561                 return;
 562         }
 563
 564         BNX2FC_TGT_DBG(tgt, "l2_frame_compl l2_oxid = 0x%x, frame_len = %d\n",
 565                 l2_oxid, frame_len);
 566
 567         payload_len = frame_len - sizeof(struct fc_frame_header);
 568
 569         fp = fc_frame_alloc(lport, payload_len);
 570         if (!fp) {
 571                 printk(KERN_ERR PFX "fc_frame_alloc failure\n");
 572                 kfree(unsol_els);
 573                 return;
 574         }
 575
 576         fh = (struct fc_frame_header *) fc_frame_header_get(fp);
 577         /* Copy FC Frame header and payload into the frame */
 578         memcpy(fh, buf, frame_len);
 579
 580         if (l2_oxid != FC_XID_UNKNOWN)
 581                 fh->fh_ox_id = htons(l2_oxid);
 582
 583         skb = fp_skb(fp);
 584
 585         if ((fh->fh_r_ctl == FC_RCTL_ELS_REQ) ||
 586             (fh->fh_r_ctl == FC_RCTL_ELS_REP)) {
 587
 588                 if (fh->fh_type == FC_TYPE_ELS) {
 589                         op = fc_frame_payload_op(fp);
 590                         if ((op == ELS_TEST) || (op == ELS_ESTC) ||
 591                             (op == ELS_FAN) || (op == ELS_CSU)) {
 592                                 /*
 593                                  * No need to reply for these
 594                                  * ELS requests
 595                                  */
 596                                 printk(KERN_ERR PFX "dropping ELS 0x%x\n", op);
 597                                 kfree_skb(skb);
 598                                 kfree(unsol_els);
 599                                 return;
 600                         }
 601                 }
 602                 crc = fcoe_fc_crc(fp);
 603                 fc_frame_init(fp);
 604                 fr_dev(fp) = lport;
 605                 fr_sof(fp) = FC_SOF_I3;
 606                 fr_eof(fp) = FC_EOF_T;
 607                 fr_crc(fp) = cpu_to_le32(~crc);
 608                 unsol_els->lport = lport;
 609                 unsol_els->hba = interface->hba;
 610                 unsol_els->fp = fp;
 611                 INIT_WORK(&unsol_els->unsol_els_work, bnx2fc_unsol_els_work);
 612                 queue_work(bnx2fc_wq, &unsol_els->unsol_els_work);
 613         } else {
 614                 BNX2FC_HBA_DBG(lport, "fh_r_ctl = 0x%x\n", fh->fh_r_ctl);
 615                 kfree_skb(skb);
 616                 kfree(unsol_els);
 617         }
 618 }
 619
 620 static void bnx2fc_process_unsol_compl(struct bnx2fc_rport *tgt, u16 wqe)
 621 {
 622         u8 num_rq;
 623         struct fcoe_err_report_entry *err_entry;
 624         unsigned char *rq_data;
 625         unsigned char *buf = NULL, *buf1;
 626         int i;
 627         u16 xid;
 628         u32 frame_len, len;
 629         struct bnx2fc_cmd *io_req = NULL;
 630         struct fcoe_task_ctx_entry *task, *task_page;
 631         struct bnx2fc_interface *interface = tgt->port->priv;
 632         struct bnx2fc_hba *hba = interface->hba;
 633         int task_idx, index;
 634         int rc = 0;
 635         u64 err_warn_bit_map;
 636         u8 err_warn = 0xff;
 637
 638
 639         BNX2FC_TGT_DBG(tgt, "Entered UNSOL COMPLETION wqe = 0x%x\n", wqe);
 640         switch (wqe & FCOE_UNSOLICITED_CQE_SUBTYPE) {
 641         case FCOE_UNSOLICITED_FRAME_CQE_TYPE:
 642                 frame_len = (wqe & FCOE_UNSOLICITED_CQE_PKT_LEN) >>
 643                              FCOE_UNSOLICITED_CQE_PKT_LEN_SHIFT;
 644
 645                 num_rq = (frame_len + BNX2FC_RQ_BUF_SZ - 1) / BNX2FC_RQ_BUF_SZ;
 646
 647                 spin_lock_bh(&tgt->tgt_lock);
 648                 rq_data = (unsigned char *)bnx2fc_get_next_rqe(tgt, num_rq);
 649                 spin_unlock_bh(&tgt->tgt_lock);
 650
 651                 if (rq_data) {
 652                         buf = rq_data;
 653                 } else {
 654                         buf1 = buf = kmalloc((num_rq * BNX2FC_RQ_BUF_SZ),
 655                                               GFP_ATOMIC);
 656
 657                         if (!buf1) {
 658                                 BNX2FC_TGT_DBG(tgt, "Memory alloc failure\n");
 659                                 break;
 660                         }
 661
 662                         for (i = 0; i < num_rq; i++) {
 663                                 spin_lock_bh(&tgt->tgt_lock);
 664                                 rq_data = (unsigned char *)
 665                                            bnx2fc_get_next_rqe(tgt, 1);
 666                                 spin_unlock_bh(&tgt->tgt_lock);
 667                                 len = BNX2FC_RQ_BUF_SZ;
 668                                 memcpy(buf1, rq_data, len);
 669                                 buf1 += len;
 670                         }
 671                 }
 672                 bnx2fc_process_l2_frame_compl(tgt, buf, frame_len,
 673                                               FC_XID_UNKNOWN);
 674
 675                 if (buf != rq_data)
 676                         kfree(buf);
 677                 spin_lock_bh(&tgt->tgt_lock);
 678                 bnx2fc_return_rqe(tgt, num_rq);
 679                 spin_unlock_bh(&tgt->tgt_lock);
 680                 break;
 681
 682         case FCOE_ERROR_DETECTION_CQE_TYPE:
 683                 /*
 684                  * In case of error reporting CQE a single RQ entry
 685                  * is consumed.
 686                  */
 687                 spin_lock_bh(&tgt->tgt_lock);
 688                 num_rq = 1;
 689                 err_entry = (struct fcoe_err_report_entry *)
 690                              bnx2fc_get_next_rqe(tgt, 1);
 691                 xid = err_entry->fc_hdr.ox_id;
 692                 BNX2FC_TGT_DBG(tgt, "Unsol Error Frame OX_ID = 0x%x\n", xid);
 693                 BNX2FC_TGT_DBG(tgt, "err_warn_bitmap = %08x:%08x\n",
 694                         err_entry->data.err_warn_bitmap_hi,
 695                         err_entry->data.err_warn_bitmap_lo);
 696                 BNX2FC_TGT_DBG(tgt, "buf_offsets - tx = 0x%x, rx = 0x%x\n",
 697                         err_entry->data.tx_buf_off, err_entry->data.rx_buf_off);
 698
 699
 700                 if (xid > hba->max_xid) {
 701                         BNX2FC_TGT_DBG(tgt, "xid(0x%x) out of FW range\n",
 702                                    xid);
 703                         goto ret_err_rqe;
 704                 }
 705
 706                 task_idx = xid / BNX2FC_TASKS_PER_PAGE;
 707                 index = xid % BNX2FC_TASKS_PER_PAGE;
 708                 task_page = (struct fcoe_task_ctx_entry *)
 709                                         hba->task_ctx[task_idx];
 710                 task = &(task_page[index]);
 711
 712                 io_req = (struct bnx2fc_cmd *)hba->cmd_mgr->cmds[xid];
 713                 if (!io_req)
 714                         goto ret_err_rqe;
 715
 716                 if (io_req->cmd_type != BNX2FC_SCSI_CMD) {
 717                         printk(KERN_ERR PFX "err_warn: Not a SCSI cmd\n");
 718                         goto ret_err_rqe;
 719                 }
 720
 721                 if (test_and_clear_bit(BNX2FC_FLAG_IO_CLEANUP,
 722                                        &io_req->req_flags)) {
 723                         BNX2FC_IO_DBG(io_req, "unsol_err: cleanup in "
 724                                             "progress.. ignore unsol err\n");
 725                         goto ret_err_rqe;
 726                 }
 727
 728                 err_warn_bit_map = (u64)
 729                         ((u64)err_entry->data.err_warn_bitmap_hi << 32) |
 730                         (u64)err_entry->data.err_warn_bitmap_lo;
 731                 for (i = 0; i < BNX2FC_NUM_ERR_BITS; i++) {
 732                         if (err_warn_bit_map & (u64)((u64)1 << i)) {
 733                                 err_warn = i;
 734                                 break;
 735                         }
 736                 }
 737
 738                 /*
 739                  * If ABTS is already in progress, and FW error is
 740                  * received after that, do not cancel the timeout_work
 741                  * and let the error recovery continue by explicitly
 742                  * logging out the target, when the ABTS eventually
 743                  * times out.
 744                  */
 745                 if (test_bit(BNX2FC_FLAG_ISSUE_ABTS, &io_req->req_flags)) {
 746                         printk(KERN_ERR PFX "err_warn: io_req (0x%x) already "
 747                                             "in ABTS processing\n", xid);
 748                         goto ret_err_rqe;
 749                 }
 750                 BNX2FC_TGT_DBG(tgt, "err = 0x%x\n", err_warn);
 751                 if (tgt->dev_type != TYPE_TAPE)
 752                         goto skip_rec;
 753                 switch (err_warn) {
 754                 case FCOE_ERROR_CODE_REC_TOV_TIMER_EXPIRATION:
 755                 case FCOE_ERROR_CODE_DATA_OOO_RO:
 756                 case FCOE_ERROR_CODE_COMMON_INCORRECT_SEQ_CNT:
 757                 case FCOE_ERROR_CODE_DATA_SOFI3_SEQ_ACTIVE_SET:
 758                 case FCOE_ERROR_CODE_FCP_RSP_OPENED_SEQ:
 759                 case FCOE_ERROR_CODE_DATA_SOFN_SEQ_ACTIVE_RESET:
 760                         BNX2FC_TGT_DBG(tgt, "REC TOV popped for xid - 0x%x\n",
 761                                    xid);
 762                         memcpy(&io_req->err_entry, err_entry,
 763                                sizeof(struct fcoe_err_report_entry));
 764                         if (!test_bit(BNX2FC_FLAG_SRR_SENT,
 765                                       &io_req->req_flags)) {
 766                                 spin_unlock_bh(&tgt->tgt_lock);
 767                                 rc = bnx2fc_send_rec(io_req);
 768                                 spin_lock_bh(&tgt->tgt_lock);
 769
 770                                 if (rc)
 771                                         goto skip_rec;
 772                         } else
 773                                 printk(KERN_ERR PFX "SRR in progress\n");
 774                         goto ret_err_rqe;
 775                         break;
 776                 default:
 777                         break;
 778                 }
 779
 780 skip_rec:
 781                 set_bit(BNX2FC_FLAG_ISSUE_ABTS, &io_req->req_flags);
 782                 /*
 783                  * Cancel the timeout_work, as we received IO
 784                  * completion with FW error.
 785                  */
 786                 if (cancel_delayed_work(&io_req->timeout_work))
 787                         kref_put(&io_req->refcount, bnx2fc_cmd_release);
 788
 789                 rc = bnx2fc_initiate_abts(io_req);
 790                 if (rc != SUCCESS) {
 791                         printk(KERN_ERR PFX "err_warn: initiate_abts "
 792                                 "failed xid = 0x%x. issue cleanup\n",
 793                                 io_req->xid);
 794                         bnx2fc_initiate_cleanup(io_req);
 795                 }
 796 ret_err_rqe:
 797                 bnx2fc_return_rqe(tgt, 1);
 798                 spin_unlock_bh(&tgt->tgt_lock);
 799                 break;
 800
 801         case FCOE_WARNING_DETECTION_CQE_TYPE:
 802                 /*
 803                  *In case of warning reporting CQE a single RQ entry
 804                  * is consumes.
 805                  */
 806                 spin_lock_bh(&tgt->tgt_lock);
 807                 num_rq = 1;
 808                 err_entry = (struct fcoe_err_report_entry *)
 809                              bnx2fc_get_next_rqe(tgt, 1);
 810                 xid = cpu_to_be16(err_entry->fc_hdr.ox_id);
 811                 BNX2FC_TGT_DBG(tgt, "Unsol Warning Frame OX_ID = 0x%x\n", xid);
 812                 BNX2FC_TGT_DBG(tgt, "err_warn_bitmap = %08x:%08x",
 813                         err_entry->data.err_warn_bitmap_hi,
 814                         err_entry->data.err_warn_bitmap_lo);
 815                 BNX2FC_TGT_DBG(tgt, "buf_offsets - tx = 0x%x, rx = 0x%x",
 816                         err_entry->data.tx_buf_off, err_entry->data.rx_buf_off);
 817
 818                 if (xid > hba->max_xid) {
 819                         BNX2FC_TGT_DBG(tgt, "xid(0x%x) out of FW range\n", xid);
 820                         goto ret_warn_rqe;
 821                 }
 822
 823                 err_warn_bit_map = (u64)
 824                         ((u64)err_entry->data.err_warn_bitmap_hi << 32) |
 825                         (u64)err_entry->data.err_warn_bitmap_lo;
 826                 for (i = 0; i < BNX2FC_NUM_ERR_BITS; i++) {
 827                         if (err_warn_bit_map & (u64) (1 << i)) {
 828                                 err_warn = i;
 829                                 break;
 830                         }
 831                 }
 832                 BNX2FC_TGT_DBG(tgt, "warn = 0x%x\n", err_warn);
 833
 834                 task_idx = xid / BNX2FC_TASKS_PER_PAGE;
 835                 index = xid % BNX2FC_TASKS_PER_PAGE;
 836                 task_page = (struct fcoe_task_ctx_entry *)
 837                              interface->hba->task_ctx[task_idx];
 838                 task = &(task_page[index]);
 839                 io_req = (struct bnx2fc_cmd *)hba->cmd_mgr->cmds[xid];
 840                 if (!io_req)
 841                         goto ret_warn_rqe;
 842
 843                 if (io_req->cmd_type != BNX2FC_SCSI_CMD) {
 844                         printk(KERN_ERR PFX "err_warn: Not a SCSI cmd\n");
 845                         goto ret_warn_rqe;
 846                 }
 847
 848                 memcpy(&io_req->err_entry, err_entry,
 849                        sizeof(struct fcoe_err_report_entry));
 850
 851                 if (err_warn == FCOE_ERROR_CODE_REC_TOV_TIMER_EXPIRATION)
 852                         /* REC_TOV is not a warning code */
 853                         BUG_ON(1);
 854                 else
 855                         BNX2FC_TGT_DBG(tgt, "Unsolicited warning\n");
 856 ret_warn_rqe:
 857                 bnx2fc_return_rqe(tgt, 1);
 858                 spin_unlock_bh(&tgt->tgt_lock);
 859                 break;
 860
 861         default:
 862                 printk(KERN_ERR PFX "Unsol Compl: Invalid CQE Subtype\n");
 863                 break;
 864         }
 865 }
 866
 867 void bnx2fc_process_cq_compl(struct bnx2fc_rport *tgt, u16 wqe)
 868 {
 869         struct fcoe_task_ctx_entry *task;
 870         struct fcoe_task_ctx_entry *task_page;
 871         struct fcoe_port *port = tgt->port;
 872         struct bnx2fc_interface *interface = port->priv;
 873         struct bnx2fc_hba *hba = interface->hba;
 874         struct bnx2fc_cmd *io_req;
 875         int task_idx, index;
 876         u16 xid;
 877         u8  cmd_type;
 878         u8 rx_state = 0;
 879         u8 num_rq;
 880
 881         spin_lock_bh(&tgt->tgt_lock);
 882         xid = wqe & FCOE_PEND_WQ_CQE_TASK_ID;
 883         if (xid >= hba->max_tasks) {
 884                 printk(KERN_ERR PFX "ERROR:xid out of range\n");
 885                 spin_unlock_bh(&tgt->tgt_lock);
 886                 return;
 887         }
 888         task_idx = xid / BNX2FC_TASKS_PER_PAGE;
 889         index = xid % BNX2FC_TASKS_PER_PAGE;
 890         task_page = (struct fcoe_task_ctx_entry *)hba->task_ctx[task_idx];
 891         task = &(task_page[index]);
 892
 893         num_rq = ((task->rxwr_txrd.var_ctx.rx_flags &
 894                    FCOE_TCE_RX_WR_TX_RD_VAR_NUM_RQ_WQE) >>
 895                    FCOE_TCE_RX_WR_TX_RD_VAR_NUM_RQ_WQE_SHIFT);
 896
 897         io_req = (struct bnx2fc_cmd *)hba->cmd_mgr->cmds[xid];
 898
 899         if (io_req == NULL) {
 900                 printk(KERN_ERR PFX "ERROR? cq_compl - io_req is NULL\n");
 901                 spin_unlock_bh(&tgt->tgt_lock);
 902                 return;
 903         }
 904
 905         /* Timestamp IO completion time */
 906         cmd_type = io_req->cmd_type;
 907
 908         rx_state = ((task->rxwr_txrd.var_ctx.rx_flags &
 909                     FCOE_TCE_RX_WR_TX_RD_VAR_RX_STATE) >>
 910                     FCOE_TCE_RX_WR_TX_RD_VAR_RX_STATE_SHIFT);
 911
 912         /* Process other IO completion types */
 913         switch (cmd_type) {
 914         case BNX2FC_SCSI_CMD:
 915                 if (rx_state == FCOE_TASK_RX_STATE_COMPLETED) {
 916                         bnx2fc_process_scsi_cmd_compl(io_req, task, num_rq);
 917                         spin_unlock_bh(&tgt->tgt_lock);
 918                         return;
 919                 }
 920
 921                 if (rx_state == FCOE_TASK_RX_STATE_ABTS_COMPLETED)
 922                         bnx2fc_process_abts_compl(io_req, task, num_rq);
 923                 else if (rx_state ==
 924                          FCOE_TASK_RX_STATE_EXCHANGE_CLEANUP_COMPLETED)
 925                         bnx2fc_process_cleanup_compl(io_req, task, num_rq);
 926                 else
 927                         printk(KERN_ERR PFX "Invalid rx state - %d\n",
 928                                 rx_state);
 929                 break;
 930
 931         case BNX2FC_TASK_MGMT_CMD:
 932                 BNX2FC_IO_DBG(io_req, "Processing TM complete\n");
 933                 bnx2fc_process_tm_compl(io_req, task, num_rq);
 934                 break;
 935
 936         case BNX2FC_ABTS:
 937                 /*
 938                  * ABTS request received by firmware. ABTS response
 939                  * will be delivered to the task belonging to the IO
 940                  * that was aborted
 941                  */
 942                 BNX2FC_IO_DBG(io_req, "cq_compl- ABTS sent out by fw\n");
 943                 kref_put(&io_req->refcount, bnx2fc_cmd_release);
 944                 break;
 945
 946         case BNX2FC_ELS:
 947                 if (rx_state == FCOE_TASK_RX_STATE_COMPLETED)
 948                         bnx2fc_process_els_compl(io_req, task, num_rq);
 949                 else if (rx_state == FCOE_TASK_RX_STATE_ABTS_COMPLETED)
 950                         bnx2fc_process_abts_compl(io_req, task, num_rq);
 951                 else if (rx_state ==
 952                          FCOE_TASK_RX_STATE_EXCHANGE_CLEANUP_COMPLETED)
 953                         bnx2fc_process_cleanup_compl(io_req, task, num_rq);
 954                 else
 955                         printk(KERN_ERR PFX "Invalid rx state =  %d\n",
 956                                 rx_state);
 957                 break;
 958
 959         case BNX2FC_CLEANUP:
 960                 BNX2FC_IO_DBG(io_req, "cq_compl- cleanup resp rcvd\n");
 961                 kref_put(&io_req->refcount, bnx2fc_cmd_release);
 962                 break;
 963
 964         case BNX2FC_SEQ_CLEANUP:
 965                 BNX2FC_IO_DBG(io_req, "cq_compl(0x%x) - seq cleanup resp\n",
 966                               io_req->xid);
 967                 bnx2fc_process_seq_cleanup_compl(io_req, task, rx_state);
 968                 kref_put(&io_req->refcount, bnx2fc_cmd_release);
 969                 break;
 970
 971         default:
 972                 printk(KERN_ERR PFX "Invalid cmd_type %d\n", cmd_type);
 973                 break;
 974         }
 975         spin_unlock_bh(&tgt->tgt_lock);
 976 }
 977
 978 void bnx2fc_arm_cq(struct bnx2fc_rport *tgt)
 979 {
 980         struct b577xx_fcoe_rx_doorbell *rx_db = &tgt->rx_db;
 981         u32 msg;
 982
 983         wmb();
 984         rx_db->doorbell_cq_cons = tgt->cq_cons_idx | (tgt->cq_curr_toggle_bit <<
 985                         FCOE_CQE_TOGGLE_BIT_SHIFT);
 986         msg = *((u32 *)rx_db);
 987         writel(cpu_to_le32(msg), tgt->ctx_base);
 988         mmiowb();
 989
 990 }
 991
 992 struct bnx2fc_work *bnx2fc_alloc_work(struct bnx2fc_rport *tgt, u16 wqe)
 993 {
 994         struct bnx2fc_work *work;
 995         work = kzalloc(sizeof(struct bnx2fc_work), GFP_ATOMIC);
 996         if (!work)
 997                 return NULL;
 998
 999         INIT_LIST_HEAD(&work->list);
1000         work->tgt = tgt;
1001         work->wqe = wqe;
1002         return work;
1003 }
1004
1005 int bnx2fc_process_new_cqes(struct bnx2fc_rport *tgt)
1006 {
1007         struct fcoe_cqe *cq;
1008         u32 cq_cons;
1009         struct fcoe_cqe *cqe;
1010         u32 num_free_sqes = 0;
1011         u32 num_cqes = 0;
1012         u16 wqe;
1013
1014         /*
1015          * cq_lock is a low contention lock used to protect
1016          * the CQ data structure from being freed up during
1017          * the upload operation
1018          */
1019         spin_lock_bh(&tgt->cq_lock);
1020
1021         if (!tgt->cq) {
1022                 printk(KERN_ERR PFX "process_new_cqes: cq is NULL\n");
1023                 spin_unlock_bh(&tgt->cq_lock);
1024                 return 0;
1025         }
1026         cq = tgt->cq;
1027         cq_cons = tgt->cq_cons_idx;
1028         cqe = &cq[cq_cons];
1029
1030         while (((wqe = cqe->wqe) & FCOE_CQE_TOGGLE_BIT) ==
1031                (tgt->cq_curr_toggle_bit <<
1032                FCOE_CQE_TOGGLE_BIT_SHIFT)) {
1033
1034                 /* new entry on the cq */
1035                 if (wqe & FCOE_CQE_CQE_TYPE) {
1036                         /* Unsolicited event notification */
1037                         bnx2fc_process_unsol_compl(tgt, wqe);
1038                 } else {
1039                         /* Pending work request completion */
1040                         struct bnx2fc_work *work = NULL;
1041                         struct bnx2fc_percpu_s *fps = NULL;
1042                         unsigned int cpu = wqe % num_possible_cpus();
1043
1044                         fps = &per_cpu(bnx2fc_percpu, cpu);
1045                         spin_lock_bh(&fps->fp_work_lock);
1046                         if (unlikely(!fps->iothread))
1047                                 goto unlock;
1048
1049                         work = bnx2fc_alloc_work(tgt, wqe);
1050                         if (work)
1051                                 list_add_tail(&work->list,
1052                                               &fps->work_list);
1053 unlock:
1054                         spin_unlock_bh(&fps->fp_work_lock);
1055
1056                         /* Pending work request completion */
1057                         if (fps->iothread && work)
1058                                 wake_up_process(fps->iothread);
1059                         else
1060                                 bnx2fc_process_cq_compl(tgt, wqe);
1061                         num_free_sqes++;
1062                 }
1063                 cqe++;
1064                 tgt->cq_cons_idx++;
1065                 num_cqes++;
1066
1067                 if (tgt->cq_cons_idx == BNX2FC_CQ_WQES_MAX) {
1068                         tgt->cq_cons_idx = 0;
1069                         cqe = cq;
1070                         tgt->cq_curr_toggle_bit =
1071                                 1 - tgt->cq_curr_toggle_bit;
1072                 }
1073         }
1074         if (num_cqes) {
1075                 /* Arm CQ only if doorbell is mapped */
1076                 if (tgt->ctx_base)
1077                         bnx2fc_arm_cq(tgt);
1078                 atomic_add(num_free_sqes, &tgt->free_sqes);
1079         }
1080         spin_unlock_bh(&tgt->cq_lock);
1081         return 0;
1082 }
1083
1084 /**
1085  * bnx2fc_fastpath_notification - process global event queue (KCQ)
1086  *
1087  * @hba:                adapter structure pointer
1088  * @new_cqe_kcqe:       pointer to newly DMA'd KCQ entry
1089  *
1090  * Fast path event notification handler
1091  */
1092 static void bnx2fc_fastpath_notification(struct bnx2fc_hba *hba,
1093                                         struct fcoe_kcqe *new_cqe_kcqe)
1094 {
1095         u32 conn_id = new_cqe_kcqe->fcoe_conn_id;
1096         struct bnx2fc_rport *tgt = hba->tgt_ofld_list[conn_id];
1097
1098         if (!tgt) {
1099                 printk(KERN_ERR PFX "conn_id 0x%x not valid\n", conn_id);
1100                 return;
1101         }
1102
1103         bnx2fc_process_new_cqes(tgt);
1104 }
1105
1106 /**
1107  * bnx2fc_process_ofld_cmpl - process FCoE session offload completion
1108  *
1109  * @hba:        adapter structure pointer
1110  * @ofld_kcqe:  connection offload kcqe pointer
1111  *
1112  * handle session offload completion, enable the session if offload is
1113  * successful.
1114  */
1115 static void bnx2fc_process_ofld_cmpl(struct bnx2fc_hba *hba,
1116                                         struct fcoe_kcqe *ofld_kcqe)
1117 {
1118         struct bnx2fc_rport             *tgt;
1119         struct fcoe_port                *port;
1120         struct bnx2fc_interface         *interface;
1121         u32                             conn_id;
1122         u32                             context_id;
1123
1124         conn_id = ofld_kcqe->fcoe_conn_id;
1125         context_id = ofld_kcqe->fcoe_conn_context_id;
1126         tgt = hba->tgt_ofld_list[conn_id];
1127         if (!tgt) {
1128                 printk(KERN_ALERT PFX "ERROR:ofld_cmpl: No pending ofld req\n");
1129                 return;
1130         }
1131         BNX2FC_TGT_DBG(tgt, "Entered ofld compl - context_id = 0x%x\n",
1132                 ofld_kcqe->fcoe_conn_context_id);
1133         port = tgt->port;
1134         interface = tgt->port->priv;
1135         if (hba != interface->hba) {
1136                 printk(KERN_ERR PFX "ERROR:ofld_cmpl: HBA mis-match\n");
1137                 goto ofld_cmpl_err;
1138         }
1139         /*
1140          * cnic has allocated a context_id for this session; use this
1141          * while enabling the session.
1142          */
1143         tgt->context_id = context_id;
1144         if (ofld_kcqe->completion_status) {
1145                 if (ofld_kcqe->completion_status ==
1146                                 FCOE_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE) {
1147                         printk(KERN_ERR PFX "unable to allocate FCoE context "
1148                                 "resources\n");
1149                         set_bit(BNX2FC_FLAG_CTX_ALLOC_FAILURE, &tgt->flags);
1150                 }
1151         } else {
1152                 /* FW offload request successfully completed */
1153                 set_bit(BNX2FC_FLAG_OFFLOADED, &tgt->flags);
1154         }
1155 ofld_cmpl_err:
1156         set_bit(BNX2FC_FLAG_OFLD_REQ_CMPL, &tgt->flags);
1157         wake_up_interruptible(&tgt->ofld_wait);
1158 }
1159
1160 /**
1161  * bnx2fc_process_enable_conn_cmpl - process FCoE session enable completion
1162  *
1163  * @hba:        adapter structure pointer
1164  * @ofld_kcqe:  connection offload kcqe pointer
1165  *
1166  * handle session enable completion, mark the rport as ready
1167  */
1168
1169 static void bnx2fc_process_enable_conn_cmpl(struct bnx2fc_hba *hba,
1170                                                 struct fcoe_kcqe *ofld_kcqe)
1171 {
1172         struct bnx2fc_rport             *tgt;
1173         struct bnx2fc_interface         *interface;
1174         u32                             conn_id;
1175         u32                             context_id;
1176
1177         context_id = ofld_kcqe->fcoe_conn_context_id;
1178         conn_id = ofld_kcqe->fcoe_conn_id;
1179         tgt = hba->tgt_ofld_list[conn_id];
1180         if (!tgt) {
1181                 printk(KERN_ERR PFX "ERROR:enbl_cmpl: No pending ofld req\n");
1182                 return;
1183         }
1184
1185         BNX2FC_TGT_DBG(tgt, "Enable compl - context_id = 0x%x\n",
1186                 ofld_kcqe->fcoe_conn_context_id);
1187
1188         /*
1189          * context_id should be the same for this target during offload
1190          * and enable
1191          */
1192         if (tgt->context_id != context_id) {
1193                 printk(KERN_ERR PFX "context id mis-match\n");
1194                 return;
1195         }
1196         interface = tgt->port->priv;
1197         if (hba != interface->hba) {
1198                 printk(KERN_ERR PFX "bnx2fc-enbl_cmpl: HBA mis-match\n");
1199                 goto enbl_cmpl_err;
1200         }
1201         if (!ofld_kcqe->completion_status)
1202                 /* enable successful - rport ready for issuing IOs */
1203                 set_bit(BNX2FC_FLAG_ENABLED, &tgt->flags);
1204
1205 enbl_cmpl_err:
1206         set_bit(BNX2FC_FLAG_OFLD_REQ_CMPL, &tgt->flags);
1207         wake_up_interruptible(&tgt->ofld_wait);
1208 }
1209
1210 static void bnx2fc_process_conn_disable_cmpl(struct bnx2fc_hba *hba,
1211                                         struct fcoe_kcqe *disable_kcqe)
1212 {
1213
1214         struct bnx2fc_rport             *tgt;
1215         u32                             conn_id;
1216
1217         conn_id = disable_kcqe->fcoe_conn_id;
1218         tgt = hba->tgt_ofld_list[conn_id];
1219         if (!tgt) {
1220                 printk(KERN_ERR PFX "ERROR: disable_cmpl: No disable req\n");
1221                 return;
1222         }
1223
1224         BNX2FC_TGT_DBG(tgt, PFX "disable_cmpl: conn_id %d\n", conn_id);
1225
1226         if (disable_kcqe->completion_status) {
1227                 printk(KERN_ERR PFX "Disable failed with cmpl status %d\n",
1228                         disable_kcqe->completion_status);
1229                 set_bit(BNX2FC_FLAG_DISABLE_FAILED, &tgt->flags);
1230                 set_bit(BNX2FC_FLAG_UPLD_REQ_COMPL, &tgt->flags);
1231                 wake_up_interruptible(&tgt->upld_wait);
1232         } else {
1233                 /* disable successful */
1234                 BNX2FC_TGT_DBG(tgt, "disable successful\n");
1235                 clear_bit(BNX2FC_FLAG_OFFLOADED, &tgt->flags);
1236                 clear_bit(BNX2FC_FLAG_ENABLED, &tgt->flags);
1237                 set_bit(BNX2FC_FLAG_DISABLED, &tgt->flags);
1238                 set_bit(BNX2FC_FLAG_UPLD_REQ_COMPL, &tgt->flags);
1239                 wake_up_interruptible(&tgt->upld_wait);
1240         }
1241 }
1242
1243 static void bnx2fc_process_conn_destroy_cmpl(struct bnx2fc_hba *hba,
1244                                         struct fcoe_kcqe *destroy_kcqe)
1245 {
1246         struct bnx2fc_rport             *tgt;
1247         u32                             conn_id;
1248
1249         conn_id = destroy_kcqe->fcoe_conn_id;
1250         tgt = hba->tgt_ofld_list[conn_id];
1251         if (!tgt) {
1252                 printk(KERN_ERR PFX "destroy_cmpl: No destroy req\n");
1253                 return;
1254         }
1255
1256         BNX2FC_TGT_DBG(tgt, "destroy_cmpl: conn_id %d\n", conn_id);
1257
1258         if (destroy_kcqe->completion_status) {
1259                 printk(KERN_ERR PFX "Destroy conn failed, cmpl status %d\n",
1260                         destroy_kcqe->completion_status);
1261                 return;
1262         } else {
1263                 /* destroy successful */
1264                 BNX2FC_TGT_DBG(tgt, "upload successful\n");
1265                 clear_bit(BNX2FC_FLAG_DISABLED, &tgt->flags);
1266                 set_bit(BNX2FC_FLAG_DESTROYED, &tgt->flags);
1267                 set_bit(BNX2FC_FLAG_UPLD_REQ_COMPL, &tgt->flags);
1268                 wake_up_interruptible(&tgt->upld_wait);
1269         }
1270 }
1271
1272 static void bnx2fc_init_failure(struct bnx2fc_hba *hba, u32 err_code)
1273 {
1274         switch (err_code) {
1275         case FCOE_KCQE_COMPLETION_STATUS_INVALID_OPCODE:
1276                 printk(KERN_ERR PFX "init_failure due to invalid opcode\n");
1277                 break;
1278
1279         case FCOE_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE:
1280                 printk(KERN_ERR PFX "init failed due to ctx alloc failure\n");
1281                 break;
1282
1283         case FCOE_KCQE_COMPLETION_STATUS_NIC_ERROR:
1284                 printk(KERN_ERR PFX "init_failure due to NIC error\n");
1285                 break;
1286         case FCOE_KCQE_COMPLETION_STATUS_ERROR:
1287                 printk(KERN_ERR PFX "init failure due to compl status err\n");
1288                 break;
1289         case FCOE_KCQE_COMPLETION_STATUS_WRONG_HSI_VERSION:
1290                 printk(KERN_ERR PFX "init failure due to HSI mismatch\n");
1291                 break;
1292         default:
1293                 printk(KERN_ERR PFX "Unknown Error code %d\n", err_code);
1294         }
1295 }
1296
1297 /**
1298  * bnx2fc_indicae_kcqe - process KCQE
1299  *
1300  * @hba:        adapter structure pointer
1301  * @kcqe:       kcqe pointer
1302  * @num_cqe:    Number of completion queue elements
1303  *
1304  * Generic KCQ event handler
1305  */
1306 void bnx2fc_indicate_kcqe(void *context, struct kcqe *kcq[],
1307                                         u32 num_cqe)
1308 {
1309         struct bnx2fc_hba *hba = (struct bnx2fc_hba *)context;
1310         int i = 0;
1311         struct fcoe_kcqe *kcqe = NULL;
1312
1313         while (i < num_cqe) {
1314                 kcqe = (struct fcoe_kcqe *) kcq[i++];
1315
1316                 switch (kcqe->op_code) {
1317                 case FCOE_KCQE_OPCODE_CQ_EVENT_NOTIFICATION:
1318                         bnx2fc_fastpath_notification(hba, kcqe);
1319                         break;
1320
1321                 case FCOE_KCQE_OPCODE_OFFLOAD_CONN:
1322                         bnx2fc_process_ofld_cmpl(hba, kcqe);
1323                         break;
1324
1325                 case FCOE_KCQE_OPCODE_ENABLE_CONN:
1326                         bnx2fc_process_enable_conn_cmpl(hba, kcqe);
1327                         break;
1328
1329                 case FCOE_KCQE_OPCODE_INIT_FUNC:
1330                         if (kcqe->completion_status !=
1331                                         FCOE_KCQE_COMPLETION_STATUS_SUCCESS) {
1332                                 bnx2fc_init_failure(hba,
1333                                                 kcqe->completion_status);
1334                         } else {
1335                                 set_bit(ADAPTER_STATE_UP, &hba->adapter_state);
1336                                 bnx2fc_get_link_state(hba);
1337                                 printk(KERN_INFO PFX "[%.2x]: FCOE_INIT passed\n",
1338                                         (u8)hba->pcidev->bus->number);
1339                         }
1340                         break;
1341
1342                 case FCOE_KCQE_OPCODE_DESTROY_FUNC:
1343                         if (kcqe->completion_status !=
1344                                         FCOE_KCQE_COMPLETION_STATUS_SUCCESS) {
1345
1346                                 printk(KERN_ERR PFX "DESTROY failed\n");
1347                         } else {
1348                                 printk(KERN_ERR PFX "DESTROY success\n");
1349                         }
1350                         set_bit(BNX2FC_FLAG_DESTROY_CMPL, &hba->flags);
1351                         wake_up_interruptible(&hba->destroy_wait);
1352                         break;
1353
1354                 case FCOE_KCQE_OPCODE_DISABLE_CONN:
1355                         bnx2fc_process_conn_disable_cmpl(hba, kcqe);
1356                         break;
1357
1358                 case FCOE_KCQE_OPCODE_DESTROY_CONN:
1359                         bnx2fc_process_conn_destroy_cmpl(hba, kcqe);
1360                         break;
1361
1362                 case FCOE_KCQE_OPCODE_STAT_FUNC:
1363                         if (kcqe->completion_status !=
1364                             FCOE_KCQE_COMPLETION_STATUS_SUCCESS)
1365                                 printk(KERN_ERR PFX "STAT failed\n");
1366                         complete(&hba->stat_req_done);
1367                         break;
1368
1369                 case FCOE_KCQE_OPCODE_FCOE_ERROR:
1370                         /* fall thru */
1371                 default:
1372                         printk(KERN_ERR PFX "unknown opcode 0x%x\n",
1373                                                                 kcqe->op_code);
1374                 }
1375         }
1376 }
1377
1378 void bnx2fc_add_2_sq(struct bnx2fc_rport *tgt, u16 xid)
1379 {
1380         struct fcoe_sqe *sqe;
1381
1382         sqe = &tgt->sq[tgt->sq_prod_idx];
1383
1384         /* Fill SQ WQE */
1385         sqe->wqe = xid << FCOE_SQE_TASK_ID_SHIFT;
1386         sqe->wqe |= tgt->sq_curr_toggle_bit << FCOE_SQE_TOGGLE_BIT_SHIFT;
1387
1388         /* Advance SQ Prod Idx */
1389         if (++tgt->sq_prod_idx == BNX2FC_SQ_WQES_MAX) {
1390                 tgt->sq_prod_idx = 0;
1391                 tgt->sq_curr_toggle_bit = 1 - tgt->sq_curr_toggle_bit;
1392         }
1393 }
1394
1395 void bnx2fc_ring_doorbell(struct bnx2fc_rport *tgt)
1396 {
1397         struct b577xx_doorbell_set_prod *sq_db = &tgt->sq_db;
1398         u32 msg;
1399
1400         wmb();
1401         sq_db->prod = tgt->sq_prod_idx |
1402                                 (tgt->sq_curr_toggle_bit << 15);
1403         msg = *((u32 *)sq_db);
1404         writel(cpu_to_le32(msg), tgt->ctx_base);
1405         mmiowb();
1406
1407 }
1408
1409 int bnx2fc_map_doorbell(struct bnx2fc_rport *tgt)
1410 {
1411         u32 context_id = tgt->context_id;
1412         struct fcoe_port *port = tgt->port;
1413         u32 reg_off;
1414         resource_size_t reg_base;
1415         struct bnx2fc_interface *interface = port->priv;
1416         struct bnx2fc_hba *hba = interface->hba;
1417
1418         reg_base = pci_resource_start(hba->pcidev,
1419                                         BNX2X_DOORBELL_PCI_BAR);
1420         reg_off = BNX2FC_5771X_DB_PAGE_SIZE *
1421                         (context_id & 0x1FFFF) + DPM_TRIGER_TYPE;
1422         tgt->ctx_base = ioremap_nocache(reg_base + reg_off, 4);
1423         if (!tgt->ctx_base)
1424                 return -ENOMEM;
1425         return 0;
1426 }
1427
1428 char *bnx2fc_get_next_rqe(struct bnx2fc_rport *tgt, u8 num_items)
1429 {
1430         char *buf = (char *)tgt->rq + (tgt->rq_cons_idx * BNX2FC_RQ_BUF_SZ);
1431
1432         if (tgt->rq_cons_idx + num_items > BNX2FC_RQ_WQES_MAX)
1433                 return NULL;
1434
1435         tgt->rq_cons_idx += num_items;
1436
1437         if (tgt->rq_cons_idx >= BNX2FC_RQ_WQES_MAX)
1438                 tgt->rq_cons_idx -= BNX2FC_RQ_WQES_MAX;
1439
1440         return buf;
1441 }
1442
1443 void bnx2fc_return_rqe(struct bnx2fc_rport *tgt, u8 num_items)
1444 {
1445         /* return the rq buffer */
1446         u32 next_prod_idx = tgt->rq_prod_idx + num_items;
1447         if ((next_prod_idx & 0x7fff) == BNX2FC_RQ_WQES_MAX) {
1448                 /* Wrap around RQ */
1449                 next_prod_idx += 0x8000 - BNX2FC_RQ_WQES_MAX;
1450         }
1451         tgt->rq_prod_idx = next_prod_idx;
1452         tgt->conn_db->rq_prod = tgt->rq_prod_idx;
1453 }
1454
1455 void bnx2fc_init_seq_cleanup_task(struct bnx2fc_cmd *seq_clnp_req,
1456                                   struct fcoe_task_ctx_entry *task,
1457                                   struct bnx2fc_cmd *orig_io_req,
1458                                   u32 offset)
1459 {
1460         struct scsi_cmnd *sc_cmd = orig_io_req->sc_cmd;
1461         struct bnx2fc_rport *tgt = seq_clnp_req->tgt;
1462         struct bnx2fc_interface *interface = tgt->port->priv;
1463         struct fcoe_bd_ctx *bd = orig_io_req->bd_tbl->bd_tbl;
1464         struct fcoe_task_ctx_entry *orig_task;
1465         struct fcoe_task_ctx_entry *task_page;
1466         struct fcoe_ext_mul_sges_ctx *sgl;
1467         u8 task_type = FCOE_TASK_TYPE_SEQUENCE_CLEANUP;
1468         u8 orig_task_type;
1469         u16 orig_xid = orig_io_req->xid;
1470         u32 context_id = tgt->context_id;
1471         u64 phys_addr = (u64)orig_io_req->bd_tbl->bd_tbl_dma;
1472         u32 orig_offset = offset;
1473         int bd_count;
1474         int orig_task_idx, index;
1475         int i;
1476
1477         memset(task, 0, sizeof(struct fcoe_task_ctx_entry));
1478
1479         if (sc_cmd->sc_data_direction == DMA_TO_DEVICE)
1480                 orig_task_type = FCOE_TASK_TYPE_WRITE;
1481         else
1482                 orig_task_type = FCOE_TASK_TYPE_READ;
1483
1484         /* Tx flags */
1485         task->txwr_rxrd.const_ctx.tx_flags =
1486                                 FCOE_TASK_TX_STATE_SEQUENCE_CLEANUP <<
1487                                 FCOE_TCE_TX_WR_RX_RD_CONST_TX_STATE_SHIFT;
1488         /* init flags */
1489         task->txwr_rxrd.const_ctx.init_flags = task_type <<
1490                                 FCOE_TCE_TX_WR_RX_RD_CONST_TASK_TYPE_SHIFT;
1491         task->txwr_rxrd.const_ctx.init_flags |= FCOE_TASK_CLASS_TYPE_3 <<
1492                                 FCOE_TCE_TX_WR_RX_RD_CONST_CLASS_TYPE_SHIFT;
1493         task->rxwr_txrd.const_ctx.init_flags = context_id <<
1494                                 FCOE_TCE_RX_WR_TX_RD_CONST_CID_SHIFT;
1495         task->rxwr_txrd.const_ctx.init_flags = context_id <<
1496                                 FCOE_TCE_RX_WR_TX_RD_CONST_CID_SHIFT;
1497
1498         task->txwr_rxrd.union_ctx.cleanup.ctx.cleaned_task_id = orig_xid;
1499
1500         task->txwr_rxrd.union_ctx.cleanup.ctx.rolled_tx_seq_cnt = 0;
1501         task->txwr_rxrd.union_ctx.cleanup.ctx.rolled_tx_data_offset = offset;
1502
1503         bd_count = orig_io_req->bd_tbl->bd_valid;
1504
1505         /* obtain the appropriate bd entry from relative offset */
1506         for (i = 0; i < bd_count; i++) {
1507                 if (offset < bd[i].buf_len)
1508                         break;
1509                 offset -= bd[i].buf_len;
1510         }
1511         phys_addr += (i * sizeof(struct fcoe_bd_ctx));
1512
1513         if (orig_task_type == FCOE_TASK_TYPE_WRITE) {
1514                 task->txwr_only.sgl_ctx.sgl.mul_sgl.cur_sge_addr.lo =
1515                                 (u32)phys_addr;
1516                 task->txwr_only.sgl_ctx.sgl.mul_sgl.cur_sge_addr.hi =
1517                                 (u32)((u64)phys_addr >> 32);
1518                 task->txwr_only.sgl_ctx.sgl.mul_sgl.sgl_size =
1519                                 bd_count;
1520                 task->txwr_only.sgl_ctx.sgl.mul_sgl.cur_sge_off =
1521                                 offset; /* adjusted offset */
1522                 task->txwr_only.sgl_ctx.sgl.mul_sgl.cur_sge_idx = i;
1523         } else {
1524                 orig_task_idx = orig_xid / BNX2FC_TASKS_PER_PAGE;
1525                 index = orig_xid % BNX2FC_TASKS_PER_PAGE;
1526
1527                 task_page = (struct fcoe_task_ctx_entry *)
1528                              interface->hba->task_ctx[orig_task_idx];
1529                 orig_task = &(task_page[index]);
1530
1531                 /* Multiple SGEs were used for this IO */
1532                 sgl = &task->rxwr_only.union_ctx.read_info.sgl_ctx.sgl;
1533                 sgl->mul_sgl.cur_sge_addr.lo = (u32)phys_addr;
1534                 sgl->mul_sgl.cur_sge_addr.hi = (u32)((u64)phys_addr >> 32);
1535                 sgl->mul_sgl.sgl_size = bd_count;
1536                 sgl->mul_sgl.cur_sge_off = offset; /*adjusted offset */
1537                 sgl->mul_sgl.cur_sge_idx = i;
1538
1539                 memset(&task->rxwr_only.rx_seq_ctx, 0,
1540                        sizeof(struct fcoe_rx_seq_ctx));
1541                 task->rxwr_only.rx_seq_ctx.low_exp_ro = orig_offset;
1542                 task->rxwr_only.rx_seq_ctx.high_exp_ro = orig_offset;
1543         }
1544 }
1545 void bnx2fc_init_cleanup_task(struct bnx2fc_cmd *io_req,
1546                               struct fcoe_task_ctx_entry *task,
1547                               u16 orig_xid)
1548 {
1549         u8 task_type = FCOE_TASK_TYPE_EXCHANGE_CLEANUP;
1550         struct bnx2fc_rport *tgt = io_req->tgt;
1551         u32 context_id = tgt->context_id;
1552
1553         memset(task, 0, sizeof(struct fcoe_task_ctx_entry));
1554
1555         /* Tx Write Rx Read */
1556         /* init flags */
1557         task->txwr_rxrd.const_ctx.init_flags = task_type <<
1558                                 FCOE_TCE_TX_WR_RX_RD_CONST_TASK_TYPE_SHIFT;
1559         task->txwr_rxrd.const_ctx.init_flags |= FCOE_TASK_CLASS_TYPE_3 <<
1560                                 FCOE_TCE_TX_WR_RX_RD_CONST_CLASS_TYPE_SHIFT;
1561         if (tgt->dev_type == TYPE_TAPE)
1562                 task->txwr_rxrd.const_ctx.init_flags |=
1563                                 FCOE_TASK_DEV_TYPE_TAPE <<
1564                                 FCOE_TCE_TX_WR_RX_RD_CONST_DEV_TYPE_SHIFT;
1565         else
1566                 task->txwr_rxrd.const_ctx.init_flags |=
1567                                 FCOE_TASK_DEV_TYPE_DISK <<
1568                                 FCOE_TCE_TX_WR_RX_RD_CONST_DEV_TYPE_SHIFT;
1569         task->txwr_rxrd.union_ctx.cleanup.ctx.cleaned_task_id = orig_xid;
1570
1571         /* Tx flags */
1572         task->txwr_rxrd.const_ctx.tx_flags =
1573                                 FCOE_TASK_TX_STATE_EXCHANGE_CLEANUP <<
1574                                 FCOE_TCE_TX_WR_RX_RD_CONST_TX_STATE_SHIFT;
1575
1576         /* Rx Read Tx Write */
1577         task->rxwr_txrd.const_ctx.init_flags = context_id <<
1578                                 FCOE_TCE_RX_WR_TX_RD_CONST_CID_SHIFT;
1579         task->rxwr_txrd.var_ctx.rx_flags |= 1 <<
1580                                 FCOE_TCE_RX_WR_TX_RD_VAR_EXP_FIRST_FRAME_SHIFT;
1581 }
1582
1583 void bnx2fc_init_mp_task(struct bnx2fc_cmd *io_req,
1584                                 struct fcoe_task_ctx_entry *task)
1585 {
1586         struct bnx2fc_mp_req *mp_req = &(io_req->mp_req);
1587         struct bnx2fc_rport *tgt = io_req->tgt;
1588         struct fc_frame_header *fc_hdr;
1589         struct fcoe_ext_mul_sges_ctx *sgl;
1590         u8 task_type = 0;
1591         u64 *hdr;
1592         u64 temp_hdr[3];
1593         u32 context_id;
1594
1595
1596         /* Obtain task_type */
1597         if ((io_req->cmd_type == BNX2FC_TASK_MGMT_CMD) ||
1598             (io_req->cmd_type == BNX2FC_ELS)) {
1599                 task_type = FCOE_TASK_TYPE_MIDPATH;
1600         } else if (io_req->cmd_type == BNX2FC_ABTS) {
1601                 task_type = FCOE_TASK_TYPE_ABTS;
1602         }
1603
1604         memset(task, 0, sizeof(struct fcoe_task_ctx_entry));
1605
1606         /* Setup the task from io_req for easy reference */
1607         io_req->task = task;
1608
1609         BNX2FC_IO_DBG(io_req, "Init MP task for cmd_type = %d task_type = %d\n",
1610                 io_req->cmd_type, task_type);
1611
1612         /* Tx only */
1613         if ((task_type == FCOE_TASK_TYPE_MIDPATH) ||
1614             (task_type == FCOE_TASK_TYPE_UNSOLICITED)) {
1615                 task->txwr_only.sgl_ctx.sgl.mul_sgl.cur_sge_addr.lo =
1616                                 (u32)mp_req->mp_req_bd_dma;
1617                 task->txwr_only.sgl_ctx.sgl.mul_sgl.cur_sge_addr.hi =
1618                                 (u32)((u64)mp_req->mp_req_bd_dma >> 32);
1619                 task->txwr_only.sgl_ctx.sgl.mul_sgl.sgl_size = 1;
1620         }
1621
1622         /* Tx Write Rx Read */
1623         /* init flags */
1624         task->txwr_rxrd.const_ctx.init_flags = task_type <<
1625                                 FCOE_TCE_TX_WR_RX_RD_CONST_TASK_TYPE_SHIFT;
1626         if (tgt->dev_type == TYPE_TAPE)
1627                 task->txwr_rxrd.const_ctx.init_flags |=
1628                                 FCOE_TASK_DEV_TYPE_TAPE <<
1629                                 FCOE_TCE_TX_WR_RX_RD_CONST_DEV_TYPE_SHIFT;
1630         else
1631                 task->txwr_rxrd.const_ctx.init_flags |=
1632                                 FCOE_TASK_DEV_TYPE_DISK <<
1633                                 FCOE_TCE_TX_WR_RX_RD_CONST_DEV_TYPE_SHIFT;
1634         task->txwr_rxrd.const_ctx.init_flags |= FCOE_TASK_CLASS_TYPE_3 <<
1635                                 FCOE_TCE_TX_WR_RX_RD_CONST_CLASS_TYPE_SHIFT;
1636
1637         /* tx flags */
1638         task->txwr_rxrd.const_ctx.tx_flags = FCOE_TASK_TX_STATE_INIT <<
1639                                 FCOE_TCE_TX_WR_RX_RD_CONST_TX_STATE_SHIFT;
1640
1641         /* Rx Write Tx Read */
1642         task->rxwr_txrd.const_ctx.data_2_trns = io_req->data_xfer_len;
1643
1644         /* rx flags */
1645         task->rxwr_txrd.var_ctx.rx_flags |= 1 <<
1646                                 FCOE_TCE_RX_WR_TX_RD_VAR_EXP_FIRST_FRAME_SHIFT;
1647
1648         context_id = tgt->context_id;
1649         task->rxwr_txrd.const_ctx.init_flags = context_id <<
1650                                 FCOE_TCE_RX_WR_TX_RD_CONST_CID_SHIFT;
1651
1652         fc_hdr = &(mp_req->req_fc_hdr);
1653         if (task_type == FCOE_TASK_TYPE_MIDPATH) {
1654                 fc_hdr->fh_ox_id = cpu_to_be16(io_req->xid);
1655                 fc_hdr->fh_rx_id = htons(0xffff);
1656                 task->rxwr_txrd.var_ctx.rx_id = 0xffff;
1657         } else if (task_type == FCOE_TASK_TYPE_UNSOLICITED) {
1658                 fc_hdr->fh_rx_id = cpu_to_be16(io_req->xid);
1659         }
1660
1661         /* Fill FC Header into middle path buffer */
1662         hdr = (u64 *) &task->txwr_rxrd.union_ctx.tx_frame.fc_hdr;
1663         memcpy(temp_hdr, fc_hdr, sizeof(temp_hdr));
1664         hdr[0] = cpu_to_be64(temp_hdr[0]);
1665         hdr[1] = cpu_to_be64(temp_hdr[1]);
1666         hdr[2] = cpu_to_be64(temp_hdr[2]);
1667
1668         /* Rx Only */
1669         if (task_type == FCOE_TASK_TYPE_MIDPATH) {
1670                 sgl = &task->rxwr_only.union_ctx.read_info.sgl_ctx.sgl;
1671
1672                 sgl->mul_sgl.cur_sge_addr.lo = (u32)mp_req->mp_resp_bd_dma;
1673                 sgl->mul_sgl.cur_sge_addr.hi =
1674                                 (u32)((u64)mp_req->mp_resp_bd_dma >> 32);
1675                 sgl->mul_sgl.sgl_size = 1;
1676         }
1677 }
1678
1679 void bnx2fc_init_task(struct bnx2fc_cmd *io_req,
1680                              struct fcoe_task_ctx_entry *task)
1681 {
1682         u8 task_type;
1683         struct scsi_cmnd *sc_cmd = io_req->sc_cmd;
1684         struct io_bdt *bd_tbl = io_req->bd_tbl;
1685         struct bnx2fc_rport *tgt = io_req->tgt;
1686         struct fcoe_cached_sge_ctx *cached_sge;
1687         struct fcoe_ext_mul_sges_ctx *sgl;
1688         int dev_type = tgt->dev_type;
1689         u64 *fcp_cmnd;
1690         u64 tmp_fcp_cmnd[4];
1691         u32 context_id;
1692         int cnt, i;
1693         int bd_count;
1694
1695         memset(task, 0, sizeof(struct fcoe_task_ctx_entry));
1696
1697         /* Setup the task from io_req for easy reference */
1698         io_req->task = task;
1699
1700         if (sc_cmd->sc_data_direction == DMA_TO_DEVICE)
1701                 task_type = FCOE_TASK_TYPE_WRITE;
1702         else
1703                 task_type = FCOE_TASK_TYPE_READ;
1704
1705         /* Tx only */
1706         bd_count = bd_tbl->bd_valid;
1707         cached_sge = &task->rxwr_only.union_ctx.read_info.sgl_ctx.cached_sge;
1708         if (task_type == FCOE_TASK_TYPE_WRITE) {
1709                 if ((dev_type == TYPE_DISK) && (bd_count == 1)) {
1710                         struct fcoe_bd_ctx *fcoe_bd_tbl = bd_tbl->bd_tbl;
1711
1712                         task->txwr_only.sgl_ctx.cached_sge.cur_buf_addr.lo =
1713                         cached_sge->cur_buf_addr.lo =
1714                                         fcoe_bd_tbl->buf_addr_lo;
1715                         task->txwr_only.sgl_ctx.cached_sge.cur_buf_addr.hi =
1716                         cached_sge->cur_buf_addr.hi =
1717                                         fcoe_bd_tbl->buf_addr_hi;
1718                         task->txwr_only.sgl_ctx.cached_sge.cur_buf_rem =
1719                         cached_sge->cur_buf_rem =
1720                                         fcoe_bd_tbl->buf_len;
1721
1722                         task->txwr_rxrd.const_ctx.init_flags |= 1 <<
1723                                 FCOE_TCE_TX_WR_RX_RD_CONST_CACHED_SGE_SHIFT;
1724                 } else {
1725                         task->txwr_only.sgl_ctx.sgl.mul_sgl.cur_sge_addr.lo =
1726                                         (u32)bd_tbl->bd_tbl_dma;
1727                         task->txwr_only.sgl_ctx.sgl.mul_sgl.cur_sge_addr.hi =
1728                                         (u32)((u64)bd_tbl->bd_tbl_dma >> 32);
1729                         task->txwr_only.sgl_ctx.sgl.mul_sgl.sgl_size =
1730                                         bd_tbl->bd_valid;
1731                 }
1732         }
1733
1734         /*Tx Write Rx Read */
1735         /* Init state to NORMAL */
1736         task->txwr_rxrd.const_ctx.init_flags |= task_type <<
1737                                 FCOE_TCE_TX_WR_RX_RD_CONST_TASK_TYPE_SHIFT;
1738         if (dev_type == TYPE_TAPE) {
1739                 task->txwr_rxrd.const_ctx.init_flags |=
1740                                 FCOE_TASK_DEV_TYPE_TAPE <<
1741                                 FCOE_TCE_TX_WR_RX_RD_CONST_DEV_TYPE_SHIFT;
1742                 io_req->rec_retry = 0;
1743                 io_req->rec_retry = 0;
1744         } else
1745                 task->txwr_rxrd.const_ctx.init_flags |=
1746                                 FCOE_TASK_DEV_TYPE_DISK <<
1747                                 FCOE_TCE_TX_WR_RX_RD_CONST_DEV_TYPE_SHIFT;
1748         task->txwr_rxrd.const_ctx.init_flags |= FCOE_TASK_CLASS_TYPE_3 <<
1749                                 FCOE_TCE_TX_WR_RX_RD_CONST_CLASS_TYPE_SHIFT;
1750         /* tx flags */
1751         task->txwr_rxrd.const_ctx.tx_flags = FCOE_TASK_TX_STATE_NORMAL <<
1752                                 FCOE_TCE_TX_WR_RX_RD_CONST_TX_STATE_SHIFT;
1753
1754         /* Set initial seq counter */
1755         task->txwr_rxrd.union_ctx.tx_seq.ctx.seq_cnt = 1;
1756
1757         /* Fill FCP_CMND IU */
1758         fcp_cmnd = (u64 *)
1759                     task->txwr_rxrd.union_ctx.fcp_cmd.opaque;
1760         bnx2fc_build_fcp_cmnd(io_req, (struct fcp_cmnd *)&tmp_fcp_cmnd);
1761
1762         /* swap fcp_cmnd */
1763         cnt = sizeof(struct fcp_cmnd) / sizeof(u64);
1764
1765         for (i = 0; i < cnt; i++) {
1766                 *fcp_cmnd = cpu_to_be64(tmp_fcp_cmnd[i]);
1767                 fcp_cmnd++;
1768         }
1769
1770         /* Rx Write Tx Read */
1771         task->rxwr_txrd.const_ctx.data_2_trns = io_req->data_xfer_len;
1772
1773         context_id = tgt->context_id;
1774         task->rxwr_txrd.const_ctx.init_flags = context_id <<
1775                                 FCOE_TCE_RX_WR_TX_RD_CONST_CID_SHIFT;
1776
1777         /* rx flags */
1778         /* Set state to "waiting for the first packet" */
1779         task->rxwr_txrd.var_ctx.rx_flags |= 1 <<
1780                                 FCOE_TCE_RX_WR_TX_RD_VAR_EXP_FIRST_FRAME_SHIFT;
1781
1782         task->rxwr_txrd.var_ctx.rx_id = 0xffff;
1783
1784         /* Rx Only */
1785         if (task_type != FCOE_TASK_TYPE_READ)
1786                 return;
1787
1788         sgl = &task->rxwr_only.union_ctx.read_info.sgl_ctx.sgl;
1789         bd_count = bd_tbl->bd_valid;
1790
1791         if (dev_type == TYPE_DISK) {
1792                 if (bd_count == 1) {
1793
1794                         struct fcoe_bd_ctx *fcoe_bd_tbl = bd_tbl->bd_tbl;
1795
1796                         cached_sge->cur_buf_addr.lo = fcoe_bd_tbl->buf_addr_lo;
1797                         cached_sge->cur_buf_addr.hi = fcoe_bd_tbl->buf_addr_hi;
1798                         cached_sge->cur_buf_rem = fcoe_bd_tbl->buf_len;
1799                         task->txwr_rxrd.const_ctx.init_flags |= 1 <<
1800                                 FCOE_TCE_TX_WR_RX_RD_CONST_CACHED_SGE_SHIFT;
1801                 } else if (bd_count == 2) {
1802                         struct fcoe_bd_ctx *fcoe_bd_tbl = bd_tbl->bd_tbl;
1803
1804                         cached_sge->cur_buf_addr.lo = fcoe_bd_tbl->buf_addr_lo;
1805                         cached_sge->cur_buf_addr.hi = fcoe_bd_tbl->buf_addr_hi;
1806                         cached_sge->cur_buf_rem = fcoe_bd_tbl->buf_len;
1807
1808                         fcoe_bd_tbl++;
1809                         cached_sge->second_buf_addr.lo =
1810                                                  fcoe_bd_tbl->buf_addr_lo;
1811                         cached_sge->second_buf_addr.hi =
1812                                                 fcoe_bd_tbl->buf_addr_hi;
1813                         cached_sge->second_buf_rem = fcoe_bd_tbl->buf_len;
1814                         task->txwr_rxrd.const_ctx.init_flags |= 1 <<
1815                                 FCOE_TCE_TX_WR_RX_RD_CONST_CACHED_SGE_SHIFT;
1816                 } else {
1817
1818                         sgl->mul_sgl.cur_sge_addr.lo = (u32)bd_tbl->bd_tbl_dma;
1819                         sgl->mul_sgl.cur_sge_addr.hi =
1820                                         (u32)((u64)bd_tbl->bd_tbl_dma >> 32);
1821                         sgl->mul_sgl.sgl_size = bd_count;
1822                 }
1823         } else {
1824                 sgl->mul_sgl.cur_sge_addr.lo = (u32)bd_tbl->bd_tbl_dma;
1825                 sgl->mul_sgl.cur_sge_addr.hi =
1826                                 (u32)((u64)bd_tbl->bd_tbl_dma >> 32);
1827                 sgl->mul_sgl.sgl_size = bd_count;
1828         }
1829 }
1830
1831 /**
1832  * bnx2fc_setup_task_ctx - allocate and map task context
1833  *
1834  * @hba:        pointer to adapter structure
1835  *
1836  * allocate memory for task context, and associated BD table to be used
1837  * by firmware
1838  *
1839  */
1840 int bnx2fc_setup_task_ctx(struct bnx2fc_hba *hba)
1841 {
1842         int rc = 0;
1843         struct regpair *task_ctx_bdt;
1844         dma_addr_t addr;
1845         int task_ctx_arr_sz;
1846         int i;
1847
1848         /*
1849          * Allocate task context bd table. A page size of bd table
1850          * can map 256 buffers. Each buffer contains 32 task context
1851          * entries. Hence the limit with one page is 8192 task context
1852          * entries.
1853          */
1854         hba->task_ctx_bd_tbl = dma_alloc_coherent(&hba->pcidev->dev,
1855                                                   PAGE_SIZE,
1856                                                   &hba->task_ctx_bd_dma,
1857                                                   GFP_KERNEL);
1858         if (!hba->task_ctx_bd_tbl) {
1859                 printk(KERN_ERR PFX "unable to allocate task context BDT\n");
1860                 rc = -1;
1861                 goto out;
1862         }
1863         memset(hba->task_ctx_bd_tbl, 0, PAGE_SIZE);
1864
1865         /*
1866          * Allocate task_ctx which is an array of pointers pointing to
1867          * a page containing 32 task contexts
1868          */
1869         task_ctx_arr_sz = (hba->max_tasks / BNX2FC_TASKS_PER_PAGE);
1870         hba->task_ctx = kzalloc((task_ctx_arr_sz * sizeof(void *)),
1871                                  GFP_KERNEL);
1872         if (!hba->task_ctx) {
1873                 printk(KERN_ERR PFX "unable to allocate task context array\n");
1874                 rc = -1;
1875                 goto out1;
1876         }
1877
1878         /*
1879          * Allocate task_ctx_dma which is an array of dma addresses
1880          */
1881         hba->task_ctx_dma = kmalloc((task_ctx_arr_sz *
1882                                         sizeof(dma_addr_t)), GFP_KERNEL);
1883         if (!hba->task_ctx_dma) {
1884                 printk(KERN_ERR PFX "unable to alloc context mapping array\n");
1885                 rc = -1;
1886                 goto out2;
1887         }
1888
1889         task_ctx_bdt = (struct regpair *)hba->task_ctx_bd_tbl;
1890         for (i = 0; i < task_ctx_arr_sz; i++) {
1891
1892                 hba->task_ctx[i] = dma_alloc_coherent(&hba->pcidev->dev,
1893                                                       PAGE_SIZE,
1894                                                       &hba->task_ctx_dma[i],
1895                                                       GFP_KERNEL);
1896                 if (!hba->task_ctx[i]) {
1897                         printk(KERN_ERR PFX "unable to alloc task context\n");
1898                         rc = -1;
1899                         goto out3;
1900                 }
1901                 memset(hba->task_ctx[i], 0, PAGE_SIZE);
1902                 addr = (u64)hba->task_ctx_dma[i];
1903                 task_ctx_bdt->hi = cpu_to_le32((u64)addr >> 32);
1904                 task_ctx_bdt->lo = cpu_to_le32((u32)addr);
1905                 task_ctx_bdt++;
1906         }
1907         return 0;
1908
1909 out3:
1910         for (i = 0; i < task_ctx_arr_sz; i++) {
1911                 if (hba->task_ctx[i]) {
1912
1913                         dma_free_coherent(&hba->pcidev->dev, PAGE_SIZE,
1914                                 hba->task_ctx[i], hba->task_ctx_dma[i]);
1915                         hba->task_ctx[i] = NULL;
1916                 }
1917         }
1918
1919         kfree(hba->task_ctx_dma);
1920         hba->task_ctx_dma = NULL;
1921 out2:
1922         kfree(hba->task_ctx);
1923         hba->task_ctx = NULL;
1924 out1:
1925         dma_free_coherent(&hba->pcidev->dev, PAGE_SIZE,
1926                         hba->task_ctx_bd_tbl, hba->task_ctx_bd_dma);
1927         hba->task_ctx_bd_tbl = NULL;
1928 out:
1929         return rc;
1930 }
1931
1932 void bnx2fc_free_task_ctx(struct bnx2fc_hba *hba)
1933 {
1934         int task_ctx_arr_sz;
1935         int i;
1936
1937         if (hba->task_ctx_bd_tbl) {
1938                 dma_free_coherent(&hba->pcidev->dev, PAGE_SIZE,
1939                                     hba->task_ctx_bd_tbl,
1940                                     hba->task_ctx_bd_dma);
1941                 hba->task_ctx_bd_tbl = NULL;
1942         }
1943
1944         task_ctx_arr_sz = (hba->max_tasks / BNX2FC_TASKS_PER_PAGE);
1945         if (hba->task_ctx) {
1946                 for (i = 0; i < task_ctx_arr_sz; i++) {
1947                         if (hba->task_ctx[i]) {
1948                                 dma_free_coherent(&hba->pcidev->dev, PAGE_SIZE,
1949                                                     hba->task_ctx[i],
1950                                                     hba->task_ctx_dma[i]);
1951                                 hba->task_ctx[i] = NULL;
1952                         }
1953                 }
1954                 kfree(hba->task_ctx);
1955                 hba->task_ctx = NULL;
1956         }
1957
1958         kfree(hba->task_ctx_dma);
1959         hba->task_ctx_dma = NULL;
1960 }
1961
1962 static void bnx2fc_free_hash_table(struct bnx2fc_hba *hba)
1963 {
1964         int i;
1965         int segment_count;
1966         int hash_table_size;
1967         u32 *pbl;
1968
1969         segment_count = hba->hash_tbl_segment_count;
1970         hash_table_size = BNX2FC_NUM_MAX_SESS * BNX2FC_MAX_ROWS_IN_HASH_TBL *
1971                 sizeof(struct fcoe_hash_table_entry);
1972
1973         pbl = hba->hash_tbl_pbl;
1974         for (i = 0; i < segment_count; ++i) {
1975                 dma_addr_t dma_address;
1976
1977                 dma_address = le32_to_cpu(*pbl);
1978                 ++pbl;
1979                 dma_address += ((u64)le32_to_cpu(*pbl)) << 32;
1980                 ++pbl;
1981                 dma_free_coherent(&hba->pcidev->dev,
1982                                   BNX2FC_HASH_TBL_CHUNK_SIZE,
1983                                   hba->hash_tbl_segments[i],
1984                                   dma_address);
1985
1986         }
1987
1988         if (hba->hash_tbl_pbl) {
1989                 dma_free_coherent(&hba->pcidev->dev, PAGE_SIZE,
1990                                     hba->hash_tbl_pbl,
1991                                     hba->hash_tbl_pbl_dma);
1992                 hba->hash_tbl_pbl = NULL;
1993         }
1994 }
1995
1996 static int bnx2fc_allocate_hash_table(struct bnx2fc_hba *hba)
1997 {
1998         int i;
1999         int hash_table_size;
2000         int segment_count;
2001         int segment_array_size;
2002         int dma_segment_array_size;
2003         dma_addr_t *dma_segment_array;
2004         u32 *pbl;
2005
2006         hash_table_size = BNX2FC_NUM_MAX_SESS * BNX2FC_MAX_ROWS_IN_HASH_TBL *
2007                 sizeof(struct fcoe_hash_table_entry);
2008
2009         segment_count = hash_table_size + BNX2FC_HASH_TBL_CHUNK_SIZE - 1;
2010         segment_count /= BNX2FC_HASH_TBL_CHUNK_SIZE;
2011         hba->hash_tbl_segment_count = segment_count;
2012
2013         segment_array_size = segment_count * sizeof(*hba->hash_tbl_segments);
2014         hba->hash_tbl_segments = kzalloc(segment_array_size, GFP_KERNEL);
2015         if (!hba->hash_tbl_segments) {
2016                 printk(KERN_ERR PFX "hash table pointers alloc failed\n");
2017                 return -ENOMEM;
2018         }
2019         dma_segment_array_size = segment_count * sizeof(*dma_segment_array);
2020         dma_segment_array = kzalloc(dma_segment_array_size, GFP_KERNEL);
2021         if (!dma_segment_array) {
2022                 printk(KERN_ERR PFX "hash table pointers (dma) alloc failed\n");
2023                 return -ENOMEM;
2024         }
2025
2026         for (i = 0; i < segment_count; ++i) {
2027                 hba->hash_tbl_segments[i] =
2028                         dma_alloc_coherent(&hba->pcidev->dev,
2029                                            BNX2FC_HASH_TBL_CHUNK_SIZE,
2030                                            &dma_segment_array[i],
2031                                            GFP_KERNEL);
2032                 if (!hba->hash_tbl_segments[i]) {
2033                         printk(KERN_ERR PFX "hash segment alloc failed\n");
2034                         while (--i >= 0) {
2035                                 dma_free_coherent(&hba->pcidev->dev,
2036                                                     BNX2FC_HASH_TBL_CHUNK_SIZE,
2037                                                     hba->hash_tbl_segments[i],
2038                                                     dma_segment_array[i]);
2039                                 hba->hash_tbl_segments[i] = NULL;
2040                         }
2041                         kfree(dma_segment_array);
2042                         return -ENOMEM;
2043                 }
2044                 memset(hba->hash_tbl_segments[i], 0,
2045                        BNX2FC_HASH_TBL_CHUNK_SIZE);
2046         }
2047
2048         hba->hash_tbl_pbl = dma_alloc_coherent(&hba->pcidev->dev,
2049                                                PAGE_SIZE,
2050                                                &hba->hash_tbl_pbl_dma,
2051                                                GFP_KERNEL);
2052         if (!hba->hash_tbl_pbl) {
2053                 printk(KERN_ERR PFX "hash table pbl alloc failed\n");
2054                 kfree(dma_segment_array);
2055                 return -ENOMEM;
2056         }
2057         memset(hba->hash_tbl_pbl, 0, PAGE_SIZE);
2058
2059         pbl = hba->hash_tbl_pbl;
2060         for (i = 0; i < segment_count; ++i) {
2061                 u64 paddr = dma_segment_array[i];
2062                 *pbl = cpu_to_le32((u32) paddr);
2063                 ++pbl;
2064                 *pbl = cpu_to_le32((u32) (paddr >> 32));
2065                 ++pbl;
2066         }
2067         pbl = hba->hash_tbl_pbl;
2068         i = 0;
2069         while (*pbl && *(pbl + 1)) {
2070                 u32 lo;
2071                 u32 hi;
2072                 lo = *pbl;
2073                 ++pbl;
2074                 hi = *pbl;
2075                 ++pbl;
2076                 ++i;
2077         }
2078         kfree(dma_segment_array);
2079         return 0;
2080 }
2081
2082 /**
2083  * bnx2fc_setup_fw_resc - Allocate and map hash table and dummy buffer
2084  *
2085  * @hba:        Pointer to adapter structure
2086  *
2087  */
2088 int bnx2fc_setup_fw_resc(struct bnx2fc_hba *hba)
2089 {
2090         u64 addr;
2091         u32 mem_size;
2092         int i;
2093
2094         if (bnx2fc_allocate_hash_table(hba))
2095                 return -ENOMEM;
2096
2097         mem_size = BNX2FC_NUM_MAX_SESS * sizeof(struct regpair);
2098         hba->t2_hash_tbl_ptr = dma_alloc_coherent(&hba->pcidev->dev, mem_size,
2099                                                   &hba->t2_hash_tbl_ptr_dma,
2100                                                   GFP_KERNEL);
2101         if (!hba->t2_hash_tbl_ptr) {
2102                 printk(KERN_ERR PFX "unable to allocate t2 hash table ptr\n");
2103                 bnx2fc_free_fw_resc(hba);
2104                 return -ENOMEM;
2105         }
2106         memset(hba->t2_hash_tbl_ptr, 0x00, mem_size);
2107
2108         mem_size = BNX2FC_NUM_MAX_SESS *
2109                                 sizeof(struct fcoe_t2_hash_table_entry);
2110         hba->t2_hash_tbl = dma_alloc_coherent(&hba->pcidev->dev, mem_size,
2111                                               &hba->t2_hash_tbl_dma,
2112                                               GFP_KERNEL);
2113         if (!hba->t2_hash_tbl) {
2114                 printk(KERN_ERR PFX "unable to allocate t2 hash table\n");
2115                 bnx2fc_free_fw_resc(hba);
2116                 return -ENOMEM;
2117         }
2118         memset(hba->t2_hash_tbl, 0x00, mem_size);
2119         for (i = 0; i < BNX2FC_NUM_MAX_SESS; i++) {
2120                 addr = (unsigned long) hba->t2_hash_tbl_dma +
2121                          ((i+1) * sizeof(struct fcoe_t2_hash_table_entry));
2122                 hba->t2_hash_tbl[i].next.lo = addr & 0xffffffff;
2123                 hba->t2_hash_tbl[i].next.hi = addr >> 32;
2124         }
2125
2126         hba->dummy_buffer = dma_alloc_coherent(&hba->pcidev->dev,
2127                                                PAGE_SIZE, &hba->dummy_buf_dma,
2128                                                GFP_KERNEL);
2129         if (!hba->dummy_buffer) {
2130                 printk(KERN_ERR PFX "unable to alloc MP Dummy Buffer\n");
2131                 bnx2fc_free_fw_resc(hba);
2132                 return -ENOMEM;
2133         }
2134
2135         hba->stats_buffer = dma_alloc_coherent(&hba->pcidev->dev,
2136                                                PAGE_SIZE,
2137                                                &hba->stats_buf_dma,
2138                                                GFP_KERNEL);
2139         if (!hba->stats_buffer) {
2140                 printk(KERN_ERR PFX "unable to alloc Stats Buffer\n");
2141                 bnx2fc_free_fw_resc(hba);
2142                 return -ENOMEM;
2143         }
2144         memset(hba->stats_buffer, 0x00, PAGE_SIZE);
2145
2146         return 0;
2147 }
2148
2149 void bnx2fc_free_fw_resc(struct bnx2fc_hba *hba)
2150 {
2151         u32 mem_size;
2152
2153         if (hba->stats_buffer) {
2154                 dma_free_coherent(&hba->pcidev->dev, PAGE_SIZE,
2155                                   hba->stats_buffer, hba->stats_buf_dma);
2156                 hba->stats_buffer = NULL;
2157         }
2158
2159         if (hba->dummy_buffer) {
2160                 dma_free_coherent(&hba->pcidev->dev, PAGE_SIZE,
2161                                   hba->dummy_buffer, hba->dummy_buf_dma);
2162                 hba->dummy_buffer = NULL;
2163         }
2164
2165         if (hba->t2_hash_tbl_ptr) {
2166                 mem_size = BNX2FC_NUM_MAX_SESS * sizeof(struct regpair);
2167                 dma_free_coherent(&hba->pcidev->dev, mem_size,
2168                                     hba->t2_hash_tbl_ptr,
2169                                     hba->t2_hash_tbl_ptr_dma);
2170                 hba->t2_hash_tbl_ptr = NULL;
2171         }
2172
2173         if (hba->t2_hash_tbl) {
2174                 mem_size = BNX2FC_NUM_MAX_SESS *
2175                             sizeof(struct fcoe_t2_hash_table_entry);
2176                 dma_free_coherent(&hba->pcidev->dev, mem_size,
2177                                     hba->t2_hash_tbl, hba->t2_hash_tbl_dma);
2178                 hba->t2_hash_tbl = NULL;
2179         }
2180         bnx2fc_free_hash_table(hba);
2181 }