drivers/scsi/hpsa.c

   1 /*
   2  *    Disk Array driver for HP Smart Array SAS controllers
   3  *    Copyright 2000, 2014 Hewlett-Packard Development Company, L.P.
   4  *
   5  *    This program is free software; you can redistribute it and/or modify
   6  *    it under the terms of the GNU General Public License as published by
   7  *    the Free Software Foundation; version 2 of the License.
   8  *
   9  *    This program is distributed in the hope that it will be useful,
  10  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
  13  *
  14  *    You should have received a copy of the GNU General Public License
  15  *    along with this program; if not, write to the Free Software
  16  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17  *
  18  *    Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19  *
  20  */
  21
  22 #include <linux/module.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/types.h>
  25 #include <linux/pci.h>
  26 #include <linux/pci-aspm.h>
  27 #include <linux/kernel.h>
  28 #include <linux/slab.h>
  29 #include <linux/delay.h>
  30 #include <linux/fs.h>
  31 #include <linux/timer.h>
  32 #include <linux/init.h>
  33 #include <linux/spinlock.h>
  34 #include <linux/compat.h>
  35 #include <linux/blktrace_api.h>
  36 #include <linux/uaccess.h>
  37 #include <linux/io.h>
  38 #include <linux/dma-mapping.h>
  39 #include <linux/completion.h>
  40 #include <linux/moduleparam.h>
  41 #include <scsi/scsi.h>
  42 #include <scsi/scsi_cmnd.h>
  43 #include <scsi/scsi_device.h>
  44 #include <scsi/scsi_host.h>
  45 #include <scsi/scsi_tcq.h>
  46 #include <scsi/scsi_eh.h>
  47 #include <linux/cciss_ioctl.h>
  48 #include <linux/string.h>
  49 #include <linux/bitmap.h>
  50 #include <linux/atomic.h>
  51 #include <linux/jiffies.h>
  52 #include <linux/percpu-defs.h>
  53 #include <linux/percpu.h>
  54 #include <asm/unaligned.h>
  55 #include <asm/div64.h>
  56 #include "hpsa_cmd.h"
  57 #include "hpsa.h"
  58
  59 /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  60 #define HPSA_DRIVER_VERSION "3.4.4-1"
  61 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  62 #define HPSA "hpsa"
  63
  64 /* How long to wait for CISS doorbell communication */
  65 #define CLEAR_EVENT_WAIT_INTERVAL 20    /* ms for each msleep() call */
  66 #define MODE_CHANGE_WAIT_INTERVAL 10    /* ms for each msleep() call */
  67 #define MAX_CLEAR_EVENT_WAIT 30000      /* times 20 ms = 600 s */
  68 #define MAX_MODE_CHANGE_WAIT 2000       /* times 10 ms = 20 s */
  69 #define MAX_IOCTL_CONFIG_WAIT 1000
  70
  71 /*define how many times we will try a command because of bus resets */
  72 #define MAX_CMD_RETRIES 3
  73
  74 /* Embedded module documentation macros - see modules.h */
  75 MODULE_AUTHOR("Hewlett-Packard Company");
  76 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  77         HPSA_DRIVER_VERSION);
  78 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  79 MODULE_VERSION(HPSA_DRIVER_VERSION);
  80 MODULE_LICENSE("GPL");
  81
  82 static int hpsa_allow_any;
  83 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  84 MODULE_PARM_DESC(hpsa_allow_any,
  85                 "Allow hpsa driver to access unknown HP Smart Array hardware");
  86 static int hpsa_simple_mode;
  87 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
  88 MODULE_PARM_DESC(hpsa_simple_mode,
  89         "Use 'simple mode' rather than 'performant mode'");
  90
  91 /* define the PCI info for the cards we can control */
  92 static const struct pci_device_id hpsa_pci_device_id[] = {
  93         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3241},
  94         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3243},
  95         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3245},
  96         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3247},
  97         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3249},
  98         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324A},
  99         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324B},
 100         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3233},
 101         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3350},
 102         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3351},
 103         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3352},
 104         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3353},
 105         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3354},
 106         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3355},
 107         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3356},
 108         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1921},
 109         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1922},
 110         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1923},
 111         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1924},
 112         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1926},
 113         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1928},
 114         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1929},
 115         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BD},
 116         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BE},
 117         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BF},
 118         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C0},
 119         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C1},
 120         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C2},
 121         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C3},
 122         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C4},
 123         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C5},
 124         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C6},
 125         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C7},
 126         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C8},
 127         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C9},
 128         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CA},
 129         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CB},
 130         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CC},
 131         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CD},
 132         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CE},
 133         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
 134         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
 135         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
 136         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
 137         {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
 138         {PCI_VENDOR_ID_HP,     PCI_ANY_ID,      PCI_ANY_ID, PCI_ANY_ID,
 139                 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
 140         {0,}
 141 };
 142
 143 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
 144
 145 /*  board_id = Subsystem Device ID & Vendor ID
 146  *  product = Marketing Name for the board
 147  *  access = Address of the struct of function pointers
 148  */
 149 static struct board_type products[] = {
 150         {0x3241103C, "Smart Array P212", &SA5_access},
 151         {0x3243103C, "Smart Array P410", &SA5_access},
 152         {0x3245103C, "Smart Array P410i", &SA5_access},
 153         {0x3247103C, "Smart Array P411", &SA5_access},
 154         {0x3249103C, "Smart Array P812", &SA5_access},
 155         {0x324A103C, "Smart Array P712m", &SA5_access},
 156         {0x324B103C, "Smart Array P711m", &SA5_access},
 157         {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
 158         {0x3350103C, "Smart Array P222", &SA5_access},
 159         {0x3351103C, "Smart Array P420", &SA5_access},
 160         {0x3352103C, "Smart Array P421", &SA5_access},
 161         {0x3353103C, "Smart Array P822", &SA5_access},
 162         {0x3354103C, "Smart Array P420i", &SA5_access},
 163         {0x3355103C, "Smart Array P220i", &SA5_access},
 164         {0x3356103C, "Smart Array P721m", &SA5_access},
 165         {0x1921103C, "Smart Array P830i", &SA5_access},
 166         {0x1922103C, "Smart Array P430", &SA5_access},
 167         {0x1923103C, "Smart Array P431", &SA5_access},
 168         {0x1924103C, "Smart Array P830", &SA5_access},
 169         {0x1926103C, "Smart Array P731m", &SA5_access},
 170         {0x1928103C, "Smart Array P230i", &SA5_access},
 171         {0x1929103C, "Smart Array P530", &SA5_access},
 172         {0x21BD103C, "Smart Array P244br", &SA5_access},
 173         {0x21BE103C, "Smart Array P741m", &SA5_access},
 174         {0x21BF103C, "Smart HBA H240ar", &SA5_access},
 175         {0x21C0103C, "Smart Array P440ar", &SA5_access},
 176         {0x21C1103C, "Smart Array P840ar", &SA5_access},
 177         {0x21C2103C, "Smart Array P440", &SA5_access},
 178         {0x21C3103C, "Smart Array P441", &SA5_access},
 179         {0x21C4103C, "Smart Array", &SA5_access},
 180         {0x21C5103C, "Smart Array P841", &SA5_access},
 181         {0x21C6103C, "Smart HBA H244br", &SA5_access},
 182         {0x21C7103C, "Smart HBA H240", &SA5_access},
 183         {0x21C8103C, "Smart HBA H241", &SA5_access},
 184         {0x21C9103C, "Smart Array", &SA5_access},
 185         {0x21CA103C, "Smart Array P246br", &SA5_access},
 186         {0x21CB103C, "Smart Array P840", &SA5_access},
 187         {0x21CC103C, "Smart Array", &SA5_access},
 188         {0x21CD103C, "Smart Array", &SA5_access},
 189         {0x21CE103C, "Smart HBA", &SA5_access},
 190         {0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
 191         {0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
 192         {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
 193         {0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
 194         {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
 195         {0xFFFF103C, "Unknown Smart Array", &SA5_access},
 196 };
 197
 198 static int number_of_controllers;
 199
 200 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
 201 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
 202 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
 203
 204 #ifdef CONFIG_COMPAT
 205 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd,
 206         void __user *arg);
 207 #endif
 208
 209 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
 210 static struct CommandList *cmd_alloc(struct ctlr_info *h);
 211 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
 212         void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
 213         int cmd_type);
 214 static void hpsa_free_cmd_pool(struct ctlr_info *h);
 215 #define VPD_PAGE (1 << 8)
 216
 217 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 218 static void hpsa_scan_start(struct Scsi_Host *);
 219 static int hpsa_scan_finished(struct Scsi_Host *sh,
 220         unsigned long elapsed_time);
 221 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
 222
 223 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
 224 static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
 225 static int hpsa_slave_alloc(struct scsi_device *sdev);
 226 static int hpsa_slave_configure(struct scsi_device *sdev);
 227 static void hpsa_slave_destroy(struct scsi_device *sdev);
 228
 229 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
 230 static int check_for_unit_attention(struct ctlr_info *h,
 231         struct CommandList *c);
 232 static void check_ioctl_unit_attention(struct ctlr_info *h,
 233         struct CommandList *c);
 234 /* performant mode helper functions */
 235 static void calc_bucket_map(int *bucket, int num_buckets,
 236         int nsgs, int min_blocks, u32 *bucket_map);
 237 static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
 238 static inline u32 next_command(struct ctlr_info *h, u8 q);
 239 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
 240                                u32 *cfg_base_addr, u64 *cfg_base_addr_index,
 241                                u64 *cfg_offset);
 242 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
 243                                     unsigned long *memory_bar);
 244 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
 245 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
 246                                      int wait_for_ready);
 247 static inline void finish_cmd(struct CommandList *c);
 248 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
 249 #define BOARD_NOT_READY 0
 250 #define BOARD_READY 1
 251 static void hpsa_drain_accel_commands(struct ctlr_info *h);
 252 static void hpsa_flush_cache(struct ctlr_info *h);
 253 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
 254         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
 255         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
 256 static void hpsa_command_resubmit_worker(struct work_struct *work);
 257 static u32 lockup_detected(struct ctlr_info *h);
 258 static int detect_controller_lockup(struct ctlr_info *h);
 259
 260 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
 261 {
 262         unsigned long *priv = shost_priv(sdev->host);
 263         return (struct ctlr_info *) *priv;
 264 }
 265
 266 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
 267 {
 268         unsigned long *priv = shost_priv(sh);
 269         return (struct ctlr_info *) *priv;
 270 }
 271
 272 /* extract sense key, asc, and ascq from sense data.  -1 means invalid. */
 273 static void decode_sense_data(const u8 *sense_data, int sense_data_len,
 274                         u8 *sense_key, u8 *asc, u8 *ascq)
 275 {
 276         struct scsi_sense_hdr sshdr;
 277         bool rc;
 278
 279         *sense_key = -1;
 280         *asc = -1;
 281         *ascq = -1;
 282
 283         if (sense_data_len < 1)
 284                 return;
 285
 286         rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr);
 287         if (rc) {
 288                 *sense_key = sshdr.sense_key;
 289                 *asc = sshdr.asc;
 290                 *ascq = sshdr.ascq;
 291         }
 292 }
 293
 294 static int check_for_unit_attention(struct ctlr_info *h,
 295         struct CommandList *c)
 296 {
 297         u8 sense_key, asc, ascq;
 298         int sense_len;
 299
 300         if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
 301                 sense_len = sizeof(c->err_info->SenseInfo);
 302         else
 303                 sense_len = c->err_info->SenseLen;
 304
 305         decode_sense_data(c->err_info->SenseInfo, sense_len,
 306                                 &sense_key, &asc, &ascq);
 307         if (sense_key != UNIT_ATTENTION || asc == -1)
 308                 return 0;
 309
 310         switch (asc) {
 311         case STATE_CHANGED:
 312                 dev_warn(&h->pdev->dev,
 313                         HPSA "%d: a state change detected, command retried\n",
 314                         h->ctlr);
 315                 break;
 316         case LUN_FAILED:
 317                 dev_warn(&h->pdev->dev,
 318                         HPSA "%d: LUN failure detected\n", h->ctlr);
 319                 break;
 320         case REPORT_LUNS_CHANGED:
 321                 dev_warn(&h->pdev->dev,
 322                         HPSA "%d: report LUN data changed\n", h->ctlr);
 323         /*
 324          * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
 325          * target (array) devices.
 326          */
 327                 break;
 328         case POWER_OR_RESET:
 329                 dev_warn(&h->pdev->dev, HPSA "%d: a power on "
 330                         "or device reset detected\n", h->ctlr);
 331                 break;
 332         case UNIT_ATTENTION_CLEARED:
 333                 dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
 334                     "cleared by another initiator\n", h->ctlr);
 335                 break;
 336         default:
 337                 dev_warn(&h->pdev->dev, HPSA "%d: unknown "
 338                         "unit attention detected\n", h->ctlr);
 339                 break;
 340         }
 341         return 1;
 342 }
 343
 344 static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
 345 {
 346         if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
 347                 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
 348                  c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
 349                 return 0;
 350         dev_warn(&h->pdev->dev, HPSA "device busy");
 351         return 1;
 352 }
 353
 354 static u32 lockup_detected(struct ctlr_info *h);
 355 static ssize_t host_show_lockup_detected(struct device *dev,
 356                 struct device_attribute *attr, char *buf)
 357 {
 358         int ld;
 359         struct ctlr_info *h;
 360         struct Scsi_Host *shost = class_to_shost(dev);
 361
 362         h = shost_to_hba(shost);
 363         ld = lockup_detected(h);
 364
 365         return sprintf(buf, "ld=%d\n", ld);
 366 }
 367
 368 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
 369                                          struct device_attribute *attr,
 370                                          const char *buf, size_t count)
 371 {
 372         int status, len;
 373         struct ctlr_info *h;
 374         struct Scsi_Host *shost = class_to_shost(dev);
 375         char tmpbuf[10];
 376
 377         if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
 378                 return -EACCES;
 379         len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
 380         strncpy(tmpbuf, buf, len);
 381         tmpbuf[len] = '\0';
 382         if (sscanf(tmpbuf, "%d", &status) != 1)
 383                 return -EINVAL;
 384         h = shost_to_hba(shost);
 385         h->acciopath_status = !!status;
 386         dev_warn(&h->pdev->dev,
 387                 "hpsa: HP SSD Smart Path %s via sysfs update.\n",
 388                 h->acciopath_status ? "enabled" : "disabled");
 389         return count;
 390 }
 391
 392 static ssize_t host_store_raid_offload_debug(struct device *dev,
 393                                          struct device_attribute *attr,
 394                                          const char *buf, size_t count)
 395 {
 396         int debug_level, len;
 397         struct ctlr_info *h;
 398         struct Scsi_Host *shost = class_to_shost(dev);
 399         char tmpbuf[10];
 400
 401         if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
 402                 return -EACCES;
 403         len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
 404         strncpy(tmpbuf, buf, len);
 405         tmpbuf[len] = '\0';
 406         if (sscanf(tmpbuf, "%d", &debug_level) != 1)
 407                 return -EINVAL;
 408         if (debug_level < 0)
 409                 debug_level = 0;
 410         h = shost_to_hba(shost);
 411         h->raid_offload_debug = debug_level;
 412         dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
 413                 h->raid_offload_debug);
 414         return count;
 415 }
 416
 417 static ssize_t host_store_rescan(struct device *dev,
 418                                  struct device_attribute *attr,
 419                                  const char *buf, size_t count)
 420 {
 421         struct ctlr_info *h;
 422         struct Scsi_Host *shost = class_to_shost(dev);
 423         h = shost_to_hba(shost);
 424         hpsa_scan_start(h->scsi_host);
 425         return count;
 426 }
 427
 428 static ssize_t host_show_firmware_revision(struct device *dev,
 429              struct device_attribute *attr, char *buf)
 430 {
 431         struct ctlr_info *h;
 432         struct Scsi_Host *shost = class_to_shost(dev);
 433         unsigned char *fwrev;
 434
 435         h = shost_to_hba(shost);
 436         if (!h->hba_inquiry_data)
 437                 return 0;
 438         fwrev = &h->hba_inquiry_data[32];
 439         return snprintf(buf, 20, "%c%c%c%c\n",
 440                 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
 441 }
 442
 443 static ssize_t host_show_commands_outstanding(struct device *dev,
 444              struct device_attribute *attr, char *buf)
 445 {
 446         struct Scsi_Host *shost = class_to_shost(dev);
 447         struct ctlr_info *h = shost_to_hba(shost);
 448
 449         return snprintf(buf, 20, "%d\n",
 450                         atomic_read(&h->commands_outstanding));
 451 }
 452
 453 static ssize_t host_show_transport_mode(struct device *dev,
 454         struct device_attribute *attr, char *buf)
 455 {
 456         struct ctlr_info *h;
 457         struct Scsi_Host *shost = class_to_shost(dev);
 458
 459         h = shost_to_hba(shost);
 460         return snprintf(buf, 20, "%s\n",
 461                 h->transMethod & CFGTBL_Trans_Performant ?
 462                         "performant" : "simple");
 463 }
 464
 465 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
 466         struct device_attribute *attr, char *buf)
 467 {
 468         struct ctlr_info *h;
 469         struct Scsi_Host *shost = class_to_shost(dev);
 470
 471         h = shost_to_hba(shost);
 472         return snprintf(buf, 30, "HP SSD Smart Path %s\n",
 473                 (h->acciopath_status == 1) ?  "enabled" : "disabled");
 474 }
 475
 476 /* List of controllers which cannot be hard reset on kexec with reset_devices */
 477 static u32 unresettable_controller[] = {
 478         0x324a103C, /* Smart Array P712m */
 479         0x324b103C, /* Smart Array P711m */
 480         0x3223103C, /* Smart Array P800 */
 481         0x3234103C, /* Smart Array P400 */
 482         0x3235103C, /* Smart Array P400i */
 483         0x3211103C, /* Smart Array E200i */
 484         0x3212103C, /* Smart Array E200 */
 485         0x3213103C, /* Smart Array E200i */
 486         0x3214103C, /* Smart Array E200i */
 487         0x3215103C, /* Smart Array E200i */
 488         0x3237103C, /* Smart Array E500 */
 489         0x323D103C, /* Smart Array P700m */
 490         0x40800E11, /* Smart Array 5i */
 491         0x409C0E11, /* Smart Array 6400 */
 492         0x409D0E11, /* Smart Array 6400 EM */
 493         0x40700E11, /* Smart Array 5300 */
 494         0x40820E11, /* Smart Array 532 */
 495         0x40830E11, /* Smart Array 5312 */
 496         0x409A0E11, /* Smart Array 641 */
 497         0x409B0E11, /* Smart Array 642 */
 498         0x40910E11, /* Smart Array 6i */
 499 };
 500
 501 /* List of controllers which cannot even be soft reset */
 502 static u32 soft_unresettable_controller[] = {
 503         0x40800E11, /* Smart Array 5i */
 504         0x40700E11, /* Smart Array 5300 */
 505         0x40820E11, /* Smart Array 532 */
 506         0x40830E11, /* Smart Array 5312 */
 507         0x409A0E11, /* Smart Array 641 */
 508         0x409B0E11, /* Smart Array 642 */
 509         0x40910E11, /* Smart Array 6i */
 510         /* Exclude 640x boards.  These are two pci devices in one slot
 511          * which share a battery backed cache module.  One controls the
 512          * cache, the other accesses the cache through the one that controls
 513          * it.  If we reset the one controlling the cache, the other will
 514          * likely not be happy.  Just forbid resetting this conjoined mess.
 515          * The 640x isn't really supported by hpsa anyway.
 516          */
 517         0x409C0E11, /* Smart Array 6400 */
 518         0x409D0E11, /* Smart Array 6400 EM */
 519 };
 520
 521 static u32 needs_abort_tags_swizzled[] = {
 522         0x323D103C, /* Smart Array P700m */
 523         0x324a103C, /* Smart Array P712m */
 524         0x324b103C, /* SmartArray P711m */
 525 };
 526
 527 static int board_id_in_array(u32 a[], int nelems, u32 board_id)
 528 {
 529         int i;
 530
 531         for (i = 0; i < nelems; i++)
 532                 if (a[i] == board_id)
 533                         return 1;
 534         return 0;
 535 }
 536
 537 static int ctlr_is_hard_resettable(u32 board_id)
 538 {
 539         return !board_id_in_array(unresettable_controller,
 540                         ARRAY_SIZE(unresettable_controller), board_id);
 541 }
 542
 543 static int ctlr_is_soft_resettable(u32 board_id)
 544 {
 545         return !board_id_in_array(soft_unresettable_controller,
 546                         ARRAY_SIZE(soft_unresettable_controller), board_id);
 547 }
 548
 549 static int ctlr_is_resettable(u32 board_id)
 550 {
 551         return ctlr_is_hard_resettable(board_id) ||
 552                 ctlr_is_soft_resettable(board_id);
 553 }
 554
 555 static int ctlr_needs_abort_tags_swizzled(u32 board_id)
 556 {
 557         return board_id_in_array(needs_abort_tags_swizzled,
 558                         ARRAY_SIZE(needs_abort_tags_swizzled), board_id);
 559 }
 560
 561 static ssize_t host_show_resettable(struct device *dev,
 562         struct device_attribute *attr, char *buf)
 563 {
 564         struct ctlr_info *h;
 565         struct Scsi_Host *shost = class_to_shost(dev);
 566
 567         h = shost_to_hba(shost);
 568         return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
 569 }
 570
 571 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
 572 {
 573         return (scsi3addr[3] & 0xC0) == 0x40;
 574 }
 575
 576 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
 577         "1(+0)ADM", "UNKNOWN"
 578 };
 579 #define HPSA_RAID_0     0
 580 #define HPSA_RAID_4     1
 581 #define HPSA_RAID_1     2       /* also used for RAID 10 */
 582 #define HPSA_RAID_5     3       /* also used for RAID 50 */
 583 #define HPSA_RAID_51    4
 584 #define HPSA_RAID_6     5       /* also used for RAID 60 */
 585 #define HPSA_RAID_ADM   6       /* also used for RAID 1+0 ADM */
 586 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
 587
 588 static ssize_t raid_level_show(struct device *dev,
 589              struct device_attribute *attr, char *buf)
 590 {
 591         ssize_t l = 0;
 592         unsigned char rlevel;
 593         struct ctlr_info *h;
 594         struct scsi_device *sdev;
 595         struct hpsa_scsi_dev_t *hdev;
 596         unsigned long flags;
 597
 598         sdev = to_scsi_device(dev);
 599         h = sdev_to_hba(sdev);
 600         spin_lock_irqsave(&h->lock, flags);
 601         hdev = sdev->hostdata;
 602         if (!hdev) {
 603                 spin_unlock_irqrestore(&h->lock, flags);
 604                 return -ENODEV;
 605         }
 606
 607         /* Is this even a logical drive? */
 608         if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
 609                 spin_unlock_irqrestore(&h->lock, flags);
 610                 l = snprintf(buf, PAGE_SIZE, "N/A\n");
 611                 return l;
 612         }
 613
 614         rlevel = hdev->raid_level;
 615         spin_unlock_irqrestore(&h->lock, flags);
 616         if (rlevel > RAID_UNKNOWN)
 617                 rlevel = RAID_UNKNOWN;
 618         l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
 619         return l;
 620 }
 621
 622 static ssize_t lunid_show(struct device *dev,
 623              struct device_attribute *attr, char *buf)
 624 {
 625         struct ctlr_info *h;
 626         struct scsi_device *sdev;
 627         struct hpsa_scsi_dev_t *hdev;
 628         unsigned long flags;
 629         unsigned char lunid[8];
 630
 631         sdev = to_scsi_device(dev);
 632         h = sdev_to_hba(sdev);
 633         spin_lock_irqsave(&h->lock, flags);
 634         hdev = sdev->hostdata;
 635         if (!hdev) {
 636                 spin_unlock_irqrestore(&h->lock, flags);
 637                 return -ENODEV;
 638         }
 639         memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
 640         spin_unlock_irqrestore(&h->lock, flags);
 641         return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
 642                 lunid[0], lunid[1], lunid[2], lunid[3],
 643                 lunid[4], lunid[5], lunid[6], lunid[7]);
 644 }
 645
 646 static ssize_t unique_id_show(struct device *dev,
 647              struct device_attribute *attr, char *buf)
 648 {
 649         struct ctlr_info *h;
 650         struct scsi_device *sdev;
 651         struct hpsa_scsi_dev_t *hdev;
 652         unsigned long flags;
 653         unsigned char sn[16];
 654
 655         sdev = to_scsi_device(dev);
 656         h = sdev_to_hba(sdev);
 657         spin_lock_irqsave(&h->lock, flags);
 658         hdev = sdev->hostdata;
 659         if (!hdev) {
 660                 spin_unlock_irqrestore(&h->lock, flags);
 661                 return -ENODEV;
 662         }
 663         memcpy(sn, hdev->device_id, sizeof(sn));
 664         spin_unlock_irqrestore(&h->lock, flags);
 665         return snprintf(buf, 16 * 2 + 2,
 666                         "%02X%02X%02X%02X%02X%02X%02X%02X"
 667                         "%02X%02X%02X%02X%02X%02X%02X%02X\n",
 668                         sn[0], sn[1], sn[2], sn[3],
 669                         sn[4], sn[5], sn[6], sn[7],
 670                         sn[8], sn[9], sn[10], sn[11],
 671                         sn[12], sn[13], sn[14], sn[15]);
 672 }
 673
 674 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
 675              struct device_attribute *attr, char *buf)
 676 {
 677         struct ctlr_info *h;
 678         struct scsi_device *sdev;
 679         struct hpsa_scsi_dev_t *hdev;
 680         unsigned long flags;
 681         int offload_enabled;
 682
 683         sdev = to_scsi_device(dev);
 684         h = sdev_to_hba(sdev);
 685         spin_lock_irqsave(&h->lock, flags);
 686         hdev = sdev->hostdata;
 687         if (!hdev) {
 688                 spin_unlock_irqrestore(&h->lock, flags);
 689                 return -ENODEV;
 690         }
 691         offload_enabled = hdev->offload_enabled;
 692         spin_unlock_irqrestore(&h->lock, flags);
 693         return snprintf(buf, 20, "%d\n", offload_enabled);
 694 }
 695
 696 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
 697 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
 698 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
 699 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
 700 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
 701                         host_show_hp_ssd_smart_path_enabled, NULL);
 702 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
 703                 host_show_hp_ssd_smart_path_status,
 704                 host_store_hp_ssd_smart_path_status);
 705 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
 706                         host_store_raid_offload_debug);
 707 static DEVICE_ATTR(firmware_revision, S_IRUGO,
 708         host_show_firmware_revision, NULL);
 709 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
 710         host_show_commands_outstanding, NULL);
 711 static DEVICE_ATTR(transport_mode, S_IRUGO,
 712         host_show_transport_mode, NULL);
 713 static DEVICE_ATTR(resettable, S_IRUGO,
 714         host_show_resettable, NULL);
 715 static DEVICE_ATTR(lockup_detected, S_IRUGO,
 716         host_show_lockup_detected, NULL);
 717
 718 static struct device_attribute *hpsa_sdev_attrs[] = {
 719         &dev_attr_raid_level,
 720         &dev_attr_lunid,
 721         &dev_attr_unique_id,
 722         &dev_attr_hp_ssd_smart_path_enabled,
 723         &dev_attr_lockup_detected,
 724         NULL,
 725 };
 726
 727 static struct device_attribute *hpsa_shost_attrs[] = {
 728         &dev_attr_rescan,
 729         &dev_attr_firmware_revision,
 730         &dev_attr_commands_outstanding,
 731         &dev_attr_transport_mode,
 732         &dev_attr_resettable,
 733         &dev_attr_hp_ssd_smart_path_status,
 734         &dev_attr_raid_offload_debug,
 735         NULL,
 736 };
 737
 738 #define HPSA_NRESERVED_CMDS     (HPSA_CMDS_RESERVED_FOR_ABORTS + \
 739                 HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS)
 740
 741 static struct scsi_host_template hpsa_driver_template = {
 742         .module                 = THIS_MODULE,
 743         .name                   = HPSA,
 744         .proc_name              = HPSA,
 745         .queuecommand           = hpsa_scsi_queue_command,
 746         .scan_start             = hpsa_scan_start,
 747         .scan_finished          = hpsa_scan_finished,
 748         .change_queue_depth     = hpsa_change_queue_depth,
 749         .this_id                = -1,
 750         .use_clustering         = ENABLE_CLUSTERING,
 751         .eh_abort_handler       = hpsa_eh_abort_handler,
 752         .eh_device_reset_handler = hpsa_eh_device_reset_handler,
 753         .ioctl                  = hpsa_ioctl,
 754         .slave_alloc            = hpsa_slave_alloc,
 755         .slave_configure        = hpsa_slave_configure,
 756         .slave_destroy          = hpsa_slave_destroy,
 757 #ifdef CONFIG_COMPAT
 758         .compat_ioctl           = hpsa_compat_ioctl,
 759 #endif
 760         .sdev_attrs = hpsa_sdev_attrs,
 761         .shost_attrs = hpsa_shost_attrs,
 762         .max_sectors = 8192,
 763         .no_write_same = 1,
 764 };
 765
 766 static inline u32 next_command(struct ctlr_info *h, u8 q)
 767 {
 768         u32 a;
 769         struct reply_queue_buffer *rq = &h->reply_queue[q];
 770
 771         if (h->transMethod & CFGTBL_Trans_io_accel1)
 772                 return h->access.command_completed(h, q);
 773
 774         if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
 775                 return h->access.command_completed(h, q);
 776
 777         if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
 778                 a = rq->head[rq->current_entry];
 779                 rq->current_entry++;
 780                 atomic_dec(&h->commands_outstanding);
 781         } else {
 782                 a = FIFO_EMPTY;
 783         }
 784         /* Check for wraparound */
 785         if (rq->current_entry == h->max_commands) {
 786                 rq->current_entry = 0;
 787                 rq->wraparound ^= 1;
 788         }
 789         return a;
 790 }
 791
 792 /*
 793  * There are some special bits in the bus address of the
 794  * command that we have to set for the controller to know
 795  * how to process the command:
 796  *
 797  * Normal performant mode:
 798  * bit 0: 1 means performant mode, 0 means simple mode.
 799  * bits 1-3 = block fetch table entry
 800  * bits 4-6 = command type (== 0)
 801  *
 802  * ioaccel1 mode:
 803  * bit 0 = "performant mode" bit.
 804  * bits 1-3 = block fetch table entry
 805  * bits 4-6 = command type (== 110)
 806  * (command type is needed because ioaccel1 mode
 807  * commands are submitted through the same register as normal
 808  * mode commands, so this is how the controller knows whether
 809  * the command is normal mode or ioaccel1 mode.)
 810  *
 811  * ioaccel2 mode:
 812  * bit 0 = "performant mode" bit.
 813  * bits 1-4 = block fetch table entry (note extra bit)
 814  * bits 4-6 = not needed, because ioaccel2 mode has
 815  * a separate special register for submitting commands.
 816  */
 817
 818 /*
 819  * set_performant_mode: Modify the tag for cciss performant
 820  * set bit 0 for pull model, bits 3-1 for block fetch
 821  * register number
 822  */
 823 #define DEFAULT_REPLY_QUEUE (-1)
 824 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c,
 825                                         int reply_queue)
 826 {
 827         if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
 828                 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
 829                 if (unlikely(!h->msix_vector))
 830                         return;
 831                 if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
 832                         c->Header.ReplyQueue =
 833                                 raw_smp_processor_id() % h->nreply_queues;
 834                 else
 835                         c->Header.ReplyQueue = reply_queue % h->nreply_queues;
 836         }
 837 }
 838
 839 static void set_ioaccel1_performant_mode(struct ctlr_info *h,
 840                                                 struct CommandList *c,
 841                                                 int reply_queue)
 842 {
 843         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
 844
 845         /*
 846          * Tell the controller to post the reply to the queue for this
 847          * processor.  This seems to give the best I/O throughput.
 848          */
 849         if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
 850                 cp->ReplyQueue = smp_processor_id() % h->nreply_queues;
 851         else
 852                 cp->ReplyQueue = reply_queue % h->nreply_queues;
 853         /*
 854          * Set the bits in the address sent down to include:
 855          *  - performant mode bit (bit 0)
 856          *  - pull count (bits 1-3)
 857          *  - command type (bits 4-6)
 858          */
 859         c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
 860                                         IOACCEL1_BUSADDR_CMDTYPE;
 861 }
 862
 863 static void set_ioaccel2_performant_mode(struct ctlr_info *h,
 864                                                 struct CommandList *c,
 865                                                 int reply_queue)
 866 {
 867         struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
 868
 869         /*
 870          * Tell the controller to post the reply to the queue for this
 871          * processor.  This seems to give the best I/O throughput.
 872          */
 873         if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
 874                 cp->reply_queue = smp_processor_id() % h->nreply_queues;
 875         else
 876                 cp->reply_queue = reply_queue % h->nreply_queues;
 877         /*
 878          * Set the bits in the address sent down to include:
 879          *  - performant mode bit not used in ioaccel mode 2
 880          *  - pull count (bits 0-3)
 881          *  - command type isn't needed for ioaccel2
 882          */
 883         c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
 884 }
 885
 886 static int is_firmware_flash_cmd(u8 *cdb)
 887 {
 888         return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
 889 }
 890
 891 /*
 892  * During firmware flash, the heartbeat register may not update as frequently
 893  * as it should.  So we dial down lockup detection during firmware flash. and
 894  * dial it back up when firmware flash completes.
 895  */
 896 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
 897 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
 898 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
 899                 struct CommandList *c)
 900 {
 901         if (!is_firmware_flash_cmd(c->Request.CDB))
 902                 return;
 903         atomic_inc(&h->firmware_flash_in_progress);
 904         h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
 905 }
 906
 907 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
 908                 struct CommandList *c)
 909 {
 910         if (is_firmware_flash_cmd(c->Request.CDB) &&
 911                 atomic_dec_and_test(&h->firmware_flash_in_progress))
 912                 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
 913 }
 914
 915 static void __enqueue_cmd_and_start_io(struct ctlr_info *h,
 916         struct CommandList *c, int reply_queue)
 917 {
 918         dial_down_lockup_detection_during_fw_flash(h, c);
 919         atomic_inc(&h->commands_outstanding);
 920         switch (c->cmd_type) {
 921         case CMD_IOACCEL1:
 922                 set_ioaccel1_performant_mode(h, c, reply_queue);
 923                 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
 924                 break;
 925         case CMD_IOACCEL2:
 926                 set_ioaccel2_performant_mode(h, c, reply_queue);
 927                 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
 928                 break;
 929         default:
 930                 set_performant_mode(h, c, reply_queue);
 931                 h->access.submit_command(h, c);
 932         }
 933 }
 934
 935 static void enqueue_cmd_and_start_io(struct ctlr_info *h,
 936                                         struct CommandList *c)
 937 {
 938         __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE);
 939 }
 940
 941 static inline int is_hba_lunid(unsigned char scsi3addr[])
 942 {
 943         return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
 944 }
 945
 946 static inline int is_scsi_rev_5(struct ctlr_info *h)
 947 {
 948         if (!h->hba_inquiry_data)
 949                 return 0;
 950         if ((h->hba_inquiry_data[2] & 0x07) == 5)
 951                 return 1;
 952         return 0;
 953 }
 954
 955 static int hpsa_find_target_lun(struct ctlr_info *h,
 956         unsigned char scsi3addr[], int bus, int *target, int *lun)
 957 {
 958         /* finds an unused bus, target, lun for a new physical device
 959          * assumes h->devlock is held
 960          */
 961         int i, found = 0;
 962         DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
 963
 964         bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
 965
 966         for (i = 0; i < h->ndevices; i++) {
 967                 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
 968                         __set_bit(h->dev[i]->target, lun_taken);
 969         }
 970
 971         i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
 972         if (i < HPSA_MAX_DEVICES) {
 973                 /* *bus = 1; */
 974                 *target = i;
 975                 *lun = 0;
 976                 found = 1;
 977         }
 978         return !found;
 979 }
 980
 981 static inline void hpsa_show_dev_msg(const char *level, struct ctlr_info *h,
 982         struct hpsa_scsi_dev_t *dev, char *description)
 983 {
 984         dev_printk(level, &h->pdev->dev,
 985                         "scsi %d:%d:%d:%d: %s %s %.8s %.16s RAID-%s SSDSmartPathCap%c En%c Exp=%d\n",
 986                         h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
 987                         description,
 988                         scsi_device_type(dev->devtype),
 989                         dev->vendor,
 990                         dev->model,
 991                         dev->raid_level > RAID_UNKNOWN ?
 992                                 "RAID-?" : raid_label[dev->raid_level],
 993                         dev->offload_config ? '+' : '-',
 994                         dev->offload_enabled ? '+' : '-',
 995                         dev->expose_state);
 996 }
 997
 998 /* Add an entry into h->dev[] array. */
 999 static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
1000                 struct hpsa_scsi_dev_t *device,
1001                 struct hpsa_scsi_dev_t *added[], int *nadded)
1002 {
1003         /* assumes h->devlock is held */
1004         int n = h->ndevices;
1005         int i;
1006         unsigned char addr1[8], addr2[8];
1007         struct hpsa_scsi_dev_t *sd;
1008
1009         if (n >= HPSA_MAX_DEVICES) {
1010                 dev_err(&h->pdev->dev, "too many devices, some will be "
1011                         "inaccessible.\n");
1012                 return -1;
1013         }
1014
1015         /* physical devices do not have lun or target assigned until now. */
1016         if (device->lun != -1)
1017                 /* Logical device, lun is already assigned. */
1018                 goto lun_assigned;
1019
1020         /* If this device a non-zero lun of a multi-lun device
1021          * byte 4 of the 8-byte LUN addr will contain the logical
1022          * unit no, zero otherwise.
1023          */
1024         if (device->scsi3addr[4] == 0) {
1025                 /* This is not a non-zero lun of a multi-lun device */
1026                 if (hpsa_find_target_lun(h, device->scsi3addr,
1027                         device->bus, &device->target, &device->lun) != 0)
1028                         return -1;
1029                 goto lun_assigned;
1030         }
1031
1032         /* This is a non-zero lun of a multi-lun device.
1033          * Search through our list and find the device which
1034          * has the same 8 byte LUN address, excepting byte 4.
1035          * Assign the same bus and target for this new LUN.
1036          * Use the logical unit number from the firmware.
1037          */
1038         memcpy(addr1, device->scsi3addr, 8);
1039         addr1[4] = 0;
1040         for (i = 0; i < n; i++) {
1041                 sd = h->dev[i];
1042                 memcpy(addr2, sd->scsi3addr, 8);
1043                 addr2[4] = 0;
1044                 /* differ only in byte 4? */
1045                 if (memcmp(addr1, addr2, 8) == 0) {
1046                         device->bus = sd->bus;
1047                         device->target = sd->target;
1048                         device->lun = device->scsi3addr[4];
1049                         break;
1050                 }
1051         }
1052         if (device->lun == -1) {
1053                 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
1054                         " suspect firmware bug or unsupported hardware "
1055                         "configuration.\n");
1056                         return -1;
1057         }
1058
1059 lun_assigned:
1060
1061         h->dev[n] = device;
1062         h->ndevices++;
1063         added[*nadded] = device;
1064         (*nadded)++;
1065         hpsa_show_dev_msg(KERN_INFO, h, device,
1066                 device->expose_state & HPSA_SCSI_ADD ? "added" : "masked");
1067         device->offload_to_be_enabled = device->offload_enabled;
1068         device->offload_enabled = 0;
1069         return 0;
1070 }
1071
1072 /* Update an entry in h->dev[] array. */
1073 static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
1074         int entry, struct hpsa_scsi_dev_t *new_entry)
1075 {
1076         int offload_enabled;
1077         /* assumes h->devlock is held */
1078         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1079
1080         /* Raid level changed. */
1081         h->dev[entry]->raid_level = new_entry->raid_level;
1082
1083         /* Raid offload parameters changed.  Careful about the ordering. */
1084         if (new_entry->offload_config && new_entry->offload_enabled) {
1085                 /*
1086                  * if drive is newly offload_enabled, we want to copy the
1087                  * raid map data first.  If previously offload_enabled and
1088                  * offload_config were set, raid map data had better be
1089                  * the same as it was before.  if raid map data is changed
1090                  * then it had better be the case that
1091                  * h->dev[entry]->offload_enabled is currently 0.
1092                  */
1093                 h->dev[entry]->raid_map = new_entry->raid_map;
1094                 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1095         }
1096         h->dev[entry]->offload_config = new_entry->offload_config;
1097         h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
1098         h->dev[entry]->queue_depth = new_entry->queue_depth;
1099
1100         /*
1101          * We can turn off ioaccel offload now, but need to delay turning
1102          * it on until we can update h->dev[entry]->phys_disk[], but we
1103          * can't do that until all the devices are updated.
1104          */
1105         h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled;
1106         if (!new_entry->offload_enabled)
1107                 h->dev[entry]->offload_enabled = 0;
1108
1109         offload_enabled = h->dev[entry]->offload_enabled;
1110         h->dev[entry]->offload_enabled = h->dev[entry]->offload_to_be_enabled;
1111         hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated");
1112         h->dev[entry]->offload_enabled = offload_enabled;
1113 }
1114
1115 /* Replace an entry from h->dev[] array. */
1116 static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
1117         int entry, struct hpsa_scsi_dev_t *new_entry,
1118         struct hpsa_scsi_dev_t *added[], int *nadded,
1119         struct hpsa_scsi_dev_t *removed[], int *nremoved)
1120 {
1121         /* assumes h->devlock is held */
1122         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1123         removed[*nremoved] = h->dev[entry];
1124         (*nremoved)++;
1125
1126         /*
1127          * New physical devices won't have target/lun assigned yet
1128          * so we need to preserve the values in the slot we are replacing.
1129          */
1130         if (new_entry->target == -1) {
1131                 new_entry->target = h->dev[entry]->target;
1132                 new_entry->lun = h->dev[entry]->lun;
1133         }
1134
1135         h->dev[entry] = new_entry;
1136         added[*nadded] = new_entry;
1137         (*nadded)++;
1138         hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced");
1139         new_entry->offload_to_be_enabled = new_entry->offload_enabled;
1140         new_entry->offload_enabled = 0;
1141 }
1142
1143 /* Remove an entry from h->dev[] array. */
1144 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
1145         struct hpsa_scsi_dev_t *removed[], int *nremoved)
1146 {
1147         /* assumes h->devlock is held */
1148         int i;
1149         struct hpsa_scsi_dev_t *sd;
1150
1151         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1152
1153         sd = h->dev[entry];
1154         removed[*nremoved] = h->dev[entry];
1155         (*nremoved)++;
1156
1157         for (i = entry; i < h->ndevices-1; i++)
1158                 h->dev[i] = h->dev[i+1];
1159         h->ndevices--;
1160         hpsa_show_dev_msg(KERN_INFO, h, sd, "removed");
1161 }
1162
1163 #define SCSI3ADDR_EQ(a, b) ( \
1164         (a)[7] == (b)[7] && \
1165         (a)[6] == (b)[6] && \
1166         (a)[5] == (b)[5] && \
1167         (a)[4] == (b)[4] && \
1168         (a)[3] == (b)[3] && \
1169         (a)[2] == (b)[2] && \
1170         (a)[1] == (b)[1] && \
1171         (a)[0] == (b)[0])
1172
1173 static void fixup_botched_add(struct ctlr_info *h,
1174         struct hpsa_scsi_dev_t *added)
1175 {
1176         /* called when scsi_add_device fails in order to re-adjust
1177          * h->dev[] to match the mid layer's view.
1178          */
1179         unsigned long flags;
1180         int i, j;
1181
1182         spin_lock_irqsave(&h->lock, flags);
1183         for (i = 0; i < h->ndevices; i++) {
1184                 if (h->dev[i] == added) {
1185                         for (j = i; j < h->ndevices-1; j++)
1186                                 h->dev[j] = h->dev[j+1];
1187                         h->ndevices--;
1188                         break;
1189                 }
1190         }
1191         spin_unlock_irqrestore(&h->lock, flags);
1192         kfree(added);
1193 }
1194
1195 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1196         struct hpsa_scsi_dev_t *dev2)
1197 {
1198         /* we compare everything except lun and target as these
1199          * are not yet assigned.  Compare parts likely
1200          * to differ first
1201          */
1202         if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1203                 sizeof(dev1->scsi3addr)) != 0)
1204                 return 0;
1205         if (memcmp(dev1->device_id, dev2->device_id,
1206                 sizeof(dev1->device_id)) != 0)
1207                 return 0;
1208         if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1209                 return 0;
1210         if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1211                 return 0;
1212         if (dev1->devtype != dev2->devtype)
1213                 return 0;
1214         if (dev1->bus != dev2->bus)
1215                 return 0;
1216         return 1;
1217 }
1218
1219 static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1220         struct hpsa_scsi_dev_t *dev2)
1221 {
1222         /* Device attributes that can change, but don't mean
1223          * that the device is a different device, nor that the OS
1224          * needs to be told anything about the change.
1225          */
1226         if (dev1->raid_level != dev2->raid_level)
1227                 return 1;
1228         if (dev1->offload_config != dev2->offload_config)
1229                 return 1;
1230         if (dev1->offload_enabled != dev2->offload_enabled)
1231                 return 1;
1232         if (dev1->queue_depth != dev2->queue_depth)
1233                 return 1;
1234         return 0;
1235 }
1236
1237 /* Find needle in haystack.  If exact match found, return DEVICE_SAME,
1238  * and return needle location in *index.  If scsi3addr matches, but not
1239  * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1240  * location in *index.
1241  * In the case of a minor device attribute change, such as RAID level, just
1242  * return DEVICE_UPDATED, along with the updated device's location in index.
1243  * If needle not found, return DEVICE_NOT_FOUND.
1244  */
1245 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1246         struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1247         int *index)
1248 {
1249         int i;
1250 #define DEVICE_NOT_FOUND 0
1251 #define DEVICE_CHANGED 1
1252 #define DEVICE_SAME 2
1253 #define DEVICE_UPDATED 3
1254         for (i = 0; i < haystack_size; i++) {
1255                 if (haystack[i] == NULL) /* previously removed. */
1256                         continue;
1257                 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1258                         *index = i;
1259                         if (device_is_the_same(needle, haystack[i])) {
1260                                 if (device_updated(needle, haystack[i]))
1261                                         return DEVICE_UPDATED;
1262                                 return DEVICE_SAME;
1263                         } else {
1264                                 /* Keep offline devices offline */
1265                                 if (needle->volume_offline)
1266                                         return DEVICE_NOT_FOUND;
1267                                 return DEVICE_CHANGED;
1268                         }
1269                 }
1270         }
1271         *index = -1;
1272         return DEVICE_NOT_FOUND;
1273 }
1274
1275 static void hpsa_monitor_offline_device(struct ctlr_info *h,
1276                                         unsigned char scsi3addr[])
1277 {
1278         struct offline_device_entry *device;
1279         unsigned long flags;
1280
1281         /* Check to see if device is already on the list */
1282         spin_lock_irqsave(&h->offline_device_lock, flags);
1283         list_for_each_entry(device, &h->offline_device_list, offline_list) {
1284                 if (memcmp(device->scsi3addr, scsi3addr,
1285                         sizeof(device->scsi3addr)) == 0) {
1286                         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1287                         return;
1288                 }
1289         }
1290         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1291
1292         /* Device is not on the list, add it. */
1293         device = kmalloc(sizeof(*device), GFP_KERNEL);
1294         if (!device) {
1295                 dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__);
1296                 return;
1297         }
1298         memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
1299         spin_lock_irqsave(&h->offline_device_lock, flags);
1300         list_add_tail(&device->offline_list, &h->offline_device_list);
1301         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1302 }
1303
1304 /* Print a message explaining various offline volume states */
1305 static void hpsa_show_volume_status(struct ctlr_info *h,
1306         struct hpsa_scsi_dev_t *sd)
1307 {
1308         if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
1309                 dev_info(&h->pdev->dev,
1310                         "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
1311                         h->scsi_host->host_no,
1312                         sd->bus, sd->target, sd->lun);
1313         switch (sd->volume_offline) {
1314         case HPSA_LV_OK:
1315                 break;
1316         case HPSA_LV_UNDERGOING_ERASE:
1317                 dev_info(&h->pdev->dev,
1318                         "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
1319                         h->scsi_host->host_no,
1320                         sd->bus, sd->target, sd->lun);
1321                 break;
1322         case HPSA_LV_UNDERGOING_RPI:
1323                 dev_info(&h->pdev->dev,
1324                         "C%d:B%d:T%d:L%d Volume is undergoing rapid parity initialization process.\n",
1325                         h->scsi_host->host_no,
1326                         sd->bus, sd->target, sd->lun);
1327                 break;
1328         case HPSA_LV_PENDING_RPI:
1329                 dev_info(&h->pdev->dev,
1330                                 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
1331                                 h->scsi_host->host_no,
1332                                 sd->bus, sd->target, sd->lun);
1333                 break;
1334         case HPSA_LV_ENCRYPTED_NO_KEY:
1335                 dev_info(&h->pdev->dev,
1336                         "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
1337                         h->scsi_host->host_no,
1338                         sd->bus, sd->target, sd->lun);
1339                 break;
1340         case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
1341                 dev_info(&h->pdev->dev,
1342                         "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
1343                         h->scsi_host->host_no,
1344                         sd->bus, sd->target, sd->lun);
1345                 break;
1346         case HPSA_LV_UNDERGOING_ENCRYPTION:
1347                 dev_info(&h->pdev->dev,
1348                         "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
1349                         h->scsi_host->host_no,
1350                         sd->bus, sd->target, sd->lun);
1351                 break;
1352         case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
1353                 dev_info(&h->pdev->dev,
1354                         "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
1355                         h->scsi_host->host_no,
1356                         sd->bus, sd->target, sd->lun);
1357                 break;
1358         case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1359                 dev_info(&h->pdev->dev,
1360                         "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
1361                         h->scsi_host->host_no,
1362                         sd->bus, sd->target, sd->lun);
1363                 break;
1364         case HPSA_LV_PENDING_ENCRYPTION:
1365                 dev_info(&h->pdev->dev,
1366                         "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
1367                         h->scsi_host->host_no,
1368                         sd->bus, sd->target, sd->lun);
1369                 break;
1370         case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
1371                 dev_info(&h->pdev->dev,
1372                         "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
1373                         h->scsi_host->host_no,
1374                         sd->bus, sd->target, sd->lun);
1375                 break;
1376         }
1377 }
1378
1379 /*
1380  * Figure the list of physical drive pointers for a logical drive with
1381  * raid offload configured.
1382  */
1383 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
1384                                 struct hpsa_scsi_dev_t *dev[], int ndevices,
1385                                 struct hpsa_scsi_dev_t *logical_drive)
1386 {
1387         struct raid_map_data *map = &logical_drive->raid_map;
1388         struct raid_map_disk_data *dd = &map->data[0];
1389         int i, j;
1390         int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
1391                                 le16_to_cpu(map->metadata_disks_per_row);
1392         int nraid_map_entries = le16_to_cpu(map->row_cnt) *
1393                                 le16_to_cpu(map->layout_map_count) *
1394                                 total_disks_per_row;
1395         int nphys_disk = le16_to_cpu(map->layout_map_count) *
1396                                 total_disks_per_row;
1397         int qdepth;
1398
1399         if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
1400                 nraid_map_entries = RAID_MAP_MAX_ENTRIES;
1401
1402         qdepth = 0;
1403         for (i = 0; i < nraid_map_entries; i++) {
1404                 logical_drive->phys_disk[i] = NULL;
1405                 if (!logical_drive->offload_config)
1406                         continue;
1407                 for (j = 0; j < ndevices; j++) {
1408                         if (dev[j]->devtype != TYPE_DISK)
1409                                 continue;
1410                         if (is_logical_dev_addr_mode(dev[j]->scsi3addr))
1411                                 continue;
1412                         if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
1413                                 continue;
1414
1415                         logical_drive->phys_disk[i] = dev[j];
1416                         if (i < nphys_disk)
1417                                 qdepth = min(h->nr_cmds, qdepth +
1418                                     logical_drive->phys_disk[i]->queue_depth);
1419                         break;
1420                 }
1421
1422                 /*
1423                  * This can happen if a physical drive is removed and
1424                  * the logical drive is degraded.  In that case, the RAID
1425                  * map data will refer to a physical disk which isn't actually
1426                  * present.  And in that case offload_enabled should already
1427                  * be 0, but we'll turn it off here just in case
1428                  */
1429                 if (!logical_drive->phys_disk[i]) {
1430                         logical_drive->offload_enabled = 0;
1431                         logical_drive->offload_to_be_enabled = 0;
1432                         logical_drive->queue_depth = 8;
1433                 }
1434         }
1435         if (nraid_map_entries)
1436                 /*
1437                  * This is correct for reads, too high for full stripe writes,
1438                  * way too high for partial stripe writes
1439                  */
1440                 logical_drive->queue_depth = qdepth;
1441         else
1442                 logical_drive->queue_depth = h->nr_cmds;
1443 }
1444
1445 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
1446                                 struct hpsa_scsi_dev_t *dev[], int ndevices)
1447 {
1448         int i;
1449
1450         for (i = 0; i < ndevices; i++) {
1451                 if (dev[i]->devtype != TYPE_DISK)
1452                         continue;
1453                 if (!is_logical_dev_addr_mode(dev[i]->scsi3addr))
1454                         continue;
1455
1456                 /*
1457                  * If offload is currently enabled, the RAID map and
1458                  * phys_disk[] assignment *better* not be changing
1459                  * and since it isn't changing, we do not need to
1460                  * update it.
1461                  */
1462                 if (dev[i]->offload_enabled)
1463                         continue;
1464
1465                 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
1466         }
1467 }
1468
1469 static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
1470         struct hpsa_scsi_dev_t *sd[], int nsds)
1471 {
1472         /* sd contains scsi3 addresses and devtypes, and inquiry
1473          * data.  This function takes what's in sd to be the current
1474          * reality and updates h->dev[] to reflect that reality.
1475          */
1476         int i, entry, device_change, changes = 0;
1477         struct hpsa_scsi_dev_t *csd;
1478         unsigned long flags;
1479         struct hpsa_scsi_dev_t **added, **removed;
1480         int nadded, nremoved;
1481         struct Scsi_Host *sh = NULL;
1482
1483         added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
1484         removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
1485
1486         if (!added || !removed) {
1487                 dev_warn(&h->pdev->dev, "out of memory in "
1488                         "adjust_hpsa_scsi_table\n");
1489                 goto free_and_out;
1490         }
1491
1492         spin_lock_irqsave(&h->devlock, flags);
1493
1494         /* find any devices in h->dev[] that are not in
1495          * sd[] and remove them from h->dev[], and for any
1496          * devices which have changed, remove the old device
1497          * info and add the new device info.
1498          * If minor device attributes change, just update
1499          * the existing device structure.
1500          */
1501         i = 0;
1502         nremoved = 0;
1503         nadded = 0;
1504         while (i < h->ndevices) {
1505                 csd = h->dev[i];
1506                 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1507                 if (device_change == DEVICE_NOT_FOUND) {
1508                         changes++;
1509                         hpsa_scsi_remove_entry(h, hostno, i,
1510                                 removed, &nremoved);
1511                         continue; /* remove ^^^, hence i not incremented */
1512                 } else if (device_change == DEVICE_CHANGED) {
1513                         changes++;
1514                         hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
1515                                 added, &nadded, removed, &nremoved);
1516                         /* Set it to NULL to prevent it from being freed
1517                          * at the bottom of hpsa_update_scsi_devices()
1518                          */
1519                         sd[entry] = NULL;
1520                 } else if (device_change == DEVICE_UPDATED) {
1521                         hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
1522                 }
1523                 i++;
1524         }
1525
1526         /* Now, make sure every device listed in sd[] is also
1527          * listed in h->dev[], adding them if they aren't found
1528          */
1529
1530         for (i = 0; i < nsds; i++) {
1531                 if (!sd[i]) /* if already added above. */
1532                         continue;
1533
1534                 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS
1535                  * as the SCSI mid-layer does not handle such devices well.
1536                  * It relentlessly loops sending TUR at 3Hz, then READ(10)
1537                  * at 160Hz, and prevents the system from coming up.
1538                  */
1539                 if (sd[i]->volume_offline) {
1540                         hpsa_show_volume_status(h, sd[i]);
1541                         hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline");
1542                         continue;
1543                 }
1544
1545                 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1546                                         h->ndevices, &entry);
1547                 if (device_change == DEVICE_NOT_FOUND) {
1548                         changes++;
1549                         if (hpsa_scsi_add_entry(h, hostno, sd[i],
1550                                 added, &nadded) != 0)
1551                                 break;
1552                         sd[i] = NULL; /* prevent from being freed later. */
1553                 } else if (device_change == DEVICE_CHANGED) {
1554                         /* should never happen... */
1555                         changes++;
1556                         dev_warn(&h->pdev->dev,
1557                                 "device unexpectedly changed.\n");
1558                         /* but if it does happen, we just ignore that device */
1559                 }
1560         }
1561         hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices);
1562
1563         /* Now that h->dev[]->phys_disk[] is coherent, we can enable
1564          * any logical drives that need it enabled.
1565          */
1566         for (i = 0; i < h->ndevices; i++)
1567                 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled;
1568
1569         spin_unlock_irqrestore(&h->devlock, flags);
1570
1571         /* Monitor devices which are in one of several NOT READY states to be
1572          * brought online later. This must be done without holding h->devlock,
1573          * so don't touch h->dev[]
1574          */
1575         for (i = 0; i < nsds; i++) {
1576                 if (!sd[i]) /* if already added above. */
1577                         continue;
1578                 if (sd[i]->volume_offline)
1579                         hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
1580         }
1581
1582         /* Don't notify scsi mid layer of any changes the first time through
1583          * (or if there are no changes) scsi_scan_host will do it later the
1584          * first time through.
1585          */
1586         if (hostno == -1 || !changes)
1587                 goto free_and_out;
1588
1589         sh = h->scsi_host;
1590         /* Notify scsi mid layer of any removed devices */
1591         for (i = 0; i < nremoved; i++) {
1592                 if (removed[i]->expose_state & HPSA_SCSI_ADD) {
1593                         struct scsi_device *sdev =
1594                                 scsi_device_lookup(sh, removed[i]->bus,
1595                                         removed[i]->target, removed[i]->lun);
1596                         if (sdev != NULL) {
1597                                 scsi_remove_device(sdev);
1598                                 scsi_device_put(sdev);
1599                         } else {
1600                                 /*
1601                                  * We don't expect to get here.
1602                                  * future cmds to this device will get selection
1603                                  * timeout as if the device was gone.
1604                                  */
1605                                 hpsa_show_dev_msg(KERN_WARNING, h, removed[i],
1606                                         "didn't find device for removal.");
1607                         }
1608                 }
1609                 kfree(removed[i]);
1610                 removed[i] = NULL;
1611         }
1612
1613         /* Notify scsi mid layer of any added devices */
1614         for (i = 0; i < nadded; i++) {
1615                 if (!(added[i]->expose_state & HPSA_SCSI_ADD))
1616                         continue;
1617                 if (scsi_add_device(sh, added[i]->bus,
1618                         added[i]->target, added[i]->lun) == 0)
1619                         continue;
1620                 hpsa_show_dev_msg(KERN_WARNING, h, added[i],
1621                                         "addition failed, device not added.");
1622                 /* now we have to remove it from h->dev,
1623                  * since it didn't get added to scsi mid layer
1624                  */
1625                 fixup_botched_add(h, added[i]);
1626         }
1627
1628 free_and_out:
1629         kfree(added);
1630         kfree(removed);
1631 }
1632
1633 /*
1634  * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
1635  * Assume's h->devlock is held.
1636  */
1637 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1638         int bus, int target, int lun)
1639 {
1640         int i;
1641         struct hpsa_scsi_dev_t *sd;
1642
1643         for (i = 0; i < h->ndevices; i++) {
1644                 sd = h->dev[i];
1645                 if (sd->bus == bus && sd->target == target && sd->lun == lun)
1646                         return sd;
1647         }
1648         return NULL;
1649 }
1650
1651 static int hpsa_slave_alloc(struct scsi_device *sdev)
1652 {
1653         struct hpsa_scsi_dev_t *sd;
1654         unsigned long flags;
1655         struct ctlr_info *h;
1656
1657         h = sdev_to_hba(sdev);
1658         spin_lock_irqsave(&h->devlock, flags);
1659         sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
1660                 sdev_id(sdev), sdev->lun);
1661         if (likely(sd)) {
1662                 atomic_set(&sd->ioaccel_cmds_out, 0);
1663                 sdev->hostdata = (sd->expose_state & HPSA_SCSI_ADD) ? sd : NULL;
1664         } else
1665                 sdev->hostdata = NULL;
1666         spin_unlock_irqrestore(&h->devlock, flags);
1667         return 0;
1668 }
1669
1670 /* configure scsi device based on internal per-device structure */
1671 static int hpsa_slave_configure(struct scsi_device *sdev)
1672 {
1673         struct hpsa_scsi_dev_t *sd;
1674         int queue_depth;
1675
1676         sd = sdev->hostdata;
1677         sdev->no_uld_attach = !sd || !(sd->expose_state & HPSA_ULD_ATTACH);
1678
1679         if (sd)
1680                 queue_depth = sd->queue_depth != 0 ?
1681                         sd->queue_depth : sdev->host->can_queue;
1682         else
1683                 queue_depth = sdev->host->can_queue;
1684
1685         scsi_change_queue_depth(sdev, queue_depth);
1686
1687         return 0;
1688 }
1689
1690 static void hpsa_slave_destroy(struct scsi_device *sdev)
1691 {
1692         /* nothing to do. */
1693 }
1694
1695 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
1696 {
1697         int i;
1698
1699         if (!h->cmd_sg_list)
1700                 return;
1701         for (i = 0; i < h->nr_cmds; i++) {
1702                 kfree(h->cmd_sg_list[i]);
1703                 h->cmd_sg_list[i] = NULL;
1704         }
1705         kfree(h->cmd_sg_list);
1706         h->cmd_sg_list = NULL;
1707 }
1708
1709 static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
1710 {
1711         int i;
1712
1713         if (h->chainsize <= 0)
1714                 return 0;
1715
1716         h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
1717                                 GFP_KERNEL);
1718         if (!h->cmd_sg_list) {
1719                 dev_err(&h->pdev->dev, "Failed to allocate SG list\n");
1720                 return -ENOMEM;
1721         }
1722         for (i = 0; i < h->nr_cmds; i++) {
1723                 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
1724                                                 h->chainsize, GFP_KERNEL);
1725                 if (!h->cmd_sg_list[i]) {
1726                         dev_err(&h->pdev->dev, "Failed to allocate cmd SG\n");
1727                         goto clean;
1728                 }
1729         }
1730         return 0;
1731
1732 clean:
1733         hpsa_free_sg_chain_blocks(h);
1734         return -ENOMEM;
1735 }
1736
1737 static int hpsa_map_sg_chain_block(struct ctlr_info *h,
1738         struct CommandList *c)
1739 {
1740         struct SGDescriptor *chain_sg, *chain_block;
1741         u64 temp64;
1742         u32 chain_len;
1743
1744         chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1745         chain_block = h->cmd_sg_list[c->cmdindex];
1746         chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
1747         chain_len = sizeof(*chain_sg) *
1748                 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
1749         chain_sg->Len = cpu_to_le32(chain_len);
1750         temp64 = pci_map_single(h->pdev, chain_block, chain_len,
1751                                 PCI_DMA_TODEVICE);
1752         if (dma_mapping_error(&h->pdev->dev, temp64)) {
1753                 /* prevent subsequent unmapping */
1754                 chain_sg->Addr = cpu_to_le64(0);
1755                 return -1;
1756         }
1757         chain_sg->Addr = cpu_to_le64(temp64);
1758         return 0;
1759 }
1760
1761 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
1762         struct CommandList *c)
1763 {
1764         struct SGDescriptor *chain_sg;
1765
1766         if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
1767                 return;
1768
1769         chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1770         pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr),
1771                         le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE);
1772 }
1773
1774
1775 /* Decode the various types of errors on ioaccel2 path.
1776  * Return 1 for any error that should generate a RAID path retry.
1777  * Return 0 for errors that don't require a RAID path retry.
1778  */
1779 static int handle_ioaccel_mode2_error(struct ctlr_info *h,
1780                                         struct CommandList *c,
1781                                         struct scsi_cmnd *cmd,
1782                                         struct io_accel2_cmd *c2)
1783 {
1784         int data_len;
1785         int retry = 0;
1786
1787         switch (c2->error_data.serv_response) {
1788         case IOACCEL2_SERV_RESPONSE_COMPLETE:
1789                 switch (c2->error_data.status) {
1790                 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
1791                         break;
1792                 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
1793                         dev_warn(&h->pdev->dev,
1794                                 "%s: task complete with check condition.\n",
1795                                 "HP SSD Smart Path");
1796                         cmd->result |= SAM_STAT_CHECK_CONDITION;
1797                         if (c2->error_data.data_present !=
1798                                         IOACCEL2_SENSE_DATA_PRESENT) {
1799                                 memset(cmd->sense_buffer, 0,
1800                                         SCSI_SENSE_BUFFERSIZE);
1801                                 break;
1802                         }
1803                         /* copy the sense data */
1804                         data_len = c2->error_data.sense_data_len;
1805                         if (data_len > SCSI_SENSE_BUFFERSIZE)
1806                                 data_len = SCSI_SENSE_BUFFERSIZE;
1807                         if (data_len > sizeof(c2->error_data.sense_data_buff))
1808                                 data_len =
1809                                         sizeof(c2->error_data.sense_data_buff);
1810                         memcpy(cmd->sense_buffer,
1811                                 c2->error_data.sense_data_buff, data_len);
1812                         retry = 1;
1813                         break;
1814                 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
1815                         dev_warn(&h->pdev->dev,
1816                                 "%s: task complete with BUSY status.\n",
1817                                 "HP SSD Smart Path");
1818                         retry = 1;
1819                         break;
1820                 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
1821                         dev_warn(&h->pdev->dev,
1822                                 "%s: task complete with reservation conflict.\n",
1823                                 "HP SSD Smart Path");
1824                         retry = 1;
1825                         break;
1826                 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
1827                         retry = 1;
1828                         break;
1829                 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
1830                         dev_warn(&h->pdev->dev,
1831                                 "%s: task complete with aborted status.\n",
1832                                 "HP SSD Smart Path");
1833                         retry = 1;
1834                         break;
1835                 default:
1836                         dev_warn(&h->pdev->dev,
1837                                 "%s: task complete with unrecognized status: 0x%02x\n",
1838                                 "HP SSD Smart Path", c2->error_data.status);
1839                         retry = 1;
1840                         break;
1841                 }
1842                 break;
1843         case IOACCEL2_SERV_RESPONSE_FAILURE:
1844                 /* don't expect to get here. */
1845                 dev_warn(&h->pdev->dev,
1846                         "unexpected delivery or target failure, status = 0x%02x\n",
1847                         c2->error_data.status);
1848                 retry = 1;
1849                 break;
1850         case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
1851                 break;
1852         case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
1853                 break;
1854         case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
1855                 dev_warn(&h->pdev->dev, "task management function rejected.\n");
1856                 retry = 1;
1857                 break;
1858         case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
1859                 dev_warn(&h->pdev->dev, "task management function invalid LUN\n");
1860                 break;
1861         default:
1862                 dev_warn(&h->pdev->dev,
1863                         "%s: Unrecognized server response: 0x%02x\n",
1864                         "HP SSD Smart Path",
1865                         c2->error_data.serv_response);
1866                 retry = 1;
1867                 break;
1868         }
1869
1870         return retry;   /* retry on raid path? */
1871 }
1872
1873 static void process_ioaccel2_completion(struct ctlr_info *h,
1874                 struct CommandList *c, struct scsi_cmnd *cmd,
1875                 struct hpsa_scsi_dev_t *dev)
1876 {
1877         struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
1878
1879         /* check for good status */
1880         if (likely(c2->error_data.serv_response == 0 &&
1881                         c2->error_data.status == 0)) {
1882                 cmd_free(h, c);
1883                 cmd->scsi_done(cmd);
1884                 return;
1885         }
1886
1887         /* Any RAID offload error results in retry which will use
1888          * the normal I/O path so the controller can handle whatever's
1889          * wrong.
1890          */
1891         if (is_logical_dev_addr_mode(dev->scsi3addr) &&
1892                 c2->error_data.serv_response ==
1893                         IOACCEL2_SERV_RESPONSE_FAILURE) {
1894                 if (c2->error_data.status ==
1895                         IOACCEL2_STATUS_SR_IOACCEL_DISABLED)
1896                         dev->offload_enabled = 0;
1897                 goto retry_cmd;
1898         }
1899
1900         if (handle_ioaccel_mode2_error(h, c, cmd, c2))
1901                 goto retry_cmd;
1902
1903         cmd_free(h, c);
1904         cmd->scsi_done(cmd);
1905         return;
1906
1907 retry_cmd:
1908         INIT_WORK(&c->work, hpsa_command_resubmit_worker);
1909         queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
1910 }
1911
1912 /* Returns 0 on success, < 0 otherwise. */
1913 static int hpsa_evaluate_tmf_status(struct ctlr_info *h,
1914                                         struct CommandList *cp)
1915 {
1916         u8 tmf_status = cp->err_info->ScsiStatus;
1917
1918         switch (tmf_status) {
1919         case CISS_TMF_COMPLETE:
1920                 /*
1921                  * CISS_TMF_COMPLETE never happens, instead,
1922                  * ei->CommandStatus == 0 for this case.
1923                  */
1924         case CISS_TMF_SUCCESS:
1925                 return 0;
1926         case CISS_TMF_INVALID_FRAME:
1927         case CISS_TMF_NOT_SUPPORTED:
1928         case CISS_TMF_FAILED:
1929         case CISS_TMF_WRONG_LUN:
1930         case CISS_TMF_OVERLAPPED_TAG:
1931                 break;
1932         default:
1933                 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n",
1934                                 tmf_status);
1935                 break;
1936         }
1937         return -tmf_status;
1938 }
1939
1940 static void complete_scsi_command(struct CommandList *cp)
1941 {
1942         struct scsi_cmnd *cmd;
1943         struct ctlr_info *h;
1944         struct ErrorInfo *ei;
1945         struct hpsa_scsi_dev_t *dev;
1946
1947         u8 sense_key;
1948         u8 asc;      /* additional sense code */
1949         u8 ascq;     /* additional sense code qualifier */
1950         unsigned long sense_data_size;
1951
1952         ei = cp->err_info;
1953         cmd = cp->scsi_cmd;
1954         h = cp->h;
1955         dev = cmd->device->hostdata;
1956
1957         scsi_dma_unmap(cmd); /* undo the DMA mappings */
1958         if ((cp->cmd_type == CMD_SCSI) &&
1959                 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
1960                 hpsa_unmap_sg_chain_block(h, cp);
1961
1962         cmd->result = (DID_OK << 16);           /* host byte */
1963         cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
1964
1965         if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1)
1966                 atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
1967
1968         /*
1969          * We check for lockup status here as it may be set for
1970          * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by
1971          * fail_all_oustanding_cmds()
1972          */
1973         if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) {
1974                 /* DID_NO_CONNECT will prevent a retry */
1975                 cmd->result = DID_NO_CONNECT << 16;
1976                 cmd_free(h, cp);
1977                 cmd->scsi_done(cmd);
1978                 return;
1979         }
1980
1981         if (cp->cmd_type == CMD_IOACCEL2)
1982                 return process_ioaccel2_completion(h, cp, cmd, dev);
1983
1984         scsi_set_resid(cmd, ei->ResidualCnt);
1985         if (ei->CommandStatus == 0) {
1986                 if (cp->cmd_type == CMD_IOACCEL1)
1987                         atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
1988                 cmd_free(h, cp);
1989                 cmd->scsi_done(cmd);
1990                 return;
1991         }
1992
1993         /* For I/O accelerator commands, copy over some fields to the normal
1994          * CISS header used below for error handling.
1995          */
1996         if (cp->cmd_type == CMD_IOACCEL1) {
1997                 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
1998                 cp->Header.SGList = scsi_sg_count(cmd);
1999                 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
2000                 cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
2001                         IOACCEL1_IOFLAGS_CDBLEN_MASK;
2002                 cp->Header.tag = c->tag;
2003                 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
2004                 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
2005
2006                 /* Any RAID offload error results in retry which will use
2007                  * the normal I/O path so the controller can handle whatever's
2008                  * wrong.
2009                  */
2010                 if (is_logical_dev_addr_mode(dev->scsi3addr)) {
2011                         if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
2012                                 dev->offload_enabled = 0;
2013                         INIT_WORK(&cp->work, hpsa_command_resubmit_worker);
2014                         queue_work_on(raw_smp_processor_id(),
2015                                         h->resubmit_wq, &cp->work);
2016                         return;
2017                 }
2018         }
2019
2020         /* an error has occurred */
2021         switch (ei->CommandStatus) {
2022
2023         case CMD_TARGET_STATUS:
2024                 cmd->result |= ei->ScsiStatus;
2025                 /* copy the sense data */
2026                 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
2027                         sense_data_size = SCSI_SENSE_BUFFERSIZE;
2028                 else
2029                         sense_data_size = sizeof(ei->SenseInfo);
2030                 if (ei->SenseLen < sense_data_size)
2031                         sense_data_size = ei->SenseLen;
2032                 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
2033                 if (ei->ScsiStatus)
2034                         decode_sense_data(ei->SenseInfo, sense_data_size,
2035                                 &sense_key, &asc, &ascq);
2036                 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
2037                         if (sense_key == ABORTED_COMMAND) {
2038                                 cmd->result |= DID_SOFT_ERROR << 16;
2039                                 break;
2040                         }
2041                         break;
2042                 }
2043                 /* Problem was not a check condition
2044                  * Pass it up to the upper layers...
2045                  */
2046                 if (ei->ScsiStatus) {
2047                         dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
2048                                 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
2049                                 "Returning result: 0x%x\n",
2050                                 cp, ei->ScsiStatus,
2051                                 sense_key, asc, ascq,
2052                                 cmd->result);
2053                 } else {  /* scsi status is zero??? How??? */
2054                         dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
2055                                 "Returning no connection.\n", cp),
2056
2057                         /* Ordinarily, this case should never happen,
2058                          * but there is a bug in some released firmware
2059                          * revisions that allows it to happen if, for
2060                          * example, a 4100 backplane loses power and
2061                          * the tape drive is in it.  We assume that
2062                          * it's a fatal error of some kind because we
2063                          * can't show that it wasn't. We will make it
2064                          * look like selection timeout since that is
2065                          * the most common reason for this to occur,
2066                          * and it's severe enough.
2067                          */
2068
2069                         cmd->result = DID_NO_CONNECT << 16;
2070                 }
2071                 break;
2072
2073         case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2074                 break;
2075         case CMD_DATA_OVERRUN:
2076                 dev_warn(&h->pdev->dev,
2077                         "CDB %16phN data overrun\n", cp->Request.CDB);
2078                 break;
2079         case CMD_INVALID: {
2080                 /* print_bytes(cp, sizeof(*cp), 1, 0);
2081                 print_cmd(cp); */
2082                 /* We get CMD_INVALID if you address a non-existent device
2083                  * instead of a selection timeout (no response).  You will
2084                  * see this if you yank out a drive, then try to access it.
2085                  * This is kind of a shame because it means that any other
2086                  * CMD_INVALID (e.g. driver bug) will get interpreted as a
2087                  * missing target. */
2088                 cmd->result = DID_NO_CONNECT << 16;
2089         }
2090                 break;
2091         case CMD_PROTOCOL_ERR:
2092                 cmd->result = DID_ERROR << 16;
2093                 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
2094                                 cp->Request.CDB);
2095                 break;
2096         case CMD_HARDWARE_ERR:
2097                 cmd->result = DID_ERROR << 16;
2098                 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
2099                         cp->Request.CDB);
2100                 break;
2101         case CMD_CONNECTION_LOST:
2102                 cmd->result = DID_ERROR << 16;
2103                 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
2104                         cp->Request.CDB);
2105                 break;
2106         case CMD_ABORTED:
2107                 cmd->result = DID_ABORT << 16;
2108                 dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n",
2109                                 cp->Request.CDB, ei->ScsiStatus);
2110                 break;
2111         case CMD_ABORT_FAILED:
2112                 cmd->result = DID_ERROR << 16;
2113                 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
2114                         cp->Request.CDB);
2115                 break;
2116         case CMD_UNSOLICITED_ABORT:
2117                 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
2118                 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
2119                         cp->Request.CDB);
2120                 break;
2121         case CMD_TIMEOUT:
2122                 cmd->result = DID_TIME_OUT << 16;
2123                 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
2124                         cp->Request.CDB);
2125                 break;
2126         case CMD_UNABORTABLE:
2127                 cmd->result = DID_ERROR << 16;
2128                 dev_warn(&h->pdev->dev, "Command unabortable\n");
2129                 break;
2130         case CMD_TMF_STATUS:
2131                 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */
2132                         cmd->result = DID_ERROR << 16;
2133                 break;
2134         case CMD_IOACCEL_DISABLED:
2135                 /* This only handles the direct pass-through case since RAID
2136                  * offload is handled above.  Just attempt a retry.
2137                  */
2138                 cmd->result = DID_SOFT_ERROR << 16;
2139                 dev_warn(&h->pdev->dev,
2140                                 "cp %p had HP SSD Smart Path error\n", cp);
2141                 break;
2142         default:
2143                 cmd->result = DID_ERROR << 16;
2144                 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
2145                                 cp, ei->CommandStatus);
2146         }
2147         cmd_free(h, cp);
2148         cmd->scsi_done(cmd);
2149 }
2150
2151 static void hpsa_pci_unmap(struct pci_dev *pdev,
2152         struct CommandList *c, int sg_used, int data_direction)
2153 {
2154         int i;
2155
2156         for (i = 0; i < sg_used; i++)
2157                 pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr),
2158                                 le32_to_cpu(c->SG[i].Len),
2159                                 data_direction);
2160 }
2161
2162 static int hpsa_map_one(struct pci_dev *pdev,
2163                 struct CommandList *cp,
2164                 unsigned char *buf,
2165                 size_t buflen,
2166                 int data_direction)
2167 {
2168         u64 addr64;
2169
2170         if (buflen == 0 || data_direction == PCI_DMA_NONE) {
2171                 cp->Header.SGList = 0;
2172                 cp->Header.SGTotal = cpu_to_le16(0);
2173                 return 0;
2174         }
2175
2176         addr64 = pci_map_single(pdev, buf, buflen, data_direction);
2177         if (dma_mapping_error(&pdev->dev, addr64)) {
2178                 /* Prevent subsequent unmap of something never mapped */
2179                 cp->Header.SGList = 0;
2180                 cp->Header.SGTotal = cpu_to_le16(0);
2181                 return -1;
2182         }
2183         cp->SG[0].Addr = cpu_to_le64(addr64);
2184         cp->SG[0].Len = cpu_to_le32(buflen);
2185         cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
2186         cp->Header.SGList = 1;   /* no. SGs contig in this cmd */
2187         cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
2188         return 0;
2189 }
2190
2191 #define NO_TIMEOUT ((unsigned long) -1)
2192 #define DEFAULT_TIMEOUT 30000 /* milliseconds */
2193 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
2194         struct CommandList *c, int reply_queue, unsigned long timeout_msecs)
2195 {
2196         DECLARE_COMPLETION_ONSTACK(wait);
2197
2198         c->waiting = &wait;
2199         __enqueue_cmd_and_start_io(h, c, reply_queue);
2200         if (timeout_msecs == NO_TIMEOUT) {
2201                 /* TODO: get rid of this no-timeout thing */
2202                 wait_for_completion_io(&wait);
2203                 return IO_OK;
2204         }
2205         if (!wait_for_completion_io_timeout(&wait,
2206                                         msecs_to_jiffies(timeout_msecs))) {
2207                 dev_warn(&h->pdev->dev, "Command timed out.\n");
2208                 return -ETIMEDOUT;
2209         }
2210         return IO_OK;
2211 }
2212
2213 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c,
2214                                    int reply_queue, unsigned long timeout_msecs)
2215 {
2216         if (unlikely(lockup_detected(h))) {
2217                 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
2218                 return IO_OK;
2219         }
2220         return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs);
2221 }
2222
2223 static u32 lockup_detected(struct ctlr_info *h)
2224 {
2225         int cpu;
2226         u32 rc, *lockup_detected;
2227
2228         cpu = get_cpu();
2229         lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
2230         rc = *lockup_detected;
2231         put_cpu();
2232         return rc;
2233 }
2234
2235 #define MAX_DRIVER_CMD_RETRIES 25
2236 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
2237         struct CommandList *c, int data_direction, unsigned long timeout_msecs)
2238 {
2239         int backoff_time = 10, retry_count = 0;
2240         int rc;
2241
2242         do {
2243                 memset(c->err_info, 0, sizeof(*c->err_info));
2244                 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
2245                                                   timeout_msecs);
2246                 if (rc)
2247                         break;
2248                 retry_count++;
2249                 if (retry_count > 3) {
2250                         msleep(backoff_time);
2251                         if (backoff_time < 1000)
2252                                 backoff_time *= 2;
2253                 }
2254         } while ((check_for_unit_attention(h, c) ||
2255                         check_for_busy(h, c)) &&
2256                         retry_count <= MAX_DRIVER_CMD_RETRIES);
2257         hpsa_pci_unmap(h->pdev, c, 1, data_direction);
2258         if (retry_count > MAX_DRIVER_CMD_RETRIES)
2259                 rc = -EIO;
2260         return rc;
2261 }
2262
2263 static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2264                                 struct CommandList *c)
2265 {
2266         const u8 *cdb = c->Request.CDB;
2267         const u8 *lun = c->Header.LUN.LunAddrBytes;
2268
2269         dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x"
2270         " CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
2271                 txt, lun[0], lun[1], lun[2], lun[3],
2272                 lun[4], lun[5], lun[6], lun[7],
2273                 cdb[0], cdb[1], cdb[2], cdb[3],
2274                 cdb[4], cdb[5], cdb[6], cdb[7],
2275                 cdb[8], cdb[9], cdb[10], cdb[11],
2276                 cdb[12], cdb[13], cdb[14], cdb[15]);
2277 }
2278
2279 static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2280                         struct CommandList *cp)
2281 {
2282         const struct ErrorInfo *ei = cp->err_info;
2283         struct device *d = &cp->h->pdev->dev;
2284         u8 sense_key, asc, ascq;
2285         int sense_len;
2286
2287         switch (ei->CommandStatus) {
2288         case CMD_TARGET_STATUS:
2289                 if (ei->SenseLen > sizeof(ei->SenseInfo))
2290                         sense_len = sizeof(ei->SenseInfo);
2291                 else
2292                         sense_len = ei->SenseLen;
2293                 decode_sense_data(ei->SenseInfo, sense_len,
2294                                         &sense_key, &asc, &ascq);
2295                 hpsa_print_cmd(h, "SCSI status", cp);
2296                 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
2297                         dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n",
2298                                 sense_key, asc, ascq);
2299                 else
2300                         dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus);
2301                 if (ei->ScsiStatus == 0)
2302                         dev_warn(d, "SCSI status is abnormally zero.  "
2303                         "(probably indicates selection timeout "
2304                         "reported incorrectly due to a known "
2305                         "firmware bug, circa July, 2001.)\n");
2306                 break;
2307         case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2308                 break;
2309         case CMD_DATA_OVERRUN:
2310                 hpsa_print_cmd(h, "overrun condition", cp);
2311                 break;
2312         case CMD_INVALID: {
2313                 /* controller unfortunately reports SCSI passthru's
2314                  * to non-existent targets as invalid commands.
2315                  */
2316                 hpsa_print_cmd(h, "invalid command", cp);
2317                 dev_warn(d, "probably means device no longer present\n");
2318                 }
2319                 break;
2320         case CMD_PROTOCOL_ERR:
2321                 hpsa_print_cmd(h, "protocol error", cp);
2322                 break;
2323         case CMD_HARDWARE_ERR:
2324                 hpsa_print_cmd(h, "hardware error", cp);
2325                 break;
2326         case CMD_CONNECTION_LOST:
2327                 hpsa_print_cmd(h, "connection lost", cp);
2328                 break;
2329         case CMD_ABORTED:
2330                 hpsa_print_cmd(h, "aborted", cp);
2331                 break;
2332         case CMD_ABORT_FAILED:
2333                 hpsa_print_cmd(h, "abort failed", cp);
2334                 break;
2335         case CMD_UNSOLICITED_ABORT:
2336                 hpsa_print_cmd(h, "unsolicited abort", cp);
2337                 break;
2338         case CMD_TIMEOUT:
2339                 hpsa_print_cmd(h, "timed out", cp);
2340                 break;
2341         case CMD_UNABORTABLE:
2342                 hpsa_print_cmd(h, "unabortable", cp);
2343                 break;
2344         case CMD_CTLR_LOCKUP:
2345                 hpsa_print_cmd(h, "controller lockup detected", cp);
2346                 break;
2347         default:
2348                 hpsa_print_cmd(h, "unknown status", cp);
2349                 dev_warn(d, "Unknown command status %x\n",
2350                                 ei->CommandStatus);
2351         }
2352 }
2353
2354 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
2355                         u16 page, unsigned char *buf,
2356                         unsigned char bufsize)
2357 {
2358         int rc = IO_OK;
2359         struct CommandList *c;
2360         struct ErrorInfo *ei;
2361
2362         c = cmd_alloc(h);
2363
2364         if (c == NULL) {
2365                 dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2366                 return -ENOMEM;
2367         }
2368
2369         if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
2370                         page, scsi3addr, TYPE_CMD)) {
2371                 rc = -1;
2372                 goto out;
2373         }
2374         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2375                                         PCI_DMA_FROMDEVICE, NO_TIMEOUT);
2376         if (rc)
2377                 goto out;
2378         ei = c->err_info;
2379         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2380                 hpsa_scsi_interpret_error(h, c);
2381                 rc = -1;
2382         }
2383 out:
2384         cmd_free(h, c);
2385         return rc;
2386 }
2387
2388 static int hpsa_bmic_ctrl_mode_sense(struct ctlr_info *h,
2389                 unsigned char *scsi3addr, unsigned char page,
2390                 struct bmic_controller_parameters *buf, size_t bufsize)
2391 {
2392         int rc = IO_OK;
2393         struct CommandList *c;
2394         struct ErrorInfo *ei;
2395
2396         c = cmd_alloc(h);
2397         if (c == NULL) {                        /* trouble... */
2398                 dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2399                 return -ENOMEM;
2400         }
2401
2402         if (fill_cmd(c, BMIC_SENSE_CONTROLLER_PARAMETERS, h, buf, bufsize,
2403                         page, scsi3addr, TYPE_CMD)) {
2404                 rc = -1;
2405                 goto out;
2406         }
2407         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2408                         PCI_DMA_FROMDEVICE, NO_TIMEOUT);
2409         if (rc)
2410                 goto out;
2411         ei = c->err_info;
2412         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2413                 hpsa_scsi_interpret_error(h, c);
2414                 rc = -1;
2415         }
2416 out:
2417         cmd_free(h, c);
2418         return rc;
2419         }
2420
2421 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr,
2422         u8 reset_type, int reply_queue)
2423 {
2424         int rc = IO_OK;
2425         struct CommandList *c;
2426         struct ErrorInfo *ei;
2427
2428         c = cmd_alloc(h);
2429
2430         if (c == NULL) {                        /* trouble... */
2431                 dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2432                 return -ENOMEM;
2433         }
2434
2435         /* fill_cmd can't fail here, no data buffer to map. */
2436         (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
2437                         scsi3addr, TYPE_MSG);
2438         c->Request.CDB[1] = reset_type; /* fill_cmd defaults to LUN reset */
2439         rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
2440         if (rc) {
2441                 dev_warn(&h->pdev->dev, "Failed to send reset command\n");
2442                 goto out;
2443         }
2444         /* no unmap needed here because no data xfer. */
2445
2446         ei = c->err_info;
2447         if (ei->CommandStatus != 0) {
2448                 hpsa_scsi_interpret_error(h, c);
2449                 rc = -1;
2450         }
2451 out:
2452         cmd_free(h, c);
2453         return rc;
2454 }
2455
2456 static void hpsa_get_raid_level(struct ctlr_info *h,
2457         unsigned char *scsi3addr, unsigned char *raid_level)
2458 {
2459         int rc;
2460         unsigned char *buf;
2461
2462         *raid_level = RAID_UNKNOWN;
2463         buf = kzalloc(64, GFP_KERNEL);
2464         if (!buf)
2465                 return;
2466         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0xC1, buf, 64);
2467         if (rc == 0)
2468                 *raid_level = buf[8];
2469         if (*raid_level > RAID_UNKNOWN)
2470                 *raid_level = RAID_UNKNOWN;
2471         kfree(buf);
2472         return;
2473 }
2474
2475 #define HPSA_MAP_DEBUG
2476 #ifdef HPSA_MAP_DEBUG
2477 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
2478                                 struct raid_map_data *map_buff)
2479 {
2480         struct raid_map_disk_data *dd = &map_buff->data[0];
2481         int map, row, col;
2482         u16 map_cnt, row_cnt, disks_per_row;
2483
2484         if (rc != 0)
2485                 return;
2486
2487         /* Show details only if debugging has been activated. */
2488         if (h->raid_offload_debug < 2)
2489                 return;
2490
2491         dev_info(&h->pdev->dev, "structure_size = %u\n",
2492                                 le32_to_cpu(map_buff->structure_size));
2493         dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
2494                         le32_to_cpu(map_buff->volume_blk_size));
2495         dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
2496                         le64_to_cpu(map_buff->volume_blk_cnt));
2497         dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
2498                         map_buff->phys_blk_shift);
2499         dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
2500                         map_buff->parity_rotation_shift);
2501         dev_info(&h->pdev->dev, "strip_size = %u\n",
2502                         le16_to_cpu(map_buff->strip_size));
2503         dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
2504                         le64_to_cpu(map_buff->disk_starting_blk));
2505         dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
2506                         le64_to_cpu(map_buff->disk_blk_cnt));
2507         dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
2508                         le16_to_cpu(map_buff->data_disks_per_row));
2509         dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
2510                         le16_to_cpu(map_buff->metadata_disks_per_row));
2511         dev_info(&h->pdev->dev, "row_cnt = %u\n",
2512                         le16_to_cpu(map_buff->row_cnt));
2513         dev_info(&h->pdev->dev, "layout_map_count = %u\n",
2514                         le16_to_cpu(map_buff->layout_map_count));
2515         dev_info(&h->pdev->dev, "flags = 0x%x\n",
2516                         le16_to_cpu(map_buff->flags));
2517         dev_info(&h->pdev->dev, "encrypytion = %s\n",
2518                         le16_to_cpu(map_buff->flags) &
2519                         RAID_MAP_FLAG_ENCRYPT_ON ?  "ON" : "OFF");
2520         dev_info(&h->pdev->dev, "dekindex = %u\n",
2521                         le16_to_cpu(map_buff->dekindex));
2522         map_cnt = le16_to_cpu(map_buff->layout_map_count);
2523         for (map = 0; map < map_cnt; map++) {
2524                 dev_info(&h->pdev->dev, "Map%u:\n", map);
2525                 row_cnt = le16_to_cpu(map_buff->row_cnt);
2526                 for (row = 0; row < row_cnt; row++) {
2527                         dev_info(&h->pdev->dev, "  Row%u:\n", row);
2528                         disks_per_row =
2529                                 le16_to_cpu(map_buff->data_disks_per_row);
2530                         for (col = 0; col < disks_per_row; col++, dd++)
2531                                 dev_info(&h->pdev->dev,
2532                                         "    D%02u: h=0x%04x xor=%u,%u\n",
2533                                         col, dd->ioaccel_handle,
2534                                         dd->xor_mult[0], dd->xor_mult[1]);
2535                         disks_per_row =
2536                                 le16_to_cpu(map_buff->metadata_disks_per_row);
2537                         for (col = 0; col < disks_per_row; col++, dd++)
2538                                 dev_info(&h->pdev->dev,
2539                                         "    M%02u: h=0x%04x xor=%u,%u\n",
2540                                         col, dd->ioaccel_handle,
2541                                         dd->xor_mult[0], dd->xor_mult[1]);
2542                 }
2543         }
2544 }
2545 #else
2546 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
2547                         __attribute__((unused)) int rc,
2548                         __attribute__((unused)) struct raid_map_data *map_buff)
2549 {
2550 }
2551 #endif
2552
2553 static int hpsa_get_raid_map(struct ctlr_info *h,
2554         unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
2555 {
2556         int rc = 0;
2557         struct CommandList *c;
2558         struct ErrorInfo *ei;
2559
2560         c = cmd_alloc(h);
2561         if (c == NULL) {
2562                 dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2563                 return -ENOMEM;
2564         }
2565         if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
2566                         sizeof(this_device->raid_map), 0,
2567                         scsi3addr, TYPE_CMD)) {
2568                 dev_warn(&h->pdev->dev, "Out of memory in hpsa_get_raid_map()\n");
2569                 rc = -ENOMEM;
2570                 goto out;
2571         }
2572         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2573                                         PCI_DMA_FROMDEVICE, NO_TIMEOUT);
2574         if (rc)
2575                 goto out;
2576         ei = c->err_info;
2577         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2578                 hpsa_scsi_interpret_error(h, c);
2579                 rc = -1;
2580                 goto out;
2581         }
2582         cmd_free(h, c);
2583
2584         /* @todo in the future, dynamically allocate RAID map memory */
2585         if (le32_to_cpu(this_device->raid_map.structure_size) >
2586                                 sizeof(this_device->raid_map)) {
2587                 dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
2588                 rc = -1;
2589         }
2590         hpsa_debug_map_buff(h, rc, &this_device->raid_map);
2591         return rc;
2592 out:
2593         cmd_free(h, c);
2594         return rc;
2595 }
2596
2597 static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
2598                 unsigned char scsi3addr[], u16 bmic_device_index,
2599                 struct bmic_identify_physical_device *buf, size_t bufsize)
2600 {
2601         int rc = IO_OK;
2602         struct CommandList *c;
2603         struct ErrorInfo *ei;
2604
2605         c = cmd_alloc(h);
2606         rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
2607                 0, RAID_CTLR_LUNID, TYPE_CMD);
2608         if (rc)
2609                 goto out;
2610
2611         c->Request.CDB[2] = bmic_device_index & 0xff;
2612         c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
2613
2614         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
2615                                                 NO_TIMEOUT);
2616         ei = c->err_info;
2617         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2618                 hpsa_scsi_interpret_error(h, c);
2619                 rc = -1;
2620         }
2621 out:
2622         cmd_free(h, c);
2623         return rc;
2624 }
2625
2626 static int hpsa_vpd_page_supported(struct ctlr_info *h,
2627         unsigned char scsi3addr[], u8 page)
2628 {
2629         int rc;
2630         int i;
2631         int pages;
2632         unsigned char *buf, bufsize;
2633
2634         buf = kzalloc(256, GFP_KERNEL);
2635         if (!buf)
2636                 return 0;
2637
2638         /* Get the size of the page list first */
2639         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
2640                                 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
2641                                 buf, HPSA_VPD_HEADER_SZ);
2642         if (rc != 0)
2643                 goto exit_unsupported;
2644         pages = buf[3];
2645         if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
2646                 bufsize = pages + HPSA_VPD_HEADER_SZ;
2647         else
2648                 bufsize = 255;
2649
2650         /* Get the whole VPD page list */
2651         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
2652                                 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
2653                                 buf, bufsize);
2654         if (rc != 0)
2655                 goto exit_unsupported;
2656
2657         pages = buf[3];
2658         for (i = 1; i <= pages; i++)
2659                 if (buf[3 + i] == page)
2660                         goto exit_supported;
2661 exit_unsupported:
2662         kfree(buf);
2663         return 0;
2664 exit_supported:
2665         kfree(buf);
2666         return 1;
2667 }
2668
2669 static void hpsa_get_ioaccel_status(struct ctlr_info *h,
2670         unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
2671 {
2672         int rc;
2673         unsigned char *buf;
2674         u8 ioaccel_status;
2675
2676         this_device->offload_config = 0;
2677         this_device->offload_enabled = 0;
2678         this_device->offload_to_be_enabled = 0;
2679
2680         buf = kzalloc(64, GFP_KERNEL);
2681         if (!buf)
2682                 return;
2683         if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
2684                 goto out;
2685         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
2686                         VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
2687         if (rc != 0)
2688                 goto out;
2689
2690 #define IOACCEL_STATUS_BYTE 4
2691 #define OFFLOAD_CONFIGURED_BIT 0x01
2692 #define OFFLOAD_ENABLED_BIT 0x02
2693         ioaccel_status = buf[IOACCEL_STATUS_BYTE];
2694         this_device->offload_config =
2695                 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
2696         if (this_device->offload_config) {
2697                 this_device->offload_enabled =
2698                         !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
2699                 if (hpsa_get_raid_map(h, scsi3addr, this_device))
2700                         this_device->offload_enabled = 0;
2701         }
2702         this_device->offload_to_be_enabled = this_device->offload_enabled;
2703 out:
2704         kfree(buf);
2705         return;
2706 }
2707
2708 /* Get the device id from inquiry page 0x83 */
2709 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
2710         unsigned char *device_id, int buflen)
2711 {
2712         int rc;
2713         unsigned char *buf;
2714
2715         if (buflen > 16)
2716                 buflen = 16;
2717         buf = kzalloc(64, GFP_KERNEL);
2718         if (!buf)
2719                 return -ENOMEM;
2720         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0x83, buf, 64);
2721         if (rc == 0)
2722                 memcpy(device_id, &buf[8], buflen);
2723         kfree(buf);
2724         return rc != 0;
2725 }
2726
2727 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
2728                 void *buf, int bufsize,
2729                 int extended_response)
2730 {
2731         int rc = IO_OK;
2732         struct CommandList *c;
2733         unsigned char scsi3addr[8];
2734         struct ErrorInfo *ei;
2735
2736         c = cmd_alloc(h);
2737         if (c == NULL) {                        /* trouble... */
2738                 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2739                 return -1;
2740         }
2741         /* address the controller */
2742         memset(scsi3addr, 0, sizeof(scsi3addr));
2743         if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
2744                 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
2745                 rc = -1;
2746                 goto out;
2747         }
2748         if (extended_response)
2749                 c->Request.CDB[1] = extended_response;
2750         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2751                                         PCI_DMA_FROMDEVICE, NO_TIMEOUT);
2752         if (rc)
2753                 goto out;
2754         ei = c->err_info;
2755         if (ei->CommandStatus != 0 &&
2756             ei->CommandStatus != CMD_DATA_UNDERRUN) {
2757                 hpsa_scsi_interpret_error(h, c);
2758                 rc = -1;
2759         } else {
2760                 struct ReportLUNdata *rld = buf;
2761
2762                 if (rld->extended_response_flag != extended_response) {
2763                         dev_err(&h->pdev->dev,
2764                                 "report luns requested format %u, got %u\n",
2765                                 extended_response,
2766                                 rld->extended_response_flag);
2767                         rc = -1;
2768                 }
2769         }
2770 out:
2771         cmd_free(h, c);
2772         return rc;
2773 }
2774
2775 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
2776                 struct ReportExtendedLUNdata *buf, int bufsize)
2777 {
2778         return hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
2779                                                 HPSA_REPORT_PHYS_EXTENDED);
2780 }
2781
2782 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
2783                 struct ReportLUNdata *buf, int bufsize)
2784 {
2785         return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
2786 }
2787
2788 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
2789         int bus, int target, int lun)
2790 {
2791         device->bus = bus;
2792         device->target = target;
2793         device->lun = lun;
2794 }
2795
2796 /* Use VPD inquiry to get details of volume status */
2797 static int hpsa_get_volume_status(struct ctlr_info *h,
2798                                         unsigned char scsi3addr[])
2799 {
2800         int rc;
2801         int status;
2802         int size;
2803         unsigned char *buf;
2804
2805         buf = kzalloc(64, GFP_KERNEL);
2806         if (!buf)
2807                 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
2808
2809         /* Does controller have VPD for logical volume status? */
2810         if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
2811                 goto exit_failed;
2812
2813         /* Get the size of the VPD return buffer */
2814         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
2815                                         buf, HPSA_VPD_HEADER_SZ);
2816         if (rc != 0)
2817                 goto exit_failed;
2818         size = buf[3];
2819
2820         /* Now get the whole VPD buffer */
2821         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
2822                                         buf, size + HPSA_VPD_HEADER_SZ);
2823         if (rc != 0)
2824                 goto exit_failed;
2825         status = buf[4]; /* status byte */
2826
2827         kfree(buf);
2828         return status;
2829 exit_failed:
2830         kfree(buf);
2831         return HPSA_VPD_LV_STATUS_UNSUPPORTED;
2832 }
2833
2834 /* Determine offline status of a volume.
2835  * Return either:
2836  *  0 (not offline)
2837  *  0xff (offline for unknown reasons)
2838  *  # (integer code indicating one of several NOT READY states
2839  *     describing why a volume is to be kept offline)
2840  */
2841 static int hpsa_volume_offline(struct ctlr_info *h,
2842                                         unsigned char scsi3addr[])
2843 {
2844         struct CommandList *c;
2845         unsigned char *sense;
2846         u8 sense_key, asc, ascq;
2847         int sense_len;
2848         int rc, ldstat = 0;
2849         u16 cmd_status;
2850         u8 scsi_status;
2851 #define ASC_LUN_NOT_READY 0x04
2852 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
2853 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
2854
2855         c = cmd_alloc(h);
2856         if (!c)
2857                 return 0;
2858         (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
2859         rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
2860         if (rc) {
2861                 cmd_free(h, c);
2862                 return 0;
2863         }
2864         sense = c->err_info->SenseInfo;
2865         if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
2866                 sense_len = sizeof(c->err_info->SenseInfo);
2867         else
2868                 sense_len = c->err_info->SenseLen;
2869         decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq);
2870         cmd_status = c->err_info->CommandStatus;
2871         scsi_status = c->err_info->ScsiStatus;
2872         cmd_free(h, c);
2873         /* Is the volume 'not ready'? */
2874         if (cmd_status != CMD_TARGET_STATUS ||
2875                 scsi_status != SAM_STAT_CHECK_CONDITION ||
2876                 sense_key != NOT_READY ||
2877                 asc != ASC_LUN_NOT_READY)  {
2878                 return 0;
2879         }
2880
2881         /* Determine the reason for not ready state */
2882         ldstat = hpsa_get_volume_status(h, scsi3addr);
2883
2884         /* Keep volume offline in certain cases: */
2885         switch (ldstat) {
2886         case HPSA_LV_UNDERGOING_ERASE:
2887         case HPSA_LV_UNDERGOING_RPI:
2888         case HPSA_LV_PENDING_RPI:
2889         case HPSA_LV_ENCRYPTED_NO_KEY:
2890         case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
2891         case HPSA_LV_UNDERGOING_ENCRYPTION:
2892         case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
2893         case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
2894                 return ldstat;
2895         case HPSA_VPD_LV_STATUS_UNSUPPORTED:
2896                 /* If VPD status page isn't available,
2897                  * use ASC/ASCQ to determine state
2898                  */
2899                 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
2900                         (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
2901                         return ldstat;
2902                 break;
2903         default:
2904                 break;
2905         }
2906         return 0;
2907 }
2908
2909 /*
2910  * Find out if a logical device supports aborts by simply trying one.
2911  * Smart Array may claim not to support aborts on logical drives, but
2912  * if a MSA2000 * is connected, the drives on that will be presented
2913  * by the Smart Array as logical drives, and aborts may be sent to
2914  * those devices successfully.  So the simplest way to find out is
2915  * to simply try an abort and see how the device responds.
2916  */
2917 static int hpsa_device_supports_aborts(struct ctlr_info *h,
2918                                         unsigned char *scsi3addr)
2919 {
2920         struct CommandList *c;
2921         struct ErrorInfo *ei;
2922         int rc = 0;
2923
2924         u64 tag = (u64) -1; /* bogus tag */
2925
2926         /* Assume that physical devices support aborts */
2927         if (!is_logical_dev_addr_mode(scsi3addr))
2928                 return 1;
2929
2930         c = cmd_alloc(h);
2931         if (!c)
2932                 return -ENOMEM;
2933         (void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG);
2934         (void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
2935         /* no unmap needed here because no data xfer. */
2936         ei = c->err_info;
2937         switch (ei->CommandStatus) {
2938         case CMD_INVALID:
2939                 rc = 0;
2940                 break;
2941         case CMD_UNABORTABLE:
2942         case CMD_ABORT_FAILED:
2943                 rc = 1;
2944                 break;
2945         case CMD_TMF_STATUS:
2946                 rc = hpsa_evaluate_tmf_status(h, c);
2947                 break;
2948         default:
2949                 rc = 0;
2950                 break;
2951         }
2952         cmd_free(h, c);
2953         return rc;
2954 }
2955
2956 static int hpsa_update_device_info(struct ctlr_info *h,
2957         unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
2958         unsigned char *is_OBDR_device)
2959 {
2960
2961 #define OBDR_SIG_OFFSET 43
2962 #define OBDR_TAPE_SIG "$DR-10"
2963 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
2964 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
2965
2966         unsigned char *inq_buff;
2967         unsigned char *obdr_sig;
2968
2969         inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
2970         if (!inq_buff)
2971                 goto bail_out;
2972
2973         /* Do an inquiry to the device to see what it is. */
2974         if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
2975                 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
2976                 /* Inquiry failed (msg printed already) */
2977                 dev_err(&h->pdev->dev,
2978                         "hpsa_update_device_info: inquiry failed\n");
2979                 goto bail_out;
2980         }
2981
2982         this_device->devtype = (inq_buff[0] & 0x1f);
2983         memcpy(this_device->scsi3addr, scsi3addr, 8);
2984         memcpy(this_device->vendor, &inq_buff[8],
2985                 sizeof(this_device->vendor));
2986         memcpy(this_device->model, &inq_buff[16],
2987                 sizeof(this_device->model));
2988         memset(this_device->device_id, 0,
2989                 sizeof(this_device->device_id));
2990         hpsa_get_device_id(h, scsi3addr, this_device->device_id,
2991                 sizeof(this_device->device_id));
2992
2993         if (this_device->devtype == TYPE_DISK &&
2994                 is_logical_dev_addr_mode(scsi3addr)) {
2995                 int volume_offline;
2996
2997                 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
2998                 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
2999                         hpsa_get_ioaccel_status(h, scsi3addr, this_device);
3000                 volume_offline = hpsa_volume_offline(h, scsi3addr);
3001                 if (volume_offline < 0 || volume_offline > 0xff)
3002                         volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED;
3003                 this_device->volume_offline = volume_offline & 0xff;
3004         } else {
3005                 this_device->raid_level = RAID_UNKNOWN;
3006                 this_device->offload_config = 0;
3007                 this_device->offload_enabled = 0;
3008                 this_device->offload_to_be_enabled = 0;
3009                 this_device->volume_offline = 0;
3010                 this_device->queue_depth = h->nr_cmds;
3011         }
3012
3013         if (is_OBDR_device) {
3014                 /* See if this is a One-Button-Disaster-Recovery device
3015                  * by looking for "$DR-10" at offset 43 in inquiry data.
3016                  */
3017                 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
3018                 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
3019                                         strncmp(obdr_sig, OBDR_TAPE_SIG,
3020                                                 OBDR_SIG_LEN) == 0);
3021         }
3022         kfree(inq_buff);
3023         return 0;
3024
3025 bail_out:
3026         kfree(inq_buff);
3027         return 1;
3028 }
3029
3030 static void hpsa_update_device_supports_aborts(struct ctlr_info *h,
3031                         struct hpsa_scsi_dev_t *dev, u8 *scsi3addr)
3032 {
3033         unsigned long flags;
3034         int rc, entry;
3035         /*
3036          * See if this device supports aborts.  If we already know
3037          * the device, we already know if it supports aborts, otherwise
3038          * we have to find out if it supports aborts by trying one.
3039          */
3040         spin_lock_irqsave(&h->devlock, flags);
3041         rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry);
3042         if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) &&
3043                 entry >= 0 && entry < h->ndevices) {
3044                 dev->supports_aborts = h->dev[entry]->supports_aborts;
3045                 spin_unlock_irqrestore(&h->devlock, flags);
3046         } else {
3047                 spin_unlock_irqrestore(&h->devlock, flags);
3048                 dev->supports_aborts =
3049                                 hpsa_device_supports_aborts(h, scsi3addr);
3050                 if (dev->supports_aborts < 0)
3051                         dev->supports_aborts = 0;
3052         }
3053 }
3054
3055 static unsigned char *ext_target_model[] = {
3056         "MSA2012",
3057         "MSA2024",
3058         "MSA2312",
3059         "MSA2324",
3060         "P2000 G3 SAS",
3061         "MSA 2040 SAS",
3062         NULL,
3063 };
3064
3065 static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
3066 {
3067         int i;
3068
3069         for (i = 0; ext_target_model[i]; i++)
3070                 if (strncmp(device->model, ext_target_model[i],
3071                         strlen(ext_target_model[i])) == 0)
3072                         return 1;
3073         return 0;
3074 }
3075
3076 /* Helper function to assign bus, target, lun mapping of devices.
3077  * Puts non-external target logical volumes on bus 0, external target logical
3078  * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
3079  * Logical drive target and lun are assigned at this time, but
3080  * physical device lun and target assignment are deferred (assigned
3081  * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
3082  */
3083 static void figure_bus_target_lun(struct ctlr_info *h,
3084         u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
3085 {
3086         u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
3087
3088         if (!is_logical_dev_addr_mode(lunaddrbytes)) {
3089                 /* physical device, target and lun filled in later */
3090                 if (is_hba_lunid(lunaddrbytes))
3091                         hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
3092                 else
3093                         /* defer target, lun assignment for physical devices */
3094                         hpsa_set_bus_target_lun(device, 2, -1, -1);
3095                 return;
3096         }
3097         /* It's a logical device */
3098         if (is_ext_target(h, device)) {
3099                 /* external target way, put logicals on bus 1
3100                  * and match target/lun numbers box
3101                  * reports, other smart array, bus 0, target 0, match lunid
3102                  */
3103                 hpsa_set_bus_target_lun(device,
3104                         1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
3105                 return;
3106         }
3107         hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
3108 }
3109
3110 /*
3111  * If there is no lun 0 on a target, linux won't find any devices.
3112  * For the external targets (arrays), we have to manually detect the enclosure
3113  * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
3114  * it for some reason.  *tmpdevice is the target we're adding,
3115  * this_device is a pointer into the current element of currentsd[]
3116  * that we're building up in update_scsi_devices(), below.
3117  * lunzerobits is a bitmap that tracks which targets already have a
3118  * lun 0 assigned.
3119  * Returns 1 if an enclosure was added, 0 if not.
3120  */
3121 static int add_ext_target_dev(struct ctlr_info *h,
3122         struct hpsa_scsi_dev_t *tmpdevice,
3123         struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
3124         unsigned long lunzerobits[], int *n_ext_target_devs)
3125 {
3126         unsigned char scsi3addr[8];
3127
3128         if (test_bit(tmpdevice->target, lunzerobits))
3129                 return 0; /* There is already a lun 0 on this target. */
3130
3131         if (!is_logical_dev_addr_mode(lunaddrbytes))
3132                 return 0; /* It's the logical targets that may lack lun 0. */
3133
3134         if (!is_ext_target(h, tmpdevice))
3135                 return 0; /* Only external target devices have this problem. */
3136
3137         if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
3138                 return 0;
3139
3140         memset(scsi3addr, 0, 8);
3141         scsi3addr[3] = tmpdevice->target;
3142         if (is_hba_lunid(scsi3addr))
3143                 return 0; /* Don't add the RAID controller here. */
3144
3145         if (is_scsi_rev_5(h))
3146                 return 0; /* p1210m doesn't need to do this. */
3147
3148         if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
3149                 dev_warn(&h->pdev->dev, "Maximum number of external "
3150                         "target devices exceeded.  Check your hardware "
3151                         "configuration.");
3152                 return 0;
3153         }
3154
3155         if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
3156                 return 0;
3157         (*n_ext_target_devs)++;
3158         hpsa_set_bus_target_lun(this_device,
3159                                 tmpdevice->bus, tmpdevice->target, 0);
3160         hpsa_update_device_supports_aborts(h, this_device, scsi3addr);
3161         set_bit(tmpdevice->target, lunzerobits);
3162         return 1;
3163 }
3164
3165 /*
3166  * Get address of physical disk used for an ioaccel2 mode command:
3167  *      1. Extract ioaccel2 handle from the command.
3168  *      2. Find a matching ioaccel2 handle from list of physical disks.
3169  *      3. Return:
3170  *              1 and set scsi3addr to address of matching physical
3171  *              0 if no matching physical disk was found.
3172  */
3173 static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h,
3174         struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr)
3175 {
3176         struct io_accel2_cmd *c2 =
3177                         &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex];
3178         unsigned long flags;
3179         int i;
3180
3181         spin_lock_irqsave(&h->devlock, flags);
3182         for (i = 0; i < h->ndevices; i++)
3183                 if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) {
3184                         memcpy(scsi3addr, h->dev[i]->scsi3addr,
3185                                 sizeof(h->dev[i]->scsi3addr));
3186                         spin_unlock_irqrestore(&h->devlock, flags);
3187                         return 1;
3188                 }
3189         spin_unlock_irqrestore(&h->devlock, flags);
3190         return 0;
3191 }
3192
3193 /*
3194  * Do CISS_REPORT_PHYS and CISS_REPORT_LOG.  Data is returned in physdev,
3195  * logdev.  The number of luns in physdev and logdev are returned in
3196  * *nphysicals and *nlogicals, respectively.
3197  * Returns 0 on success, -1 otherwise.
3198  */
3199 static int hpsa_gather_lun_info(struct ctlr_info *h,
3200         struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
3201         struct ReportLUNdata *logdev, u32 *nlogicals)
3202 {
3203         if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3204                 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3205                 return -1;
3206         }
3207         *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
3208         if (*nphysicals > HPSA_MAX_PHYS_LUN) {
3209                 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
3210                         HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
3211                 *nphysicals = HPSA_MAX_PHYS_LUN;
3212         }
3213         if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
3214                 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
3215                 return -1;
3216         }
3217         *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
3218         /* Reject Logicals in excess of our max capability. */
3219         if (*nlogicals > HPSA_MAX_LUN) {
3220                 dev_warn(&h->pdev->dev,
3221                         "maximum logical LUNs (%d) exceeded.  "
3222                         "%d LUNs ignored.\n", HPSA_MAX_LUN,
3223                         *nlogicals - HPSA_MAX_LUN);
3224                         *nlogicals = HPSA_MAX_LUN;
3225         }
3226         if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
3227                 dev_warn(&h->pdev->dev,
3228                         "maximum logical + physical LUNs (%d) exceeded. "
3229                         "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
3230                         *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
3231                 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
3232         }
3233         return 0;
3234 }
3235
3236 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
3237         int i, int nphysicals, int nlogicals,
3238         struct ReportExtendedLUNdata *physdev_list,
3239         struct ReportLUNdata *logdev_list)
3240 {
3241         /* Helper function, figure out where the LUN ID info is coming from
3242          * given index i, lists of physical and logical devices, where in
3243          * the list the raid controller is supposed to appear (first or last)
3244          */
3245
3246         int logicals_start = nphysicals + (raid_ctlr_position == 0);
3247         int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
3248
3249         if (i == raid_ctlr_position)
3250                 return RAID_CTLR_LUNID;
3251
3252         if (i < logicals_start)
3253                 return &physdev_list->LUN[i -
3254                                 (raid_ctlr_position == 0)].lunid[0];
3255
3256         if (i < last_device)
3257                 return &logdev_list->LUN[i - nphysicals -
3258                         (raid_ctlr_position == 0)][0];
3259         BUG();
3260         return NULL;
3261 }
3262
3263 static int hpsa_hba_mode_enabled(struct ctlr_info *h)
3264 {
3265         int rc;
3266         int hba_mode_enabled;
3267         struct bmic_controller_parameters *ctlr_params;
3268         ctlr_params = kzalloc(sizeof(struct bmic_controller_parameters),
3269                 GFP_KERNEL);
3270
3271         if (!ctlr_params)
3272                 return -ENOMEM;
3273         rc = hpsa_bmic_ctrl_mode_sense(h, RAID_CTLR_LUNID, 0, ctlr_params,
3274                 sizeof(struct bmic_controller_parameters));
3275         if (rc) {
3276                 kfree(ctlr_params);
3277                 return rc;
3278         }
3279
3280         hba_mode_enabled =
3281                 ((ctlr_params->nvram_flags & HBA_MODE_ENABLED_FLAG) != 0);
3282         kfree(ctlr_params);
3283         return hba_mode_enabled;
3284 }
3285
3286 /* get physical drive ioaccel handle and queue depth */
3287 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
3288                 struct hpsa_scsi_dev_t *dev,
3289                 u8 *lunaddrbytes,
3290                 struct bmic_identify_physical_device *id_phys)
3291 {
3292         int rc;
3293         struct ext_report_lun_entry *rle =
3294                 (struct ext_report_lun_entry *) lunaddrbytes;
3295
3296         dev->ioaccel_handle = rle->ioaccel_handle;
3297         memset(id_phys, 0, sizeof(*id_phys));
3298         rc = hpsa_bmic_id_physical_device(h, lunaddrbytes,
3299                         GET_BMIC_DRIVE_NUMBER(lunaddrbytes), id_phys,
3300                         sizeof(*id_phys));
3301         if (!rc)
3302                 /* Reserve space for FW operations */
3303 #define DRIVE_CMDS_RESERVED_FOR_FW 2
3304 #define DRIVE_QUEUE_DEPTH 7
3305                 dev->queue_depth =
3306                         le16_to_cpu(id_phys->current_queue_depth_limit) -
3307                                 DRIVE_CMDS_RESERVED_FOR_FW;
3308         else
3309                 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */
3310         atomic_set(&dev->ioaccel_cmds_out, 0);
3311 }
3312
3313 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
3314 {
3315         /* the idea here is we could get notified
3316          * that some devices have changed, so we do a report
3317          * physical luns and report logical luns cmd, and adjust
3318          * our list of devices accordingly.
3319          *
3320          * The scsi3addr's of devices won't change so long as the
3321          * adapter is not reset.  That means we can rescan and
3322          * tell which devices we already know about, vs. new
3323          * devices, vs.  disappearing devices.
3324          */
3325         struct ReportExtendedLUNdata *physdev_list = NULL;
3326         struct ReportLUNdata *logdev_list = NULL;
3327         struct bmic_identify_physical_device *id_phys = NULL;
3328         u32 nphysicals = 0;
3329         u32 nlogicals = 0;
3330         u32 ndev_allocated = 0;
3331         struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
3332         int ncurrent = 0;
3333         int i, n_ext_target_devs, ndevs_to_allocate;
3334         int raid_ctlr_position;
3335         int rescan_hba_mode;
3336         DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
3337
3338         currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
3339         physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
3340         logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
3341         tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
3342         id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3343
3344         if (!currentsd || !physdev_list || !logdev_list ||
3345                 !tmpdevice || !id_phys) {
3346                 dev_err(&h->pdev->dev, "out of memory\n");
3347                 goto out;
3348         }
3349         memset(lunzerobits, 0, sizeof(lunzerobits));
3350
3351         rescan_hba_mode = hpsa_hba_mode_enabled(h);
3352         if (rescan_hba_mode < 0)
3353                 goto out;
3354
3355         if (!h->hba_mode_enabled && rescan_hba_mode)
3356                 dev_warn(&h->pdev->dev, "HBA mode enabled\n");
3357         else if (h->hba_mode_enabled && !rescan_hba_mode)
3358                 dev_warn(&h->pdev->dev, "HBA mode disabled\n");
3359
3360         h->hba_mode_enabled = rescan_hba_mode;
3361
3362         if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
3363                         logdev_list, &nlogicals))
3364                 goto out;
3365
3366         /* We might see up to the maximum number of logical and physical disks
3367          * plus external target devices, and a device for the local RAID
3368          * controller.
3369          */
3370         ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
3371
3372         /* Allocate the per device structures */
3373         for (i = 0; i < ndevs_to_allocate; i++) {
3374                 if (i >= HPSA_MAX_DEVICES) {
3375                         dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
3376                                 "  %d devices ignored.\n", HPSA_MAX_DEVICES,
3377                                 ndevs_to_allocate - HPSA_MAX_DEVICES);
3378                         break;
3379                 }
3380
3381                 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
3382                 if (!currentsd[i]) {
3383                         dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
3384                                 __FILE__, __LINE__);
3385                         goto out;
3386                 }
3387                 ndev_allocated++;
3388         }
3389
3390         if (is_scsi_rev_5(h))
3391                 raid_ctlr_position = 0;
3392         else
3393                 raid_ctlr_position = nphysicals + nlogicals;
3394
3395         /* adjust our table of devices */
3396         n_ext_target_devs = 0;
3397         for (i = 0; i < nphysicals + nlogicals + 1; i++) {
3398                 u8 *lunaddrbytes, is_OBDR = 0;
3399
3400                 /* Figure out where the LUN ID info is coming from */
3401                 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
3402                         i, nphysicals, nlogicals, physdev_list, logdev_list);
3403
3404                 /* skip masked non-disk devices */
3405                 if (MASKED_DEVICE(lunaddrbytes))
3406                         if (i < nphysicals + (raid_ctlr_position == 0) &&
3407                                 NON_DISK_PHYS_DEV(lunaddrbytes))
3408                                 continue;
3409
3410                 /* Get device type, vendor, model, device id */
3411                 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
3412                                                         &is_OBDR))
3413                         continue; /* skip it if we can't talk to it. */
3414                 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
3415                 hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes);
3416                 this_device = currentsd[ncurrent];
3417
3418                 /*
3419                  * For external target devices, we have to insert a LUN 0 which
3420                  * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
3421                  * is nonetheless an enclosure device there.  We have to
3422                  * present that otherwise linux won't find anything if
3423                  * there is no lun 0.
3424                  */
3425                 if (add_ext_target_dev(h, tmpdevice, this_device,
3426                                 lunaddrbytes, lunzerobits,
3427                                 &n_ext_target_devs)) {
3428                         ncurrent++;
3429                         this_device = currentsd[ncurrent];
3430                 }
3431
3432                 *this_device = *tmpdevice;
3433
3434                 /* do not expose masked devices */
3435                 if (MASKED_DEVICE(lunaddrbytes) &&
3436                         i < nphysicals + (raid_ctlr_position == 0)) {
3437                         if (h->hba_mode_enabled)
3438                                 dev_warn(&h->pdev->dev,
3439                                         "Masked physical device detected\n");
3440                         this_device->expose_state = HPSA_DO_NOT_EXPOSE;
3441                 } else {
3442                         this_device->expose_state =
3443                                         HPSA_SG_ATTACH | HPSA_ULD_ATTACH;
3444                 }
3445
3446                 switch (this_device->devtype) {
3447                 case TYPE_ROM:
3448                         /* We don't *really* support actual CD-ROM devices,
3449                          * just "One Button Disaster Recovery" tape drive
3450                          * which temporarily pretends to be a CD-ROM drive.
3451                          * So we check that the device is really an OBDR tape
3452                          * device by checking for "$DR-10" in bytes 43-48 of
3453                          * the inquiry data.
3454                          */
3455                         if (is_OBDR)
3456                                 ncurrent++;
3457                         break;
3458                 case TYPE_DISK:
3459                         if (h->hba_mode_enabled) {
3460                                 /* never use raid mapper in HBA mode */
3461                                 this_device->offload_enabled = 0;
3462                                 ncurrent++;
3463                                 break;
3464                         } else if (h->acciopath_status) {
3465                                 if (i >= nphysicals) {
3466                                         ncurrent++;
3467                                         break;
3468                                 }
3469                         } else {
3470                                 if (i < nphysicals)
3471                                         break;
3472                                 ncurrent++;
3473                                 break;
3474                         }
3475                         if (h->transMethod & CFGTBL_Trans_io_accel1 ||
3476                                 h->transMethod & CFGTBL_Trans_io_accel2) {
3477                                 hpsa_get_ioaccel_drive_info(h, this_device,
3478                                                         lunaddrbytes, id_phys);
3479                                 atomic_set(&this_device->ioaccel_cmds_out, 0);
3480                                 ncurrent++;
3481                         }
3482                         break;
3483                 case TYPE_TAPE:
3484                 case TYPE_MEDIUM_CHANGER:
3485                         ncurrent++;
3486                         break;
3487                 case TYPE_ENCLOSURE:
3488                         if (h->hba_mode_enabled)
3489                                 ncurrent++;
3490                         break;
3491                 case TYPE_RAID:
3492                         /* Only present the Smartarray HBA as a RAID controller.
3493                          * If it's a RAID controller other than the HBA itself
3494                          * (an external RAID controller, MSA500 or similar)
3495                          * don't present it.
3496                          */
3497                         if (!is_hba_lunid(lunaddrbytes))
3498                                 break;
3499                         ncurrent++;
3500                         break;
3501                 default:
3502                         break;
3503                 }
3504                 if (ncurrent >= HPSA_MAX_DEVICES)
3505                         break;
3506         }
3507         adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
3508 out:
3509         kfree(tmpdevice);
3510         for (i = 0; i < ndev_allocated; i++)
3511                 kfree(currentsd[i]);
3512         kfree(currentsd);
3513         kfree(physdev_list);
3514         kfree(logdev_list);
3515         kfree(id_phys);
3516 }
3517
3518 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
3519                                    struct scatterlist *sg)
3520 {
3521         u64 addr64 = (u64) sg_dma_address(sg);
3522         unsigned int len = sg_dma_len(sg);
3523
3524         desc->Addr = cpu_to_le64(addr64);
3525         desc->Len = cpu_to_le32(len);
3526         desc->Ext = 0;
3527 }
3528
3529 /*
3530  * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
3531  * dma mapping  and fills in the scatter gather entries of the
3532  * hpsa command, cp.
3533  */
3534 static int hpsa_scatter_gather(struct ctlr_info *h,
3535                 struct CommandList *cp,
3536                 struct scsi_cmnd *cmd)
3537 {
3538         struct scatterlist *sg;
3539         int use_sg, i, sg_index, chained;
3540         struct SGDescriptor *curr_sg;
3541
3542         BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
3543
3544         use_sg = scsi_dma_map(cmd);
3545         if (use_sg < 0)
3546                 return use_sg;
3547
3548         if (!use_sg)
3549                 goto sglist_finished;
3550
3551         curr_sg = cp->SG;
3552         chained = 0;
3553         sg_index = 0;
3554         scsi_for_each_sg(cmd, sg, use_sg, i) {
3555                 if (i == h->max_cmd_sg_entries - 1 &&
3556                         use_sg > h->max_cmd_sg_entries) {
3557                         chained = 1;
3558                         curr_sg = h->cmd_sg_list[cp->cmdindex];
3559                         sg_index = 0;
3560                 }
3561                 hpsa_set_sg_descriptor(curr_sg, sg);
3562                 curr_sg++;
3563         }
3564
3565         /* Back the pointer up to the last entry and mark it as "last". */
3566         (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
3567
3568         if (use_sg + chained > h->maxSG)
3569                 h->maxSG = use_sg + chained;
3570
3571         if (chained) {
3572                 cp->Header.SGList = h->max_cmd_sg_entries;
3573                 cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
3574                 if (hpsa_map_sg_chain_block(h, cp)) {
3575                         scsi_dma_unmap(cmd);
3576                         return -1;
3577                 }
3578                 return 0;
3579         }
3580
3581 sglist_finished:
3582
3583         cp->Header.SGList = (u8) use_sg;   /* no. SGs contig in this cmd */
3584         cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
3585         return 0;
3586 }
3587
3588 #define IO_ACCEL_INELIGIBLE (1)
3589 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
3590 {
3591         int is_write = 0;
3592         u32 block;
3593         u32 block_cnt;
3594
3595         /* Perform some CDB fixups if needed using 10 byte reads/writes only */
3596         switch (cdb[0]) {
3597         case WRITE_6:
3598         case WRITE_12:
3599                 is_write = 1;
3600         case READ_6:
3601         case READ_12:
3602                 if (*cdb_len == 6) {
3603                         block = (((u32) cdb[2]) << 8) | cdb[3];
3604                         block_cnt = cdb[4];
3605                 } else {
3606                         BUG_ON(*cdb_len != 12);
3607                         block = (((u32) cdb[2]) << 24) |
3608                                 (((u32) cdb[3]) << 16) |
3609                                 (((u32) cdb[4]) << 8) |
3610                                 cdb[5];
3611                         block_cnt =
3612                                 (((u32) cdb[6]) << 24) |
3613                                 (((u32) cdb[7]) << 16) |
3614                                 (((u32) cdb[8]) << 8) |
3615                                 cdb[9];
3616                 }
3617                 if (block_cnt > 0xffff)
3618                         return IO_ACCEL_INELIGIBLE;
3619
3620                 cdb[0] = is_write ? WRITE_10 : READ_10;
3621                 cdb[1] = 0;
3622                 cdb[2] = (u8) (block >> 24);
3623                 cdb[3] = (u8) (block >> 16);
3624                 cdb[4] = (u8) (block >> 8);
3625                 cdb[5] = (u8) (block);
3626                 cdb[6] = 0;
3627                 cdb[7] = (u8) (block_cnt >> 8);
3628                 cdb[8] = (u8) (block_cnt);
3629                 cdb[9] = 0;
3630                 *cdb_len = 10;
3631                 break;
3632         }
3633         return 0;
3634 }
3635
3636 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
3637         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3638         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
3639 {
3640         struct scsi_cmnd *cmd = c->scsi_cmd;
3641         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
3642         unsigned int len;
3643         unsigned int total_len = 0;
3644         struct scatterlist *sg;
3645         u64 addr64;
3646         int use_sg, i;
3647         struct SGDescriptor *curr_sg;
3648         u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
3649
3650         /* TODO: implement chaining support */
3651         if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
3652                 atomic_dec(&phys_disk->ioaccel_cmds_out);
3653                 return IO_ACCEL_INELIGIBLE;
3654         }
3655
3656         BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
3657
3658         if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
3659                 atomic_dec(&phys_disk->ioaccel_cmds_out);
3660                 return IO_ACCEL_INELIGIBLE;
3661         }
3662
3663         c->cmd_type = CMD_IOACCEL1;
3664
3665         /* Adjust the DMA address to point to the accelerated command buffer */
3666         c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
3667                                 (c->cmdindex * sizeof(*cp));
3668         BUG_ON(c->busaddr & 0x0000007F);
3669
3670         use_sg = scsi_dma_map(cmd);
3671         if (use_sg < 0) {
3672                 atomic_dec(&phys_disk->ioaccel_cmds_out);
3673                 return use_sg;
3674         }
3675
3676         if (use_sg) {
3677                 curr_sg = cp->SG;
3678                 scsi_for_each_sg(cmd, sg, use_sg, i) {
3679                         addr64 = (u64) sg_dma_address(sg);
3680                         len  = sg_dma_len(sg);
3681                         total_len += len;
3682                         curr_sg->Addr = cpu_to_le64(addr64);
3683                         curr_sg->Len = cpu_to_le32(len);
3684                         curr_sg->Ext = cpu_to_le32(0);
3685                         curr_sg++;
3686                 }
3687                 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
3688
3689                 switch (cmd->sc_data_direction) {
3690                 case DMA_TO_DEVICE:
3691                         control |= IOACCEL1_CONTROL_DATA_OUT;
3692                         break;
3693                 case DMA_FROM_DEVICE:
3694                         control |= IOACCEL1_CONTROL_DATA_IN;
3695                         break;
3696                 case DMA_NONE:
3697                         control |= IOACCEL1_CONTROL_NODATAXFER;
3698                         break;
3699                 default:
3700                         dev_err(&h->pdev->dev, "unknown data direction: %d\n",
3701                         cmd->sc_data_direction);
3702                         BUG();
3703                         break;
3704                 }
3705         } else {
3706                 control |= IOACCEL1_CONTROL_NODATAXFER;
3707         }
3708
3709         c->Header.SGList = use_sg;
3710         /* Fill out the command structure to submit */
3711         cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
3712         cp->transfer_len = cpu_to_le32(total_len);
3713         cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
3714                         (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
3715         cp->control = cpu_to_le32(control);
3716         memcpy(cp->CDB, cdb, cdb_len);
3717         memcpy(cp->CISS_LUN, scsi3addr, 8);
3718         /* Tag was already set at init time. */
3719         enqueue_cmd_and_start_io(h, c);
3720         return 0;
3721 }
3722
3723 /*
3724  * Queue a command directly to a device behind the controller using the
3725  * I/O accelerator path.
3726  */
3727 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
3728         struct CommandList *c)
3729 {
3730         struct scsi_cmnd *cmd = c->scsi_cmd;
3731         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
3732
3733         c->phys_disk = dev;
3734
3735         return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
3736                 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
3737 }
3738
3739 /*
3740  * Set encryption parameters for the ioaccel2 request
3741  */
3742 static void set_encrypt_ioaccel2(struct ctlr_info *h,
3743         struct CommandList *c, struct io_accel2_cmd *cp)
3744 {
3745         struct scsi_cmnd *cmd = c->scsi_cmd;
3746         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
3747         struct raid_map_data *map = &dev->raid_map;
3748         u64 first_block;
3749
3750         /* Are we doing encryption on this device */
3751         if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
3752                 return;
3753         /* Set the data encryption key index. */
3754         cp->dekindex = map->dekindex;
3755
3756         /* Set the encryption enable flag, encoded into direction field. */
3757         cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
3758
3759         /* Set encryption tweak values based on logical block address
3760          * If block size is 512, tweak value is LBA.
3761          * For other block sizes, tweak is (LBA * block size)/ 512)
3762          */
3763         switch (cmd->cmnd[0]) {
3764         /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
3765         case WRITE_6:
3766         case READ_6:
3767                 first_block = get_unaligned_be16(&cmd->cmnd[2]);
3768                 break;
3769         case WRITE_10:
3770         case READ_10:
3771         /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
3772         case WRITE_12:
3773         case READ_12:
3774                 first_block = get_unaligned_be32(&cmd->cmnd[2]);
3775                 break;
3776         case WRITE_16:
3777         case READ_16:
3778                 first_block = get_unaligned_be64(&cmd->cmnd[2]);
3779                 break;
3780         default:
3781                 dev_err(&h->pdev->dev,
3782                         "ERROR: %s: size (0x%x) not supported for encryption\n",
3783                         __func__, cmd->cmnd[0]);
3784                 BUG();
3785                 break;
3786         }
3787
3788         if (le32_to_cpu(map->volume_blk_size) != 512)
3789                 first_block = first_block *
3790                                 le32_to_cpu(map->volume_blk_size)/512;
3791
3792         cp->tweak_lower = cpu_to_le32(first_block);
3793         cp->tweak_upper = cpu_to_le32(first_block >> 32);
3794 }
3795
3796 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
3797         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3798         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
3799 {
3800         struct scsi_cmnd *cmd = c->scsi_cmd;
3801         struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
3802         struct ioaccel2_sg_element *curr_sg;
3803         int use_sg, i;
3804         struct scatterlist *sg;
3805         u64 addr64;
3806         u32 len;
3807         u32 total_len = 0;
3808
3809         if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
3810                 atomic_dec(&phys_disk->ioaccel_cmds_out);
3811                 return IO_ACCEL_INELIGIBLE;
3812         }
3813
3814         if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
3815                 atomic_dec(&phys_disk->ioaccel_cmds_out);
3816                 return IO_ACCEL_INELIGIBLE;
3817         }
3818
3819         c->cmd_type = CMD_IOACCEL2;
3820         /* Adjust the DMA address to point to the accelerated command buffer */
3821         c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
3822                                 (c->cmdindex * sizeof(*cp));
3823         BUG_ON(c->busaddr & 0x0000007F);
3824
3825         memset(cp, 0, sizeof(*cp));
3826         cp->IU_type = IOACCEL2_IU_TYPE;
3827
3828         use_sg = scsi_dma_map(cmd);
3829         if (use_sg < 0) {
3830                 atomic_dec(&phys_disk->ioaccel_cmds_out);
3831                 return use_sg;
3832         }
3833
3834         if (use_sg) {
3835                 BUG_ON(use_sg > IOACCEL2_MAXSGENTRIES);
3836                 curr_sg = cp->sg;
3837                 scsi_for_each_sg(cmd, sg, use_sg, i) {
3838                         addr64 = (u64) sg_dma_address(sg);
3839                         len  = sg_dma_len(sg);
3840                         total_len += len;
3841                         curr_sg->address = cpu_to_le64(addr64);
3842                         curr_sg->length = cpu_to_le32(len);
3843                         curr_sg->reserved[0] = 0;
3844                         curr_sg->reserved[1] = 0;
3845                         curr_sg->reserved[2] = 0;
3846                         curr_sg->chain_indicator = 0;
3847                         curr_sg++;
3848                 }
3849
3850                 switch (cmd->sc_data_direction) {
3851                 case DMA_TO_DEVICE:
3852                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3853                         cp->direction |= IOACCEL2_DIR_DATA_OUT;
3854                         break;
3855                 case DMA_FROM_DEVICE:
3856                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3857                         cp->direction |= IOACCEL2_DIR_DATA_IN;
3858                         break;
3859                 case DMA_NONE:
3860                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3861                         cp->direction |= IOACCEL2_DIR_NO_DATA;
3862                         break;
3863                 default:
3864                         dev_err(&h->pdev->dev, "unknown data direction: %d\n",
3865                                 cmd->sc_data_direction);
3866                         BUG();
3867                         break;
3868                 }
3869         } else {
3870                 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3871                 cp->direction |= IOACCEL2_DIR_NO_DATA;
3872         }
3873
3874         /* Set encryption parameters, if necessary */
3875         set_encrypt_ioaccel2(h, c, cp);
3876
3877         cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
3878         cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
3879         memcpy(cp->cdb, cdb, sizeof(cp->cdb));
3880
3881         /* fill in sg elements */
3882         cp->sg_count = (u8) use_sg;
3883
3884         cp->data_len = cpu_to_le32(total_len);
3885         cp->err_ptr = cpu_to_le64(c->busaddr +
3886                         offsetof(struct io_accel2_cmd, error_data));
3887         cp->err_len = cpu_to_le32(sizeof(cp->error_data));
3888
3889         enqueue_cmd_and_start_io(h, c);
3890         return 0;
3891 }
3892
3893 /*
3894  * Queue a command to the correct I/O accelerator path.
3895  */
3896 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
3897         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3898         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
3899 {
3900         /* Try to honor the device's queue depth */
3901         if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
3902                                         phys_disk->queue_depth) {
3903                 atomic_dec(&phys_disk->ioaccel_cmds_out);
3904                 return IO_ACCEL_INELIGIBLE;
3905         }
3906         if (h->transMethod & CFGTBL_Trans_io_accel1)
3907                 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
3908                                                 cdb, cdb_len, scsi3addr,
3909                                                 phys_disk);
3910         else
3911                 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
3912                                                 cdb, cdb_len, scsi3addr,
3913                                                 phys_disk);
3914 }
3915
3916 static void raid_map_helper(struct raid_map_data *map,
3917                 int offload_to_mirror, u32 *map_index, u32 *current_group)
3918 {
3919         if (offload_to_mirror == 0)  {
3920                 /* use physical disk in the first mirrored group. */
3921                 *map_index %= le16_to_cpu(map->data_disks_per_row);
3922                 return;
3923         }
3924         do {
3925                 /* determine mirror group that *map_index indicates */
3926                 *current_group = *map_index /
3927                         le16_to_cpu(map->data_disks_per_row);
3928                 if (offload_to_mirror == *current_group)
3929                         continue;
3930                 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
3931                         /* select map index from next group */
3932                         *map_index += le16_to_cpu(map->data_disks_per_row);
3933                         (*current_group)++;
3934                 } else {
3935                         /* select map index from first group */
3936                         *map_index %= le16_to_cpu(map->data_disks_per_row);
3937                         *current_group = 0;
3938                 }
3939         } while (offload_to_mirror != *current_group);
3940 }
3941
3942 /*
3943  * Attempt to perform offload RAID mapping for a logical volume I/O.
3944  */
3945 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
3946         struct CommandList *c)
3947 {
3948         struct scsi_cmnd *cmd = c->scsi_cmd;
3949         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
3950         struct raid_map_data *map = &dev->raid_map;
3951         struct raid_map_disk_data *dd = &map->data[0];
3952         int is_write = 0;
3953         u32 map_index;
3954         u64 first_block, last_block;
3955         u32 block_cnt;
3956         u32 blocks_per_row;
3957         u64 first_row, last_row;
3958         u32 first_row_offset, last_row_offset;
3959         u32 first_column, last_column;
3960         u64 r0_first_row, r0_last_row;
3961         u32 r5or6_blocks_per_row;
3962         u64 r5or6_first_row, r5or6_last_row;
3963         u32 r5or6_first_row_offset, r5or6_last_row_offset;
3964         u32 r5or6_first_column, r5or6_last_column;
3965         u32 total_disks_per_row;
3966         u32 stripesize;
3967         u32 first_group, last_group, current_group;
3968         u32 map_row;
3969         u32 disk_handle;
3970         u64 disk_block;
3971         u32 disk_block_cnt;
3972         u8 cdb[16];
3973         u8 cdb_len;
3974         u16 strip_size;
3975 #if BITS_PER_LONG == 32
3976         u64 tmpdiv;
3977 #endif
3978         int offload_to_mirror;
3979
3980         /* check for valid opcode, get LBA and block count */
3981         switch (cmd->cmnd[0]) {
3982         case WRITE_6:
3983                 is_write = 1;
3984         case READ_6:
3985                 first_block =
3986                         (((u64) cmd->cmnd[2]) << 8) |
3987                         cmd->cmnd[3];
3988                 block_cnt = cmd->cmnd[4];
3989                 if (block_cnt == 0)
3990                         block_cnt = 256;
3991                 break;
3992         case WRITE_10:
3993                 is_write = 1;
3994         case READ_10:
3995                 first_block =
3996                         (((u64) cmd->cmnd[2]) << 24) |
3997                         (((u64) cmd->cmnd[3]) << 16) |
3998                         (((u64) cmd->cmnd[4]) << 8) |
3999                         cmd->cmnd[5];
4000                 block_cnt =
4001                         (((u32) cmd->cmnd[7]) << 8) |
4002                         cmd->cmnd[8];
4003                 break;
4004         case WRITE_12:
4005                 is_write = 1;
4006         case READ_12:
4007                 first_block =
4008                         (((u64) cmd->cmnd[2]) << 24) |
4009                         (((u64) cmd->cmnd[3]) << 16) |
4010                         (((u64) cmd->cmnd[4]) << 8) |
4011                         cmd->cmnd[5];
4012                 block_cnt =
4013                         (((u32) cmd->cmnd[6]) << 24) |
4014                         (((u32) cmd->cmnd[7]) << 16) |
4015                         (((u32) cmd->cmnd[8]) << 8) |
4016                 cmd->cmnd[9];
4017                 break;
4018         case WRITE_16:
4019                 is_write = 1;
4020         case READ_16:
4021                 first_block =
4022                         (((u64) cmd->cmnd[2]) << 56) |
4023                         (((u64) cmd->cmnd[3]) << 48) |
4024                         (((u64) cmd->cmnd[4]) << 40) |
4025                         (((u64) cmd->cmnd[5]) << 32) |
4026                         (((u64) cmd->cmnd[6]) << 24) |
4027                         (((u64) cmd->cmnd[7]) << 16) |
4028                         (((u64) cmd->cmnd[8]) << 8) |
4029                         cmd->cmnd[9];
4030                 block_cnt =
4031                         (((u32) cmd->cmnd[10]) << 24) |
4032                         (((u32) cmd->cmnd[11]) << 16) |
4033                         (((u32) cmd->cmnd[12]) << 8) |
4034                         cmd->cmnd[13];
4035                 break;
4036         default:
4037                 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
4038         }
4039         last_block = first_block + block_cnt - 1;
4040
4041         /* check for write to non-RAID-0 */
4042         if (is_write && dev->raid_level != 0)
4043                 return IO_ACCEL_INELIGIBLE;
4044
4045         /* check for invalid block or wraparound */
4046         if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
4047                 last_block < first_block)
4048                 return IO_ACCEL_INELIGIBLE;
4049
4050         /* calculate stripe information for the request */
4051         blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
4052                                 le16_to_cpu(map->strip_size);
4053         strip_size = le16_to_cpu(map->strip_size);
4054 #if BITS_PER_LONG == 32
4055         tmpdiv = first_block;
4056         (void) do_div(tmpdiv, blocks_per_row);
4057         first_row = tmpdiv;
4058         tmpdiv = last_block;
4059         (void) do_div(tmpdiv, blocks_per_row);
4060         last_row = tmpdiv;
4061         first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
4062         last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
4063         tmpdiv = first_row_offset;
4064         (void) do_div(tmpdiv, strip_size);
4065         first_column = tmpdiv;
4066         tmpdiv = last_row_offset;
4067         (void) do_div(tmpdiv, strip_size);
4068         last_column = tmpdiv;
4069 #else
4070         first_row = first_block / blocks_per_row;
4071         last_row = last_block / blocks_per_row;
4072         first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
4073         last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
4074         first_column = first_row_offset / strip_size;
4075         last_column = last_row_offset / strip_size;
4076 #endif
4077
4078         /* if this isn't a single row/column then give to the controller */
4079         if ((first_row != last_row) || (first_column != last_column))
4080                 return IO_ACCEL_INELIGIBLE;
4081
4082         /* proceeding with driver mapping */
4083         total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
4084                                 le16_to_cpu(map->metadata_disks_per_row);
4085         map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
4086                                 le16_to_cpu(map->row_cnt);
4087         map_index = (map_row * total_disks_per_row) + first_column;
4088
4089         switch (dev->raid_level) {
4090         case HPSA_RAID_0:
4091                 break; /* nothing special to do */
4092         case HPSA_RAID_1:
4093                 /* Handles load balance across RAID 1 members.
4094                  * (2-drive R1 and R10 with even # of drives.)
4095                  * Appropriate for SSDs, not optimal for HDDs
4096                  */
4097                 BUG_ON(le16_to_cpu(map->layout_map_count) != 2);
4098                 if (dev->offload_to_mirror)
4099                         map_index += le16_to_cpu(map->data_disks_per_row);
4100                 dev->offload_to_mirror = !dev->offload_to_mirror;
4101                 break;
4102         case HPSA_RAID_ADM:
4103                 /* Handles N-way mirrors  (R1-ADM)
4104                  * and R10 with # of drives divisible by 3.)
4105                  */
4106                 BUG_ON(le16_to_cpu(map->layout_map_count) != 3);
4107
4108                 offload_to_mirror = dev->offload_to_mirror;
4109                 raid_map_helper(map, offload_to_mirror,
4110                                 &map_index, &current_group);
4111                 /* set mirror group to use next time */
4112                 offload_to_mirror =
4113                         (offload_to_mirror >=
4114                         le16_to_cpu(map->layout_map_count) - 1)
4115                         ? 0 : offload_to_mirror + 1;
4116                 dev->offload_to_mirror = offload_to_mirror;
4117                 /* Avoid direct use of dev->offload_to_mirror within this
4118                  * function since multiple threads might simultaneously
4119                  * increment it beyond the range of dev->layout_map_count -1.
4120                  */
4121                 break;
4122         case HPSA_RAID_5:
4123         case HPSA_RAID_6:
4124                 if (le16_to_cpu(map->layout_map_count) <= 1)
4125                         break;
4126
4127                 /* Verify first and last block are in same RAID group */
4128                 r5or6_blocks_per_row =
4129                         le16_to_cpu(map->strip_size) *
4130                         le16_to_cpu(map->data_disks_per_row);
4131                 BUG_ON(r5or6_blocks_per_row == 0);
4132                 stripesize = r5or6_blocks_per_row *
4133                         le16_to_cpu(map->layout_map_count);
4134 #if BITS_PER_LONG == 32
4135                 tmpdiv = first_block;
4136                 first_group = do_div(tmpdiv, stripesize);
4137                 tmpdiv = first_group;
4138                 (void) do_div(tmpdiv, r5or6_blocks_per_row);
4139                 first_group = tmpdiv;
4140                 tmpdiv = last_block;
4141                 last_group = do_div(tmpdiv, stripesize);
4142                 tmpdiv = last_group;
4143                 (void) do_div(tmpdiv, r5or6_blocks_per_row);
4144                 last_group = tmpdiv;
4145 #else
4146                 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
4147                 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
4148 #endif
4149                 if (first_group != last_group)
4150                         return IO_ACCEL_INELIGIBLE;
4151
4152                 /* Verify request is in a single row of RAID 5/6 */
4153 #if BITS_PER_LONG == 32
4154                 tmpdiv = first_block;
4155                 (void) do_div(tmpdiv, stripesize);
4156                 first_row = r5or6_first_row = r0_first_row = tmpdiv;
4157                 tmpdiv = last_block;
4158                 (void) do_div(tmpdiv, stripesize);
4159                 r5or6_last_row = r0_last_row = tmpdiv;
4160 #else
4161                 first_row = r5or6_first_row = r0_first_row =
4162                                                 first_block / stripesize;
4163                 r5or6_last_row = r0_last_row = last_block / stripesize;
4164 #endif
4165                 if (r5or6_first_row != r5or6_last_row)
4166                         return IO_ACCEL_INELIGIBLE;
4167
4168
4169                 /* Verify request is in a single column */
4170 #if BITS_PER_LONG == 32
4171                 tmpdiv = first_block;
4172                 first_row_offset = do_div(tmpdiv, stripesize);
4173                 tmpdiv = first_row_offset;
4174                 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
4175                 r5or6_first_row_offset = first_row_offset;
4176                 tmpdiv = last_block;
4177                 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
4178                 tmpdiv = r5or6_last_row_offset;
4179                 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
4180                 tmpdiv = r5or6_first_row_offset;
4181                 (void) do_div(tmpdiv, map->strip_size);
4182                 first_column = r5or6_first_column = tmpdiv;
4183                 tmpdiv = r5or6_last_row_offset;
4184                 (void) do_div(tmpdiv, map->strip_size);
4185                 r5or6_last_column = tmpdiv;
4186 #else
4187                 first_row_offset = r5or6_first_row_offset =
4188                         (u32)((first_block % stripesize) %
4189                                                 r5or6_blocks_per_row);
4190
4191                 r5or6_last_row_offset =
4192                         (u32)((last_block % stripesize) %
4193                                                 r5or6_blocks_per_row);
4194
4195                 first_column = r5or6_first_column =
4196                         r5or6_first_row_offset / le16_to_cpu(map->strip_size);
4197                 r5or6_last_column =
4198                         r5or6_last_row_offset / le16_to_cpu(map->strip_size);
4199 #endif
4200                 if (r5or6_first_column != r5or6_last_column)
4201                         return IO_ACCEL_INELIGIBLE;
4202
4203                 /* Request is eligible */
4204                 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
4205                         le16_to_cpu(map->row_cnt);
4206
4207                 map_index = (first_group *
4208                         (le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
4209                         (map_row * total_disks_per_row) + first_column;
4210                 break;
4211         default:
4212                 return IO_ACCEL_INELIGIBLE;
4213         }
4214
4215         if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
4216                 return IO_ACCEL_INELIGIBLE;
4217
4218         c->phys_disk = dev->phys_disk[map_index];
4219
4220         disk_handle = dd[map_index].ioaccel_handle;
4221         disk_block = le64_to_cpu(map->disk_starting_blk) +
4222                         first_row * le16_to_cpu(map->strip_size) +
4223                         (first_row_offset - first_column *
4224                         le16_to_cpu(map->strip_size));
4225         disk_block_cnt = block_cnt;
4226
4227         /* handle differing logical/physical block sizes */
4228         if (map->phys_blk_shift) {
4229                 disk_block <<= map->phys_blk_shift;
4230                 disk_block_cnt <<= map->phys_blk_shift;
4231         }
4232         BUG_ON(disk_block_cnt > 0xffff);
4233
4234         /* build the new CDB for the physical disk I/O */
4235         if (disk_block > 0xffffffff) {
4236                 cdb[0] = is_write ? WRITE_16 : READ_16;
4237                 cdb[1] = 0;
4238                 cdb[2] = (u8) (disk_block >> 56);
4239                 cdb[3] = (u8) (disk_block >> 48);
4240                 cdb[4] = (u8) (disk_block >> 40);
4241                 cdb[5] = (u8) (disk_block >> 32);
4242                 cdb[6] = (u8) (disk_block >> 24);
4243                 cdb[7] = (u8) (disk_block >> 16);
4244                 cdb[8] = (u8) (disk_block >> 8);
4245                 cdb[9] = (u8) (disk_block);
4246                 cdb[10] = (u8) (disk_block_cnt >> 24);
4247                 cdb[11] = (u8) (disk_block_cnt >> 16);
4248                 cdb[12] = (u8) (disk_block_cnt >> 8);
4249                 cdb[13] = (u8) (disk_block_cnt);
4250                 cdb[14] = 0;
4251                 cdb[15] = 0;
4252                 cdb_len = 16;
4253         } else {
4254                 cdb[0] = is_write ? WRITE_10 : READ_10;
4255                 cdb[1] = 0;
4256                 cdb[2] = (u8) (disk_block >> 24);
4257                 cdb[3] = (u8) (disk_block >> 16);
4258                 cdb[4] = (u8) (disk_block >> 8);
4259                 cdb[5] = (u8) (disk_block);
4260                 cdb[6] = 0;
4261                 cdb[7] = (u8) (disk_block_cnt >> 8);
4262                 cdb[8] = (u8) (disk_block_cnt);
4263                 cdb[9] = 0;
4264                 cdb_len = 10;
4265         }
4266         return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
4267                                                 dev->scsi3addr,
4268                                                 dev->phys_disk[map_index]);
4269 }
4270
4271 /*
4272  * Submit commands down the "normal" RAID stack path
4273  * All callers to hpsa_ciss_submit must check lockup_detected
4274  * beforehand, before (opt.) and after calling cmd_alloc
4275  */
4276 static int hpsa_ciss_submit(struct ctlr_info *h,
4277         struct CommandList *c, struct scsi_cmnd *cmd,
4278         unsigned char scsi3addr[])
4279 {
4280         cmd->host_scribble = (unsigned char *) c;
4281         c->cmd_type = CMD_SCSI;
4282         c->scsi_cmd = cmd;
4283         c->Header.ReplyQueue = 0;  /* unused in simple mode */
4284         memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
4285         c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
4286
4287         /* Fill in the request block... */
4288
4289         c->Request.Timeout = 0;
4290         BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
4291         c->Request.CDBLen = cmd->cmd_len;
4292         memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
4293         switch (cmd->sc_data_direction) {
4294         case DMA_TO_DEVICE:
4295                 c->Request.type_attr_dir =
4296                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
4297                 break;
4298         case DMA_FROM_DEVICE:
4299                 c->Request.type_attr_dir =
4300                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
4301                 break;
4302         case DMA_NONE:
4303                 c->Request.type_attr_dir =
4304                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
4305                 break;
4306         case DMA_BIDIRECTIONAL:
4307                 /* This can happen if a buggy application does a scsi passthru
4308                  * and sets both inlen and outlen to non-zero. ( see
4309                  * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
4310                  */
4311
4312                 c->Request.type_attr_dir =
4313                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
4314                 /* This is technically wrong, and hpsa controllers should
4315                  * reject it with CMD_INVALID, which is the most correct
4316                  * response, but non-fibre backends appear to let it
4317                  * slide by, and give the same results as if this field
4318                  * were set correctly.  Either way is acceptable for
4319                  * our purposes here.
4320                  */
4321
4322                 break;
4323
4324         default:
4325                 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4326                         cmd->sc_data_direction);
4327                 BUG();
4328                 break;
4329         }
4330
4331         if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
4332                 cmd_free(h, c);
4333                 return SCSI_MLQUEUE_HOST_BUSY;
4334         }
4335         enqueue_cmd_and_start_io(h, c);
4336         /* the cmd'll come back via intr handler in complete_scsi_command()  */
4337         return 0;
4338 }
4339
4340 static void hpsa_cmd_init(struct ctlr_info *h, int index,
4341                                 struct CommandList *c)
4342 {
4343         dma_addr_t cmd_dma_handle, err_dma_handle;
4344
4345         /* Zero out all of commandlist except the last field, refcount */
4346         memset(c, 0, offsetof(struct CommandList, refcount));
4347         c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT));
4348         cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
4349         c->err_info = h->errinfo_pool + index;
4350         memset(c->err_info, 0, sizeof(*c->err_info));
4351         err_dma_handle = h->errinfo_pool_dhandle
4352             + index * sizeof(*c->err_info);
4353         c->cmdindex = index;
4354         c->busaddr = (u32) cmd_dma_handle;
4355         c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
4356         c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
4357         c->h = h;
4358 }
4359
4360 static void hpsa_preinitialize_commands(struct ctlr_info *h)
4361 {
4362         int i;
4363
4364         for (i = 0; i < h->nr_cmds; i++) {
4365                 struct CommandList *c = h->cmd_pool + i;
4366
4367                 hpsa_cmd_init(h, i, c);
4368                 atomic_set(&c->refcount, 0);
4369         }
4370 }
4371
4372 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index,
4373                                 struct CommandList *c)
4374 {
4375         dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
4376
4377         memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
4378         memset(c->err_info, 0, sizeof(*c->err_info));
4379         c->busaddr = (u32) cmd_dma_handle;
4380 }
4381
4382 static int hpsa_ioaccel_submit(struct ctlr_info *h,
4383                 struct CommandList *c, struct scsi_cmnd *cmd,
4384                 unsigned char *scsi3addr)
4385 {
4386         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
4387         int rc = IO_ACCEL_INELIGIBLE;
4388
4389         cmd->host_scribble = (unsigned char *) c;
4390
4391         if (dev->offload_enabled) {
4392                 hpsa_cmd_init(h, c->cmdindex, c);
4393                 c->cmd_type = CMD_SCSI;
4394                 c->scsi_cmd = cmd;
4395                 rc = hpsa_scsi_ioaccel_raid_map(h, c);
4396                 if (rc < 0)     /* scsi_dma_map failed. */
4397                         rc = SCSI_MLQUEUE_HOST_BUSY;
4398         } else if (dev->ioaccel_handle) {
4399                 hpsa_cmd_init(h, c->cmdindex, c);
4400                 c->cmd_type = CMD_SCSI;
4401                 c->scsi_cmd = cmd;
4402                 rc = hpsa_scsi_ioaccel_direct_map(h, c);
4403                 if (rc < 0)     /* scsi_dma_map failed. */
4404                         rc = SCSI_MLQUEUE_HOST_BUSY;
4405         }
4406         return rc;
4407 }
4408
4409 static void hpsa_command_resubmit_worker(struct work_struct *work)
4410 {
4411         struct scsi_cmnd *cmd;
4412         struct hpsa_scsi_dev_t *dev;
4413         struct CommandList *c =
4414                         container_of(work, struct CommandList, work);
4415
4416         cmd = c->scsi_cmd;
4417         dev = cmd->device->hostdata;
4418         if (!dev) {
4419                 cmd->result = DID_NO_CONNECT << 16;
4420                 cmd_free(c->h, c);
4421                 cmd->scsi_done(cmd);
4422                 return;
4423         }
4424         if (c->cmd_type == CMD_IOACCEL2) {
4425                 struct ctlr_info *h = c->h;
4426                 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
4427                 int rc;
4428
4429                 if (c2->error_data.serv_response ==
4430                                 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) {
4431                         rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr);
4432                         if (rc == 0)
4433                                 return;
4434                         if (rc == SCSI_MLQUEUE_HOST_BUSY) {
4435                                 /*
4436                                  * If we get here, it means dma mapping failed.
4437                                  * Try again via scsi mid layer, which will
4438                                  * then get SCSI_MLQUEUE_HOST_BUSY.
4439                                  */
4440                                 cmd->result = DID_IMM_RETRY << 16;
4441                                 cmd->scsi_done(cmd);
4442                                 cmd_free(h, c); /* FIX-ME:  on merge, change
4443                                                  * to cmd_tagged_free() and
4444                                                  * ultimately to
4445                                                  * hpsa_cmd_free_and_done(). */
4446                                 return;
4447                         }
4448                         /* else, fall thru and resubmit down CISS path */
4449                 }
4450         }
4451         hpsa_cmd_partial_init(c->h, c->cmdindex, c);
4452         if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) {
4453                 /*
4454                  * If we get here, it means dma mapping failed. Try
4455                  * again via scsi mid layer, which will then get
4456                  * SCSI_MLQUEUE_HOST_BUSY.
4457                  *
4458                  * hpsa_ciss_submit will have already freed c
4459                  * if it encountered a dma mapping failure.
4460                  */
4461                 cmd->result = DID_IMM_RETRY << 16;
4462                 cmd->scsi_done(cmd);
4463         }
4464 }
4465
4466 /* Running in struct Scsi_Host->host_lock less mode */
4467 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
4468 {
4469         struct ctlr_info *h;
4470         struct hpsa_scsi_dev_t *dev;
4471         unsigned char scsi3addr[8];
4472         struct CommandList *c;
4473         int rc = 0;
4474
4475         /* Get the ptr to our adapter structure out of cmd->host. */
4476         h = sdev_to_hba(cmd->device);
4477         dev = cmd->device->hostdata;
4478         if (!dev) {
4479                 cmd->result = DID_NO_CONNECT << 16;
4480                 cmd->scsi_done(cmd);
4481                 return 0;
4482         }
4483         memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
4484
4485         if (unlikely(lockup_detected(h))) {
4486                 cmd->result = DID_NO_CONNECT << 16;
4487                 cmd->scsi_done(cmd);
4488                 return 0;
4489         }
4490         c = cmd_alloc(h);
4491         if (c == NULL) {                        /* trouble... */
4492                 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
4493                 return SCSI_MLQUEUE_HOST_BUSY;
4494         }
4495         if (unlikely(lockup_detected(h))) {
4496                 cmd->result = DID_NO_CONNECT << 16;
4497                 cmd_free(h, c);
4498                 cmd->scsi_done(cmd);
4499                 return 0;
4500         }
4501
4502         /*
4503          * Call alternate submit routine for I/O accelerated commands.
4504          * Retries always go down the normal I/O path.
4505          */
4506         if (likely(cmd->retries == 0 &&
4507                 cmd->request->cmd_type == REQ_TYPE_FS &&
4508                 h->acciopath_status)) {
4509                 rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr);
4510                 if (rc == 0)
4511                         return 0;
4512                 if (rc == SCSI_MLQUEUE_HOST_BUSY) {
4513                         cmd_free(h, c); /* FIX-ME:  on merge, change to
4514                                          * cmd_tagged_free(), and ultimately
4515                                          * to hpsa_cmd_resolve_and_free(). */
4516                         return SCSI_MLQUEUE_HOST_BUSY;
4517                 }
4518         }
4519         return hpsa_ciss_submit(h, c, cmd, scsi3addr);
4520 }
4521
4522 static void hpsa_scan_complete(struct ctlr_info *h)
4523 {
4524         unsigned long flags;
4525
4526         spin_lock_irqsave(&h->scan_lock, flags);
4527         h->scan_finished = 1;
4528         wake_up_all(&h->scan_wait_queue);
4529         spin_unlock_irqrestore(&h->scan_lock, flags);
4530 }
4531
4532 static void hpsa_scan_start(struct Scsi_Host *sh)
4533 {
4534         struct ctlr_info *h = shost_to_hba(sh);
4535         unsigned long flags;
4536
4537         /*
4538          * Don't let rescans be initiated on a controller known to be locked
4539          * up.  If the controller locks up *during* a rescan, that thread is
4540          * probably hosed, but at least we can prevent new rescan threads from
4541          * piling up on a locked up controller.
4542          */
4543         if (unlikely(lockup_detected(h)))
4544                 return hpsa_scan_complete(h);
4545
4546         /* wait until any scan already in progress is finished. */
4547         while (1) {
4548                 spin_lock_irqsave(&h->scan_lock, flags);
4549                 if (h->scan_finished)
4550                         break;
4551                 spin_unlock_irqrestore(&h->scan_lock, flags);
4552                 wait_event(h->scan_wait_queue, h->scan_finished);
4553                 /* Note: We don't need to worry about a race between this
4554                  * thread and driver unload because the midlayer will
4555                  * have incremented the reference count, so unload won't
4556                  * happen if we're in here.
4557                  */
4558         }
4559         h->scan_finished = 0; /* mark scan as in progress */
4560         spin_unlock_irqrestore(&h->scan_lock, flags);
4561
4562         if (unlikely(lockup_detected(h)))
4563                 return hpsa_scan_complete(h);
4564
4565         hpsa_update_scsi_devices(h, h->scsi_host->host_no);
4566
4567         hpsa_scan_complete(h);
4568 }
4569
4570 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
4571 {
4572         struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;
4573
4574         if (!logical_drive)
4575                 return -ENODEV;
4576
4577         if (qdepth < 1)
4578                 qdepth = 1;
4579         else if (qdepth > logical_drive->queue_depth)
4580                 qdepth = logical_drive->queue_depth;
4581
4582         return scsi_change_queue_depth(sdev, qdepth);
4583 }
4584
4585 static int hpsa_scan_finished(struct Scsi_Host *sh,
4586         unsigned long elapsed_time)
4587 {
4588         struct ctlr_info *h = shost_to_hba(sh);
4589         unsigned long flags;
4590         int finished;
4591
4592         spin_lock_irqsave(&h->scan_lock, flags);
4593         finished = h->scan_finished;
4594         spin_unlock_irqrestore(&h->scan_lock, flags);
4595         return finished;
4596 }
4597
4598 static void hpsa_unregister_scsi(struct ctlr_info *h)
4599 {
4600         /* we are being forcibly unloaded, and may not refuse. */
4601         scsi_remove_host(h->scsi_host);
4602         scsi_host_put(h->scsi_host);
4603         h->scsi_host = NULL;
4604 }
4605
4606 static int hpsa_register_scsi(struct ctlr_info *h)
4607 {
4608         struct Scsi_Host *sh;
4609         int error;
4610
4611         sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
4612         if (sh == NULL)
4613                 goto fail;
4614
4615         sh->io_port = 0;
4616         sh->n_io_port = 0;
4617         sh->this_id = -1;
4618         sh->max_channel = 3;
4619         sh->max_cmd_len = MAX_COMMAND_SIZE;
4620         sh->max_lun = HPSA_MAX_LUN;
4621         sh->max_id = HPSA_MAX_LUN;
4622         sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS;
4623         sh->cmd_per_lun = sh->can_queue;
4624         sh->sg_tablesize = h->maxsgentries;
4625         h->scsi_host = sh;
4626         sh->hostdata[0] = (unsigned long) h;
4627         sh->irq = h->intr[h->intr_mode];
4628         sh->unique_id = sh->irq;
4629         error = scsi_add_host(sh, &h->pdev->dev);
4630         if (error)
4631                 goto fail_host_put;
4632         scsi_scan_host(sh);
4633         return 0;
4634
4635  fail_host_put:
4636         dev_err(&h->pdev->dev, "%s: scsi_add_host"
4637                 " failed for controller %d\n", __func__, h->ctlr);
4638         scsi_host_put(sh);
4639         return error;
4640  fail:
4641         dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
4642                 " failed for controller %d\n", __func__, h->ctlr);
4643         return -ENOMEM;
4644 }
4645
4646 static int wait_for_device_to_become_ready(struct ctlr_info *h,
4647         unsigned char lunaddr[])
4648 {
4649         int rc;
4650         int count = 0;
4651         int waittime = 1; /* seconds */
4652         struct CommandList *c;
4653
4654         c = cmd_alloc(h);
4655         if (!c) {
4656                 dev_warn(&h->pdev->dev, "out of memory in "
4657                         "wait_for_device_to_become_ready.\n");
4658                 return IO_ERROR;
4659         }
4660
4661         /* Send test unit ready until device ready, or give up. */
4662         while (count < HPSA_TUR_RETRY_LIMIT) {
4663
4664                 /* Wait for a bit.  do this first, because if we send
4665                  * the TUR right away, the reset will just abort it.
4666                  */
4667                 msleep(1000 * waittime);
4668                 count++;
4669                 rc = 0; /* Device ready. */
4670
4671                 /* Increase wait time with each try, up to a point. */
4672                 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
4673                         waittime = waittime * 2;
4674
4675                 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
4676                 (void) fill_cmd(c, TEST_UNIT_READY, h,
4677                                 NULL, 0, 0, lunaddr, TYPE_CMD);
4678                 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
4679                                                 NO_TIMEOUT);
4680                 if (rc)
4681                         goto do_it_again;
4682                 /* no unmap needed here because no data xfer. */
4683
4684                 if (c->err_info->CommandStatus == CMD_SUCCESS)
4685                         break;
4686
4687                 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
4688                         c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
4689                         (c->err_info->SenseInfo[2] == NO_SENSE ||
4690                         c->err_info->SenseInfo[2] == UNIT_ATTENTION))
4691                         break;
4692 do_it_again:
4693                 dev_warn(&h->pdev->dev, "waiting %d secs "
4694                         "for device to become ready.\n", waittime);
4695                 rc = 1; /* device not ready. */
4696         }
4697
4698         if (rc)
4699                 dev_warn(&h->pdev->dev, "giving up on device.\n");
4700         else
4701                 dev_warn(&h->pdev->dev, "device is ready.\n");
4702
4703         cmd_free(h, c);
4704         return rc;
4705 }
4706
4707 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
4708  * complaining.  Doing a host- or bus-reset can't do anything good here.
4709  */
4710 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
4711 {
4712         int rc;
4713         struct ctlr_info *h;
4714         struct hpsa_scsi_dev_t *dev;
4715
4716         /* find the controller to which the command to be aborted was sent */
4717         h = sdev_to_hba(scsicmd->device);
4718         if (h == NULL) /* paranoia */
4719                 return FAILED;
4720
4721         if (lockup_detected(h))
4722                 return FAILED;
4723
4724         dev = scsicmd->device->hostdata;
4725         if (!dev) {
4726                 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
4727                         "device lookup failed.\n");
4728                 return FAILED;
4729         }
4730
4731         /* if controller locked up, we can guarantee command won't complete */
4732         if (lockup_detected(h)) {
4733                 dev_warn(&h->pdev->dev,
4734                         "scsi %d:%d:%d:%d RESET FAILED, lockup detected\n",
4735                         h->scsi_host->host_no, dev->bus, dev->target,
4736                         dev->lun);
4737                 return FAILED;
4738         }
4739
4740         /* this reset request might be the result of a lockup; check */
4741         if (detect_controller_lockup(h)) {
4742                 dev_warn(&h->pdev->dev,
4743                          "scsi %d:%d:%d:%d RESET FAILED, new lockup detected\n",
4744                          h->scsi_host->host_no, dev->bus, dev->target,
4745                          dev->lun);
4746                 return FAILED;
4747         }
4748
4749         hpsa_show_dev_msg(KERN_WARNING, h, dev, "resetting");
4750
4751         /* send a reset to the SCSI LUN which the command was sent to */
4752         rc = hpsa_send_reset(h, dev->scsi3addr, HPSA_RESET_TYPE_LUN,
4753                              DEFAULT_REPLY_QUEUE);
4754         if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
4755                 return SUCCESS;
4756
4757         dev_warn(&h->pdev->dev,
4758                 "scsi %d:%d:%d:%d reset failed\n",
4759                 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
4760         return FAILED;
4761 }
4762
4763 static void swizzle_abort_tag(u8 *tag)
4764 {
4765         u8 original_tag[8];
4766
4767         memcpy(original_tag, tag, 8);
4768         tag[0] = original_tag[3];
4769         tag[1] = original_tag[2];
4770         tag[2] = original_tag[1];
4771         tag[3] = original_tag[0];
4772         tag[4] = original_tag[7];
4773         tag[5] = original_tag[6];
4774         tag[6] = original_tag[5];
4775         tag[7] = original_tag[4];
4776 }
4777
4778 static void hpsa_get_tag(struct ctlr_info *h,
4779         struct CommandList *c, __le32 *taglower, __le32 *tagupper)
4780 {
4781         u64 tag;
4782         if (c->cmd_type == CMD_IOACCEL1) {
4783                 struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *)
4784                         &h->ioaccel_cmd_pool[c->cmdindex];
4785                 tag = le64_to_cpu(cm1->tag);
4786                 *tagupper = cpu_to_le32(tag >> 32);
4787                 *taglower = cpu_to_le32(tag);
4788                 return;
4789         }
4790         if (c->cmd_type == CMD_IOACCEL2) {
4791                 struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *)
4792                         &h->ioaccel2_cmd_pool[c->cmdindex];
4793                 /* upper tag not used in ioaccel2 mode */
4794                 memset(tagupper, 0, sizeof(*tagupper));
4795                 *taglower = cm2->Tag;
4796                 return;
4797         }
4798         tag = le64_to_cpu(c->Header.tag);
4799         *tagupper = cpu_to_le32(tag >> 32);
4800         *taglower = cpu_to_le32(tag);
4801 }
4802
4803 static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
4804         struct CommandList *abort, int reply_queue)
4805 {
4806         int rc = IO_OK;
4807         struct CommandList *c;
4808         struct ErrorInfo *ei;
4809         __le32 tagupper, taglower;
4810
4811         c = cmd_alloc(h);
4812         if (c == NULL) {        /* trouble... */
4813                 dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
4814                 return -ENOMEM;
4815         }
4816
4817         /* fill_cmd can't fail here, no buffer to map */
4818         (void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag,
4819                 0, 0, scsi3addr, TYPE_MSG);
4820         if (h->needs_abort_tags_swizzled)
4821                 swizzle_abort_tag(&c->Request.CDB[4]);
4822         (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
4823         hpsa_get_tag(h, abort, &taglower, &tagupper);
4824         dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n",
4825                 __func__, tagupper, taglower);
4826         /* no unmap needed here because no data xfer. */
4827
4828         ei = c->err_info;
4829         switch (ei->CommandStatus) {
4830         case CMD_SUCCESS:
4831                 break;
4832         case CMD_TMF_STATUS:
4833                 rc = hpsa_evaluate_tmf_status(h, c);
4834                 break;
4835         case CMD_UNABORTABLE: /* Very common, don't make noise. */
4836                 rc = -1;
4837                 break;
4838         default:
4839                 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
4840                         __func__, tagupper, taglower);
4841                 hpsa_scsi_interpret_error(h, c);
4842                 rc = -1;
4843                 break;
4844         }
4845         cmd_free(h, c);
4846         dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n",
4847                 __func__, tagupper, taglower);
4848         return rc;
4849 }
4850
4851 /* ioaccel2 path firmware cannot handle abort task requests.
4852  * Change abort requests to physical target reset, and send to the
4853  * address of the physical disk used for the ioaccel 2 command.
4854  * Return 0 on success (IO_OK)
4855  *       -1 on failure
4856  */
4857
4858 static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h,
4859         unsigned char *scsi3addr, struct CommandList *abort, int reply_queue)
4860 {
4861         int rc = IO_OK;
4862         struct scsi_cmnd *scmd; /* scsi command within request being aborted */
4863         struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */
4864         unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */
4865         unsigned char *psa = &phys_scsi3addr[0];
4866
4867         /* Get a pointer to the hpsa logical device. */
4868         scmd = abort->scsi_cmd;
4869         dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata);
4870         if (dev == NULL) {
4871                 dev_warn(&h->pdev->dev,
4872                         "Cannot abort: no device pointer for command.\n");
4873                         return -1; /* not abortable */
4874         }
4875
4876         if (h->raid_offload_debug > 0)
4877                 dev_info(&h->pdev->dev,
4878                         "scsi %d:%d:%d:%d %s scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4879                         h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
4880                         "Reset as abort",
4881                         scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3],
4882                         scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]);
4883
4884         if (!dev->offload_enabled) {
4885                 dev_warn(&h->pdev->dev,
4886                         "Can't abort: device is not operating in HP SSD Smart Path mode.\n");
4887                 return -1; /* not abortable */
4888         }
4889
4890         /* Incoming scsi3addr is logical addr. We need physical disk addr. */
4891         if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) {
4892                 dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n");
4893                 return -1; /* not abortable */
4894         }
4895
4896         /* send the reset */
4897         if (h->raid_offload_debug > 0)
4898                 dev_info(&h->pdev->dev,
4899                         "Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4900                         psa[0], psa[1], psa[2], psa[3],
4901                         psa[4], psa[5], psa[6], psa[7]);
4902         rc = hpsa_send_reset(h, psa, HPSA_RESET_TYPE_TARGET, reply_queue);
4903         if (rc != 0) {
4904                 dev_warn(&h->pdev->dev,
4905                         "Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4906                         psa[0], psa[1], psa[2], psa[3],
4907                         psa[4], psa[5], psa[6], psa[7]);
4908                 return rc; /* failed to reset */
4909         }
4910
4911         /* wait for device to recover */
4912         if (wait_for_device_to_become_ready(h, psa) != 0) {
4913                 dev_warn(&h->pdev->dev,
4914                         "Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4915                         psa[0], psa[1], psa[2], psa[3],
4916                         psa[4], psa[5], psa[6], psa[7]);
4917                 return -1;  /* failed to recover */
4918         }
4919
4920         /* device recovered */
4921         dev_info(&h->pdev->dev,
4922                 "Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4923                 psa[0], psa[1], psa[2], psa[3],
4924                 psa[4], psa[5], psa[6], psa[7]);
4925
4926         return rc; /* success */
4927 }
4928
4929 static int hpsa_send_abort_both_ways(struct ctlr_info *h,
4930         unsigned char *scsi3addr, struct CommandList *abort, int reply_queue)
4931 {
4932         /* ioccelerator mode 2 commands should be aborted via the
4933          * accelerated path, since RAID path is unaware of these commands,
4934          * but underlying firmware can't handle abort TMF.
4935          * Change abort to physical device reset.
4936          */
4937         if (abort->cmd_type == CMD_IOACCEL2)
4938                 return hpsa_send_reset_as_abort_ioaccel2(h, scsi3addr,
4939                                                         abort, reply_queue);
4940         return hpsa_send_abort(h, scsi3addr, abort, reply_queue);
4941 }
4942
4943 /* Find out which reply queue a command was meant to return on */
4944 static int hpsa_extract_reply_queue(struct ctlr_info *h,
4945                                         struct CommandList *c)
4946 {
4947         if (c->cmd_type == CMD_IOACCEL2)
4948                 return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue;
4949         return c->Header.ReplyQueue;
4950 }
4951
4952 /*
4953  * Limit concurrency of abort commands to prevent
4954  * over-subscription of commands
4955  */
4956 static inline int wait_for_available_abort_cmd(struct ctlr_info *h)
4957 {
4958 #define ABORT_CMD_WAIT_MSECS 5000
4959         return !wait_event_timeout(h->abort_cmd_wait_queue,
4960                         atomic_dec_if_positive(&h->abort_cmds_available) >= 0,
4961                         msecs_to_jiffies(ABORT_CMD_WAIT_MSECS));
4962 }
4963
4964 /* Send an abort for the specified command.
4965  *      If the device and controller support it,
4966  *              send a task abort request.
4967  */
4968 static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
4969 {
4970
4971         int i, rc;
4972         struct ctlr_info *h;
4973         struct hpsa_scsi_dev_t *dev;
4974         struct CommandList *abort; /* pointer to command to be aborted */
4975         struct scsi_cmnd *as;   /* ptr to scsi cmd inside aborted command. */
4976         char msg[256];          /* For debug messaging. */
4977         int ml = 0;
4978         __le32 tagupper, taglower;
4979         int refcount, reply_queue;
4980
4981         if (sc == NULL)
4982                 return FAILED;
4983
4984         if (sc->device == NULL)
4985                 return FAILED;
4986
4987         /* Find the controller of the command to be aborted */
4988         h = sdev_to_hba(sc->device);
4989         if (h == NULL)
4990                 return FAILED;
4991
4992         /* Find the device of the command to be aborted */
4993         dev = sc->device->hostdata;
4994         if (!dev) {
4995                 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
4996                                 msg);
4997                 return FAILED;
4998         }
4999
5000         /* If controller locked up, we can guarantee command won't complete */
5001         if (lockup_detected(h)) {
5002                 hpsa_show_dev_msg(KERN_WARNING, h, dev,
5003                                         "ABORT FAILED, lockup detected");
5004                 return FAILED;
5005         }
5006
5007         /* This is a good time to check if controller lockup has occurred */
5008         if (detect_controller_lockup(h)) {
5009                 hpsa_show_dev_msg(KERN_WARNING, h, dev,
5010                                         "ABORT FAILED, new lockup detected");
5011                 return FAILED;
5012         }
5013
5014         /* Check that controller supports some kind of task abort */
5015         if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
5016                 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
5017                 return FAILED;
5018
5019         memset(msg, 0, sizeof(msg));
5020         ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s",
5021                 h->scsi_host->host_no, sc->device->channel,
5022                 sc->device->id, sc->device->lun,
5023                 "Aborting command");
5024
5025         /* Get SCSI command to be aborted */
5026         abort = (struct CommandList *) sc->host_scribble;
5027         if (abort == NULL) {
5028                 /* This can happen if the command already completed. */
5029                 return SUCCESS;
5030         }
5031         refcount = atomic_inc_return(&abort->refcount);
5032         if (refcount == 1) { /* Command is done already. */
5033                 cmd_free(h, abort);
5034                 return SUCCESS;
5035         }
5036
5037         /* Don't bother trying the abort if we know it won't work. */
5038         if (abort->cmd_type != CMD_IOACCEL2 &&
5039                 abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) {
5040                 cmd_free(h, abort);
5041                 return FAILED;
5042         }
5043
5044         hpsa_get_tag(h, abort, &taglower, &tagupper);
5045         reply_queue = hpsa_extract_reply_queue(h, abort);
5046         ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower);
5047         as  = abort->scsi_cmd;
5048         if (as != NULL)
5049                 ml += sprintf(msg+ml, "Command:0x%x SN:0x%lx ",
5050                         as->cmnd[0], as->serial_number);
5051         dev_dbg(&h->pdev->dev, "%s\n", msg);
5052         hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command");
5053         /*
5054          * Command is in flight, or possibly already completed
5055          * by the firmware (but not to the scsi mid layer) but we can't
5056          * distinguish which.  Send the abort down.
5057          */
5058         if (wait_for_available_abort_cmd(h)) {
5059                 dev_warn(&h->pdev->dev,
5060                         "Timed out waiting for an abort command to become available.\n");
5061                 cmd_free(h, abort);
5062                 return FAILED;
5063         }
5064         rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort, reply_queue);
5065         atomic_inc(&h->abort_cmds_available);
5066         wake_up_all(&h->abort_cmd_wait_queue);
5067         if (rc != 0) {
5068                 hpsa_show_dev_msg(KERN_WARNING, h, dev,
5069                                         "FAILED to abort command");
5070                 cmd_free(h, abort);
5071                 return FAILED;
5072         }
5073         dev_info(&h->pdev->dev, "%s REQUEST SUCCEEDED.\n", msg);
5074
5075         /* If the abort(s) above completed and actually aborted the
5076          * command, then the command to be aborted should already be
5077          * completed.  If not, wait around a bit more to see if they
5078          * manage to complete normally.
5079          */
5080 #define ABORT_COMPLETE_WAIT_SECS 30
5081         for (i = 0; i < ABORT_COMPLETE_WAIT_SECS * 10; i++) {
5082                 refcount = atomic_read(&abort->refcount);
5083                 if (refcount < 2) {
5084                         cmd_free(h, abort);
5085                         return SUCCESS;
5086                 } else {
5087                         msleep(100);
5088                 }
5089         }
5090         dev_warn(&h->pdev->dev, "%s FAILED. Aborted command has not completed after %d seconds.\n",
5091                 msg, ABORT_COMPLETE_WAIT_SECS);
5092         cmd_free(h, abort);
5093         return FAILED;
5094 }
5095
5096 /*
5097  * For operations that cannot sleep, a command block is allocated at init,
5098  * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
5099  * which ones are free or in use.  Lock must be held when calling this.
5100  * cmd_free() is the complement.
5101  */
5102
5103 static struct CommandList *cmd_alloc(struct ctlr_info *h)
5104 {
5105         struct CommandList *c;
5106         int refcount, i;
5107         unsigned long offset;
5108
5109         /*
5110          * There is some *extremely* small but non-zero chance that that
5111          * multiple threads could get in here, and one thread could
5112          * be scanning through the list of bits looking for a free
5113          * one, but the free ones are always behind him, and other
5114          * threads sneak in behind him and eat them before he can
5115          * get to them, so that while there is always a free one, a
5116          * very unlucky thread might be starved anyway, never able to
5117          * beat the other threads.  In reality, this happens so
5118          * infrequently as to be indistinguishable from never.
5119          */
5120
5121         offset = h->last_allocation; /* benignly racy */
5122         for (;;) {
5123                 i = find_next_zero_bit(h->cmd_pool_bits, h->nr_cmds, offset);
5124                 if (unlikely(i == h->nr_cmds)) {
5125                         offset = 0;
5126                         continue;
5127                 }
5128                 c = h->cmd_pool + i;
5129                 refcount = atomic_inc_return(&c->refcount);
5130                 if (unlikely(refcount > 1)) {
5131                         cmd_free(h, c); /* already in use */
5132                         offset = (i + 1) % h->nr_cmds;
5133                         continue;
5134                 }
5135                 set_bit(i & (BITS_PER_LONG - 1),
5136                         h->cmd_pool_bits + (i / BITS_PER_LONG));
5137                 break; /* it's ours now. */
5138         }
5139         h->last_allocation = i; /* benignly racy */
5140         hpsa_cmd_partial_init(h, i, c);
5141         return c;
5142 }
5143
5144 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
5145 {
5146         if (atomic_dec_and_test(&c->refcount)) {
5147                 int i;
5148
5149                 i = c - h->cmd_pool;
5150                 clear_bit(i & (BITS_PER_LONG - 1),
5151                           h->cmd_pool_bits + (i / BITS_PER_LONG));
5152         }
5153 }
5154
5155 #ifdef CONFIG_COMPAT
5156
5157 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd,
5158         void __user *arg)
5159 {
5160         IOCTL32_Command_struct __user *arg32 =
5161             (IOCTL32_Command_struct __user *) arg;
5162         IOCTL_Command_struct arg64;
5163         IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
5164         int err;
5165         u32 cp;
5166
5167         memset(&arg64, 0, sizeof(arg64));
5168         err = 0;
5169         err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
5170                            sizeof(arg64.LUN_info));
5171         err |= copy_from_user(&arg64.Request, &arg32->Request,
5172                            sizeof(arg64.Request));
5173         err |= copy_from_user(&arg64.error_info, &arg32->error_info,
5174                            sizeof(arg64.error_info));
5175         err |= get_user(arg64.buf_size, &arg32->buf_size);
5176         err |= get_user(cp, &arg32->buf);
5177         arg64.buf = compat_ptr(cp);
5178         err |= copy_to_user(p, &arg64, sizeof(arg64));
5179
5180         if (err)
5181                 return -EFAULT;
5182
5183         err = hpsa_ioctl(dev, CCISS_PASSTHRU, p);
5184         if (err)
5185                 return err;
5186         err |= copy_in_user(&arg32->error_info, &p->error_info,
5187                          sizeof(arg32->error_info));
5188         if (err)
5189                 return -EFAULT;
5190         return err;
5191 }
5192
5193 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
5194         int cmd, void __user *arg)
5195 {
5196         BIG_IOCTL32_Command_struct __user *arg32 =
5197             (BIG_IOCTL32_Command_struct __user *) arg;
5198         BIG_IOCTL_Command_struct arg64;
5199         BIG_IOCTL_Command_struct __user *p =
5200             compat_alloc_user_space(sizeof(arg64));
5201         int err;
5202         u32 cp;
5203
5204         memset(&arg64, 0, sizeof(arg64));
5205         err = 0;
5206         err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
5207                            sizeof(arg64.LUN_info));
5208         err |= copy_from_user(&arg64.Request, &arg32->Request,
5209                            sizeof(arg64.Request));
5210         err |= copy_from_user(&arg64.error_info, &arg32->error_info,
5211                            sizeof(arg64.error_info));
5212         err |= get_user(arg64.buf_size, &arg32->buf_size);
5213         err |= get_user(arg64.malloc_size, &arg32->malloc_size);
5214         err |= get_user(cp, &arg32->buf);
5215         arg64.buf = compat_ptr(cp);
5216         err |= copy_to_user(p, &arg64, sizeof(arg64));
5217
5218         if (err)
5219                 return -EFAULT;
5220
5221         err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p);
5222         if (err)
5223                 return err;
5224         err |= copy_in_user(&arg32->error_info, &p->error_info,
5225                          sizeof(arg32->error_info));
5226         if (err)
5227                 return -EFAULT;
5228         return err;
5229 }
5230
5231 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
5232 {
5233         switch (cmd) {
5234         case CCISS_GETPCIINFO:
5235         case CCISS_GETINTINFO:
5236         case CCISS_SETINTINFO:
5237         case CCISS_GETNODENAME:
5238         case CCISS_SETNODENAME:
5239         case CCISS_GETHEARTBEAT:
5240         case CCISS_GETBUSTYPES:
5241         case CCISS_GETFIRMVER:
5242         case CCISS_GETDRIVVER:
5243         case CCISS_REVALIDVOLS:
5244         case CCISS_DEREGDISK:
5245         case CCISS_REGNEWDISK:
5246         case CCISS_REGNEWD:
5247         case CCISS_RESCANDISK:
5248         case CCISS_GETLUNINFO:
5249                 return hpsa_ioctl(dev, cmd, arg);
5250
5251         case CCISS_PASSTHRU32:
5252                 return hpsa_ioctl32_passthru(dev, cmd, arg);
5253         case CCISS_BIG_PASSTHRU32:
5254                 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
5255
5256         default:
5257                 return -ENOIOCTLCMD;
5258         }
5259 }
5260 #endif
5261
5262 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
5263 {
5264         struct hpsa_pci_info pciinfo;
5265
5266         if (!argp)
5267                 return -EINVAL;
5268         pciinfo.domain = pci_domain_nr(h->pdev->bus);
5269         pciinfo.bus = h->pdev->bus->number;
5270         pciinfo.dev_fn = h->pdev->devfn;
5271         pciinfo.board_id = h->board_id;
5272         if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
5273                 return -EFAULT;
5274         return 0;
5275 }
5276
5277 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
5278 {
5279         DriverVer_type DriverVer;
5280         unsigned char vmaj, vmin, vsubmin;
5281         int rc;
5282
5283         rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
5284                 &vmaj, &vmin, &vsubmin);
5285         if (rc != 3) {
5286                 dev_info(&h->pdev->dev, "driver version string '%s' "
5287                         "unrecognized.", HPSA_DRIVER_VERSION);
5288                 vmaj = 0;
5289                 vmin = 0;
5290                 vsubmin = 0;
5291         }
5292         DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
5293         if (!argp)
5294                 return -EINVAL;
5295         if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
5296                 return -EFAULT;
5297         return 0;
5298 }
5299
5300 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
5301 {
5302         IOCTL_Command_struct iocommand;
5303         struct CommandList *c;
5304         char *buff = NULL;
5305         u64 temp64;
5306         int rc = 0;
5307
5308         if (!argp)
5309                 return -EINVAL;
5310         if (!capable(CAP_SYS_RAWIO))
5311                 return -EPERM;
5312         if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
5313                 return -EFAULT;
5314         if ((iocommand.buf_size < 1) &&
5315             (iocommand.Request.Type.Direction != XFER_NONE)) {
5316                 return -EINVAL;
5317         }
5318         if (iocommand.buf_size > 0) {
5319                 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
5320                 if (buff == NULL)
5321                         return -EFAULT;
5322                 if (iocommand.Request.Type.Direction & XFER_WRITE) {
5323                         /* Copy the data into the buffer we created */
5324                         if (copy_from_user(buff, iocommand.buf,
5325                                 iocommand.buf_size)) {
5326                                 rc = -EFAULT;
5327                                 goto out_kfree;
5328                         }
5329                 } else {
5330                         memset(buff, 0, iocommand.buf_size);
5331                 }
5332         }
5333         c = cmd_alloc(h);
5334         if (c == NULL) {
5335                 rc = -ENOMEM;
5336                 goto out_kfree;
5337         }
5338         /* Fill in the command type */
5339         c->cmd_type = CMD_IOCTL_PEND;
5340         /* Fill in Command Header */
5341         c->Header.ReplyQueue = 0; /* unused in simple mode */
5342         if (iocommand.buf_size > 0) {   /* buffer to fill */
5343                 c->Header.SGList = 1;
5344                 c->Header.SGTotal = cpu_to_le16(1);
5345         } else  { /* no buffers to fill */
5346                 c->Header.SGList = 0;
5347                 c->Header.SGTotal = cpu_to_le16(0);
5348         }
5349         memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
5350
5351         /* Fill in Request block */
5352         memcpy(&c->Request, &iocommand.Request,
5353                 sizeof(c->Request));
5354
5355         /* Fill in the scatter gather information */
5356         if (iocommand.buf_size > 0) {
5357                 temp64 = pci_map_single(h->pdev, buff,
5358                         iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
5359                 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
5360                         c->SG[0].Addr = cpu_to_le64(0);
5361                         c->SG[0].Len = cpu_to_le32(0);
5362                         rc = -ENOMEM;
5363                         goto out;
5364                 }
5365                 c->SG[0].Addr = cpu_to_le64(temp64);
5366                 c->SG[0].Len = cpu_to_le32(iocommand.buf_size);
5367                 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
5368         }
5369         rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
5370         if (iocommand.buf_size > 0)
5371                 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
5372         check_ioctl_unit_attention(h, c);
5373         if (rc) {
5374                 rc = -EIO;
5375                 goto out;
5376         }
5377
5378         /* Copy the error information out */
5379         memcpy(&iocommand.error_info, c->err_info,
5380                 sizeof(iocommand.error_info));
5381         if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
5382                 rc = -EFAULT;
5383                 goto out;
5384         }
5385         if ((iocommand.Request.Type.Direction & XFER_READ) &&
5386                 iocommand.buf_size > 0) {
5387                 /* Copy the data out of the buffer we created */
5388                 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
5389                         rc = -EFAULT;
5390                         goto out;
5391                 }
5392         }
5393 out:
5394         cmd_free(h, c);
5395 out_kfree:
5396         kfree(buff);
5397         return rc;
5398 }
5399
5400 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
5401 {
5402         BIG_IOCTL_Command_struct *ioc;
5403         struct CommandList *c;
5404         unsigned char **buff = NULL;
5405         int *buff_size = NULL;
5406         u64 temp64;
5407         BYTE sg_used = 0;
5408         int status = 0;
5409         u32 left;
5410         u32 sz;
5411         BYTE __user *data_ptr;
5412
5413         if (!argp)
5414                 return -EINVAL;
5415         if (!capable(CAP_SYS_RAWIO))
5416                 return -EPERM;
5417         ioc = (BIG_IOCTL_Command_struct *)
5418             kmalloc(sizeof(*ioc), GFP_KERNEL);
5419         if (!ioc) {
5420                 status = -ENOMEM;
5421                 goto cleanup1;
5422         }
5423         if (copy_from_user(ioc, argp, sizeof(*ioc))) {
5424                 status = -EFAULT;
5425                 goto cleanup1;
5426         }
5427         if ((ioc->buf_size < 1) &&
5428             (ioc->Request.Type.Direction != XFER_NONE)) {
5429                 status = -EINVAL;
5430                 goto cleanup1;
5431         }
5432         /* Check kmalloc limits  using all SGs */
5433         if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
5434                 status = -EINVAL;
5435                 goto cleanup1;
5436         }
5437         if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
5438                 status = -EINVAL;
5439                 goto cleanup1;
5440         }
5441         buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
5442         if (!buff) {
5443                 status = -ENOMEM;
5444                 goto cleanup1;
5445         }
5446         buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
5447         if (!buff_size) {
5448                 status = -ENOMEM;
5449                 goto cleanup1;
5450         }
5451         left = ioc->buf_size;
5452         data_ptr = ioc->buf;
5453         while (left) {
5454                 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
5455                 buff_size[sg_used] = sz;
5456                 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
5457                 if (buff[sg_used] == NULL) {
5458                         status = -ENOMEM;
5459                         goto cleanup1;
5460                 }
5461                 if (ioc->Request.Type.Direction & XFER_WRITE) {
5462                         if (copy_from_user(buff[sg_used], data_ptr, sz)) {
5463                                 status = -EFAULT;
5464                                 goto cleanup1;
5465                         }
5466                 } else
5467                         memset(buff[sg_used], 0, sz);
5468                 left -= sz;
5469                 data_ptr += sz;
5470                 sg_used++;
5471         }
5472         c = cmd_alloc(h);
5473         if (c == NULL) {
5474                 status = -ENOMEM;
5475                 goto cleanup1;
5476         }
5477         c->cmd_type = CMD_IOCTL_PEND;
5478         c->Header.ReplyQueue = 0;
5479         c->Header.SGList = (u8) sg_used;
5480         c->Header.SGTotal = cpu_to_le16(sg_used);
5481         memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
5482         memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
5483         if (ioc->buf_size > 0) {
5484                 int i;
5485                 for (i = 0; i < sg_used; i++) {
5486                         temp64 = pci_map_single(h->pdev, buff[i],
5487                                     buff_size[i], PCI_DMA_BIDIRECTIONAL);
5488                         if (dma_mapping_error(&h->pdev->dev,
5489                                                         (dma_addr_t) temp64)) {
5490                                 c->SG[i].Addr = cpu_to_le64(0);
5491                                 c->SG[i].Len = cpu_to_le32(0);
5492                                 hpsa_pci_unmap(h->pdev, c, i,
5493                                         PCI_DMA_BIDIRECTIONAL);
5494                                 status = -ENOMEM;
5495                                 goto cleanup0;
5496                         }
5497                         c->SG[i].Addr = cpu_to_le64(temp64);
5498                         c->SG[i].Len = cpu_to_le32(buff_size[i]);
5499                         c->SG[i].Ext = cpu_to_le32(0);
5500                 }
5501                 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
5502         }
5503         status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
5504         if (sg_used)
5505                 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
5506         check_ioctl_unit_attention(h, c);
5507         if (status) {
5508                 status = -EIO;
5509                 goto cleanup0;
5510         }
5511
5512         /* Copy the error information out */
5513         memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
5514         if (copy_to_user(argp, ioc, sizeof(*ioc))) {
5515                 status = -EFAULT;
5516                 goto cleanup0;
5517         }
5518         if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
5519                 int i;
5520
5521                 /* Copy the data out of the buffer we created */
5522                 BYTE __user *ptr = ioc->buf;
5523                 for (i = 0; i < sg_used; i++) {
5524                         if (copy_to_user(ptr, buff[i], buff_size[i])) {
5525                                 status = -EFAULT;
5526                                 goto cleanup0;
5527                         }
5528                         ptr += buff_size[i];
5529                 }
5530         }
5531         status = 0;
5532 cleanup0:
5533         cmd_free(h, c);
5534 cleanup1:
5535         if (buff) {
5536                 int i;
5537
5538                 for (i = 0; i < sg_used; i++)
5539                         kfree(buff[i]);
5540                 kfree(buff);
5541         }
5542         kfree(buff_size);
5543         kfree(ioc);
5544         return status;
5545 }
5546
5547 static void check_ioctl_unit_attention(struct ctlr_info *h,
5548         struct CommandList *c)
5549 {
5550         if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5551                         c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
5552                 (void) check_for_unit_attention(h, c);
5553 }
5554
5555 /*
5556  * ioctl
5557  */
5558 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
5559 {
5560         struct ctlr_info *h;
5561         void __user *argp = (void __user *)arg;
5562         int rc;
5563
5564         h = sdev_to_hba(dev);
5565
5566         switch (cmd) {
5567         case CCISS_DEREGDISK:
5568         case CCISS_REGNEWDISK:
5569         case CCISS_REGNEWD:
5570                 hpsa_scan_start(h->scsi_host);
5571                 return 0;
5572         case CCISS_GETPCIINFO:
5573                 return hpsa_getpciinfo_ioctl(h, argp);
5574         case CCISS_GETDRIVVER:
5575                 return hpsa_getdrivver_ioctl(h, argp);
5576         case CCISS_PASSTHRU:
5577                 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
5578                         return -EAGAIN;
5579                 rc = hpsa_passthru_ioctl(h, argp);
5580                 atomic_inc(&h->passthru_cmds_avail);
5581                 return rc;
5582         case CCISS_BIG_PASSTHRU:
5583                 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
5584                         return -EAGAIN;
5585                 rc = hpsa_big_passthru_ioctl(h, argp);
5586                 atomic_inc(&h->passthru_cmds_avail);
5587                 return rc;
5588         default:
5589                 return -ENOTTY;
5590         }
5591 }
5592
5593 static int hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
5594                                 u8 reset_type)
5595 {
5596         struct CommandList *c;
5597
5598         c = cmd_alloc(h);
5599         if (!c)
5600                 return -ENOMEM;
5601         /* fill_cmd can't fail here, no data buffer to map */
5602         (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
5603                 RAID_CTLR_LUNID, TYPE_MSG);
5604         c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
5605         c->waiting = NULL;
5606         enqueue_cmd_and_start_io(h, c);
5607         /* Don't wait for completion, the reset won't complete.  Don't free
5608          * the command either.  This is the last command we will send before
5609          * re-initializing everything, so it doesn't matter and won't leak.
5610          */
5611         return 0;
5612 }
5613
5614 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
5615         void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
5616         int cmd_type)
5617 {
5618         int pci_dir = XFER_NONE;
5619         u64 tag; /* for commands to be aborted */
5620
5621         c->cmd_type = CMD_IOCTL_PEND;
5622         c->Header.ReplyQueue = 0;
5623         if (buff != NULL && size > 0) {
5624                 c->Header.SGList = 1;
5625                 c->Header.SGTotal = cpu_to_le16(1);
5626         } else {
5627                 c->Header.SGList = 0;
5628                 c->Header.SGTotal = cpu_to_le16(0);
5629         }
5630         memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
5631
5632         if (cmd_type == TYPE_CMD) {
5633                 switch (cmd) {
5634                 case HPSA_INQUIRY:
5635                         /* are we trying to read a vital product page */
5636                         if (page_code & VPD_PAGE) {
5637                                 c->Request.CDB[1] = 0x01;
5638                                 c->Request.CDB[2] = (page_code & 0xff);
5639                         }
5640                         c->Request.CDBLen = 6;
5641                         c->Request.type_attr_dir =
5642                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5643                         c->Request.Timeout = 0;
5644                         c->Request.CDB[0] = HPSA_INQUIRY;
5645                         c->Request.CDB[4] = size & 0xFF;
5646                         break;
5647                 case HPSA_REPORT_LOG:
5648                 case HPSA_REPORT_PHYS:
5649                         /* Talking to controller so It's a physical command
5650                            mode = 00 target = 0.  Nothing to write.
5651                          */
5652                         c->Request.CDBLen = 12;
5653                         c->Request.type_attr_dir =
5654                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5655                         c->Request.Timeout = 0;
5656                         c->Request.CDB[0] = cmd;
5657                         c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
5658                         c->Request.CDB[7] = (size >> 16) & 0xFF;
5659                         c->Request.CDB[8] = (size >> 8) & 0xFF;
5660                         c->Request.CDB[9] = size & 0xFF;
5661                         break;
5662                 case HPSA_CACHE_FLUSH:
5663                         c->Request.CDBLen = 12;
5664                         c->Request.type_attr_dir =
5665                                         TYPE_ATTR_DIR(cmd_type,
5666                                                 ATTR_SIMPLE, XFER_WRITE);
5667                         c->Request.Timeout = 0;
5668                         c->Request.CDB[0] = BMIC_WRITE;
5669                         c->Request.CDB[6] = BMIC_CACHE_FLUSH;
5670                         c->Request.CDB[7] = (size >> 8) & 0xFF;
5671                         c->Request.CDB[8] = size & 0xFF;
5672                         break;
5673                 case TEST_UNIT_READY:
5674                         c->Request.CDBLen = 6;
5675                         c->Request.type_attr_dir =
5676                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
5677                         c->Request.Timeout = 0;
5678                         break;
5679                 case HPSA_GET_RAID_MAP:
5680                         c->Request.CDBLen = 12;
5681                         c->Request.type_attr_dir =
5682                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5683                         c->Request.Timeout = 0;
5684                         c->Request.CDB[0] = HPSA_CISS_READ;
5685                         c->Request.CDB[1] = cmd;
5686                         c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
5687                         c->Request.CDB[7] = (size >> 16) & 0xFF;
5688                         c->Request.CDB[8] = (size >> 8) & 0xFF;
5689                         c->Request.CDB[9] = size & 0xFF;
5690                         break;
5691                 case BMIC_SENSE_CONTROLLER_PARAMETERS:
5692                         c->Request.CDBLen = 10;
5693                         c->Request.type_attr_dir =
5694                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5695                         c->Request.Timeout = 0;
5696                         c->Request.CDB[0] = BMIC_READ;
5697                         c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
5698                         c->Request.CDB[7] = (size >> 16) & 0xFF;
5699                         c->Request.CDB[8] = (size >> 8) & 0xFF;
5700                         break;
5701                 case BMIC_IDENTIFY_PHYSICAL_DEVICE:
5702                         c->Request.CDBLen = 10;
5703                         c->Request.type_attr_dir =
5704                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5705                         c->Request.Timeout = 0;
5706                         c->Request.CDB[0] = BMIC_READ;
5707                         c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
5708                         c->Request.CDB[7] = (size >> 16) & 0xFF;
5709                         c->Request.CDB[8] = (size >> 8) & 0XFF;
5710                         break;
5711                 default:
5712                         dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
5713                         BUG();
5714                         return -1;
5715                 }
5716         } else if (cmd_type == TYPE_MSG) {
5717                 switch (cmd) {
5718
5719                 case  HPSA_DEVICE_RESET_MSG:
5720                         c->Request.CDBLen = 16;
5721                         c->Request.type_attr_dir =
5722                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
5723                         c->Request.Timeout = 0; /* Don't time out */
5724                         memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
5725                         c->Request.CDB[0] =  cmd;
5726                         c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
5727                         /* If bytes 4-7 are zero, it means reset the */
5728                         /* LunID device */
5729                         c->Request.CDB[4] = 0x00;
5730                         c->Request.CDB[5] = 0x00;
5731                         c->Request.CDB[6] = 0x00;
5732                         c->Request.CDB[7] = 0x00;
5733                         break;
5734                 case  HPSA_ABORT_MSG:
5735                         memcpy(&tag, buff, sizeof(tag));
5736                         dev_dbg(&h->pdev->dev,
5737                                 "Abort Tag:0x%016llx using rqst Tag:0x%016llx",
5738                                 tag, c->Header.tag);
5739                         c->Request.CDBLen = 16;
5740                         c->Request.type_attr_dir =
5741                                         TYPE_ATTR_DIR(cmd_type,
5742                                                 ATTR_SIMPLE, XFER_WRITE);
5743                         c->Request.Timeout = 0; /* Don't time out */
5744                         c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
5745                         c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
5746                         c->Request.CDB[2] = 0x00; /* reserved */
5747                         c->Request.CDB[3] = 0x00; /* reserved */
5748                         /* Tag to abort goes in CDB[4]-CDB[11] */
5749                         memcpy(&c->Request.CDB[4], &tag, sizeof(tag));
5750                         c->Request.CDB[12] = 0x00; /* reserved */
5751                         c->Request.CDB[13] = 0x00; /* reserved */
5752                         c->Request.CDB[14] = 0x00; /* reserved */
5753                         c->Request.CDB[15] = 0x00; /* reserved */
5754                 break;
5755                 default:
5756                         dev_warn(&h->pdev->dev, "unknown message type %d\n",
5757                                 cmd);
5758                         BUG();
5759                 }
5760         } else {
5761                 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
5762                 BUG();
5763         }
5764
5765         switch (GET_DIR(c->Request.type_attr_dir)) {
5766         case XFER_READ:
5767                 pci_dir = PCI_DMA_FROMDEVICE;
5768                 break;
5769         case XFER_WRITE:
5770                 pci_dir = PCI_DMA_TODEVICE;
5771                 break;
5772         case XFER_NONE:
5773                 pci_dir = PCI_DMA_NONE;
5774                 break;
5775         default:
5776                 pci_dir = PCI_DMA_BIDIRECTIONAL;
5777         }
5778         if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
5779                 return -1;
5780         return 0;
5781 }
5782
5783 /*
5784  * Map (physical) PCI mem into (virtual) kernel space
5785  */
5786 static void __iomem *remap_pci_mem(ulong base, ulong size)
5787 {
5788         ulong page_base = ((ulong) base) & PAGE_MASK;
5789         ulong page_offs = ((ulong) base) - page_base;
5790         void __iomem *page_remapped = ioremap_nocache(page_base,
5791                 page_offs + size);
5792
5793         return page_remapped ? (page_remapped + page_offs) : NULL;
5794 }
5795
5796 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
5797 {
5798         return h->access.command_completed(h, q);
5799 }
5800
5801 static inline bool interrupt_pending(struct ctlr_info *h)
5802 {
5803         return h->access.intr_pending(h);
5804 }
5805
5806 static inline long interrupt_not_for_us(struct ctlr_info *h)
5807 {
5808         return (h->access.intr_pending(h) == 0) ||
5809                 (h->interrupts_enabled == 0);
5810 }
5811
5812 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
5813         u32 raw_tag)
5814 {
5815         if (unlikely(tag_index >= h->nr_cmds)) {
5816                 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
5817                 return 1;
5818         }
5819         return 0;
5820 }
5821
5822 static inline void finish_cmd(struct CommandList *c)
5823 {
5824         dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
5825         if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
5826                         || c->cmd_type == CMD_IOACCEL2))
5827                 complete_scsi_command(c);
5828         else if (c->cmd_type == CMD_IOCTL_PEND)
5829                 complete(c->waiting);
5830 }
5831
5832
5833 static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
5834 {
5835 #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
5836 #define HPSA_SIMPLE_ERROR_BITS 0x03
5837         if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
5838                 return tag & ~HPSA_SIMPLE_ERROR_BITS;
5839         return tag & ~HPSA_PERF_ERROR_BITS;
5840 }
5841
5842 /* process completion of an indexed ("direct lookup") command */
5843 static inline void process_indexed_cmd(struct ctlr_info *h,
5844         u32 raw_tag)
5845 {
5846         u32 tag_index;
5847         struct CommandList *c;
5848
5849         tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
5850         if (!bad_tag(h, tag_index, raw_tag)) {
5851                 c = h->cmd_pool + tag_index;
5852                 finish_cmd(c);
5853         }
5854 }
5855
5856 /* Some controllers, like p400, will give us one interrupt
5857  * after a soft reset, even if we turned interrupts off.
5858  * Only need to check for this in the hpsa_xxx_discard_completions
5859  * functions.
5860  */
5861 static int ignore_bogus_interrupt(struct ctlr_info *h)
5862 {
5863         if (likely(!reset_devices))
5864                 return 0;
5865
5866         if (likely(h->interrupts_enabled))
5867                 return 0;
5868
5869         dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
5870                 "(known firmware bug.)  Ignoring.\n");
5871
5872         return 1;
5873 }
5874
5875 /*
5876  * Convert &h->q[x] (passed to interrupt handlers) back to h.
5877  * Relies on (h-q[x] == x) being true for x such that
5878  * 0 <= x < MAX_REPLY_QUEUES.
5879  */
5880 static struct ctlr_info *queue_to_hba(u8 *queue)
5881 {
5882         return container_of((queue - *queue), struct ctlr_info, q[0]);
5883 }
5884
5885 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
5886 {
5887         struct ctlr_info *h = queue_to_hba(queue);
5888         u8 q = *(u8 *) queue;
5889         u32 raw_tag;
5890
5891         if (ignore_bogus_interrupt(h))
5892                 return IRQ_NONE;
5893
5894         if (interrupt_not_for_us(h))
5895                 return IRQ_NONE;
5896         h->last_intr_timestamp = get_jiffies_64();
5897         while (interrupt_pending(h)) {
5898                 raw_tag = get_next_completion(h, q);
5899                 while (raw_tag != FIFO_EMPTY)
5900                         raw_tag = next_command(h, q);
5901         }
5902         return IRQ_HANDLED;
5903 }
5904
5905 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
5906 {
5907         struct ctlr_info *h = queue_to_hba(queue);
5908         u32 raw_tag;
5909         u8 q = *(u8 *) queue;
5910
5911         if (ignore_bogus_interrupt(h))
5912                 return IRQ_NONE;
5913
5914         h->last_intr_timestamp = get_jiffies_64();
5915         raw_tag = get_next_completion(h, q);
5916         while (raw_tag != FIFO_EMPTY)
5917                 raw_tag = next_command(h, q);
5918         return IRQ_HANDLED;
5919 }
5920
5921 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
5922 {
5923         struct ctlr_info *h = queue_to_hba((u8 *) queue);
5924         u32 raw_tag;
5925         u8 q = *(u8 *) queue;
5926
5927         if (interrupt_not_for_us(h))
5928                 return IRQ_NONE;
5929         h->last_intr_timestamp = get_jiffies_64();
5930         while (interrupt_pending(h)) {
5931                 raw_tag = get_next_completion(h, q);
5932                 while (raw_tag != FIFO_EMPTY) {
5933                         process_indexed_cmd(h, raw_tag);
5934                         raw_tag = next_command(h, q);
5935                 }
5936         }
5937         return IRQ_HANDLED;
5938 }
5939
5940 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
5941 {
5942         struct ctlr_info *h = queue_to_hba(queue);
5943         u32 raw_tag;
5944         u8 q = *(u8 *) queue;
5945
5946         h->last_intr_timestamp = get_jiffies_64();
5947         raw_tag = get_next_completion(h, q);
5948         while (raw_tag != FIFO_EMPTY) {
5949                 process_indexed_cmd(h, raw_tag);
5950                 raw_tag = next_command(h, q);
5951         }
5952         return IRQ_HANDLED;
5953 }
5954
5955 /* Send a message CDB to the firmware. Careful, this only works
5956  * in simple mode, not performant mode due to the tag lookup.
5957  * We only ever use this immediately after a controller reset.
5958  */
5959 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
5960                         unsigned char type)
5961 {
5962         struct Command {
5963                 struct CommandListHeader CommandHeader;
5964                 struct RequestBlock Request;
5965                 struct ErrDescriptor ErrorDescriptor;
5966         };
5967         struct Command *cmd;
5968         static const size_t cmd_sz = sizeof(*cmd) +
5969                                         sizeof(cmd->ErrorDescriptor);
5970         dma_addr_t paddr64;
5971         __le32 paddr32;
5972         u32 tag;
5973         void __iomem *vaddr;
5974         int i, err;
5975
5976         vaddr = pci_ioremap_bar(pdev, 0);
5977         if (vaddr == NULL)
5978                 return -ENOMEM;
5979
5980         /* The Inbound Post Queue only accepts 32-bit physical addresses for the
5981          * CCISS commands, so they must be allocated from the lower 4GiB of
5982          * memory.
5983          */
5984         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
5985         if (err) {
5986                 iounmap(vaddr);
5987                 return err;
5988         }
5989
5990         cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
5991         if (cmd == NULL) {
5992                 iounmap(vaddr);
5993                 return -ENOMEM;
5994         }
5995
5996         /* This must fit, because of the 32-bit consistent DMA mask.  Also,
5997          * although there's no guarantee, we assume that the address is at
5998          * least 4-byte aligned (most likely, it's page-aligned).
5999          */
6000         paddr32 = cpu_to_le32(paddr64);
6001
6002         cmd->CommandHeader.ReplyQueue = 0;
6003         cmd->CommandHeader.SGList = 0;
6004         cmd->CommandHeader.SGTotal = cpu_to_le16(0);
6005         cmd->CommandHeader.tag = cpu_to_le64(paddr64);
6006         memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
6007
6008         cmd->Request.CDBLen = 16;
6009         cmd->Request.type_attr_dir =
6010                         TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
6011         cmd->Request.Timeout = 0; /* Don't time out */
6012         cmd->Request.CDB[0] = opcode;
6013         cmd->Request.CDB[1] = type;
6014         memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
6015         cmd->ErrorDescriptor.Addr =
6016                         cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
6017         cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
6018
6019         writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
6020
6021         for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
6022                 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
6023                 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
6024                         break;
6025                 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
6026         }
6027
6028         iounmap(vaddr);
6029
6030         /* we leak the DMA buffer here ... no choice since the controller could
6031          *  still complete the command.
6032          */
6033         if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
6034                 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
6035                         opcode, type);
6036                 return -ETIMEDOUT;
6037         }
6038
6039         pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
6040
6041         if (tag & HPSA_ERROR_BIT) {
6042                 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
6043                         opcode, type);
6044                 return -EIO;
6045         }
6046
6047         dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
6048                 opcode, type);
6049         return 0;
6050 }
6051
6052 #define hpsa_noop(p) hpsa_message(p, 3, 0)
6053
6054 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
6055         void __iomem *vaddr, u32 use_doorbell)
6056 {
6057
6058         if (use_doorbell) {
6059                 /* For everything after the P600, the PCI power state method
6060                  * of resetting the controller doesn't work, so we have this
6061                  * other way using the doorbell register.
6062                  */
6063                 dev_info(&pdev->dev, "using doorbell to reset controller\n");
6064                 writel(use_doorbell, vaddr + SA5_DOORBELL);
6065
6066                 /* PMC hardware guys tell us we need a 10 second delay after
6067                  * doorbell reset and before any attempt to talk to the board
6068                  * at all to ensure that this actually works and doesn't fall
6069                  * over in some weird corner cases.
6070                  */
6071                 msleep(10000);
6072         } else { /* Try to do it the PCI power state way */
6073
6074                 /* Quoting from the Open CISS Specification: "The Power
6075                  * Management Control/Status Register (CSR) controls the power
6076                  * state of the device.  The normal operating state is D0,
6077                  * CSR=00h.  The software off state is D3, CSR=03h.  To reset
6078                  * the controller, place the interface device in D3 then to D0,
6079                  * this causes a secondary PCI reset which will reset the
6080                  * controller." */
6081
6082                 int rc = 0;
6083
6084                 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
6085
6086                 /* enter the D3hot power management state */
6087                 rc = pci_set_power_state(pdev, PCI_D3hot);
6088                 if (rc)
6089                         return rc;
6090
6091                 msleep(500);
6092
6093                 /* enter the D0 power management state */
6094                 rc = pci_set_power_state(pdev, PCI_D0);
6095                 if (rc)
6096                         return rc;
6097
6098                 /*
6099                  * The P600 requires a small delay when changing states.
6100                  * Otherwise we may think the board did not reset and we bail.
6101                  * This for kdump only and is particular to the P600.
6102                  */
6103                 msleep(500);
6104         }
6105         return 0;
6106 }
6107
6108 static void init_driver_version(char *driver_version, int len)
6109 {
6110         memset(driver_version, 0, len);
6111         strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
6112 }
6113
6114 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
6115 {
6116         char *driver_version;
6117         int i, size = sizeof(cfgtable->driver_version);
6118
6119         driver_version = kmalloc(size, GFP_KERNEL);
6120         if (!driver_version)
6121                 return -ENOMEM;
6122
6123         init_driver_version(driver_version, size);
6124         for (i = 0; i < size; i++)
6125                 writeb(driver_version[i], &cfgtable->driver_version[i]);
6126         kfree(driver_version);
6127         return 0;
6128 }
6129
6130 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
6131                                           unsigned char *driver_ver)
6132 {
6133         int i;
6134
6135         for (i = 0; i < sizeof(cfgtable->driver_version); i++)
6136                 driver_ver[i] = readb(&cfgtable->driver_version[i]);
6137 }
6138
6139 static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
6140 {
6141
6142         char *driver_ver, *old_driver_ver;
6143         int rc, size = sizeof(cfgtable->driver_version);
6144
6145         old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
6146         if (!old_driver_ver)
6147                 return -ENOMEM;
6148         driver_ver = old_driver_ver + size;
6149
6150         /* After a reset, the 32 bytes of "driver version" in the cfgtable
6151          * should have been changed, otherwise we know the reset failed.
6152          */
6153         init_driver_version(old_driver_ver, size);
6154         read_driver_ver_from_cfgtable(cfgtable, driver_ver);
6155         rc = !memcmp(driver_ver, old_driver_ver, size);
6156         kfree(old_driver_ver);
6157         return rc;
6158 }
6159 /* This does a hard reset of the controller using PCI power management
6160  * states or the using the doorbell register.
6161  */
6162 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id)
6163 {
6164         u64 cfg_offset;
6165         u32 cfg_base_addr;
6166         u64 cfg_base_addr_index;
6167         void __iomem *vaddr;
6168         unsigned long paddr;
6169         u32 misc_fw_support;
6170         int rc;
6171         struct CfgTable __iomem *cfgtable;
6172         u32 use_doorbell;
6173         u16 command_register;
6174
6175         /* For controllers as old as the P600, this is very nearly
6176          * the same thing as
6177          *
6178          * pci_save_state(pci_dev);
6179          * pci_set_power_state(pci_dev, PCI_D3hot);
6180          * pci_set_power_state(pci_dev, PCI_D0);
6181          * pci_restore_state(pci_dev);
6182          *
6183          * For controllers newer than the P600, the pci power state
6184          * method of resetting doesn't work so we have another way
6185          * using the doorbell register.
6186          */
6187
6188         if (!ctlr_is_resettable(board_id)) {
6189                 dev_warn(&pdev->dev, "Controller not resettable\n");
6190                 return -ENODEV;
6191         }
6192
6193         /* if controller is soft- but not hard resettable... */
6194         if (!ctlr_is_hard_resettable(board_id))
6195                 return -ENOTSUPP; /* try soft reset later. */
6196
6197         /* Save the PCI command register */
6198         pci_read_config_word(pdev, 4, &command_register);
6199         pci_save_state(pdev);
6200
6201         /* find the first memory BAR, so we can find the cfg table */
6202         rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
6203         if (rc)
6204                 return rc;
6205         vaddr = remap_pci_mem(paddr, 0x250);
6206         if (!vaddr)
6207                 return -ENOMEM;
6208
6209         /* find cfgtable in order to check if reset via doorbell is supported */
6210         rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
6211                                         &cfg_base_addr_index, &cfg_offset);
6212         if (rc)
6213                 goto unmap_vaddr;
6214         cfgtable = remap_pci_mem(pci_resource_start(pdev,
6215                        cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
6216         if (!cfgtable) {
6217                 rc = -ENOMEM;
6218                 goto unmap_vaddr;
6219         }
6220         rc = write_driver_ver_to_cfgtable(cfgtable);
6221         if (rc)
6222                 goto unmap_cfgtable;
6223
6224         /* If reset via doorbell register is supported, use that.
6225          * There are two such methods.  Favor the newest method.
6226          */
6227         misc_fw_support = readl(&cfgtable->misc_fw_support);
6228         use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
6229         if (use_doorbell) {
6230                 use_doorbell = DOORBELL_CTLR_RESET2;
6231         } else {
6232                 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
6233                 if (use_doorbell) {
6234                         dev_warn(&pdev->dev,
6235                                 "Soft reset not supported. Firmware update is required.\n");
6236                         rc = -ENOTSUPP; /* try soft reset */
6237                         goto unmap_cfgtable;
6238                 }
6239         }
6240
6241         rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
6242         if (rc)
6243                 goto unmap_cfgtable;
6244
6245         pci_restore_state(pdev);
6246         pci_write_config_word(pdev, 4, command_register);
6247
6248         /* Some devices (notably the HP Smart Array 5i Controller)
6249            need a little pause here */
6250         msleep(HPSA_POST_RESET_PAUSE_MSECS);
6251
6252         rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
6253         if (rc) {
6254                 dev_warn(&pdev->dev,
6255                         "Failed waiting for board to become ready after hard reset\n");
6256                 goto unmap_cfgtable;
6257         }
6258
6259         rc = controller_reset_failed(vaddr);
6260         if (rc < 0)
6261                 goto unmap_cfgtable;
6262         if (rc) {
6263                 dev_warn(&pdev->dev, "Unable to successfully reset "
6264                         "controller. Will try soft reset.\n");
6265                 rc = -ENOTSUPP;
6266         } else {
6267                 dev_info(&pdev->dev, "board ready after hard reset.\n");
6268         }
6269
6270 unmap_cfgtable:
6271         iounmap(cfgtable);
6272
6273 unmap_vaddr:
6274         iounmap(vaddr);
6275         return rc;
6276 }
6277
6278 /*
6279  *  We cannot read the structure directly, for portability we must use
6280  *   the io functions.
6281  *   This is for debug only.
6282  */
6283 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
6284 {
6285 #ifdef HPSA_DEBUG
6286         int i;
6287         char temp_name[17];
6288
6289         dev_info(dev, "Controller Configuration information\n");
6290         dev_info(dev, "------------------------------------\n");
6291         for (i = 0; i < 4; i++)
6292                 temp_name[i] = readb(&(tb->Signature[i]));
6293         temp_name[4] = '\0';
6294         dev_info(dev, "   Signature = %s\n", temp_name);
6295         dev_info(dev, "   Spec Number = %d\n", readl(&(tb->SpecValence)));
6296         dev_info(dev, "   Transport methods supported = 0x%x\n",
6297                readl(&(tb->TransportSupport)));
6298         dev_info(dev, "   Transport methods active = 0x%x\n",
6299                readl(&(tb->TransportActive)));
6300         dev_info(dev, "   Requested transport Method = 0x%x\n",
6301                readl(&(tb->HostWrite.TransportRequest)));
6302         dev_info(dev, "   Coalesce Interrupt Delay = 0x%x\n",
6303                readl(&(tb->HostWrite.CoalIntDelay)));
6304         dev_info(dev, "   Coalesce Interrupt Count = 0x%x\n",
6305                readl(&(tb->HostWrite.CoalIntCount)));
6306         dev_info(dev, "   Max outstanding commands = %d\n",
6307                readl(&(tb->CmdsOutMax)));
6308         dev_info(dev, "   Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
6309         for (i = 0; i < 16; i++)
6310                 temp_name[i] = readb(&(tb->ServerName[i]));
6311         temp_name[16] = '\0';
6312         dev_info(dev, "   Server Name = %s\n", temp_name);
6313         dev_info(dev, "   Heartbeat Counter = 0x%x\n\n\n",
6314                 readl(&(tb->HeartBeat)));
6315 #endif                          /* HPSA_DEBUG */
6316 }
6317
6318 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
6319 {
6320         int i, offset, mem_type, bar_type;
6321
6322         if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
6323                 return 0;
6324         offset = 0;
6325         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
6326                 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
6327                 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
6328                         offset += 4;
6329                 else {
6330                         mem_type = pci_resource_flags(pdev, i) &
6331                             PCI_BASE_ADDRESS_MEM_TYPE_MASK;
6332                         switch (mem_type) {
6333                         case PCI_BASE_ADDRESS_MEM_TYPE_32:
6334                         case PCI_BASE_ADDRESS_MEM_TYPE_1M:
6335                                 offset += 4;    /* 32 bit */
6336                                 break;
6337                         case PCI_BASE_ADDRESS_MEM_TYPE_64:
6338                                 offset += 8;
6339                                 break;
6340                         default:        /* reserved in PCI 2.2 */
6341                                 dev_warn(&pdev->dev,
6342                                        "base address is invalid\n");
6343                                 return -1;
6344                                 break;
6345                         }
6346                 }
6347                 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
6348                         return i + 1;
6349         }
6350         return -1;
6351 }
6352
6353 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
6354  * controllers that are capable. If not, we use legacy INTx mode.
6355  */
6356
6357 static void hpsa_interrupt_mode(struct ctlr_info *h)
6358 {
6359 #ifdef CONFIG_PCI_MSI
6360         int err, i;
6361         struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
6362
6363         for (i = 0; i < MAX_REPLY_QUEUES; i++) {
6364                 hpsa_msix_entries[i].vector = 0;
6365                 hpsa_msix_entries[i].entry = i;
6366         }
6367
6368         /* Some boards advertise MSI but don't really support it */
6369         if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
6370             (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
6371                 goto default_int_mode;
6372         if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
6373                 dev_info(&h->pdev->dev, "MSI-X capable controller\n");
6374                 h->msix_vector = MAX_REPLY_QUEUES;
6375                 if (h->msix_vector > num_online_cpus())
6376                         h->msix_vector = num_online_cpus();
6377                 err = pci_enable_msix_range(h->pdev, hpsa_msix_entries,
6378                                             1, h->msix_vector);
6379                 if (err < 0) {
6380                         dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", err);
6381                         h->msix_vector = 0;
6382                         goto single_msi_mode;
6383                 } else if (err < h->msix_vector) {
6384                         dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
6385                                "available\n", err);
6386                 }
6387                 h->msix_vector = err;
6388                 for (i = 0; i < h->msix_vector; i++)
6389                         h->intr[i] = hpsa_msix_entries[i].vector;
6390                 return;
6391         }
6392 single_msi_mode:
6393         if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
6394                 dev_info(&h->pdev->dev, "MSI capable controller\n");
6395                 if (!pci_enable_msi(h->pdev))
6396                         h->msi_vector = 1;
6397                 else
6398                         dev_warn(&h->pdev->dev, "MSI init failed\n");
6399         }
6400 default_int_mode:
6401 #endif                          /* CONFIG_PCI_MSI */
6402         /* if we get here we're going to use the default interrupt mode */
6403         h->intr[h->intr_mode] = h->pdev->irq;
6404 }
6405
6406 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
6407 {
6408         int i;
6409         u32 subsystem_vendor_id, subsystem_device_id;
6410
6411         subsystem_vendor_id = pdev->subsystem_vendor;
6412         subsystem_device_id = pdev->subsystem_device;
6413         *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
6414                     subsystem_vendor_id;
6415
6416         for (i = 0; i < ARRAY_SIZE(products); i++)
6417                 if (*board_id == products[i].board_id)
6418                         return i;
6419
6420         if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
6421                 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
6422                 !hpsa_allow_any) {
6423                 dev_warn(&pdev->dev, "unrecognized board ID: "
6424                         "0x%08x, ignoring.\n", *board_id);
6425                         return -ENODEV;
6426         }
6427         return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
6428 }
6429
6430 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
6431                                     unsigned long *memory_bar)
6432 {
6433         int i;
6434
6435         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
6436                 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
6437                         /* addressing mode bits already removed */
6438                         *memory_bar = pci_resource_start(pdev, i);
6439                         dev_dbg(&pdev->dev, "memory BAR = %lx\n",
6440                                 *memory_bar);
6441                         return 0;
6442                 }
6443         dev_warn(&pdev->dev, "no memory BAR found\n");
6444         return -ENODEV;
6445 }
6446
6447 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
6448                                      int wait_for_ready)
6449 {
6450         int i, iterations;
6451         u32 scratchpad;
6452         if (wait_for_ready)
6453                 iterations = HPSA_BOARD_READY_ITERATIONS;
6454         else
6455                 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
6456
6457         for (i = 0; i < iterations; i++) {
6458                 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
6459                 if (wait_for_ready) {
6460                         if (scratchpad == HPSA_FIRMWARE_READY)
6461                                 return 0;
6462                 } else {
6463                         if (scratchpad != HPSA_FIRMWARE_READY)
6464                                 return 0;
6465                 }
6466                 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
6467         }
6468         dev_warn(&pdev->dev, "board not ready, timed out.\n");
6469         return -ENODEV;
6470 }
6471
6472 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
6473                                u32 *cfg_base_addr, u64 *cfg_base_addr_index,
6474                                u64 *cfg_offset)
6475 {
6476         *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
6477         *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
6478         *cfg_base_addr &= (u32) 0x0000ffff;
6479         *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
6480         if (*cfg_base_addr_index == -1) {
6481                 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
6482                 return -ENODEV;
6483         }
6484         return 0;
6485 }
6486
6487 static int hpsa_find_cfgtables(struct ctlr_info *h)
6488 {
6489         u64 cfg_offset;
6490         u32 cfg_base_addr;
6491         u64 cfg_base_addr_index;
6492         u32 trans_offset;
6493         int rc;
6494
6495         rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
6496                 &cfg_base_addr_index, &cfg_offset);
6497         if (rc)
6498                 return rc;
6499         h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
6500                        cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
6501         if (!h->cfgtable) {
6502                 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
6503                 return -ENOMEM;
6504         }
6505         rc = write_driver_ver_to_cfgtable(h->cfgtable);
6506         if (rc)
6507                 return rc;
6508         /* Find performant mode table. */
6509         trans_offset = readl(&h->cfgtable->TransMethodOffset);
6510         h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
6511                                 cfg_base_addr_index)+cfg_offset+trans_offset,
6512                                 sizeof(*h->transtable));
6513         if (!h->transtable)
6514                 return -ENOMEM;
6515         return 0;
6516 }
6517
6518 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
6519 {
6520 #define MIN_MAX_COMMANDS 16
6521         BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS);
6522
6523         h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
6524
6525         /* Limit commands in memory limited kdump scenario. */
6526         if (reset_devices && h->max_commands > 32)
6527                 h->max_commands = 32;
6528
6529         if (h->max_commands < MIN_MAX_COMMANDS) {
6530                 dev_warn(&h->pdev->dev,
6531                         "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n",
6532                         h->max_commands,
6533                         MIN_MAX_COMMANDS);
6534                 h->max_commands = MIN_MAX_COMMANDS;
6535         }
6536 }
6537
6538 /* If the controller reports that the total max sg entries is greater than 512,
6539  * then we know that chained SG blocks work.  (Original smart arrays did not
6540  * support chained SG blocks and would return zero for max sg entries.)
6541  */
6542 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
6543 {
6544         return h->maxsgentries > 512;
6545 }
6546
6547 /* Interrogate the hardware for some limits:
6548  * max commands, max SG elements without chaining, and with chaining,
6549  * SG chain block size, etc.
6550  */
6551 static void hpsa_find_board_params(struct ctlr_info *h)
6552 {
6553         hpsa_get_max_perf_mode_cmds(h);
6554         h->nr_cmds = h->max_commands;
6555         h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
6556         h->fw_support = readl(&(h->cfgtable->misc_fw_support));
6557         if (hpsa_supports_chained_sg_blocks(h)) {
6558                 /* Limit in-command s/g elements to 32 save dma'able memory. */
6559                 h->max_cmd_sg_entries = 32;
6560                 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
6561                 h->maxsgentries--; /* save one for chain pointer */
6562         } else {
6563                 /*
6564                  * Original smart arrays supported at most 31 s/g entries
6565                  * embedded inline in the command (trying to use more
6566                  * would lock up the controller)
6567                  */
6568                 h->max_cmd_sg_entries = 31;
6569                 h->maxsgentries = 31; /* default to traditional values */
6570                 h->chainsize = 0;
6571         }
6572
6573         /* Find out what task management functions are supported and cache */
6574         h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
6575         if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
6576                 dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
6577         if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
6578                 dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
6579 }
6580
6581 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
6582 {
6583         if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
6584                 dev_err(&h->pdev->dev, "not a valid CISS config table\n");
6585                 return false;
6586         }
6587         return true;
6588 }
6589
6590 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
6591 {
6592         u32 driver_support;
6593
6594         driver_support = readl(&(h->cfgtable->driver_support));
6595         /* Need to enable prefetch in the SCSI core for 6400 in x86 */
6596 #ifdef CONFIG_X86
6597         driver_support |= ENABLE_SCSI_PREFETCH;
6598 #endif
6599         driver_support |= ENABLE_UNIT_ATTN;
6600         writel(driver_support, &(h->cfgtable->driver_support));
6601 }
6602
6603 /* Disable DMA prefetch for the P600.  Otherwise an ASIC bug may result
6604  * in a prefetch beyond physical memory.
6605  */
6606 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
6607 {
6608         u32 dma_prefetch;
6609
6610         if (h->board_id != 0x3225103C)
6611                 return;
6612         dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
6613         dma_prefetch |= 0x8000;
6614         writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
6615 }
6616
6617 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
6618 {
6619         int i;
6620         u32 doorbell_value;
6621         unsigned long flags;
6622         /* wait until the clear_event_notify bit 6 is cleared by controller. */
6623         for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) {
6624                 spin_lock_irqsave(&h->lock, flags);
6625                 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
6626                 spin_unlock_irqrestore(&h->lock, flags);
6627                 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
6628                         goto done;
6629                 /* delay and try again */
6630                 msleep(CLEAR_EVENT_WAIT_INTERVAL);
6631         }
6632         return -ENODEV;
6633 done:
6634         return 0;
6635 }
6636
6637 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
6638 {
6639         int i;
6640         u32 doorbell_value;
6641         unsigned long flags;
6642
6643         /* under certain very rare conditions, this can take awhile.
6644          * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
6645          * as we enter this code.)
6646          */
6647         for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) {
6648                 if (h->remove_in_progress)
6649                         goto done;
6650                 spin_lock_irqsave(&h->lock, flags);
6651                 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
6652                 spin_unlock_irqrestore(&h->lock, flags);
6653                 if (!(doorbell_value & CFGTBL_ChangeReq))
6654                         goto done;
6655                 /* delay and try again */
6656                 msleep(MODE_CHANGE_WAIT_INTERVAL);
6657         }
6658         return -ENODEV;
6659 done:
6660         return 0;
6661 }
6662
6663 /* return -ENODEV or other reason on error, 0 on success */
6664 static int hpsa_enter_simple_mode(struct ctlr_info *h)
6665 {
6666         u32 trans_support;
6667
6668         trans_support = readl(&(h->cfgtable->TransportSupport));
6669         if (!(trans_support & SIMPLE_MODE))
6670                 return -ENOTSUPP;
6671
6672         h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
6673
6674         /* Update the field, and then ring the doorbell */
6675         writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
6676         writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
6677         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
6678         if (hpsa_wait_for_mode_change_ack(h))
6679                 goto error;
6680         print_cfg_table(&h->pdev->dev, h->cfgtable);
6681         if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
6682                 goto error;
6683         h->transMethod = CFGTBL_Trans_Simple;
6684         return 0;
6685 error:
6686         dev_err(&h->pdev->dev, "failed to enter simple mode\n");
6687         return -ENODEV;
6688 }
6689
6690 static int hpsa_pci_init(struct ctlr_info *h)
6691 {
6692         int prod_index, err;
6693
6694         prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
6695         if (prod_index < 0)
6696                 return prod_index;
6697         h->product_name = products[prod_index].product_name;
6698         h->access = *(products[prod_index].access);
6699
6700         h->needs_abort_tags_swizzled =
6701                 ctlr_needs_abort_tags_swizzled(h->board_id);
6702
6703         pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
6704                                PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
6705
6706         err = pci_enable_device(h->pdev);
6707         if (err) {
6708                 dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
6709                 return err;
6710         }
6711
6712         err = pci_request_regions(h->pdev, HPSA);
6713         if (err) {
6714                 dev_err(&h->pdev->dev,
6715                         "cannot obtain PCI resources, aborting\n");
6716                 return err;
6717         }
6718
6719         pci_set_master(h->pdev);
6720
6721         hpsa_interrupt_mode(h);
6722         err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
6723         if (err)
6724                 goto err_out_free_res;
6725         h->vaddr = remap_pci_mem(h->paddr, 0x250);
6726         if (!h->vaddr) {
6727                 err = -ENOMEM;
6728                 goto err_out_free_res;
6729         }
6730         err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
6731         if (err)
6732                 goto err_out_free_res;
6733         err = hpsa_find_cfgtables(h);
6734         if (err)
6735                 goto err_out_free_res;
6736         hpsa_find_board_params(h);
6737
6738         if (!hpsa_CISS_signature_present(h)) {
6739                 err = -ENODEV;
6740                 goto err_out_free_res;
6741         }
6742         hpsa_set_driver_support_bits(h);
6743         hpsa_p600_dma_prefetch_quirk(h);
6744         err = hpsa_enter_simple_mode(h);
6745         if (err)
6746                 goto err_out_free_res;
6747         return 0;
6748
6749 err_out_free_res:
6750         if (h->transtable)
6751                 iounmap(h->transtable);
6752         if (h->cfgtable)
6753                 iounmap(h->cfgtable);
6754         if (h->vaddr)
6755                 iounmap(h->vaddr);
6756         pci_disable_device(h->pdev);
6757         pci_release_regions(h->pdev);
6758         return err;
6759 }
6760
6761 static void hpsa_hba_inquiry(struct ctlr_info *h)
6762 {
6763         int rc;
6764
6765 #define HBA_INQUIRY_BYTE_COUNT 64
6766         h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
6767         if (!h->hba_inquiry_data)
6768                 return;
6769         rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
6770                 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
6771         if (rc != 0) {
6772                 kfree(h->hba_inquiry_data);
6773                 h->hba_inquiry_data = NULL;
6774         }
6775 }
6776
6777 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
6778 {
6779         int rc, i;
6780         void __iomem *vaddr;
6781
6782         if (!reset_devices)
6783                 return 0;
6784
6785         /* kdump kernel is loading, we don't know in which state is
6786          * the pci interface. The dev->enable_cnt is equal zero
6787          * so we call enable+disable, wait a while and switch it on.
6788          */
6789         rc = pci_enable_device(pdev);
6790         if (rc) {
6791                 dev_warn(&pdev->dev, "Failed to enable PCI device\n");
6792                 return -ENODEV;
6793         }
6794         pci_disable_device(pdev);
6795         msleep(260);                    /* a randomly chosen number */
6796         rc = pci_enable_device(pdev);
6797         if (rc) {
6798                 dev_warn(&pdev->dev, "failed to enable device.\n");
6799                 return -ENODEV;
6800         }
6801
6802         pci_set_master(pdev);
6803
6804         vaddr = pci_ioremap_bar(pdev, 0);
6805         if (vaddr == NULL) {
6806                 rc = -ENOMEM;
6807                 goto out_disable;
6808         }
6809         writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
6810         iounmap(vaddr);
6811
6812         /* Reset the controller with a PCI power-cycle or via doorbell */
6813         rc = hpsa_kdump_hard_reset_controller(pdev, board_id);
6814
6815         /* -ENOTSUPP here means we cannot reset the controller
6816          * but it's already (and still) up and running in
6817          * "performant mode".  Or, it might be 640x, which can't reset
6818          * due to concerns about shared bbwc between 6402/6404 pair.
6819          */
6820         if (rc)
6821                 goto out_disable;
6822
6823         /* Now try to get the controller to respond to a no-op */
6824         dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
6825         for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
6826                 if (hpsa_noop(pdev) == 0)
6827                         break;
6828                 else
6829                         dev_warn(&pdev->dev, "no-op failed%s\n",
6830                                         (i < 11 ? "; re-trying" : ""));
6831         }
6832
6833 out_disable:
6834
6835         pci_disable_device(pdev);
6836         return rc;
6837 }
6838
6839 static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
6840 {
6841         h->cmd_pool_bits = kzalloc(
6842                 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
6843                 sizeof(unsigned long), GFP_KERNEL);
6844         h->cmd_pool = pci_alloc_consistent(h->pdev,
6845                     h->nr_cmds * sizeof(*h->cmd_pool),
6846                     &(h->cmd_pool_dhandle));
6847         h->errinfo_pool = pci_alloc_consistent(h->pdev,
6848                     h->nr_cmds * sizeof(*h->errinfo_pool),
6849                     &(h->errinfo_pool_dhandle));
6850         if ((h->cmd_pool_bits == NULL)
6851             || (h->cmd_pool == NULL)
6852             || (h->errinfo_pool == NULL)) {
6853                 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
6854                 goto clean_up;
6855         }
6856         hpsa_preinitialize_commands(h);
6857         return 0;
6858 clean_up:
6859         hpsa_free_cmd_pool(h);
6860         return -ENOMEM;
6861 }
6862
6863 static void hpsa_free_cmd_pool(struct ctlr_info *h)
6864 {
6865         kfree(h->cmd_pool_bits);
6866         if (h->cmd_pool)
6867                 pci_free_consistent(h->pdev,
6868                             h->nr_cmds * sizeof(struct CommandList),
6869                             h->cmd_pool, h->cmd_pool_dhandle);
6870         if (h->ioaccel2_cmd_pool)
6871                 pci_free_consistent(h->pdev,
6872                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
6873                         h->ioaccel2_cmd_pool, h->ioaccel2_cmd_pool_dhandle);
6874         if (h->errinfo_pool)
6875                 pci_free_consistent(h->pdev,
6876                             h->nr_cmds * sizeof(struct ErrorInfo),
6877                             h->errinfo_pool,
6878                             h->errinfo_pool_dhandle);
6879         if (h->ioaccel_cmd_pool)
6880                 pci_free_consistent(h->pdev,
6881                         h->nr_cmds * sizeof(struct io_accel1_cmd),
6882                         h->ioaccel_cmd_pool, h->ioaccel_cmd_pool_dhandle);
6883 }
6884
6885 static void hpsa_irq_affinity_hints(struct ctlr_info *h)
6886 {
6887         int i, cpu;
6888
6889         cpu = cpumask_first(cpu_online_mask);
6890         for (i = 0; i < h->msix_vector; i++) {
6891                 irq_set_affinity_hint(h->intr[i], get_cpu_mask(cpu));
6892                 cpu = cpumask_next(cpu, cpu_online_mask);
6893         }
6894 }
6895
6896 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
6897 static void hpsa_free_irqs(struct ctlr_info *h)
6898 {
6899         int i;
6900
6901         if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
6902                 /* Single reply queue, only one irq to free */
6903                 i = h->intr_mode;
6904                 irq_set_affinity_hint(h->intr[i], NULL);
6905                 free_irq(h->intr[i], &h->q[i]);
6906                 return;
6907         }
6908
6909         for (i = 0; i < h->msix_vector; i++) {
6910                 irq_set_affinity_hint(h->intr[i], NULL);
6911                 free_irq(h->intr[i], &h->q[i]);
6912         }
6913         for (; i < MAX_REPLY_QUEUES; i++)
6914                 h->q[i] = 0;
6915 }
6916
6917 /* returns 0 on success; cleans up and returns -Enn on error */
6918 static int hpsa_request_irqs(struct ctlr_info *h,
6919         irqreturn_t (*msixhandler)(int, void *),
6920         irqreturn_t (*intxhandler)(int, void *))
6921 {
6922         int rc, i;
6923
6924         /*
6925          * initialize h->q[x] = x so that interrupt handlers know which
6926          * queue to process.
6927          */
6928         for (i = 0; i < MAX_REPLY_QUEUES; i++)
6929                 h->q[i] = (u8) i;
6930
6931         if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) {
6932                 /* If performant mode and MSI-X, use multiple reply queues */
6933                 for (i = 0; i < h->msix_vector; i++) {
6934                         rc = request_irq(h->intr[i], msixhandler,
6935                                         0, h->devname,
6936                                         &h->q[i]);
6937                         if (rc) {
6938                                 int j;
6939
6940                                 dev_err(&h->pdev->dev,
6941                                         "failed to get irq %d for %s\n",
6942                                        h->intr[i], h->devname);
6943                                 for (j = 0; j < i; j++) {
6944                                         free_irq(h->intr[j], &h->q[j]);
6945                                         h->q[j] = 0;
6946                                 }
6947                                 for (; j < MAX_REPLY_QUEUES; j++)
6948                                         h->q[j] = 0;
6949                                 return rc;
6950                         }
6951                 }
6952                 hpsa_irq_affinity_hints(h);
6953         } else {
6954                 /* Use single reply pool */
6955                 if (h->msix_vector > 0 || h->msi_vector) {
6956                         rc = request_irq(h->intr[h->intr_mode],
6957                                 msixhandler, 0, h->devname,
6958                                 &h->q[h->intr_mode]);
6959                 } else {
6960                         rc = request_irq(h->intr[h->intr_mode],
6961                                 intxhandler, IRQF_SHARED, h->devname,
6962                                 &h->q[h->intr_mode]);
6963                 }
6964         }
6965         if (rc) {
6966                 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
6967                        h->intr[h->intr_mode], h->devname);
6968                 return -ENODEV;
6969         }
6970         return 0;
6971 }
6972
6973 static int hpsa_kdump_soft_reset(struct ctlr_info *h)
6974 {
6975         if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
6976                 HPSA_RESET_TYPE_CONTROLLER)) {
6977                 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
6978                 return -EIO;
6979         }
6980
6981         dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
6982         if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
6983                 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
6984                 return -1;
6985         }
6986
6987         dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
6988         if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
6989                 dev_warn(&h->pdev->dev, "Board failed to become ready "
6990                         "after soft reset.\n");
6991                 return -1;
6992         }
6993
6994         return 0;
6995 }
6996
6997 static void hpsa_free_irqs_and_disable_msix(struct ctlr_info *h)
6998 {
6999         hpsa_free_irqs(h);
7000 #ifdef CONFIG_PCI_MSI
7001         if (h->msix_vector) {
7002                 if (h->pdev->msix_enabled)
7003                         pci_disable_msix(h->pdev);
7004         } else if (h->msi_vector) {
7005                 if (h->pdev->msi_enabled)
7006                         pci_disable_msi(h->pdev);
7007         }
7008 #endif /* CONFIG_PCI_MSI */
7009 }
7010
7011 static void hpsa_free_reply_queues(struct ctlr_info *h)
7012 {
7013         int i;
7014
7015         for (i = 0; i < h->nreply_queues; i++) {
7016                 if (!h->reply_queue[i].head)
7017                         continue;
7018                 pci_free_consistent(h->pdev, h->reply_queue_size,
7019                         h->reply_queue[i].head, h->reply_queue[i].busaddr);
7020                 h->reply_queue[i].head = NULL;
7021                 h->reply_queue[i].busaddr = 0;
7022         }
7023 }
7024
7025 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
7026 {
7027         hpsa_free_irqs_and_disable_msix(h);
7028         hpsa_free_sg_chain_blocks(h);
7029         hpsa_free_cmd_pool(h);
7030         kfree(h->ioaccel1_blockFetchTable);
7031         kfree(h->blockFetchTable);
7032         hpsa_free_reply_queues(h);
7033         if (h->vaddr)
7034                 iounmap(h->vaddr);
7035         if (h->transtable)
7036                 iounmap(h->transtable);
7037         if (h->cfgtable)
7038                 iounmap(h->cfgtable);
7039         pci_disable_device(h->pdev);
7040         pci_release_regions(h->pdev);
7041         kfree(h);
7042 }
7043
7044 /* Called when controller lockup detected. */
7045 static void fail_all_outstanding_cmds(struct ctlr_info *h)
7046 {
7047         int i, refcount;
7048         struct CommandList *c;
7049         int failcount = 0;
7050
7051         flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */
7052         for (i = 0; i < h->nr_cmds; i++) {
7053                 c = h->cmd_pool + i;
7054                 refcount = atomic_inc_return(&c->refcount);
7055                 if (refcount > 1) {
7056                         c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
7057                         finish_cmd(c);
7058                         atomic_dec(&h->commands_outstanding);
7059                         failcount++;
7060                 }
7061                 cmd_free(h, c);
7062         }
7063         dev_warn(&h->pdev->dev,
7064                 "failed %d commands in fail_all\n", failcount);
7065 }
7066
7067 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
7068 {
7069         int cpu;
7070
7071         for_each_online_cpu(cpu) {
7072                 u32 *lockup_detected;
7073                 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
7074                 *lockup_detected = value;
7075         }
7076         wmb(); /* be sure the per-cpu variables are out to memory */
7077 }
7078
7079 static void controller_lockup_detected(struct ctlr_info *h)
7080 {
7081         unsigned long flags;
7082         u32 lockup_detected;
7083
7084         h->access.set_intr_mask(h, HPSA_INTR_OFF);
7085         spin_lock_irqsave(&h->lock, flags);
7086         lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
7087         if (!lockup_detected) {
7088                 /* no heartbeat, but controller gave us a zero. */
7089                 dev_warn(&h->pdev->dev,
7090                         "lockup detected after %d but scratchpad register is zero\n",
7091                         h->heartbeat_sample_interval / HZ);
7092                 lockup_detected = 0xffffffff;
7093         }
7094         set_lockup_detected_for_all_cpus(h, lockup_detected);
7095         spin_unlock_irqrestore(&h->lock, flags);
7096         dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n",
7097                         lockup_detected, h->heartbeat_sample_interval / HZ);
7098         pci_disable_device(h->pdev);
7099         fail_all_outstanding_cmds(h);
7100 }
7101
7102 static int detect_controller_lockup(struct ctlr_info *h)
7103 {
7104         u64 now;
7105         u32 heartbeat;
7106         unsigned long flags;
7107
7108         now = get_jiffies_64();
7109         /* If we've received an interrupt recently, we're ok. */
7110         if (time_after64(h->last_intr_timestamp +
7111                                 (h->heartbeat_sample_interval), now))
7112                 return false;
7113
7114         /*
7115          * If we've already checked the heartbeat recently, we're ok.
7116          * This could happen if someone sends us a signal. We
7117          * otherwise don't care about signals in this thread.
7118          */
7119         if (time_after64(h->last_heartbeat_timestamp +
7120                                 (h->heartbeat_sample_interval), now))
7121                 return false;
7122
7123         /* If heartbeat has not changed since we last looked, we're not ok. */
7124         spin_lock_irqsave(&h->lock, flags);
7125         heartbeat = readl(&h->cfgtable->HeartBeat);
7126         spin_unlock_irqrestore(&h->lock, flags);
7127         if (h->last_heartbeat == heartbeat) {
7128                 controller_lockup_detected(h);
7129                 return true;
7130         }
7131
7132         /* We're ok. */
7133         h->last_heartbeat = heartbeat;
7134         h->last_heartbeat_timestamp = now;
7135         return false;
7136 }
7137
7138 static void hpsa_ack_ctlr_events(struct ctlr_info *h)
7139 {
7140         int i;
7141         char *event_type;
7142
7143         if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
7144                 return;
7145
7146         /* Ask the controller to clear the events we're handling. */
7147         if ((h->transMethod & (CFGTBL_Trans_io_accel1
7148                         | CFGTBL_Trans_io_accel2)) &&
7149                 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
7150                  h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
7151
7152                 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
7153                         event_type = "state change";
7154                 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
7155                         event_type = "configuration change";
7156                 /* Stop sending new RAID offload reqs via the IO accelerator */
7157                 scsi_block_requests(h->scsi_host);
7158                 for (i = 0; i < h->ndevices; i++)
7159                         h->dev[i]->offload_enabled = 0;
7160                 hpsa_drain_accel_commands(h);
7161                 /* Set 'accelerator path config change' bit */
7162                 dev_warn(&h->pdev->dev,
7163                         "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
7164                         h->events, event_type);
7165                 writel(h->events, &(h->cfgtable->clear_event_notify));
7166                 /* Set the "clear event notify field update" bit 6 */
7167                 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
7168                 /* Wait until ctlr clears 'clear event notify field', bit 6 */
7169                 hpsa_wait_for_clear_event_notify_ack(h);
7170                 scsi_unblock_requests(h->scsi_host);
7171         } else {
7172                 /* Acknowledge controller notification events. */
7173                 writel(h->events, &(h->cfgtable->clear_event_notify));
7174                 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
7175                 hpsa_wait_for_clear_event_notify_ack(h);
7176 #if 0
7177                 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7178                 hpsa_wait_for_mode_change_ack(h);
7179 #endif
7180         }
7181         return;
7182 }
7183
7184 /* Check a register on the controller to see if there are configuration
7185  * changes (added/changed/removed logical drives, etc.) which mean that
7186  * we should rescan the controller for devices.
7187  * Also check flag for driver-initiated rescan.
7188  */
7189 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
7190 {
7191         if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
7192                 return 0;
7193
7194         h->events = readl(&(h->cfgtable->event_notify));
7195         return h->events & RESCAN_REQUIRED_EVENT_BITS;
7196 }
7197
7198 /*
7199  * Check if any of the offline devices have become ready
7200  */
7201 static int hpsa_offline_devices_ready(struct ctlr_info *h)
7202 {
7203         unsigned long flags;
7204         struct offline_device_entry *d;
7205         struct list_head *this, *tmp;
7206
7207         spin_lock_irqsave(&h->offline_device_lock, flags);
7208         list_for_each_safe(this, tmp, &h->offline_device_list) {
7209                 d = list_entry(this, struct offline_device_entry,
7210                                 offline_list);
7211                 spin_unlock_irqrestore(&h->offline_device_lock, flags);
7212                 if (!hpsa_volume_offline(h, d->scsi3addr)) {
7213                         spin_lock_irqsave(&h->offline_device_lock, flags);
7214                         list_del(&d->offline_list);
7215                         spin_unlock_irqrestore(&h->offline_device_lock, flags);
7216                         return 1;
7217                 }
7218                 spin_lock_irqsave(&h->offline_device_lock, flags);
7219         }
7220         spin_unlock_irqrestore(&h->offline_device_lock, flags);
7221         return 0;
7222 }
7223
7224 static void hpsa_rescan_ctlr_worker(struct work_struct *work)
7225 {
7226         unsigned long flags;
7227         struct ctlr_info *h = container_of(to_delayed_work(work),
7228                                         struct ctlr_info, rescan_ctlr_work);
7229
7230
7231         if (h->remove_in_progress)
7232                 return;
7233
7234         if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) {
7235                 scsi_host_get(h->scsi_host);
7236                 hpsa_ack_ctlr_events(h);
7237                 hpsa_scan_start(h->scsi_host);
7238                 scsi_host_put(h->scsi_host);
7239         }
7240         spin_lock_irqsave(&h->lock, flags);
7241         if (!h->remove_in_progress)
7242                 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
7243                                 h->heartbeat_sample_interval);
7244         spin_unlock_irqrestore(&h->lock, flags);
7245 }
7246
7247 static void hpsa_monitor_ctlr_worker(struct work_struct *work)
7248 {
7249         unsigned long flags;
7250         struct ctlr_info *h = container_of(to_delayed_work(work),
7251                                         struct ctlr_info, monitor_ctlr_work);
7252
7253         detect_controller_lockup(h);
7254         if (lockup_detected(h))
7255                 return;
7256
7257         spin_lock_irqsave(&h->lock, flags);
7258         if (!h->remove_in_progress)
7259                 schedule_delayed_work(&h->monitor_ctlr_work,
7260                                 h->heartbeat_sample_interval);
7261         spin_unlock_irqrestore(&h->lock, flags);
7262 }
7263
7264 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
7265                                                 char *name)
7266 {
7267         struct workqueue_struct *wq = NULL;
7268
7269         wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
7270         if (!wq)
7271                 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);
7272
7273         return wq;
7274 }
7275
7276 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
7277 {
7278         int dac, rc;
7279         struct ctlr_info *h;
7280         int try_soft_reset = 0;
7281         unsigned long flags;
7282         u32 board_id;
7283
7284         if (number_of_controllers == 0)
7285                 printk(KERN_INFO DRIVER_NAME "\n");
7286
7287         rc = hpsa_lookup_board_id(pdev, &board_id);
7288         if (rc < 0) {
7289                 dev_warn(&pdev->dev, "Board ID not found\n");
7290                 return rc;
7291         }
7292
7293         rc = hpsa_init_reset_devices(pdev, board_id);
7294         if (rc) {
7295                 if (rc != -ENOTSUPP)
7296                         return rc;
7297                 /* If the reset fails in a particular way (it has no way to do
7298                  * a proper hard reset, so returns -ENOTSUPP) we can try to do
7299                  * a soft reset once we get the controller configured up to the
7300                  * point that it can accept a command.
7301                  */
7302                 try_soft_reset = 1;
7303                 rc = 0;
7304         }
7305
7306 reinit_after_soft_reset:
7307
7308         /* Command structures must be aligned on a 32-byte boundary because
7309          * the 5 lower bits of the address are used by the hardware. and by
7310          * the driver.  See comments in hpsa.h for more info.
7311          */
7312         BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
7313         h = kzalloc(sizeof(*h), GFP_KERNEL);
7314         if (!h)
7315                 return -ENOMEM;
7316
7317         h->pdev = pdev;
7318         h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
7319         INIT_LIST_HEAD(&h->offline_device_list);
7320         spin_lock_init(&h->lock);
7321         spin_lock_init(&h->offline_device_lock);
7322         spin_lock_init(&h->scan_lock);
7323         atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
7324         atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS);
7325
7326         h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan");
7327         if (!h->rescan_ctlr_wq) {
7328                 rc = -ENOMEM;
7329                 goto clean1;
7330         }
7331
7332         h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
7333         if (!h->resubmit_wq) {
7334                 rc = -ENOMEM;
7335                 goto clean1;
7336         }
7337
7338         /* Allocate and clear per-cpu variable lockup_detected */
7339         h->lockup_detected = alloc_percpu(u32);
7340         if (!h->lockup_detected) {
7341                 rc = -ENOMEM;
7342                 goto clean1;
7343         }
7344         set_lockup_detected_for_all_cpus(h, 0);
7345
7346         rc = hpsa_pci_init(h);
7347         if (rc != 0)
7348                 goto clean1;
7349
7350         sprintf(h->devname, HPSA "%d", number_of_controllers);
7351         h->ctlr = number_of_controllers;
7352         number_of_controllers++;
7353
7354         /* configure PCI DMA stuff */
7355         rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
7356         if (rc == 0) {
7357                 dac = 1;
7358         } else {
7359                 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
7360                 if (rc == 0) {
7361                         dac = 0;
7362                 } else {
7363                         dev_err(&pdev->dev, "no suitable DMA available\n");
7364                         goto clean1;
7365                 }
7366         }
7367
7368         /* make sure the board interrupts are off */
7369         h->access.set_intr_mask(h, HPSA_INTR_OFF);
7370
7371         if (hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
7372                 goto clean2;
7373         dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
7374                h->devname, pdev->device,
7375                h->intr[h->intr_mode], dac ? "" : " not");
7376         rc = hpsa_alloc_cmd_pool(h);
7377         if (rc)
7378                 goto clean2_and_free_irqs;
7379         if (hpsa_allocate_sg_chain_blocks(h))
7380                 goto clean4;
7381         init_waitqueue_head(&h->scan_wait_queue);
7382         init_waitqueue_head(&h->abort_cmd_wait_queue);
7383         h->scan_finished = 1; /* no scan currently in progress */
7384
7385         pci_set_drvdata(pdev, h);
7386         h->ndevices = 0;
7387         h->hba_mode_enabled = 0;
7388         h->scsi_host = NULL;
7389         spin_lock_init(&h->devlock);
7390         hpsa_put_ctlr_into_performant_mode(h);
7391
7392         /* At this point, the controller is ready to take commands.
7393          * Now, if reset_devices and the hard reset didn't work, try
7394          * the soft reset and see if that works.
7395          */
7396         if (try_soft_reset) {
7397
7398                 /* This is kind of gross.  We may or may not get a completion
7399                  * from the soft reset command, and if we do, then the value
7400                  * from the fifo may or may not be valid.  So, we wait 10 secs
7401                  * after the reset throwing away any completions we get during
7402                  * that time.  Unregister the interrupt handler and register
7403                  * fake ones to scoop up any residual completions.
7404                  */
7405                 spin_lock_irqsave(&h->lock, flags);
7406                 h->access.set_intr_mask(h, HPSA_INTR_OFF);
7407                 spin_unlock_irqrestore(&h->lock, flags);
7408                 hpsa_free_irqs(h);
7409                 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
7410                                         hpsa_intx_discard_completions);
7411                 if (rc) {
7412                         dev_warn(&h->pdev->dev,
7413                                 "Failed to request_irq after soft reset.\n");
7414                         goto clean4;
7415                 }
7416
7417                 rc = hpsa_kdump_soft_reset(h);
7418                 if (rc)
7419                         /* Neither hard nor soft reset worked, we're hosed. */
7420                         goto clean4;
7421
7422                 dev_info(&h->pdev->dev, "Board READY.\n");
7423                 dev_info(&h->pdev->dev,
7424                         "Waiting for stale completions to drain.\n");
7425                 h->access.set_intr_mask(h, HPSA_INTR_ON);
7426                 msleep(10000);
7427                 h->access.set_intr_mask(h, HPSA_INTR_OFF);
7428
7429                 rc = controller_reset_failed(h->cfgtable);
7430                 if (rc)
7431                         dev_info(&h->pdev->dev,
7432                                 "Soft reset appears to have failed.\n");
7433
7434                 /* since the controller's reset, we have to go back and re-init
7435                  * everything.  Easiest to just forget what we've done and do it
7436                  * all over again.
7437                  */
7438                 hpsa_undo_allocations_after_kdump_soft_reset(h);
7439                 try_soft_reset = 0;
7440                 if (rc)
7441                         /* don't go to clean4, we already unallocated */
7442                         return -ENODEV;
7443
7444                 goto reinit_after_soft_reset;
7445         }
7446
7447                 /* Enable Accelerated IO path at driver layer */
7448                 h->acciopath_status = 1;
7449
7450
7451         /* Turn the interrupts on so we can service requests */
7452         h->access.set_intr_mask(h, HPSA_INTR_ON);
7453
7454         hpsa_hba_inquiry(h);
7455         rc = hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
7456         if (rc)
7457                 goto clean4;
7458
7459         /* Monitor the controller for firmware lockups */
7460         h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
7461         INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
7462         schedule_delayed_work(&h->monitor_ctlr_work,
7463                                 h->heartbeat_sample_interval);
7464         INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker);
7465         queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
7466                                 h->heartbeat_sample_interval);
7467         return 0;
7468
7469 clean4:
7470         hpsa_free_sg_chain_blocks(h);
7471         hpsa_free_cmd_pool(h);
7472 clean2_and_free_irqs:
7473         hpsa_free_irqs(h);
7474 clean2:
7475 clean1:
7476         if (h->resubmit_wq)
7477                 destroy_workqueue(h->resubmit_wq);
7478         if (h->rescan_ctlr_wq)
7479                 destroy_workqueue(h->rescan_ctlr_wq);
7480         if (h->lockup_detected)
7481                 free_percpu(h->lockup_detected);
7482         kfree(h);
7483         return rc;
7484 }
7485
7486 static void hpsa_flush_cache(struct ctlr_info *h)
7487 {
7488         char *flush_buf;
7489         struct CommandList *c;
7490         int rc;
7491
7492         /* Don't bother trying to flush the cache if locked up */
7493         /* FIXME not necessary if do_simple_cmd does the check */
7494         if (unlikely(lockup_detected(h)))
7495                 return;
7496         flush_buf = kzalloc(4, GFP_KERNEL);
7497         if (!flush_buf)
7498                 return;
7499
7500         c = cmd_alloc(h);
7501         if (!c) {
7502                 dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
7503                 goto out_of_memory;
7504         }
7505         if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
7506                 RAID_CTLR_LUNID, TYPE_CMD)) {
7507                 goto out;
7508         }
7509         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
7510                                         PCI_DMA_TODEVICE, NO_TIMEOUT);
7511         if (rc)
7512                 goto out;
7513         if (c->err_info->CommandStatus != 0)
7514 out:
7515                 dev_warn(&h->pdev->dev,
7516                         "error flushing cache on controller\n");
7517         cmd_free(h, c);
7518 out_of_memory:
7519         kfree(flush_buf);
7520 }
7521
7522 static void hpsa_shutdown(struct pci_dev *pdev)
7523 {
7524         struct ctlr_info *h;
7525
7526         h = pci_get_drvdata(pdev);
7527         /* Turn board interrupts off  and send the flush cache command
7528          * sendcmd will turn off interrupt, and send the flush...
7529          * To write all data in the battery backed cache to disks
7530          */
7531         hpsa_flush_cache(h);
7532         h->access.set_intr_mask(h, HPSA_INTR_OFF);
7533         hpsa_free_irqs_and_disable_msix(h);
7534 }
7535
7536 static void hpsa_free_device_info(struct ctlr_info *h)
7537 {
7538         int i;
7539
7540         for (i = 0; i < h->ndevices; i++)
7541                 kfree(h->dev[i]);
7542 }
7543
7544 static void hpsa_remove_one(struct pci_dev *pdev)
7545 {
7546         struct ctlr_info *h;
7547         unsigned long flags;
7548
7549         if (pci_get_drvdata(pdev) == NULL) {
7550                 dev_err(&pdev->dev, "unable to remove device\n");
7551                 return;
7552         }
7553         h = pci_get_drvdata(pdev);
7554
7555         /* Get rid of any controller monitoring work items */
7556         spin_lock_irqsave(&h->lock, flags);
7557         h->remove_in_progress = 1;
7558         spin_unlock_irqrestore(&h->lock, flags);
7559         cancel_delayed_work_sync(&h->monitor_ctlr_work);
7560         cancel_delayed_work_sync(&h->rescan_ctlr_work);
7561         destroy_workqueue(h->rescan_ctlr_wq);
7562         destroy_workqueue(h->resubmit_wq);
7563         hpsa_unregister_scsi(h);        /* unhook from SCSI subsystem */
7564         hpsa_shutdown(pdev);
7565         iounmap(h->vaddr);
7566         iounmap(h->transtable);
7567         iounmap(h->cfgtable);
7568         hpsa_free_device_info(h);
7569         hpsa_free_sg_chain_blocks(h);
7570         pci_free_consistent(h->pdev,
7571                 h->nr_cmds * sizeof(struct CommandList),
7572                 h->cmd_pool, h->cmd_pool_dhandle);
7573         pci_free_consistent(h->pdev,
7574                 h->nr_cmds * sizeof(struct ErrorInfo),
7575                 h->errinfo_pool, h->errinfo_pool_dhandle);
7576         hpsa_free_reply_queues(h);
7577         kfree(h->cmd_pool_bits);
7578         kfree(h->blockFetchTable);
7579         kfree(h->ioaccel1_blockFetchTable);
7580         kfree(h->ioaccel2_blockFetchTable);
7581         kfree(h->hba_inquiry_data);
7582         pci_disable_device(pdev);
7583         pci_release_regions(pdev);
7584         free_percpu(h->lockup_detected);
7585         kfree(h);
7586 }
7587
7588 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
7589         __attribute__((unused)) pm_message_t state)
7590 {
7591         return -ENOSYS;
7592 }
7593
7594 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
7595 {
7596         return -ENOSYS;
7597 }
7598
7599 static struct pci_driver hpsa_pci_driver = {
7600         .name = HPSA,
7601         .probe = hpsa_init_one,
7602         .remove = hpsa_remove_one,
7603         .id_table = hpsa_pci_device_id, /* id_table */
7604         .shutdown = hpsa_shutdown,
7605         .suspend = hpsa_suspend,
7606         .resume = hpsa_resume,
7607 };
7608
7609 /* Fill in bucket_map[], given nsgs (the max number of
7610  * scatter gather elements supported) and bucket[],
7611  * which is an array of 8 integers.  The bucket[] array
7612  * contains 8 different DMA transfer sizes (in 16
7613  * byte increments) which the controller uses to fetch
7614  * commands.  This function fills in bucket_map[], which
7615  * maps a given number of scatter gather elements to one of
7616  * the 8 DMA transfer sizes.  The point of it is to allow the
7617  * controller to only do as much DMA as needed to fetch the
7618  * command, with the DMA transfer size encoded in the lower
7619  * bits of the command address.
7620  */
7621 static void  calc_bucket_map(int bucket[], int num_buckets,
7622         int nsgs, int min_blocks, u32 *bucket_map)
7623 {
7624         int i, j, b, size;
7625
7626         /* Note, bucket_map must have nsgs+1 entries. */
7627         for (i = 0; i <= nsgs; i++) {
7628                 /* Compute size of a command with i SG entries */
7629                 size = i + min_blocks;
7630                 b = num_buckets; /* Assume the biggest bucket */
7631                 /* Find the bucket that is just big enough */
7632                 for (j = 0; j < num_buckets; j++) {
7633                         if (bucket[j] >= size) {
7634                                 b = j;
7635                                 break;
7636                         }
7637                 }
7638                 /* for a command with i SG entries, use bucket b. */
7639                 bucket_map[i] = b;
7640         }
7641 }
7642
7643 /* return -ENODEV or other reason on error, 0 on success */
7644 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
7645 {
7646         int i;
7647         unsigned long register_value;
7648         unsigned long transMethod = CFGTBL_Trans_Performant |
7649                         (trans_support & CFGTBL_Trans_use_short_tags) |
7650                                 CFGTBL_Trans_enable_directed_msix |
7651                         (trans_support & (CFGTBL_Trans_io_accel1 |
7652                                 CFGTBL_Trans_io_accel2));
7653         struct access_method access = SA5_performant_access;
7654
7655         /* This is a bit complicated.  There are 8 registers on
7656          * the controller which we write to to tell it 8 different
7657          * sizes of commands which there may be.  It's a way of
7658          * reducing the DMA done to fetch each command.  Encoded into
7659          * each command's tag are 3 bits which communicate to the controller
7660          * which of the eight sizes that command fits within.  The size of
7661          * each command depends on how many scatter gather entries there are.
7662          * Each SG entry requires 16 bytes.  The eight registers are programmed
7663          * with the number of 16-byte blocks a command of that size requires.
7664          * The smallest command possible requires 5 such 16 byte blocks.
7665          * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
7666          * blocks.  Note, this only extends to the SG entries contained
7667          * within the command block, and does not extend to chained blocks
7668          * of SG elements.   bft[] contains the eight values we write to
7669          * the registers.  They are not evenly distributed, but have more
7670          * sizes for small commands, and fewer sizes for larger commands.
7671          */
7672         int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
7673 #define MIN_IOACCEL2_BFT_ENTRY 5
7674 #define HPSA_IOACCEL2_HEADER_SZ 4
7675         int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
7676                         13, 14, 15, 16, 17, 18, 19,
7677                         HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
7678         BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
7679         BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
7680         BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
7681                                  16 * MIN_IOACCEL2_BFT_ENTRY);
7682         BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
7683         BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
7684         /*  5 = 1 s/g entry or 4k
7685          *  6 = 2 s/g entry or 8k
7686          *  8 = 4 s/g entry or 16k
7687          * 10 = 6 s/g entry or 24k
7688          */
7689
7690         /* If the controller supports either ioaccel method then
7691          * we can also use the RAID stack submit path that does not
7692          * perform the superfluous readl() after each command submission.
7693          */
7694         if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
7695                 access = SA5_performant_access_no_read;
7696
7697         /* Controller spec: zero out this buffer. */
7698         for (i = 0; i < h->nreply_queues; i++)
7699                 memset(h->reply_queue[i].head, 0, h->reply_queue_size);
7700
7701         bft[7] = SG_ENTRIES_IN_CMD + 4;
7702         calc_bucket_map(bft, ARRAY_SIZE(bft),
7703                                 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
7704         for (i = 0; i < 8; i++)
7705                 writel(bft[i], &h->transtable->BlockFetch[i]);
7706
7707         /* size of controller ring buffer */
7708         writel(h->max_commands, &h->transtable->RepQSize);
7709         writel(h->nreply_queues, &h->transtable->RepQCount);
7710         writel(0, &h->transtable->RepQCtrAddrLow32);
7711         writel(0, &h->transtable->RepQCtrAddrHigh32);
7712
7713         for (i = 0; i < h->nreply_queues; i++) {
7714                 writel(0, &h->transtable->RepQAddr[i].upper);
7715                 writel(h->reply_queue[i].busaddr,
7716                         &h->transtable->RepQAddr[i].lower);
7717         }
7718
7719         writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
7720         writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
7721         /*
7722          * enable outbound interrupt coalescing in accelerator mode;
7723          */
7724         if (trans_support & CFGTBL_Trans_io_accel1) {
7725                 access = SA5_ioaccel_mode1_access;
7726                 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
7727                 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
7728         } else {
7729                 if (trans_support & CFGTBL_Trans_io_accel2) {
7730                         access = SA5_ioaccel_mode2_access;
7731                         writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
7732                         writel(4, &h->cfgtable->HostWrite.CoalIntCount);
7733                 }
7734         }
7735         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7736         if (hpsa_wait_for_mode_change_ack(h)) {
7737                 dev_err(&h->pdev->dev,
7738                         "performant mode problem - doorbell timeout\n");
7739                 return -ENODEV;
7740         }
7741         register_value = readl(&(h->cfgtable->TransportActive));
7742         if (!(register_value & CFGTBL_Trans_Performant)) {
7743                 dev_err(&h->pdev->dev,
7744                         "performant mode problem - transport not active\n");
7745                 return -ENODEV;
7746         }
7747         /* Change the access methods to the performant access methods */
7748         h->access = access;
7749         h->transMethod = transMethod;
7750
7751         if (!((trans_support & CFGTBL_Trans_io_accel1) ||
7752                 (trans_support & CFGTBL_Trans_io_accel2)))
7753                 return 0;
7754
7755         if (trans_support & CFGTBL_Trans_io_accel1) {
7756                 /* Set up I/O accelerator mode */
7757                 for (i = 0; i < h->nreply_queues; i++) {
7758                         writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
7759                         h->reply_queue[i].current_entry =
7760                                 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
7761                 }
7762                 bft[7] = h->ioaccel_maxsg + 8;
7763                 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
7764                                 h->ioaccel1_blockFetchTable);
7765
7766                 /* initialize all reply queue entries to unused */
7767                 for (i = 0; i < h->nreply_queues; i++)
7768                         memset(h->reply_queue[i].head,
7769                                 (u8) IOACCEL_MODE1_REPLY_UNUSED,
7770                                 h->reply_queue_size);
7771
7772                 /* set all the constant fields in the accelerator command
7773                  * frames once at init time to save CPU cycles later.
7774                  */
7775                 for (i = 0; i < h->nr_cmds; i++) {
7776                         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
7777
7778                         cp->function = IOACCEL1_FUNCTION_SCSIIO;
7779                         cp->err_info = (u32) (h->errinfo_pool_dhandle +
7780                                         (i * sizeof(struct ErrorInfo)));
7781                         cp->err_info_len = sizeof(struct ErrorInfo);
7782                         cp->sgl_offset = IOACCEL1_SGLOFFSET;
7783                         cp->host_context_flags =
7784                                 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
7785                         cp->timeout_sec = 0;
7786                         cp->ReplyQueue = 0;
7787                         cp->tag =
7788                                 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
7789                         cp->host_addr =
7790                                 cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
7791                                         (i * sizeof(struct io_accel1_cmd)));
7792                 }
7793         } else if (trans_support & CFGTBL_Trans_io_accel2) {
7794                 u64 cfg_offset, cfg_base_addr_index;
7795                 u32 bft2_offset, cfg_base_addr;
7796                 int rc;
7797
7798                 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7799                         &cfg_base_addr_index, &cfg_offset);
7800                 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
7801                 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
7802                 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
7803                                 4, h->ioaccel2_blockFetchTable);
7804                 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
7805                 BUILD_BUG_ON(offsetof(struct CfgTable,
7806                                 io_accel_request_size_offset) != 0xb8);
7807                 h->ioaccel2_bft2_regs =
7808                         remap_pci_mem(pci_resource_start(h->pdev,
7809                                         cfg_base_addr_index) +
7810                                         cfg_offset + bft2_offset,
7811                                         ARRAY_SIZE(bft2) *
7812                                         sizeof(*h->ioaccel2_bft2_regs));
7813                 for (i = 0; i < ARRAY_SIZE(bft2); i++)
7814                         writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
7815         }
7816         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7817         if (hpsa_wait_for_mode_change_ack(h)) {
7818                 dev_err(&h->pdev->dev,
7819                         "performant mode problem - enabling ioaccel mode\n");
7820                 return -ENODEV;
7821         }
7822         return 0;
7823 }
7824
7825 /* Allocate ioaccel1 mode command blocks and block fetch table */
7826 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
7827 {
7828         h->ioaccel_maxsg =
7829                 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
7830         if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
7831                 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
7832
7833         /* Command structures must be aligned on a 128-byte boundary
7834          * because the 7 lower bits of the address are used by the
7835          * hardware.
7836          */
7837         BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
7838                         IOACCEL1_COMMANDLIST_ALIGNMENT);
7839         h->ioaccel_cmd_pool =
7840                 pci_alloc_consistent(h->pdev,
7841                         h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
7842                         &(h->ioaccel_cmd_pool_dhandle));
7843
7844         h->ioaccel1_blockFetchTable =
7845                 kmalloc(((h->ioaccel_maxsg + 1) *
7846                                 sizeof(u32)), GFP_KERNEL);
7847
7848         if ((h->ioaccel_cmd_pool == NULL) ||
7849                 (h->ioaccel1_blockFetchTable == NULL))
7850                 goto clean_up;
7851
7852         memset(h->ioaccel_cmd_pool, 0,
7853                 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
7854         return 0;
7855
7856 clean_up:
7857         if (h->ioaccel_cmd_pool)
7858                 pci_free_consistent(h->pdev,
7859                         h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
7860                         h->ioaccel_cmd_pool, h->ioaccel_cmd_pool_dhandle);
7861         kfree(h->ioaccel1_blockFetchTable);
7862         return 1;
7863 }
7864
7865 /* Allocate ioaccel2 mode command blocks and block fetch table */
7866 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
7867 {
7868         /* Allocate ioaccel2 mode command blocks and block fetch table */
7869
7870         h->ioaccel_maxsg =
7871                 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
7872         if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
7873                 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
7874
7875         BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
7876                         IOACCEL2_COMMANDLIST_ALIGNMENT);
7877         h->ioaccel2_cmd_pool =
7878                 pci_alloc_consistent(h->pdev,
7879                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
7880                         &(h->ioaccel2_cmd_pool_dhandle));
7881
7882         h->ioaccel2_blockFetchTable =
7883                 kmalloc(((h->ioaccel_maxsg + 1) *
7884                                 sizeof(u32)), GFP_KERNEL);
7885
7886         if ((h->ioaccel2_cmd_pool == NULL) ||
7887                 (h->ioaccel2_blockFetchTable == NULL))
7888                 goto clean_up;
7889
7890         memset(h->ioaccel2_cmd_pool, 0,
7891                 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
7892         return 0;
7893
7894 clean_up:
7895         if (h->ioaccel2_cmd_pool)
7896                 pci_free_consistent(h->pdev,
7897                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
7898                         h->ioaccel2_cmd_pool, h->ioaccel2_cmd_pool_dhandle);
7899         kfree(h->ioaccel2_blockFetchTable);
7900         return 1;
7901 }
7902
7903 static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
7904 {
7905         u32 trans_support;
7906         unsigned long transMethod = CFGTBL_Trans_Performant |
7907                                         CFGTBL_Trans_use_short_tags;
7908         int i;
7909
7910         if (hpsa_simple_mode)
7911                 return;
7912
7913         trans_support = readl(&(h->cfgtable->TransportSupport));
7914         if (!(trans_support & PERFORMANT_MODE))
7915                 return;
7916
7917         /* Check for I/O accelerator mode support */
7918         if (trans_support & CFGTBL_Trans_io_accel1) {
7919                 transMethod |= CFGTBL_Trans_io_accel1 |
7920                                 CFGTBL_Trans_enable_directed_msix;
7921                 if (hpsa_alloc_ioaccel1_cmd_and_bft(h))
7922                         goto clean_up;
7923         } else {
7924                 if (trans_support & CFGTBL_Trans_io_accel2) {
7925                                 transMethod |= CFGTBL_Trans_io_accel2 |
7926                                 CFGTBL_Trans_enable_directed_msix;
7927                 if (hpsa_alloc_ioaccel2_cmd_and_bft(h))
7928                         goto clean_up;
7929                 }
7930         }
7931
7932         h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1;
7933         hpsa_get_max_perf_mode_cmds(h);
7934         /* Performant mode ring buffer and supporting data structures */
7935         h->reply_queue_size = h->max_commands * sizeof(u64);
7936
7937         for (i = 0; i < h->nreply_queues; i++) {
7938                 h->reply_queue[i].head = pci_alloc_consistent(h->pdev,
7939                                                 h->reply_queue_size,
7940                                                 &(h->reply_queue[i].busaddr));
7941                 if (!h->reply_queue[i].head)
7942                         goto clean_up;
7943                 h->reply_queue[i].size = h->max_commands;
7944                 h->reply_queue[i].wraparound = 1;  /* spec: init to 1 */
7945                 h->reply_queue[i].current_entry = 0;
7946         }
7947
7948         /* Need a block fetch table for performant mode */
7949         h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
7950                                 sizeof(u32)), GFP_KERNEL);
7951         if (!h->blockFetchTable)
7952                 goto clean_up;
7953
7954         hpsa_enter_performant_mode(h, trans_support);
7955         return;
7956
7957 clean_up:
7958         hpsa_free_reply_queues(h);
7959         kfree(h->blockFetchTable);
7960 }
7961
7962 static int is_accelerated_cmd(struct CommandList *c)
7963 {
7964         return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
7965 }
7966
7967 static void hpsa_drain_accel_commands(struct ctlr_info *h)
7968 {
7969         struct CommandList *c = NULL;
7970         int i, accel_cmds_out;
7971         int refcount;
7972
7973         do { /* wait for all outstanding ioaccel commands to drain out */
7974                 accel_cmds_out = 0;
7975                 for (i = 0; i < h->nr_cmds; i++) {
7976                         c = h->cmd_pool + i;
7977                         refcount = atomic_inc_return(&c->refcount);
7978                         if (refcount > 1) /* Command is allocated */
7979                                 accel_cmds_out += is_accelerated_cmd(c);
7980                         cmd_free(h, c);
7981                 }
7982                 if (accel_cmds_out <= 0)
7983                         break;
7984                 msleep(100);
7985         } while (1);
7986 }
7987
7988 /*
7989  *  This is it.  Register the PCI driver information for the cards we control
7990  *  the OS will call our registered routines when it finds one of our cards.
7991  */
7992 static int __init hpsa_init(void)
7993 {
7994         return pci_register_driver(&hpsa_pci_driver);
7995 }
7996
7997 static void __exit hpsa_cleanup(void)
7998 {
7999         pci_unregister_driver(&hpsa_pci_driver);
8000 }
8001
8002 static void __attribute__((unused)) verify_offsets(void)
8003 {
8004 #define VERIFY_OFFSET(member, offset) \
8005         BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
8006
8007         VERIFY_OFFSET(structure_size, 0);
8008         VERIFY_OFFSET(volume_blk_size, 4);
8009         VERIFY_OFFSET(volume_blk_cnt, 8);
8010         VERIFY_OFFSET(phys_blk_shift, 16);
8011         VERIFY_OFFSET(parity_rotation_shift, 17);
8012         VERIFY_OFFSET(strip_size, 18);
8013         VERIFY_OFFSET(disk_starting_blk, 20);
8014         VERIFY_OFFSET(disk_blk_cnt, 28);
8015         VERIFY_OFFSET(data_disks_per_row, 36);
8016         VERIFY_OFFSET(metadata_disks_per_row, 38);
8017         VERIFY_OFFSET(row_cnt, 40);
8018         VERIFY_OFFSET(layout_map_count, 42);
8019         VERIFY_OFFSET(flags, 44);
8020         VERIFY_OFFSET(dekindex, 46);
8021         /* VERIFY_OFFSET(reserved, 48 */
8022         VERIFY_OFFSET(data, 64);
8023
8024 #undef VERIFY_OFFSET
8025
8026 #define VERIFY_OFFSET(member, offset) \
8027         BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
8028
8029         VERIFY_OFFSET(IU_type, 0);
8030         VERIFY_OFFSET(direction, 1);
8031         VERIFY_OFFSET(reply_queue, 2);
8032         /* VERIFY_OFFSET(reserved1, 3);  */
8033         VERIFY_OFFSET(scsi_nexus, 4);
8034         VERIFY_OFFSET(Tag, 8);
8035         VERIFY_OFFSET(cdb, 16);
8036         VERIFY_OFFSET(cciss_lun, 32);
8037         VERIFY_OFFSET(data_len, 40);
8038         VERIFY_OFFSET(cmd_priority_task_attr, 44);
8039         VERIFY_OFFSET(sg_count, 45);
8040         /* VERIFY_OFFSET(reserved3 */
8041         VERIFY_OFFSET(err_ptr, 48);
8042         VERIFY_OFFSET(err_len, 56);
8043         /* VERIFY_OFFSET(reserved4  */
8044         VERIFY_OFFSET(sg, 64);
8045
8046 #undef VERIFY_OFFSET
8047
8048 #define VERIFY_OFFSET(member, offset) \
8049         BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
8050
8051         VERIFY_OFFSET(dev_handle, 0x00);
8052         VERIFY_OFFSET(reserved1, 0x02);
8053         VERIFY_OFFSET(function, 0x03);
8054         VERIFY_OFFSET(reserved2, 0x04);
8055         VERIFY_OFFSET(err_info, 0x0C);
8056         VERIFY_OFFSET(reserved3, 0x10);
8057         VERIFY_OFFSET(err_info_len, 0x12);
8058         VERIFY_OFFSET(reserved4, 0x13);
8059         VERIFY_OFFSET(sgl_offset, 0x14);
8060         VERIFY_OFFSET(reserved5, 0x15);
8061         VERIFY_OFFSET(transfer_len, 0x1C);
8062         VERIFY_OFFSET(reserved6, 0x20);
8063         VERIFY_OFFSET(io_flags, 0x24);
8064         VERIFY_OFFSET(reserved7, 0x26);
8065         VERIFY_OFFSET(LUN, 0x34);
8066         VERIFY_OFFSET(control, 0x3C);
8067         VERIFY_OFFSET(CDB, 0x40);
8068         VERIFY_OFFSET(reserved8, 0x50);
8069         VERIFY_OFFSET(host_context_flags, 0x60);
8070         VERIFY_OFFSET(timeout_sec, 0x62);
8071         VERIFY_OFFSET(ReplyQueue, 0x64);
8072         VERIFY_OFFSET(reserved9, 0x65);
8073         VERIFY_OFFSET(tag, 0x68);
8074         VERIFY_OFFSET(host_addr, 0x70);
8075         VERIFY_OFFSET(CISS_LUN, 0x78);
8076         VERIFY_OFFSET(SG, 0x78 + 8);
8077 #undef VERIFY_OFFSET
8078 }
8079
8080 module_init(hpsa_init);
8081 module_exit(hpsa_cleanup);