drivers/scsi/hpsa.c

   1 /*
   2  *    Disk Array driver for HP Smart Array SAS controllers
   3  *    Copyright 2000, 2014 Hewlett-Packard Development Company, L.P.
   4  *
   5  *    This program is free software; you can redistribute it and/or modify
   6  *    it under the terms of the GNU General Public License as published by
   7  *    the Free Software Foundation; version 2 of the License.
   8  *
   9  *    This program is distributed in the hope that it will be useful,
  10  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
  13  *
  14  *    You should have received a copy of the GNU General Public License
  15  *    along with this program; if not, write to the Free Software
  16  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17  *
  18  *    Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19  *
  20  */
  21
  22 #include <linux/module.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/types.h>
  25 #include <linux/pci.h>
  26 #include <linux/pci-aspm.h>
  27 #include <linux/kernel.h>
  28 #include <linux/slab.h>
  29 #include <linux/delay.h>
  30 #include <linux/fs.h>
  31 #include <linux/timer.h>
  32 #include <linux/init.h>
  33 #include <linux/spinlock.h>
  34 #include <linux/compat.h>
  35 #include <linux/blktrace_api.h>
  36 #include <linux/uaccess.h>
  37 #include <linux/io.h>
  38 #include <linux/dma-mapping.h>
  39 #include <linux/completion.h>
  40 #include <linux/moduleparam.h>
  41 #include <scsi/scsi.h>
  42 #include <scsi/scsi_cmnd.h>
  43 #include <scsi/scsi_device.h>
  44 #include <scsi/scsi_host.h>
  45 #include <scsi/scsi_tcq.h>
  46 #include <scsi/scsi_eh.h>
  47 #include <linux/cciss_ioctl.h>
  48 #include <linux/string.h>
  49 #include <linux/bitmap.h>
  50 #include <linux/atomic.h>
  51 #include <linux/jiffies.h>
  52 #include <linux/percpu-defs.h>
  53 #include <linux/percpu.h>
  54 #include <asm/unaligned.h>
  55 #include <asm/div64.h>
  56 #include "hpsa_cmd.h"
  57 #include "hpsa.h"
  58
  59 /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  60 #define HPSA_DRIVER_VERSION "3.4.4-1"
  61 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  62 #define HPSA "hpsa"
  63
  64 /* How long to wait for CISS doorbell communication */
  65 #define CLEAR_EVENT_WAIT_INTERVAL 20    /* ms for each msleep() call */
  66 #define MODE_CHANGE_WAIT_INTERVAL 10    /* ms for each msleep() call */
  67 #define MAX_CLEAR_EVENT_WAIT 30000      /* times 20 ms = 600 s */
  68 #define MAX_MODE_CHANGE_WAIT 2000       /* times 10 ms = 20 s */
  69 #define MAX_IOCTL_CONFIG_WAIT 1000
  70
  71 /*define how many times we will try a command because of bus resets */
  72 #define MAX_CMD_RETRIES 3
  73
  74 /* Embedded module documentation macros - see modules.h */
  75 MODULE_AUTHOR("Hewlett-Packard Company");
  76 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  77         HPSA_DRIVER_VERSION);
  78 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  79 MODULE_VERSION(HPSA_DRIVER_VERSION);
  80 MODULE_LICENSE("GPL");
  81
  82 static int hpsa_allow_any;
  83 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  84 MODULE_PARM_DESC(hpsa_allow_any,
  85                 "Allow hpsa driver to access unknown HP Smart Array hardware");
  86 static int hpsa_simple_mode;
  87 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
  88 MODULE_PARM_DESC(hpsa_simple_mode,
  89         "Use 'simple mode' rather than 'performant mode'");
  90
  91 /* define the PCI info for the cards we can control */
  92 static const struct pci_device_id hpsa_pci_device_id[] = {
  93         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3241},
  94         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3243},
  95         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3245},
  96         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3247},
  97         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3249},
  98         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324A},
  99         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324B},
 100         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3233},
 101         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3350},
 102         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3351},
 103         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3352},
 104         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3353},
 105         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3354},
 106         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3355},
 107         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3356},
 108         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1921},
 109         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1922},
 110         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1923},
 111         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1924},
 112         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1926},
 113         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1928},
 114         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1929},
 115         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BD},
 116         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BE},
 117         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BF},
 118         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C0},
 119         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C1},
 120         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C2},
 121         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C3},
 122         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C4},
 123         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C5},
 124         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C6},
 125         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C7},
 126         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C8},
 127         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C9},
 128         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CA},
 129         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CB},
 130         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CC},
 131         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CD},
 132         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CE},
 133         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
 134         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
 135         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
 136         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
 137         {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
 138         {PCI_VENDOR_ID_HP,     PCI_ANY_ID,      PCI_ANY_ID, PCI_ANY_ID,
 139                 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
 140         {0,}
 141 };
 142
 143 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
 144
 145 /*  board_id = Subsystem Device ID & Vendor ID
 146  *  product = Marketing Name for the board
 147  *  access = Address of the struct of function pointers
 148  */
 149 static struct board_type products[] = {
 150         {0x3241103C, "Smart Array P212", &SA5_access},
 151         {0x3243103C, "Smart Array P410", &SA5_access},
 152         {0x3245103C, "Smart Array P410i", &SA5_access},
 153         {0x3247103C, "Smart Array P411", &SA5_access},
 154         {0x3249103C, "Smart Array P812", &SA5_access},
 155         {0x324A103C, "Smart Array P712m", &SA5_access},
 156         {0x324B103C, "Smart Array P711m", &SA5_access},
 157         {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
 158         {0x3350103C, "Smart Array P222", &SA5_access},
 159         {0x3351103C, "Smart Array P420", &SA5_access},
 160         {0x3352103C, "Smart Array P421", &SA5_access},
 161         {0x3353103C, "Smart Array P822", &SA5_access},
 162         {0x3354103C, "Smart Array P420i", &SA5_access},
 163         {0x3355103C, "Smart Array P220i", &SA5_access},
 164         {0x3356103C, "Smart Array P721m", &SA5_access},
 165         {0x1921103C, "Smart Array P830i", &SA5_access},
 166         {0x1922103C, "Smart Array P430", &SA5_access},
 167         {0x1923103C, "Smart Array P431", &SA5_access},
 168         {0x1924103C, "Smart Array P830", &SA5_access},
 169         {0x1926103C, "Smart Array P731m", &SA5_access},
 170         {0x1928103C, "Smart Array P230i", &SA5_access},
 171         {0x1929103C, "Smart Array P530", &SA5_access},
 172         {0x21BD103C, "Smart Array P244br", &SA5_access},
 173         {0x21BE103C, "Smart Array P741m", &SA5_access},
 174         {0x21BF103C, "Smart HBA H240ar", &SA5_access},
 175         {0x21C0103C, "Smart Array P440ar", &SA5_access},
 176         {0x21C1103C, "Smart Array P840ar", &SA5_access},
 177         {0x21C2103C, "Smart Array P440", &SA5_access},
 178         {0x21C3103C, "Smart Array P441", &SA5_access},
 179         {0x21C4103C, "Smart Array", &SA5_access},
 180         {0x21C5103C, "Smart Array P841", &SA5_access},
 181         {0x21C6103C, "Smart HBA H244br", &SA5_access},
 182         {0x21C7103C, "Smart HBA H240", &SA5_access},
 183         {0x21C8103C, "Smart HBA H241", &SA5_access},
 184         {0x21C9103C, "Smart Array", &SA5_access},
 185         {0x21CA103C, "Smart Array P246br", &SA5_access},
 186         {0x21CB103C, "Smart Array P840", &SA5_access},
 187         {0x21CC103C, "Smart Array", &SA5_access},
 188         {0x21CD103C, "Smart Array", &SA5_access},
 189         {0x21CE103C, "Smart HBA", &SA5_access},
 190         {0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
 191         {0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
 192         {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
 193         {0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
 194         {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
 195         {0xFFFF103C, "Unknown Smart Array", &SA5_access},
 196 };
 197
 198 static int number_of_controllers;
 199
 200 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
 201 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
 202 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
 203
 204 #ifdef CONFIG_COMPAT
 205 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd,
 206         void __user *arg);
 207 #endif
 208
 209 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
 210 static struct CommandList *cmd_alloc(struct ctlr_info *h);
 211 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
 212         void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
 213         int cmd_type);
 214 static void hpsa_free_cmd_pool(struct ctlr_info *h);
 215 #define VPD_PAGE (1 << 8)
 216
 217 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 218 static void hpsa_scan_start(struct Scsi_Host *);
 219 static int hpsa_scan_finished(struct Scsi_Host *sh,
 220         unsigned long elapsed_time);
 221 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth);
 222
 223 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
 224 static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
 225 static int hpsa_slave_alloc(struct scsi_device *sdev);
 226 static int hpsa_slave_configure(struct scsi_device *sdev);
 227 static void hpsa_slave_destroy(struct scsi_device *sdev);
 228
 229 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
 230 static int check_for_unit_attention(struct ctlr_info *h,
 231         struct CommandList *c);
 232 static void check_ioctl_unit_attention(struct ctlr_info *h,
 233         struct CommandList *c);
 234 /* performant mode helper functions */
 235 static void calc_bucket_map(int *bucket, int num_buckets,
 236         int nsgs, int min_blocks, u32 *bucket_map);
 237 static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
 238 static inline u32 next_command(struct ctlr_info *h, u8 q);
 239 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
 240                                u32 *cfg_base_addr, u64 *cfg_base_addr_index,
 241                                u64 *cfg_offset);
 242 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
 243                                     unsigned long *memory_bar);
 244 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
 245 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
 246                                      int wait_for_ready);
 247 static inline void finish_cmd(struct CommandList *c);
 248 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
 249 #define BOARD_NOT_READY 0
 250 #define BOARD_READY 1
 251 static void hpsa_drain_accel_commands(struct ctlr_info *h);
 252 static void hpsa_flush_cache(struct ctlr_info *h);
 253 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
 254         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
 255         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk);
 256 static void hpsa_command_resubmit_worker(struct work_struct *work);
 257 static u32 lockup_detected(struct ctlr_info *h);
 258 static int detect_controller_lockup(struct ctlr_info *h);
 259
 260 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
 261 {
 262         unsigned long *priv = shost_priv(sdev->host);
 263         return (struct ctlr_info *) *priv;
 264 }
 265
 266 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
 267 {
 268         unsigned long *priv = shost_priv(sh);
 269         return (struct ctlr_info *) *priv;
 270 }
 271
 272 /* extract sense key, asc, and ascq from sense data.  -1 means invalid. */
 273 static void decode_sense_data(const u8 *sense_data, int sense_data_len,
 274                         u8 *sense_key, u8 *asc, u8 *ascq)
 275 {
 276         struct scsi_sense_hdr sshdr;
 277         bool rc;
 278
 279         *sense_key = -1;
 280         *asc = -1;
 281         *ascq = -1;
 282
 283         if (sense_data_len < 1)
 284                 return;
 285
 286         rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr);
 287         if (rc) {
 288                 *sense_key = sshdr.sense_key;
 289                 *asc = sshdr.asc;
 290                 *ascq = sshdr.ascq;
 291         }
 292 }
 293
 294 static int check_for_unit_attention(struct ctlr_info *h,
 295         struct CommandList *c)
 296 {
 297         u8 sense_key, asc, ascq;
 298         int sense_len;
 299
 300         if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
 301                 sense_len = sizeof(c->err_info->SenseInfo);
 302         else
 303                 sense_len = c->err_info->SenseLen;
 304
 305         decode_sense_data(c->err_info->SenseInfo, sense_len,
 306                                 &sense_key, &asc, &ascq);
 307         if (sense_key != UNIT_ATTENTION || asc == -1)
 308                 return 0;
 309
 310         switch (asc) {
 311         case STATE_CHANGED:
 312                 dev_warn(&h->pdev->dev,
 313                         HPSA "%d: a state change detected, command retried\n",
 314                         h->ctlr);
 315                 break;
 316         case LUN_FAILED:
 317                 dev_warn(&h->pdev->dev,
 318                         HPSA "%d: LUN failure detected\n", h->ctlr);
 319                 break;
 320         case REPORT_LUNS_CHANGED:
 321                 dev_warn(&h->pdev->dev,
 322                         HPSA "%d: report LUN data changed\n", h->ctlr);
 323         /*
 324          * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
 325          * target (array) devices.
 326          */
 327                 break;
 328         case POWER_OR_RESET:
 329                 dev_warn(&h->pdev->dev, HPSA "%d: a power on "
 330                         "or device reset detected\n", h->ctlr);
 331                 break;
 332         case UNIT_ATTENTION_CLEARED:
 333                 dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
 334                     "cleared by another initiator\n", h->ctlr);
 335                 break;
 336         default:
 337                 dev_warn(&h->pdev->dev, HPSA "%d: unknown "
 338                         "unit attention detected\n", h->ctlr);
 339                 break;
 340         }
 341         return 1;
 342 }
 343
 344 static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
 345 {
 346         if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
 347                 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
 348                  c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
 349                 return 0;
 350         dev_warn(&h->pdev->dev, HPSA "device busy");
 351         return 1;
 352 }
 353
 354 static u32 lockup_detected(struct ctlr_info *h);
 355 static ssize_t host_show_lockup_detected(struct device *dev,
 356                 struct device_attribute *attr, char *buf)
 357 {
 358         int ld;
 359         struct ctlr_info *h;
 360         struct Scsi_Host *shost = class_to_shost(dev);
 361
 362         h = shost_to_hba(shost);
 363         ld = lockup_detected(h);
 364
 365         return sprintf(buf, "ld=%d\n", ld);
 366 }
 367
 368 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
 369                                          struct device_attribute *attr,
 370                                          const char *buf, size_t count)
 371 {
 372         int status, len;
 373         struct ctlr_info *h;
 374         struct Scsi_Host *shost = class_to_shost(dev);
 375         char tmpbuf[10];
 376
 377         if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
 378                 return -EACCES;
 379         len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
 380         strncpy(tmpbuf, buf, len);
 381         tmpbuf[len] = '\0';
 382         if (sscanf(tmpbuf, "%d", &status) != 1)
 383                 return -EINVAL;
 384         h = shost_to_hba(shost);
 385         h->acciopath_status = !!status;
 386         dev_warn(&h->pdev->dev,
 387                 "hpsa: HP SSD Smart Path %s via sysfs update.\n",
 388                 h->acciopath_status ? "enabled" : "disabled");
 389         return count;
 390 }
 391
 392 static ssize_t host_store_raid_offload_debug(struct device *dev,
 393                                          struct device_attribute *attr,
 394                                          const char *buf, size_t count)
 395 {
 396         int debug_level, len;
 397         struct ctlr_info *h;
 398         struct Scsi_Host *shost = class_to_shost(dev);
 399         char tmpbuf[10];
 400
 401         if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
 402                 return -EACCES;
 403         len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
 404         strncpy(tmpbuf, buf, len);
 405         tmpbuf[len] = '\0';
 406         if (sscanf(tmpbuf, "%d", &debug_level) != 1)
 407                 return -EINVAL;
 408         if (debug_level < 0)
 409                 debug_level = 0;
 410         h = shost_to_hba(shost);
 411         h->raid_offload_debug = debug_level;
 412         dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
 413                 h->raid_offload_debug);
 414         return count;
 415 }
 416
 417 static ssize_t host_store_rescan(struct device *dev,
 418                                  struct device_attribute *attr,
 419                                  const char *buf, size_t count)
 420 {
 421         struct ctlr_info *h;
 422         struct Scsi_Host *shost = class_to_shost(dev);
 423         h = shost_to_hba(shost);
 424         hpsa_scan_start(h->scsi_host);
 425         return count;
 426 }
 427
 428 static ssize_t host_show_firmware_revision(struct device *dev,
 429              struct device_attribute *attr, char *buf)
 430 {
 431         struct ctlr_info *h;
 432         struct Scsi_Host *shost = class_to_shost(dev);
 433         unsigned char *fwrev;
 434
 435         h = shost_to_hba(shost);
 436         if (!h->hba_inquiry_data)
 437                 return 0;
 438         fwrev = &h->hba_inquiry_data[32];
 439         return snprintf(buf, 20, "%c%c%c%c\n",
 440                 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
 441 }
 442
 443 static ssize_t host_show_commands_outstanding(struct device *dev,
 444              struct device_attribute *attr, char *buf)
 445 {
 446         struct Scsi_Host *shost = class_to_shost(dev);
 447         struct ctlr_info *h = shost_to_hba(shost);
 448
 449         return snprintf(buf, 20, "%d\n",
 450                         atomic_read(&h->commands_outstanding));
 451 }
 452
 453 static ssize_t host_show_transport_mode(struct device *dev,
 454         struct device_attribute *attr, char *buf)
 455 {
 456         struct ctlr_info *h;
 457         struct Scsi_Host *shost = class_to_shost(dev);
 458
 459         h = shost_to_hba(shost);
 460         return snprintf(buf, 20, "%s\n",
 461                 h->transMethod & CFGTBL_Trans_Performant ?
 462                         "performant" : "simple");
 463 }
 464
 465 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
 466         struct device_attribute *attr, char *buf)
 467 {
 468         struct ctlr_info *h;
 469         struct Scsi_Host *shost = class_to_shost(dev);
 470
 471         h = shost_to_hba(shost);
 472         return snprintf(buf, 30, "HP SSD Smart Path %s\n",
 473                 (h->acciopath_status == 1) ?  "enabled" : "disabled");
 474 }
 475
 476 /* List of controllers which cannot be hard reset on kexec with reset_devices */
 477 static u32 unresettable_controller[] = {
 478         0x324a103C, /* Smart Array P712m */
 479         0x324b103C, /* Smart Array P711m */
 480         0x3223103C, /* Smart Array P800 */
 481         0x3234103C, /* Smart Array P400 */
 482         0x3235103C, /* Smart Array P400i */
 483         0x3211103C, /* Smart Array E200i */
 484         0x3212103C, /* Smart Array E200 */
 485         0x3213103C, /* Smart Array E200i */
 486         0x3214103C, /* Smart Array E200i */
 487         0x3215103C, /* Smart Array E200i */
 488         0x3237103C, /* Smart Array E500 */
 489         0x323D103C, /* Smart Array P700m */
 490         0x40800E11, /* Smart Array 5i */
 491         0x409C0E11, /* Smart Array 6400 */
 492         0x409D0E11, /* Smart Array 6400 EM */
 493         0x40700E11, /* Smart Array 5300 */
 494         0x40820E11, /* Smart Array 532 */
 495         0x40830E11, /* Smart Array 5312 */
 496         0x409A0E11, /* Smart Array 641 */
 497         0x409B0E11, /* Smart Array 642 */
 498         0x40910E11, /* Smart Array 6i */
 499 };
 500
 501 /* List of controllers which cannot even be soft reset */
 502 static u32 soft_unresettable_controller[] = {
 503         0x40800E11, /* Smart Array 5i */
 504         0x40700E11, /* Smart Array 5300 */
 505         0x40820E11, /* Smart Array 532 */
 506         0x40830E11, /* Smart Array 5312 */
 507         0x409A0E11, /* Smart Array 641 */
 508         0x409B0E11, /* Smart Array 642 */
 509         0x40910E11, /* Smart Array 6i */
 510         /* Exclude 640x boards.  These are two pci devices in one slot
 511          * which share a battery backed cache module.  One controls the
 512          * cache, the other accesses the cache through the one that controls
 513          * it.  If we reset the one controlling the cache, the other will
 514          * likely not be happy.  Just forbid resetting this conjoined mess.
 515          * The 640x isn't really supported by hpsa anyway.
 516          */
 517         0x409C0E11, /* Smart Array 6400 */
 518         0x409D0E11, /* Smart Array 6400 EM */
 519 };
 520
 521 static u32 needs_abort_tags_swizzled[] = {
 522         0x323D103C, /* Smart Array P700m */
 523         0x324a103C, /* Smart Array P712m */
 524         0x324b103C, /* SmartArray P711m */
 525 };
 526
 527 static int board_id_in_array(u32 a[], int nelems, u32 board_id)
 528 {
 529         int i;
 530
 531         for (i = 0; i < nelems; i++)
 532                 if (a[i] == board_id)
 533                         return 1;
 534         return 0;
 535 }
 536
 537 static int ctlr_is_hard_resettable(u32 board_id)
 538 {
 539         return !board_id_in_array(unresettable_controller,
 540                         ARRAY_SIZE(unresettable_controller), board_id);
 541 }
 542
 543 static int ctlr_is_soft_resettable(u32 board_id)
 544 {
 545         return !board_id_in_array(soft_unresettable_controller,
 546                         ARRAY_SIZE(soft_unresettable_controller), board_id);
 547 }
 548
 549 static int ctlr_is_resettable(u32 board_id)
 550 {
 551         return ctlr_is_hard_resettable(board_id) ||
 552                 ctlr_is_soft_resettable(board_id);
 553 }
 554
 555 static int ctlr_needs_abort_tags_swizzled(u32 board_id)
 556 {
 557         return board_id_in_array(needs_abort_tags_swizzled,
 558                         ARRAY_SIZE(needs_abort_tags_swizzled), board_id);
 559 }
 560
 561 static ssize_t host_show_resettable(struct device *dev,
 562         struct device_attribute *attr, char *buf)
 563 {
 564         struct ctlr_info *h;
 565         struct Scsi_Host *shost = class_to_shost(dev);
 566
 567         h = shost_to_hba(shost);
 568         return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
 569 }
 570
 571 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
 572 {
 573         return (scsi3addr[3] & 0xC0) == 0x40;
 574 }
 575
 576 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6",
 577         "1(+0)ADM", "UNKNOWN"
 578 };
 579 #define HPSA_RAID_0     0
 580 #define HPSA_RAID_4     1
 581 #define HPSA_RAID_1     2       /* also used for RAID 10 */
 582 #define HPSA_RAID_5     3       /* also used for RAID 50 */
 583 #define HPSA_RAID_51    4
 584 #define HPSA_RAID_6     5       /* also used for RAID 60 */
 585 #define HPSA_RAID_ADM   6       /* also used for RAID 1+0 ADM */
 586 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
 587
 588 static ssize_t raid_level_show(struct device *dev,
 589              struct device_attribute *attr, char *buf)
 590 {
 591         ssize_t l = 0;
 592         unsigned char rlevel;
 593         struct ctlr_info *h;
 594         struct scsi_device *sdev;
 595         struct hpsa_scsi_dev_t *hdev;
 596         unsigned long flags;
 597
 598         sdev = to_scsi_device(dev);
 599         h = sdev_to_hba(sdev);
 600         spin_lock_irqsave(&h->lock, flags);
 601         hdev = sdev->hostdata;
 602         if (!hdev) {
 603                 spin_unlock_irqrestore(&h->lock, flags);
 604                 return -ENODEV;
 605         }
 606
 607         /* Is this even a logical drive? */
 608         if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
 609                 spin_unlock_irqrestore(&h->lock, flags);
 610                 l = snprintf(buf, PAGE_SIZE, "N/A\n");
 611                 return l;
 612         }
 613
 614         rlevel = hdev->raid_level;
 615         spin_unlock_irqrestore(&h->lock, flags);
 616         if (rlevel > RAID_UNKNOWN)
 617                 rlevel = RAID_UNKNOWN;
 618         l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
 619         return l;
 620 }
 621
 622 static ssize_t lunid_show(struct device *dev,
 623              struct device_attribute *attr, char *buf)
 624 {
 625         struct ctlr_info *h;
 626         struct scsi_device *sdev;
 627         struct hpsa_scsi_dev_t *hdev;
 628         unsigned long flags;
 629         unsigned char lunid[8];
 630
 631         sdev = to_scsi_device(dev);
 632         h = sdev_to_hba(sdev);
 633         spin_lock_irqsave(&h->lock, flags);
 634         hdev = sdev->hostdata;
 635         if (!hdev) {
 636                 spin_unlock_irqrestore(&h->lock, flags);
 637                 return -ENODEV;
 638         }
 639         memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
 640         spin_unlock_irqrestore(&h->lock, flags);
 641         return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
 642                 lunid[0], lunid[1], lunid[2], lunid[3],
 643                 lunid[4], lunid[5], lunid[6], lunid[7]);
 644 }
 645
 646 static ssize_t unique_id_show(struct device *dev,
 647              struct device_attribute *attr, char *buf)
 648 {
 649         struct ctlr_info *h;
 650         struct scsi_device *sdev;
 651         struct hpsa_scsi_dev_t *hdev;
 652         unsigned long flags;
 653         unsigned char sn[16];
 654
 655         sdev = to_scsi_device(dev);
 656         h = sdev_to_hba(sdev);
 657         spin_lock_irqsave(&h->lock, flags);
 658         hdev = sdev->hostdata;
 659         if (!hdev) {
 660                 spin_unlock_irqrestore(&h->lock, flags);
 661                 return -ENODEV;
 662         }
 663         memcpy(sn, hdev->device_id, sizeof(sn));
 664         spin_unlock_irqrestore(&h->lock, flags);
 665         return snprintf(buf, 16 * 2 + 2,
 666                         "%02X%02X%02X%02X%02X%02X%02X%02X"
 667                         "%02X%02X%02X%02X%02X%02X%02X%02X\n",
 668                         sn[0], sn[1], sn[2], sn[3],
 669                         sn[4], sn[5], sn[6], sn[7],
 670                         sn[8], sn[9], sn[10], sn[11],
 671                         sn[12], sn[13], sn[14], sn[15]);
 672 }
 673
 674 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
 675              struct device_attribute *attr, char *buf)
 676 {
 677         struct ctlr_info *h;
 678         struct scsi_device *sdev;
 679         struct hpsa_scsi_dev_t *hdev;
 680         unsigned long flags;
 681         int offload_enabled;
 682
 683         sdev = to_scsi_device(dev);
 684         h = sdev_to_hba(sdev);
 685         spin_lock_irqsave(&h->lock, flags);
 686         hdev = sdev->hostdata;
 687         if (!hdev) {
 688                 spin_unlock_irqrestore(&h->lock, flags);
 689                 return -ENODEV;
 690         }
 691         offload_enabled = hdev->offload_enabled;
 692         spin_unlock_irqrestore(&h->lock, flags);
 693         return snprintf(buf, 20, "%d\n", offload_enabled);
 694 }
 695
 696 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
 697 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
 698 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
 699 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
 700 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
 701                         host_show_hp_ssd_smart_path_enabled, NULL);
 702 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
 703                 host_show_hp_ssd_smart_path_status,
 704                 host_store_hp_ssd_smart_path_status);
 705 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
 706                         host_store_raid_offload_debug);
 707 static DEVICE_ATTR(firmware_revision, S_IRUGO,
 708         host_show_firmware_revision, NULL);
 709 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
 710         host_show_commands_outstanding, NULL);
 711 static DEVICE_ATTR(transport_mode, S_IRUGO,
 712         host_show_transport_mode, NULL);
 713 static DEVICE_ATTR(resettable, S_IRUGO,
 714         host_show_resettable, NULL);
 715 static DEVICE_ATTR(lockup_detected, S_IRUGO,
 716         host_show_lockup_detected, NULL);
 717
 718 static struct device_attribute *hpsa_sdev_attrs[] = {
 719         &dev_attr_raid_level,
 720         &dev_attr_lunid,
 721         &dev_attr_unique_id,
 722         &dev_attr_hp_ssd_smart_path_enabled,
 723         &dev_attr_lockup_detected,
 724         NULL,
 725 };
 726
 727 static struct device_attribute *hpsa_shost_attrs[] = {
 728         &dev_attr_rescan,
 729         &dev_attr_firmware_revision,
 730         &dev_attr_commands_outstanding,
 731         &dev_attr_transport_mode,
 732         &dev_attr_resettable,
 733         &dev_attr_hp_ssd_smart_path_status,
 734         &dev_attr_raid_offload_debug,
 735         NULL,
 736 };
 737
 738 #define HPSA_NRESERVED_CMDS     (HPSA_CMDS_RESERVED_FOR_ABORTS + \
 739                 HPSA_CMDS_RESERVED_FOR_DRIVER + HPSA_MAX_CONCURRENT_PASSTHRUS)
 740
 741 static struct scsi_host_template hpsa_driver_template = {
 742         .module                 = THIS_MODULE,
 743         .name                   = HPSA,
 744         .proc_name              = HPSA,
 745         .queuecommand           = hpsa_scsi_queue_command,
 746         .scan_start             = hpsa_scan_start,
 747         .scan_finished          = hpsa_scan_finished,
 748         .change_queue_depth     = hpsa_change_queue_depth,
 749         .this_id                = -1,
 750         .use_clustering         = ENABLE_CLUSTERING,
 751         .eh_abort_handler       = hpsa_eh_abort_handler,
 752         .eh_device_reset_handler = hpsa_eh_device_reset_handler,
 753         .ioctl                  = hpsa_ioctl,
 754         .slave_alloc            = hpsa_slave_alloc,
 755         .slave_configure        = hpsa_slave_configure,
 756         .slave_destroy          = hpsa_slave_destroy,
 757 #ifdef CONFIG_COMPAT
 758         .compat_ioctl           = hpsa_compat_ioctl,
 759 #endif
 760         .sdev_attrs = hpsa_sdev_attrs,
 761         .shost_attrs = hpsa_shost_attrs,
 762         .max_sectors = 8192,
 763         .no_write_same = 1,
 764 };
 765
 766 static inline u32 next_command(struct ctlr_info *h, u8 q)
 767 {
 768         u32 a;
 769         struct reply_queue_buffer *rq = &h->reply_queue[q];
 770
 771         if (h->transMethod & CFGTBL_Trans_io_accel1)
 772                 return h->access.command_completed(h, q);
 773
 774         if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
 775                 return h->access.command_completed(h, q);
 776
 777         if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
 778                 a = rq->head[rq->current_entry];
 779                 rq->current_entry++;
 780                 atomic_dec(&h->commands_outstanding);
 781         } else {
 782                 a = FIFO_EMPTY;
 783         }
 784         /* Check for wraparound */
 785         if (rq->current_entry == h->max_commands) {
 786                 rq->current_entry = 0;
 787                 rq->wraparound ^= 1;
 788         }
 789         return a;
 790 }
 791
 792 /*
 793  * There are some special bits in the bus address of the
 794  * command that we have to set for the controller to know
 795  * how to process the command:
 796  *
 797  * Normal performant mode:
 798  * bit 0: 1 means performant mode, 0 means simple mode.
 799  * bits 1-3 = block fetch table entry
 800  * bits 4-6 = command type (== 0)
 801  *
 802  * ioaccel1 mode:
 803  * bit 0 = "performant mode" bit.
 804  * bits 1-3 = block fetch table entry
 805  * bits 4-6 = command type (== 110)
 806  * (command type is needed because ioaccel1 mode
 807  * commands are submitted through the same register as normal
 808  * mode commands, so this is how the controller knows whether
 809  * the command is normal mode or ioaccel1 mode.)
 810  *
 811  * ioaccel2 mode:
 812  * bit 0 = "performant mode" bit.
 813  * bits 1-4 = block fetch table entry (note extra bit)
 814  * bits 4-6 = not needed, because ioaccel2 mode has
 815  * a separate special register for submitting commands.
 816  */
 817
 818 /*
 819  * set_performant_mode: Modify the tag for cciss performant
 820  * set bit 0 for pull model, bits 3-1 for block fetch
 821  * register number
 822  */
 823 #define DEFAULT_REPLY_QUEUE (-1)
 824 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c,
 825                                         int reply_queue)
 826 {
 827         if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
 828                 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
 829                 if (unlikely(!h->msix_vector))
 830                         return;
 831                 if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
 832                         c->Header.ReplyQueue =
 833                                 raw_smp_processor_id() % h->nreply_queues;
 834                 else
 835                         c->Header.ReplyQueue = reply_queue % h->nreply_queues;
 836         }
 837 }
 838
 839 static void set_ioaccel1_performant_mode(struct ctlr_info *h,
 840                                                 struct CommandList *c,
 841                                                 int reply_queue)
 842 {
 843         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
 844
 845         /*
 846          * Tell the controller to post the reply to the queue for this
 847          * processor.  This seems to give the best I/O throughput.
 848          */
 849         if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
 850                 cp->ReplyQueue = smp_processor_id() % h->nreply_queues;
 851         else
 852                 cp->ReplyQueue = reply_queue % h->nreply_queues;
 853         /*
 854          * Set the bits in the address sent down to include:
 855          *  - performant mode bit (bit 0)
 856          *  - pull count (bits 1-3)
 857          *  - command type (bits 4-6)
 858          */
 859         c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
 860                                         IOACCEL1_BUSADDR_CMDTYPE;
 861 }
 862
 863 static void set_ioaccel2_performant_mode(struct ctlr_info *h,
 864                                                 struct CommandList *c,
 865                                                 int reply_queue)
 866 {
 867         struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
 868
 869         /*
 870          * Tell the controller to post the reply to the queue for this
 871          * processor.  This seems to give the best I/O throughput.
 872          */
 873         if (likely(reply_queue == DEFAULT_REPLY_QUEUE))
 874                 cp->reply_queue = smp_processor_id() % h->nreply_queues;
 875         else
 876                 cp->reply_queue = reply_queue % h->nreply_queues;
 877         /*
 878          * Set the bits in the address sent down to include:
 879          *  - performant mode bit not used in ioaccel mode 2
 880          *  - pull count (bits 0-3)
 881          *  - command type isn't needed for ioaccel2
 882          */
 883         c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
 884 }
 885
 886 static int is_firmware_flash_cmd(u8 *cdb)
 887 {
 888         return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
 889 }
 890
 891 /*
 892  * During firmware flash, the heartbeat register may not update as frequently
 893  * as it should.  So we dial down lockup detection during firmware flash. and
 894  * dial it back up when firmware flash completes.
 895  */
 896 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
 897 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
 898 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
 899                 struct CommandList *c)
 900 {
 901         if (!is_firmware_flash_cmd(c->Request.CDB))
 902                 return;
 903         atomic_inc(&h->firmware_flash_in_progress);
 904         h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
 905 }
 906
 907 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
 908                 struct CommandList *c)
 909 {
 910         if (is_firmware_flash_cmd(c->Request.CDB) &&
 911                 atomic_dec_and_test(&h->firmware_flash_in_progress))
 912                 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
 913 }
 914
 915 static void __enqueue_cmd_and_start_io(struct ctlr_info *h,
 916         struct CommandList *c, int reply_queue)
 917 {
 918         dial_down_lockup_detection_during_fw_flash(h, c);
 919         atomic_inc(&h->commands_outstanding);
 920         switch (c->cmd_type) {
 921         case CMD_IOACCEL1:
 922                 set_ioaccel1_performant_mode(h, c, reply_queue);
 923                 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
 924                 break;
 925         case CMD_IOACCEL2:
 926                 set_ioaccel2_performant_mode(h, c, reply_queue);
 927                 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
 928                 break;
 929         default:
 930                 set_performant_mode(h, c, reply_queue);
 931                 h->access.submit_command(h, c);
 932         }
 933 }
 934
 935 static void enqueue_cmd_and_start_io(struct ctlr_info *h,
 936                                         struct CommandList *c)
 937 {
 938         __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE);
 939 }
 940
 941 static inline int is_hba_lunid(unsigned char scsi3addr[])
 942 {
 943         return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
 944 }
 945
 946 static inline int is_scsi_rev_5(struct ctlr_info *h)
 947 {
 948         if (!h->hba_inquiry_data)
 949                 return 0;
 950         if ((h->hba_inquiry_data[2] & 0x07) == 5)
 951                 return 1;
 952         return 0;
 953 }
 954
 955 static int hpsa_find_target_lun(struct ctlr_info *h,
 956         unsigned char scsi3addr[], int bus, int *target, int *lun)
 957 {
 958         /* finds an unused bus, target, lun for a new physical device
 959          * assumes h->devlock is held
 960          */
 961         int i, found = 0;
 962         DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
 963
 964         bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
 965
 966         for (i = 0; i < h->ndevices; i++) {
 967                 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
 968                         __set_bit(h->dev[i]->target, lun_taken);
 969         }
 970
 971         i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
 972         if (i < HPSA_MAX_DEVICES) {
 973                 /* *bus = 1; */
 974                 *target = i;
 975                 *lun = 0;
 976                 found = 1;
 977         }
 978         return !found;
 979 }
 980
 981 static inline void hpsa_show_dev_msg(const char *level, struct ctlr_info *h,
 982         struct hpsa_scsi_dev_t *dev, char *description)
 983 {
 984         dev_printk(level, &h->pdev->dev,
 985                         "scsi %d:%d:%d:%d: %s %s %.8s %.16s RAID-%s SSDSmartPathCap%c En%c Exp=%d\n",
 986                         h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
 987                         description,
 988                         scsi_device_type(dev->devtype),
 989                         dev->vendor,
 990                         dev->model,
 991                         dev->raid_level > RAID_UNKNOWN ?
 992                                 "RAID-?" : raid_label[dev->raid_level],
 993                         dev->offload_config ? '+' : '-',
 994                         dev->offload_enabled ? '+' : '-',
 995                         dev->expose_state);
 996 }
 997
 998 /* Add an entry into h->dev[] array. */
 999 static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
1000                 struct hpsa_scsi_dev_t *device,
1001                 struct hpsa_scsi_dev_t *added[], int *nadded)
1002 {
1003         /* assumes h->devlock is held */
1004         int n = h->ndevices;
1005         int i;
1006         unsigned char addr1[8], addr2[8];
1007         struct hpsa_scsi_dev_t *sd;
1008
1009         if (n >= HPSA_MAX_DEVICES) {
1010                 dev_err(&h->pdev->dev, "too many devices, some will be "
1011                         "inaccessible.\n");
1012                 return -1;
1013         }
1014
1015         /* physical devices do not have lun or target assigned until now. */
1016         if (device->lun != -1)
1017                 /* Logical device, lun is already assigned. */
1018                 goto lun_assigned;
1019
1020         /* If this device a non-zero lun of a multi-lun device
1021          * byte 4 of the 8-byte LUN addr will contain the logical
1022          * unit no, zero otherwise.
1023          */
1024         if (device->scsi3addr[4] == 0) {
1025                 /* This is not a non-zero lun of a multi-lun device */
1026                 if (hpsa_find_target_lun(h, device->scsi3addr,
1027                         device->bus, &device->target, &device->lun) != 0)
1028                         return -1;
1029                 goto lun_assigned;
1030         }
1031
1032         /* This is a non-zero lun of a multi-lun device.
1033          * Search through our list and find the device which
1034          * has the same 8 byte LUN address, excepting byte 4.
1035          * Assign the same bus and target for this new LUN.
1036          * Use the logical unit number from the firmware.
1037          */
1038         memcpy(addr1, device->scsi3addr, 8);
1039         addr1[4] = 0;
1040         for (i = 0; i < n; i++) {
1041                 sd = h->dev[i];
1042                 memcpy(addr2, sd->scsi3addr, 8);
1043                 addr2[4] = 0;
1044                 /* differ only in byte 4? */
1045                 if (memcmp(addr1, addr2, 8) == 0) {
1046                         device->bus = sd->bus;
1047                         device->target = sd->target;
1048                         device->lun = device->scsi3addr[4];
1049                         break;
1050                 }
1051         }
1052         if (device->lun == -1) {
1053                 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
1054                         " suspect firmware bug or unsupported hardware "
1055                         "configuration.\n");
1056                         return -1;
1057         }
1058
1059 lun_assigned:
1060
1061         h->dev[n] = device;
1062         h->ndevices++;
1063         device->offload_to_be_enabled = device->offload_enabled;
1064         device->offload_enabled = 0;
1065         added[*nadded] = device;
1066         (*nadded)++;
1067         hpsa_show_dev_msg(KERN_INFO, h, device,
1068                 device->expose_state & HPSA_SCSI_ADD ? "added" : "masked");
1069         return 0;
1070 }
1071
1072 /* Update an entry in h->dev[] array. */
1073 static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
1074         int entry, struct hpsa_scsi_dev_t *new_entry)
1075 {
1076         /* assumes h->devlock is held */
1077         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1078
1079         /* Raid level changed. */
1080         h->dev[entry]->raid_level = new_entry->raid_level;
1081
1082         /* Raid offload parameters changed.  Careful about the ordering. */
1083         if (new_entry->offload_config && new_entry->offload_enabled) {
1084                 /*
1085                  * if drive is newly offload_enabled, we want to copy the
1086                  * raid map data first.  If previously offload_enabled and
1087                  * offload_config were set, raid map data had better be
1088                  * the same as it was before.  if raid map data is changed
1089                  * then it had better be the case that
1090                  * h->dev[entry]->offload_enabled is currently 0.
1091                  */
1092                 h->dev[entry]->raid_map = new_entry->raid_map;
1093                 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
1094         }
1095         h->dev[entry]->offload_config = new_entry->offload_config;
1096         h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
1097         h->dev[entry]->queue_depth = new_entry->queue_depth;
1098
1099         /*
1100          * We can turn off ioaccel offload now, but need to delay turning
1101          * it on until we can update h->dev[entry]->phys_disk[], but we
1102          * can't do that until all the devices are updated.
1103          */
1104         h->dev[entry]->offload_to_be_enabled = new_entry->offload_enabled;
1105         if (!new_entry->offload_enabled)
1106                 h->dev[entry]->offload_enabled = 0;
1107
1108         hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated");
1109 }
1110
1111 /* Replace an entry from h->dev[] array. */
1112 static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
1113         int entry, struct hpsa_scsi_dev_t *new_entry,
1114         struct hpsa_scsi_dev_t *added[], int *nadded,
1115         struct hpsa_scsi_dev_t *removed[], int *nremoved)
1116 {
1117         /* assumes h->devlock is held */
1118         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1119         removed[*nremoved] = h->dev[entry];
1120         (*nremoved)++;
1121
1122         /*
1123          * New physical devices won't have target/lun assigned yet
1124          * so we need to preserve the values in the slot we are replacing.
1125          */
1126         if (new_entry->target == -1) {
1127                 new_entry->target = h->dev[entry]->target;
1128                 new_entry->lun = h->dev[entry]->lun;
1129         }
1130
1131         new_entry->offload_to_be_enabled = new_entry->offload_enabled;
1132         new_entry->offload_enabled = 0;
1133         h->dev[entry] = new_entry;
1134         added[*nadded] = new_entry;
1135         (*nadded)++;
1136         hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced");
1137 }
1138
1139 /* Remove an entry from h->dev[] array. */
1140 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
1141         struct hpsa_scsi_dev_t *removed[], int *nremoved)
1142 {
1143         /* assumes h->devlock is held */
1144         int i;
1145         struct hpsa_scsi_dev_t *sd;
1146
1147         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1148
1149         sd = h->dev[entry];
1150         removed[*nremoved] = h->dev[entry];
1151         (*nremoved)++;
1152
1153         for (i = entry; i < h->ndevices-1; i++)
1154                 h->dev[i] = h->dev[i+1];
1155         h->ndevices--;
1156         hpsa_show_dev_msg(KERN_INFO, h, sd, "removed");
1157 }
1158
1159 #define SCSI3ADDR_EQ(a, b) ( \
1160         (a)[7] == (b)[7] && \
1161         (a)[6] == (b)[6] && \
1162         (a)[5] == (b)[5] && \
1163         (a)[4] == (b)[4] && \
1164         (a)[3] == (b)[3] && \
1165         (a)[2] == (b)[2] && \
1166         (a)[1] == (b)[1] && \
1167         (a)[0] == (b)[0])
1168
1169 static void fixup_botched_add(struct ctlr_info *h,
1170         struct hpsa_scsi_dev_t *added)
1171 {
1172         /* called when scsi_add_device fails in order to re-adjust
1173          * h->dev[] to match the mid layer's view.
1174          */
1175         unsigned long flags;
1176         int i, j;
1177
1178         spin_lock_irqsave(&h->lock, flags);
1179         for (i = 0; i < h->ndevices; i++) {
1180                 if (h->dev[i] == added) {
1181                         for (j = i; j < h->ndevices-1; j++)
1182                                 h->dev[j] = h->dev[j+1];
1183                         h->ndevices--;
1184                         break;
1185                 }
1186         }
1187         spin_unlock_irqrestore(&h->lock, flags);
1188         kfree(added);
1189 }
1190
1191 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1192         struct hpsa_scsi_dev_t *dev2)
1193 {
1194         /* we compare everything except lun and target as these
1195          * are not yet assigned.  Compare parts likely
1196          * to differ first
1197          */
1198         if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1199                 sizeof(dev1->scsi3addr)) != 0)
1200                 return 0;
1201         if (memcmp(dev1->device_id, dev2->device_id,
1202                 sizeof(dev1->device_id)) != 0)
1203                 return 0;
1204         if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1205                 return 0;
1206         if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1207                 return 0;
1208         if (dev1->devtype != dev2->devtype)
1209                 return 0;
1210         if (dev1->bus != dev2->bus)
1211                 return 0;
1212         return 1;
1213 }
1214
1215 static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1216         struct hpsa_scsi_dev_t *dev2)
1217 {
1218         /* Device attributes that can change, but don't mean
1219          * that the device is a different device, nor that the OS
1220          * needs to be told anything about the change.
1221          */
1222         if (dev1->raid_level != dev2->raid_level)
1223                 return 1;
1224         if (dev1->offload_config != dev2->offload_config)
1225                 return 1;
1226         if (dev1->offload_enabled != dev2->offload_enabled)
1227                 return 1;
1228         if (dev1->queue_depth != dev2->queue_depth)
1229                 return 1;
1230         return 0;
1231 }
1232
1233 /* Find needle in haystack.  If exact match found, return DEVICE_SAME,
1234  * and return needle location in *index.  If scsi3addr matches, but not
1235  * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1236  * location in *index.
1237  * In the case of a minor device attribute change, such as RAID level, just
1238  * return DEVICE_UPDATED, along with the updated device's location in index.
1239  * If needle not found, return DEVICE_NOT_FOUND.
1240  */
1241 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1242         struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1243         int *index)
1244 {
1245         int i;
1246 #define DEVICE_NOT_FOUND 0
1247 #define DEVICE_CHANGED 1
1248 #define DEVICE_SAME 2
1249 #define DEVICE_UPDATED 3
1250         for (i = 0; i < haystack_size; i++) {
1251                 if (haystack[i] == NULL) /* previously removed. */
1252                         continue;
1253                 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1254                         *index = i;
1255                         if (device_is_the_same(needle, haystack[i])) {
1256                                 if (device_updated(needle, haystack[i]))
1257                                         return DEVICE_UPDATED;
1258                                 return DEVICE_SAME;
1259                         } else {
1260                                 /* Keep offline devices offline */
1261                                 if (needle->volume_offline)
1262                                         return DEVICE_NOT_FOUND;
1263                                 return DEVICE_CHANGED;
1264                         }
1265                 }
1266         }
1267         *index = -1;
1268         return DEVICE_NOT_FOUND;
1269 }
1270
1271 static void hpsa_monitor_offline_device(struct ctlr_info *h,
1272                                         unsigned char scsi3addr[])
1273 {
1274         struct offline_device_entry *device;
1275         unsigned long flags;
1276
1277         /* Check to see if device is already on the list */
1278         spin_lock_irqsave(&h->offline_device_lock, flags);
1279         list_for_each_entry(device, &h->offline_device_list, offline_list) {
1280                 if (memcmp(device->scsi3addr, scsi3addr,
1281                         sizeof(device->scsi3addr)) == 0) {
1282                         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1283                         return;
1284                 }
1285         }
1286         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1287
1288         /* Device is not on the list, add it. */
1289         device = kmalloc(sizeof(*device), GFP_KERNEL);
1290         if (!device) {
1291                 dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__);
1292                 return;
1293         }
1294         memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
1295         spin_lock_irqsave(&h->offline_device_lock, flags);
1296         list_add_tail(&device->offline_list, &h->offline_device_list);
1297         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1298 }
1299
1300 /* Print a message explaining various offline volume states */
1301 static void hpsa_show_volume_status(struct ctlr_info *h,
1302         struct hpsa_scsi_dev_t *sd)
1303 {
1304         if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
1305                 dev_info(&h->pdev->dev,
1306                         "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
1307                         h->scsi_host->host_no,
1308                         sd->bus, sd->target, sd->lun);
1309         switch (sd->volume_offline) {
1310         case HPSA_LV_OK:
1311                 break;
1312         case HPSA_LV_UNDERGOING_ERASE:
1313                 dev_info(&h->pdev->dev,
1314                         "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
1315                         h->scsi_host->host_no,
1316                         sd->bus, sd->target, sd->lun);
1317                 break;
1318         case HPSA_LV_UNDERGOING_RPI:
1319                 dev_info(&h->pdev->dev,
1320                         "C%d:B%d:T%d:L%d Volume is undergoing rapid parity initialization process.\n",
1321                         h->scsi_host->host_no,
1322                         sd->bus, sd->target, sd->lun);
1323                 break;
1324         case HPSA_LV_PENDING_RPI:
1325                 dev_info(&h->pdev->dev,
1326                                 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
1327                                 h->scsi_host->host_no,
1328                                 sd->bus, sd->target, sd->lun);
1329                 break;
1330         case HPSA_LV_ENCRYPTED_NO_KEY:
1331                 dev_info(&h->pdev->dev,
1332                         "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
1333                         h->scsi_host->host_no,
1334                         sd->bus, sd->target, sd->lun);
1335                 break;
1336         case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
1337                 dev_info(&h->pdev->dev,
1338                         "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
1339                         h->scsi_host->host_no,
1340                         sd->bus, sd->target, sd->lun);
1341                 break;
1342         case HPSA_LV_UNDERGOING_ENCRYPTION:
1343                 dev_info(&h->pdev->dev,
1344                         "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
1345                         h->scsi_host->host_no,
1346                         sd->bus, sd->target, sd->lun);
1347                 break;
1348         case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
1349                 dev_info(&h->pdev->dev,
1350                         "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
1351                         h->scsi_host->host_no,
1352                         sd->bus, sd->target, sd->lun);
1353                 break;
1354         case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1355                 dev_info(&h->pdev->dev,
1356                         "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
1357                         h->scsi_host->host_no,
1358                         sd->bus, sd->target, sd->lun);
1359                 break;
1360         case HPSA_LV_PENDING_ENCRYPTION:
1361                 dev_info(&h->pdev->dev,
1362                         "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
1363                         h->scsi_host->host_no,
1364                         sd->bus, sd->target, sd->lun);
1365                 break;
1366         case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
1367                 dev_info(&h->pdev->dev,
1368                         "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
1369                         h->scsi_host->host_no,
1370                         sd->bus, sd->target, sd->lun);
1371                 break;
1372         }
1373 }
1374
1375 /*
1376  * Figure the list of physical drive pointers for a logical drive with
1377  * raid offload configured.
1378  */
1379 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h,
1380                                 struct hpsa_scsi_dev_t *dev[], int ndevices,
1381                                 struct hpsa_scsi_dev_t *logical_drive)
1382 {
1383         struct raid_map_data *map = &logical_drive->raid_map;
1384         struct raid_map_disk_data *dd = &map->data[0];
1385         int i, j;
1386         int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
1387                                 le16_to_cpu(map->metadata_disks_per_row);
1388         int nraid_map_entries = le16_to_cpu(map->row_cnt) *
1389                                 le16_to_cpu(map->layout_map_count) *
1390                                 total_disks_per_row;
1391         int nphys_disk = le16_to_cpu(map->layout_map_count) *
1392                                 total_disks_per_row;
1393         int qdepth;
1394
1395         if (nraid_map_entries > RAID_MAP_MAX_ENTRIES)
1396                 nraid_map_entries = RAID_MAP_MAX_ENTRIES;
1397
1398         qdepth = 0;
1399         for (i = 0; i < nraid_map_entries; i++) {
1400                 logical_drive->phys_disk[i] = NULL;
1401                 if (!logical_drive->offload_config)
1402                         continue;
1403                 for (j = 0; j < ndevices; j++) {
1404                         if (dev[j]->devtype != TYPE_DISK)
1405                                 continue;
1406                         if (is_logical_dev_addr_mode(dev[j]->scsi3addr))
1407                                 continue;
1408                         if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle)
1409                                 continue;
1410
1411                         logical_drive->phys_disk[i] = dev[j];
1412                         if (i < nphys_disk)
1413                                 qdepth = min(h->nr_cmds, qdepth +
1414                                     logical_drive->phys_disk[i]->queue_depth);
1415                         break;
1416                 }
1417
1418                 /*
1419                  * This can happen if a physical drive is removed and
1420                  * the logical drive is degraded.  In that case, the RAID
1421                  * map data will refer to a physical disk which isn't actually
1422                  * present.  And in that case offload_enabled should already
1423                  * be 0, but we'll turn it off here just in case
1424                  */
1425                 if (!logical_drive->phys_disk[i]) {
1426                         logical_drive->offload_enabled = 0;
1427                         logical_drive->offload_to_be_enabled = 0;
1428                         logical_drive->queue_depth = 8;
1429                 }
1430         }
1431         if (nraid_map_entries)
1432                 /*
1433                  * This is correct for reads, too high for full stripe writes,
1434                  * way too high for partial stripe writes
1435                  */
1436                 logical_drive->queue_depth = qdepth;
1437         else
1438                 logical_drive->queue_depth = h->nr_cmds;
1439 }
1440
1441 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h,
1442                                 struct hpsa_scsi_dev_t *dev[], int ndevices)
1443 {
1444         int i;
1445
1446         for (i = 0; i < ndevices; i++) {
1447                 if (dev[i]->devtype != TYPE_DISK)
1448                         continue;
1449                 if (!is_logical_dev_addr_mode(dev[i]->scsi3addr))
1450                         continue;
1451
1452                 /*
1453                  * If offload is currently enabled, the RAID map and
1454                  * phys_disk[] assignment *better* not be changing
1455                  * and since it isn't changing, we do not need to
1456                  * update it.
1457                  */
1458                 if (dev[i]->offload_enabled)
1459                         continue;
1460
1461                 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]);
1462         }
1463 }
1464
1465 static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
1466         struct hpsa_scsi_dev_t *sd[], int nsds)
1467 {
1468         /* sd contains scsi3 addresses and devtypes, and inquiry
1469          * data.  This function takes what's in sd to be the current
1470          * reality and updates h->dev[] to reflect that reality.
1471          */
1472         int i, entry, device_change, changes = 0;
1473         struct hpsa_scsi_dev_t *csd;
1474         unsigned long flags;
1475         struct hpsa_scsi_dev_t **added, **removed;
1476         int nadded, nremoved;
1477         struct Scsi_Host *sh = NULL;
1478
1479         added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
1480         removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
1481
1482         if (!added || !removed) {
1483                 dev_warn(&h->pdev->dev, "out of memory in "
1484                         "adjust_hpsa_scsi_table\n");
1485                 goto free_and_out;
1486         }
1487
1488         spin_lock_irqsave(&h->devlock, flags);
1489
1490         /* find any devices in h->dev[] that are not in
1491          * sd[] and remove them from h->dev[], and for any
1492          * devices which have changed, remove the old device
1493          * info and add the new device info.
1494          * If minor device attributes change, just update
1495          * the existing device structure.
1496          */
1497         i = 0;
1498         nremoved = 0;
1499         nadded = 0;
1500         while (i < h->ndevices) {
1501                 csd = h->dev[i];
1502                 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1503                 if (device_change == DEVICE_NOT_FOUND) {
1504                         changes++;
1505                         hpsa_scsi_remove_entry(h, hostno, i,
1506                                 removed, &nremoved);
1507                         continue; /* remove ^^^, hence i not incremented */
1508                 } else if (device_change == DEVICE_CHANGED) {
1509                         changes++;
1510                         hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
1511                                 added, &nadded, removed, &nremoved);
1512                         /* Set it to NULL to prevent it from being freed
1513                          * at the bottom of hpsa_update_scsi_devices()
1514                          */
1515                         sd[entry] = NULL;
1516                 } else if (device_change == DEVICE_UPDATED) {
1517                         hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
1518                 }
1519                 i++;
1520         }
1521
1522         /* Now, make sure every device listed in sd[] is also
1523          * listed in h->dev[], adding them if they aren't found
1524          */
1525
1526         for (i = 0; i < nsds; i++) {
1527                 if (!sd[i]) /* if already added above. */
1528                         continue;
1529
1530                 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS
1531                  * as the SCSI mid-layer does not handle such devices well.
1532                  * It relentlessly loops sending TUR at 3Hz, then READ(10)
1533                  * at 160Hz, and prevents the system from coming up.
1534                  */
1535                 if (sd[i]->volume_offline) {
1536                         hpsa_show_volume_status(h, sd[i]);
1537                         hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline");
1538                         continue;
1539                 }
1540
1541                 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1542                                         h->ndevices, &entry);
1543                 if (device_change == DEVICE_NOT_FOUND) {
1544                         changes++;
1545                         if (hpsa_scsi_add_entry(h, hostno, sd[i],
1546                                 added, &nadded) != 0)
1547                                 break;
1548                         sd[i] = NULL; /* prevent from being freed later. */
1549                 } else if (device_change == DEVICE_CHANGED) {
1550                         /* should never happen... */
1551                         changes++;
1552                         dev_warn(&h->pdev->dev,
1553                                 "device unexpectedly changed.\n");
1554                         /* but if it does happen, we just ignore that device */
1555                 }
1556         }
1557         hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices);
1558
1559         /* Now that h->dev[]->phys_disk[] is coherent, we can enable
1560          * any logical drives that need it enabled.
1561          */
1562         for (i = 0; i < h->ndevices; i++)
1563                 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled;
1564
1565         spin_unlock_irqrestore(&h->devlock, flags);
1566
1567         /* Monitor devices which are in one of several NOT READY states to be
1568          * brought online later. This must be done without holding h->devlock,
1569          * so don't touch h->dev[]
1570          */
1571         for (i = 0; i < nsds; i++) {
1572                 if (!sd[i]) /* if already added above. */
1573                         continue;
1574                 if (sd[i]->volume_offline)
1575                         hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
1576         }
1577
1578         /* Don't notify scsi mid layer of any changes the first time through
1579          * (or if there are no changes) scsi_scan_host will do it later the
1580          * first time through.
1581          */
1582         if (hostno == -1 || !changes)
1583                 goto free_and_out;
1584
1585         sh = h->scsi_host;
1586         /* Notify scsi mid layer of any removed devices */
1587         for (i = 0; i < nremoved; i++) {
1588                 if (removed[i]->expose_state & HPSA_SCSI_ADD) {
1589                         struct scsi_device *sdev =
1590                                 scsi_device_lookup(sh, removed[i]->bus,
1591                                         removed[i]->target, removed[i]->lun);
1592                         if (sdev != NULL) {
1593                                 scsi_remove_device(sdev);
1594                                 scsi_device_put(sdev);
1595                         } else {
1596                                 /*
1597                                  * We don't expect to get here.
1598                                  * future cmds to this device will get selection
1599                                  * timeout as if the device was gone.
1600                                  */
1601                                 hpsa_show_dev_msg(KERN_WARNING, h, removed[i],
1602                                         "didn't find device for removal.");
1603                         }
1604                 }
1605                 kfree(removed[i]);
1606                 removed[i] = NULL;
1607         }
1608
1609         /* Notify scsi mid layer of any added devices */
1610         for (i = 0; i < nadded; i++) {
1611                 if (!(added[i]->expose_state & HPSA_SCSI_ADD))
1612                         continue;
1613                 if (scsi_add_device(sh, added[i]->bus,
1614                         added[i]->target, added[i]->lun) == 0)
1615                         continue;
1616                 hpsa_show_dev_msg(KERN_WARNING, h, added[i],
1617                                         "addition failed, device not added.");
1618                 /* now we have to remove it from h->dev,
1619                  * since it didn't get added to scsi mid layer
1620                  */
1621                 fixup_botched_add(h, added[i]);
1622         }
1623
1624 free_and_out:
1625         kfree(added);
1626         kfree(removed);
1627 }
1628
1629 /*
1630  * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
1631  * Assume's h->devlock is held.
1632  */
1633 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1634         int bus, int target, int lun)
1635 {
1636         int i;
1637         struct hpsa_scsi_dev_t *sd;
1638
1639         for (i = 0; i < h->ndevices; i++) {
1640                 sd = h->dev[i];
1641                 if (sd->bus == bus && sd->target == target && sd->lun == lun)
1642                         return sd;
1643         }
1644         return NULL;
1645 }
1646
1647 static int hpsa_slave_alloc(struct scsi_device *sdev)
1648 {
1649         struct hpsa_scsi_dev_t *sd;
1650         unsigned long flags;
1651         struct ctlr_info *h;
1652
1653         h = sdev_to_hba(sdev);
1654         spin_lock_irqsave(&h->devlock, flags);
1655         sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
1656                 sdev_id(sdev), sdev->lun);
1657         if (likely(sd)) {
1658                 atomic_set(&sd->ioaccel_cmds_out, 0);
1659                 sdev->hostdata = (sd->expose_state & HPSA_SCSI_ADD) ? sd : NULL;
1660         } else
1661                 sdev->hostdata = NULL;
1662         spin_unlock_irqrestore(&h->devlock, flags);
1663         return 0;
1664 }
1665
1666 /* configure scsi device based on internal per-device structure */
1667 static int hpsa_slave_configure(struct scsi_device *sdev)
1668 {
1669         struct hpsa_scsi_dev_t *sd;
1670         int queue_depth;
1671
1672         sd = sdev->hostdata;
1673         sdev->no_uld_attach = !sd || !(sd->expose_state & HPSA_ULD_ATTACH);
1674
1675         if (sd)
1676                 queue_depth = sd->queue_depth != 0 ?
1677                         sd->queue_depth : sdev->host->can_queue;
1678         else
1679                 queue_depth = sdev->host->can_queue;
1680
1681         scsi_change_queue_depth(sdev, queue_depth);
1682
1683         return 0;
1684 }
1685
1686 static void hpsa_slave_destroy(struct scsi_device *sdev)
1687 {
1688         /* nothing to do. */
1689 }
1690
1691 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
1692 {
1693         int i;
1694
1695         if (!h->cmd_sg_list)
1696                 return;
1697         for (i = 0; i < h->nr_cmds; i++) {
1698                 kfree(h->cmd_sg_list[i]);
1699                 h->cmd_sg_list[i] = NULL;
1700         }
1701         kfree(h->cmd_sg_list);
1702         h->cmd_sg_list = NULL;
1703 }
1704
1705 static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
1706 {
1707         int i;
1708
1709         if (h->chainsize <= 0)
1710                 return 0;
1711
1712         h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
1713                                 GFP_KERNEL);
1714         if (!h->cmd_sg_list) {
1715                 dev_err(&h->pdev->dev, "Failed to allocate SG list\n");
1716                 return -ENOMEM;
1717         }
1718         for (i = 0; i < h->nr_cmds; i++) {
1719                 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
1720                                                 h->chainsize, GFP_KERNEL);
1721                 if (!h->cmd_sg_list[i]) {
1722                         dev_err(&h->pdev->dev, "Failed to allocate cmd SG\n");
1723                         goto clean;
1724                 }
1725         }
1726         return 0;
1727
1728 clean:
1729         hpsa_free_sg_chain_blocks(h);
1730         return -ENOMEM;
1731 }
1732
1733 static int hpsa_map_sg_chain_block(struct ctlr_info *h,
1734         struct CommandList *c)
1735 {
1736         struct SGDescriptor *chain_sg, *chain_block;
1737         u64 temp64;
1738         u32 chain_len;
1739
1740         chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1741         chain_block = h->cmd_sg_list[c->cmdindex];
1742         chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
1743         chain_len = sizeof(*chain_sg) *
1744                 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries);
1745         chain_sg->Len = cpu_to_le32(chain_len);
1746         temp64 = pci_map_single(h->pdev, chain_block, chain_len,
1747                                 PCI_DMA_TODEVICE);
1748         if (dma_mapping_error(&h->pdev->dev, temp64)) {
1749                 /* prevent subsequent unmapping */
1750                 chain_sg->Addr = cpu_to_le64(0);
1751                 return -1;
1752         }
1753         chain_sg->Addr = cpu_to_le64(temp64);
1754         return 0;
1755 }
1756
1757 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
1758         struct CommandList *c)
1759 {
1760         struct SGDescriptor *chain_sg;
1761
1762         if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
1763                 return;
1764
1765         chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1766         pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr),
1767                         le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE);
1768 }
1769
1770
1771 /* Decode the various types of errors on ioaccel2 path.
1772  * Return 1 for any error that should generate a RAID path retry.
1773  * Return 0 for errors that don't require a RAID path retry.
1774  */
1775 static int handle_ioaccel_mode2_error(struct ctlr_info *h,
1776                                         struct CommandList *c,
1777                                         struct scsi_cmnd *cmd,
1778                                         struct io_accel2_cmd *c2)
1779 {
1780         int data_len;
1781         int retry = 0;
1782
1783         switch (c2->error_data.serv_response) {
1784         case IOACCEL2_SERV_RESPONSE_COMPLETE:
1785                 switch (c2->error_data.status) {
1786                 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
1787                         break;
1788                 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
1789                         dev_warn(&h->pdev->dev,
1790                                 "%s: task complete with check condition.\n",
1791                                 "HP SSD Smart Path");
1792                         cmd->result |= SAM_STAT_CHECK_CONDITION;
1793                         if (c2->error_data.data_present !=
1794                                         IOACCEL2_SENSE_DATA_PRESENT) {
1795                                 memset(cmd->sense_buffer, 0,
1796                                         SCSI_SENSE_BUFFERSIZE);
1797                                 break;
1798                         }
1799                         /* copy the sense data */
1800                         data_len = c2->error_data.sense_data_len;
1801                         if (data_len > SCSI_SENSE_BUFFERSIZE)
1802                                 data_len = SCSI_SENSE_BUFFERSIZE;
1803                         if (data_len > sizeof(c2->error_data.sense_data_buff))
1804                                 data_len =
1805                                         sizeof(c2->error_data.sense_data_buff);
1806                         memcpy(cmd->sense_buffer,
1807                                 c2->error_data.sense_data_buff, data_len);
1808                         retry = 1;
1809                         break;
1810                 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
1811                         dev_warn(&h->pdev->dev,
1812                                 "%s: task complete with BUSY status.\n",
1813                                 "HP SSD Smart Path");
1814                         retry = 1;
1815                         break;
1816                 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
1817                         dev_warn(&h->pdev->dev,
1818                                 "%s: task complete with reservation conflict.\n",
1819                                 "HP SSD Smart Path");
1820                         retry = 1;
1821                         break;
1822                 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
1823                         /* Make scsi midlayer do unlimited retries */
1824                         cmd->result = DID_IMM_RETRY << 16;
1825                         break;
1826                 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
1827                         dev_warn(&h->pdev->dev,
1828                                 "%s: task complete with aborted status.\n",
1829                                 "HP SSD Smart Path");
1830                         retry = 1;
1831                         break;
1832                 default:
1833                         dev_warn(&h->pdev->dev,
1834                                 "%s: task complete with unrecognized status: 0x%02x\n",
1835                                 "HP SSD Smart Path", c2->error_data.status);
1836                         retry = 1;
1837                         break;
1838                 }
1839                 break;
1840         case IOACCEL2_SERV_RESPONSE_FAILURE:
1841                 /* don't expect to get here. */
1842                 dev_warn(&h->pdev->dev,
1843                         "unexpected delivery or target failure, status = 0x%02x\n",
1844                         c2->error_data.status);
1845                 retry = 1;
1846                 break;
1847         case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
1848                 break;
1849         case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
1850                 break;
1851         case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
1852                 dev_warn(&h->pdev->dev, "task management function rejected.\n");
1853                 retry = 1;
1854                 break;
1855         case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
1856                 dev_warn(&h->pdev->dev, "task management function invalid LUN\n");
1857                 break;
1858         default:
1859                 dev_warn(&h->pdev->dev,
1860                         "%s: Unrecognized server response: 0x%02x\n",
1861                         "HP SSD Smart Path",
1862                         c2->error_data.serv_response);
1863                 retry = 1;
1864                 break;
1865         }
1866
1867         return retry;   /* retry on raid path? */
1868 }
1869
1870 static void process_ioaccel2_completion(struct ctlr_info *h,
1871                 struct CommandList *c, struct scsi_cmnd *cmd,
1872                 struct hpsa_scsi_dev_t *dev)
1873 {
1874         struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
1875
1876         /* check for good status */
1877         if (likely(c2->error_data.serv_response == 0 &&
1878                         c2->error_data.status == 0)) {
1879                 cmd_free(h, c);
1880                 cmd->scsi_done(cmd);
1881                 return;
1882         }
1883
1884         /* Any RAID offload error results in retry which will use
1885          * the normal I/O path so the controller can handle whatever's
1886          * wrong.
1887          */
1888         if (is_logical_dev_addr_mode(dev->scsi3addr) &&
1889                 c2->error_data.serv_response ==
1890                         IOACCEL2_SERV_RESPONSE_FAILURE) {
1891                 if (c2->error_data.status ==
1892                         IOACCEL2_STATUS_SR_IOACCEL_DISABLED)
1893                         dev->offload_enabled = 0;
1894                 goto retry_cmd;
1895         }
1896
1897         if (handle_ioaccel_mode2_error(h, c, cmd, c2))
1898                 goto retry_cmd;
1899
1900         cmd_free(h, c);
1901         cmd->scsi_done(cmd);
1902         return;
1903
1904 retry_cmd:
1905         INIT_WORK(&c->work, hpsa_command_resubmit_worker);
1906         queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work);
1907 }
1908
1909 /* Returns 0 on success, < 0 otherwise. */
1910 static int hpsa_evaluate_tmf_status(struct ctlr_info *h,
1911                                         struct CommandList *cp)
1912 {
1913         u8 tmf_status = cp->err_info->ScsiStatus;
1914
1915         switch (tmf_status) {
1916         case CISS_TMF_COMPLETE:
1917                 /*
1918                  * CISS_TMF_COMPLETE never happens, instead,
1919                  * ei->CommandStatus == 0 for this case.
1920                  */
1921         case CISS_TMF_SUCCESS:
1922                 return 0;
1923         case CISS_TMF_INVALID_FRAME:
1924         case CISS_TMF_NOT_SUPPORTED:
1925         case CISS_TMF_FAILED:
1926         case CISS_TMF_WRONG_LUN:
1927         case CISS_TMF_OVERLAPPED_TAG:
1928                 break;
1929         default:
1930                 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n",
1931                                 tmf_status);
1932                 break;
1933         }
1934         return -tmf_status;
1935 }
1936
1937 static void complete_scsi_command(struct CommandList *cp)
1938 {
1939         struct scsi_cmnd *cmd;
1940         struct ctlr_info *h;
1941         struct ErrorInfo *ei;
1942         struct hpsa_scsi_dev_t *dev;
1943
1944         u8 sense_key;
1945         u8 asc;      /* additional sense code */
1946         u8 ascq;     /* additional sense code qualifier */
1947         unsigned long sense_data_size;
1948
1949         ei = cp->err_info;
1950         cmd = cp->scsi_cmd;
1951         h = cp->h;
1952         dev = cmd->device->hostdata;
1953
1954         scsi_dma_unmap(cmd); /* undo the DMA mappings */
1955         if ((cp->cmd_type == CMD_SCSI) &&
1956                 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries))
1957                 hpsa_unmap_sg_chain_block(h, cp);
1958
1959         cmd->result = (DID_OK << 16);           /* host byte */
1960         cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
1961
1962         if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1)
1963                 atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
1964
1965         /*
1966          * We check for lockup status here as it may be set for
1967          * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by
1968          * fail_all_oustanding_cmds()
1969          */
1970         if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) {
1971                 /* DID_NO_CONNECT will prevent a retry */
1972                 cmd->result = DID_NO_CONNECT << 16;
1973                 cmd_free(h, cp);
1974                 cmd->scsi_done(cmd);
1975                 return;
1976         }
1977
1978         if (cp->cmd_type == CMD_IOACCEL2)
1979                 return process_ioaccel2_completion(h, cp, cmd, dev);
1980
1981         scsi_set_resid(cmd, ei->ResidualCnt);
1982         if (ei->CommandStatus == 0) {
1983                 if (cp->cmd_type == CMD_IOACCEL1)
1984                         atomic_dec(&cp->phys_disk->ioaccel_cmds_out);
1985                 cmd_free(h, cp);
1986                 cmd->scsi_done(cmd);
1987                 return;
1988         }
1989
1990         /* For I/O accelerator commands, copy over some fields to the normal
1991          * CISS header used below for error handling.
1992          */
1993         if (cp->cmd_type == CMD_IOACCEL1) {
1994                 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
1995                 cp->Header.SGList = scsi_sg_count(cmd);
1996                 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList);
1997                 cp->Request.CDBLen = le16_to_cpu(c->io_flags) &
1998                         IOACCEL1_IOFLAGS_CDBLEN_MASK;
1999                 cp->Header.tag = c->tag;
2000                 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
2001                 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
2002
2003                 /* Any RAID offload error results in retry which will use
2004                  * the normal I/O path so the controller can handle whatever's
2005                  * wrong.
2006                  */
2007                 if (is_logical_dev_addr_mode(dev->scsi3addr)) {
2008                         if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
2009                                 dev->offload_enabled = 0;
2010                         INIT_WORK(&cp->work, hpsa_command_resubmit_worker);
2011                         queue_work_on(raw_smp_processor_id(),
2012                                         h->resubmit_wq, &cp->work);
2013                         return;
2014                 }
2015         }
2016
2017         /* an error has occurred */
2018         switch (ei->CommandStatus) {
2019
2020         case CMD_TARGET_STATUS:
2021                 cmd->result |= ei->ScsiStatus;
2022                 /* copy the sense data */
2023                 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
2024                         sense_data_size = SCSI_SENSE_BUFFERSIZE;
2025                 else
2026                         sense_data_size = sizeof(ei->SenseInfo);
2027                 if (ei->SenseLen < sense_data_size)
2028                         sense_data_size = ei->SenseLen;
2029                 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
2030                 if (ei->ScsiStatus)
2031                         decode_sense_data(ei->SenseInfo, sense_data_size,
2032                                 &sense_key, &asc, &ascq);
2033                 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
2034                         if (sense_key == ABORTED_COMMAND) {
2035                                 cmd->result |= DID_SOFT_ERROR << 16;
2036                                 break;
2037                         }
2038                         break;
2039                 }
2040                 /* Problem was not a check condition
2041                  * Pass it up to the upper layers...
2042                  */
2043                 if (ei->ScsiStatus) {
2044                         dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
2045                                 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
2046                                 "Returning result: 0x%x\n",
2047                                 cp, ei->ScsiStatus,
2048                                 sense_key, asc, ascq,
2049                                 cmd->result);
2050                 } else {  /* scsi status is zero??? How??? */
2051                         dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
2052                                 "Returning no connection.\n", cp),
2053
2054                         /* Ordinarily, this case should never happen,
2055                          * but there is a bug in some released firmware
2056                          * revisions that allows it to happen if, for
2057                          * example, a 4100 backplane loses power and
2058                          * the tape drive is in it.  We assume that
2059                          * it's a fatal error of some kind because we
2060                          * can't show that it wasn't. We will make it
2061                          * look like selection timeout since that is
2062                          * the most common reason for this to occur,
2063                          * and it's severe enough.
2064                          */
2065
2066                         cmd->result = DID_NO_CONNECT << 16;
2067                 }
2068                 break;
2069
2070         case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2071                 break;
2072         case CMD_DATA_OVERRUN:
2073                 dev_warn(&h->pdev->dev,
2074                         "CDB %16phN data overrun\n", cp->Request.CDB);
2075                 break;
2076         case CMD_INVALID: {
2077                 /* print_bytes(cp, sizeof(*cp), 1, 0);
2078                 print_cmd(cp); */
2079                 /* We get CMD_INVALID if you address a non-existent device
2080                  * instead of a selection timeout (no response).  You will
2081                  * see this if you yank out a drive, then try to access it.
2082                  * This is kind of a shame because it means that any other
2083                  * CMD_INVALID (e.g. driver bug) will get interpreted as a
2084                  * missing target. */
2085                 cmd->result = DID_NO_CONNECT << 16;
2086         }
2087                 break;
2088         case CMD_PROTOCOL_ERR:
2089                 cmd->result = DID_ERROR << 16;
2090                 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n",
2091                                 cp->Request.CDB);
2092                 break;
2093         case CMD_HARDWARE_ERR:
2094                 cmd->result = DID_ERROR << 16;
2095                 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n",
2096                         cp->Request.CDB);
2097                 break;
2098         case CMD_CONNECTION_LOST:
2099                 cmd->result = DID_ERROR << 16;
2100                 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n",
2101                         cp->Request.CDB);
2102                 break;
2103         case CMD_ABORTED:
2104                 cmd->result = DID_ABORT << 16;
2105                 dev_warn(&h->pdev->dev, "CDB %16phN was aborted with status 0x%x\n",
2106                                 cp->Request.CDB, ei->ScsiStatus);
2107                 break;
2108         case CMD_ABORT_FAILED:
2109                 cmd->result = DID_ERROR << 16;
2110                 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n",
2111                         cp->Request.CDB);
2112                 break;
2113         case CMD_UNSOLICITED_ABORT:
2114                 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
2115                 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n",
2116                         cp->Request.CDB);
2117                 break;
2118         case CMD_TIMEOUT:
2119                 cmd->result = DID_TIME_OUT << 16;
2120                 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n",
2121                         cp->Request.CDB);
2122                 break;
2123         case CMD_UNABORTABLE:
2124                 cmd->result = DID_ERROR << 16;
2125                 dev_warn(&h->pdev->dev, "Command unabortable\n");
2126                 break;
2127         case CMD_TMF_STATUS:
2128                 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */
2129                         cmd->result = DID_ERROR << 16;
2130                 break;
2131         case CMD_IOACCEL_DISABLED:
2132                 /* This only handles the direct pass-through case since RAID
2133                  * offload is handled above.  Just attempt a retry.
2134                  */
2135                 cmd->result = DID_SOFT_ERROR << 16;
2136                 dev_warn(&h->pdev->dev,
2137                                 "cp %p had HP SSD Smart Path error\n", cp);
2138                 break;
2139         default:
2140                 cmd->result = DID_ERROR << 16;
2141                 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
2142                                 cp, ei->CommandStatus);
2143         }
2144         cmd_free(h, cp);
2145         cmd->scsi_done(cmd);
2146 }
2147
2148 static void hpsa_pci_unmap(struct pci_dev *pdev,
2149         struct CommandList *c, int sg_used, int data_direction)
2150 {
2151         int i;
2152
2153         for (i = 0; i < sg_used; i++)
2154                 pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr),
2155                                 le32_to_cpu(c->SG[i].Len),
2156                                 data_direction);
2157 }
2158
2159 static int hpsa_map_one(struct pci_dev *pdev,
2160                 struct CommandList *cp,
2161                 unsigned char *buf,
2162                 size_t buflen,
2163                 int data_direction)
2164 {
2165         u64 addr64;
2166
2167         if (buflen == 0 || data_direction == PCI_DMA_NONE) {
2168                 cp->Header.SGList = 0;
2169                 cp->Header.SGTotal = cpu_to_le16(0);
2170                 return 0;
2171         }
2172
2173         addr64 = pci_map_single(pdev, buf, buflen, data_direction);
2174         if (dma_mapping_error(&pdev->dev, addr64)) {
2175                 /* Prevent subsequent unmap of something never mapped */
2176                 cp->Header.SGList = 0;
2177                 cp->Header.SGTotal = cpu_to_le16(0);
2178                 return -1;
2179         }
2180         cp->SG[0].Addr = cpu_to_le64(addr64);
2181         cp->SG[0].Len = cpu_to_le32(buflen);
2182         cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
2183         cp->Header.SGList = 1;   /* no. SGs contig in this cmd */
2184         cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
2185         return 0;
2186 }
2187
2188 #define NO_TIMEOUT ((unsigned long) -1)
2189 #define DEFAULT_TIMEOUT 30000 /* milliseconds */
2190 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
2191         struct CommandList *c, int reply_queue, unsigned long timeout_msecs)
2192 {
2193         DECLARE_COMPLETION_ONSTACK(wait);
2194
2195         c->waiting = &wait;
2196         __enqueue_cmd_and_start_io(h, c, reply_queue);
2197         if (timeout_msecs == NO_TIMEOUT) {
2198                 /* TODO: get rid of this no-timeout thing */
2199                 wait_for_completion_io(&wait);
2200                 return IO_OK;
2201         }
2202         if (!wait_for_completion_io_timeout(&wait,
2203                                         msecs_to_jiffies(timeout_msecs))) {
2204                 dev_warn(&h->pdev->dev, "Command timed out.\n");
2205                 return -ETIMEDOUT;
2206         }
2207         return IO_OK;
2208 }
2209
2210 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c,
2211                                    int reply_queue, unsigned long timeout_msecs)
2212 {
2213         if (unlikely(lockup_detected(h))) {
2214                 c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
2215                 return IO_OK;
2216         }
2217         return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs);
2218 }
2219
2220 static u32 lockup_detected(struct ctlr_info *h)
2221 {
2222         int cpu;
2223         u32 rc, *lockup_detected;
2224
2225         cpu = get_cpu();
2226         lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
2227         rc = *lockup_detected;
2228         put_cpu();
2229         return rc;
2230 }
2231
2232 #define MAX_DRIVER_CMD_RETRIES 25
2233 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
2234         struct CommandList *c, int data_direction, unsigned long timeout_msecs)
2235 {
2236         int backoff_time = 10, retry_count = 0;
2237         int rc;
2238
2239         do {
2240                 memset(c->err_info, 0, sizeof(*c->err_info));
2241                 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
2242                                                   timeout_msecs);
2243                 if (rc)
2244                         break;
2245                 retry_count++;
2246                 if (retry_count > 3) {
2247                         msleep(backoff_time);
2248                         if (backoff_time < 1000)
2249                                 backoff_time *= 2;
2250                 }
2251         } while ((check_for_unit_attention(h, c) ||
2252                         check_for_busy(h, c)) &&
2253                         retry_count <= MAX_DRIVER_CMD_RETRIES);
2254         hpsa_pci_unmap(h->pdev, c, 1, data_direction);
2255         if (retry_count > MAX_DRIVER_CMD_RETRIES)
2256                 rc = -EIO;
2257         return rc;
2258 }
2259
2260 static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2261                                 struct CommandList *c)
2262 {
2263         const u8 *cdb = c->Request.CDB;
2264         const u8 *lun = c->Header.LUN.LunAddrBytes;
2265
2266         dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x"
2267         " CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
2268                 txt, lun[0], lun[1], lun[2], lun[3],
2269                 lun[4], lun[5], lun[6], lun[7],
2270                 cdb[0], cdb[1], cdb[2], cdb[3],
2271                 cdb[4], cdb[5], cdb[6], cdb[7],
2272                 cdb[8], cdb[9], cdb[10], cdb[11],
2273                 cdb[12], cdb[13], cdb[14], cdb[15]);
2274 }
2275
2276 static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2277                         struct CommandList *cp)
2278 {
2279         const struct ErrorInfo *ei = cp->err_info;
2280         struct device *d = &cp->h->pdev->dev;
2281         u8 sense_key, asc, ascq;
2282         int sense_len;
2283
2284         switch (ei->CommandStatus) {
2285         case CMD_TARGET_STATUS:
2286                 if (ei->SenseLen > sizeof(ei->SenseInfo))
2287                         sense_len = sizeof(ei->SenseInfo);
2288                 else
2289                         sense_len = ei->SenseLen;
2290                 decode_sense_data(ei->SenseInfo, sense_len,
2291                                         &sense_key, &asc, &ascq);
2292                 hpsa_print_cmd(h, "SCSI status", cp);
2293                 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
2294                         dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n",
2295                                 sense_key, asc, ascq);
2296                 else
2297                         dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus);
2298                 if (ei->ScsiStatus == 0)
2299                         dev_warn(d, "SCSI status is abnormally zero.  "
2300                         "(probably indicates selection timeout "
2301                         "reported incorrectly due to a known "
2302                         "firmware bug, circa July, 2001.)\n");
2303                 break;
2304         case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2305                 break;
2306         case CMD_DATA_OVERRUN:
2307                 hpsa_print_cmd(h, "overrun condition", cp);
2308                 break;
2309         case CMD_INVALID: {
2310                 /* controller unfortunately reports SCSI passthru's
2311                  * to non-existent targets as invalid commands.
2312                  */
2313                 hpsa_print_cmd(h, "invalid command", cp);
2314                 dev_warn(d, "probably means device no longer present\n");
2315                 }
2316                 break;
2317         case CMD_PROTOCOL_ERR:
2318                 hpsa_print_cmd(h, "protocol error", cp);
2319                 break;
2320         case CMD_HARDWARE_ERR:
2321                 hpsa_print_cmd(h, "hardware error", cp);
2322                 break;
2323         case CMD_CONNECTION_LOST:
2324                 hpsa_print_cmd(h, "connection lost", cp);
2325                 break;
2326         case CMD_ABORTED:
2327                 hpsa_print_cmd(h, "aborted", cp);
2328                 break;
2329         case CMD_ABORT_FAILED:
2330                 hpsa_print_cmd(h, "abort failed", cp);
2331                 break;
2332         case CMD_UNSOLICITED_ABORT:
2333                 hpsa_print_cmd(h, "unsolicited abort", cp);
2334                 break;
2335         case CMD_TIMEOUT:
2336                 hpsa_print_cmd(h, "timed out", cp);
2337                 break;
2338         case CMD_UNABORTABLE:
2339                 hpsa_print_cmd(h, "unabortable", cp);
2340                 break;
2341         case CMD_CTLR_LOCKUP:
2342                 hpsa_print_cmd(h, "controller lockup detected", cp);
2343                 break;
2344         default:
2345                 hpsa_print_cmd(h, "unknown status", cp);
2346                 dev_warn(d, "Unknown command status %x\n",
2347                                 ei->CommandStatus);
2348         }
2349 }
2350
2351 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
2352                         u16 page, unsigned char *buf,
2353                         unsigned char bufsize)
2354 {
2355         int rc = IO_OK;
2356         struct CommandList *c;
2357         struct ErrorInfo *ei;
2358
2359         c = cmd_alloc(h);
2360
2361         if (c == NULL) {
2362                 dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2363                 return -ENOMEM;
2364         }
2365
2366         if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
2367                         page, scsi3addr, TYPE_CMD)) {
2368                 rc = -1;
2369                 goto out;
2370         }
2371         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2372                                         PCI_DMA_FROMDEVICE, NO_TIMEOUT);
2373         if (rc)
2374                 goto out;
2375         ei = c->err_info;
2376         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2377                 hpsa_scsi_interpret_error(h, c);
2378                 rc = -1;
2379         }
2380 out:
2381         cmd_free(h, c);
2382         return rc;
2383 }
2384
2385 static int hpsa_bmic_ctrl_mode_sense(struct ctlr_info *h,
2386                 unsigned char *scsi3addr, unsigned char page,
2387                 struct bmic_controller_parameters *buf, size_t bufsize)
2388 {
2389         int rc = IO_OK;
2390         struct CommandList *c;
2391         struct ErrorInfo *ei;
2392
2393         c = cmd_alloc(h);
2394         if (c == NULL) {                        /* trouble... */
2395                 dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2396                 return -ENOMEM;
2397         }
2398
2399         if (fill_cmd(c, BMIC_SENSE_CONTROLLER_PARAMETERS, h, buf, bufsize,
2400                         page, scsi3addr, TYPE_CMD)) {
2401                 rc = -1;
2402                 goto out;
2403         }
2404         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2405                         PCI_DMA_FROMDEVICE, NO_TIMEOUT);
2406         if (rc)
2407                 goto out;
2408         ei = c->err_info;
2409         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2410                 hpsa_scsi_interpret_error(h, c);
2411                 rc = -1;
2412         }
2413 out:
2414         cmd_free(h, c);
2415         return rc;
2416         }
2417
2418 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr,
2419         u8 reset_type, int reply_queue)
2420 {
2421         int rc = IO_OK;
2422         struct CommandList *c;
2423         struct ErrorInfo *ei;
2424
2425         c = cmd_alloc(h);
2426
2427         if (c == NULL) {                        /* trouble... */
2428                 dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2429                 return -ENOMEM;
2430         }
2431
2432         /* fill_cmd can't fail here, no data buffer to map. */
2433         (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
2434                         scsi3addr, TYPE_MSG);
2435         c->Request.CDB[1] = reset_type; /* fill_cmd defaults to LUN reset */
2436         rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
2437         if (rc) {
2438                 dev_warn(&h->pdev->dev, "Failed to send reset command\n");
2439                 goto out;
2440         }
2441         /* no unmap needed here because no data xfer. */
2442
2443         ei = c->err_info;
2444         if (ei->CommandStatus != 0) {
2445                 hpsa_scsi_interpret_error(h, c);
2446                 rc = -1;
2447         }
2448 out:
2449         cmd_free(h, c);
2450         return rc;
2451 }
2452
2453 static void hpsa_get_raid_level(struct ctlr_info *h,
2454         unsigned char *scsi3addr, unsigned char *raid_level)
2455 {
2456         int rc;
2457         unsigned char *buf;
2458
2459         *raid_level = RAID_UNKNOWN;
2460         buf = kzalloc(64, GFP_KERNEL);
2461         if (!buf)
2462                 return;
2463         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0xC1, buf, 64);
2464         if (rc == 0)
2465                 *raid_level = buf[8];
2466         if (*raid_level > RAID_UNKNOWN)
2467                 *raid_level = RAID_UNKNOWN;
2468         kfree(buf);
2469         return;
2470 }
2471
2472 #define HPSA_MAP_DEBUG
2473 #ifdef HPSA_MAP_DEBUG
2474 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
2475                                 struct raid_map_data *map_buff)
2476 {
2477         struct raid_map_disk_data *dd = &map_buff->data[0];
2478         int map, row, col;
2479         u16 map_cnt, row_cnt, disks_per_row;
2480
2481         if (rc != 0)
2482                 return;
2483
2484         /* Show details only if debugging has been activated. */
2485         if (h->raid_offload_debug < 2)
2486                 return;
2487
2488         dev_info(&h->pdev->dev, "structure_size = %u\n",
2489                                 le32_to_cpu(map_buff->structure_size));
2490         dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
2491                         le32_to_cpu(map_buff->volume_blk_size));
2492         dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
2493                         le64_to_cpu(map_buff->volume_blk_cnt));
2494         dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
2495                         map_buff->phys_blk_shift);
2496         dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
2497                         map_buff->parity_rotation_shift);
2498         dev_info(&h->pdev->dev, "strip_size = %u\n",
2499                         le16_to_cpu(map_buff->strip_size));
2500         dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
2501                         le64_to_cpu(map_buff->disk_starting_blk));
2502         dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
2503                         le64_to_cpu(map_buff->disk_blk_cnt));
2504         dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
2505                         le16_to_cpu(map_buff->data_disks_per_row));
2506         dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
2507                         le16_to_cpu(map_buff->metadata_disks_per_row));
2508         dev_info(&h->pdev->dev, "row_cnt = %u\n",
2509                         le16_to_cpu(map_buff->row_cnt));
2510         dev_info(&h->pdev->dev, "layout_map_count = %u\n",
2511                         le16_to_cpu(map_buff->layout_map_count));
2512         dev_info(&h->pdev->dev, "flags = 0x%x\n",
2513                         le16_to_cpu(map_buff->flags));
2514         dev_info(&h->pdev->dev, "encrypytion = %s\n",
2515                         le16_to_cpu(map_buff->flags) &
2516                         RAID_MAP_FLAG_ENCRYPT_ON ?  "ON" : "OFF");
2517         dev_info(&h->pdev->dev, "dekindex = %u\n",
2518                         le16_to_cpu(map_buff->dekindex));
2519         map_cnt = le16_to_cpu(map_buff->layout_map_count);
2520         for (map = 0; map < map_cnt; map++) {
2521                 dev_info(&h->pdev->dev, "Map%u:\n", map);
2522                 row_cnt = le16_to_cpu(map_buff->row_cnt);
2523                 for (row = 0; row < row_cnt; row++) {
2524                         dev_info(&h->pdev->dev, "  Row%u:\n", row);
2525                         disks_per_row =
2526                                 le16_to_cpu(map_buff->data_disks_per_row);
2527                         for (col = 0; col < disks_per_row; col++, dd++)
2528                                 dev_info(&h->pdev->dev,
2529                                         "    D%02u: h=0x%04x xor=%u,%u\n",
2530                                         col, dd->ioaccel_handle,
2531                                         dd->xor_mult[0], dd->xor_mult[1]);
2532                         disks_per_row =
2533                                 le16_to_cpu(map_buff->metadata_disks_per_row);
2534                         for (col = 0; col < disks_per_row; col++, dd++)
2535                                 dev_info(&h->pdev->dev,
2536                                         "    M%02u: h=0x%04x xor=%u,%u\n",
2537                                         col, dd->ioaccel_handle,
2538                                         dd->xor_mult[0], dd->xor_mult[1]);
2539                 }
2540         }
2541 }
2542 #else
2543 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
2544                         __attribute__((unused)) int rc,
2545                         __attribute__((unused)) struct raid_map_data *map_buff)
2546 {
2547 }
2548 #endif
2549
2550 static int hpsa_get_raid_map(struct ctlr_info *h,
2551         unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
2552 {
2553         int rc = 0;
2554         struct CommandList *c;
2555         struct ErrorInfo *ei;
2556
2557         c = cmd_alloc(h);
2558         if (c == NULL) {
2559                 dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2560                 return -ENOMEM;
2561         }
2562         if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
2563                         sizeof(this_device->raid_map), 0,
2564                         scsi3addr, TYPE_CMD)) {
2565                 dev_warn(&h->pdev->dev, "Out of memory in hpsa_get_raid_map()\n");
2566                 rc = -ENOMEM;
2567                 goto out;
2568         }
2569         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2570                                         PCI_DMA_FROMDEVICE, NO_TIMEOUT);
2571         if (rc)
2572                 goto out;
2573         ei = c->err_info;
2574         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2575                 hpsa_scsi_interpret_error(h, c);
2576                 rc = -1;
2577                 goto out;
2578         }
2579         cmd_free(h, c);
2580
2581         /* @todo in the future, dynamically allocate RAID map memory */
2582         if (le32_to_cpu(this_device->raid_map.structure_size) >
2583                                 sizeof(this_device->raid_map)) {
2584                 dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
2585                 rc = -1;
2586         }
2587         hpsa_debug_map_buff(h, rc, &this_device->raid_map);
2588         return rc;
2589 out:
2590         cmd_free(h, c);
2591         return rc;
2592 }
2593
2594 static int hpsa_bmic_id_physical_device(struct ctlr_info *h,
2595                 unsigned char scsi3addr[], u16 bmic_device_index,
2596                 struct bmic_identify_physical_device *buf, size_t bufsize)
2597 {
2598         int rc = IO_OK;
2599         struct CommandList *c;
2600         struct ErrorInfo *ei;
2601
2602         c = cmd_alloc(h);
2603         rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize,
2604                 0, RAID_CTLR_LUNID, TYPE_CMD);
2605         if (rc)
2606                 goto out;
2607
2608         c->Request.CDB[2] = bmic_device_index & 0xff;
2609         c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff;
2610
2611         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE,
2612                                                 NO_TIMEOUT);
2613         ei = c->err_info;
2614         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2615                 hpsa_scsi_interpret_error(h, c);
2616                 rc = -1;
2617         }
2618 out:
2619         cmd_free(h, c);
2620         return rc;
2621 }
2622
2623 static int hpsa_vpd_page_supported(struct ctlr_info *h,
2624         unsigned char scsi3addr[], u8 page)
2625 {
2626         int rc;
2627         int i;
2628         int pages;
2629         unsigned char *buf, bufsize;
2630
2631         buf = kzalloc(256, GFP_KERNEL);
2632         if (!buf)
2633                 return 0;
2634
2635         /* Get the size of the page list first */
2636         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
2637                                 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
2638                                 buf, HPSA_VPD_HEADER_SZ);
2639         if (rc != 0)
2640                 goto exit_unsupported;
2641         pages = buf[3];
2642         if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
2643                 bufsize = pages + HPSA_VPD_HEADER_SZ;
2644         else
2645                 bufsize = 255;
2646
2647         /* Get the whole VPD page list */
2648         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
2649                                 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
2650                                 buf, bufsize);
2651         if (rc != 0)
2652                 goto exit_unsupported;
2653
2654         pages = buf[3];
2655         for (i = 1; i <= pages; i++)
2656                 if (buf[3 + i] == page)
2657                         goto exit_supported;
2658 exit_unsupported:
2659         kfree(buf);
2660         return 0;
2661 exit_supported:
2662         kfree(buf);
2663         return 1;
2664 }
2665
2666 static void hpsa_get_ioaccel_status(struct ctlr_info *h,
2667         unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
2668 {
2669         int rc;
2670         unsigned char *buf;
2671         u8 ioaccel_status;
2672
2673         this_device->offload_config = 0;
2674         this_device->offload_enabled = 0;
2675         this_device->offload_to_be_enabled = 0;
2676
2677         buf = kzalloc(64, GFP_KERNEL);
2678         if (!buf)
2679                 return;
2680         if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
2681                 goto out;
2682         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
2683                         VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
2684         if (rc != 0)
2685                 goto out;
2686
2687 #define IOACCEL_STATUS_BYTE 4
2688 #define OFFLOAD_CONFIGURED_BIT 0x01
2689 #define OFFLOAD_ENABLED_BIT 0x02
2690         ioaccel_status = buf[IOACCEL_STATUS_BYTE];
2691         this_device->offload_config =
2692                 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
2693         if (this_device->offload_config) {
2694                 this_device->offload_enabled =
2695                         !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
2696                 if (hpsa_get_raid_map(h, scsi3addr, this_device))
2697                         this_device->offload_enabled = 0;
2698         }
2699         this_device->offload_to_be_enabled = this_device->offload_enabled;
2700 out:
2701         kfree(buf);
2702         return;
2703 }
2704
2705 /* Get the device id from inquiry page 0x83 */
2706 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
2707         unsigned char *device_id, int buflen)
2708 {
2709         int rc;
2710         unsigned char *buf;
2711
2712         if (buflen > 16)
2713                 buflen = 16;
2714         buf = kzalloc(64, GFP_KERNEL);
2715         if (!buf)
2716                 return -ENOMEM;
2717         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0x83, buf, 64);
2718         if (rc == 0)
2719                 memcpy(device_id, &buf[8], buflen);
2720         kfree(buf);
2721         return rc != 0;
2722 }
2723
2724 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
2725                 void *buf, int bufsize,
2726                 int extended_response)
2727 {
2728         int rc = IO_OK;
2729         struct CommandList *c;
2730         unsigned char scsi3addr[8];
2731         struct ErrorInfo *ei;
2732
2733         c = cmd_alloc(h);
2734         if (c == NULL) {                        /* trouble... */
2735                 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2736                 return -1;
2737         }
2738         /* address the controller */
2739         memset(scsi3addr, 0, sizeof(scsi3addr));
2740         if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
2741                 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
2742                 rc = -1;
2743                 goto out;
2744         }
2745         if (extended_response)
2746                 c->Request.CDB[1] = extended_response;
2747         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
2748                                         PCI_DMA_FROMDEVICE, NO_TIMEOUT);
2749         if (rc)
2750                 goto out;
2751         ei = c->err_info;
2752         if (ei->CommandStatus != 0 &&
2753             ei->CommandStatus != CMD_DATA_UNDERRUN) {
2754                 hpsa_scsi_interpret_error(h, c);
2755                 rc = -1;
2756         } else {
2757                 struct ReportLUNdata *rld = buf;
2758
2759                 if (rld->extended_response_flag != extended_response) {
2760                         dev_err(&h->pdev->dev,
2761                                 "report luns requested format %u, got %u\n",
2762                                 extended_response,
2763                                 rld->extended_response_flag);
2764                         rc = -1;
2765                 }
2766         }
2767 out:
2768         cmd_free(h, c);
2769         return rc;
2770 }
2771
2772 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
2773                 struct ReportExtendedLUNdata *buf, int bufsize)
2774 {
2775         return hpsa_scsi_do_report_luns(h, 0, buf, bufsize,
2776                                                 HPSA_REPORT_PHYS_EXTENDED);
2777 }
2778
2779 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
2780                 struct ReportLUNdata *buf, int bufsize)
2781 {
2782         return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
2783 }
2784
2785 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
2786         int bus, int target, int lun)
2787 {
2788         device->bus = bus;
2789         device->target = target;
2790         device->lun = lun;
2791 }
2792
2793 /* Use VPD inquiry to get details of volume status */
2794 static int hpsa_get_volume_status(struct ctlr_info *h,
2795                                         unsigned char scsi3addr[])
2796 {
2797         int rc;
2798         int status;
2799         int size;
2800         unsigned char *buf;
2801
2802         buf = kzalloc(64, GFP_KERNEL);
2803         if (!buf)
2804                 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
2805
2806         /* Does controller have VPD for logical volume status? */
2807         if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
2808                 goto exit_failed;
2809
2810         /* Get the size of the VPD return buffer */
2811         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
2812                                         buf, HPSA_VPD_HEADER_SZ);
2813         if (rc != 0)
2814                 goto exit_failed;
2815         size = buf[3];
2816
2817         /* Now get the whole VPD buffer */
2818         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
2819                                         buf, size + HPSA_VPD_HEADER_SZ);
2820         if (rc != 0)
2821                 goto exit_failed;
2822         status = buf[4]; /* status byte */
2823
2824         kfree(buf);
2825         return status;
2826 exit_failed:
2827         kfree(buf);
2828         return HPSA_VPD_LV_STATUS_UNSUPPORTED;
2829 }
2830
2831 /* Determine offline status of a volume.
2832  * Return either:
2833  *  0 (not offline)
2834  *  0xff (offline for unknown reasons)
2835  *  # (integer code indicating one of several NOT READY states
2836  *     describing why a volume is to be kept offline)
2837  */
2838 static int hpsa_volume_offline(struct ctlr_info *h,
2839                                         unsigned char scsi3addr[])
2840 {
2841         struct CommandList *c;
2842         unsigned char *sense;
2843         u8 sense_key, asc, ascq;
2844         int sense_len;
2845         int rc, ldstat = 0;
2846         u16 cmd_status;
2847         u8 scsi_status;
2848 #define ASC_LUN_NOT_READY 0x04
2849 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
2850 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
2851
2852         c = cmd_alloc(h);
2853         if (!c)
2854                 return 0;
2855         (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
2856         rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
2857         if (rc) {
2858                 cmd_free(h, c);
2859                 return 0;
2860         }
2861         sense = c->err_info->SenseInfo;
2862         if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo))
2863                 sense_len = sizeof(c->err_info->SenseInfo);
2864         else
2865                 sense_len = c->err_info->SenseLen;
2866         decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq);
2867         cmd_status = c->err_info->CommandStatus;
2868         scsi_status = c->err_info->ScsiStatus;
2869         cmd_free(h, c);
2870         /* Is the volume 'not ready'? */
2871         if (cmd_status != CMD_TARGET_STATUS ||
2872                 scsi_status != SAM_STAT_CHECK_CONDITION ||
2873                 sense_key != NOT_READY ||
2874                 asc != ASC_LUN_NOT_READY)  {
2875                 return 0;
2876         }
2877
2878         /* Determine the reason for not ready state */
2879         ldstat = hpsa_get_volume_status(h, scsi3addr);
2880
2881         /* Keep volume offline in certain cases: */
2882         switch (ldstat) {
2883         case HPSA_LV_UNDERGOING_ERASE:
2884         case HPSA_LV_UNDERGOING_RPI:
2885         case HPSA_LV_PENDING_RPI:
2886         case HPSA_LV_ENCRYPTED_NO_KEY:
2887         case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
2888         case HPSA_LV_UNDERGOING_ENCRYPTION:
2889         case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
2890         case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
2891                 return ldstat;
2892         case HPSA_VPD_LV_STATUS_UNSUPPORTED:
2893                 /* If VPD status page isn't available,
2894                  * use ASC/ASCQ to determine state
2895                  */
2896                 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
2897                         (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
2898                         return ldstat;
2899                 break;
2900         default:
2901                 break;
2902         }
2903         return 0;
2904 }
2905
2906 /*
2907  * Find out if a logical device supports aborts by simply trying one.
2908  * Smart Array may claim not to support aborts on logical drives, but
2909  * if a MSA2000 * is connected, the drives on that will be presented
2910  * by the Smart Array as logical drives, and aborts may be sent to
2911  * those devices successfully.  So the simplest way to find out is
2912  * to simply try an abort and see how the device responds.
2913  */
2914 static int hpsa_device_supports_aborts(struct ctlr_info *h,
2915                                         unsigned char *scsi3addr)
2916 {
2917         struct CommandList *c;
2918         struct ErrorInfo *ei;
2919         int rc = 0;
2920
2921         u64 tag = (u64) -1; /* bogus tag */
2922
2923         /* Assume that physical devices support aborts */
2924         if (!is_logical_dev_addr_mode(scsi3addr))
2925                 return 1;
2926
2927         c = cmd_alloc(h);
2928         if (!c)
2929                 return -ENOMEM;
2930         (void) fill_cmd(c, HPSA_ABORT_MSG, h, &tag, 0, 0, scsi3addr, TYPE_MSG);
2931         (void) hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
2932         /* no unmap needed here because no data xfer. */
2933         ei = c->err_info;
2934         switch (ei->CommandStatus) {
2935         case CMD_INVALID:
2936                 rc = 0;
2937                 break;
2938         case CMD_UNABORTABLE:
2939         case CMD_ABORT_FAILED:
2940                 rc = 1;
2941                 break;
2942         case CMD_TMF_STATUS:
2943                 rc = hpsa_evaluate_tmf_status(h, c);
2944                 break;
2945         default:
2946                 rc = 0;
2947                 break;
2948         }
2949         cmd_free(h, c);
2950         return rc;
2951 }
2952
2953 static int hpsa_update_device_info(struct ctlr_info *h,
2954         unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
2955         unsigned char *is_OBDR_device)
2956 {
2957
2958 #define OBDR_SIG_OFFSET 43
2959 #define OBDR_TAPE_SIG "$DR-10"
2960 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
2961 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
2962
2963         unsigned char *inq_buff;
2964         unsigned char *obdr_sig;
2965
2966         inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
2967         if (!inq_buff)
2968                 goto bail_out;
2969
2970         /* Do an inquiry to the device to see what it is. */
2971         if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
2972                 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
2973                 /* Inquiry failed (msg printed already) */
2974                 dev_err(&h->pdev->dev,
2975                         "hpsa_update_device_info: inquiry failed\n");
2976                 goto bail_out;
2977         }
2978
2979         this_device->devtype = (inq_buff[0] & 0x1f);
2980         memcpy(this_device->scsi3addr, scsi3addr, 8);
2981         memcpy(this_device->vendor, &inq_buff[8],
2982                 sizeof(this_device->vendor));
2983         memcpy(this_device->model, &inq_buff[16],
2984                 sizeof(this_device->model));
2985         memset(this_device->device_id, 0,
2986                 sizeof(this_device->device_id));
2987         hpsa_get_device_id(h, scsi3addr, this_device->device_id,
2988                 sizeof(this_device->device_id));
2989
2990         if (this_device->devtype == TYPE_DISK &&
2991                 is_logical_dev_addr_mode(scsi3addr)) {
2992                 int volume_offline;
2993
2994                 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
2995                 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
2996                         hpsa_get_ioaccel_status(h, scsi3addr, this_device);
2997                 volume_offline = hpsa_volume_offline(h, scsi3addr);
2998                 if (volume_offline < 0 || volume_offline > 0xff)
2999                         volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED;
3000                 this_device->volume_offline = volume_offline & 0xff;
3001         } else {
3002                 this_device->raid_level = RAID_UNKNOWN;
3003                 this_device->offload_config = 0;
3004                 this_device->offload_enabled = 0;
3005                 this_device->offload_to_be_enabled = 0;
3006                 this_device->volume_offline = 0;
3007                 this_device->queue_depth = h->nr_cmds;
3008         }
3009
3010         if (is_OBDR_device) {
3011                 /* See if this is a One-Button-Disaster-Recovery device
3012                  * by looking for "$DR-10" at offset 43 in inquiry data.
3013                  */
3014                 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
3015                 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
3016                                         strncmp(obdr_sig, OBDR_TAPE_SIG,
3017                                                 OBDR_SIG_LEN) == 0);
3018         }
3019         kfree(inq_buff);
3020         return 0;
3021
3022 bail_out:
3023         kfree(inq_buff);
3024         return 1;
3025 }
3026
3027 static void hpsa_update_device_supports_aborts(struct ctlr_info *h,
3028                         struct hpsa_scsi_dev_t *dev, u8 *scsi3addr)
3029 {
3030         unsigned long flags;
3031         int rc, entry;
3032         /*
3033          * See if this device supports aborts.  If we already know
3034          * the device, we already know if it supports aborts, otherwise
3035          * we have to find out if it supports aborts by trying one.
3036          */
3037         spin_lock_irqsave(&h->devlock, flags);
3038         rc = hpsa_scsi_find_entry(dev, h->dev, h->ndevices, &entry);
3039         if ((rc == DEVICE_SAME || rc == DEVICE_UPDATED) &&
3040                 entry >= 0 && entry < h->ndevices) {
3041                 dev->supports_aborts = h->dev[entry]->supports_aborts;
3042                 spin_unlock_irqrestore(&h->devlock, flags);
3043         } else {
3044                 spin_unlock_irqrestore(&h->devlock, flags);
3045                 dev->supports_aborts =
3046                                 hpsa_device_supports_aborts(h, scsi3addr);
3047                 if (dev->supports_aborts < 0)
3048                         dev->supports_aborts = 0;
3049         }
3050 }
3051
3052 static unsigned char *ext_target_model[] = {
3053         "MSA2012",
3054         "MSA2024",
3055         "MSA2312",
3056         "MSA2324",
3057         "P2000 G3 SAS",
3058         "MSA 2040 SAS",
3059         NULL,
3060 };
3061
3062 static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
3063 {
3064         int i;
3065
3066         for (i = 0; ext_target_model[i]; i++)
3067                 if (strncmp(device->model, ext_target_model[i],
3068                         strlen(ext_target_model[i])) == 0)
3069                         return 1;
3070         return 0;
3071 }
3072
3073 /* Helper function to assign bus, target, lun mapping of devices.
3074  * Puts non-external target logical volumes on bus 0, external target logical
3075  * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
3076  * Logical drive target and lun are assigned at this time, but
3077  * physical device lun and target assignment are deferred (assigned
3078  * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
3079  */
3080 static void figure_bus_target_lun(struct ctlr_info *h,
3081         u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
3082 {
3083         u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
3084
3085         if (!is_logical_dev_addr_mode(lunaddrbytes)) {
3086                 /* physical device, target and lun filled in later */
3087                 if (is_hba_lunid(lunaddrbytes))
3088                         hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
3089                 else
3090                         /* defer target, lun assignment for physical devices */
3091                         hpsa_set_bus_target_lun(device, 2, -1, -1);
3092                 return;
3093         }
3094         /* It's a logical device */
3095         if (is_ext_target(h, device)) {
3096                 /* external target way, put logicals on bus 1
3097                  * and match target/lun numbers box
3098                  * reports, other smart array, bus 0, target 0, match lunid
3099                  */
3100                 hpsa_set_bus_target_lun(device,
3101                         1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
3102                 return;
3103         }
3104         hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
3105 }
3106
3107 /*
3108  * If there is no lun 0 on a target, linux won't find any devices.
3109  * For the external targets (arrays), we have to manually detect the enclosure
3110  * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
3111  * it for some reason.  *tmpdevice is the target we're adding,
3112  * this_device is a pointer into the current element of currentsd[]
3113  * that we're building up in update_scsi_devices(), below.
3114  * lunzerobits is a bitmap that tracks which targets already have a
3115  * lun 0 assigned.
3116  * Returns 1 if an enclosure was added, 0 if not.
3117  */
3118 static int add_ext_target_dev(struct ctlr_info *h,
3119         struct hpsa_scsi_dev_t *tmpdevice,
3120         struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
3121         unsigned long lunzerobits[], int *n_ext_target_devs)
3122 {
3123         unsigned char scsi3addr[8];
3124
3125         if (test_bit(tmpdevice->target, lunzerobits))
3126                 return 0; /* There is already a lun 0 on this target. */
3127
3128         if (!is_logical_dev_addr_mode(lunaddrbytes))
3129                 return 0; /* It's the logical targets that may lack lun 0. */
3130
3131         if (!is_ext_target(h, tmpdevice))
3132                 return 0; /* Only external target devices have this problem. */
3133
3134         if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
3135                 return 0;
3136
3137         memset(scsi3addr, 0, 8);
3138         scsi3addr[3] = tmpdevice->target;
3139         if (is_hba_lunid(scsi3addr))
3140                 return 0; /* Don't add the RAID controller here. */
3141
3142         if (is_scsi_rev_5(h))
3143                 return 0; /* p1210m doesn't need to do this. */
3144
3145         if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
3146                 dev_warn(&h->pdev->dev, "Maximum number of external "
3147                         "target devices exceeded.  Check your hardware "
3148                         "configuration.");
3149                 return 0;
3150         }
3151
3152         if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
3153                 return 0;
3154         (*n_ext_target_devs)++;
3155         hpsa_set_bus_target_lun(this_device,
3156                                 tmpdevice->bus, tmpdevice->target, 0);
3157         hpsa_update_device_supports_aborts(h, this_device, scsi3addr);
3158         set_bit(tmpdevice->target, lunzerobits);
3159         return 1;
3160 }
3161
3162 /*
3163  * Get address of physical disk used for an ioaccel2 mode command:
3164  *      1. Extract ioaccel2 handle from the command.
3165  *      2. Find a matching ioaccel2 handle from list of physical disks.
3166  *      3. Return:
3167  *              1 and set scsi3addr to address of matching physical
3168  *              0 if no matching physical disk was found.
3169  */
3170 static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h,
3171         struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr)
3172 {
3173         struct io_accel2_cmd *c2 =
3174                         &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex];
3175         unsigned long flags;
3176         int i;
3177
3178         spin_lock_irqsave(&h->devlock, flags);
3179         for (i = 0; i < h->ndevices; i++)
3180                 if (h->dev[i]->ioaccel_handle == le32_to_cpu(c2->scsi_nexus)) {
3181                         memcpy(scsi3addr, h->dev[i]->scsi3addr,
3182                                 sizeof(h->dev[i]->scsi3addr));
3183                         spin_unlock_irqrestore(&h->devlock, flags);
3184                         return 1;
3185                 }
3186         spin_unlock_irqrestore(&h->devlock, flags);
3187         return 0;
3188 }
3189
3190 /*
3191  * Do CISS_REPORT_PHYS and CISS_REPORT_LOG.  Data is returned in physdev,
3192  * logdev.  The number of luns in physdev and logdev are returned in
3193  * *nphysicals and *nlogicals, respectively.
3194  * Returns 0 on success, -1 otherwise.
3195  */
3196 static int hpsa_gather_lun_info(struct ctlr_info *h,
3197         struct ReportExtendedLUNdata *physdev, u32 *nphysicals,
3198         struct ReportLUNdata *logdev, u32 *nlogicals)
3199 {
3200         if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) {
3201                 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
3202                 return -1;
3203         }
3204         *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24;
3205         if (*nphysicals > HPSA_MAX_PHYS_LUN) {
3206                 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n",
3207                         HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN);
3208                 *nphysicals = HPSA_MAX_PHYS_LUN;
3209         }
3210         if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) {
3211                 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
3212                 return -1;
3213         }
3214         *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
3215         /* Reject Logicals in excess of our max capability. */
3216         if (*nlogicals > HPSA_MAX_LUN) {
3217                 dev_warn(&h->pdev->dev,
3218                         "maximum logical LUNs (%d) exceeded.  "
3219                         "%d LUNs ignored.\n", HPSA_MAX_LUN,
3220                         *nlogicals - HPSA_MAX_LUN);
3221                         *nlogicals = HPSA_MAX_LUN;
3222         }
3223         if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
3224                 dev_warn(&h->pdev->dev,
3225                         "maximum logical + physical LUNs (%d) exceeded. "
3226                         "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
3227                         *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
3228                 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
3229         }
3230         return 0;
3231 }
3232
3233 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
3234         int i, int nphysicals, int nlogicals,
3235         struct ReportExtendedLUNdata *physdev_list,
3236         struct ReportLUNdata *logdev_list)
3237 {
3238         /* Helper function, figure out where the LUN ID info is coming from
3239          * given index i, lists of physical and logical devices, where in
3240          * the list the raid controller is supposed to appear (first or last)
3241          */
3242
3243         int logicals_start = nphysicals + (raid_ctlr_position == 0);
3244         int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
3245
3246         if (i == raid_ctlr_position)
3247                 return RAID_CTLR_LUNID;
3248
3249         if (i < logicals_start)
3250                 return &physdev_list->LUN[i -
3251                                 (raid_ctlr_position == 0)].lunid[0];
3252
3253         if (i < last_device)
3254                 return &logdev_list->LUN[i - nphysicals -
3255                         (raid_ctlr_position == 0)][0];
3256         BUG();
3257         return NULL;
3258 }
3259
3260 static int hpsa_hba_mode_enabled(struct ctlr_info *h)
3261 {
3262         int rc;
3263         int hba_mode_enabled;
3264         struct bmic_controller_parameters *ctlr_params;
3265         ctlr_params = kzalloc(sizeof(struct bmic_controller_parameters),
3266                 GFP_KERNEL);
3267
3268         if (!ctlr_params)
3269                 return -ENOMEM;
3270         rc = hpsa_bmic_ctrl_mode_sense(h, RAID_CTLR_LUNID, 0, ctlr_params,
3271                 sizeof(struct bmic_controller_parameters));
3272         if (rc) {
3273                 kfree(ctlr_params);
3274                 return rc;
3275         }
3276
3277         hba_mode_enabled =
3278                 ((ctlr_params->nvram_flags & HBA_MODE_ENABLED_FLAG) != 0);
3279         kfree(ctlr_params);
3280         return hba_mode_enabled;
3281 }
3282
3283 /* get physical drive ioaccel handle and queue depth */
3284 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h,
3285                 struct hpsa_scsi_dev_t *dev,
3286                 u8 *lunaddrbytes,
3287                 struct bmic_identify_physical_device *id_phys)
3288 {
3289         int rc;
3290         struct ext_report_lun_entry *rle =
3291                 (struct ext_report_lun_entry *) lunaddrbytes;
3292
3293         dev->ioaccel_handle = rle->ioaccel_handle;
3294         memset(id_phys, 0, sizeof(*id_phys));
3295         rc = hpsa_bmic_id_physical_device(h, lunaddrbytes,
3296                         GET_BMIC_DRIVE_NUMBER(lunaddrbytes), id_phys,
3297                         sizeof(*id_phys));
3298         if (!rc)
3299                 /* Reserve space for FW operations */
3300 #define DRIVE_CMDS_RESERVED_FOR_FW 2
3301 #define DRIVE_QUEUE_DEPTH 7
3302                 dev->queue_depth =
3303                         le16_to_cpu(id_phys->current_queue_depth_limit) -
3304                                 DRIVE_CMDS_RESERVED_FOR_FW;
3305         else
3306                 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */
3307         atomic_set(&dev->ioaccel_cmds_out, 0);
3308 }
3309
3310 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
3311 {
3312         /* the idea here is we could get notified
3313          * that some devices have changed, so we do a report
3314          * physical luns and report logical luns cmd, and adjust
3315          * our list of devices accordingly.
3316          *
3317          * The scsi3addr's of devices won't change so long as the
3318          * adapter is not reset.  That means we can rescan and
3319          * tell which devices we already know about, vs. new
3320          * devices, vs.  disappearing devices.
3321          */
3322         struct ReportExtendedLUNdata *physdev_list = NULL;
3323         struct ReportLUNdata *logdev_list = NULL;
3324         struct bmic_identify_physical_device *id_phys = NULL;
3325         u32 nphysicals = 0;
3326         u32 nlogicals = 0;
3327         u32 ndev_allocated = 0;
3328         struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
3329         int ncurrent = 0;
3330         int i, n_ext_target_devs, ndevs_to_allocate;
3331         int raid_ctlr_position;
3332         int rescan_hba_mode;
3333         DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
3334
3335         currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
3336         physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
3337         logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
3338         tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
3339         id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL);
3340
3341         if (!currentsd || !physdev_list || !logdev_list ||
3342                 !tmpdevice || !id_phys) {
3343                 dev_err(&h->pdev->dev, "out of memory\n");
3344                 goto out;
3345         }
3346         memset(lunzerobits, 0, sizeof(lunzerobits));
3347
3348         rescan_hba_mode = hpsa_hba_mode_enabled(h);
3349         if (rescan_hba_mode < 0)
3350                 goto out;
3351
3352         if (!h->hba_mode_enabled && rescan_hba_mode)
3353                 dev_warn(&h->pdev->dev, "HBA mode enabled\n");
3354         else if (h->hba_mode_enabled && !rescan_hba_mode)
3355                 dev_warn(&h->pdev->dev, "HBA mode disabled\n");
3356
3357         h->hba_mode_enabled = rescan_hba_mode;
3358
3359         if (hpsa_gather_lun_info(h, physdev_list, &nphysicals,
3360                         logdev_list, &nlogicals))
3361                 goto out;
3362
3363         /* We might see up to the maximum number of logical and physical disks
3364          * plus external target devices, and a device for the local RAID
3365          * controller.
3366          */
3367         ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
3368
3369         /* Allocate the per device structures */
3370         for (i = 0; i < ndevs_to_allocate; i++) {
3371                 if (i >= HPSA_MAX_DEVICES) {
3372                         dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
3373                                 "  %d devices ignored.\n", HPSA_MAX_DEVICES,
3374                                 ndevs_to_allocate - HPSA_MAX_DEVICES);
3375                         break;
3376                 }
3377
3378                 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
3379                 if (!currentsd[i]) {
3380                         dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
3381                                 __FILE__, __LINE__);
3382                         goto out;
3383                 }
3384                 ndev_allocated++;
3385         }
3386
3387         if (is_scsi_rev_5(h))
3388                 raid_ctlr_position = 0;
3389         else
3390                 raid_ctlr_position = nphysicals + nlogicals;
3391
3392         /* adjust our table of devices */
3393         n_ext_target_devs = 0;
3394         for (i = 0; i < nphysicals + nlogicals + 1; i++) {
3395                 u8 *lunaddrbytes, is_OBDR = 0;
3396
3397                 /* Figure out where the LUN ID info is coming from */
3398                 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
3399                         i, nphysicals, nlogicals, physdev_list, logdev_list);
3400
3401                 /* skip masked non-disk devices */
3402                 if (MASKED_DEVICE(lunaddrbytes))
3403                         if (i < nphysicals + (raid_ctlr_position == 0) &&
3404                                 NON_DISK_PHYS_DEV(lunaddrbytes))
3405                                 continue;
3406
3407                 /* Get device type, vendor, model, device id */
3408                 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
3409                                                         &is_OBDR))
3410                         continue; /* skip it if we can't talk to it. */
3411                 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
3412                 hpsa_update_device_supports_aborts(h, tmpdevice, lunaddrbytes);
3413                 this_device = currentsd[ncurrent];
3414
3415                 /*
3416                  * For external target devices, we have to insert a LUN 0 which
3417                  * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
3418                  * is nonetheless an enclosure device there.  We have to
3419                  * present that otherwise linux won't find anything if
3420                  * there is no lun 0.
3421                  */
3422                 if (add_ext_target_dev(h, tmpdevice, this_device,
3423                                 lunaddrbytes, lunzerobits,
3424                                 &n_ext_target_devs)) {
3425                         ncurrent++;
3426                         this_device = currentsd[ncurrent];
3427                 }
3428
3429                 *this_device = *tmpdevice;
3430
3431                 /* do not expose masked devices */
3432                 if (MASKED_DEVICE(lunaddrbytes) &&
3433                         i < nphysicals + (raid_ctlr_position == 0)) {
3434                         if (h->hba_mode_enabled)
3435                                 dev_warn(&h->pdev->dev,
3436                                         "Masked physical device detected\n");
3437                         this_device->expose_state = HPSA_DO_NOT_EXPOSE;
3438                 } else {
3439                         this_device->expose_state =
3440                                         HPSA_SG_ATTACH | HPSA_ULD_ATTACH;
3441                 }
3442
3443                 switch (this_device->devtype) {
3444                 case TYPE_ROM:
3445                         /* We don't *really* support actual CD-ROM devices,
3446                          * just "One Button Disaster Recovery" tape drive
3447                          * which temporarily pretends to be a CD-ROM drive.
3448                          * So we check that the device is really an OBDR tape
3449                          * device by checking for "$DR-10" in bytes 43-48 of
3450                          * the inquiry data.
3451                          */
3452                         if (is_OBDR)
3453                                 ncurrent++;
3454                         break;
3455                 case TYPE_DISK:
3456                         if (h->hba_mode_enabled) {
3457                                 /* never use raid mapper in HBA mode */
3458                                 this_device->offload_enabled = 0;
3459                                 ncurrent++;
3460                                 break;
3461                         } else if (h->acciopath_status) {
3462                                 if (i >= nphysicals) {
3463                                         ncurrent++;
3464                                         break;
3465                                 }
3466                         } else {
3467                                 if (i < nphysicals)
3468                                         break;
3469                                 ncurrent++;
3470                                 break;
3471                         }
3472                         if (h->transMethod & CFGTBL_Trans_io_accel1 ||
3473                                 h->transMethod & CFGTBL_Trans_io_accel2) {
3474                                 hpsa_get_ioaccel_drive_info(h, this_device,
3475                                                         lunaddrbytes, id_phys);
3476                                 atomic_set(&this_device->ioaccel_cmds_out, 0);
3477                                 ncurrent++;
3478                         }
3479                         break;
3480                 case TYPE_TAPE:
3481                 case TYPE_MEDIUM_CHANGER:
3482                         ncurrent++;
3483                         break;
3484                 case TYPE_ENCLOSURE:
3485                         if (h->hba_mode_enabled)
3486                                 ncurrent++;
3487                         break;
3488                 case TYPE_RAID:
3489                         /* Only present the Smartarray HBA as a RAID controller.
3490                          * If it's a RAID controller other than the HBA itself
3491                          * (an external RAID controller, MSA500 or similar)
3492                          * don't present it.
3493                          */
3494                         if (!is_hba_lunid(lunaddrbytes))
3495                                 break;
3496                         ncurrent++;
3497                         break;
3498                 default:
3499                         break;
3500                 }
3501                 if (ncurrent >= HPSA_MAX_DEVICES)
3502                         break;
3503         }
3504         adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
3505 out:
3506         kfree(tmpdevice);
3507         for (i = 0; i < ndev_allocated; i++)
3508                 kfree(currentsd[i]);
3509         kfree(currentsd);
3510         kfree(physdev_list);
3511         kfree(logdev_list);
3512         kfree(id_phys);
3513 }
3514
3515 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc,
3516                                    struct scatterlist *sg)
3517 {
3518         u64 addr64 = (u64) sg_dma_address(sg);
3519         unsigned int len = sg_dma_len(sg);
3520
3521         desc->Addr = cpu_to_le64(addr64);
3522         desc->Len = cpu_to_le32(len);
3523         desc->Ext = 0;
3524 }
3525
3526 /*
3527  * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
3528  * dma mapping  and fills in the scatter gather entries of the
3529  * hpsa command, cp.
3530  */
3531 static int hpsa_scatter_gather(struct ctlr_info *h,
3532                 struct CommandList *cp,
3533                 struct scsi_cmnd *cmd)
3534 {
3535         struct scatterlist *sg;
3536         int use_sg, i, sg_index, chained;
3537         struct SGDescriptor *curr_sg;
3538
3539         BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
3540
3541         use_sg = scsi_dma_map(cmd);
3542         if (use_sg < 0)
3543                 return use_sg;
3544
3545         if (!use_sg)
3546                 goto sglist_finished;
3547
3548         curr_sg = cp->SG;
3549         chained = 0;
3550         sg_index = 0;
3551         scsi_for_each_sg(cmd, sg, use_sg, i) {
3552                 if (i == h->max_cmd_sg_entries - 1 &&
3553                         use_sg > h->max_cmd_sg_entries) {
3554                         chained = 1;
3555                         curr_sg = h->cmd_sg_list[cp->cmdindex];
3556                         sg_index = 0;
3557                 }
3558                 hpsa_set_sg_descriptor(curr_sg, sg);
3559                 curr_sg++;
3560         }
3561
3562         /* Back the pointer up to the last entry and mark it as "last". */
3563         (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
3564
3565         if (use_sg + chained > h->maxSG)
3566                 h->maxSG = use_sg + chained;
3567
3568         if (chained) {
3569                 cp->Header.SGList = h->max_cmd_sg_entries;
3570                 cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
3571                 if (hpsa_map_sg_chain_block(h, cp)) {
3572                         scsi_dma_unmap(cmd);
3573                         return -1;
3574                 }
3575                 return 0;
3576         }
3577
3578 sglist_finished:
3579
3580         cp->Header.SGList = (u8) use_sg;   /* no. SGs contig in this cmd */
3581         cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */
3582         return 0;
3583 }
3584
3585 #define IO_ACCEL_INELIGIBLE (1)
3586 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
3587 {
3588         int is_write = 0;
3589         u32 block;
3590         u32 block_cnt;
3591
3592         /* Perform some CDB fixups if needed using 10 byte reads/writes only */
3593         switch (cdb[0]) {
3594         case WRITE_6:
3595         case WRITE_12:
3596                 is_write = 1;
3597         case READ_6:
3598         case READ_12:
3599                 if (*cdb_len == 6) {
3600                         block = (((u32) cdb[2]) << 8) | cdb[3];
3601                         block_cnt = cdb[4];
3602                 } else {
3603                         BUG_ON(*cdb_len != 12);
3604                         block = (((u32) cdb[2]) << 24) |
3605                                 (((u32) cdb[3]) << 16) |
3606                                 (((u32) cdb[4]) << 8) |
3607                                 cdb[5];
3608                         block_cnt =
3609                                 (((u32) cdb[6]) << 24) |
3610                                 (((u32) cdb[7]) << 16) |
3611                                 (((u32) cdb[8]) << 8) |
3612                                 cdb[9];
3613                 }
3614                 if (block_cnt > 0xffff)
3615                         return IO_ACCEL_INELIGIBLE;
3616
3617                 cdb[0] = is_write ? WRITE_10 : READ_10;
3618                 cdb[1] = 0;
3619                 cdb[2] = (u8) (block >> 24);
3620                 cdb[3] = (u8) (block >> 16);
3621                 cdb[4] = (u8) (block >> 8);
3622                 cdb[5] = (u8) (block);
3623                 cdb[6] = 0;
3624                 cdb[7] = (u8) (block_cnt >> 8);
3625                 cdb[8] = (u8) (block_cnt);
3626                 cdb[9] = 0;
3627                 *cdb_len = 10;
3628                 break;
3629         }
3630         return 0;
3631 }
3632
3633 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
3634         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3635         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
3636 {
3637         struct scsi_cmnd *cmd = c->scsi_cmd;
3638         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
3639         unsigned int len;
3640         unsigned int total_len = 0;
3641         struct scatterlist *sg;
3642         u64 addr64;
3643         int use_sg, i;
3644         struct SGDescriptor *curr_sg;
3645         u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
3646
3647         /* TODO: implement chaining support */
3648         if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
3649                 atomic_dec(&phys_disk->ioaccel_cmds_out);
3650                 return IO_ACCEL_INELIGIBLE;
3651         }
3652
3653         BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
3654
3655         if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
3656                 atomic_dec(&phys_disk->ioaccel_cmds_out);
3657                 return IO_ACCEL_INELIGIBLE;
3658         }
3659
3660         c->cmd_type = CMD_IOACCEL1;
3661
3662         /* Adjust the DMA address to point to the accelerated command buffer */
3663         c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
3664                                 (c->cmdindex * sizeof(*cp));
3665         BUG_ON(c->busaddr & 0x0000007F);
3666
3667         use_sg = scsi_dma_map(cmd);
3668         if (use_sg < 0) {
3669                 atomic_dec(&phys_disk->ioaccel_cmds_out);
3670                 return use_sg;
3671         }
3672
3673         if (use_sg) {
3674                 curr_sg = cp->SG;
3675                 scsi_for_each_sg(cmd, sg, use_sg, i) {
3676                         addr64 = (u64) sg_dma_address(sg);
3677                         len  = sg_dma_len(sg);
3678                         total_len += len;
3679                         curr_sg->Addr = cpu_to_le64(addr64);
3680                         curr_sg->Len = cpu_to_le32(len);
3681                         curr_sg->Ext = cpu_to_le32(0);
3682                         curr_sg++;
3683                 }
3684                 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
3685
3686                 switch (cmd->sc_data_direction) {
3687                 case DMA_TO_DEVICE:
3688                         control |= IOACCEL1_CONTROL_DATA_OUT;
3689                         break;
3690                 case DMA_FROM_DEVICE:
3691                         control |= IOACCEL1_CONTROL_DATA_IN;
3692                         break;
3693                 case DMA_NONE:
3694                         control |= IOACCEL1_CONTROL_NODATAXFER;
3695                         break;
3696                 default:
3697                         dev_err(&h->pdev->dev, "unknown data direction: %d\n",
3698                         cmd->sc_data_direction);
3699                         BUG();
3700                         break;
3701                 }
3702         } else {
3703                 control |= IOACCEL1_CONTROL_NODATAXFER;
3704         }
3705
3706         c->Header.SGList = use_sg;
3707         /* Fill out the command structure to submit */
3708         cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF);
3709         cp->transfer_len = cpu_to_le32(total_len);
3710         cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ |
3711                         (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK));
3712         cp->control = cpu_to_le32(control);
3713         memcpy(cp->CDB, cdb, cdb_len);
3714         memcpy(cp->CISS_LUN, scsi3addr, 8);
3715         /* Tag was already set at init time. */
3716         enqueue_cmd_and_start_io(h, c);
3717         return 0;
3718 }
3719
3720 /*
3721  * Queue a command directly to a device behind the controller using the
3722  * I/O accelerator path.
3723  */
3724 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
3725         struct CommandList *c)
3726 {
3727         struct scsi_cmnd *cmd = c->scsi_cmd;
3728         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
3729
3730         c->phys_disk = dev;
3731
3732         return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
3733                 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev);
3734 }
3735
3736 /*
3737  * Set encryption parameters for the ioaccel2 request
3738  */
3739 static void set_encrypt_ioaccel2(struct ctlr_info *h,
3740         struct CommandList *c, struct io_accel2_cmd *cp)
3741 {
3742         struct scsi_cmnd *cmd = c->scsi_cmd;
3743         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
3744         struct raid_map_data *map = &dev->raid_map;
3745         u64 first_block;
3746
3747         /* Are we doing encryption on this device */
3748         if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON))
3749                 return;
3750         /* Set the data encryption key index. */
3751         cp->dekindex = map->dekindex;
3752
3753         /* Set the encryption enable flag, encoded into direction field. */
3754         cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
3755
3756         /* Set encryption tweak values based on logical block address
3757          * If block size is 512, tweak value is LBA.
3758          * For other block sizes, tweak is (LBA * block size)/ 512)
3759          */
3760         switch (cmd->cmnd[0]) {
3761         /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
3762         case WRITE_6:
3763         case READ_6:
3764                 first_block = get_unaligned_be16(&cmd->cmnd[2]);
3765                 break;
3766         case WRITE_10:
3767         case READ_10:
3768         /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
3769         case WRITE_12:
3770         case READ_12:
3771                 first_block = get_unaligned_be32(&cmd->cmnd[2]);
3772                 break;
3773         case WRITE_16:
3774         case READ_16:
3775                 first_block = get_unaligned_be64(&cmd->cmnd[2]);
3776                 break;
3777         default:
3778                 dev_err(&h->pdev->dev,
3779                         "ERROR: %s: size (0x%x) not supported for encryption\n",
3780                         __func__, cmd->cmnd[0]);
3781                 BUG();
3782                 break;
3783         }
3784
3785         if (le32_to_cpu(map->volume_blk_size) != 512)
3786                 first_block = first_block *
3787                                 le32_to_cpu(map->volume_blk_size)/512;
3788
3789         cp->tweak_lower = cpu_to_le32(first_block);
3790         cp->tweak_upper = cpu_to_le32(first_block >> 32);
3791 }
3792
3793 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
3794         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3795         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
3796 {
3797         struct scsi_cmnd *cmd = c->scsi_cmd;
3798         struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
3799         struct ioaccel2_sg_element *curr_sg;
3800         int use_sg, i;
3801         struct scatterlist *sg;
3802         u64 addr64;
3803         u32 len;
3804         u32 total_len = 0;
3805
3806         if (scsi_sg_count(cmd) > h->ioaccel_maxsg) {
3807                 atomic_dec(&phys_disk->ioaccel_cmds_out);
3808                 return IO_ACCEL_INELIGIBLE;
3809         }
3810
3811         if (fixup_ioaccel_cdb(cdb, &cdb_len)) {
3812                 atomic_dec(&phys_disk->ioaccel_cmds_out);
3813                 return IO_ACCEL_INELIGIBLE;
3814         }
3815
3816         c->cmd_type = CMD_IOACCEL2;
3817         /* Adjust the DMA address to point to the accelerated command buffer */
3818         c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
3819                                 (c->cmdindex * sizeof(*cp));
3820         BUG_ON(c->busaddr & 0x0000007F);
3821
3822         memset(cp, 0, sizeof(*cp));
3823         cp->IU_type = IOACCEL2_IU_TYPE;
3824
3825         use_sg = scsi_dma_map(cmd);
3826         if (use_sg < 0) {
3827                 atomic_dec(&phys_disk->ioaccel_cmds_out);
3828                 return use_sg;
3829         }
3830
3831         if (use_sg) {
3832                 BUG_ON(use_sg > IOACCEL2_MAXSGENTRIES);
3833                 curr_sg = cp->sg;
3834                 scsi_for_each_sg(cmd, sg, use_sg, i) {
3835                         addr64 = (u64) sg_dma_address(sg);
3836                         len  = sg_dma_len(sg);
3837                         total_len += len;
3838                         curr_sg->address = cpu_to_le64(addr64);
3839                         curr_sg->length = cpu_to_le32(len);
3840                         curr_sg->reserved[0] = 0;
3841                         curr_sg->reserved[1] = 0;
3842                         curr_sg->reserved[2] = 0;
3843                         curr_sg->chain_indicator = 0;
3844                         curr_sg++;
3845                 }
3846
3847                 switch (cmd->sc_data_direction) {
3848                 case DMA_TO_DEVICE:
3849                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3850                         cp->direction |= IOACCEL2_DIR_DATA_OUT;
3851                         break;
3852                 case DMA_FROM_DEVICE:
3853                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3854                         cp->direction |= IOACCEL2_DIR_DATA_IN;
3855                         break;
3856                 case DMA_NONE:
3857                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3858                         cp->direction |= IOACCEL2_DIR_NO_DATA;
3859                         break;
3860                 default:
3861                         dev_err(&h->pdev->dev, "unknown data direction: %d\n",
3862                                 cmd->sc_data_direction);
3863                         BUG();
3864                         break;
3865                 }
3866         } else {
3867                 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3868                 cp->direction |= IOACCEL2_DIR_NO_DATA;
3869         }
3870
3871         /* Set encryption parameters, if necessary */
3872         set_encrypt_ioaccel2(h, c, cp);
3873
3874         cp->scsi_nexus = cpu_to_le32(ioaccel_handle);
3875         cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT);
3876         memcpy(cp->cdb, cdb, sizeof(cp->cdb));
3877
3878         /* fill in sg elements */
3879         cp->sg_count = (u8) use_sg;
3880
3881         cp->data_len = cpu_to_le32(total_len);
3882         cp->err_ptr = cpu_to_le64(c->busaddr +
3883                         offsetof(struct io_accel2_cmd, error_data));
3884         cp->err_len = cpu_to_le32(sizeof(cp->error_data));
3885
3886         enqueue_cmd_and_start_io(h, c);
3887         return 0;
3888 }
3889
3890 /*
3891  * Queue a command to the correct I/O accelerator path.
3892  */
3893 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
3894         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3895         u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk)
3896 {
3897         /* Try to honor the device's queue depth */
3898         if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) >
3899                                         phys_disk->queue_depth) {
3900                 atomic_dec(&phys_disk->ioaccel_cmds_out);
3901                 return IO_ACCEL_INELIGIBLE;
3902         }
3903         if (h->transMethod & CFGTBL_Trans_io_accel1)
3904                 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
3905                                                 cdb, cdb_len, scsi3addr,
3906                                                 phys_disk);
3907         else
3908                 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
3909                                                 cdb, cdb_len, scsi3addr,
3910                                                 phys_disk);
3911 }
3912
3913 static void raid_map_helper(struct raid_map_data *map,
3914                 int offload_to_mirror, u32 *map_index, u32 *current_group)
3915 {
3916         if (offload_to_mirror == 0)  {
3917                 /* use physical disk in the first mirrored group. */
3918                 *map_index %= le16_to_cpu(map->data_disks_per_row);
3919                 return;
3920         }
3921         do {
3922                 /* determine mirror group that *map_index indicates */
3923                 *current_group = *map_index /
3924                         le16_to_cpu(map->data_disks_per_row);
3925                 if (offload_to_mirror == *current_group)
3926                         continue;
3927                 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) {
3928                         /* select map index from next group */
3929                         *map_index += le16_to_cpu(map->data_disks_per_row);
3930                         (*current_group)++;
3931                 } else {
3932                         /* select map index from first group */
3933                         *map_index %= le16_to_cpu(map->data_disks_per_row);
3934                         *current_group = 0;
3935                 }
3936         } while (offload_to_mirror != *current_group);
3937 }
3938
3939 /*
3940  * Attempt to perform offload RAID mapping for a logical volume I/O.
3941  */
3942 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
3943         struct CommandList *c)
3944 {
3945         struct scsi_cmnd *cmd = c->scsi_cmd;
3946         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
3947         struct raid_map_data *map = &dev->raid_map;
3948         struct raid_map_disk_data *dd = &map->data[0];
3949         int is_write = 0;
3950         u32 map_index;
3951         u64 first_block, last_block;
3952         u32 block_cnt;
3953         u32 blocks_per_row;
3954         u64 first_row, last_row;
3955         u32 first_row_offset, last_row_offset;
3956         u32 first_column, last_column;
3957         u64 r0_first_row, r0_last_row;
3958         u32 r5or6_blocks_per_row;
3959         u64 r5or6_first_row, r5or6_last_row;
3960         u32 r5or6_first_row_offset, r5or6_last_row_offset;
3961         u32 r5or6_first_column, r5or6_last_column;
3962         u32 total_disks_per_row;
3963         u32 stripesize;
3964         u32 first_group, last_group, current_group;
3965         u32 map_row;
3966         u32 disk_handle;
3967         u64 disk_block;
3968         u32 disk_block_cnt;
3969         u8 cdb[16];
3970         u8 cdb_len;
3971         u16 strip_size;
3972 #if BITS_PER_LONG == 32
3973         u64 tmpdiv;
3974 #endif
3975         int offload_to_mirror;
3976
3977         /* check for valid opcode, get LBA and block count */
3978         switch (cmd->cmnd[0]) {
3979         case WRITE_6:
3980                 is_write = 1;
3981         case READ_6:
3982                 first_block =
3983                         (((u64) cmd->cmnd[2]) << 8) |
3984                         cmd->cmnd[3];
3985                 block_cnt = cmd->cmnd[4];
3986                 if (block_cnt == 0)
3987                         block_cnt = 256;
3988                 break;
3989         case WRITE_10:
3990                 is_write = 1;
3991         case READ_10:
3992                 first_block =
3993                         (((u64) cmd->cmnd[2]) << 24) |
3994                         (((u64) cmd->cmnd[3]) << 16) |
3995                         (((u64) cmd->cmnd[4]) << 8) |
3996                         cmd->cmnd[5];
3997                 block_cnt =
3998                         (((u32) cmd->cmnd[7]) << 8) |
3999                         cmd->cmnd[8];
4000                 break;
4001         case WRITE_12:
4002                 is_write = 1;
4003         case READ_12:
4004                 first_block =
4005                         (((u64) cmd->cmnd[2]) << 24) |
4006                         (((u64) cmd->cmnd[3]) << 16) |
4007                         (((u64) cmd->cmnd[4]) << 8) |
4008                         cmd->cmnd[5];
4009                 block_cnt =
4010                         (((u32) cmd->cmnd[6]) << 24) |
4011                         (((u32) cmd->cmnd[7]) << 16) |
4012                         (((u32) cmd->cmnd[8]) << 8) |
4013                 cmd->cmnd[9];
4014                 break;
4015         case WRITE_16:
4016                 is_write = 1;
4017         case READ_16:
4018                 first_block =
4019                         (((u64) cmd->cmnd[2]) << 56) |
4020                         (((u64) cmd->cmnd[3]) << 48) |
4021                         (((u64) cmd->cmnd[4]) << 40) |
4022                         (((u64) cmd->cmnd[5]) << 32) |
4023                         (((u64) cmd->cmnd[6]) << 24) |
4024                         (((u64) cmd->cmnd[7]) << 16) |
4025                         (((u64) cmd->cmnd[8]) << 8) |
4026                         cmd->cmnd[9];
4027                 block_cnt =
4028                         (((u32) cmd->cmnd[10]) << 24) |
4029                         (((u32) cmd->cmnd[11]) << 16) |
4030                         (((u32) cmd->cmnd[12]) << 8) |
4031                         cmd->cmnd[13];
4032                 break;
4033         default:
4034                 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
4035         }
4036         last_block = first_block + block_cnt - 1;
4037
4038         /* check for write to non-RAID-0 */
4039         if (is_write && dev->raid_level != 0)
4040                 return IO_ACCEL_INELIGIBLE;
4041
4042         /* check for invalid block or wraparound */
4043         if (last_block >= le64_to_cpu(map->volume_blk_cnt) ||
4044                 last_block < first_block)
4045                 return IO_ACCEL_INELIGIBLE;
4046
4047         /* calculate stripe information for the request */
4048         blocks_per_row = le16_to_cpu(map->data_disks_per_row) *
4049                                 le16_to_cpu(map->strip_size);
4050         strip_size = le16_to_cpu(map->strip_size);
4051 #if BITS_PER_LONG == 32
4052         tmpdiv = first_block;
4053         (void) do_div(tmpdiv, blocks_per_row);
4054         first_row = tmpdiv;
4055         tmpdiv = last_block;
4056         (void) do_div(tmpdiv, blocks_per_row);
4057         last_row = tmpdiv;
4058         first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
4059         last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
4060         tmpdiv = first_row_offset;
4061         (void) do_div(tmpdiv, strip_size);
4062         first_column = tmpdiv;
4063         tmpdiv = last_row_offset;
4064         (void) do_div(tmpdiv, strip_size);
4065         last_column = tmpdiv;
4066 #else
4067         first_row = first_block / blocks_per_row;
4068         last_row = last_block / blocks_per_row;
4069         first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
4070         last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
4071         first_column = first_row_offset / strip_size;
4072         last_column = last_row_offset / strip_size;
4073 #endif
4074
4075         /* if this isn't a single row/column then give to the controller */
4076         if ((first_row != last_row) || (first_column != last_column))
4077                 return IO_ACCEL_INELIGIBLE;
4078
4079         /* proceeding with driver mapping */
4080         total_disks_per_row = le16_to_cpu(map->data_disks_per_row) +
4081                                 le16_to_cpu(map->metadata_disks_per_row);
4082         map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
4083                                 le16_to_cpu(map->row_cnt);
4084         map_index = (map_row * total_disks_per_row) + first_column;
4085
4086         switch (dev->raid_level) {
4087         case HPSA_RAID_0:
4088                 break; /* nothing special to do */
4089         case HPSA_RAID_1:
4090                 /* Handles load balance across RAID 1 members.
4091                  * (2-drive R1 and R10 with even # of drives.)
4092                  * Appropriate for SSDs, not optimal for HDDs
4093                  */
4094                 BUG_ON(le16_to_cpu(map->layout_map_count) != 2);
4095                 if (dev->offload_to_mirror)
4096                         map_index += le16_to_cpu(map->data_disks_per_row);
4097                 dev->offload_to_mirror = !dev->offload_to_mirror;
4098                 break;
4099         case HPSA_RAID_ADM:
4100                 /* Handles N-way mirrors  (R1-ADM)
4101                  * and R10 with # of drives divisible by 3.)
4102                  */
4103                 BUG_ON(le16_to_cpu(map->layout_map_count) != 3);
4104
4105                 offload_to_mirror = dev->offload_to_mirror;
4106                 raid_map_helper(map, offload_to_mirror,
4107                                 &map_index, &current_group);
4108                 /* set mirror group to use next time */
4109                 offload_to_mirror =
4110                         (offload_to_mirror >=
4111                         le16_to_cpu(map->layout_map_count) - 1)
4112                         ? 0 : offload_to_mirror + 1;
4113                 dev->offload_to_mirror = offload_to_mirror;
4114                 /* Avoid direct use of dev->offload_to_mirror within this
4115                  * function since multiple threads might simultaneously
4116                  * increment it beyond the range of dev->layout_map_count -1.
4117                  */
4118                 break;
4119         case HPSA_RAID_5:
4120         case HPSA_RAID_6:
4121                 if (le16_to_cpu(map->layout_map_count) <= 1)
4122                         break;
4123
4124                 /* Verify first and last block are in same RAID group */
4125                 r5or6_blocks_per_row =
4126                         le16_to_cpu(map->strip_size) *
4127                         le16_to_cpu(map->data_disks_per_row);
4128                 BUG_ON(r5or6_blocks_per_row == 0);
4129                 stripesize = r5or6_blocks_per_row *
4130                         le16_to_cpu(map->layout_map_count);
4131 #if BITS_PER_LONG == 32
4132                 tmpdiv = first_block;
4133                 first_group = do_div(tmpdiv, stripesize);
4134                 tmpdiv = first_group;
4135                 (void) do_div(tmpdiv, r5or6_blocks_per_row);
4136                 first_group = tmpdiv;
4137                 tmpdiv = last_block;
4138                 last_group = do_div(tmpdiv, stripesize);
4139                 tmpdiv = last_group;
4140                 (void) do_div(tmpdiv, r5or6_blocks_per_row);
4141                 last_group = tmpdiv;
4142 #else
4143                 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
4144                 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
4145 #endif
4146                 if (first_group != last_group)
4147                         return IO_ACCEL_INELIGIBLE;
4148
4149                 /* Verify request is in a single row of RAID 5/6 */
4150 #if BITS_PER_LONG == 32
4151                 tmpdiv = first_block;
4152                 (void) do_div(tmpdiv, stripesize);
4153                 first_row = r5or6_first_row = r0_first_row = tmpdiv;
4154                 tmpdiv = last_block;
4155                 (void) do_div(tmpdiv, stripesize);
4156                 r5or6_last_row = r0_last_row = tmpdiv;
4157 #else
4158                 first_row = r5or6_first_row = r0_first_row =
4159                                                 first_block / stripesize;
4160                 r5or6_last_row = r0_last_row = last_block / stripesize;
4161 #endif
4162                 if (r5or6_first_row != r5or6_last_row)
4163                         return IO_ACCEL_INELIGIBLE;
4164
4165
4166                 /* Verify request is in a single column */
4167 #if BITS_PER_LONG == 32
4168                 tmpdiv = first_block;
4169                 first_row_offset = do_div(tmpdiv, stripesize);
4170                 tmpdiv = first_row_offset;
4171                 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
4172                 r5or6_first_row_offset = first_row_offset;
4173                 tmpdiv = last_block;
4174                 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
4175                 tmpdiv = r5or6_last_row_offset;
4176                 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
4177                 tmpdiv = r5or6_first_row_offset;
4178                 (void) do_div(tmpdiv, map->strip_size);
4179                 first_column = r5or6_first_column = tmpdiv;
4180                 tmpdiv = r5or6_last_row_offset;
4181                 (void) do_div(tmpdiv, map->strip_size);
4182                 r5or6_last_column = tmpdiv;
4183 #else
4184                 first_row_offset = r5or6_first_row_offset =
4185                         (u32)((first_block % stripesize) %
4186                                                 r5or6_blocks_per_row);
4187
4188                 r5or6_last_row_offset =
4189                         (u32)((last_block % stripesize) %
4190                                                 r5or6_blocks_per_row);
4191
4192                 first_column = r5or6_first_column =
4193                         r5or6_first_row_offset / le16_to_cpu(map->strip_size);
4194                 r5or6_last_column =
4195                         r5or6_last_row_offset / le16_to_cpu(map->strip_size);
4196 #endif
4197                 if (r5or6_first_column != r5or6_last_column)
4198                         return IO_ACCEL_INELIGIBLE;
4199
4200                 /* Request is eligible */
4201                 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
4202                         le16_to_cpu(map->row_cnt);
4203
4204                 map_index = (first_group *
4205                         (le16_to_cpu(map->row_cnt) * total_disks_per_row)) +
4206                         (map_row * total_disks_per_row) + first_column;
4207                 break;
4208         default:
4209                 return IO_ACCEL_INELIGIBLE;
4210         }
4211
4212         if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES))
4213                 return IO_ACCEL_INELIGIBLE;
4214
4215         c->phys_disk = dev->phys_disk[map_index];
4216
4217         disk_handle = dd[map_index].ioaccel_handle;
4218         disk_block = le64_to_cpu(map->disk_starting_blk) +
4219                         first_row * le16_to_cpu(map->strip_size) +
4220                         (first_row_offset - first_column *
4221                         le16_to_cpu(map->strip_size));
4222         disk_block_cnt = block_cnt;
4223
4224         /* handle differing logical/physical block sizes */
4225         if (map->phys_blk_shift) {
4226                 disk_block <<= map->phys_blk_shift;
4227                 disk_block_cnt <<= map->phys_blk_shift;
4228         }
4229         BUG_ON(disk_block_cnt > 0xffff);
4230
4231         /* build the new CDB for the physical disk I/O */
4232         if (disk_block > 0xffffffff) {
4233                 cdb[0] = is_write ? WRITE_16 : READ_16;
4234                 cdb[1] = 0;
4235                 cdb[2] = (u8) (disk_block >> 56);
4236                 cdb[3] = (u8) (disk_block >> 48);
4237                 cdb[4] = (u8) (disk_block >> 40);
4238                 cdb[5] = (u8) (disk_block >> 32);
4239                 cdb[6] = (u8) (disk_block >> 24);
4240                 cdb[7] = (u8) (disk_block >> 16);
4241                 cdb[8] = (u8) (disk_block >> 8);
4242                 cdb[9] = (u8) (disk_block);
4243                 cdb[10] = (u8) (disk_block_cnt >> 24);
4244                 cdb[11] = (u8) (disk_block_cnt >> 16);
4245                 cdb[12] = (u8) (disk_block_cnt >> 8);
4246                 cdb[13] = (u8) (disk_block_cnt);
4247                 cdb[14] = 0;
4248                 cdb[15] = 0;
4249                 cdb_len = 16;
4250         } else {
4251                 cdb[0] = is_write ? WRITE_10 : READ_10;
4252                 cdb[1] = 0;
4253                 cdb[2] = (u8) (disk_block >> 24);
4254                 cdb[3] = (u8) (disk_block >> 16);
4255                 cdb[4] = (u8) (disk_block >> 8);
4256                 cdb[5] = (u8) (disk_block);
4257                 cdb[6] = 0;
4258                 cdb[7] = (u8) (disk_block_cnt >> 8);
4259                 cdb[8] = (u8) (disk_block_cnt);
4260                 cdb[9] = 0;
4261                 cdb_len = 10;
4262         }
4263         return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
4264                                                 dev->scsi3addr,
4265                                                 dev->phys_disk[map_index]);
4266 }
4267
4268 /*
4269  * Submit commands down the "normal" RAID stack path
4270  * All callers to hpsa_ciss_submit must check lockup_detected
4271  * beforehand, before (opt.) and after calling cmd_alloc
4272  */
4273 static int hpsa_ciss_submit(struct ctlr_info *h,
4274         struct CommandList *c, struct scsi_cmnd *cmd,
4275         unsigned char scsi3addr[])
4276 {
4277         cmd->host_scribble = (unsigned char *) c;
4278         c->cmd_type = CMD_SCSI;
4279         c->scsi_cmd = cmd;
4280         c->Header.ReplyQueue = 0;  /* unused in simple mode */
4281         memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
4282         c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT));
4283
4284         /* Fill in the request block... */
4285
4286         c->Request.Timeout = 0;
4287         BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
4288         c->Request.CDBLen = cmd->cmd_len;
4289         memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
4290         switch (cmd->sc_data_direction) {
4291         case DMA_TO_DEVICE:
4292                 c->Request.type_attr_dir =
4293                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
4294                 break;
4295         case DMA_FROM_DEVICE:
4296                 c->Request.type_attr_dir =
4297                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
4298                 break;
4299         case DMA_NONE:
4300                 c->Request.type_attr_dir =
4301                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
4302                 break;
4303         case DMA_BIDIRECTIONAL:
4304                 /* This can happen if a buggy application does a scsi passthru
4305                  * and sets both inlen and outlen to non-zero. ( see
4306                  * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
4307                  */
4308
4309                 c->Request.type_attr_dir =
4310                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
4311                 /* This is technically wrong, and hpsa controllers should
4312                  * reject it with CMD_INVALID, which is the most correct
4313                  * response, but non-fibre backends appear to let it
4314                  * slide by, and give the same results as if this field
4315                  * were set correctly.  Either way is acceptable for
4316                  * our purposes here.
4317                  */
4318
4319                 break;
4320
4321         default:
4322                 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4323                         cmd->sc_data_direction);
4324                 BUG();
4325                 break;
4326         }
4327
4328         if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
4329                 cmd_free(h, c);
4330                 return SCSI_MLQUEUE_HOST_BUSY;
4331         }
4332         enqueue_cmd_and_start_io(h, c);
4333         /* the cmd'll come back via intr handler in complete_scsi_command()  */
4334         return 0;
4335 }
4336
4337 static void hpsa_cmd_init(struct ctlr_info *h, int index,
4338                                 struct CommandList *c)
4339 {
4340         dma_addr_t cmd_dma_handle, err_dma_handle;
4341
4342         /* Zero out all of commandlist except the last field, refcount */
4343         memset(c, 0, offsetof(struct CommandList, refcount));
4344         c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT));
4345         cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
4346         c->err_info = h->errinfo_pool + index;
4347         memset(c->err_info, 0, sizeof(*c->err_info));
4348         err_dma_handle = h->errinfo_pool_dhandle
4349             + index * sizeof(*c->err_info);
4350         c->cmdindex = index;
4351         c->busaddr = (u32) cmd_dma_handle;
4352         c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle);
4353         c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info));
4354         c->h = h;
4355 }
4356
4357 static void hpsa_preinitialize_commands(struct ctlr_info *h)
4358 {
4359         int i;
4360
4361         for (i = 0; i < h->nr_cmds; i++) {
4362                 struct CommandList *c = h->cmd_pool + i;
4363
4364                 hpsa_cmd_init(h, i, c);
4365                 atomic_set(&c->refcount, 0);
4366         }
4367 }
4368
4369 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index,
4370                                 struct CommandList *c)
4371 {
4372         dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c);
4373
4374         memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
4375         memset(c->err_info, 0, sizeof(*c->err_info));
4376         c->busaddr = (u32) cmd_dma_handle;
4377 }
4378
4379 static void hpsa_command_resubmit_worker(struct work_struct *work)
4380 {
4381         struct scsi_cmnd *cmd;
4382         struct hpsa_scsi_dev_t *dev;
4383         struct CommandList *c =
4384                         container_of(work, struct CommandList, work);
4385
4386         cmd = c->scsi_cmd;
4387         dev = cmd->device->hostdata;
4388         if (!dev) {
4389                 cmd->result = DID_NO_CONNECT << 16;
4390                 cmd->scsi_done(cmd);
4391                 return;
4392         }
4393         hpsa_cmd_partial_init(c->h, c->cmdindex, c);
4394         if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) {
4395                 /*
4396                  * If we get here, it means dma mapping failed. Try
4397                  * again via scsi mid layer, which will then get
4398                  * SCSI_MLQUEUE_HOST_BUSY.
4399                  */
4400                 cmd->result = DID_IMM_RETRY << 16;
4401                 cmd->scsi_done(cmd);
4402         }
4403 }
4404
4405 /* Running in struct Scsi_Host->host_lock less mode */
4406 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
4407 {
4408         struct ctlr_info *h;
4409         struct hpsa_scsi_dev_t *dev;
4410         unsigned char scsi3addr[8];
4411         struct CommandList *c;
4412         int rc = 0;
4413
4414         /* Get the ptr to our adapter structure out of cmd->host. */
4415         h = sdev_to_hba(cmd->device);
4416         dev = cmd->device->hostdata;
4417         if (!dev) {
4418                 cmd->result = DID_NO_CONNECT << 16;
4419                 cmd->scsi_done(cmd);
4420                 return 0;
4421         }
4422         memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
4423
4424         if (unlikely(lockup_detected(h))) {
4425                 cmd->result = DID_NO_CONNECT << 16;
4426                 cmd->scsi_done(cmd);
4427                 return 0;
4428         }
4429         c = cmd_alloc(h);
4430         if (c == NULL) {                        /* trouble... */
4431                 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
4432                 return SCSI_MLQUEUE_HOST_BUSY;
4433         }
4434         if (unlikely(lockup_detected(h))) {
4435                 cmd->result = DID_NO_CONNECT << 16;
4436                 cmd_free(h, c);
4437                 cmd->scsi_done(cmd);
4438                 return 0;
4439         }
4440
4441         /*
4442          * Call alternate submit routine for I/O accelerated commands.
4443          * Retries always go down the normal I/O path.
4444          */
4445         if (likely(cmd->retries == 0 &&
4446                 cmd->request->cmd_type == REQ_TYPE_FS &&
4447                 h->acciopath_status)) {
4448
4449                 cmd->host_scribble = (unsigned char *) c;
4450
4451                 if (dev->offload_enabled) {
4452                         hpsa_cmd_init(h, c->cmdindex, c);
4453                         c->cmd_type = CMD_SCSI;
4454                         c->scsi_cmd = cmd;
4455                         rc = hpsa_scsi_ioaccel_raid_map(h, c);
4456                         if (rc == 0)
4457                                 return 0; /* Sent on ioaccel path */
4458                         if (rc < 0) {   /* scsi_dma_map failed. */
4459                                 cmd_free(h, c);
4460                                 return SCSI_MLQUEUE_HOST_BUSY;
4461                         }
4462                 } else if (dev->ioaccel_handle) {
4463                         hpsa_cmd_init(h, c->cmdindex, c);
4464                         c->cmd_type = CMD_SCSI;
4465                         c->scsi_cmd = cmd;
4466                         rc = hpsa_scsi_ioaccel_direct_map(h, c);
4467                         if (rc == 0)
4468                                 return 0; /* Sent on direct map path */
4469                         if (rc < 0) {   /* scsi_dma_map failed. */
4470                                 cmd_free(h, c);
4471                                 return SCSI_MLQUEUE_HOST_BUSY;
4472                         }
4473                 }
4474         }
4475         return hpsa_ciss_submit(h, c, cmd, scsi3addr);
4476 }
4477
4478 static void hpsa_scan_complete(struct ctlr_info *h)
4479 {
4480         unsigned long flags;
4481
4482         spin_lock_irqsave(&h->scan_lock, flags);
4483         h->scan_finished = 1;
4484         wake_up_all(&h->scan_wait_queue);
4485         spin_unlock_irqrestore(&h->scan_lock, flags);
4486 }
4487
4488 static void hpsa_scan_start(struct Scsi_Host *sh)
4489 {
4490         struct ctlr_info *h = shost_to_hba(sh);
4491         unsigned long flags;
4492
4493         /*
4494          * Don't let rescans be initiated on a controller known to be locked
4495          * up.  If the controller locks up *during* a rescan, that thread is
4496          * probably hosed, but at least we can prevent new rescan threads from
4497          * piling up on a locked up controller.
4498          */
4499         if (unlikely(lockup_detected(h)))
4500                 return hpsa_scan_complete(h);
4501
4502         /* wait until any scan already in progress is finished. */
4503         while (1) {
4504                 spin_lock_irqsave(&h->scan_lock, flags);
4505                 if (h->scan_finished)
4506                         break;
4507                 spin_unlock_irqrestore(&h->scan_lock, flags);
4508                 wait_event(h->scan_wait_queue, h->scan_finished);
4509                 /* Note: We don't need to worry about a race between this
4510                  * thread and driver unload because the midlayer will
4511                  * have incremented the reference count, so unload won't
4512                  * happen if we're in here.
4513                  */
4514         }
4515         h->scan_finished = 0; /* mark scan as in progress */
4516         spin_unlock_irqrestore(&h->scan_lock, flags);
4517
4518         if (unlikely(lockup_detected(h)))
4519                 return hpsa_scan_complete(h);
4520
4521         hpsa_update_scsi_devices(h, h->scsi_host->host_no);
4522
4523         hpsa_scan_complete(h);
4524 }
4525
4526 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth)
4527 {
4528         struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata;
4529
4530         if (!logical_drive)
4531                 return -ENODEV;
4532
4533         if (qdepth < 1)
4534                 qdepth = 1;
4535         else if (qdepth > logical_drive->queue_depth)
4536                 qdepth = logical_drive->queue_depth;
4537
4538         return scsi_change_queue_depth(sdev, qdepth);
4539 }
4540
4541 static int hpsa_scan_finished(struct Scsi_Host *sh,
4542         unsigned long elapsed_time)
4543 {
4544         struct ctlr_info *h = shost_to_hba(sh);
4545         unsigned long flags;
4546         int finished;
4547
4548         spin_lock_irqsave(&h->scan_lock, flags);
4549         finished = h->scan_finished;
4550         spin_unlock_irqrestore(&h->scan_lock, flags);
4551         return finished;
4552 }
4553
4554 static void hpsa_unregister_scsi(struct ctlr_info *h)
4555 {
4556         /* we are being forcibly unloaded, and may not refuse. */
4557         scsi_remove_host(h->scsi_host);
4558         scsi_host_put(h->scsi_host);
4559         h->scsi_host = NULL;
4560 }
4561
4562 static int hpsa_register_scsi(struct ctlr_info *h)
4563 {
4564         struct Scsi_Host *sh;
4565         int error;
4566
4567         sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
4568         if (sh == NULL)
4569                 goto fail;
4570
4571         sh->io_port = 0;
4572         sh->n_io_port = 0;
4573         sh->this_id = -1;
4574         sh->max_channel = 3;
4575         sh->max_cmd_len = MAX_COMMAND_SIZE;
4576         sh->max_lun = HPSA_MAX_LUN;
4577         sh->max_id = HPSA_MAX_LUN;
4578         sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS;
4579         sh->cmd_per_lun = sh->can_queue;
4580         sh->sg_tablesize = h->maxsgentries;
4581         h->scsi_host = sh;
4582         sh->hostdata[0] = (unsigned long) h;
4583         sh->irq = h->intr[h->intr_mode];
4584         sh->unique_id = sh->irq;
4585         error = scsi_add_host(sh, &h->pdev->dev);
4586         if (error)
4587                 goto fail_host_put;
4588         scsi_scan_host(sh);
4589         return 0;
4590
4591  fail_host_put:
4592         dev_err(&h->pdev->dev, "%s: scsi_add_host"
4593                 " failed for controller %d\n", __func__, h->ctlr);
4594         scsi_host_put(sh);
4595         return error;
4596  fail:
4597         dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
4598                 " failed for controller %d\n", __func__, h->ctlr);
4599         return -ENOMEM;
4600 }
4601
4602 static int wait_for_device_to_become_ready(struct ctlr_info *h,
4603         unsigned char lunaddr[])
4604 {
4605         int rc;
4606         int count = 0;
4607         int waittime = 1; /* seconds */
4608         struct CommandList *c;
4609
4610         c = cmd_alloc(h);
4611         if (!c) {
4612                 dev_warn(&h->pdev->dev, "out of memory in "
4613                         "wait_for_device_to_become_ready.\n");
4614                 return IO_ERROR;
4615         }
4616
4617         /* Send test unit ready until device ready, or give up. */
4618         while (count < HPSA_TUR_RETRY_LIMIT) {
4619
4620                 /* Wait for a bit.  do this first, because if we send
4621                  * the TUR right away, the reset will just abort it.
4622                  */
4623                 msleep(1000 * waittime);
4624                 count++;
4625                 rc = 0; /* Device ready. */
4626
4627                 /* Increase wait time with each try, up to a point. */
4628                 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
4629                         waittime = waittime * 2;
4630
4631                 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
4632                 (void) fill_cmd(c, TEST_UNIT_READY, h,
4633                                 NULL, 0, 0, lunaddr, TYPE_CMD);
4634                 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE,
4635                                                 NO_TIMEOUT);
4636                 if (rc)
4637                         goto do_it_again;
4638                 /* no unmap needed here because no data xfer. */
4639
4640                 if (c->err_info->CommandStatus == CMD_SUCCESS)
4641                         break;
4642
4643                 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
4644                         c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
4645                         (c->err_info->SenseInfo[2] == NO_SENSE ||
4646                         c->err_info->SenseInfo[2] == UNIT_ATTENTION))
4647                         break;
4648 do_it_again:
4649                 dev_warn(&h->pdev->dev, "waiting %d secs "
4650                         "for device to become ready.\n", waittime);
4651                 rc = 1; /* device not ready. */
4652         }
4653
4654         if (rc)
4655                 dev_warn(&h->pdev->dev, "giving up on device.\n");
4656         else
4657                 dev_warn(&h->pdev->dev, "device is ready.\n");
4658
4659         cmd_free(h, c);
4660         return rc;
4661 }
4662
4663 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
4664  * complaining.  Doing a host- or bus-reset can't do anything good here.
4665  */
4666 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
4667 {
4668         int rc;
4669         struct ctlr_info *h;
4670         struct hpsa_scsi_dev_t *dev;
4671
4672         /* find the controller to which the command to be aborted was sent */
4673         h = sdev_to_hba(scsicmd->device);
4674         if (h == NULL) /* paranoia */
4675                 return FAILED;
4676
4677         if (lockup_detected(h))
4678                 return FAILED;
4679
4680         dev = scsicmd->device->hostdata;
4681         if (!dev) {
4682                 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
4683                         "device lookup failed.\n");
4684                 return FAILED;
4685         }
4686
4687         /* if controller locked up, we can guarantee command won't complete */
4688         if (lockup_detected(h)) {
4689                 dev_warn(&h->pdev->dev,
4690                         "scsi %d:%d:%d:%d RESET FAILED, lockup detected\n",
4691                         h->scsi_host->host_no, dev->bus, dev->target,
4692                         dev->lun);
4693                 return FAILED;
4694         }
4695
4696         /* this reset request might be the result of a lockup; check */
4697         if (detect_controller_lockup(h)) {
4698                 dev_warn(&h->pdev->dev,
4699                          "scsi %d:%d:%d:%d RESET FAILED, new lockup detected\n",
4700                          h->scsi_host->host_no, dev->bus, dev->target,
4701                          dev->lun);
4702                 return FAILED;
4703         }
4704
4705         hpsa_show_dev_msg(KERN_WARNING, h, dev, "resetting");
4706
4707         /* send a reset to the SCSI LUN which the command was sent to */
4708         rc = hpsa_send_reset(h, dev->scsi3addr, HPSA_RESET_TYPE_LUN,
4709                              DEFAULT_REPLY_QUEUE);
4710         if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
4711                 return SUCCESS;
4712
4713         dev_warn(&h->pdev->dev,
4714                 "scsi %d:%d:%d:%d reset failed\n",
4715                 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
4716         return FAILED;
4717 }
4718
4719 static void swizzle_abort_tag(u8 *tag)
4720 {
4721         u8 original_tag[8];
4722
4723         memcpy(original_tag, tag, 8);
4724         tag[0] = original_tag[3];
4725         tag[1] = original_tag[2];
4726         tag[2] = original_tag[1];
4727         tag[3] = original_tag[0];
4728         tag[4] = original_tag[7];
4729         tag[5] = original_tag[6];
4730         tag[6] = original_tag[5];
4731         tag[7] = original_tag[4];
4732 }
4733
4734 static void hpsa_get_tag(struct ctlr_info *h,
4735         struct CommandList *c, __le32 *taglower, __le32 *tagupper)
4736 {
4737         u64 tag;
4738         if (c->cmd_type == CMD_IOACCEL1) {
4739                 struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *)
4740                         &h->ioaccel_cmd_pool[c->cmdindex];
4741                 tag = le64_to_cpu(cm1->tag);
4742                 *tagupper = cpu_to_le32(tag >> 32);
4743                 *taglower = cpu_to_le32(tag);
4744                 return;
4745         }
4746         if (c->cmd_type == CMD_IOACCEL2) {
4747                 struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *)
4748                         &h->ioaccel2_cmd_pool[c->cmdindex];
4749                 /* upper tag not used in ioaccel2 mode */
4750                 memset(tagupper, 0, sizeof(*tagupper));
4751                 *taglower = cm2->Tag;
4752                 return;
4753         }
4754         tag = le64_to_cpu(c->Header.tag);
4755         *tagupper = cpu_to_le32(tag >> 32);
4756         *taglower = cpu_to_le32(tag);
4757 }
4758
4759 static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
4760         struct CommandList *abort, int reply_queue)
4761 {
4762         int rc = IO_OK;
4763         struct CommandList *c;
4764         struct ErrorInfo *ei;
4765         __le32 tagupper, taglower;
4766
4767         c = cmd_alloc(h);
4768         if (c == NULL) {        /* trouble... */
4769                 dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
4770                 return -ENOMEM;
4771         }
4772
4773         /* fill_cmd can't fail here, no buffer to map */
4774         (void) fill_cmd(c, HPSA_ABORT_MSG, h, &abort->Header.tag,
4775                 0, 0, scsi3addr, TYPE_MSG);
4776         if (h->needs_abort_tags_swizzled)
4777                 swizzle_abort_tag(&c->Request.CDB[4]);
4778         (void) hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT);
4779         hpsa_get_tag(h, abort, &taglower, &tagupper);
4780         dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd(abort) completed.\n",
4781                 __func__, tagupper, taglower);
4782         /* no unmap needed here because no data xfer. */
4783
4784         ei = c->err_info;
4785         switch (ei->CommandStatus) {
4786         case CMD_SUCCESS:
4787                 break;
4788         case CMD_TMF_STATUS:
4789                 rc = hpsa_evaluate_tmf_status(h, c);
4790                 break;
4791         case CMD_UNABORTABLE: /* Very common, don't make noise. */
4792                 rc = -1;
4793                 break;
4794         default:
4795                 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
4796                         __func__, tagupper, taglower);
4797                 hpsa_scsi_interpret_error(h, c);
4798                 rc = -1;
4799                 break;
4800         }
4801         cmd_free(h, c);
4802         dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n",
4803                 __func__, tagupper, taglower);
4804         return rc;
4805 }
4806
4807 /* ioaccel2 path firmware cannot handle abort task requests.
4808  * Change abort requests to physical target reset, and send to the
4809  * address of the physical disk used for the ioaccel 2 command.
4810  * Return 0 on success (IO_OK)
4811  *       -1 on failure
4812  */
4813
4814 static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h,
4815         unsigned char *scsi3addr, struct CommandList *abort, int reply_queue)
4816 {
4817         int rc = IO_OK;
4818         struct scsi_cmnd *scmd; /* scsi command within request being aborted */
4819         struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */
4820         unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */
4821         unsigned char *psa = &phys_scsi3addr[0];
4822
4823         /* Get a pointer to the hpsa logical device. */
4824         scmd = abort->scsi_cmd;
4825         dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata);
4826         if (dev == NULL) {
4827                 dev_warn(&h->pdev->dev,
4828                         "Cannot abort: no device pointer for command.\n");
4829                         return -1; /* not abortable */
4830         }
4831
4832         if (h->raid_offload_debug > 0)
4833                 dev_info(&h->pdev->dev,
4834                         "scsi %d:%d:%d:%d %s scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4835                         h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
4836                         "Reset as abort",
4837                         scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3],
4838                         scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]);
4839
4840         if (!dev->offload_enabled) {
4841                 dev_warn(&h->pdev->dev,
4842                         "Can't abort: device is not operating in HP SSD Smart Path mode.\n");
4843                 return -1; /* not abortable */
4844         }
4845
4846         /* Incoming scsi3addr is logical addr. We need physical disk addr. */
4847         if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) {
4848                 dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n");
4849                 return -1; /* not abortable */
4850         }
4851
4852         /* send the reset */
4853         if (h->raid_offload_debug > 0)
4854                 dev_info(&h->pdev->dev,
4855                         "Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4856                         psa[0], psa[1], psa[2], psa[3],
4857                         psa[4], psa[5], psa[6], psa[7]);
4858         rc = hpsa_send_reset(h, psa, HPSA_RESET_TYPE_TARGET, reply_queue);
4859         if (rc != 0) {
4860                 dev_warn(&h->pdev->dev,
4861                         "Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4862                         psa[0], psa[1], psa[2], psa[3],
4863                         psa[4], psa[5], psa[6], psa[7]);
4864                 return rc; /* failed to reset */
4865         }
4866
4867         /* wait for device to recover */
4868         if (wait_for_device_to_become_ready(h, psa) != 0) {
4869                 dev_warn(&h->pdev->dev,
4870                         "Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4871                         psa[0], psa[1], psa[2], psa[3],
4872                         psa[4], psa[5], psa[6], psa[7]);
4873                 return -1;  /* failed to recover */
4874         }
4875
4876         /* device recovered */
4877         dev_info(&h->pdev->dev,
4878                 "Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4879                 psa[0], psa[1], psa[2], psa[3],
4880                 psa[4], psa[5], psa[6], psa[7]);
4881
4882         return rc; /* success */
4883 }
4884
4885 static int hpsa_send_abort_both_ways(struct ctlr_info *h,
4886         unsigned char *scsi3addr, struct CommandList *abort, int reply_queue)
4887 {
4888         /* ioccelerator mode 2 commands should be aborted via the
4889          * accelerated path, since RAID path is unaware of these commands,
4890          * but underlying firmware can't handle abort TMF.
4891          * Change abort to physical device reset.
4892          */
4893         if (abort->cmd_type == CMD_IOACCEL2)
4894                 return hpsa_send_reset_as_abort_ioaccel2(h, scsi3addr,
4895                                                         abort, reply_queue);
4896         return hpsa_send_abort(h, scsi3addr, abort, reply_queue);
4897 }
4898
4899 /* Find out which reply queue a command was meant to return on */
4900 static int hpsa_extract_reply_queue(struct ctlr_info *h,
4901                                         struct CommandList *c)
4902 {
4903         if (c->cmd_type == CMD_IOACCEL2)
4904                 return h->ioaccel2_cmd_pool[c->cmdindex].reply_queue;
4905         return c->Header.ReplyQueue;
4906 }
4907
4908 /*
4909  * Limit concurrency of abort commands to prevent
4910  * over-subscription of commands
4911  */
4912 static inline int wait_for_available_abort_cmd(struct ctlr_info *h)
4913 {
4914 #define ABORT_CMD_WAIT_MSECS 5000
4915         return !wait_event_timeout(h->abort_cmd_wait_queue,
4916                         atomic_dec_if_positive(&h->abort_cmds_available) >= 0,
4917                         msecs_to_jiffies(ABORT_CMD_WAIT_MSECS));
4918 }
4919
4920 /* Send an abort for the specified command.
4921  *      If the device and controller support it,
4922  *              send a task abort request.
4923  */
4924 static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
4925 {
4926
4927         int i, rc;
4928         struct ctlr_info *h;
4929         struct hpsa_scsi_dev_t *dev;
4930         struct CommandList *abort; /* pointer to command to be aborted */
4931         struct scsi_cmnd *as;   /* ptr to scsi cmd inside aborted command. */
4932         char msg[256];          /* For debug messaging. */
4933         int ml = 0;
4934         __le32 tagupper, taglower;
4935         int refcount, reply_queue;
4936
4937         if (sc == NULL)
4938                 return FAILED;
4939
4940         if (sc->device == NULL)
4941                 return FAILED;
4942
4943         /* Find the controller of the command to be aborted */
4944         h = sdev_to_hba(sc->device);
4945         if (h == NULL)
4946                 return FAILED;
4947
4948         /* Find the device of the command to be aborted */
4949         dev = sc->device->hostdata;
4950         if (!dev) {
4951                 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
4952                                 msg);
4953                 return FAILED;
4954         }
4955
4956         /* If controller locked up, we can guarantee command won't complete */
4957         if (lockup_detected(h)) {
4958                 hpsa_show_dev_msg(KERN_WARNING, h, dev,
4959                                         "ABORT FAILED, lockup detected");
4960                 return FAILED;
4961         }
4962
4963         /* This is a good time to check if controller lockup has occurred */
4964         if (detect_controller_lockup(h)) {
4965                 hpsa_show_dev_msg(KERN_WARNING, h, dev,
4966                                         "ABORT FAILED, new lockup detected");
4967                 return FAILED;
4968         }
4969
4970         /* Check that controller supports some kind of task abort */
4971         if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
4972                 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
4973                 return FAILED;
4974
4975         memset(msg, 0, sizeof(msg));
4976         ml += sprintf(msg+ml, "scsi %d:%d:%d:%llu %s",
4977                 h->scsi_host->host_no, sc->device->channel,
4978                 sc->device->id, sc->device->lun,
4979                 "Aborting command");
4980
4981         /* Get SCSI command to be aborted */
4982         abort = (struct CommandList *) sc->host_scribble;
4983         if (abort == NULL) {
4984                 /* This can happen if the command already completed. */
4985                 return SUCCESS;
4986         }
4987         refcount = atomic_inc_return(&abort->refcount);
4988         if (refcount == 1) { /* Command is done already. */
4989                 cmd_free(h, abort);
4990                 return SUCCESS;
4991         }
4992
4993         /* Don't bother trying the abort if we know it won't work. */
4994         if (abort->cmd_type != CMD_IOACCEL2 &&
4995                 abort->cmd_type != CMD_IOACCEL1 && !dev->supports_aborts) {
4996                 cmd_free(h, abort);
4997                 return FAILED;
4998         }
4999
5000         hpsa_get_tag(h, abort, &taglower, &tagupper);
5001         reply_queue = hpsa_extract_reply_queue(h, abort);
5002         ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower);
5003         as  = abort->scsi_cmd;
5004         if (as != NULL)
5005                 ml += sprintf(msg+ml, "Command:0x%x SN:0x%lx ",
5006                         as->cmnd[0], as->serial_number);
5007         dev_dbg(&h->pdev->dev, "%s\n", msg);
5008         hpsa_show_dev_msg(KERN_WARNING, h, dev, "Aborting command");
5009         /*
5010          * Command is in flight, or possibly already completed
5011          * by the firmware (but not to the scsi mid layer) but we can't
5012          * distinguish which.  Send the abort down.
5013          */
5014         if (wait_for_available_abort_cmd(h)) {
5015                 dev_warn(&h->pdev->dev,
5016                         "Timed out waiting for an abort command to become available.\n");
5017                 cmd_free(h, abort);
5018                 return FAILED;
5019         }
5020         rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort, reply_queue);
5021         atomic_inc(&h->abort_cmds_available);
5022         wake_up_all(&h->abort_cmd_wait_queue);
5023         if (rc != 0) {
5024                 hpsa_show_dev_msg(KERN_WARNING, h, dev,
5025                                         "FAILED to abort command");
5026                 cmd_free(h, abort);
5027                 return FAILED;
5028         }
5029         dev_info(&h->pdev->dev, "%s REQUEST SUCCEEDED.\n", msg);
5030
5031         /* If the abort(s) above completed and actually aborted the
5032          * command, then the command to be aborted should already be
5033          * completed.  If not, wait around a bit more to see if they
5034          * manage to complete normally.
5035          */
5036 #define ABORT_COMPLETE_WAIT_SECS 30
5037         for (i = 0; i < ABORT_COMPLETE_WAIT_SECS * 10; i++) {
5038                 refcount = atomic_read(&abort->refcount);
5039                 if (refcount < 2) {
5040                         cmd_free(h, abort);
5041                         return SUCCESS;
5042                 } else {
5043                         msleep(100);
5044                 }
5045         }
5046         dev_warn(&h->pdev->dev, "%s FAILED. Aborted command has not completed after %d seconds.\n",
5047                 msg, ABORT_COMPLETE_WAIT_SECS);
5048         cmd_free(h, abort);
5049         return FAILED;
5050 }
5051
5052 /*
5053  * For operations that cannot sleep, a command block is allocated at init,
5054  * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
5055  * which ones are free or in use.  Lock must be held when calling this.
5056  * cmd_free() is the complement.
5057  */
5058
5059 static struct CommandList *cmd_alloc(struct ctlr_info *h)
5060 {
5061         struct CommandList *c;
5062         int refcount, i;
5063         unsigned long offset;
5064
5065         /*
5066          * There is some *extremely* small but non-zero chance that that
5067          * multiple threads could get in here, and one thread could
5068          * be scanning through the list of bits looking for a free
5069          * one, but the free ones are always behind him, and other
5070          * threads sneak in behind him and eat them before he can
5071          * get to them, so that while there is always a free one, a
5072          * very unlucky thread might be starved anyway, never able to
5073          * beat the other threads.  In reality, this happens so
5074          * infrequently as to be indistinguishable from never.
5075          */
5076
5077         offset = h->last_allocation; /* benignly racy */
5078         for (;;) {
5079                 i = find_next_zero_bit(h->cmd_pool_bits, h->nr_cmds, offset);
5080                 if (unlikely(i == h->nr_cmds)) {
5081                         offset = 0;
5082                         continue;
5083                 }
5084                 c = h->cmd_pool + i;
5085                 refcount = atomic_inc_return(&c->refcount);
5086                 if (unlikely(refcount > 1)) {
5087                         cmd_free(h, c); /* already in use */
5088                         offset = (i + 1) % h->nr_cmds;
5089                         continue;
5090                 }
5091                 set_bit(i & (BITS_PER_LONG - 1),
5092                         h->cmd_pool_bits + (i / BITS_PER_LONG));
5093                 break; /* it's ours now. */
5094         }
5095         h->last_allocation = i; /* benignly racy */
5096         hpsa_cmd_partial_init(h, i, c);
5097         return c;
5098 }
5099
5100 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
5101 {
5102         if (atomic_dec_and_test(&c->refcount)) {
5103                 int i;
5104
5105                 i = c - h->cmd_pool;
5106                 clear_bit(i & (BITS_PER_LONG - 1),
5107                           h->cmd_pool_bits + (i / BITS_PER_LONG));
5108         }
5109 }
5110
5111 #ifdef CONFIG_COMPAT
5112
5113 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd,
5114         void __user *arg)
5115 {
5116         IOCTL32_Command_struct __user *arg32 =
5117             (IOCTL32_Command_struct __user *) arg;
5118         IOCTL_Command_struct arg64;
5119         IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
5120         int err;
5121         u32 cp;
5122
5123         memset(&arg64, 0, sizeof(arg64));
5124         err = 0;
5125         err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
5126                            sizeof(arg64.LUN_info));
5127         err |= copy_from_user(&arg64.Request, &arg32->Request,
5128                            sizeof(arg64.Request));
5129         err |= copy_from_user(&arg64.error_info, &arg32->error_info,
5130                            sizeof(arg64.error_info));
5131         err |= get_user(arg64.buf_size, &arg32->buf_size);
5132         err |= get_user(cp, &arg32->buf);
5133         arg64.buf = compat_ptr(cp);
5134         err |= copy_to_user(p, &arg64, sizeof(arg64));
5135
5136         if (err)
5137                 return -EFAULT;
5138
5139         err = hpsa_ioctl(dev, CCISS_PASSTHRU, p);
5140         if (err)
5141                 return err;
5142         err |= copy_in_user(&arg32->error_info, &p->error_info,
5143                          sizeof(arg32->error_info));
5144         if (err)
5145                 return -EFAULT;
5146         return err;
5147 }
5148
5149 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
5150         int cmd, void __user *arg)
5151 {
5152         BIG_IOCTL32_Command_struct __user *arg32 =
5153             (BIG_IOCTL32_Command_struct __user *) arg;
5154         BIG_IOCTL_Command_struct arg64;
5155         BIG_IOCTL_Command_struct __user *p =
5156             compat_alloc_user_space(sizeof(arg64));
5157         int err;
5158         u32 cp;
5159
5160         memset(&arg64, 0, sizeof(arg64));
5161         err = 0;
5162         err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
5163                            sizeof(arg64.LUN_info));
5164         err |= copy_from_user(&arg64.Request, &arg32->Request,
5165                            sizeof(arg64.Request));
5166         err |= copy_from_user(&arg64.error_info, &arg32->error_info,
5167                            sizeof(arg64.error_info));
5168         err |= get_user(arg64.buf_size, &arg32->buf_size);
5169         err |= get_user(arg64.malloc_size, &arg32->malloc_size);
5170         err |= get_user(cp, &arg32->buf);
5171         arg64.buf = compat_ptr(cp);
5172         err |= copy_to_user(p, &arg64, sizeof(arg64));
5173
5174         if (err)
5175                 return -EFAULT;
5176
5177         err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p);
5178         if (err)
5179                 return err;
5180         err |= copy_in_user(&arg32->error_info, &p->error_info,
5181                          sizeof(arg32->error_info));
5182         if (err)
5183                 return -EFAULT;
5184         return err;
5185 }
5186
5187 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
5188 {
5189         switch (cmd) {
5190         case CCISS_GETPCIINFO:
5191         case CCISS_GETINTINFO:
5192         case CCISS_SETINTINFO:
5193         case CCISS_GETNODENAME:
5194         case CCISS_SETNODENAME:
5195         case CCISS_GETHEARTBEAT:
5196         case CCISS_GETBUSTYPES:
5197         case CCISS_GETFIRMVER:
5198         case CCISS_GETDRIVVER:
5199         case CCISS_REVALIDVOLS:
5200         case CCISS_DEREGDISK:
5201         case CCISS_REGNEWDISK:
5202         case CCISS_REGNEWD:
5203         case CCISS_RESCANDISK:
5204         case CCISS_GETLUNINFO:
5205                 return hpsa_ioctl(dev, cmd, arg);
5206
5207         case CCISS_PASSTHRU32:
5208                 return hpsa_ioctl32_passthru(dev, cmd, arg);
5209         case CCISS_BIG_PASSTHRU32:
5210                 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
5211
5212         default:
5213                 return -ENOIOCTLCMD;
5214         }
5215 }
5216 #endif
5217
5218 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
5219 {
5220         struct hpsa_pci_info pciinfo;
5221
5222         if (!argp)
5223                 return -EINVAL;
5224         pciinfo.domain = pci_domain_nr(h->pdev->bus);
5225         pciinfo.bus = h->pdev->bus->number;
5226         pciinfo.dev_fn = h->pdev->devfn;
5227         pciinfo.board_id = h->board_id;
5228         if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
5229                 return -EFAULT;
5230         return 0;
5231 }
5232
5233 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
5234 {
5235         DriverVer_type DriverVer;
5236         unsigned char vmaj, vmin, vsubmin;
5237         int rc;
5238
5239         rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
5240                 &vmaj, &vmin, &vsubmin);
5241         if (rc != 3) {
5242                 dev_info(&h->pdev->dev, "driver version string '%s' "
5243                         "unrecognized.", HPSA_DRIVER_VERSION);
5244                 vmaj = 0;
5245                 vmin = 0;
5246                 vsubmin = 0;
5247         }
5248         DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
5249         if (!argp)
5250                 return -EINVAL;
5251         if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
5252                 return -EFAULT;
5253         return 0;
5254 }
5255
5256 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
5257 {
5258         IOCTL_Command_struct iocommand;
5259         struct CommandList *c;
5260         char *buff = NULL;
5261         u64 temp64;
5262         int rc = 0;
5263
5264         if (!argp)
5265                 return -EINVAL;
5266         if (!capable(CAP_SYS_RAWIO))
5267                 return -EPERM;
5268         if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
5269                 return -EFAULT;
5270         if ((iocommand.buf_size < 1) &&
5271             (iocommand.Request.Type.Direction != XFER_NONE)) {
5272                 return -EINVAL;
5273         }
5274         if (iocommand.buf_size > 0) {
5275                 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
5276                 if (buff == NULL)
5277                         return -EFAULT;
5278                 if (iocommand.Request.Type.Direction & XFER_WRITE) {
5279                         /* Copy the data into the buffer we created */
5280                         if (copy_from_user(buff, iocommand.buf,
5281                                 iocommand.buf_size)) {
5282                                 rc = -EFAULT;
5283                                 goto out_kfree;
5284                         }
5285                 } else {
5286                         memset(buff, 0, iocommand.buf_size);
5287                 }
5288         }
5289         c = cmd_alloc(h);
5290         if (c == NULL) {
5291                 rc = -ENOMEM;
5292                 goto out_kfree;
5293         }
5294         /* Fill in the command type */
5295         c->cmd_type = CMD_IOCTL_PEND;
5296         /* Fill in Command Header */
5297         c->Header.ReplyQueue = 0; /* unused in simple mode */
5298         if (iocommand.buf_size > 0) {   /* buffer to fill */
5299                 c->Header.SGList = 1;
5300                 c->Header.SGTotal = cpu_to_le16(1);
5301         } else  { /* no buffers to fill */
5302                 c->Header.SGList = 0;
5303                 c->Header.SGTotal = cpu_to_le16(0);
5304         }
5305         memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
5306
5307         /* Fill in Request block */
5308         memcpy(&c->Request, &iocommand.Request,
5309                 sizeof(c->Request));
5310
5311         /* Fill in the scatter gather information */
5312         if (iocommand.buf_size > 0) {
5313                 temp64 = pci_map_single(h->pdev, buff,
5314                         iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
5315                 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
5316                         c->SG[0].Addr = cpu_to_le64(0);
5317                         c->SG[0].Len = cpu_to_le32(0);
5318                         rc = -ENOMEM;
5319                         goto out;
5320                 }
5321                 c->SG[0].Addr = cpu_to_le64(temp64);
5322                 c->SG[0].Len = cpu_to_le32(iocommand.buf_size);
5323                 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
5324         }
5325         rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
5326         if (iocommand.buf_size > 0)
5327                 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
5328         check_ioctl_unit_attention(h, c);
5329         if (rc) {
5330                 rc = -EIO;
5331                 goto out;
5332         }
5333
5334         /* Copy the error information out */
5335         memcpy(&iocommand.error_info, c->err_info,
5336                 sizeof(iocommand.error_info));
5337         if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
5338                 rc = -EFAULT;
5339                 goto out;
5340         }
5341         if ((iocommand.Request.Type.Direction & XFER_READ) &&
5342                 iocommand.buf_size > 0) {
5343                 /* Copy the data out of the buffer we created */
5344                 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
5345                         rc = -EFAULT;
5346                         goto out;
5347                 }
5348         }
5349 out:
5350         cmd_free(h, c);
5351 out_kfree:
5352         kfree(buff);
5353         return rc;
5354 }
5355
5356 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
5357 {
5358         BIG_IOCTL_Command_struct *ioc;
5359         struct CommandList *c;
5360         unsigned char **buff = NULL;
5361         int *buff_size = NULL;
5362         u64 temp64;
5363         BYTE sg_used = 0;
5364         int status = 0;
5365         u32 left;
5366         u32 sz;
5367         BYTE __user *data_ptr;
5368
5369         if (!argp)
5370                 return -EINVAL;
5371         if (!capable(CAP_SYS_RAWIO))
5372                 return -EPERM;
5373         ioc = (BIG_IOCTL_Command_struct *)
5374             kmalloc(sizeof(*ioc), GFP_KERNEL);
5375         if (!ioc) {
5376                 status = -ENOMEM;
5377                 goto cleanup1;
5378         }
5379         if (copy_from_user(ioc, argp, sizeof(*ioc))) {
5380                 status = -EFAULT;
5381                 goto cleanup1;
5382         }
5383         if ((ioc->buf_size < 1) &&
5384             (ioc->Request.Type.Direction != XFER_NONE)) {
5385                 status = -EINVAL;
5386                 goto cleanup1;
5387         }
5388         /* Check kmalloc limits  using all SGs */
5389         if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
5390                 status = -EINVAL;
5391                 goto cleanup1;
5392         }
5393         if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
5394                 status = -EINVAL;
5395                 goto cleanup1;
5396         }
5397         buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
5398         if (!buff) {
5399                 status = -ENOMEM;
5400                 goto cleanup1;
5401         }
5402         buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
5403         if (!buff_size) {
5404                 status = -ENOMEM;
5405                 goto cleanup1;
5406         }
5407         left = ioc->buf_size;
5408         data_ptr = ioc->buf;
5409         while (left) {
5410                 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
5411                 buff_size[sg_used] = sz;
5412                 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
5413                 if (buff[sg_used] == NULL) {
5414                         status = -ENOMEM;
5415                         goto cleanup1;
5416                 }
5417                 if (ioc->Request.Type.Direction & XFER_WRITE) {
5418                         if (copy_from_user(buff[sg_used], data_ptr, sz)) {
5419                                 status = -EFAULT;
5420                                 goto cleanup1;
5421                         }
5422                 } else
5423                         memset(buff[sg_used], 0, sz);
5424                 left -= sz;
5425                 data_ptr += sz;
5426                 sg_used++;
5427         }
5428         c = cmd_alloc(h);
5429         if (c == NULL) {
5430                 status = -ENOMEM;
5431                 goto cleanup1;
5432         }
5433         c->cmd_type = CMD_IOCTL_PEND;
5434         c->Header.ReplyQueue = 0;
5435         c->Header.SGList = (u8) sg_used;
5436         c->Header.SGTotal = cpu_to_le16(sg_used);
5437         memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
5438         memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
5439         if (ioc->buf_size > 0) {
5440                 int i;
5441                 for (i = 0; i < sg_used; i++) {
5442                         temp64 = pci_map_single(h->pdev, buff[i],
5443                                     buff_size[i], PCI_DMA_BIDIRECTIONAL);
5444                         if (dma_mapping_error(&h->pdev->dev,
5445                                                         (dma_addr_t) temp64)) {
5446                                 c->SG[i].Addr = cpu_to_le64(0);
5447                                 c->SG[i].Len = cpu_to_le32(0);
5448                                 hpsa_pci_unmap(h->pdev, c, i,
5449                                         PCI_DMA_BIDIRECTIONAL);
5450                                 status = -ENOMEM;
5451                                 goto cleanup0;
5452                         }
5453                         c->SG[i].Addr = cpu_to_le64(temp64);
5454                         c->SG[i].Len = cpu_to_le32(buff_size[i]);
5455                         c->SG[i].Ext = cpu_to_le32(0);
5456                 }
5457                 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
5458         }
5459         status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, NO_TIMEOUT);
5460         if (sg_used)
5461                 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
5462         check_ioctl_unit_attention(h, c);
5463         if (status) {
5464                 status = -EIO;
5465                 goto cleanup0;
5466         }
5467
5468         /* Copy the error information out */
5469         memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
5470         if (copy_to_user(argp, ioc, sizeof(*ioc))) {
5471                 status = -EFAULT;
5472                 goto cleanup0;
5473         }
5474         if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
5475                 int i;
5476
5477                 /* Copy the data out of the buffer we created */
5478                 BYTE __user *ptr = ioc->buf;
5479                 for (i = 0; i < sg_used; i++) {
5480                         if (copy_to_user(ptr, buff[i], buff_size[i])) {
5481                                 status = -EFAULT;
5482                                 goto cleanup0;
5483                         }
5484                         ptr += buff_size[i];
5485                 }
5486         }
5487         status = 0;
5488 cleanup0:
5489         cmd_free(h, c);
5490 cleanup1:
5491         if (buff) {
5492                 int i;
5493
5494                 for (i = 0; i < sg_used; i++)
5495                         kfree(buff[i]);
5496                 kfree(buff);
5497         }
5498         kfree(buff_size);
5499         kfree(ioc);
5500         return status;
5501 }
5502
5503 static void check_ioctl_unit_attention(struct ctlr_info *h,
5504         struct CommandList *c)
5505 {
5506         if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5507                         c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
5508                 (void) check_for_unit_attention(h, c);
5509 }
5510
5511 /*
5512  * ioctl
5513  */
5514 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
5515 {
5516         struct ctlr_info *h;
5517         void __user *argp = (void __user *)arg;
5518         int rc;
5519
5520         h = sdev_to_hba(dev);
5521
5522         switch (cmd) {
5523         case CCISS_DEREGDISK:
5524         case CCISS_REGNEWDISK:
5525         case CCISS_REGNEWD:
5526                 hpsa_scan_start(h->scsi_host);
5527                 return 0;
5528         case CCISS_GETPCIINFO:
5529                 return hpsa_getpciinfo_ioctl(h, argp);
5530         case CCISS_GETDRIVVER:
5531                 return hpsa_getdrivver_ioctl(h, argp);
5532         case CCISS_PASSTHRU:
5533                 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
5534                         return -EAGAIN;
5535                 rc = hpsa_passthru_ioctl(h, argp);
5536                 atomic_inc(&h->passthru_cmds_avail);
5537                 return rc;
5538         case CCISS_BIG_PASSTHRU:
5539                 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0)
5540                         return -EAGAIN;
5541                 rc = hpsa_big_passthru_ioctl(h, argp);
5542                 atomic_inc(&h->passthru_cmds_avail);
5543                 return rc;
5544         default:
5545                 return -ENOTTY;
5546         }
5547 }
5548
5549 static int hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
5550                                 u8 reset_type)
5551 {
5552         struct CommandList *c;
5553
5554         c = cmd_alloc(h);
5555         if (!c)
5556                 return -ENOMEM;
5557         /* fill_cmd can't fail here, no data buffer to map */
5558         (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
5559                 RAID_CTLR_LUNID, TYPE_MSG);
5560         c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
5561         c->waiting = NULL;
5562         enqueue_cmd_and_start_io(h, c);
5563         /* Don't wait for completion, the reset won't complete.  Don't free
5564          * the command either.  This is the last command we will send before
5565          * re-initializing everything, so it doesn't matter and won't leak.
5566          */
5567         return 0;
5568 }
5569
5570 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
5571         void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
5572         int cmd_type)
5573 {
5574         int pci_dir = XFER_NONE;
5575         u64 tag; /* for commands to be aborted */
5576
5577         c->cmd_type = CMD_IOCTL_PEND;
5578         c->Header.ReplyQueue = 0;
5579         if (buff != NULL && size > 0) {
5580                 c->Header.SGList = 1;
5581                 c->Header.SGTotal = cpu_to_le16(1);
5582         } else {
5583                 c->Header.SGList = 0;
5584                 c->Header.SGTotal = cpu_to_le16(0);
5585         }
5586         memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
5587
5588         if (cmd_type == TYPE_CMD) {
5589                 switch (cmd) {
5590                 case HPSA_INQUIRY:
5591                         /* are we trying to read a vital product page */
5592                         if (page_code & VPD_PAGE) {
5593                                 c->Request.CDB[1] = 0x01;
5594                                 c->Request.CDB[2] = (page_code & 0xff);
5595                         }
5596                         c->Request.CDBLen = 6;
5597                         c->Request.type_attr_dir =
5598                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5599                         c->Request.Timeout = 0;
5600                         c->Request.CDB[0] = HPSA_INQUIRY;
5601                         c->Request.CDB[4] = size & 0xFF;
5602                         break;
5603                 case HPSA_REPORT_LOG:
5604                 case HPSA_REPORT_PHYS:
5605                         /* Talking to controller so It's a physical command
5606                            mode = 00 target = 0.  Nothing to write.
5607                          */
5608                         c->Request.CDBLen = 12;
5609                         c->Request.type_attr_dir =
5610                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5611                         c->Request.Timeout = 0;
5612                         c->Request.CDB[0] = cmd;
5613                         c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
5614                         c->Request.CDB[7] = (size >> 16) & 0xFF;
5615                         c->Request.CDB[8] = (size >> 8) & 0xFF;
5616                         c->Request.CDB[9] = size & 0xFF;
5617                         break;
5618                 case HPSA_CACHE_FLUSH:
5619                         c->Request.CDBLen = 12;
5620                         c->Request.type_attr_dir =
5621                                         TYPE_ATTR_DIR(cmd_type,
5622                                                 ATTR_SIMPLE, XFER_WRITE);
5623                         c->Request.Timeout = 0;
5624                         c->Request.CDB[0] = BMIC_WRITE;
5625                         c->Request.CDB[6] = BMIC_CACHE_FLUSH;
5626                         c->Request.CDB[7] = (size >> 8) & 0xFF;
5627                         c->Request.CDB[8] = size & 0xFF;
5628                         break;
5629                 case TEST_UNIT_READY:
5630                         c->Request.CDBLen = 6;
5631                         c->Request.type_attr_dir =
5632                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
5633                         c->Request.Timeout = 0;
5634                         break;
5635                 case HPSA_GET_RAID_MAP:
5636                         c->Request.CDBLen = 12;
5637                         c->Request.type_attr_dir =
5638                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5639                         c->Request.Timeout = 0;
5640                         c->Request.CDB[0] = HPSA_CISS_READ;
5641                         c->Request.CDB[1] = cmd;
5642                         c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
5643                         c->Request.CDB[7] = (size >> 16) & 0xFF;
5644                         c->Request.CDB[8] = (size >> 8) & 0xFF;
5645                         c->Request.CDB[9] = size & 0xFF;
5646                         break;
5647                 case BMIC_SENSE_CONTROLLER_PARAMETERS:
5648                         c->Request.CDBLen = 10;
5649                         c->Request.type_attr_dir =
5650                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5651                         c->Request.Timeout = 0;
5652                         c->Request.CDB[0] = BMIC_READ;
5653                         c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
5654                         c->Request.CDB[7] = (size >> 16) & 0xFF;
5655                         c->Request.CDB[8] = (size >> 8) & 0xFF;
5656                         break;
5657                 case BMIC_IDENTIFY_PHYSICAL_DEVICE:
5658                         c->Request.CDBLen = 10;
5659                         c->Request.type_attr_dir =
5660                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5661                         c->Request.Timeout = 0;
5662                         c->Request.CDB[0] = BMIC_READ;
5663                         c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE;
5664                         c->Request.CDB[7] = (size >> 16) & 0xFF;
5665                         c->Request.CDB[8] = (size >> 8) & 0XFF;
5666                         break;
5667                 default:
5668                         dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
5669                         BUG();
5670                         return -1;
5671                 }
5672         } else if (cmd_type == TYPE_MSG) {
5673                 switch (cmd) {
5674
5675                 case  HPSA_DEVICE_RESET_MSG:
5676                         c->Request.CDBLen = 16;
5677                         c->Request.type_attr_dir =
5678                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
5679                         c->Request.Timeout = 0; /* Don't time out */
5680                         memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
5681                         c->Request.CDB[0] =  cmd;
5682                         c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
5683                         /* If bytes 4-7 are zero, it means reset the */
5684                         /* LunID device */
5685                         c->Request.CDB[4] = 0x00;
5686                         c->Request.CDB[5] = 0x00;
5687                         c->Request.CDB[6] = 0x00;
5688                         c->Request.CDB[7] = 0x00;
5689                         break;
5690                 case  HPSA_ABORT_MSG:
5691                         memcpy(&tag, buff, sizeof(tag));
5692                         dev_dbg(&h->pdev->dev,
5693                                 "Abort Tag:0x%016llx using rqst Tag:0x%016llx",
5694                                 tag, c->Header.tag);
5695                         c->Request.CDBLen = 16;
5696                         c->Request.type_attr_dir =
5697                                         TYPE_ATTR_DIR(cmd_type,
5698                                                 ATTR_SIMPLE, XFER_WRITE);
5699                         c->Request.Timeout = 0; /* Don't time out */
5700                         c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
5701                         c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
5702                         c->Request.CDB[2] = 0x00; /* reserved */
5703                         c->Request.CDB[3] = 0x00; /* reserved */
5704                         /* Tag to abort goes in CDB[4]-CDB[11] */
5705                         memcpy(&c->Request.CDB[4], &tag, sizeof(tag));
5706                         c->Request.CDB[12] = 0x00; /* reserved */
5707                         c->Request.CDB[13] = 0x00; /* reserved */
5708                         c->Request.CDB[14] = 0x00; /* reserved */
5709                         c->Request.CDB[15] = 0x00; /* reserved */
5710                 break;
5711                 default:
5712                         dev_warn(&h->pdev->dev, "unknown message type %d\n",
5713                                 cmd);
5714                         BUG();
5715                 }
5716         } else {
5717                 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
5718                 BUG();
5719         }
5720
5721         switch (GET_DIR(c->Request.type_attr_dir)) {
5722         case XFER_READ:
5723                 pci_dir = PCI_DMA_FROMDEVICE;
5724                 break;
5725         case XFER_WRITE:
5726                 pci_dir = PCI_DMA_TODEVICE;
5727                 break;
5728         case XFER_NONE:
5729                 pci_dir = PCI_DMA_NONE;
5730                 break;
5731         default:
5732                 pci_dir = PCI_DMA_BIDIRECTIONAL;
5733         }
5734         if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
5735                 return -1;
5736         return 0;
5737 }
5738
5739 /*
5740  * Map (physical) PCI mem into (virtual) kernel space
5741  */
5742 static void __iomem *remap_pci_mem(ulong base, ulong size)
5743 {
5744         ulong page_base = ((ulong) base) & PAGE_MASK;
5745         ulong page_offs = ((ulong) base) - page_base;
5746         void __iomem *page_remapped = ioremap_nocache(page_base,
5747                 page_offs + size);
5748
5749         return page_remapped ? (page_remapped + page_offs) : NULL;
5750 }
5751
5752 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
5753 {
5754         return h->access.command_completed(h, q);
5755 }
5756
5757 static inline bool interrupt_pending(struct ctlr_info *h)
5758 {
5759         return h->access.intr_pending(h);
5760 }
5761
5762 static inline long interrupt_not_for_us(struct ctlr_info *h)
5763 {
5764         return (h->access.intr_pending(h) == 0) ||
5765                 (h->interrupts_enabled == 0);
5766 }
5767
5768 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
5769         u32 raw_tag)
5770 {
5771         if (unlikely(tag_index >= h->nr_cmds)) {
5772                 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
5773                 return 1;
5774         }
5775         return 0;
5776 }
5777
5778 static inline void finish_cmd(struct CommandList *c)
5779 {
5780         dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
5781         if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
5782                         || c->cmd_type == CMD_IOACCEL2))
5783                 complete_scsi_command(c);
5784         else if (c->cmd_type == CMD_IOCTL_PEND)
5785                 complete(c->waiting);
5786 }
5787
5788
5789 static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
5790 {
5791 #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
5792 #define HPSA_SIMPLE_ERROR_BITS 0x03
5793         if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
5794                 return tag & ~HPSA_SIMPLE_ERROR_BITS;
5795         return tag & ~HPSA_PERF_ERROR_BITS;
5796 }
5797
5798 /* process completion of an indexed ("direct lookup") command */
5799 static inline void process_indexed_cmd(struct ctlr_info *h,
5800         u32 raw_tag)
5801 {
5802         u32 tag_index;
5803         struct CommandList *c;
5804
5805         tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT;
5806         if (!bad_tag(h, tag_index, raw_tag)) {
5807                 c = h->cmd_pool + tag_index;
5808                 finish_cmd(c);
5809         }
5810 }
5811
5812 /* Some controllers, like p400, will give us one interrupt
5813  * after a soft reset, even if we turned interrupts off.
5814  * Only need to check for this in the hpsa_xxx_discard_completions
5815  * functions.
5816  */
5817 static int ignore_bogus_interrupt(struct ctlr_info *h)
5818 {
5819         if (likely(!reset_devices))
5820                 return 0;
5821
5822         if (likely(h->interrupts_enabled))
5823                 return 0;
5824
5825         dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
5826                 "(known firmware bug.)  Ignoring.\n");
5827
5828         return 1;
5829 }
5830
5831 /*
5832  * Convert &h->q[x] (passed to interrupt handlers) back to h.
5833  * Relies on (h-q[x] == x) being true for x such that
5834  * 0 <= x < MAX_REPLY_QUEUES.
5835  */
5836 static struct ctlr_info *queue_to_hba(u8 *queue)
5837 {
5838         return container_of((queue - *queue), struct ctlr_info, q[0]);
5839 }
5840
5841 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
5842 {
5843         struct ctlr_info *h = queue_to_hba(queue);
5844         u8 q = *(u8 *) queue;
5845         u32 raw_tag;
5846
5847         if (ignore_bogus_interrupt(h))
5848                 return IRQ_NONE;
5849
5850         if (interrupt_not_for_us(h))
5851                 return IRQ_NONE;
5852         h->last_intr_timestamp = get_jiffies_64();
5853         while (interrupt_pending(h)) {
5854                 raw_tag = get_next_completion(h, q);
5855                 while (raw_tag != FIFO_EMPTY)
5856                         raw_tag = next_command(h, q);
5857         }
5858         return IRQ_HANDLED;
5859 }
5860
5861 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
5862 {
5863         struct ctlr_info *h = queue_to_hba(queue);
5864         u32 raw_tag;
5865         u8 q = *(u8 *) queue;
5866
5867         if (ignore_bogus_interrupt(h))
5868                 return IRQ_NONE;
5869
5870         h->last_intr_timestamp = get_jiffies_64();
5871         raw_tag = get_next_completion(h, q);
5872         while (raw_tag != FIFO_EMPTY)
5873                 raw_tag = next_command(h, q);
5874         return IRQ_HANDLED;
5875 }
5876
5877 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
5878 {
5879         struct ctlr_info *h = queue_to_hba((u8 *) queue);
5880         u32 raw_tag;
5881         u8 q = *(u8 *) queue;
5882
5883         if (interrupt_not_for_us(h))
5884                 return IRQ_NONE;
5885         h->last_intr_timestamp = get_jiffies_64();
5886         while (interrupt_pending(h)) {
5887                 raw_tag = get_next_completion(h, q);
5888                 while (raw_tag != FIFO_EMPTY) {
5889                         process_indexed_cmd(h, raw_tag);
5890                         raw_tag = next_command(h, q);
5891                 }
5892         }
5893         return IRQ_HANDLED;
5894 }
5895
5896 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
5897 {
5898         struct ctlr_info *h = queue_to_hba(queue);
5899         u32 raw_tag;
5900         u8 q = *(u8 *) queue;
5901
5902         h->last_intr_timestamp = get_jiffies_64();
5903         raw_tag = get_next_completion(h, q);
5904         while (raw_tag != FIFO_EMPTY) {
5905                 process_indexed_cmd(h, raw_tag);
5906                 raw_tag = next_command(h, q);
5907         }
5908         return IRQ_HANDLED;
5909 }
5910
5911 /* Send a message CDB to the firmware. Careful, this only works
5912  * in simple mode, not performant mode due to the tag lookup.
5913  * We only ever use this immediately after a controller reset.
5914  */
5915 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
5916                         unsigned char type)
5917 {
5918         struct Command {
5919                 struct CommandListHeader CommandHeader;
5920                 struct RequestBlock Request;
5921                 struct ErrDescriptor ErrorDescriptor;
5922         };
5923         struct Command *cmd;
5924         static const size_t cmd_sz = sizeof(*cmd) +
5925                                         sizeof(cmd->ErrorDescriptor);
5926         dma_addr_t paddr64;
5927         __le32 paddr32;
5928         u32 tag;
5929         void __iomem *vaddr;
5930         int i, err;
5931
5932         vaddr = pci_ioremap_bar(pdev, 0);
5933         if (vaddr == NULL)
5934                 return -ENOMEM;
5935
5936         /* The Inbound Post Queue only accepts 32-bit physical addresses for the
5937          * CCISS commands, so they must be allocated from the lower 4GiB of
5938          * memory.
5939          */
5940         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
5941         if (err) {
5942                 iounmap(vaddr);
5943                 return err;
5944         }
5945
5946         cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
5947         if (cmd == NULL) {
5948                 iounmap(vaddr);
5949                 return -ENOMEM;
5950         }
5951
5952         /* This must fit, because of the 32-bit consistent DMA mask.  Also,
5953          * although there's no guarantee, we assume that the address is at
5954          * least 4-byte aligned (most likely, it's page-aligned).
5955          */
5956         paddr32 = cpu_to_le32(paddr64);
5957
5958         cmd->CommandHeader.ReplyQueue = 0;
5959         cmd->CommandHeader.SGList = 0;
5960         cmd->CommandHeader.SGTotal = cpu_to_le16(0);
5961         cmd->CommandHeader.tag = cpu_to_le64(paddr64);
5962         memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
5963
5964         cmd->Request.CDBLen = 16;
5965         cmd->Request.type_attr_dir =
5966                         TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
5967         cmd->Request.Timeout = 0; /* Don't time out */
5968         cmd->Request.CDB[0] = opcode;
5969         cmd->Request.CDB[1] = type;
5970         memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
5971         cmd->ErrorDescriptor.Addr =
5972                         cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd)));
5973         cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
5974
5975         writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
5976
5977         for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
5978                 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
5979                 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64)
5980                         break;
5981                 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
5982         }
5983
5984         iounmap(vaddr);
5985
5986         /* we leak the DMA buffer here ... no choice since the controller could
5987          *  still complete the command.
5988          */
5989         if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
5990                 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
5991                         opcode, type);
5992                 return -ETIMEDOUT;
5993         }
5994
5995         pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
5996
5997         if (tag & HPSA_ERROR_BIT) {
5998                 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
5999                         opcode, type);
6000                 return -EIO;
6001         }
6002
6003         dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
6004                 opcode, type);
6005         return 0;
6006 }
6007
6008 #define hpsa_noop(p) hpsa_message(p, 3, 0)
6009
6010 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
6011         void __iomem *vaddr, u32 use_doorbell)
6012 {
6013
6014         if (use_doorbell) {
6015                 /* For everything after the P600, the PCI power state method
6016                  * of resetting the controller doesn't work, so we have this
6017                  * other way using the doorbell register.
6018                  */
6019                 dev_info(&pdev->dev, "using doorbell to reset controller\n");
6020                 writel(use_doorbell, vaddr + SA5_DOORBELL);
6021
6022                 /* PMC hardware guys tell us we need a 10 second delay after
6023                  * doorbell reset and before any attempt to talk to the board
6024                  * at all to ensure that this actually works and doesn't fall
6025                  * over in some weird corner cases.
6026                  */
6027                 msleep(10000);
6028         } else { /* Try to do it the PCI power state way */
6029
6030                 /* Quoting from the Open CISS Specification: "The Power
6031                  * Management Control/Status Register (CSR) controls the power
6032                  * state of the device.  The normal operating state is D0,
6033                  * CSR=00h.  The software off state is D3, CSR=03h.  To reset
6034                  * the controller, place the interface device in D3 then to D0,
6035                  * this causes a secondary PCI reset which will reset the
6036                  * controller." */
6037
6038                 int rc = 0;
6039
6040                 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
6041
6042                 /* enter the D3hot power management state */
6043                 rc = pci_set_power_state(pdev, PCI_D3hot);
6044                 if (rc)
6045                         return rc;
6046
6047                 msleep(500);
6048
6049                 /* enter the D0 power management state */
6050                 rc = pci_set_power_state(pdev, PCI_D0);
6051                 if (rc)
6052                         return rc;
6053
6054                 /*
6055                  * The P600 requires a small delay when changing states.
6056                  * Otherwise we may think the board did not reset and we bail.
6057                  * This for kdump only and is particular to the P600.
6058                  */
6059                 msleep(500);
6060         }
6061         return 0;
6062 }
6063
6064 static void init_driver_version(char *driver_version, int len)
6065 {
6066         memset(driver_version, 0, len);
6067         strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
6068 }
6069
6070 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
6071 {
6072         char *driver_version;
6073         int i, size = sizeof(cfgtable->driver_version);
6074
6075         driver_version = kmalloc(size, GFP_KERNEL);
6076         if (!driver_version)
6077                 return -ENOMEM;
6078
6079         init_driver_version(driver_version, size);
6080         for (i = 0; i < size; i++)
6081                 writeb(driver_version[i], &cfgtable->driver_version[i]);
6082         kfree(driver_version);
6083         return 0;
6084 }
6085
6086 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
6087                                           unsigned char *driver_ver)
6088 {
6089         int i;
6090
6091         for (i = 0; i < sizeof(cfgtable->driver_version); i++)
6092                 driver_ver[i] = readb(&cfgtable->driver_version[i]);
6093 }
6094
6095 static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
6096 {
6097
6098         char *driver_ver, *old_driver_ver;
6099         int rc, size = sizeof(cfgtable->driver_version);
6100
6101         old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
6102         if (!old_driver_ver)
6103                 return -ENOMEM;
6104         driver_ver = old_driver_ver + size;
6105
6106         /* After a reset, the 32 bytes of "driver version" in the cfgtable
6107          * should have been changed, otherwise we know the reset failed.
6108          */
6109         init_driver_version(old_driver_ver, size);
6110         read_driver_ver_from_cfgtable(cfgtable, driver_ver);
6111         rc = !memcmp(driver_ver, old_driver_ver, size);
6112         kfree(old_driver_ver);
6113         return rc;
6114 }
6115 /* This does a hard reset of the controller using PCI power management
6116  * states or the using the doorbell register.
6117  */
6118 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id)
6119 {
6120         u64 cfg_offset;
6121         u32 cfg_base_addr;
6122         u64 cfg_base_addr_index;
6123         void __iomem *vaddr;
6124         unsigned long paddr;
6125         u32 misc_fw_support;
6126         int rc;
6127         struct CfgTable __iomem *cfgtable;
6128         u32 use_doorbell;
6129         u16 command_register;
6130
6131         /* For controllers as old as the P600, this is very nearly
6132          * the same thing as
6133          *
6134          * pci_save_state(pci_dev);
6135          * pci_set_power_state(pci_dev, PCI_D3hot);
6136          * pci_set_power_state(pci_dev, PCI_D0);
6137          * pci_restore_state(pci_dev);
6138          *
6139          * For controllers newer than the P600, the pci power state
6140          * method of resetting doesn't work so we have another way
6141          * using the doorbell register.
6142          */
6143
6144         if (!ctlr_is_resettable(board_id)) {
6145                 dev_warn(&pdev->dev, "Controller not resettable\n");
6146                 return -ENODEV;
6147         }
6148
6149         /* if controller is soft- but not hard resettable... */
6150         if (!ctlr_is_hard_resettable(board_id))
6151                 return -ENOTSUPP; /* try soft reset later. */
6152
6153         /* Save the PCI command register */
6154         pci_read_config_word(pdev, 4, &command_register);
6155         pci_save_state(pdev);
6156
6157         /* find the first memory BAR, so we can find the cfg table */
6158         rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
6159         if (rc)
6160                 return rc;
6161         vaddr = remap_pci_mem(paddr, 0x250);
6162         if (!vaddr)
6163                 return -ENOMEM;
6164
6165         /* find cfgtable in order to check if reset via doorbell is supported */
6166         rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
6167                                         &cfg_base_addr_index, &cfg_offset);
6168         if (rc)
6169                 goto unmap_vaddr;
6170         cfgtable = remap_pci_mem(pci_resource_start(pdev,
6171                        cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
6172         if (!cfgtable) {
6173                 rc = -ENOMEM;
6174                 goto unmap_vaddr;
6175         }
6176         rc = write_driver_ver_to_cfgtable(cfgtable);
6177         if (rc)
6178                 goto unmap_cfgtable;
6179
6180         /* If reset via doorbell register is supported, use that.
6181          * There are two such methods.  Favor the newest method.
6182          */
6183         misc_fw_support = readl(&cfgtable->misc_fw_support);
6184         use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
6185         if (use_doorbell) {
6186                 use_doorbell = DOORBELL_CTLR_RESET2;
6187         } else {
6188                 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
6189                 if (use_doorbell) {
6190                         dev_warn(&pdev->dev,
6191                                 "Soft reset not supported. Firmware update is required.\n");
6192                         rc = -ENOTSUPP; /* try soft reset */
6193                         goto unmap_cfgtable;
6194                 }
6195         }
6196
6197         rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
6198         if (rc)
6199                 goto unmap_cfgtable;
6200
6201         pci_restore_state(pdev);
6202         pci_write_config_word(pdev, 4, command_register);
6203
6204         /* Some devices (notably the HP Smart Array 5i Controller)
6205            need a little pause here */
6206         msleep(HPSA_POST_RESET_PAUSE_MSECS);
6207
6208         rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
6209         if (rc) {
6210                 dev_warn(&pdev->dev,
6211                         "Failed waiting for board to become ready after hard reset\n");
6212                 goto unmap_cfgtable;
6213         }
6214
6215         rc = controller_reset_failed(vaddr);
6216         if (rc < 0)
6217                 goto unmap_cfgtable;
6218         if (rc) {
6219                 dev_warn(&pdev->dev, "Unable to successfully reset "
6220                         "controller. Will try soft reset.\n");
6221                 rc = -ENOTSUPP;
6222         } else {
6223                 dev_info(&pdev->dev, "board ready after hard reset.\n");
6224         }
6225
6226 unmap_cfgtable:
6227         iounmap(cfgtable);
6228
6229 unmap_vaddr:
6230         iounmap(vaddr);
6231         return rc;
6232 }
6233
6234 /*
6235  *  We cannot read the structure directly, for portability we must use
6236  *   the io functions.
6237  *   This is for debug only.
6238  */
6239 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
6240 {
6241 #ifdef HPSA_DEBUG
6242         int i;
6243         char temp_name[17];
6244
6245         dev_info(dev, "Controller Configuration information\n");
6246         dev_info(dev, "------------------------------------\n");
6247         for (i = 0; i < 4; i++)
6248                 temp_name[i] = readb(&(tb->Signature[i]));
6249         temp_name[4] = '\0';
6250         dev_info(dev, "   Signature = %s\n", temp_name);
6251         dev_info(dev, "   Spec Number = %d\n", readl(&(tb->SpecValence)));
6252         dev_info(dev, "   Transport methods supported = 0x%x\n",
6253                readl(&(tb->TransportSupport)));
6254         dev_info(dev, "   Transport methods active = 0x%x\n",
6255                readl(&(tb->TransportActive)));
6256         dev_info(dev, "   Requested transport Method = 0x%x\n",
6257                readl(&(tb->HostWrite.TransportRequest)));
6258         dev_info(dev, "   Coalesce Interrupt Delay = 0x%x\n",
6259                readl(&(tb->HostWrite.CoalIntDelay)));
6260         dev_info(dev, "   Coalesce Interrupt Count = 0x%x\n",
6261                readl(&(tb->HostWrite.CoalIntCount)));
6262         dev_info(dev, "   Max outstanding commands = %d\n",
6263                readl(&(tb->CmdsOutMax)));
6264         dev_info(dev, "   Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
6265         for (i = 0; i < 16; i++)
6266                 temp_name[i] = readb(&(tb->ServerName[i]));
6267         temp_name[16] = '\0';
6268         dev_info(dev, "   Server Name = %s\n", temp_name);
6269         dev_info(dev, "   Heartbeat Counter = 0x%x\n\n\n",
6270                 readl(&(tb->HeartBeat)));
6271 #endif                          /* HPSA_DEBUG */
6272 }
6273
6274 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
6275 {
6276         int i, offset, mem_type, bar_type;
6277
6278         if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
6279                 return 0;
6280         offset = 0;
6281         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
6282                 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
6283                 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
6284                         offset += 4;
6285                 else {
6286                         mem_type = pci_resource_flags(pdev, i) &
6287                             PCI_BASE_ADDRESS_MEM_TYPE_MASK;
6288                         switch (mem_type) {
6289                         case PCI_BASE_ADDRESS_MEM_TYPE_32:
6290                         case PCI_BASE_ADDRESS_MEM_TYPE_1M:
6291                                 offset += 4;    /* 32 bit */
6292                                 break;
6293                         case PCI_BASE_ADDRESS_MEM_TYPE_64:
6294                                 offset += 8;
6295                                 break;
6296                         default:        /* reserved in PCI 2.2 */
6297                                 dev_warn(&pdev->dev,
6298                                        "base address is invalid\n");
6299                                 return -1;
6300                                 break;
6301                         }
6302                 }
6303                 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
6304                         return i + 1;
6305         }
6306         return -1;
6307 }
6308
6309 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
6310  * controllers that are capable. If not, we use legacy INTx mode.
6311  */
6312
6313 static void hpsa_interrupt_mode(struct ctlr_info *h)
6314 {
6315 #ifdef CONFIG_PCI_MSI
6316         int err, i;
6317         struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
6318
6319         for (i = 0; i < MAX_REPLY_QUEUES; i++) {
6320                 hpsa_msix_entries[i].vector = 0;
6321                 hpsa_msix_entries[i].entry = i;
6322         }
6323
6324         /* Some boards advertise MSI but don't really support it */
6325         if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
6326             (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
6327                 goto default_int_mode;
6328         if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
6329                 dev_info(&h->pdev->dev, "MSI-X capable controller\n");
6330                 h->msix_vector = MAX_REPLY_QUEUES;
6331                 if (h->msix_vector > num_online_cpus())
6332                         h->msix_vector = num_online_cpus();
6333                 err = pci_enable_msix_range(h->pdev, hpsa_msix_entries,
6334                                             1, h->msix_vector);
6335                 if (err < 0) {
6336                         dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", err);
6337                         h->msix_vector = 0;
6338                         goto single_msi_mode;
6339                 } else if (err < h->msix_vector) {
6340                         dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
6341                                "available\n", err);
6342                 }
6343                 h->msix_vector = err;
6344                 for (i = 0; i < h->msix_vector; i++)
6345                         h->intr[i] = hpsa_msix_entries[i].vector;
6346                 return;
6347         }
6348 single_msi_mode:
6349         if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
6350                 dev_info(&h->pdev->dev, "MSI capable controller\n");
6351                 if (!pci_enable_msi(h->pdev))
6352                         h->msi_vector = 1;
6353                 else
6354                         dev_warn(&h->pdev->dev, "MSI init failed\n");
6355         }
6356 default_int_mode:
6357 #endif                          /* CONFIG_PCI_MSI */
6358         /* if we get here we're going to use the default interrupt mode */
6359         h->intr[h->intr_mode] = h->pdev->irq;
6360 }
6361
6362 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
6363 {
6364         int i;
6365         u32 subsystem_vendor_id, subsystem_device_id;
6366
6367         subsystem_vendor_id = pdev->subsystem_vendor;
6368         subsystem_device_id = pdev->subsystem_device;
6369         *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
6370                     subsystem_vendor_id;
6371
6372         for (i = 0; i < ARRAY_SIZE(products); i++)
6373                 if (*board_id == products[i].board_id)
6374                         return i;
6375
6376         if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
6377                 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
6378                 !hpsa_allow_any) {
6379                 dev_warn(&pdev->dev, "unrecognized board ID: "
6380                         "0x%08x, ignoring.\n", *board_id);
6381                         return -ENODEV;
6382         }
6383         return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
6384 }
6385
6386 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
6387                                     unsigned long *memory_bar)
6388 {
6389         int i;
6390
6391         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
6392                 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
6393                         /* addressing mode bits already removed */
6394                         *memory_bar = pci_resource_start(pdev, i);
6395                         dev_dbg(&pdev->dev, "memory BAR = %lx\n",
6396                                 *memory_bar);
6397                         return 0;
6398                 }
6399         dev_warn(&pdev->dev, "no memory BAR found\n");
6400         return -ENODEV;
6401 }
6402
6403 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
6404                                      int wait_for_ready)
6405 {
6406         int i, iterations;
6407         u32 scratchpad;
6408         if (wait_for_ready)
6409                 iterations = HPSA_BOARD_READY_ITERATIONS;
6410         else
6411                 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
6412
6413         for (i = 0; i < iterations; i++) {
6414                 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
6415                 if (wait_for_ready) {
6416                         if (scratchpad == HPSA_FIRMWARE_READY)
6417                                 return 0;
6418                 } else {
6419                         if (scratchpad != HPSA_FIRMWARE_READY)
6420                                 return 0;
6421                 }
6422                 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
6423         }
6424         dev_warn(&pdev->dev, "board not ready, timed out.\n");
6425         return -ENODEV;
6426 }
6427
6428 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
6429                                u32 *cfg_base_addr, u64 *cfg_base_addr_index,
6430                                u64 *cfg_offset)
6431 {
6432         *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
6433         *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
6434         *cfg_base_addr &= (u32) 0x0000ffff;
6435         *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
6436         if (*cfg_base_addr_index == -1) {
6437                 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
6438                 return -ENODEV;
6439         }
6440         return 0;
6441 }
6442
6443 static int hpsa_find_cfgtables(struct ctlr_info *h)
6444 {
6445         u64 cfg_offset;
6446         u32 cfg_base_addr;
6447         u64 cfg_base_addr_index;
6448         u32 trans_offset;
6449         int rc;
6450
6451         rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
6452                 &cfg_base_addr_index, &cfg_offset);
6453         if (rc)
6454                 return rc;
6455         h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
6456                        cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
6457         if (!h->cfgtable) {
6458                 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n");
6459                 return -ENOMEM;
6460         }
6461         rc = write_driver_ver_to_cfgtable(h->cfgtable);
6462         if (rc)
6463                 return rc;
6464         /* Find performant mode table. */
6465         trans_offset = readl(&h->cfgtable->TransMethodOffset);
6466         h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
6467                                 cfg_base_addr_index)+cfg_offset+trans_offset,
6468                                 sizeof(*h->transtable));
6469         if (!h->transtable)
6470                 return -ENOMEM;
6471         return 0;
6472 }
6473
6474 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
6475 {
6476 #define MIN_MAX_COMMANDS 16
6477         BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS);
6478
6479         h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands);
6480
6481         /* Limit commands in memory limited kdump scenario. */
6482         if (reset_devices && h->max_commands > 32)
6483                 h->max_commands = 32;
6484
6485         if (h->max_commands < MIN_MAX_COMMANDS) {
6486                 dev_warn(&h->pdev->dev,
6487                         "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n",
6488                         h->max_commands,
6489                         MIN_MAX_COMMANDS);
6490                 h->max_commands = MIN_MAX_COMMANDS;
6491         }
6492 }
6493
6494 /* If the controller reports that the total max sg entries is greater than 512,
6495  * then we know that chained SG blocks work.  (Original smart arrays did not
6496  * support chained SG blocks and would return zero for max sg entries.)
6497  */
6498 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h)
6499 {
6500         return h->maxsgentries > 512;
6501 }
6502
6503 /* Interrogate the hardware for some limits:
6504  * max commands, max SG elements without chaining, and with chaining,
6505  * SG chain block size, etc.
6506  */
6507 static void hpsa_find_board_params(struct ctlr_info *h)
6508 {
6509         hpsa_get_max_perf_mode_cmds(h);
6510         h->nr_cmds = h->max_commands;
6511         h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
6512         h->fw_support = readl(&(h->cfgtable->misc_fw_support));
6513         if (hpsa_supports_chained_sg_blocks(h)) {
6514                 /* Limit in-command s/g elements to 32 save dma'able memory. */
6515                 h->max_cmd_sg_entries = 32;
6516                 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
6517                 h->maxsgentries--; /* save one for chain pointer */
6518         } else {
6519                 /*
6520                  * Original smart arrays supported at most 31 s/g entries
6521                  * embedded inline in the command (trying to use more
6522                  * would lock up the controller)
6523                  */
6524                 h->max_cmd_sg_entries = 31;
6525                 h->maxsgentries = 31; /* default to traditional values */
6526                 h->chainsize = 0;
6527         }
6528
6529         /* Find out what task management functions are supported and cache */
6530         h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
6531         if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
6532                 dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
6533         if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
6534                 dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
6535 }
6536
6537 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
6538 {
6539         if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
6540                 dev_err(&h->pdev->dev, "not a valid CISS config table\n");
6541                 return false;
6542         }
6543         return true;
6544 }
6545
6546 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
6547 {
6548         u32 driver_support;
6549
6550         driver_support = readl(&(h->cfgtable->driver_support));
6551         /* Need to enable prefetch in the SCSI core for 6400 in x86 */
6552 #ifdef CONFIG_X86
6553         driver_support |= ENABLE_SCSI_PREFETCH;
6554 #endif
6555         driver_support |= ENABLE_UNIT_ATTN;
6556         writel(driver_support, &(h->cfgtable->driver_support));
6557 }
6558
6559 /* Disable DMA prefetch for the P600.  Otherwise an ASIC bug may result
6560  * in a prefetch beyond physical memory.
6561  */
6562 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
6563 {
6564         u32 dma_prefetch;
6565
6566         if (h->board_id != 0x3225103C)
6567                 return;
6568         dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
6569         dma_prefetch |= 0x8000;
6570         writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
6571 }
6572
6573 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
6574 {
6575         int i;
6576         u32 doorbell_value;
6577         unsigned long flags;
6578         /* wait until the clear_event_notify bit 6 is cleared by controller. */
6579         for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) {
6580                 spin_lock_irqsave(&h->lock, flags);
6581                 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
6582                 spin_unlock_irqrestore(&h->lock, flags);
6583                 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
6584                         goto done;
6585                 /* delay and try again */
6586                 msleep(CLEAR_EVENT_WAIT_INTERVAL);
6587         }
6588         return -ENODEV;
6589 done:
6590         return 0;
6591 }
6592
6593 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
6594 {
6595         int i;
6596         u32 doorbell_value;
6597         unsigned long flags;
6598
6599         /* under certain very rare conditions, this can take awhile.
6600          * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
6601          * as we enter this code.)
6602          */
6603         for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) {
6604                 if (h->remove_in_progress)
6605                         goto done;
6606                 spin_lock_irqsave(&h->lock, flags);
6607                 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
6608                 spin_unlock_irqrestore(&h->lock, flags);
6609                 if (!(doorbell_value & CFGTBL_ChangeReq))
6610                         goto done;
6611                 /* delay and try again */
6612                 msleep(MODE_CHANGE_WAIT_INTERVAL);
6613         }
6614         return -ENODEV;
6615 done:
6616         return 0;
6617 }
6618
6619 /* return -ENODEV or other reason on error, 0 on success */
6620 static int hpsa_enter_simple_mode(struct ctlr_info *h)
6621 {
6622         u32 trans_support;
6623
6624         trans_support = readl(&(h->cfgtable->TransportSupport));
6625         if (!(trans_support & SIMPLE_MODE))
6626                 return -ENOTSUPP;
6627
6628         h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
6629
6630         /* Update the field, and then ring the doorbell */
6631         writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
6632         writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
6633         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
6634         if (hpsa_wait_for_mode_change_ack(h))
6635                 goto error;
6636         print_cfg_table(&h->pdev->dev, h->cfgtable);
6637         if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
6638                 goto error;
6639         h->transMethod = CFGTBL_Trans_Simple;
6640         return 0;
6641 error:
6642         dev_err(&h->pdev->dev, "failed to enter simple mode\n");
6643         return -ENODEV;
6644 }
6645
6646 static int hpsa_pci_init(struct ctlr_info *h)
6647 {
6648         int prod_index, err;
6649
6650         prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
6651         if (prod_index < 0)
6652                 return prod_index;
6653         h->product_name = products[prod_index].product_name;
6654         h->access = *(products[prod_index].access);
6655
6656         h->needs_abort_tags_swizzled =
6657                 ctlr_needs_abort_tags_swizzled(h->board_id);
6658
6659         pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
6660                                PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
6661
6662         err = pci_enable_device(h->pdev);
6663         if (err) {
6664                 dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
6665                 return err;
6666         }
6667
6668         err = pci_request_regions(h->pdev, HPSA);
6669         if (err) {
6670                 dev_err(&h->pdev->dev,
6671                         "cannot obtain PCI resources, aborting\n");
6672                 return err;
6673         }
6674
6675         pci_set_master(h->pdev);
6676
6677         hpsa_interrupt_mode(h);
6678         err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
6679         if (err)
6680                 goto err_out_free_res;
6681         h->vaddr = remap_pci_mem(h->paddr, 0x250);
6682         if (!h->vaddr) {
6683                 err = -ENOMEM;
6684                 goto err_out_free_res;
6685         }
6686         err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
6687         if (err)
6688                 goto err_out_free_res;
6689         err = hpsa_find_cfgtables(h);
6690         if (err)
6691                 goto err_out_free_res;
6692         hpsa_find_board_params(h);
6693
6694         if (!hpsa_CISS_signature_present(h)) {
6695                 err = -ENODEV;
6696                 goto err_out_free_res;
6697         }
6698         hpsa_set_driver_support_bits(h);
6699         hpsa_p600_dma_prefetch_quirk(h);
6700         err = hpsa_enter_simple_mode(h);
6701         if (err)
6702                 goto err_out_free_res;
6703         return 0;
6704
6705 err_out_free_res:
6706         if (h->transtable)
6707                 iounmap(h->transtable);
6708         if (h->cfgtable)
6709                 iounmap(h->cfgtable);
6710         if (h->vaddr)
6711                 iounmap(h->vaddr);
6712         pci_disable_device(h->pdev);
6713         pci_release_regions(h->pdev);
6714         return err;
6715 }
6716
6717 static void hpsa_hba_inquiry(struct ctlr_info *h)
6718 {
6719         int rc;
6720
6721 #define HBA_INQUIRY_BYTE_COUNT 64
6722         h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
6723         if (!h->hba_inquiry_data)
6724                 return;
6725         rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
6726                 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
6727         if (rc != 0) {
6728                 kfree(h->hba_inquiry_data);
6729                 h->hba_inquiry_data = NULL;
6730         }
6731 }
6732
6733 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id)
6734 {
6735         int rc, i;
6736         void __iomem *vaddr;
6737
6738         if (!reset_devices)
6739                 return 0;
6740
6741         /* kdump kernel is loading, we don't know in which state is
6742          * the pci interface. The dev->enable_cnt is equal zero
6743          * so we call enable+disable, wait a while and switch it on.
6744          */
6745         rc = pci_enable_device(pdev);
6746         if (rc) {
6747                 dev_warn(&pdev->dev, "Failed to enable PCI device\n");
6748                 return -ENODEV;
6749         }
6750         pci_disable_device(pdev);
6751         msleep(260);                    /* a randomly chosen number */
6752         rc = pci_enable_device(pdev);
6753         if (rc) {
6754                 dev_warn(&pdev->dev, "failed to enable device.\n");
6755                 return -ENODEV;
6756         }
6757
6758         pci_set_master(pdev);
6759
6760         vaddr = pci_ioremap_bar(pdev, 0);
6761         if (vaddr == NULL) {
6762                 rc = -ENOMEM;
6763                 goto out_disable;
6764         }
6765         writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
6766         iounmap(vaddr);
6767
6768         /* Reset the controller with a PCI power-cycle or via doorbell */
6769         rc = hpsa_kdump_hard_reset_controller(pdev, board_id);
6770
6771         /* -ENOTSUPP here means we cannot reset the controller
6772          * but it's already (and still) up and running in
6773          * "performant mode".  Or, it might be 640x, which can't reset
6774          * due to concerns about shared bbwc between 6402/6404 pair.
6775          */
6776         if (rc)
6777                 goto out_disable;
6778
6779         /* Now try to get the controller to respond to a no-op */
6780         dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n");
6781         for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
6782                 if (hpsa_noop(pdev) == 0)
6783                         break;
6784                 else
6785                         dev_warn(&pdev->dev, "no-op failed%s\n",
6786                                         (i < 11 ? "; re-trying" : ""));
6787         }
6788
6789 out_disable:
6790
6791         pci_disable_device(pdev);
6792         return rc;
6793 }
6794
6795 static int hpsa_alloc_cmd_pool(struct ctlr_info *h)
6796 {
6797         h->cmd_pool_bits = kzalloc(
6798                 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
6799                 sizeof(unsigned long), GFP_KERNEL);
6800         h->cmd_pool = pci_alloc_consistent(h->pdev,
6801                     h->nr_cmds * sizeof(*h->cmd_pool),
6802                     &(h->cmd_pool_dhandle));
6803         h->errinfo_pool = pci_alloc_consistent(h->pdev,
6804                     h->nr_cmds * sizeof(*h->errinfo_pool),
6805                     &(h->errinfo_pool_dhandle));
6806         if ((h->cmd_pool_bits == NULL)
6807             || (h->cmd_pool == NULL)
6808             || (h->errinfo_pool == NULL)) {
6809                 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
6810                 goto clean_up;
6811         }
6812         hpsa_preinitialize_commands(h);
6813         return 0;
6814 clean_up:
6815         hpsa_free_cmd_pool(h);
6816         return -ENOMEM;
6817 }
6818
6819 static void hpsa_free_cmd_pool(struct ctlr_info *h)
6820 {
6821         kfree(h->cmd_pool_bits);
6822         if (h->cmd_pool)
6823                 pci_free_consistent(h->pdev,
6824                             h->nr_cmds * sizeof(struct CommandList),
6825                             h->cmd_pool, h->cmd_pool_dhandle);
6826         if (h->ioaccel2_cmd_pool)
6827                 pci_free_consistent(h->pdev,
6828                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
6829                         h->ioaccel2_cmd_pool, h->ioaccel2_cmd_pool_dhandle);
6830         if (h->errinfo_pool)
6831                 pci_free_consistent(h->pdev,
6832                             h->nr_cmds * sizeof(struct ErrorInfo),
6833                             h->errinfo_pool,
6834                             h->errinfo_pool_dhandle);
6835         if (h->ioaccel_cmd_pool)
6836                 pci_free_consistent(h->pdev,
6837                         h->nr_cmds * sizeof(struct io_accel1_cmd),
6838                         h->ioaccel_cmd_pool, h->ioaccel_cmd_pool_dhandle);
6839 }
6840
6841 static void hpsa_irq_affinity_hints(struct ctlr_info *h)
6842 {
6843         int i, cpu;
6844
6845         cpu = cpumask_first(cpu_online_mask);
6846         for (i = 0; i < h->msix_vector; i++) {
6847                 irq_set_affinity_hint(h->intr[i], get_cpu_mask(cpu));
6848                 cpu = cpumask_next(cpu, cpu_online_mask);
6849         }
6850 }
6851
6852 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */
6853 static void hpsa_free_irqs(struct ctlr_info *h)
6854 {
6855         int i;
6856
6857         if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
6858                 /* Single reply queue, only one irq to free */
6859                 i = h->intr_mode;
6860                 irq_set_affinity_hint(h->intr[i], NULL);
6861                 free_irq(h->intr[i], &h->q[i]);
6862                 return;
6863         }
6864
6865         for (i = 0; i < h->msix_vector; i++) {
6866                 irq_set_affinity_hint(h->intr[i], NULL);
6867                 free_irq(h->intr[i], &h->q[i]);
6868         }
6869         for (; i < MAX_REPLY_QUEUES; i++)
6870                 h->q[i] = 0;
6871 }
6872
6873 /* returns 0 on success; cleans up and returns -Enn on error */
6874 static int hpsa_request_irqs(struct ctlr_info *h,
6875         irqreturn_t (*msixhandler)(int, void *),
6876         irqreturn_t (*intxhandler)(int, void *))
6877 {
6878         int rc, i;
6879
6880         /*
6881          * initialize h->q[x] = x so that interrupt handlers know which
6882          * queue to process.
6883          */
6884         for (i = 0; i < MAX_REPLY_QUEUES; i++)
6885                 h->q[i] = (u8) i;
6886
6887         if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) {
6888                 /* If performant mode and MSI-X, use multiple reply queues */
6889                 for (i = 0; i < h->msix_vector; i++) {
6890                         rc = request_irq(h->intr[i], msixhandler,
6891                                         0, h->devname,
6892                                         &h->q[i]);
6893                         if (rc) {
6894                                 int j;
6895
6896                                 dev_err(&h->pdev->dev,
6897                                         "failed to get irq %d for %s\n",
6898                                        h->intr[i], h->devname);
6899                                 for (j = 0; j < i; j++) {
6900                                         free_irq(h->intr[j], &h->q[j]);
6901                                         h->q[j] = 0;
6902                                 }
6903                                 for (; j < MAX_REPLY_QUEUES; j++)
6904                                         h->q[j] = 0;
6905                                 return rc;
6906                         }
6907                 }
6908                 hpsa_irq_affinity_hints(h);
6909         } else {
6910                 /* Use single reply pool */
6911                 if (h->msix_vector > 0 || h->msi_vector) {
6912                         rc = request_irq(h->intr[h->intr_mode],
6913                                 msixhandler, 0, h->devname,
6914                                 &h->q[h->intr_mode]);
6915                 } else {
6916                         rc = request_irq(h->intr[h->intr_mode],
6917                                 intxhandler, IRQF_SHARED, h->devname,
6918                                 &h->q[h->intr_mode]);
6919                 }
6920         }
6921         if (rc) {
6922                 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
6923                        h->intr[h->intr_mode], h->devname);
6924                 return -ENODEV;
6925         }
6926         return 0;
6927 }
6928
6929 static int hpsa_kdump_soft_reset(struct ctlr_info *h)
6930 {
6931         if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
6932                 HPSA_RESET_TYPE_CONTROLLER)) {
6933                 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
6934                 return -EIO;
6935         }
6936
6937         dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
6938         if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
6939                 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
6940                 return -1;
6941         }
6942
6943         dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
6944         if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
6945                 dev_warn(&h->pdev->dev, "Board failed to become ready "
6946                         "after soft reset.\n");
6947                 return -1;
6948         }
6949
6950         return 0;
6951 }
6952
6953 static void hpsa_free_irqs_and_disable_msix(struct ctlr_info *h)
6954 {
6955         hpsa_free_irqs(h);
6956 #ifdef CONFIG_PCI_MSI
6957         if (h->msix_vector) {
6958                 if (h->pdev->msix_enabled)
6959                         pci_disable_msix(h->pdev);
6960         } else if (h->msi_vector) {
6961                 if (h->pdev->msi_enabled)
6962                         pci_disable_msi(h->pdev);
6963         }
6964 #endif /* CONFIG_PCI_MSI */
6965 }
6966
6967 static void hpsa_free_reply_queues(struct ctlr_info *h)
6968 {
6969         int i;
6970
6971         for (i = 0; i < h->nreply_queues; i++) {
6972                 if (!h->reply_queue[i].head)
6973                         continue;
6974                 pci_free_consistent(h->pdev, h->reply_queue_size,
6975                         h->reply_queue[i].head, h->reply_queue[i].busaddr);
6976                 h->reply_queue[i].head = NULL;
6977                 h->reply_queue[i].busaddr = 0;
6978         }
6979 }
6980
6981 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
6982 {
6983         hpsa_free_irqs_and_disable_msix(h);
6984         hpsa_free_sg_chain_blocks(h);
6985         hpsa_free_cmd_pool(h);
6986         kfree(h->ioaccel1_blockFetchTable);
6987         kfree(h->blockFetchTable);
6988         hpsa_free_reply_queues(h);
6989         if (h->vaddr)
6990                 iounmap(h->vaddr);
6991         if (h->transtable)
6992                 iounmap(h->transtable);
6993         if (h->cfgtable)
6994                 iounmap(h->cfgtable);
6995         pci_disable_device(h->pdev);
6996         pci_release_regions(h->pdev);
6997         kfree(h);
6998 }
6999
7000 /* Called when controller lockup detected. */
7001 static void fail_all_outstanding_cmds(struct ctlr_info *h)
7002 {
7003         int i, refcount;
7004         struct CommandList *c;
7005         int failcount = 0;
7006
7007         flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */
7008         for (i = 0; i < h->nr_cmds; i++) {
7009                 c = h->cmd_pool + i;
7010                 refcount = atomic_inc_return(&c->refcount);
7011                 if (refcount > 1) {
7012                         c->err_info->CommandStatus = CMD_CTLR_LOCKUP;
7013                         finish_cmd(c);
7014                         atomic_dec(&h->commands_outstanding);
7015                         failcount++;
7016                 }
7017                 cmd_free(h, c);
7018         }
7019         dev_warn(&h->pdev->dev,
7020                 "failed %d commands in fail_all\n", failcount);
7021 }
7022
7023 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
7024 {
7025         int cpu;
7026
7027         for_each_online_cpu(cpu) {
7028                 u32 *lockup_detected;
7029                 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
7030                 *lockup_detected = value;
7031         }
7032         wmb(); /* be sure the per-cpu variables are out to memory */
7033 }
7034
7035 static void controller_lockup_detected(struct ctlr_info *h)
7036 {
7037         unsigned long flags;
7038         u32 lockup_detected;
7039
7040         h->access.set_intr_mask(h, HPSA_INTR_OFF);
7041         spin_lock_irqsave(&h->lock, flags);
7042         lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
7043         if (!lockup_detected) {
7044                 /* no heartbeat, but controller gave us a zero. */
7045                 dev_warn(&h->pdev->dev,
7046                         "lockup detected after %d but scratchpad register is zero\n",
7047                         h->heartbeat_sample_interval / HZ);
7048                 lockup_detected = 0xffffffff;
7049         }
7050         set_lockup_detected_for_all_cpus(h, lockup_detected);
7051         spin_unlock_irqrestore(&h->lock, flags);
7052         dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n",
7053                         lockup_detected, h->heartbeat_sample_interval / HZ);
7054         pci_disable_device(h->pdev);
7055         fail_all_outstanding_cmds(h);
7056 }
7057
7058 static int detect_controller_lockup(struct ctlr_info *h)
7059 {
7060         u64 now;
7061         u32 heartbeat;
7062         unsigned long flags;
7063
7064         now = get_jiffies_64();
7065         /* If we've received an interrupt recently, we're ok. */
7066         if (time_after64(h->last_intr_timestamp +
7067                                 (h->heartbeat_sample_interval), now))
7068                 return false;
7069
7070         /*
7071          * If we've already checked the heartbeat recently, we're ok.
7072          * This could happen if someone sends us a signal. We
7073          * otherwise don't care about signals in this thread.
7074          */
7075         if (time_after64(h->last_heartbeat_timestamp +
7076                                 (h->heartbeat_sample_interval), now))
7077                 return false;
7078
7079         /* If heartbeat has not changed since we last looked, we're not ok. */
7080         spin_lock_irqsave(&h->lock, flags);
7081         heartbeat = readl(&h->cfgtable->HeartBeat);
7082         spin_unlock_irqrestore(&h->lock, flags);
7083         if (h->last_heartbeat == heartbeat) {
7084                 controller_lockup_detected(h);
7085                 return true;
7086         }
7087
7088         /* We're ok. */
7089         h->last_heartbeat = heartbeat;
7090         h->last_heartbeat_timestamp = now;
7091         return false;
7092 }
7093
7094 static void hpsa_ack_ctlr_events(struct ctlr_info *h)
7095 {
7096         int i;
7097         char *event_type;
7098
7099         if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
7100                 return;
7101
7102         /* Ask the controller to clear the events we're handling. */
7103         if ((h->transMethod & (CFGTBL_Trans_io_accel1
7104                         | CFGTBL_Trans_io_accel2)) &&
7105                 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
7106                  h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
7107
7108                 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
7109                         event_type = "state change";
7110                 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
7111                         event_type = "configuration change";
7112                 /* Stop sending new RAID offload reqs via the IO accelerator */
7113                 scsi_block_requests(h->scsi_host);
7114                 for (i = 0; i < h->ndevices; i++)
7115                         h->dev[i]->offload_enabled = 0;
7116                 hpsa_drain_accel_commands(h);
7117                 /* Set 'accelerator path config change' bit */
7118                 dev_warn(&h->pdev->dev,
7119                         "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
7120                         h->events, event_type);
7121                 writel(h->events, &(h->cfgtable->clear_event_notify));
7122                 /* Set the "clear event notify field update" bit 6 */
7123                 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
7124                 /* Wait until ctlr clears 'clear event notify field', bit 6 */
7125                 hpsa_wait_for_clear_event_notify_ack(h);
7126                 scsi_unblock_requests(h->scsi_host);
7127         } else {
7128                 /* Acknowledge controller notification events. */
7129                 writel(h->events, &(h->cfgtable->clear_event_notify));
7130                 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
7131                 hpsa_wait_for_clear_event_notify_ack(h);
7132 #if 0
7133                 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7134                 hpsa_wait_for_mode_change_ack(h);
7135 #endif
7136         }
7137         return;
7138 }
7139
7140 /* Check a register on the controller to see if there are configuration
7141  * changes (added/changed/removed logical drives, etc.) which mean that
7142  * we should rescan the controller for devices.
7143  * Also check flag for driver-initiated rescan.
7144  */
7145 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
7146 {
7147         if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
7148                 return 0;
7149
7150         h->events = readl(&(h->cfgtable->event_notify));
7151         return h->events & RESCAN_REQUIRED_EVENT_BITS;
7152 }
7153
7154 /*
7155  * Check if any of the offline devices have become ready
7156  */
7157 static int hpsa_offline_devices_ready(struct ctlr_info *h)
7158 {
7159         unsigned long flags;
7160         struct offline_device_entry *d;
7161         struct list_head *this, *tmp;
7162
7163         spin_lock_irqsave(&h->offline_device_lock, flags);
7164         list_for_each_safe(this, tmp, &h->offline_device_list) {
7165                 d = list_entry(this, struct offline_device_entry,
7166                                 offline_list);
7167                 spin_unlock_irqrestore(&h->offline_device_lock, flags);
7168                 if (!hpsa_volume_offline(h, d->scsi3addr)) {
7169                         spin_lock_irqsave(&h->offline_device_lock, flags);
7170                         list_del(&d->offline_list);
7171                         spin_unlock_irqrestore(&h->offline_device_lock, flags);
7172                         return 1;
7173                 }
7174                 spin_lock_irqsave(&h->offline_device_lock, flags);
7175         }
7176         spin_unlock_irqrestore(&h->offline_device_lock, flags);
7177         return 0;
7178 }
7179
7180 static void hpsa_rescan_ctlr_worker(struct work_struct *work)
7181 {
7182         unsigned long flags;
7183         struct ctlr_info *h = container_of(to_delayed_work(work),
7184                                         struct ctlr_info, rescan_ctlr_work);
7185
7186
7187         if (h->remove_in_progress)
7188                 return;
7189
7190         if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) {
7191                 scsi_host_get(h->scsi_host);
7192                 hpsa_ack_ctlr_events(h);
7193                 hpsa_scan_start(h->scsi_host);
7194                 scsi_host_put(h->scsi_host);
7195         }
7196         spin_lock_irqsave(&h->lock, flags);
7197         if (!h->remove_in_progress)
7198                 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
7199                                 h->heartbeat_sample_interval);
7200         spin_unlock_irqrestore(&h->lock, flags);
7201 }
7202
7203 static void hpsa_monitor_ctlr_worker(struct work_struct *work)
7204 {
7205         unsigned long flags;
7206         struct ctlr_info *h = container_of(to_delayed_work(work),
7207                                         struct ctlr_info, monitor_ctlr_work);
7208
7209         detect_controller_lockup(h);
7210         if (lockup_detected(h))
7211                 return;
7212
7213         spin_lock_irqsave(&h->lock, flags);
7214         if (!h->remove_in_progress)
7215                 schedule_delayed_work(&h->monitor_ctlr_work,
7216                                 h->heartbeat_sample_interval);
7217         spin_unlock_irqrestore(&h->lock, flags);
7218 }
7219
7220 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
7221                                                 char *name)
7222 {
7223         struct workqueue_struct *wq = NULL;
7224
7225         wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
7226         if (!wq)
7227                 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);
7228
7229         return wq;
7230 }
7231
7232 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
7233 {
7234         int dac, rc;
7235         struct ctlr_info *h;
7236         int try_soft_reset = 0;
7237         unsigned long flags;
7238         u32 board_id;
7239
7240         if (number_of_controllers == 0)
7241                 printk(KERN_INFO DRIVER_NAME "\n");
7242
7243         rc = hpsa_lookup_board_id(pdev, &board_id);
7244         if (rc < 0) {
7245                 dev_warn(&pdev->dev, "Board ID not found\n");
7246                 return rc;
7247         }
7248
7249         rc = hpsa_init_reset_devices(pdev, board_id);
7250         if (rc) {
7251                 if (rc != -ENOTSUPP)
7252                         return rc;
7253                 /* If the reset fails in a particular way (it has no way to do
7254                  * a proper hard reset, so returns -ENOTSUPP) we can try to do
7255                  * a soft reset once we get the controller configured up to the
7256                  * point that it can accept a command.
7257                  */
7258                 try_soft_reset = 1;
7259                 rc = 0;
7260         }
7261
7262 reinit_after_soft_reset:
7263
7264         /* Command structures must be aligned on a 32-byte boundary because
7265          * the 5 lower bits of the address are used by the hardware. and by
7266          * the driver.  See comments in hpsa.h for more info.
7267          */
7268         BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
7269         h = kzalloc(sizeof(*h), GFP_KERNEL);
7270         if (!h)
7271                 return -ENOMEM;
7272
7273         h->pdev = pdev;
7274         h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
7275         INIT_LIST_HEAD(&h->offline_device_list);
7276         spin_lock_init(&h->lock);
7277         spin_lock_init(&h->offline_device_lock);
7278         spin_lock_init(&h->scan_lock);
7279         atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS);
7280         atomic_set(&h->abort_cmds_available, HPSA_CMDS_RESERVED_FOR_ABORTS);
7281
7282         h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan");
7283         if (!h->rescan_ctlr_wq) {
7284                 rc = -ENOMEM;
7285                 goto clean1;
7286         }
7287
7288         h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit");
7289         if (!h->resubmit_wq) {
7290                 rc = -ENOMEM;
7291                 goto clean1;
7292         }
7293
7294         /* Allocate and clear per-cpu variable lockup_detected */
7295         h->lockup_detected = alloc_percpu(u32);
7296         if (!h->lockup_detected) {
7297                 rc = -ENOMEM;
7298                 goto clean1;
7299         }
7300         set_lockup_detected_for_all_cpus(h, 0);
7301
7302         rc = hpsa_pci_init(h);
7303         if (rc != 0)
7304                 goto clean1;
7305
7306         sprintf(h->devname, HPSA "%d", number_of_controllers);
7307         h->ctlr = number_of_controllers;
7308         number_of_controllers++;
7309
7310         /* configure PCI DMA stuff */
7311         rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
7312         if (rc == 0) {
7313                 dac = 1;
7314         } else {
7315                 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
7316                 if (rc == 0) {
7317                         dac = 0;
7318                 } else {
7319                         dev_err(&pdev->dev, "no suitable DMA available\n");
7320                         goto clean1;
7321                 }
7322         }
7323
7324         /* make sure the board interrupts are off */
7325         h->access.set_intr_mask(h, HPSA_INTR_OFF);
7326
7327         if (hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
7328                 goto clean2;
7329         dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
7330                h->devname, pdev->device,
7331                h->intr[h->intr_mode], dac ? "" : " not");
7332         rc = hpsa_alloc_cmd_pool(h);
7333         if (rc)
7334                 goto clean2_and_free_irqs;
7335         if (hpsa_allocate_sg_chain_blocks(h))
7336                 goto clean4;
7337         init_waitqueue_head(&h->scan_wait_queue);
7338         init_waitqueue_head(&h->abort_cmd_wait_queue);
7339         h->scan_finished = 1; /* no scan currently in progress */
7340
7341         pci_set_drvdata(pdev, h);
7342         h->ndevices = 0;
7343         h->hba_mode_enabled = 0;
7344         h->scsi_host = NULL;
7345         spin_lock_init(&h->devlock);
7346         hpsa_put_ctlr_into_performant_mode(h);
7347
7348         /* At this point, the controller is ready to take commands.
7349          * Now, if reset_devices and the hard reset didn't work, try
7350          * the soft reset and see if that works.
7351          */
7352         if (try_soft_reset) {
7353
7354                 /* This is kind of gross.  We may or may not get a completion
7355                  * from the soft reset command, and if we do, then the value
7356                  * from the fifo may or may not be valid.  So, we wait 10 secs
7357                  * after the reset throwing away any completions we get during
7358                  * that time.  Unregister the interrupt handler and register
7359                  * fake ones to scoop up any residual completions.
7360                  */
7361                 spin_lock_irqsave(&h->lock, flags);
7362                 h->access.set_intr_mask(h, HPSA_INTR_OFF);
7363                 spin_unlock_irqrestore(&h->lock, flags);
7364                 hpsa_free_irqs(h);
7365                 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions,
7366                                         hpsa_intx_discard_completions);
7367                 if (rc) {
7368                         dev_warn(&h->pdev->dev,
7369                                 "Failed to request_irq after soft reset.\n");
7370                         goto clean4;
7371                 }
7372
7373                 rc = hpsa_kdump_soft_reset(h);
7374                 if (rc)
7375                         /* Neither hard nor soft reset worked, we're hosed. */
7376                         goto clean4;
7377
7378                 dev_info(&h->pdev->dev, "Board READY.\n");
7379                 dev_info(&h->pdev->dev,
7380                         "Waiting for stale completions to drain.\n");
7381                 h->access.set_intr_mask(h, HPSA_INTR_ON);
7382                 msleep(10000);
7383                 h->access.set_intr_mask(h, HPSA_INTR_OFF);
7384
7385                 rc = controller_reset_failed(h->cfgtable);
7386                 if (rc)
7387                         dev_info(&h->pdev->dev,
7388                                 "Soft reset appears to have failed.\n");
7389
7390                 /* since the controller's reset, we have to go back and re-init
7391                  * everything.  Easiest to just forget what we've done and do it
7392                  * all over again.
7393                  */
7394                 hpsa_undo_allocations_after_kdump_soft_reset(h);
7395                 try_soft_reset = 0;
7396                 if (rc)
7397                         /* don't go to clean4, we already unallocated */
7398                         return -ENODEV;
7399
7400                 goto reinit_after_soft_reset;
7401         }
7402
7403                 /* Enable Accelerated IO path at driver layer */
7404                 h->acciopath_status = 1;
7405
7406
7407         /* Turn the interrupts on so we can service requests */
7408         h->access.set_intr_mask(h, HPSA_INTR_ON);
7409
7410         hpsa_hba_inquiry(h);
7411         hpsa_register_scsi(h);  /* hook ourselves into SCSI subsystem */
7412
7413         /* Monitor the controller for firmware lockups */
7414         h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
7415         INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
7416         schedule_delayed_work(&h->monitor_ctlr_work,
7417                                 h->heartbeat_sample_interval);
7418         INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker);
7419         queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work,
7420                                 h->heartbeat_sample_interval);
7421         return 0;
7422
7423 clean4:
7424         hpsa_free_sg_chain_blocks(h);
7425         hpsa_free_cmd_pool(h);
7426 clean2_and_free_irqs:
7427         hpsa_free_irqs(h);
7428 clean2:
7429 clean1:
7430         if (h->resubmit_wq)
7431                 destroy_workqueue(h->resubmit_wq);
7432         if (h->rescan_ctlr_wq)
7433                 destroy_workqueue(h->rescan_ctlr_wq);
7434         if (h->lockup_detected)
7435                 free_percpu(h->lockup_detected);
7436         kfree(h);
7437         return rc;
7438 }
7439
7440 static void hpsa_flush_cache(struct ctlr_info *h)
7441 {
7442         char *flush_buf;
7443         struct CommandList *c;
7444         int rc;
7445
7446         /* Don't bother trying to flush the cache if locked up */
7447         /* FIXME not necessary if do_simple_cmd does the check */
7448         if (unlikely(lockup_detected(h)))
7449                 return;
7450         flush_buf = kzalloc(4, GFP_KERNEL);
7451         if (!flush_buf)
7452                 return;
7453
7454         c = cmd_alloc(h);
7455         if (!c) {
7456                 dev_warn(&h->pdev->dev, "cmd_alloc returned NULL!\n");
7457                 goto out_of_memory;
7458         }
7459         if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
7460                 RAID_CTLR_LUNID, TYPE_CMD)) {
7461                 goto out;
7462         }
7463         rc = hpsa_scsi_do_simple_cmd_with_retry(h, c,
7464                                         PCI_DMA_TODEVICE, NO_TIMEOUT);
7465         if (rc)
7466                 goto out;
7467         if (c->err_info->CommandStatus != 0)
7468 out:
7469                 dev_warn(&h->pdev->dev,
7470                         "error flushing cache on controller\n");
7471         cmd_free(h, c);
7472 out_of_memory:
7473         kfree(flush_buf);
7474 }
7475
7476 static void hpsa_shutdown(struct pci_dev *pdev)
7477 {
7478         struct ctlr_info *h;
7479
7480         h = pci_get_drvdata(pdev);
7481         /* Turn board interrupts off  and send the flush cache command
7482          * sendcmd will turn off interrupt, and send the flush...
7483          * To write all data in the battery backed cache to disks
7484          */
7485         hpsa_flush_cache(h);
7486         h->access.set_intr_mask(h, HPSA_INTR_OFF);
7487         hpsa_free_irqs_and_disable_msix(h);
7488 }
7489
7490 static void hpsa_free_device_info(struct ctlr_info *h)
7491 {
7492         int i;
7493
7494         for (i = 0; i < h->ndevices; i++)
7495                 kfree(h->dev[i]);
7496 }
7497
7498 static void hpsa_remove_one(struct pci_dev *pdev)
7499 {
7500         struct ctlr_info *h;
7501         unsigned long flags;
7502
7503         if (pci_get_drvdata(pdev) == NULL) {
7504                 dev_err(&pdev->dev, "unable to remove device\n");
7505                 return;
7506         }
7507         h = pci_get_drvdata(pdev);
7508
7509         /* Get rid of any controller monitoring work items */
7510         spin_lock_irqsave(&h->lock, flags);
7511         h->remove_in_progress = 1;
7512         spin_unlock_irqrestore(&h->lock, flags);
7513         cancel_delayed_work_sync(&h->monitor_ctlr_work);
7514         cancel_delayed_work_sync(&h->rescan_ctlr_work);
7515         destroy_workqueue(h->rescan_ctlr_wq);
7516         destroy_workqueue(h->resubmit_wq);
7517         hpsa_unregister_scsi(h);        /* unhook from SCSI subsystem */
7518         hpsa_shutdown(pdev);
7519         iounmap(h->vaddr);
7520         iounmap(h->transtable);
7521         iounmap(h->cfgtable);
7522         hpsa_free_device_info(h);
7523         hpsa_free_sg_chain_blocks(h);
7524         pci_free_consistent(h->pdev,
7525                 h->nr_cmds * sizeof(struct CommandList),
7526                 h->cmd_pool, h->cmd_pool_dhandle);
7527         pci_free_consistent(h->pdev,
7528                 h->nr_cmds * sizeof(struct ErrorInfo),
7529                 h->errinfo_pool, h->errinfo_pool_dhandle);
7530         hpsa_free_reply_queues(h);
7531         kfree(h->cmd_pool_bits);
7532         kfree(h->blockFetchTable);
7533         kfree(h->ioaccel1_blockFetchTable);
7534         kfree(h->ioaccel2_blockFetchTable);
7535         kfree(h->hba_inquiry_data);
7536         pci_disable_device(pdev);
7537         pci_release_regions(pdev);
7538         free_percpu(h->lockup_detected);
7539         kfree(h);
7540 }
7541
7542 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
7543         __attribute__((unused)) pm_message_t state)
7544 {
7545         return -ENOSYS;
7546 }
7547
7548 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
7549 {
7550         return -ENOSYS;
7551 }
7552
7553 static struct pci_driver hpsa_pci_driver = {
7554         .name = HPSA,
7555         .probe = hpsa_init_one,
7556         .remove = hpsa_remove_one,
7557         .id_table = hpsa_pci_device_id, /* id_table */
7558         .shutdown = hpsa_shutdown,
7559         .suspend = hpsa_suspend,
7560         .resume = hpsa_resume,
7561 };
7562
7563 /* Fill in bucket_map[], given nsgs (the max number of
7564  * scatter gather elements supported) and bucket[],
7565  * which is an array of 8 integers.  The bucket[] array
7566  * contains 8 different DMA transfer sizes (in 16
7567  * byte increments) which the controller uses to fetch
7568  * commands.  This function fills in bucket_map[], which
7569  * maps a given number of scatter gather elements to one of
7570  * the 8 DMA transfer sizes.  The point of it is to allow the
7571  * controller to only do as much DMA as needed to fetch the
7572  * command, with the DMA transfer size encoded in the lower
7573  * bits of the command address.
7574  */
7575 static void  calc_bucket_map(int bucket[], int num_buckets,
7576         int nsgs, int min_blocks, u32 *bucket_map)
7577 {
7578         int i, j, b, size;
7579
7580         /* Note, bucket_map must have nsgs+1 entries. */
7581         for (i = 0; i <= nsgs; i++) {
7582                 /* Compute size of a command with i SG entries */
7583                 size = i + min_blocks;
7584                 b = num_buckets; /* Assume the biggest bucket */
7585                 /* Find the bucket that is just big enough */
7586                 for (j = 0; j < num_buckets; j++) {
7587                         if (bucket[j] >= size) {
7588                                 b = j;
7589                                 break;
7590                         }
7591                 }
7592                 /* for a command with i SG entries, use bucket b. */
7593                 bucket_map[i] = b;
7594         }
7595 }
7596
7597 /* return -ENODEV or other reason on error, 0 on success */
7598 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
7599 {
7600         int i;
7601         unsigned long register_value;
7602         unsigned long transMethod = CFGTBL_Trans_Performant |
7603                         (trans_support & CFGTBL_Trans_use_short_tags) |
7604                                 CFGTBL_Trans_enable_directed_msix |
7605                         (trans_support & (CFGTBL_Trans_io_accel1 |
7606                                 CFGTBL_Trans_io_accel2));
7607         struct access_method access = SA5_performant_access;
7608
7609         /* This is a bit complicated.  There are 8 registers on
7610          * the controller which we write to to tell it 8 different
7611          * sizes of commands which there may be.  It's a way of
7612          * reducing the DMA done to fetch each command.  Encoded into
7613          * each command's tag are 3 bits which communicate to the controller
7614          * which of the eight sizes that command fits within.  The size of
7615          * each command depends on how many scatter gather entries there are.
7616          * Each SG entry requires 16 bytes.  The eight registers are programmed
7617          * with the number of 16-byte blocks a command of that size requires.
7618          * The smallest command possible requires 5 such 16 byte blocks.
7619          * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
7620          * blocks.  Note, this only extends to the SG entries contained
7621          * within the command block, and does not extend to chained blocks
7622          * of SG elements.   bft[] contains the eight values we write to
7623          * the registers.  They are not evenly distributed, but have more
7624          * sizes for small commands, and fewer sizes for larger commands.
7625          */
7626         int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
7627 #define MIN_IOACCEL2_BFT_ENTRY 5
7628 #define HPSA_IOACCEL2_HEADER_SZ 4
7629         int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
7630                         13, 14, 15, 16, 17, 18, 19,
7631                         HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
7632         BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
7633         BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
7634         BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
7635                                  16 * MIN_IOACCEL2_BFT_ENTRY);
7636         BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
7637         BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
7638         /*  5 = 1 s/g entry or 4k
7639          *  6 = 2 s/g entry or 8k
7640          *  8 = 4 s/g entry or 16k
7641          * 10 = 6 s/g entry or 24k
7642          */
7643
7644         /* If the controller supports either ioaccel method then
7645          * we can also use the RAID stack submit path that does not
7646          * perform the superfluous readl() after each command submission.
7647          */
7648         if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
7649                 access = SA5_performant_access_no_read;
7650
7651         /* Controller spec: zero out this buffer. */
7652         for (i = 0; i < h->nreply_queues; i++)
7653                 memset(h->reply_queue[i].head, 0, h->reply_queue_size);
7654
7655         bft[7] = SG_ENTRIES_IN_CMD + 4;
7656         calc_bucket_map(bft, ARRAY_SIZE(bft),
7657                                 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
7658         for (i = 0; i < 8; i++)
7659                 writel(bft[i], &h->transtable->BlockFetch[i]);
7660
7661         /* size of controller ring buffer */
7662         writel(h->max_commands, &h->transtable->RepQSize);
7663         writel(h->nreply_queues, &h->transtable->RepQCount);
7664         writel(0, &h->transtable->RepQCtrAddrLow32);
7665         writel(0, &h->transtable->RepQCtrAddrHigh32);
7666
7667         for (i = 0; i < h->nreply_queues; i++) {
7668                 writel(0, &h->transtable->RepQAddr[i].upper);
7669                 writel(h->reply_queue[i].busaddr,
7670                         &h->transtable->RepQAddr[i].lower);
7671         }
7672
7673         writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
7674         writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
7675         /*
7676          * enable outbound interrupt coalescing in accelerator mode;
7677          */
7678         if (trans_support & CFGTBL_Trans_io_accel1) {
7679                 access = SA5_ioaccel_mode1_access;
7680                 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
7681                 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
7682         } else {
7683                 if (trans_support & CFGTBL_Trans_io_accel2) {
7684                         access = SA5_ioaccel_mode2_access;
7685                         writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
7686                         writel(4, &h->cfgtable->HostWrite.CoalIntCount);
7687                 }
7688         }
7689         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7690         if (hpsa_wait_for_mode_change_ack(h)) {
7691                 dev_err(&h->pdev->dev,
7692                         "performant mode problem - doorbell timeout\n");
7693                 return -ENODEV;
7694         }
7695         register_value = readl(&(h->cfgtable->TransportActive));
7696         if (!(register_value & CFGTBL_Trans_Performant)) {
7697                 dev_err(&h->pdev->dev,
7698                         "performant mode problem - transport not active\n");
7699                 return -ENODEV;
7700         }
7701         /* Change the access methods to the performant access methods */
7702         h->access = access;
7703         h->transMethod = transMethod;
7704
7705         if (!((trans_support & CFGTBL_Trans_io_accel1) ||
7706                 (trans_support & CFGTBL_Trans_io_accel2)))
7707                 return 0;
7708
7709         if (trans_support & CFGTBL_Trans_io_accel1) {
7710                 /* Set up I/O accelerator mode */
7711                 for (i = 0; i < h->nreply_queues; i++) {
7712                         writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
7713                         h->reply_queue[i].current_entry =
7714                                 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
7715                 }
7716                 bft[7] = h->ioaccel_maxsg + 8;
7717                 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
7718                                 h->ioaccel1_blockFetchTable);
7719
7720                 /* initialize all reply queue entries to unused */
7721                 for (i = 0; i < h->nreply_queues; i++)
7722                         memset(h->reply_queue[i].head,
7723                                 (u8) IOACCEL_MODE1_REPLY_UNUSED,
7724                                 h->reply_queue_size);
7725
7726                 /* set all the constant fields in the accelerator command
7727                  * frames once at init time to save CPU cycles later.
7728                  */
7729                 for (i = 0; i < h->nr_cmds; i++) {
7730                         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
7731
7732                         cp->function = IOACCEL1_FUNCTION_SCSIIO;
7733                         cp->err_info = (u32) (h->errinfo_pool_dhandle +
7734                                         (i * sizeof(struct ErrorInfo)));
7735                         cp->err_info_len = sizeof(struct ErrorInfo);
7736                         cp->sgl_offset = IOACCEL1_SGLOFFSET;
7737                         cp->host_context_flags =
7738                                 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT);
7739                         cp->timeout_sec = 0;
7740                         cp->ReplyQueue = 0;
7741                         cp->tag =
7742                                 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT));
7743                         cp->host_addr =
7744                                 cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
7745                                         (i * sizeof(struct io_accel1_cmd)));
7746                 }
7747         } else if (trans_support & CFGTBL_Trans_io_accel2) {
7748                 u64 cfg_offset, cfg_base_addr_index;
7749                 u32 bft2_offset, cfg_base_addr;
7750                 int rc;
7751
7752                 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7753                         &cfg_base_addr_index, &cfg_offset);
7754                 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
7755                 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
7756                 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
7757                                 4, h->ioaccel2_blockFetchTable);
7758                 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
7759                 BUILD_BUG_ON(offsetof(struct CfgTable,
7760                                 io_accel_request_size_offset) != 0xb8);
7761                 h->ioaccel2_bft2_regs =
7762                         remap_pci_mem(pci_resource_start(h->pdev,
7763                                         cfg_base_addr_index) +
7764                                         cfg_offset + bft2_offset,
7765                                         ARRAY_SIZE(bft2) *
7766                                         sizeof(*h->ioaccel2_bft2_regs));
7767                 for (i = 0; i < ARRAY_SIZE(bft2); i++)
7768                         writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
7769         }
7770         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7771         if (hpsa_wait_for_mode_change_ack(h)) {
7772                 dev_err(&h->pdev->dev,
7773                         "performant mode problem - enabling ioaccel mode\n");
7774                 return -ENODEV;
7775         }
7776         return 0;
7777 }
7778
7779 /* Allocate ioaccel1 mode command blocks and block fetch table */
7780 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h)
7781 {
7782         h->ioaccel_maxsg =
7783                 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
7784         if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
7785                 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
7786
7787         /* Command structures must be aligned on a 128-byte boundary
7788          * because the 7 lower bits of the address are used by the
7789          * hardware.
7790          */
7791         BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
7792                         IOACCEL1_COMMANDLIST_ALIGNMENT);
7793         h->ioaccel_cmd_pool =
7794                 pci_alloc_consistent(h->pdev,
7795                         h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
7796                         &(h->ioaccel_cmd_pool_dhandle));
7797
7798         h->ioaccel1_blockFetchTable =
7799                 kmalloc(((h->ioaccel_maxsg + 1) *
7800                                 sizeof(u32)), GFP_KERNEL);
7801
7802         if ((h->ioaccel_cmd_pool == NULL) ||
7803                 (h->ioaccel1_blockFetchTable == NULL))
7804                 goto clean_up;
7805
7806         memset(h->ioaccel_cmd_pool, 0,
7807                 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
7808         return 0;
7809
7810 clean_up:
7811         if (h->ioaccel_cmd_pool)
7812                 pci_free_consistent(h->pdev,
7813                         h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
7814                         h->ioaccel_cmd_pool, h->ioaccel_cmd_pool_dhandle);
7815         kfree(h->ioaccel1_blockFetchTable);
7816         return 1;
7817 }
7818
7819 /* Allocate ioaccel2 mode command blocks and block fetch table */
7820 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h)
7821 {
7822         /* Allocate ioaccel2 mode command blocks and block fetch table */
7823
7824         h->ioaccel_maxsg =
7825                 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
7826         if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
7827                 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
7828
7829         BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
7830                         IOACCEL2_COMMANDLIST_ALIGNMENT);
7831         h->ioaccel2_cmd_pool =
7832                 pci_alloc_consistent(h->pdev,
7833                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
7834                         &(h->ioaccel2_cmd_pool_dhandle));
7835
7836         h->ioaccel2_blockFetchTable =
7837                 kmalloc(((h->ioaccel_maxsg + 1) *
7838                                 sizeof(u32)), GFP_KERNEL);
7839
7840         if ((h->ioaccel2_cmd_pool == NULL) ||
7841                 (h->ioaccel2_blockFetchTable == NULL))
7842                 goto clean_up;
7843
7844         memset(h->ioaccel2_cmd_pool, 0,
7845                 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
7846         return 0;
7847
7848 clean_up:
7849         if (h->ioaccel2_cmd_pool)
7850                 pci_free_consistent(h->pdev,
7851                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
7852                         h->ioaccel2_cmd_pool, h->ioaccel2_cmd_pool_dhandle);
7853         kfree(h->ioaccel2_blockFetchTable);
7854         return 1;
7855 }
7856
7857 static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
7858 {
7859         u32 trans_support;
7860         unsigned long transMethod = CFGTBL_Trans_Performant |
7861                                         CFGTBL_Trans_use_short_tags;
7862         int i;
7863
7864         if (hpsa_simple_mode)
7865                 return;
7866
7867         trans_support = readl(&(h->cfgtable->TransportSupport));
7868         if (!(trans_support & PERFORMANT_MODE))
7869                 return;
7870
7871         /* Check for I/O accelerator mode support */
7872         if (trans_support & CFGTBL_Trans_io_accel1) {
7873                 transMethod |= CFGTBL_Trans_io_accel1 |
7874                                 CFGTBL_Trans_enable_directed_msix;
7875                 if (hpsa_alloc_ioaccel1_cmd_and_bft(h))
7876                         goto clean_up;
7877         } else {
7878                 if (trans_support & CFGTBL_Trans_io_accel2) {
7879                                 transMethod |= CFGTBL_Trans_io_accel2 |
7880                                 CFGTBL_Trans_enable_directed_msix;
7881                 if (hpsa_alloc_ioaccel2_cmd_and_bft(h))
7882                         goto clean_up;
7883                 }
7884         }
7885
7886         h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1;
7887         hpsa_get_max_perf_mode_cmds(h);
7888         /* Performant mode ring buffer and supporting data structures */
7889         h->reply_queue_size = h->max_commands * sizeof(u64);
7890
7891         for (i = 0; i < h->nreply_queues; i++) {
7892                 h->reply_queue[i].head = pci_alloc_consistent(h->pdev,
7893                                                 h->reply_queue_size,
7894                                                 &(h->reply_queue[i].busaddr));
7895                 if (!h->reply_queue[i].head)
7896                         goto clean_up;
7897                 h->reply_queue[i].size = h->max_commands;
7898                 h->reply_queue[i].wraparound = 1;  /* spec: init to 1 */
7899                 h->reply_queue[i].current_entry = 0;
7900         }
7901
7902         /* Need a block fetch table for performant mode */
7903         h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
7904                                 sizeof(u32)), GFP_KERNEL);
7905         if (!h->blockFetchTable)
7906                 goto clean_up;
7907
7908         hpsa_enter_performant_mode(h, trans_support);
7909         return;
7910
7911 clean_up:
7912         hpsa_free_reply_queues(h);
7913         kfree(h->blockFetchTable);
7914 }
7915
7916 static int is_accelerated_cmd(struct CommandList *c)
7917 {
7918         return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
7919 }
7920
7921 static void hpsa_drain_accel_commands(struct ctlr_info *h)
7922 {
7923         struct CommandList *c = NULL;
7924         int i, accel_cmds_out;
7925         int refcount;
7926
7927         do { /* wait for all outstanding ioaccel commands to drain out */
7928                 accel_cmds_out = 0;
7929                 for (i = 0; i < h->nr_cmds; i++) {
7930                         c = h->cmd_pool + i;
7931                         refcount = atomic_inc_return(&c->refcount);
7932                         if (refcount > 1) /* Command is allocated */
7933                                 accel_cmds_out += is_accelerated_cmd(c);
7934                         cmd_free(h, c);
7935                 }
7936                 if (accel_cmds_out <= 0)
7937                         break;
7938                 msleep(100);
7939         } while (1);
7940 }
7941
7942 /*
7943  *  This is it.  Register the PCI driver information for the cards we control
7944  *  the OS will call our registered routines when it finds one of our cards.
7945  */
7946 static int __init hpsa_init(void)
7947 {
7948         return pci_register_driver(&hpsa_pci_driver);
7949 }
7950
7951 static void __exit hpsa_cleanup(void)
7952 {
7953         pci_unregister_driver(&hpsa_pci_driver);
7954 }
7955
7956 static void __attribute__((unused)) verify_offsets(void)
7957 {
7958 #define VERIFY_OFFSET(member, offset) \
7959         BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
7960
7961         VERIFY_OFFSET(structure_size, 0);
7962         VERIFY_OFFSET(volume_blk_size, 4);
7963         VERIFY_OFFSET(volume_blk_cnt, 8);
7964         VERIFY_OFFSET(phys_blk_shift, 16);
7965         VERIFY_OFFSET(parity_rotation_shift, 17);
7966         VERIFY_OFFSET(strip_size, 18);
7967         VERIFY_OFFSET(disk_starting_blk, 20);
7968         VERIFY_OFFSET(disk_blk_cnt, 28);
7969         VERIFY_OFFSET(data_disks_per_row, 36);
7970         VERIFY_OFFSET(metadata_disks_per_row, 38);
7971         VERIFY_OFFSET(row_cnt, 40);
7972         VERIFY_OFFSET(layout_map_count, 42);
7973         VERIFY_OFFSET(flags, 44);
7974         VERIFY_OFFSET(dekindex, 46);
7975         /* VERIFY_OFFSET(reserved, 48 */
7976         VERIFY_OFFSET(data, 64);
7977
7978 #undef VERIFY_OFFSET
7979
7980 #define VERIFY_OFFSET(member, offset) \
7981         BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
7982
7983         VERIFY_OFFSET(IU_type, 0);
7984         VERIFY_OFFSET(direction, 1);
7985         VERIFY_OFFSET(reply_queue, 2);
7986         /* VERIFY_OFFSET(reserved1, 3);  */
7987         VERIFY_OFFSET(scsi_nexus, 4);
7988         VERIFY_OFFSET(Tag, 8);
7989         VERIFY_OFFSET(cdb, 16);
7990         VERIFY_OFFSET(cciss_lun, 32);
7991         VERIFY_OFFSET(data_len, 40);
7992         VERIFY_OFFSET(cmd_priority_task_attr, 44);
7993         VERIFY_OFFSET(sg_count, 45);
7994         /* VERIFY_OFFSET(reserved3 */
7995         VERIFY_OFFSET(err_ptr, 48);
7996         VERIFY_OFFSET(err_len, 56);
7997         /* VERIFY_OFFSET(reserved4  */
7998         VERIFY_OFFSET(sg, 64);
7999
8000 #undef VERIFY_OFFSET
8001
8002 #define VERIFY_OFFSET(member, offset) \
8003         BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
8004
8005         VERIFY_OFFSET(dev_handle, 0x00);
8006         VERIFY_OFFSET(reserved1, 0x02);
8007         VERIFY_OFFSET(function, 0x03);
8008         VERIFY_OFFSET(reserved2, 0x04);
8009         VERIFY_OFFSET(err_info, 0x0C);
8010         VERIFY_OFFSET(reserved3, 0x10);
8011         VERIFY_OFFSET(err_info_len, 0x12);
8012         VERIFY_OFFSET(reserved4, 0x13);
8013         VERIFY_OFFSET(sgl_offset, 0x14);
8014         VERIFY_OFFSET(reserved5, 0x15);
8015         VERIFY_OFFSET(transfer_len, 0x1C);
8016         VERIFY_OFFSET(reserved6, 0x20);
8017         VERIFY_OFFSET(io_flags, 0x24);
8018         VERIFY_OFFSET(reserved7, 0x26);
8019         VERIFY_OFFSET(LUN, 0x34);
8020         VERIFY_OFFSET(control, 0x3C);
8021         VERIFY_OFFSET(CDB, 0x40);
8022         VERIFY_OFFSET(reserved8, 0x50);
8023         VERIFY_OFFSET(host_context_flags, 0x60);
8024         VERIFY_OFFSET(timeout_sec, 0x62);
8025         VERIFY_OFFSET(ReplyQueue, 0x64);
8026         VERIFY_OFFSET(reserved9, 0x65);
8027         VERIFY_OFFSET(tag, 0x68);
8028         VERIFY_OFFSET(host_addr, 0x70);
8029         VERIFY_OFFSET(CISS_LUN, 0x78);
8030         VERIFY_OFFSET(SG, 0x78 + 8);
8031 #undef VERIFY_OFFSET
8032 }
8033
8034 module_init(hpsa_init);
8035 module_exit(hpsa_cleanup);