drivers/scsi/hpsa.c

   1 /*
   2  *    Disk Array driver for HP Smart Array SAS controllers
   3  *    Copyright 2000, 2014 Hewlett-Packard Development Company, L.P.
   4  *
   5  *    This program is free software; you can redistribute it and/or modify
   6  *    it under the terms of the GNU General Public License as published by
   7  *    the Free Software Foundation; version 2 of the License.
   8  *
   9  *    This program is distributed in the hope that it will be useful,
  10  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
  13  *
  14  *    You should have received a copy of the GNU General Public License
  15  *    along with this program; if not, write to the Free Software
  16  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17  *
  18  *    Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19  *
  20  */
  21
  22 #include <linux/module.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/types.h>
  25 #include <linux/pci.h>
  26 #include <linux/pci-aspm.h>
  27 #include <linux/kernel.h>
  28 #include <linux/slab.h>
  29 #include <linux/delay.h>
  30 #include <linux/fs.h>
  31 #include <linux/timer.h>
  32 #include <linux/init.h>
  33 #include <linux/spinlock.h>
  34 #include <linux/compat.h>
  35 #include <linux/blktrace_api.h>
  36 #include <linux/uaccess.h>
  37 #include <linux/io.h>
  38 #include <linux/dma-mapping.h>
  39 #include <linux/completion.h>
  40 #include <linux/moduleparam.h>
  41 #include <scsi/scsi.h>
  42 #include <scsi/scsi_cmnd.h>
  43 #include <scsi/scsi_device.h>
  44 #include <scsi/scsi_host.h>
  45 #include <scsi/scsi_tcq.h>
  46 #include <linux/cciss_ioctl.h>
  47 #include <linux/string.h>
  48 #include <linux/bitmap.h>
  49 #include <linux/atomic.h>
  50 #include <linux/jiffies.h>
  51 #include <linux/percpu-defs.h>
  52 #include <linux/percpu.h>
  53 #include <asm/div64.h>
  54 #include "hpsa_cmd.h"
  55 #include "hpsa.h"
  56
  57 /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  58 #define HPSA_DRIVER_VERSION "3.4.4-1"
  59 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  60 #define HPSA "hpsa"
  61
  62 /* How long to wait (in milliseconds) for board to go into simple mode */
  63 #define MAX_CONFIG_WAIT 30000
  64 #define MAX_IOCTL_CONFIG_WAIT 1000
  65
  66 /*define how many times we will try a command because of bus resets */
  67 #define MAX_CMD_RETRIES 3
  68
  69 /* Embedded module documentation macros - see modules.h */
  70 MODULE_AUTHOR("Hewlett-Packard Company");
  71 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  72         HPSA_DRIVER_VERSION);
  73 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  74 MODULE_VERSION(HPSA_DRIVER_VERSION);
  75 MODULE_LICENSE("GPL");
  76
  77 static int hpsa_allow_any;
  78 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  79 MODULE_PARM_DESC(hpsa_allow_any,
  80                 "Allow hpsa driver to access unknown HP Smart Array hardware");
  81 static int hpsa_simple_mode;
  82 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
  83 MODULE_PARM_DESC(hpsa_simple_mode,
  84         "Use 'simple mode' rather than 'performant mode'");
  85
  86 /* define the PCI info for the cards we can control */
  87 static const struct pci_device_id hpsa_pci_device_id[] = {
  88         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3241},
  89         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3243},
  90         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3245},
  91         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3247},
  92         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3249},
  93         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324A},
  94         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324B},
  95         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3233},
  96         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3350},
  97         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3351},
  98         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3352},
  99         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3353},
 100         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3354},
 101         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3355},
 102         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3356},
 103         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1921},
 104         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1922},
 105         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1923},
 106         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1924},
 107         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1926},
 108         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1928},
 109         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1929},
 110         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BD},
 111         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BE},
 112         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BF},
 113         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C0},
 114         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C1},
 115         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C2},
 116         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C3},
 117         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C4},
 118         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C5},
 119         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C6},
 120         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C7},
 121         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C8},
 122         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C9},
 123         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CA},
 124         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CB},
 125         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CC},
 126         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CD},
 127         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CE},
 128         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
 129         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
 130         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
 131         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
 132         {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
 133         {PCI_VENDOR_ID_HP,     PCI_ANY_ID,      PCI_ANY_ID, PCI_ANY_ID,
 134                 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
 135         {0,}
 136 };
 137
 138 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
 139
 140 /*  board_id = Subsystem Device ID & Vendor ID
 141  *  product = Marketing Name for the board
 142  *  access = Address of the struct of function pointers
 143  */
 144 static struct board_type products[] = {
 145         {0x3241103C, "Smart Array P212", &SA5_access},
 146         {0x3243103C, "Smart Array P410", &SA5_access},
 147         {0x3245103C, "Smart Array P410i", &SA5_access},
 148         {0x3247103C, "Smart Array P411", &SA5_access},
 149         {0x3249103C, "Smart Array P812", &SA5_access},
 150         {0x324A103C, "Smart Array P712m", &SA5_access},
 151         {0x324B103C, "Smart Array P711m", &SA5_access},
 152         {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */
 153         {0x3350103C, "Smart Array P222", &SA5_access},
 154         {0x3351103C, "Smart Array P420", &SA5_access},
 155         {0x3352103C, "Smart Array P421", &SA5_access},
 156         {0x3353103C, "Smart Array P822", &SA5_access},
 157         {0x3354103C, "Smart Array P420i", &SA5_access},
 158         {0x3355103C, "Smart Array P220i", &SA5_access},
 159         {0x3356103C, "Smart Array P721m", &SA5_access},
 160         {0x1921103C, "Smart Array P830i", &SA5_access},
 161         {0x1922103C, "Smart Array P430", &SA5_access},
 162         {0x1923103C, "Smart Array P431", &SA5_access},
 163         {0x1924103C, "Smart Array P830", &SA5_access},
 164         {0x1926103C, "Smart Array P731m", &SA5_access},
 165         {0x1928103C, "Smart Array P230i", &SA5_access},
 166         {0x1929103C, "Smart Array P530", &SA5_access},
 167         {0x21BD103C, "Smart Array", &SA5_access},
 168         {0x21BE103C, "Smart Array", &SA5_access},
 169         {0x21BF103C, "Smart Array", &SA5_access},
 170         {0x21C0103C, "Smart Array", &SA5_access},
 171         {0x21C1103C, "Smart Array", &SA5_access},
 172         {0x21C2103C, "Smart Array", &SA5_access},
 173         {0x21C3103C, "Smart Array", &SA5_access},
 174         {0x21C4103C, "Smart Array", &SA5_access},
 175         {0x21C5103C, "Smart Array", &SA5_access},
 176         {0x21C6103C, "Smart Array", &SA5_access},
 177         {0x21C7103C, "Smart Array", &SA5_access},
 178         {0x21C8103C, "Smart Array", &SA5_access},
 179         {0x21C9103C, "Smart Array", &SA5_access},
 180         {0x21CA103C, "Smart Array", &SA5_access},
 181         {0x21CB103C, "Smart Array", &SA5_access},
 182         {0x21CC103C, "Smart Array", &SA5_access},
 183         {0x21CD103C, "Smart Array", &SA5_access},
 184         {0x21CE103C, "Smart Array", &SA5_access},
 185         {0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
 186         {0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
 187         {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
 188         {0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
 189         {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
 190         {0xFFFF103C, "Unknown Smart Array", &SA5_access},
 191 };
 192
 193 static int number_of_controllers;
 194
 195 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
 196 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
 197 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
 198 static void lock_and_start_io(struct ctlr_info *h);
 199 static void start_io(struct ctlr_info *h, unsigned long *flags);
 200
 201 #ifdef CONFIG_COMPAT
 202 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd,
 203         void __user *arg);
 204 #endif
 205
 206 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
 207 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
 208 static struct CommandList *cmd_alloc(struct ctlr_info *h);
 209 static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
 210 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
 211         void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
 212         int cmd_type);
 213 #define VPD_PAGE (1 << 8)
 214
 215 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 216 static void hpsa_scan_start(struct Scsi_Host *);
 217 static int hpsa_scan_finished(struct Scsi_Host *sh,
 218         unsigned long elapsed_time);
 219 static int hpsa_change_queue_depth(struct scsi_device *sdev,
 220         int qdepth, int reason);
 221
 222 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
 223 static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
 224 static int hpsa_slave_alloc(struct scsi_device *sdev);
 225 static void hpsa_slave_destroy(struct scsi_device *sdev);
 226
 227 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
 228 static int check_for_unit_attention(struct ctlr_info *h,
 229         struct CommandList *c);
 230 static void check_ioctl_unit_attention(struct ctlr_info *h,
 231         struct CommandList *c);
 232 /* performant mode helper functions */
 233 static void calc_bucket_map(int *bucket, int num_buckets,
 234         int nsgs, int min_blocks, int *bucket_map);
 235 static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
 236 static inline u32 next_command(struct ctlr_info *h, u8 q);
 237 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
 238                                u32 *cfg_base_addr, u64 *cfg_base_addr_index,
 239                                u64 *cfg_offset);
 240 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
 241                                     unsigned long *memory_bar);
 242 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
 243 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
 244                                      int wait_for_ready);
 245 static inline void finish_cmd(struct CommandList *c);
 246 static void hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
 247 #define BOARD_NOT_READY 0
 248 #define BOARD_READY 1
 249 static void hpsa_drain_accel_commands(struct ctlr_info *h);
 250 static void hpsa_flush_cache(struct ctlr_info *h);
 251 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
 252         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
 253         u8 *scsi3addr);
 254
 255 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
 256 {
 257         unsigned long *priv = shost_priv(sdev->host);
 258         return (struct ctlr_info *) *priv;
 259 }
 260
 261 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
 262 {
 263         unsigned long *priv = shost_priv(sh);
 264         return (struct ctlr_info *) *priv;
 265 }
 266
 267 static int check_for_unit_attention(struct ctlr_info *h,
 268         struct CommandList *c)
 269 {
 270         if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
 271                 return 0;
 272
 273         switch (c->err_info->SenseInfo[12]) {
 274         case STATE_CHANGED:
 275                 dev_warn(&h->pdev->dev, HPSA "%d: a state change "
 276                         "detected, command retried\n", h->ctlr);
 277                 break;
 278         case LUN_FAILED:
 279                 dev_warn(&h->pdev->dev,
 280                         HPSA "%d: LUN failure detected\n", h->ctlr);
 281                 break;
 282         case REPORT_LUNS_CHANGED:
 283                 dev_warn(&h->pdev->dev,
 284                         HPSA "%d: report LUN data changed\n", h->ctlr);
 285         /*
 286          * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
 287          * target (array) devices.
 288          */
 289                 break;
 290         case POWER_OR_RESET:
 291                 dev_warn(&h->pdev->dev, HPSA "%d: a power on "
 292                         "or device reset detected\n", h->ctlr);
 293                 break;
 294         case UNIT_ATTENTION_CLEARED:
 295                 dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
 296                     "cleared by another initiator\n", h->ctlr);
 297                 break;
 298         default:
 299                 dev_warn(&h->pdev->dev, HPSA "%d: unknown "
 300                         "unit attention detected\n", h->ctlr);
 301                 break;
 302         }
 303         return 1;
 304 }
 305
 306 static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
 307 {
 308         if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
 309                 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
 310                  c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
 311                 return 0;
 312         dev_warn(&h->pdev->dev, HPSA "device busy");
 313         return 1;
 314 }
 315
 316 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
 317                                          struct device_attribute *attr,
 318                                          const char *buf, size_t count)
 319 {
 320         int status, len;
 321         struct ctlr_info *h;
 322         struct Scsi_Host *shost = class_to_shost(dev);
 323         char tmpbuf[10];
 324
 325         if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
 326                 return -EACCES;
 327         len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
 328         strncpy(tmpbuf, buf, len);
 329         tmpbuf[len] = '\0';
 330         if (sscanf(tmpbuf, "%d", &status) != 1)
 331                 return -EINVAL;
 332         h = shost_to_hba(shost);
 333         h->acciopath_status = !!status;
 334         dev_warn(&h->pdev->dev,
 335                 "hpsa: HP SSD Smart Path %s via sysfs update.\n",
 336                 h->acciopath_status ? "enabled" : "disabled");
 337         return count;
 338 }
 339
 340 static ssize_t host_store_raid_offload_debug(struct device *dev,
 341                                          struct device_attribute *attr,
 342                                          const char *buf, size_t count)
 343 {
 344         int debug_level, len;
 345         struct ctlr_info *h;
 346         struct Scsi_Host *shost = class_to_shost(dev);
 347         char tmpbuf[10];
 348
 349         if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
 350                 return -EACCES;
 351         len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
 352         strncpy(tmpbuf, buf, len);
 353         tmpbuf[len] = '\0';
 354         if (sscanf(tmpbuf, "%d", &debug_level) != 1)
 355                 return -EINVAL;
 356         if (debug_level < 0)
 357                 debug_level = 0;
 358         h = shost_to_hba(shost);
 359         h->raid_offload_debug = debug_level;
 360         dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
 361                 h->raid_offload_debug);
 362         return count;
 363 }
 364
 365 static ssize_t host_store_rescan(struct device *dev,
 366                                  struct device_attribute *attr,
 367                                  const char *buf, size_t count)
 368 {
 369         struct ctlr_info *h;
 370         struct Scsi_Host *shost = class_to_shost(dev);
 371         h = shost_to_hba(shost);
 372         hpsa_scan_start(h->scsi_host);
 373         return count;
 374 }
 375
 376 static ssize_t host_show_firmware_revision(struct device *dev,
 377              struct device_attribute *attr, char *buf)
 378 {
 379         struct ctlr_info *h;
 380         struct Scsi_Host *shost = class_to_shost(dev);
 381         unsigned char *fwrev;
 382
 383         h = shost_to_hba(shost);
 384         if (!h->hba_inquiry_data)
 385                 return 0;
 386         fwrev = &h->hba_inquiry_data[32];
 387         return snprintf(buf, 20, "%c%c%c%c\n",
 388                 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
 389 }
 390
 391 static ssize_t host_show_commands_outstanding(struct device *dev,
 392              struct device_attribute *attr, char *buf)
 393 {
 394         struct Scsi_Host *shost = class_to_shost(dev);
 395         struct ctlr_info *h = shost_to_hba(shost);
 396
 397         return snprintf(buf, 20, "%d\n",
 398                         atomic_read(&h->commands_outstanding));
 399 }
 400
 401 static ssize_t host_show_transport_mode(struct device *dev,
 402         struct device_attribute *attr, char *buf)
 403 {
 404         struct ctlr_info *h;
 405         struct Scsi_Host *shost = class_to_shost(dev);
 406
 407         h = shost_to_hba(shost);
 408         return snprintf(buf, 20, "%s\n",
 409                 h->transMethod & CFGTBL_Trans_Performant ?
 410                         "performant" : "simple");
 411 }
 412
 413 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
 414         struct device_attribute *attr, char *buf)
 415 {
 416         struct ctlr_info *h;
 417         struct Scsi_Host *shost = class_to_shost(dev);
 418
 419         h = shost_to_hba(shost);
 420         return snprintf(buf, 30, "HP SSD Smart Path %s\n",
 421                 (h->acciopath_status == 1) ?  "enabled" : "disabled");
 422 }
 423
 424 /* List of controllers which cannot be hard reset on kexec with reset_devices */
 425 static u32 unresettable_controller[] = {
 426         0x324a103C, /* Smart Array P712m */
 427         0x324b103C, /* SmartArray P711m */
 428         0x3223103C, /* Smart Array P800 */
 429         0x3234103C, /* Smart Array P400 */
 430         0x3235103C, /* Smart Array P400i */
 431         0x3211103C, /* Smart Array E200i */
 432         0x3212103C, /* Smart Array E200 */
 433         0x3213103C, /* Smart Array E200i */
 434         0x3214103C, /* Smart Array E200i */
 435         0x3215103C, /* Smart Array E200i */
 436         0x3237103C, /* Smart Array E500 */
 437         0x323D103C, /* Smart Array P700m */
 438         0x40800E11, /* Smart Array 5i */
 439         0x409C0E11, /* Smart Array 6400 */
 440         0x409D0E11, /* Smart Array 6400 EM */
 441         0x40700E11, /* Smart Array 5300 */
 442         0x40820E11, /* Smart Array 532 */
 443         0x40830E11, /* Smart Array 5312 */
 444         0x409A0E11, /* Smart Array 641 */
 445         0x409B0E11, /* Smart Array 642 */
 446         0x40910E11, /* Smart Array 6i */
 447 };
 448
 449 /* List of controllers which cannot even be soft reset */
 450 static u32 soft_unresettable_controller[] = {
 451         0x40800E11, /* Smart Array 5i */
 452         0x40700E11, /* Smart Array 5300 */
 453         0x40820E11, /* Smart Array 532 */
 454         0x40830E11, /* Smart Array 5312 */
 455         0x409A0E11, /* Smart Array 641 */
 456         0x409B0E11, /* Smart Array 642 */
 457         0x40910E11, /* Smart Array 6i */
 458         /* Exclude 640x boards.  These are two pci devices in one slot
 459          * which share a battery backed cache module.  One controls the
 460          * cache, the other accesses the cache through the one that controls
 461          * it.  If we reset the one controlling the cache, the other will
 462          * likely not be happy.  Just forbid resetting this conjoined mess.
 463          * The 640x isn't really supported by hpsa anyway.
 464          */
 465         0x409C0E11, /* Smart Array 6400 */
 466         0x409D0E11, /* Smart Array 6400 EM */
 467 };
 468
 469 static int ctlr_is_hard_resettable(u32 board_id)
 470 {
 471         int i;
 472
 473         for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
 474                 if (unresettable_controller[i] == board_id)
 475                         return 0;
 476         return 1;
 477 }
 478
 479 static int ctlr_is_soft_resettable(u32 board_id)
 480 {
 481         int i;
 482
 483         for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
 484                 if (soft_unresettable_controller[i] == board_id)
 485                         return 0;
 486         return 1;
 487 }
 488
 489 static int ctlr_is_resettable(u32 board_id)
 490 {
 491         return ctlr_is_hard_resettable(board_id) ||
 492                 ctlr_is_soft_resettable(board_id);
 493 }
 494
 495 static ssize_t host_show_resettable(struct device *dev,
 496         struct device_attribute *attr, char *buf)
 497 {
 498         struct ctlr_info *h;
 499         struct Scsi_Host *shost = class_to_shost(dev);
 500
 501         h = shost_to_hba(shost);
 502         return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
 503 }
 504
 505 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
 506 {
 507         return (scsi3addr[3] & 0xC0) == 0x40;
 508 }
 509
 510 static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
 511         "1(ADM)", "UNKNOWN"
 512 };
 513 #define HPSA_RAID_0     0
 514 #define HPSA_RAID_4     1
 515 #define HPSA_RAID_1     2       /* also used for RAID 10 */
 516 #define HPSA_RAID_5     3       /* also used for RAID 50 */
 517 #define HPSA_RAID_51    4
 518 #define HPSA_RAID_6     5       /* also used for RAID 60 */
 519 #define HPSA_RAID_ADM   6       /* also used for RAID 1+0 ADM */
 520 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
 521
 522 static ssize_t raid_level_show(struct device *dev,
 523              struct device_attribute *attr, char *buf)
 524 {
 525         ssize_t l = 0;
 526         unsigned char rlevel;
 527         struct ctlr_info *h;
 528         struct scsi_device *sdev;
 529         struct hpsa_scsi_dev_t *hdev;
 530         unsigned long flags;
 531
 532         sdev = to_scsi_device(dev);
 533         h = sdev_to_hba(sdev);
 534         spin_lock_irqsave(&h->lock, flags);
 535         hdev = sdev->hostdata;
 536         if (!hdev) {
 537                 spin_unlock_irqrestore(&h->lock, flags);
 538                 return -ENODEV;
 539         }
 540
 541         /* Is this even a logical drive? */
 542         if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
 543                 spin_unlock_irqrestore(&h->lock, flags);
 544                 l = snprintf(buf, PAGE_SIZE, "N/A\n");
 545                 return l;
 546         }
 547
 548         rlevel = hdev->raid_level;
 549         spin_unlock_irqrestore(&h->lock, flags);
 550         if (rlevel > RAID_UNKNOWN)
 551                 rlevel = RAID_UNKNOWN;
 552         l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
 553         return l;
 554 }
 555
 556 static ssize_t lunid_show(struct device *dev,
 557              struct device_attribute *attr, char *buf)
 558 {
 559         struct ctlr_info *h;
 560         struct scsi_device *sdev;
 561         struct hpsa_scsi_dev_t *hdev;
 562         unsigned long flags;
 563         unsigned char lunid[8];
 564
 565         sdev = to_scsi_device(dev);
 566         h = sdev_to_hba(sdev);
 567         spin_lock_irqsave(&h->lock, flags);
 568         hdev = sdev->hostdata;
 569         if (!hdev) {
 570                 spin_unlock_irqrestore(&h->lock, flags);
 571                 return -ENODEV;
 572         }
 573         memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
 574         spin_unlock_irqrestore(&h->lock, flags);
 575         return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
 576                 lunid[0], lunid[1], lunid[2], lunid[3],
 577                 lunid[4], lunid[5], lunid[6], lunid[7]);
 578 }
 579
 580 static ssize_t unique_id_show(struct device *dev,
 581              struct device_attribute *attr, char *buf)
 582 {
 583         struct ctlr_info *h;
 584         struct scsi_device *sdev;
 585         struct hpsa_scsi_dev_t *hdev;
 586         unsigned long flags;
 587         unsigned char sn[16];
 588
 589         sdev = to_scsi_device(dev);
 590         h = sdev_to_hba(sdev);
 591         spin_lock_irqsave(&h->lock, flags);
 592         hdev = sdev->hostdata;
 593         if (!hdev) {
 594                 spin_unlock_irqrestore(&h->lock, flags);
 595                 return -ENODEV;
 596         }
 597         memcpy(sn, hdev->device_id, sizeof(sn));
 598         spin_unlock_irqrestore(&h->lock, flags);
 599         return snprintf(buf, 16 * 2 + 2,
 600                         "%02X%02X%02X%02X%02X%02X%02X%02X"
 601                         "%02X%02X%02X%02X%02X%02X%02X%02X\n",
 602                         sn[0], sn[1], sn[2], sn[3],
 603                         sn[4], sn[5], sn[6], sn[7],
 604                         sn[8], sn[9], sn[10], sn[11],
 605                         sn[12], sn[13], sn[14], sn[15]);
 606 }
 607
 608 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
 609              struct device_attribute *attr, char *buf)
 610 {
 611         struct ctlr_info *h;
 612         struct scsi_device *sdev;
 613         struct hpsa_scsi_dev_t *hdev;
 614         unsigned long flags;
 615         int offload_enabled;
 616
 617         sdev = to_scsi_device(dev);
 618         h = sdev_to_hba(sdev);
 619         spin_lock_irqsave(&h->lock, flags);
 620         hdev = sdev->hostdata;
 621         if (!hdev) {
 622                 spin_unlock_irqrestore(&h->lock, flags);
 623                 return -ENODEV;
 624         }
 625         offload_enabled = hdev->offload_enabled;
 626         spin_unlock_irqrestore(&h->lock, flags);
 627         return snprintf(buf, 20, "%d\n", offload_enabled);
 628 }
 629
 630 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
 631 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
 632 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
 633 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
 634 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
 635                         host_show_hp_ssd_smart_path_enabled, NULL);
 636 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
 637                 host_show_hp_ssd_smart_path_status,
 638                 host_store_hp_ssd_smart_path_status);
 639 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
 640                         host_store_raid_offload_debug);
 641 static DEVICE_ATTR(firmware_revision, S_IRUGO,
 642         host_show_firmware_revision, NULL);
 643 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
 644         host_show_commands_outstanding, NULL);
 645 static DEVICE_ATTR(transport_mode, S_IRUGO,
 646         host_show_transport_mode, NULL);
 647 static DEVICE_ATTR(resettable, S_IRUGO,
 648         host_show_resettable, NULL);
 649
 650 static struct device_attribute *hpsa_sdev_attrs[] = {
 651         &dev_attr_raid_level,
 652         &dev_attr_lunid,
 653         &dev_attr_unique_id,
 654         &dev_attr_hp_ssd_smart_path_enabled,
 655         NULL,
 656 };
 657
 658 static struct device_attribute *hpsa_shost_attrs[] = {
 659         &dev_attr_rescan,
 660         &dev_attr_firmware_revision,
 661         &dev_attr_commands_outstanding,
 662         &dev_attr_transport_mode,
 663         &dev_attr_resettable,
 664         &dev_attr_hp_ssd_smart_path_status,
 665         &dev_attr_raid_offload_debug,
 666         NULL,
 667 };
 668
 669 static struct scsi_host_template hpsa_driver_template = {
 670         .module                 = THIS_MODULE,
 671         .name                   = HPSA,
 672         .proc_name              = HPSA,
 673         .queuecommand           = hpsa_scsi_queue_command,
 674         .scan_start             = hpsa_scan_start,
 675         .scan_finished          = hpsa_scan_finished,
 676         .change_queue_depth     = hpsa_change_queue_depth,
 677         .this_id                = -1,
 678         .use_clustering         = ENABLE_CLUSTERING,
 679         .eh_abort_handler       = hpsa_eh_abort_handler,
 680         .eh_device_reset_handler = hpsa_eh_device_reset_handler,
 681         .ioctl                  = hpsa_ioctl,
 682         .slave_alloc            = hpsa_slave_alloc,
 683         .slave_destroy          = hpsa_slave_destroy,
 684 #ifdef CONFIG_COMPAT
 685         .compat_ioctl           = hpsa_compat_ioctl,
 686 #endif
 687         .sdev_attrs = hpsa_sdev_attrs,
 688         .shost_attrs = hpsa_shost_attrs,
 689         .max_sectors = 8192,
 690         .no_write_same = 1,
 691 };
 692
 693
 694 /* Enqueuing and dequeuing functions for cmdlists. */
 695 static inline void addQ(struct list_head *list, struct CommandList *c)
 696 {
 697         list_add_tail(&c->list, list);
 698 }
 699
 700 static inline u32 next_command(struct ctlr_info *h, u8 q)
 701 {
 702         u32 a;
 703         struct reply_queue_buffer *rq = &h->reply_queue[q];
 704
 705         if (h->transMethod & CFGTBL_Trans_io_accel1)
 706                 return h->access.command_completed(h, q);
 707
 708         if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
 709                 return h->access.command_completed(h, q);
 710
 711         if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
 712                 a = rq->head[rq->current_entry];
 713                 rq->current_entry++;
 714                 atomic_dec(&h->commands_outstanding);
 715         } else {
 716                 a = FIFO_EMPTY;
 717         }
 718         /* Check for wraparound */
 719         if (rq->current_entry == h->max_commands) {
 720                 rq->current_entry = 0;
 721                 rq->wraparound ^= 1;
 722         }
 723         return a;
 724 }
 725
 726 /*
 727  * There are some special bits in the bus address of the
 728  * command that we have to set for the controller to know
 729  * how to process the command:
 730  *
 731  * Normal performant mode:
 732  * bit 0: 1 means performant mode, 0 means simple mode.
 733  * bits 1-3 = block fetch table entry
 734  * bits 4-6 = command type (== 0)
 735  *
 736  * ioaccel1 mode:
 737  * bit 0 = "performant mode" bit.
 738  * bits 1-3 = block fetch table entry
 739  * bits 4-6 = command type (== 110)
 740  * (command type is needed because ioaccel1 mode
 741  * commands are submitted through the same register as normal
 742  * mode commands, so this is how the controller knows whether
 743  * the command is normal mode or ioaccel1 mode.)
 744  *
 745  * ioaccel2 mode:
 746  * bit 0 = "performant mode" bit.
 747  * bits 1-4 = block fetch table entry (note extra bit)
 748  * bits 4-6 = not needed, because ioaccel2 mode has
 749  * a separate special register for submitting commands.
 750  */
 751
 752 /* set_performant_mode: Modify the tag for cciss performant
 753  * set bit 0 for pull model, bits 3-1 for block fetch
 754  * register number
 755  */
 756 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
 757 {
 758         if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
 759                 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
 760                 if (likely(h->msix_vector > 0))
 761                         c->Header.ReplyQueue =
 762                                 raw_smp_processor_id() % h->nreply_queues;
 763         }
 764 }
 765
 766 static void set_ioaccel1_performant_mode(struct ctlr_info *h,
 767                                                 struct CommandList *c)
 768 {
 769         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
 770
 771         /* Tell the controller to post the reply to the queue for this
 772          * processor.  This seems to give the best I/O throughput.
 773          */
 774         cp->ReplyQueue = smp_processor_id() % h->nreply_queues;
 775         /* Set the bits in the address sent down to include:
 776          *  - performant mode bit (bit 0)
 777          *  - pull count (bits 1-3)
 778          *  - command type (bits 4-6)
 779          */
 780         c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
 781                                         IOACCEL1_BUSADDR_CMDTYPE;
 782 }
 783
 784 static void set_ioaccel2_performant_mode(struct ctlr_info *h,
 785                                                 struct CommandList *c)
 786 {
 787         struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
 788
 789         /* Tell the controller to post the reply to the queue for this
 790          * processor.  This seems to give the best I/O throughput.
 791          */
 792         cp->reply_queue = smp_processor_id() % h->nreply_queues;
 793         /* Set the bits in the address sent down to include:
 794          *  - performant mode bit not used in ioaccel mode 2
 795          *  - pull count (bits 0-3)
 796          *  - command type isn't needed for ioaccel2
 797          */
 798         c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
 799 }
 800
 801 static int is_firmware_flash_cmd(u8 *cdb)
 802 {
 803         return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
 804 }
 805
 806 /*
 807  * During firmware flash, the heartbeat register may not update as frequently
 808  * as it should.  So we dial down lockup detection during firmware flash. and
 809  * dial it back up when firmware flash completes.
 810  */
 811 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
 812 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
 813 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
 814                 struct CommandList *c)
 815 {
 816         if (!is_firmware_flash_cmd(c->Request.CDB))
 817                 return;
 818         atomic_inc(&h->firmware_flash_in_progress);
 819         h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
 820 }
 821
 822 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
 823                 struct CommandList *c)
 824 {
 825         if (is_firmware_flash_cmd(c->Request.CDB) &&
 826                 atomic_dec_and_test(&h->firmware_flash_in_progress))
 827                 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
 828 }
 829
 830 static void enqueue_cmd_and_start_io(struct ctlr_info *h,
 831         struct CommandList *c)
 832 {
 833         unsigned long flags;
 834
 835         switch (c->cmd_type) {
 836         case CMD_IOACCEL1:
 837                 set_ioaccel1_performant_mode(h, c);
 838                 break;
 839         case CMD_IOACCEL2:
 840                 set_ioaccel2_performant_mode(h, c);
 841                 break;
 842         default:
 843                 set_performant_mode(h, c);
 844         }
 845         dial_down_lockup_detection_during_fw_flash(h, c);
 846         spin_lock_irqsave(&h->lock, flags);
 847         addQ(&h->reqQ, c);
 848         h->Qdepth++;
 849         start_io(h, &flags);
 850         spin_unlock_irqrestore(&h->lock, flags);
 851 }
 852
 853 static inline void removeQ(struct CommandList *c)
 854 {
 855         if (WARN_ON(list_empty(&c->list)))
 856                 return;
 857         list_del_init(&c->list);
 858 }
 859
 860 static inline int is_hba_lunid(unsigned char scsi3addr[])
 861 {
 862         return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
 863 }
 864
 865 static inline int is_scsi_rev_5(struct ctlr_info *h)
 866 {
 867         if (!h->hba_inquiry_data)
 868                 return 0;
 869         if ((h->hba_inquiry_data[2] & 0x07) == 5)
 870                 return 1;
 871         return 0;
 872 }
 873
 874 static int hpsa_find_target_lun(struct ctlr_info *h,
 875         unsigned char scsi3addr[], int bus, int *target, int *lun)
 876 {
 877         /* finds an unused bus, target, lun for a new physical device
 878          * assumes h->devlock is held
 879          */
 880         int i, found = 0;
 881         DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
 882
 883         bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
 884
 885         for (i = 0; i < h->ndevices; i++) {
 886                 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
 887                         __set_bit(h->dev[i]->target, lun_taken);
 888         }
 889
 890         i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
 891         if (i < HPSA_MAX_DEVICES) {
 892                 /* *bus = 1; */
 893                 *target = i;
 894                 *lun = 0;
 895                 found = 1;
 896         }
 897         return !found;
 898 }
 899
 900 /* Add an entry into h->dev[] array. */
 901 static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
 902                 struct hpsa_scsi_dev_t *device,
 903                 struct hpsa_scsi_dev_t *added[], int *nadded)
 904 {
 905         /* assumes h->devlock is held */
 906         int n = h->ndevices;
 907         int i;
 908         unsigned char addr1[8], addr2[8];
 909         struct hpsa_scsi_dev_t *sd;
 910
 911         if (n >= HPSA_MAX_DEVICES) {
 912                 dev_err(&h->pdev->dev, "too many devices, some will be "
 913                         "inaccessible.\n");
 914                 return -1;
 915         }
 916
 917         /* physical devices do not have lun or target assigned until now. */
 918         if (device->lun != -1)
 919                 /* Logical device, lun is already assigned. */
 920                 goto lun_assigned;
 921
 922         /* If this device a non-zero lun of a multi-lun device
 923          * byte 4 of the 8-byte LUN addr will contain the logical
 924          * unit no, zero otherise.
 925          */
 926         if (device->scsi3addr[4] == 0) {
 927                 /* This is not a non-zero lun of a multi-lun device */
 928                 if (hpsa_find_target_lun(h, device->scsi3addr,
 929                         device->bus, &device->target, &device->lun) != 0)
 930                         return -1;
 931                 goto lun_assigned;
 932         }
 933
 934         /* This is a non-zero lun of a multi-lun device.
 935          * Search through our list and find the device which
 936          * has the same 8 byte LUN address, excepting byte 4.
 937          * Assign the same bus and target for this new LUN.
 938          * Use the logical unit number from the firmware.
 939          */
 940         memcpy(addr1, device->scsi3addr, 8);
 941         addr1[4] = 0;
 942         for (i = 0; i < n; i++) {
 943                 sd = h->dev[i];
 944                 memcpy(addr2, sd->scsi3addr, 8);
 945                 addr2[4] = 0;
 946                 /* differ only in byte 4? */
 947                 if (memcmp(addr1, addr2, 8) == 0) {
 948                         device->bus = sd->bus;
 949                         device->target = sd->target;
 950                         device->lun = device->scsi3addr[4];
 951                         break;
 952                 }
 953         }
 954         if (device->lun == -1) {
 955                 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
 956                         " suspect firmware bug or unsupported hardware "
 957                         "configuration.\n");
 958                         return -1;
 959         }
 960
 961 lun_assigned:
 962
 963         h->dev[n] = device;
 964         h->ndevices++;
 965         added[*nadded] = device;
 966         (*nadded)++;
 967
 968         /* initially, (before registering with scsi layer) we don't
 969          * know our hostno and we don't want to print anything first
 970          * time anyway (the scsi layer's inquiries will show that info)
 971          */
 972         /* if (hostno != -1) */
 973                 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
 974                         scsi_device_type(device->devtype), hostno,
 975                         device->bus, device->target, device->lun);
 976         return 0;
 977 }
 978
 979 /* Update an entry in h->dev[] array. */
 980 static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
 981         int entry, struct hpsa_scsi_dev_t *new_entry)
 982 {
 983         /* assumes h->devlock is held */
 984         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
 985
 986         /* Raid level changed. */
 987         h->dev[entry]->raid_level = new_entry->raid_level;
 988
 989         /* Raid offload parameters changed. */
 990         h->dev[entry]->offload_config = new_entry->offload_config;
 991         h->dev[entry]->offload_enabled = new_entry->offload_enabled;
 992         h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
 993         h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
 994         h->dev[entry]->raid_map = new_entry->raid_map;
 995
 996         dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n",
 997                 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
 998                 new_entry->target, new_entry->lun);
 999 }
1000
1001 /* Replace an entry from h->dev[] array. */
1002 static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
1003         int entry, struct hpsa_scsi_dev_t *new_entry,
1004         struct hpsa_scsi_dev_t *added[], int *nadded,
1005         struct hpsa_scsi_dev_t *removed[], int *nremoved)
1006 {
1007         /* assumes h->devlock is held */
1008         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1009         removed[*nremoved] = h->dev[entry];
1010         (*nremoved)++;
1011
1012         /*
1013          * New physical devices won't have target/lun assigned yet
1014          * so we need to preserve the values in the slot we are replacing.
1015          */
1016         if (new_entry->target == -1) {
1017                 new_entry->target = h->dev[entry]->target;
1018                 new_entry->lun = h->dev[entry]->lun;
1019         }
1020
1021         h->dev[entry] = new_entry;
1022         added[*nadded] = new_entry;
1023         (*nadded)++;
1024         dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
1025                 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
1026                         new_entry->target, new_entry->lun);
1027 }
1028
1029 /* Remove an entry from h->dev[] array. */
1030 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
1031         struct hpsa_scsi_dev_t *removed[], int *nremoved)
1032 {
1033         /* assumes h->devlock is held */
1034         int i;
1035         struct hpsa_scsi_dev_t *sd;
1036
1037         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1038
1039         sd = h->dev[entry];
1040         removed[*nremoved] = h->dev[entry];
1041         (*nremoved)++;
1042
1043         for (i = entry; i < h->ndevices-1; i++)
1044                 h->dev[i] = h->dev[i+1];
1045         h->ndevices--;
1046         dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
1047                 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
1048                 sd->lun);
1049 }
1050
1051 #define SCSI3ADDR_EQ(a, b) ( \
1052         (a)[7] == (b)[7] && \
1053         (a)[6] == (b)[6] && \
1054         (a)[5] == (b)[5] && \
1055         (a)[4] == (b)[4] && \
1056         (a)[3] == (b)[3] && \
1057         (a)[2] == (b)[2] && \
1058         (a)[1] == (b)[1] && \
1059         (a)[0] == (b)[0])
1060
1061 static void fixup_botched_add(struct ctlr_info *h,
1062         struct hpsa_scsi_dev_t *added)
1063 {
1064         /* called when scsi_add_device fails in order to re-adjust
1065          * h->dev[] to match the mid layer's view.
1066          */
1067         unsigned long flags;
1068         int i, j;
1069
1070         spin_lock_irqsave(&h->lock, flags);
1071         for (i = 0; i < h->ndevices; i++) {
1072                 if (h->dev[i] == added) {
1073                         for (j = i; j < h->ndevices-1; j++)
1074                                 h->dev[j] = h->dev[j+1];
1075                         h->ndevices--;
1076                         break;
1077                 }
1078         }
1079         spin_unlock_irqrestore(&h->lock, flags);
1080         kfree(added);
1081 }
1082
1083 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1084         struct hpsa_scsi_dev_t *dev2)
1085 {
1086         /* we compare everything except lun and target as these
1087          * are not yet assigned.  Compare parts likely
1088          * to differ first
1089          */
1090         if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1091                 sizeof(dev1->scsi3addr)) != 0)
1092                 return 0;
1093         if (memcmp(dev1->device_id, dev2->device_id,
1094                 sizeof(dev1->device_id)) != 0)
1095                 return 0;
1096         if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1097                 return 0;
1098         if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1099                 return 0;
1100         if (dev1->devtype != dev2->devtype)
1101                 return 0;
1102         if (dev1->bus != dev2->bus)
1103                 return 0;
1104         return 1;
1105 }
1106
1107 static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1108         struct hpsa_scsi_dev_t *dev2)
1109 {
1110         /* Device attributes that can change, but don't mean
1111          * that the device is a different device, nor that the OS
1112          * needs to be told anything about the change.
1113          */
1114         if (dev1->raid_level != dev2->raid_level)
1115                 return 1;
1116         if (dev1->offload_config != dev2->offload_config)
1117                 return 1;
1118         if (dev1->offload_enabled != dev2->offload_enabled)
1119                 return 1;
1120         return 0;
1121 }
1122
1123 /* Find needle in haystack.  If exact match found, return DEVICE_SAME,
1124  * and return needle location in *index.  If scsi3addr matches, but not
1125  * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1126  * location in *index.
1127  * In the case of a minor device attribute change, such as RAID level, just
1128  * return DEVICE_UPDATED, along with the updated device's location in index.
1129  * If needle not found, return DEVICE_NOT_FOUND.
1130  */
1131 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1132         struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1133         int *index)
1134 {
1135         int i;
1136 #define DEVICE_NOT_FOUND 0
1137 #define DEVICE_CHANGED 1
1138 #define DEVICE_SAME 2
1139 #define DEVICE_UPDATED 3
1140         for (i = 0; i < haystack_size; i++) {
1141                 if (haystack[i] == NULL) /* previously removed. */
1142                         continue;
1143                 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1144                         *index = i;
1145                         if (device_is_the_same(needle, haystack[i])) {
1146                                 if (device_updated(needle, haystack[i]))
1147                                         return DEVICE_UPDATED;
1148                                 return DEVICE_SAME;
1149                         } else {
1150                                 /* Keep offline devices offline */
1151                                 if (needle->volume_offline)
1152                                         return DEVICE_NOT_FOUND;
1153                                 return DEVICE_CHANGED;
1154                         }
1155                 }
1156         }
1157         *index = -1;
1158         return DEVICE_NOT_FOUND;
1159 }
1160
1161 static void hpsa_monitor_offline_device(struct ctlr_info *h,
1162                                         unsigned char scsi3addr[])
1163 {
1164         struct offline_device_entry *device;
1165         unsigned long flags;
1166
1167         /* Check to see if device is already on the list */
1168         spin_lock_irqsave(&h->offline_device_lock, flags);
1169         list_for_each_entry(device, &h->offline_device_list, offline_list) {
1170                 if (memcmp(device->scsi3addr, scsi3addr,
1171                         sizeof(device->scsi3addr)) == 0) {
1172                         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1173                         return;
1174                 }
1175         }
1176         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1177
1178         /* Device is not on the list, add it. */
1179         device = kmalloc(sizeof(*device), GFP_KERNEL);
1180         if (!device) {
1181                 dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__);
1182                 return;
1183         }
1184         memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
1185         spin_lock_irqsave(&h->offline_device_lock, flags);
1186         list_add_tail(&device->offline_list, &h->offline_device_list);
1187         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1188 }
1189
1190 /* Print a message explaining various offline volume states */
1191 static void hpsa_show_volume_status(struct ctlr_info *h,
1192         struct hpsa_scsi_dev_t *sd)
1193 {
1194         if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
1195                 dev_info(&h->pdev->dev,
1196                         "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
1197                         h->scsi_host->host_no,
1198                         sd->bus, sd->target, sd->lun);
1199         switch (sd->volume_offline) {
1200         case HPSA_LV_OK:
1201                 break;
1202         case HPSA_LV_UNDERGOING_ERASE:
1203                 dev_info(&h->pdev->dev,
1204                         "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
1205                         h->scsi_host->host_no,
1206                         sd->bus, sd->target, sd->lun);
1207                 break;
1208         case HPSA_LV_UNDERGOING_RPI:
1209                 dev_info(&h->pdev->dev,
1210                         "C%d:B%d:T%d:L%d Volume is undergoing rapid parity initialization process.\n",
1211                         h->scsi_host->host_no,
1212                         sd->bus, sd->target, sd->lun);
1213                 break;
1214         case HPSA_LV_PENDING_RPI:
1215                 dev_info(&h->pdev->dev,
1216                                 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
1217                                 h->scsi_host->host_no,
1218                                 sd->bus, sd->target, sd->lun);
1219                 break;
1220         case HPSA_LV_ENCRYPTED_NO_KEY:
1221                 dev_info(&h->pdev->dev,
1222                         "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
1223                         h->scsi_host->host_no,
1224                         sd->bus, sd->target, sd->lun);
1225                 break;
1226         case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
1227                 dev_info(&h->pdev->dev,
1228                         "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
1229                         h->scsi_host->host_no,
1230                         sd->bus, sd->target, sd->lun);
1231                 break;
1232         case HPSA_LV_UNDERGOING_ENCRYPTION:
1233                 dev_info(&h->pdev->dev,
1234                         "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
1235                         h->scsi_host->host_no,
1236                         sd->bus, sd->target, sd->lun);
1237                 break;
1238         case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
1239                 dev_info(&h->pdev->dev,
1240                         "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
1241                         h->scsi_host->host_no,
1242                         sd->bus, sd->target, sd->lun);
1243                 break;
1244         case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1245                 dev_info(&h->pdev->dev,
1246                         "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
1247                         h->scsi_host->host_no,
1248                         sd->bus, sd->target, sd->lun);
1249                 break;
1250         case HPSA_LV_PENDING_ENCRYPTION:
1251                 dev_info(&h->pdev->dev,
1252                         "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
1253                         h->scsi_host->host_no,
1254                         sd->bus, sd->target, sd->lun);
1255                 break;
1256         case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
1257                 dev_info(&h->pdev->dev,
1258                         "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
1259                         h->scsi_host->host_no,
1260                         sd->bus, sd->target, sd->lun);
1261                 break;
1262         }
1263 }
1264
1265 static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
1266         struct hpsa_scsi_dev_t *sd[], int nsds)
1267 {
1268         /* sd contains scsi3 addresses and devtypes, and inquiry
1269          * data.  This function takes what's in sd to be the current
1270          * reality and updates h->dev[] to reflect that reality.
1271          */
1272         int i, entry, device_change, changes = 0;
1273         struct hpsa_scsi_dev_t *csd;
1274         unsigned long flags;
1275         struct hpsa_scsi_dev_t **added, **removed;
1276         int nadded, nremoved;
1277         struct Scsi_Host *sh = NULL;
1278
1279         added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
1280         removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
1281
1282         if (!added || !removed) {
1283                 dev_warn(&h->pdev->dev, "out of memory in "
1284                         "adjust_hpsa_scsi_table\n");
1285                 goto free_and_out;
1286         }
1287
1288         spin_lock_irqsave(&h->devlock, flags);
1289
1290         /* find any devices in h->dev[] that are not in
1291          * sd[] and remove them from h->dev[], and for any
1292          * devices which have changed, remove the old device
1293          * info and add the new device info.
1294          * If minor device attributes change, just update
1295          * the existing device structure.
1296          */
1297         i = 0;
1298         nremoved = 0;
1299         nadded = 0;
1300         while (i < h->ndevices) {
1301                 csd = h->dev[i];
1302                 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1303                 if (device_change == DEVICE_NOT_FOUND) {
1304                         changes++;
1305                         hpsa_scsi_remove_entry(h, hostno, i,
1306                                 removed, &nremoved);
1307                         continue; /* remove ^^^, hence i not incremented */
1308                 } else if (device_change == DEVICE_CHANGED) {
1309                         changes++;
1310                         hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
1311                                 added, &nadded, removed, &nremoved);
1312                         /* Set it to NULL to prevent it from being freed
1313                          * at the bottom of hpsa_update_scsi_devices()
1314                          */
1315                         sd[entry] = NULL;
1316                 } else if (device_change == DEVICE_UPDATED) {
1317                         hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
1318                 }
1319                 i++;
1320         }
1321
1322         /* Now, make sure every device listed in sd[] is also
1323          * listed in h->dev[], adding them if they aren't found
1324          */
1325
1326         for (i = 0; i < nsds; i++) {
1327                 if (!sd[i]) /* if already added above. */
1328                         continue;
1329
1330                 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS
1331                  * as the SCSI mid-layer does not handle such devices well.
1332                  * It relentlessly loops sending TUR at 3Hz, then READ(10)
1333                  * at 160Hz, and prevents the system from coming up.
1334                  */
1335                 if (sd[i]->volume_offline) {
1336                         hpsa_show_volume_status(h, sd[i]);
1337                         dev_info(&h->pdev->dev, "c%db%dt%dl%d: temporarily offline\n",
1338                                 h->scsi_host->host_no,
1339                                 sd[i]->bus, sd[i]->target, sd[i]->lun);
1340                         continue;
1341                 }
1342
1343                 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1344                                         h->ndevices, &entry);
1345                 if (device_change == DEVICE_NOT_FOUND) {
1346                         changes++;
1347                         if (hpsa_scsi_add_entry(h, hostno, sd[i],
1348                                 added, &nadded) != 0)
1349                                 break;
1350                         sd[i] = NULL; /* prevent from being freed later. */
1351                 } else if (device_change == DEVICE_CHANGED) {
1352                         /* should never happen... */
1353                         changes++;
1354                         dev_warn(&h->pdev->dev,
1355                                 "device unexpectedly changed.\n");
1356                         /* but if it does happen, we just ignore that device */
1357                 }
1358         }
1359         spin_unlock_irqrestore(&h->devlock, flags);
1360
1361         /* Monitor devices which are in one of several NOT READY states to be
1362          * brought online later. This must be done without holding h->devlock,
1363          * so don't touch h->dev[]
1364          */
1365         for (i = 0; i < nsds; i++) {
1366                 if (!sd[i]) /* if already added above. */
1367                         continue;
1368                 if (sd[i]->volume_offline)
1369                         hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
1370         }
1371
1372         /* Don't notify scsi mid layer of any changes the first time through
1373          * (or if there are no changes) scsi_scan_host will do it later the
1374          * first time through.
1375          */
1376         if (hostno == -1 || !changes)
1377                 goto free_and_out;
1378
1379         sh = h->scsi_host;
1380         /* Notify scsi mid layer of any removed devices */
1381         for (i = 0; i < nremoved; i++) {
1382                 struct scsi_device *sdev =
1383                         scsi_device_lookup(sh, removed[i]->bus,
1384                                 removed[i]->target, removed[i]->lun);
1385                 if (sdev != NULL) {
1386                         scsi_remove_device(sdev);
1387                         scsi_device_put(sdev);
1388                 } else {
1389                         /* We don't expect to get here.
1390                          * future cmds to this device will get selection
1391                          * timeout as if the device was gone.
1392                          */
1393                         dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
1394                                 " for removal.", hostno, removed[i]->bus,
1395                                 removed[i]->target, removed[i]->lun);
1396                 }
1397                 kfree(removed[i]);
1398                 removed[i] = NULL;
1399         }
1400
1401         /* Notify scsi mid layer of any added devices */
1402         for (i = 0; i < nadded; i++) {
1403                 if (scsi_add_device(sh, added[i]->bus,
1404                         added[i]->target, added[i]->lun) == 0)
1405                         continue;
1406                 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
1407                         "device not added.\n", hostno, added[i]->bus,
1408                         added[i]->target, added[i]->lun);
1409                 /* now we have to remove it from h->dev,
1410                  * since it didn't get added to scsi mid layer
1411                  */
1412                 fixup_botched_add(h, added[i]);
1413         }
1414
1415 free_and_out:
1416         kfree(added);
1417         kfree(removed);
1418 }
1419
1420 /*
1421  * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
1422  * Assume's h->devlock is held.
1423  */
1424 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1425         int bus, int target, int lun)
1426 {
1427         int i;
1428         struct hpsa_scsi_dev_t *sd;
1429
1430         for (i = 0; i < h->ndevices; i++) {
1431                 sd = h->dev[i];
1432                 if (sd->bus == bus && sd->target == target && sd->lun == lun)
1433                         return sd;
1434         }
1435         return NULL;
1436 }
1437
1438 /* link sdev->hostdata to our per-device structure. */
1439 static int hpsa_slave_alloc(struct scsi_device *sdev)
1440 {
1441         struct hpsa_scsi_dev_t *sd;
1442         unsigned long flags;
1443         struct ctlr_info *h;
1444
1445         h = sdev_to_hba(sdev);
1446         spin_lock_irqsave(&h->devlock, flags);
1447         sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
1448                 sdev_id(sdev), sdev->lun);
1449         if (sd != NULL)
1450                 sdev->hostdata = sd;
1451         spin_unlock_irqrestore(&h->devlock, flags);
1452         return 0;
1453 }
1454
1455 static void hpsa_slave_destroy(struct scsi_device *sdev)
1456 {
1457         /* nothing to do. */
1458 }
1459
1460 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
1461 {
1462         int i;
1463
1464         if (!h->cmd_sg_list)
1465                 return;
1466         for (i = 0; i < h->nr_cmds; i++) {
1467                 kfree(h->cmd_sg_list[i]);
1468                 h->cmd_sg_list[i] = NULL;
1469         }
1470         kfree(h->cmd_sg_list);
1471         h->cmd_sg_list = NULL;
1472 }
1473
1474 static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
1475 {
1476         int i;
1477
1478         if (h->chainsize <= 0)
1479                 return 0;
1480
1481         h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
1482                                 GFP_KERNEL);
1483         if (!h->cmd_sg_list)
1484                 return -ENOMEM;
1485         for (i = 0; i < h->nr_cmds; i++) {
1486                 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
1487                                                 h->chainsize, GFP_KERNEL);
1488                 if (!h->cmd_sg_list[i])
1489                         goto clean;
1490         }
1491         return 0;
1492
1493 clean:
1494         hpsa_free_sg_chain_blocks(h);
1495         return -ENOMEM;
1496 }
1497
1498 static int hpsa_map_sg_chain_block(struct ctlr_info *h,
1499         struct CommandList *c)
1500 {
1501         struct SGDescriptor *chain_sg, *chain_block;
1502         u64 temp64;
1503         u32 chain_len;
1504
1505         chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1506         chain_block = h->cmd_sg_list[c->cmdindex];
1507         chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN);
1508         chain_len = sizeof(*chain_sg) *
1509                 (c->Header.SGTotal - h->max_cmd_sg_entries);
1510         chain_sg->Len = cpu_to_le32(chain_len);
1511         temp64 = pci_map_single(h->pdev, chain_block, chain_len,
1512                                 PCI_DMA_TODEVICE);
1513         if (dma_mapping_error(&h->pdev->dev, temp64)) {
1514                 /* prevent subsequent unmapping */
1515                 chain_sg->Addr = cpu_to_le64(0);
1516                 return -1;
1517         }
1518         chain_sg->Addr = cpu_to_le64(temp64);
1519         return 0;
1520 }
1521
1522 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
1523         struct CommandList *c)
1524 {
1525         struct SGDescriptor *chain_sg;
1526
1527         if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries)
1528                 return;
1529
1530         chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1531         pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr),
1532                         le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE);
1533 }
1534
1535
1536 /* Decode the various types of errors on ioaccel2 path.
1537  * Return 1 for any error that should generate a RAID path retry.
1538  * Return 0 for errors that don't require a RAID path retry.
1539  */
1540 static int handle_ioaccel_mode2_error(struct ctlr_info *h,
1541                                         struct CommandList *c,
1542                                         struct scsi_cmnd *cmd,
1543                                         struct io_accel2_cmd *c2)
1544 {
1545         int data_len;
1546         int retry = 0;
1547
1548         switch (c2->error_data.serv_response) {
1549         case IOACCEL2_SERV_RESPONSE_COMPLETE:
1550                 switch (c2->error_data.status) {
1551                 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
1552                         break;
1553                 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
1554                         dev_warn(&h->pdev->dev,
1555                                 "%s: task complete with check condition.\n",
1556                                 "HP SSD Smart Path");
1557                         cmd->result |= SAM_STAT_CHECK_CONDITION;
1558                         if (c2->error_data.data_present !=
1559                                         IOACCEL2_SENSE_DATA_PRESENT) {
1560                                 memset(cmd->sense_buffer, 0,
1561                                         SCSI_SENSE_BUFFERSIZE);
1562                                 break;
1563                         }
1564                         /* copy the sense data */
1565                         data_len = c2->error_data.sense_data_len;
1566                         if (data_len > SCSI_SENSE_BUFFERSIZE)
1567                                 data_len = SCSI_SENSE_BUFFERSIZE;
1568                         if (data_len > sizeof(c2->error_data.sense_data_buff))
1569                                 data_len =
1570                                         sizeof(c2->error_data.sense_data_buff);
1571                         memcpy(cmd->sense_buffer,
1572                                 c2->error_data.sense_data_buff, data_len);
1573                         retry = 1;
1574                         break;
1575                 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
1576                         dev_warn(&h->pdev->dev,
1577                                 "%s: task complete with BUSY status.\n",
1578                                 "HP SSD Smart Path");
1579                         retry = 1;
1580                         break;
1581                 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
1582                         dev_warn(&h->pdev->dev,
1583                                 "%s: task complete with reservation conflict.\n",
1584                                 "HP SSD Smart Path");
1585                         retry = 1;
1586                         break;
1587                 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
1588                         /* Make scsi midlayer do unlimited retries */
1589                         cmd->result = DID_IMM_RETRY << 16;
1590                         break;
1591                 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
1592                         dev_warn(&h->pdev->dev,
1593                                 "%s: task complete with aborted status.\n",
1594                                 "HP SSD Smart Path");
1595                         retry = 1;
1596                         break;
1597                 default:
1598                         dev_warn(&h->pdev->dev,
1599                                 "%s: task complete with unrecognized status: 0x%02x\n",
1600                                 "HP SSD Smart Path", c2->error_data.status);
1601                         retry = 1;
1602                         break;
1603                 }
1604                 break;
1605         case IOACCEL2_SERV_RESPONSE_FAILURE:
1606                 /* don't expect to get here. */
1607                 dev_warn(&h->pdev->dev,
1608                         "unexpected delivery or target failure, status = 0x%02x\n",
1609                         c2->error_data.status);
1610                 retry = 1;
1611                 break;
1612         case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
1613                 break;
1614         case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
1615                 break;
1616         case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
1617                 dev_warn(&h->pdev->dev, "task management function rejected.\n");
1618                 retry = 1;
1619                 break;
1620         case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
1621                 dev_warn(&h->pdev->dev, "task management function invalid LUN\n");
1622                 break;
1623         default:
1624                 dev_warn(&h->pdev->dev,
1625                         "%s: Unrecognized server response: 0x%02x\n",
1626                         "HP SSD Smart Path",
1627                         c2->error_data.serv_response);
1628                 retry = 1;
1629                 break;
1630         }
1631
1632         return retry;   /* retry on raid path? */
1633 }
1634
1635 static void process_ioaccel2_completion(struct ctlr_info *h,
1636                 struct CommandList *c, struct scsi_cmnd *cmd,
1637                 struct hpsa_scsi_dev_t *dev)
1638 {
1639         struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
1640         int raid_retry = 0;
1641
1642         /* check for good status */
1643         if (likely(c2->error_data.serv_response == 0 &&
1644                         c2->error_data.status == 0)) {
1645                 cmd_free(h, c);
1646                 cmd->scsi_done(cmd);
1647                 return;
1648         }
1649
1650         /* Any RAID offload error results in retry which will use
1651          * the normal I/O path so the controller can handle whatever's
1652          * wrong.
1653          */
1654         if (is_logical_dev_addr_mode(dev->scsi3addr) &&
1655                 c2->error_data.serv_response ==
1656                         IOACCEL2_SERV_RESPONSE_FAILURE) {
1657                 dev->offload_enabled = 0;
1658                 h->drv_req_rescan = 1;  /* schedule controller for a rescan */
1659                 cmd->result = DID_SOFT_ERROR << 16;
1660                 cmd_free(h, c);
1661                 cmd->scsi_done(cmd);
1662                 return;
1663         }
1664         raid_retry = handle_ioaccel_mode2_error(h, c, cmd, c2);
1665         /* If error found, disable Smart Path, schedule a rescan,
1666          * and force a retry on the standard path.
1667          */
1668         if (raid_retry) {
1669                 dev_warn(&h->pdev->dev, "%s: Retrying on standard path.\n",
1670                         "HP SSD Smart Path");
1671                 dev->offload_enabled = 0; /* Disable Smart Path */
1672                 h->drv_req_rescan = 1;    /* schedule controller rescan */
1673                 cmd->result = DID_SOFT_ERROR << 16;
1674         }
1675         cmd_free(h, c);
1676         cmd->scsi_done(cmd);
1677 }
1678
1679 static void complete_scsi_command(struct CommandList *cp)
1680 {
1681         struct scsi_cmnd *cmd;
1682         struct ctlr_info *h;
1683         struct ErrorInfo *ei;
1684         struct hpsa_scsi_dev_t *dev;
1685
1686         unsigned char sense_key;
1687         unsigned char asc;      /* additional sense code */
1688         unsigned char ascq;     /* additional sense code qualifier */
1689         unsigned long sense_data_size;
1690
1691         ei = cp->err_info;
1692         cmd = (struct scsi_cmnd *) cp->scsi_cmd;
1693         h = cp->h;
1694         dev = cmd->device->hostdata;
1695
1696         scsi_dma_unmap(cmd); /* undo the DMA mappings */
1697         if ((cp->cmd_type == CMD_SCSI) &&
1698                 (cp->Header.SGTotal > h->max_cmd_sg_entries))
1699                 hpsa_unmap_sg_chain_block(h, cp);
1700
1701         cmd->result = (DID_OK << 16);           /* host byte */
1702         cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
1703
1704         if (cp->cmd_type == CMD_IOACCEL2)
1705                 return process_ioaccel2_completion(h, cp, cmd, dev);
1706
1707         cmd->result |= ei->ScsiStatus;
1708
1709         scsi_set_resid(cmd, ei->ResidualCnt);
1710         if (ei->CommandStatus == 0) {
1711                 cmd_free(h, cp);
1712                 cmd->scsi_done(cmd);
1713                 return;
1714         }
1715
1716         /* copy the sense data */
1717         if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
1718                 sense_data_size = SCSI_SENSE_BUFFERSIZE;
1719         else
1720                 sense_data_size = sizeof(ei->SenseInfo);
1721         if (ei->SenseLen < sense_data_size)
1722                 sense_data_size = ei->SenseLen;
1723
1724         memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
1725
1726         /* For I/O accelerator commands, copy over some fields to the normal
1727          * CISS header used below for error handling.
1728          */
1729         if (cp->cmd_type == CMD_IOACCEL1) {
1730                 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
1731                 cp->Header.SGList = cp->Header.SGTotal = scsi_sg_count(cmd);
1732                 cp->Request.CDBLen = c->io_flags & IOACCEL1_IOFLAGS_CDBLEN_MASK;
1733                 cp->Header.tag = c->tag;
1734                 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
1735                 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
1736
1737                 /* Any RAID offload error results in retry which will use
1738                  * the normal I/O path so the controller can handle whatever's
1739                  * wrong.
1740                  */
1741                 if (is_logical_dev_addr_mode(dev->scsi3addr)) {
1742                         if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
1743                                 dev->offload_enabled = 0;
1744                         cmd->result = DID_SOFT_ERROR << 16;
1745                         cmd_free(h, cp);
1746                         cmd->scsi_done(cmd);
1747                         return;
1748                 }
1749         }
1750
1751         /* an error has occurred */
1752         switch (ei->CommandStatus) {
1753
1754         case CMD_TARGET_STATUS:
1755                 if (ei->ScsiStatus) {
1756                         /* Get sense key */
1757                         sense_key = 0xf & ei->SenseInfo[2];
1758                         /* Get additional sense code */
1759                         asc = ei->SenseInfo[12];
1760                         /* Get addition sense code qualifier */
1761                         ascq = ei->SenseInfo[13];
1762                 }
1763
1764                 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
1765                         if (check_for_unit_attention(h, cp))
1766                                 break;
1767                         if (sense_key == ILLEGAL_REQUEST) {
1768                                 /*
1769                                  * SCSI REPORT_LUNS is commonly unsupported on
1770                                  * Smart Array.  Suppress noisy complaint.
1771                                  */
1772                                 if (cp->Request.CDB[0] == REPORT_LUNS)
1773                                         break;
1774
1775                                 /* If ASC/ASCQ indicate Logical Unit
1776                                  * Not Supported condition,
1777                                  */
1778                                 if ((asc == 0x25) && (ascq == 0x0)) {
1779                                         dev_warn(&h->pdev->dev, "cp %p "
1780                                                 "has check condition\n", cp);
1781                                         break;
1782                                 }
1783                         }
1784
1785                         if (sense_key == NOT_READY) {
1786                                 /* If Sense is Not Ready, Logical Unit
1787                                  * Not ready, Manual Intervention
1788                                  * required
1789                                  */
1790                                 if ((asc == 0x04) && (ascq == 0x03)) {
1791                                         dev_warn(&h->pdev->dev, "cp %p "
1792                                                 "has check condition: unit "
1793                                                 "not ready, manual "
1794                                                 "intervention required\n", cp);
1795                                         break;
1796                                 }
1797                         }
1798                         if (sense_key == ABORTED_COMMAND) {
1799                                 /* Aborted command is retryable */
1800                                 dev_warn(&h->pdev->dev, "cp %p "
1801                                         "has check condition: aborted command: "
1802                                         "ASC: 0x%x, ASCQ: 0x%x\n",
1803                                         cp, asc, ascq);
1804                                 cmd->result |= DID_SOFT_ERROR << 16;
1805                                 break;
1806                         }
1807                         /* Must be some other type of check condition */
1808                         dev_dbg(&h->pdev->dev, "cp %p has check condition: "
1809                                         "unknown type: "
1810                                         "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1811                                         "Returning result: 0x%x, "
1812                                         "cmd=[%02x %02x %02x %02x %02x "
1813                                         "%02x %02x %02x %02x %02x %02x "
1814                                         "%02x %02x %02x %02x %02x]\n",
1815                                         cp, sense_key, asc, ascq,
1816                                         cmd->result,
1817                                         cmd->cmnd[0], cmd->cmnd[1],
1818                                         cmd->cmnd[2], cmd->cmnd[3],
1819                                         cmd->cmnd[4], cmd->cmnd[5],
1820                                         cmd->cmnd[6], cmd->cmnd[7],
1821                                         cmd->cmnd[8], cmd->cmnd[9],
1822                                         cmd->cmnd[10], cmd->cmnd[11],
1823                                         cmd->cmnd[12], cmd->cmnd[13],
1824                                         cmd->cmnd[14], cmd->cmnd[15]);
1825                         break;
1826                 }
1827
1828
1829                 /* Problem was not a check condition
1830                  * Pass it up to the upper layers...
1831                  */
1832                 if (ei->ScsiStatus) {
1833                         dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
1834                                 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1835                                 "Returning result: 0x%x\n",
1836                                 cp, ei->ScsiStatus,
1837                                 sense_key, asc, ascq,
1838                                 cmd->result);
1839                 } else {  /* scsi status is zero??? How??? */
1840                         dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
1841                                 "Returning no connection.\n", cp),
1842
1843                         /* Ordinarily, this case should never happen,
1844                          * but there is a bug in some released firmware
1845                          * revisions that allows it to happen if, for
1846                          * example, a 4100 backplane loses power and
1847                          * the tape drive is in it.  We assume that
1848                          * it's a fatal error of some kind because we
1849                          * can't show that it wasn't. We will make it
1850                          * look like selection timeout since that is
1851                          * the most common reason for this to occur,
1852                          * and it's severe enough.
1853                          */
1854
1855                         cmd->result = DID_NO_CONNECT << 16;
1856                 }
1857                 break;
1858
1859         case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1860                 break;
1861         case CMD_DATA_OVERRUN:
1862                 dev_warn(&h->pdev->dev, "cp %p has"
1863                         " completed with data overrun "
1864                         "reported\n", cp);
1865                 break;
1866         case CMD_INVALID: {
1867                 /* print_bytes(cp, sizeof(*cp), 1, 0);
1868                 print_cmd(cp); */
1869                 /* We get CMD_INVALID if you address a non-existent device
1870                  * instead of a selection timeout (no response).  You will
1871                  * see this if you yank out a drive, then try to access it.
1872                  * This is kind of a shame because it means that any other
1873                  * CMD_INVALID (e.g. driver bug) will get interpreted as a
1874                  * missing target. */
1875                 cmd->result = DID_NO_CONNECT << 16;
1876         }
1877                 break;
1878         case CMD_PROTOCOL_ERR:
1879                 cmd->result = DID_ERROR << 16;
1880                 dev_warn(&h->pdev->dev, "cp %p has "
1881                         "protocol error\n", cp);
1882                 break;
1883         case CMD_HARDWARE_ERR:
1884                 cmd->result = DID_ERROR << 16;
1885                 dev_warn(&h->pdev->dev, "cp %p had  hardware error\n", cp);
1886                 break;
1887         case CMD_CONNECTION_LOST:
1888                 cmd->result = DID_ERROR << 16;
1889                 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
1890                 break;
1891         case CMD_ABORTED:
1892                 cmd->result = DID_ABORT << 16;
1893                 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
1894                                 cp, ei->ScsiStatus);
1895                 break;
1896         case CMD_ABORT_FAILED:
1897                 cmd->result = DID_ERROR << 16;
1898                 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
1899                 break;
1900         case CMD_UNSOLICITED_ABORT:
1901                 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
1902                 dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
1903                         "abort\n", cp);
1904                 break;
1905         case CMD_TIMEOUT:
1906                 cmd->result = DID_TIME_OUT << 16;
1907                 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
1908                 break;
1909         case CMD_UNABORTABLE:
1910                 cmd->result = DID_ERROR << 16;
1911                 dev_warn(&h->pdev->dev, "Command unabortable\n");
1912                 break;
1913         case CMD_IOACCEL_DISABLED:
1914                 /* This only handles the direct pass-through case since RAID
1915                  * offload is handled above.  Just attempt a retry.
1916                  */
1917                 cmd->result = DID_SOFT_ERROR << 16;
1918                 dev_warn(&h->pdev->dev,
1919                                 "cp %p had HP SSD Smart Path error\n", cp);
1920                 break;
1921         default:
1922                 cmd->result = DID_ERROR << 16;
1923                 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
1924                                 cp, ei->CommandStatus);
1925         }
1926         cmd_free(h, cp);
1927         cmd->scsi_done(cmd);
1928 }
1929
1930 static void hpsa_pci_unmap(struct pci_dev *pdev,
1931         struct CommandList *c, int sg_used, int data_direction)
1932 {
1933         int i;
1934
1935         for (i = 0; i < sg_used; i++)
1936                 pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr),
1937                                 le32_to_cpu(c->SG[i].Len),
1938                                 data_direction);
1939 }
1940
1941 static int hpsa_map_one(struct pci_dev *pdev,
1942                 struct CommandList *cp,
1943                 unsigned char *buf,
1944                 size_t buflen,
1945                 int data_direction)
1946 {
1947         u64 addr64;
1948
1949         if (buflen == 0 || data_direction == PCI_DMA_NONE) {
1950                 cp->Header.SGList = 0;
1951                 cp->Header.SGTotal = cpu_to_le16(0);
1952                 return 0;
1953         }
1954
1955         addr64 = pci_map_single(pdev, buf, buflen, data_direction);
1956         if (dma_mapping_error(&pdev->dev, addr64)) {
1957                 /* Prevent subsequent unmap of something never mapped */
1958                 cp->Header.SGList = 0;
1959                 cp->Header.SGTotal = cpu_to_le16(0);
1960                 return -1;
1961         }
1962         cp->SG[0].Addr = cpu_to_le64(addr64);
1963         cp->SG[0].Len = cpu_to_le32(buflen);
1964         cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */
1965         cp->Header.SGList = 1;   /* no. SGs contig in this cmd */
1966         cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */
1967         return 0;
1968 }
1969
1970 static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
1971         struct CommandList *c)
1972 {
1973         DECLARE_COMPLETION_ONSTACK(wait);
1974
1975         c->waiting = &wait;
1976         enqueue_cmd_and_start_io(h, c);
1977         wait_for_completion(&wait);
1978 }
1979
1980 static u32 lockup_detected(struct ctlr_info *h)
1981 {
1982         int cpu;
1983         u32 rc, *lockup_detected;
1984
1985         cpu = get_cpu();
1986         lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
1987         rc = *lockup_detected;
1988         put_cpu();
1989         return rc;
1990 }
1991
1992 static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h,
1993         struct CommandList *c)
1994 {
1995         /* If controller lockup detected, fake a hardware error. */
1996         if (unlikely(lockup_detected(h)))
1997                 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
1998         else
1999                 hpsa_scsi_do_simple_cmd_core(h, c);
2000 }
2001
2002 #define MAX_DRIVER_CMD_RETRIES 25
2003 static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
2004         struct CommandList *c, int data_direction)
2005 {
2006         int backoff_time = 10, retry_count = 0;
2007
2008         do {
2009                 memset(c->err_info, 0, sizeof(*c->err_info));
2010                 hpsa_scsi_do_simple_cmd_core(h, c);
2011                 retry_count++;
2012                 if (retry_count > 3) {
2013                         msleep(backoff_time);
2014                         if (backoff_time < 1000)
2015                                 backoff_time *= 2;
2016                 }
2017         } while ((check_for_unit_attention(h, c) ||
2018                         check_for_busy(h, c)) &&
2019                         retry_count <= MAX_DRIVER_CMD_RETRIES);
2020         hpsa_pci_unmap(h->pdev, c, 1, data_direction);
2021 }
2022
2023 static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2024                                 struct CommandList *c)
2025 {
2026         const u8 *cdb = c->Request.CDB;
2027         const u8 *lun = c->Header.LUN.LunAddrBytes;
2028
2029         dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x"
2030         " CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
2031                 txt, lun[0], lun[1], lun[2], lun[3],
2032                 lun[4], lun[5], lun[6], lun[7],
2033                 cdb[0], cdb[1], cdb[2], cdb[3],
2034                 cdb[4], cdb[5], cdb[6], cdb[7],
2035                 cdb[8], cdb[9], cdb[10], cdb[11],
2036                 cdb[12], cdb[13], cdb[14], cdb[15]);
2037 }
2038
2039 static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2040                         struct CommandList *cp)
2041 {
2042         const struct ErrorInfo *ei = cp->err_info;
2043         struct device *d = &cp->h->pdev->dev;
2044         const u8 *sd = ei->SenseInfo;
2045
2046         switch (ei->CommandStatus) {
2047         case CMD_TARGET_STATUS:
2048                 hpsa_print_cmd(h, "SCSI status", cp);
2049                 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
2050                         dev_warn(d, "SCSI Status = 02, Sense key = %02x, ASC = %02x, ASCQ = %02x\n",
2051                                 sd[2] & 0x0f, sd[12], sd[13]);
2052                 else
2053                         dev_warn(d, "SCSI Status = %02x\n", ei->ScsiStatus);
2054                 if (ei->ScsiStatus == 0)
2055                         dev_warn(d, "SCSI status is abnormally zero.  "
2056                         "(probably indicates selection timeout "
2057                         "reported incorrectly due to a known "
2058                         "firmware bug, circa July, 2001.)\n");
2059                 break;
2060         case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2061                 break;
2062         case CMD_DATA_OVERRUN:
2063                 hpsa_print_cmd(h, "overrun condition", cp);
2064                 break;
2065         case CMD_INVALID: {
2066                 /* controller unfortunately reports SCSI passthru's
2067                  * to non-existent targets as invalid commands.
2068                  */
2069                 hpsa_print_cmd(h, "invalid command", cp);
2070                 dev_warn(d, "probably means device no longer present\n");
2071                 }
2072                 break;
2073         case CMD_PROTOCOL_ERR:
2074                 hpsa_print_cmd(h, "protocol error", cp);
2075                 break;
2076         case CMD_HARDWARE_ERR:
2077                 hpsa_print_cmd(h, "hardware error", cp);
2078                 break;
2079         case CMD_CONNECTION_LOST:
2080                 hpsa_print_cmd(h, "connection lost", cp);
2081                 break;
2082         case CMD_ABORTED:
2083                 hpsa_print_cmd(h, "aborted", cp);
2084                 break;
2085         case CMD_ABORT_FAILED:
2086                 hpsa_print_cmd(h, "abort failed", cp);
2087                 break;
2088         case CMD_UNSOLICITED_ABORT:
2089                 hpsa_print_cmd(h, "unsolicited abort", cp);
2090                 break;
2091         case CMD_TIMEOUT:
2092                 hpsa_print_cmd(h, "timed out", cp);
2093                 break;
2094         case CMD_UNABORTABLE:
2095                 hpsa_print_cmd(h, "unabortable", cp);
2096                 break;
2097         default:
2098                 hpsa_print_cmd(h, "unknown status", cp);
2099                 dev_warn(d, "Unknown command status %x\n",
2100                                 ei->CommandStatus);
2101         }
2102 }
2103
2104 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
2105                         u16 page, unsigned char *buf,
2106                         unsigned char bufsize)
2107 {
2108         int rc = IO_OK;
2109         struct CommandList *c;
2110         struct ErrorInfo *ei;
2111
2112         c = cmd_special_alloc(h);
2113
2114         if (c == NULL) {                        /* trouble... */
2115                 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2116                 return -ENOMEM;
2117         }
2118
2119         if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
2120                         page, scsi3addr, TYPE_CMD)) {
2121                 rc = -1;
2122                 goto out;
2123         }
2124         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
2125         ei = c->err_info;
2126         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2127                 hpsa_scsi_interpret_error(h, c);
2128                 rc = -1;
2129         }
2130 out:
2131         cmd_special_free(h, c);
2132         return rc;
2133 }
2134
2135 static int hpsa_bmic_ctrl_mode_sense(struct ctlr_info *h,
2136                 unsigned char *scsi3addr, unsigned char page,
2137                 struct bmic_controller_parameters *buf, size_t bufsize)
2138 {
2139         int rc = IO_OK;
2140         struct CommandList *c;
2141         struct ErrorInfo *ei;
2142
2143         c = cmd_special_alloc(h);
2144
2145         if (c == NULL) {                        /* trouble... */
2146                 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2147                 return -ENOMEM;
2148         }
2149
2150         if (fill_cmd(c, BMIC_SENSE_CONTROLLER_PARAMETERS, h, buf, bufsize,
2151                         page, scsi3addr, TYPE_CMD)) {
2152                 rc = -1;
2153                 goto out;
2154         }
2155         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
2156         ei = c->err_info;
2157         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2158                 hpsa_scsi_interpret_error(h, c);
2159                 rc = -1;
2160         }
2161 out:
2162         cmd_special_free(h, c);
2163         return rc;
2164         }
2165
2166 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr,
2167         u8 reset_type)
2168 {
2169         int rc = IO_OK;
2170         struct CommandList *c;
2171         struct ErrorInfo *ei;
2172
2173         c = cmd_special_alloc(h);
2174
2175         if (c == NULL) {                        /* trouble... */
2176                 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2177                 return -ENOMEM;
2178         }
2179
2180         /* fill_cmd can't fail here, no data buffer to map. */
2181         (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
2182                         scsi3addr, TYPE_MSG);
2183         c->Request.CDB[1] = reset_type; /* fill_cmd defaults to LUN reset */
2184         hpsa_scsi_do_simple_cmd_core(h, c);
2185         /* no unmap needed here because no data xfer. */
2186
2187         ei = c->err_info;
2188         if (ei->CommandStatus != 0) {
2189                 hpsa_scsi_interpret_error(h, c);
2190                 rc = -1;
2191         }
2192         cmd_special_free(h, c);
2193         return rc;
2194 }
2195
2196 static void hpsa_get_raid_level(struct ctlr_info *h,
2197         unsigned char *scsi3addr, unsigned char *raid_level)
2198 {
2199         int rc;
2200         unsigned char *buf;
2201
2202         *raid_level = RAID_UNKNOWN;
2203         buf = kzalloc(64, GFP_KERNEL);
2204         if (!buf)
2205                 return;
2206         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0xC1, buf, 64);
2207         if (rc == 0)
2208                 *raid_level = buf[8];
2209         if (*raid_level > RAID_UNKNOWN)
2210                 *raid_level = RAID_UNKNOWN;
2211         kfree(buf);
2212         return;
2213 }
2214
2215 #define HPSA_MAP_DEBUG
2216 #ifdef HPSA_MAP_DEBUG
2217 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
2218                                 struct raid_map_data *map_buff)
2219 {
2220         struct raid_map_disk_data *dd = &map_buff->data[0];
2221         int map, row, col;
2222         u16 map_cnt, row_cnt, disks_per_row;
2223
2224         if (rc != 0)
2225                 return;
2226
2227         /* Show details only if debugging has been activated. */
2228         if (h->raid_offload_debug < 2)
2229                 return;
2230
2231         dev_info(&h->pdev->dev, "structure_size = %u\n",
2232                                 le32_to_cpu(map_buff->structure_size));
2233         dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
2234                         le32_to_cpu(map_buff->volume_blk_size));
2235         dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
2236                         le64_to_cpu(map_buff->volume_blk_cnt));
2237         dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
2238                         map_buff->phys_blk_shift);
2239         dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
2240                         map_buff->parity_rotation_shift);
2241         dev_info(&h->pdev->dev, "strip_size = %u\n",
2242                         le16_to_cpu(map_buff->strip_size));
2243         dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
2244                         le64_to_cpu(map_buff->disk_starting_blk));
2245         dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
2246                         le64_to_cpu(map_buff->disk_blk_cnt));
2247         dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
2248                         le16_to_cpu(map_buff->data_disks_per_row));
2249         dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
2250                         le16_to_cpu(map_buff->metadata_disks_per_row));
2251         dev_info(&h->pdev->dev, "row_cnt = %u\n",
2252                         le16_to_cpu(map_buff->row_cnt));
2253         dev_info(&h->pdev->dev, "layout_map_count = %u\n",
2254                         le16_to_cpu(map_buff->layout_map_count));
2255         dev_info(&h->pdev->dev, "flags = %u\n",
2256                         le16_to_cpu(map_buff->flags));
2257         if (map_buff->flags & RAID_MAP_FLAG_ENCRYPT_ON)
2258                 dev_info(&h->pdev->dev, "encrypytion = ON\n");
2259         else
2260                 dev_info(&h->pdev->dev, "encrypytion = OFF\n");
2261         dev_info(&h->pdev->dev, "dekindex = %u\n",
2262                         le16_to_cpu(map_buff->dekindex));
2263
2264         map_cnt = le16_to_cpu(map_buff->layout_map_count);
2265         for (map = 0; map < map_cnt; map++) {
2266                 dev_info(&h->pdev->dev, "Map%u:\n", map);
2267                 row_cnt = le16_to_cpu(map_buff->row_cnt);
2268                 for (row = 0; row < row_cnt; row++) {
2269                         dev_info(&h->pdev->dev, "  Row%u:\n", row);
2270                         disks_per_row =
2271                                 le16_to_cpu(map_buff->data_disks_per_row);
2272                         for (col = 0; col < disks_per_row; col++, dd++)
2273                                 dev_info(&h->pdev->dev,
2274                                         "    D%02u: h=0x%04x xor=%u,%u\n",
2275                                         col, dd->ioaccel_handle,
2276                                         dd->xor_mult[0], dd->xor_mult[1]);
2277                         disks_per_row =
2278                                 le16_to_cpu(map_buff->metadata_disks_per_row);
2279                         for (col = 0; col < disks_per_row; col++, dd++)
2280                                 dev_info(&h->pdev->dev,
2281                                         "    M%02u: h=0x%04x xor=%u,%u\n",
2282                                         col, dd->ioaccel_handle,
2283                                         dd->xor_mult[0], dd->xor_mult[1]);
2284                 }
2285         }
2286 }
2287 #else
2288 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
2289                         __attribute__((unused)) int rc,
2290                         __attribute__((unused)) struct raid_map_data *map_buff)
2291 {
2292 }
2293 #endif
2294
2295 static int hpsa_get_raid_map(struct ctlr_info *h,
2296         unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
2297 {
2298         int rc = 0;
2299         struct CommandList *c;
2300         struct ErrorInfo *ei;
2301
2302         c = cmd_special_alloc(h);
2303         if (c == NULL) {
2304                 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2305                 return -ENOMEM;
2306         }
2307         if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
2308                         sizeof(this_device->raid_map), 0,
2309                         scsi3addr, TYPE_CMD)) {
2310                 dev_warn(&h->pdev->dev, "Out of memory in hpsa_get_raid_map()\n");
2311                 cmd_special_free(h, c);
2312                 return -ENOMEM;
2313         }
2314         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
2315         ei = c->err_info;
2316         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2317                 hpsa_scsi_interpret_error(h, c);
2318                 cmd_special_free(h, c);
2319                 return -1;
2320         }
2321         cmd_special_free(h, c);
2322
2323         /* @todo in the future, dynamically allocate RAID map memory */
2324         if (le32_to_cpu(this_device->raid_map.structure_size) >
2325                                 sizeof(this_device->raid_map)) {
2326                 dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
2327                 rc = -1;
2328         }
2329         hpsa_debug_map_buff(h, rc, &this_device->raid_map);
2330         return rc;
2331 }
2332
2333 static int hpsa_vpd_page_supported(struct ctlr_info *h,
2334         unsigned char scsi3addr[], u8 page)
2335 {
2336         int rc;
2337         int i;
2338         int pages;
2339         unsigned char *buf, bufsize;
2340
2341         buf = kzalloc(256, GFP_KERNEL);
2342         if (!buf)
2343                 return 0;
2344
2345         /* Get the size of the page list first */
2346         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
2347                                 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
2348                                 buf, HPSA_VPD_HEADER_SZ);
2349         if (rc != 0)
2350                 goto exit_unsupported;
2351         pages = buf[3];
2352         if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
2353                 bufsize = pages + HPSA_VPD_HEADER_SZ;
2354         else
2355                 bufsize = 255;
2356
2357         /* Get the whole VPD page list */
2358         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
2359                                 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
2360                                 buf, bufsize);
2361         if (rc != 0)
2362                 goto exit_unsupported;
2363
2364         pages = buf[3];
2365         for (i = 1; i <= pages; i++)
2366                 if (buf[3 + i] == page)
2367                         goto exit_supported;
2368 exit_unsupported:
2369         kfree(buf);
2370         return 0;
2371 exit_supported:
2372         kfree(buf);
2373         return 1;
2374 }
2375
2376 static void hpsa_get_ioaccel_status(struct ctlr_info *h,
2377         unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
2378 {
2379         int rc;
2380         unsigned char *buf;
2381         u8 ioaccel_status;
2382
2383         this_device->offload_config = 0;
2384         this_device->offload_enabled = 0;
2385
2386         buf = kzalloc(64, GFP_KERNEL);
2387         if (!buf)
2388                 return;
2389         if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
2390                 goto out;
2391         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
2392                         VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
2393         if (rc != 0)
2394                 goto out;
2395
2396 #define IOACCEL_STATUS_BYTE 4
2397 #define OFFLOAD_CONFIGURED_BIT 0x01
2398 #define OFFLOAD_ENABLED_BIT 0x02
2399         ioaccel_status = buf[IOACCEL_STATUS_BYTE];
2400         this_device->offload_config =
2401                 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
2402         if (this_device->offload_config) {
2403                 this_device->offload_enabled =
2404                         !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
2405                 if (hpsa_get_raid_map(h, scsi3addr, this_device))
2406                         this_device->offload_enabled = 0;
2407         }
2408 out:
2409         kfree(buf);
2410         return;
2411 }
2412
2413 /* Get the device id from inquiry page 0x83 */
2414 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
2415         unsigned char *device_id, int buflen)
2416 {
2417         int rc;
2418         unsigned char *buf;
2419
2420         if (buflen > 16)
2421                 buflen = 16;
2422         buf = kzalloc(64, GFP_KERNEL);
2423         if (!buf)
2424                 return -ENOMEM;
2425         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0x83, buf, 64);
2426         if (rc == 0)
2427                 memcpy(device_id, &buf[8], buflen);
2428         kfree(buf);
2429         return rc != 0;
2430 }
2431
2432 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
2433                 struct ReportLUNdata *buf, int bufsize,
2434                 int extended_response)
2435 {
2436         int rc = IO_OK;
2437         struct CommandList *c;
2438         unsigned char scsi3addr[8];
2439         struct ErrorInfo *ei;
2440
2441         c = cmd_special_alloc(h);
2442         if (c == NULL) {                        /* trouble... */
2443                 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2444                 return -1;
2445         }
2446         /* address the controller */
2447         memset(scsi3addr, 0, sizeof(scsi3addr));
2448         if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
2449                 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
2450                 rc = -1;
2451                 goto out;
2452         }
2453         if (extended_response)
2454                 c->Request.CDB[1] = extended_response;
2455         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
2456         ei = c->err_info;
2457         if (ei->CommandStatus != 0 &&
2458             ei->CommandStatus != CMD_DATA_UNDERRUN) {
2459                 hpsa_scsi_interpret_error(h, c);
2460                 rc = -1;
2461         } else {
2462                 if (buf->extended_response_flag != extended_response) {
2463                         dev_err(&h->pdev->dev,
2464                                 "report luns requested format %u, got %u\n",
2465                                 extended_response,
2466                                 buf->extended_response_flag);
2467                         rc = -1;
2468                 }
2469         }
2470 out:
2471         cmd_special_free(h, c);
2472         return rc;
2473 }
2474
2475 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
2476                 struct ReportLUNdata *buf,
2477                 int bufsize, int extended_response)
2478 {
2479         return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
2480 }
2481
2482 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
2483                 struct ReportLUNdata *buf, int bufsize)
2484 {
2485         return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
2486 }
2487
2488 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
2489         int bus, int target, int lun)
2490 {
2491         device->bus = bus;
2492         device->target = target;
2493         device->lun = lun;
2494 }
2495
2496 /* Use VPD inquiry to get details of volume status */
2497 static int hpsa_get_volume_status(struct ctlr_info *h,
2498                                         unsigned char scsi3addr[])
2499 {
2500         int rc;
2501         int status;
2502         int size;
2503         unsigned char *buf;
2504
2505         buf = kzalloc(64, GFP_KERNEL);
2506         if (!buf)
2507                 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
2508
2509         /* Does controller have VPD for logical volume status? */
2510         if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
2511                 goto exit_failed;
2512
2513         /* Get the size of the VPD return buffer */
2514         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
2515                                         buf, HPSA_VPD_HEADER_SZ);
2516         if (rc != 0)
2517                 goto exit_failed;
2518         size = buf[3];
2519
2520         /* Now get the whole VPD buffer */
2521         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
2522                                         buf, size + HPSA_VPD_HEADER_SZ);
2523         if (rc != 0)
2524                 goto exit_failed;
2525         status = buf[4]; /* status byte */
2526
2527         kfree(buf);
2528         return status;
2529 exit_failed:
2530         kfree(buf);
2531         return HPSA_VPD_LV_STATUS_UNSUPPORTED;
2532 }
2533
2534 /* Determine offline status of a volume.
2535  * Return either:
2536  *  0 (not offline)
2537  *  0xff (offline for unknown reasons)
2538  *  # (integer code indicating one of several NOT READY states
2539  *     describing why a volume is to be kept offline)
2540  */
2541 static int hpsa_volume_offline(struct ctlr_info *h,
2542                                         unsigned char scsi3addr[])
2543 {
2544         struct CommandList *c;
2545         unsigned char *sense, sense_key, asc, ascq;
2546         int ldstat = 0;
2547         u16 cmd_status;
2548         u8 scsi_status;
2549 #define ASC_LUN_NOT_READY 0x04
2550 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
2551 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
2552
2553         c = cmd_alloc(h);
2554         if (!c)
2555                 return 0;
2556         (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
2557         hpsa_scsi_do_simple_cmd_core(h, c);
2558         sense = c->err_info->SenseInfo;
2559         sense_key = sense[2];
2560         asc = sense[12];
2561         ascq = sense[13];
2562         cmd_status = c->err_info->CommandStatus;
2563         scsi_status = c->err_info->ScsiStatus;
2564         cmd_free(h, c);
2565         /* Is the volume 'not ready'? */
2566         if (cmd_status != CMD_TARGET_STATUS ||
2567                 scsi_status != SAM_STAT_CHECK_CONDITION ||
2568                 sense_key != NOT_READY ||
2569                 asc != ASC_LUN_NOT_READY)  {
2570                 return 0;
2571         }
2572
2573         /* Determine the reason for not ready state */
2574         ldstat = hpsa_get_volume_status(h, scsi3addr);
2575
2576         /* Keep volume offline in certain cases: */
2577         switch (ldstat) {
2578         case HPSA_LV_UNDERGOING_ERASE:
2579         case HPSA_LV_UNDERGOING_RPI:
2580         case HPSA_LV_PENDING_RPI:
2581         case HPSA_LV_ENCRYPTED_NO_KEY:
2582         case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
2583         case HPSA_LV_UNDERGOING_ENCRYPTION:
2584         case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
2585         case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
2586                 return ldstat;
2587         case HPSA_VPD_LV_STATUS_UNSUPPORTED:
2588                 /* If VPD status page isn't available,
2589                  * use ASC/ASCQ to determine state
2590                  */
2591                 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
2592                         (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
2593                         return ldstat;
2594                 break;
2595         default:
2596                 break;
2597         }
2598         return 0;
2599 }
2600
2601 static int hpsa_update_device_info(struct ctlr_info *h,
2602         unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
2603         unsigned char *is_OBDR_device)
2604 {
2605
2606 #define OBDR_SIG_OFFSET 43
2607 #define OBDR_TAPE_SIG "$DR-10"
2608 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
2609 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
2610
2611         unsigned char *inq_buff;
2612         unsigned char *obdr_sig;
2613
2614         inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
2615         if (!inq_buff)
2616                 goto bail_out;
2617
2618         /* Do an inquiry to the device to see what it is. */
2619         if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
2620                 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
2621                 /* Inquiry failed (msg printed already) */
2622                 dev_err(&h->pdev->dev,
2623                         "hpsa_update_device_info: inquiry failed\n");
2624                 goto bail_out;
2625         }
2626
2627         this_device->devtype = (inq_buff[0] & 0x1f);
2628         memcpy(this_device->scsi3addr, scsi3addr, 8);
2629         memcpy(this_device->vendor, &inq_buff[8],
2630                 sizeof(this_device->vendor));
2631         memcpy(this_device->model, &inq_buff[16],
2632                 sizeof(this_device->model));
2633         memset(this_device->device_id, 0,
2634                 sizeof(this_device->device_id));
2635         hpsa_get_device_id(h, scsi3addr, this_device->device_id,
2636                 sizeof(this_device->device_id));
2637
2638         if (this_device->devtype == TYPE_DISK &&
2639                 is_logical_dev_addr_mode(scsi3addr)) {
2640                 int volume_offline;
2641
2642                 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
2643                 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
2644                         hpsa_get_ioaccel_status(h, scsi3addr, this_device);
2645                 volume_offline = hpsa_volume_offline(h, scsi3addr);
2646                 if (volume_offline < 0 || volume_offline > 0xff)
2647                         volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED;
2648                 this_device->volume_offline = volume_offline & 0xff;
2649         } else {
2650                 this_device->raid_level = RAID_UNKNOWN;
2651                 this_device->offload_config = 0;
2652                 this_device->offload_enabled = 0;
2653                 this_device->volume_offline = 0;
2654         }
2655
2656         if (is_OBDR_device) {
2657                 /* See if this is a One-Button-Disaster-Recovery device
2658                  * by looking for "$DR-10" at offset 43 in inquiry data.
2659                  */
2660                 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
2661                 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
2662                                         strncmp(obdr_sig, OBDR_TAPE_SIG,
2663                                                 OBDR_SIG_LEN) == 0);
2664         }
2665
2666         kfree(inq_buff);
2667         return 0;
2668
2669 bail_out:
2670         kfree(inq_buff);
2671         return 1;
2672 }
2673
2674 static unsigned char *ext_target_model[] = {
2675         "MSA2012",
2676         "MSA2024",
2677         "MSA2312",
2678         "MSA2324",
2679         "P2000 G3 SAS",
2680         "MSA 2040 SAS",
2681         NULL,
2682 };
2683
2684 static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
2685 {
2686         int i;
2687
2688         for (i = 0; ext_target_model[i]; i++)
2689                 if (strncmp(device->model, ext_target_model[i],
2690                         strlen(ext_target_model[i])) == 0)
2691                         return 1;
2692         return 0;
2693 }
2694
2695 /* Helper function to assign bus, target, lun mapping of devices.
2696  * Puts non-external target logical volumes on bus 0, external target logical
2697  * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
2698  * Logical drive target and lun are assigned at this time, but
2699  * physical device lun and target assignment are deferred (assigned
2700  * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
2701  */
2702 static void figure_bus_target_lun(struct ctlr_info *h,
2703         u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
2704 {
2705         u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
2706
2707         if (!is_logical_dev_addr_mode(lunaddrbytes)) {
2708                 /* physical device, target and lun filled in later */
2709                 if (is_hba_lunid(lunaddrbytes))
2710                         hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
2711                 else
2712                         /* defer target, lun assignment for physical devices */
2713                         hpsa_set_bus_target_lun(device, 2, -1, -1);
2714                 return;
2715         }
2716         /* It's a logical device */
2717         if (is_ext_target(h, device)) {
2718                 /* external target way, put logicals on bus 1
2719                  * and match target/lun numbers box
2720                  * reports, other smart array, bus 0, target 0, match lunid
2721                  */
2722                 hpsa_set_bus_target_lun(device,
2723                         1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
2724                 return;
2725         }
2726         hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
2727 }
2728
2729 /*
2730  * If there is no lun 0 on a target, linux won't find any devices.
2731  * For the external targets (arrays), we have to manually detect the enclosure
2732  * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
2733  * it for some reason.  *tmpdevice is the target we're adding,
2734  * this_device is a pointer into the current element of currentsd[]
2735  * that we're building up in update_scsi_devices(), below.
2736  * lunzerobits is a bitmap that tracks which targets already have a
2737  * lun 0 assigned.
2738  * Returns 1 if an enclosure was added, 0 if not.
2739  */
2740 static int add_ext_target_dev(struct ctlr_info *h,
2741         struct hpsa_scsi_dev_t *tmpdevice,
2742         struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
2743         unsigned long lunzerobits[], int *n_ext_target_devs)
2744 {
2745         unsigned char scsi3addr[8];
2746
2747         if (test_bit(tmpdevice->target, lunzerobits))
2748                 return 0; /* There is already a lun 0 on this target. */
2749
2750         if (!is_logical_dev_addr_mode(lunaddrbytes))
2751                 return 0; /* It's the logical targets that may lack lun 0. */
2752
2753         if (!is_ext_target(h, tmpdevice))
2754                 return 0; /* Only external target devices have this problem. */
2755
2756         if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
2757                 return 0;
2758
2759         memset(scsi3addr, 0, 8);
2760         scsi3addr[3] = tmpdevice->target;
2761         if (is_hba_lunid(scsi3addr))
2762                 return 0; /* Don't add the RAID controller here. */
2763
2764         if (is_scsi_rev_5(h))
2765                 return 0; /* p1210m doesn't need to do this. */
2766
2767         if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
2768                 dev_warn(&h->pdev->dev, "Maximum number of external "
2769                         "target devices exceeded.  Check your hardware "
2770                         "configuration.");
2771                 return 0;
2772         }
2773
2774         if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
2775                 return 0;
2776         (*n_ext_target_devs)++;
2777         hpsa_set_bus_target_lun(this_device,
2778                                 tmpdevice->bus, tmpdevice->target, 0);
2779         set_bit(tmpdevice->target, lunzerobits);
2780         return 1;
2781 }
2782
2783 /*
2784  * Get address of physical disk used for an ioaccel2 mode command:
2785  *      1. Extract ioaccel2 handle from the command.
2786  *      2. Find a matching ioaccel2 handle from list of physical disks.
2787  *      3. Return:
2788  *              1 and set scsi3addr to address of matching physical
2789  *              0 if no matching physical disk was found.
2790  */
2791 static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h,
2792         struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr)
2793 {
2794         struct ReportExtendedLUNdata *physicals = NULL;
2795         int responsesize = 24;  /* size of physical extended response */
2796         int extended = 2;       /* flag forces reporting 'other dev info'. */
2797         int reportsize = sizeof(*physicals) + HPSA_MAX_PHYS_LUN * responsesize;
2798         u32 nphysicals = 0;     /* number of reported physical devs */
2799         int found = 0;          /* found match (1) or not (0) */
2800         u32 find;               /* handle we need to match */
2801         int i;
2802         struct scsi_cmnd *scmd; /* scsi command within request being aborted */
2803         struct hpsa_scsi_dev_t *d; /* device of request being aborted */
2804         struct io_accel2_cmd *c2a; /* ioaccel2 command to abort */
2805         u32 it_nexus;           /* 4 byte device handle for the ioaccel2 cmd */
2806         u32 scsi_nexus;         /* 4 byte device handle for the ioaccel2 cmd */
2807
2808         if (ioaccel2_cmd_to_abort->cmd_type != CMD_IOACCEL2)
2809                 return 0; /* no match */
2810
2811         /* point to the ioaccel2 device handle */
2812         c2a = &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex];
2813         if (c2a == NULL)
2814                 return 0; /* no match */
2815
2816         scmd = (struct scsi_cmnd *) ioaccel2_cmd_to_abort->scsi_cmd;
2817         if (scmd == NULL)
2818                 return 0; /* no match */
2819
2820         d = scmd->device->hostdata;
2821         if (d == NULL)
2822                 return 0; /* no match */
2823
2824         it_nexus = cpu_to_le32(d->ioaccel_handle);
2825         scsi_nexus = cpu_to_le32(c2a->scsi_nexus);
2826         find = c2a->scsi_nexus;
2827
2828         if (h->raid_offload_debug > 0)
2829                 dev_info(&h->pdev->dev,
2830                         "%s: scsi_nexus:0x%08x device id: 0x%02x%02x%02x%02x %02x%02x%02x%02x %02x%02x%02x%02x %02x%02x%02x%02x\n",
2831                         __func__, scsi_nexus,
2832                         d->device_id[0], d->device_id[1], d->device_id[2],
2833                         d->device_id[3], d->device_id[4], d->device_id[5],
2834                         d->device_id[6], d->device_id[7], d->device_id[8],
2835                         d->device_id[9], d->device_id[10], d->device_id[11],
2836                         d->device_id[12], d->device_id[13], d->device_id[14],
2837                         d->device_id[15]);
2838
2839         /* Get the list of physical devices */
2840         physicals = kzalloc(reportsize, GFP_KERNEL);
2841         if (physicals == NULL)
2842                 return 0;
2843         if (hpsa_scsi_do_report_phys_luns(h, (struct ReportLUNdata *) physicals,
2844                 reportsize, extended)) {
2845                 dev_err(&h->pdev->dev,
2846                         "Can't lookup %s device handle: report physical LUNs failed.\n",
2847                         "HP SSD Smart Path");
2848                 kfree(physicals);
2849                 return 0;
2850         }
2851         nphysicals = be32_to_cpu(*((__be32 *)physicals->LUNListLength)) /
2852                                                         responsesize;
2853
2854         /* find ioaccel2 handle in list of physicals: */
2855         for (i = 0; i < nphysicals; i++) {
2856                 struct ext_report_lun_entry *entry = &physicals->LUN[i];
2857
2858                 /* handle is in bytes 28-31 of each lun */
2859                 if (entry->ioaccel_handle != find)
2860                         continue; /* didn't match */
2861                 found = 1;
2862                 memcpy(scsi3addr, entry->lunid, 8);
2863                 if (h->raid_offload_debug > 0)
2864                         dev_info(&h->pdev->dev,
2865                                 "%s: Searched h=0x%08x, Found h=0x%08x, scsiaddr 0x%8phN\n",
2866                                 __func__, find,
2867                                 entry->ioaccel_handle, scsi3addr);
2868                 break; /* found it */
2869         }
2870
2871         kfree(physicals);
2872         if (found)
2873                 return 1;
2874         else
2875                 return 0;
2876
2877 }
2878 /*
2879  * Do CISS_REPORT_PHYS and CISS_REPORT_LOG.  Data is returned in physdev,
2880  * logdev.  The number of luns in physdev and logdev are returned in
2881  * *nphysicals and *nlogicals, respectively.
2882  * Returns 0 on success, -1 otherwise.
2883  */
2884 static int hpsa_gather_lun_info(struct ctlr_info *h,
2885         int reportphyslunsize, int reportloglunsize,
2886         struct ReportLUNdata *physdev, u32 *nphysicals, int *physical_mode,
2887         struct ReportLUNdata *logdev, u32 *nlogicals)
2888 {
2889         int physical_entry_size = 8;
2890
2891         *physical_mode = 0;
2892
2893         /* For I/O accelerator mode we need to read physical device handles */
2894         if (h->transMethod & CFGTBL_Trans_io_accel1 ||
2895                 h->transMethod & CFGTBL_Trans_io_accel2) {
2896                 *physical_mode = HPSA_REPORT_PHYS_EXTENDED;
2897                 physical_entry_size = 24;
2898         }
2899         if (hpsa_scsi_do_report_phys_luns(h, physdev, reportphyslunsize,
2900                                                         *physical_mode)) {
2901                 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
2902                 return -1;
2903         }
2904         *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) /
2905                                                         physical_entry_size;
2906         if (*nphysicals > HPSA_MAX_PHYS_LUN) {
2907                 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
2908                         "  %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
2909                         *nphysicals - HPSA_MAX_PHYS_LUN);
2910                 *nphysicals = HPSA_MAX_PHYS_LUN;
2911         }
2912         if (hpsa_scsi_do_report_log_luns(h, logdev, reportloglunsize)) {
2913                 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
2914                 return -1;
2915         }
2916         *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
2917         /* Reject Logicals in excess of our max capability. */
2918         if (*nlogicals > HPSA_MAX_LUN) {
2919                 dev_warn(&h->pdev->dev,
2920                         "maximum logical LUNs (%d) exceeded.  "
2921                         "%d LUNs ignored.\n", HPSA_MAX_LUN,
2922                         *nlogicals - HPSA_MAX_LUN);
2923                         *nlogicals = HPSA_MAX_LUN;
2924         }
2925         if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
2926                 dev_warn(&h->pdev->dev,
2927                         "maximum logical + physical LUNs (%d) exceeded. "
2928                         "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
2929                         *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
2930                 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
2931         }
2932         return 0;
2933 }
2934
2935 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
2936         int i, int nphysicals, int nlogicals,
2937         struct ReportExtendedLUNdata *physdev_list,
2938         struct ReportLUNdata *logdev_list)
2939 {
2940         /* Helper function, figure out where the LUN ID info is coming from
2941          * given index i, lists of physical and logical devices, where in
2942          * the list the raid controller is supposed to appear (first or last)
2943          */
2944
2945         int logicals_start = nphysicals + (raid_ctlr_position == 0);
2946         int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
2947
2948         if (i == raid_ctlr_position)
2949                 return RAID_CTLR_LUNID;
2950
2951         if (i < logicals_start)
2952                 return &physdev_list->LUN[i -
2953                                 (raid_ctlr_position == 0)].lunid[0];
2954
2955         if (i < last_device)
2956                 return &logdev_list->LUN[i - nphysicals -
2957                         (raid_ctlr_position == 0)][0];
2958         BUG();
2959         return NULL;
2960 }
2961
2962 static int hpsa_hba_mode_enabled(struct ctlr_info *h)
2963 {
2964         int rc;
2965         int hba_mode_enabled;
2966         struct bmic_controller_parameters *ctlr_params;
2967         ctlr_params = kzalloc(sizeof(struct bmic_controller_parameters),
2968                 GFP_KERNEL);
2969
2970         if (!ctlr_params)
2971                 return -ENOMEM;
2972         rc = hpsa_bmic_ctrl_mode_sense(h, RAID_CTLR_LUNID, 0, ctlr_params,
2973                 sizeof(struct bmic_controller_parameters));
2974         if (rc) {
2975                 kfree(ctlr_params);
2976                 return rc;
2977         }
2978
2979         hba_mode_enabled =
2980                 ((ctlr_params->nvram_flags & HBA_MODE_ENABLED_FLAG) != 0);
2981         kfree(ctlr_params);
2982         return hba_mode_enabled;
2983 }
2984
2985 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
2986 {
2987         /* the idea here is we could get notified
2988          * that some devices have changed, so we do a report
2989          * physical luns and report logical luns cmd, and adjust
2990          * our list of devices accordingly.
2991          *
2992          * The scsi3addr's of devices won't change so long as the
2993          * adapter is not reset.  That means we can rescan and
2994          * tell which devices we already know about, vs. new
2995          * devices, vs.  disappearing devices.
2996          */
2997         struct ReportExtendedLUNdata *physdev_list = NULL;
2998         struct ReportLUNdata *logdev_list = NULL;
2999         u32 nphysicals = 0;
3000         u32 nlogicals = 0;
3001         int physical_mode = 0;
3002         u32 ndev_allocated = 0;
3003         struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
3004         int ncurrent = 0;
3005         int i, n_ext_target_devs, ndevs_to_allocate;
3006         int raid_ctlr_position;
3007         int rescan_hba_mode;
3008         DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
3009
3010         currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
3011         physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL);
3012         logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL);
3013         tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
3014
3015         if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
3016                 dev_err(&h->pdev->dev, "out of memory\n");
3017                 goto out;
3018         }
3019         memset(lunzerobits, 0, sizeof(lunzerobits));
3020
3021         rescan_hba_mode = hpsa_hba_mode_enabled(h);
3022         if (rescan_hba_mode < 0)
3023                 goto out;
3024
3025         if (!h->hba_mode_enabled && rescan_hba_mode)
3026                 dev_warn(&h->pdev->dev, "HBA mode enabled\n");
3027         else if (h->hba_mode_enabled && !rescan_hba_mode)
3028                 dev_warn(&h->pdev->dev, "HBA mode disabled\n");
3029
3030         h->hba_mode_enabled = rescan_hba_mode;
3031
3032         if (hpsa_gather_lun_info(h,
3033                         sizeof(*physdev_list), sizeof(*logdev_list),
3034                         (struct ReportLUNdata *) physdev_list, &nphysicals,
3035                         &physical_mode, logdev_list, &nlogicals))
3036                 goto out;
3037
3038         /* We might see up to the maximum number of logical and physical disks
3039          * plus external target devices, and a device for the local RAID
3040          * controller.
3041          */
3042         ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
3043
3044         /* Allocate the per device structures */
3045         for (i = 0; i < ndevs_to_allocate; i++) {
3046                 if (i >= HPSA_MAX_DEVICES) {
3047                         dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
3048                                 "  %d devices ignored.\n", HPSA_MAX_DEVICES,
3049                                 ndevs_to_allocate - HPSA_MAX_DEVICES);
3050                         break;
3051                 }
3052
3053                 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
3054                 if (!currentsd[i]) {
3055                         dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
3056                                 __FILE__, __LINE__);
3057                         goto out;
3058                 }
3059                 ndev_allocated++;
3060         }
3061
3062         if (is_scsi_rev_5(h))
3063                 raid_ctlr_position = 0;
3064         else
3065                 raid_ctlr_position = nphysicals + nlogicals;
3066
3067         /* adjust our table of devices */
3068         n_ext_target_devs = 0;
3069         for (i = 0; i < nphysicals + nlogicals + 1; i++) {
3070                 u8 *lunaddrbytes, is_OBDR = 0;
3071
3072                 /* Figure out where the LUN ID info is coming from */
3073                 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
3074                         i, nphysicals, nlogicals, physdev_list, logdev_list);
3075                 /* skip masked physical devices. */
3076                 if (lunaddrbytes[3] & 0xC0 &&
3077                         i < nphysicals + (raid_ctlr_position == 0))
3078                         continue;
3079
3080                 /* Get device type, vendor, model, device id */
3081                 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
3082                                                         &is_OBDR))
3083                         continue; /* skip it if we can't talk to it. */
3084                 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
3085                 this_device = currentsd[ncurrent];
3086
3087                 /*
3088                  * For external target devices, we have to insert a LUN 0 which
3089                  * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
3090                  * is nonetheless an enclosure device there.  We have to
3091                  * present that otherwise linux won't find anything if
3092                  * there is no lun 0.
3093                  */
3094                 if (add_ext_target_dev(h, tmpdevice, this_device,
3095                                 lunaddrbytes, lunzerobits,
3096                                 &n_ext_target_devs)) {
3097                         ncurrent++;
3098                         this_device = currentsd[ncurrent];
3099                 }
3100
3101                 *this_device = *tmpdevice;
3102
3103                 switch (this_device->devtype) {
3104                 case TYPE_ROM:
3105                         /* We don't *really* support actual CD-ROM devices,
3106                          * just "One Button Disaster Recovery" tape drive
3107                          * which temporarily pretends to be a CD-ROM drive.
3108                          * So we check that the device is really an OBDR tape
3109                          * device by checking for "$DR-10" in bytes 43-48 of
3110                          * the inquiry data.
3111                          */
3112                         if (is_OBDR)
3113                                 ncurrent++;
3114                         break;
3115                 case TYPE_DISK:
3116                         if (h->hba_mode_enabled) {
3117                                 /* never use raid mapper in HBA mode */
3118                                 this_device->offload_enabled = 0;
3119                                 ncurrent++;
3120                                 break;
3121                         } else if (h->acciopath_status) {
3122                                 if (i >= nphysicals) {
3123                                         ncurrent++;
3124                                         break;
3125                                 }
3126                         } else {
3127                                 if (i < nphysicals)
3128                                         break;
3129                                 ncurrent++;
3130                                 break;
3131                         }
3132                         if (physical_mode == HPSA_REPORT_PHYS_EXTENDED) {
3133                                 memcpy(&this_device->ioaccel_handle,
3134                                         &lunaddrbytes[20],
3135                                         sizeof(this_device->ioaccel_handle));
3136                                 ncurrent++;
3137                         }
3138                         break;
3139                 case TYPE_TAPE:
3140                 case TYPE_MEDIUM_CHANGER:
3141                         ncurrent++;
3142                         break;
3143                 case TYPE_RAID:
3144                         /* Only present the Smartarray HBA as a RAID controller.
3145                          * If it's a RAID controller other than the HBA itself
3146                          * (an external RAID controller, MSA500 or similar)
3147                          * don't present it.
3148                          */
3149                         if (!is_hba_lunid(lunaddrbytes))
3150                                 break;
3151                         ncurrent++;
3152                         break;
3153                 default:
3154                         break;
3155                 }
3156                 if (ncurrent >= HPSA_MAX_DEVICES)
3157                         break;
3158         }
3159         adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
3160 out:
3161         kfree(tmpdevice);
3162         for (i = 0; i < ndev_allocated; i++)
3163                 kfree(currentsd[i]);
3164         kfree(currentsd);
3165         kfree(physdev_list);
3166         kfree(logdev_list);
3167 }
3168
3169 /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
3170  * dma mapping  and fills in the scatter gather entries of the
3171  * hpsa command, cp.
3172  */
3173 static int hpsa_scatter_gather(struct ctlr_info *h,
3174                 struct CommandList *cp,
3175                 struct scsi_cmnd *cmd)
3176 {
3177         unsigned int len;
3178         struct scatterlist *sg;
3179         u64 addr64;
3180         int use_sg, i, sg_index, chained;
3181         struct SGDescriptor *curr_sg;
3182
3183         BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
3184
3185         use_sg = scsi_dma_map(cmd);
3186         if (use_sg < 0)
3187                 return use_sg;
3188
3189         if (!use_sg)
3190                 goto sglist_finished;
3191
3192         curr_sg = cp->SG;
3193         chained = 0;
3194         sg_index = 0;
3195         scsi_for_each_sg(cmd, sg, use_sg, i) {
3196                 if (i == h->max_cmd_sg_entries - 1 &&
3197                         use_sg > h->max_cmd_sg_entries) {
3198                         chained = 1;
3199                         curr_sg = h->cmd_sg_list[cp->cmdindex];
3200                         sg_index = 0;
3201                 }
3202                 addr64 = (u64) sg_dma_address(sg);
3203                 len  = sg_dma_len(sg);
3204                 curr_sg->Addr = cpu_to_le64(addr64);
3205                 curr_sg->Len = cpu_to_le32(len);
3206                 curr_sg->Ext = cpu_to_le32(0);
3207                 curr_sg++;
3208         }
3209         (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
3210
3211         if (use_sg + chained > h->maxSG)
3212                 h->maxSG = use_sg + chained;
3213
3214         if (chained) {
3215                 cp->Header.SGList = h->max_cmd_sg_entries;
3216                 cp->Header.SGTotal = cpu_to_le16(use_sg + 1);
3217                 if (hpsa_map_sg_chain_block(h, cp)) {
3218                         scsi_dma_unmap(cmd);
3219                         return -1;
3220                 }
3221                 return 0;
3222         }
3223
3224 sglist_finished:
3225
3226         cp->Header.SGList = (u8) use_sg;   /* no. SGs contig in this cmd */
3227         cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in this cmd list */
3228         return 0;
3229 }
3230
3231 #define IO_ACCEL_INELIGIBLE (1)
3232 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
3233 {
3234         int is_write = 0;
3235         u32 block;
3236         u32 block_cnt;
3237
3238         /* Perform some CDB fixups if needed using 10 byte reads/writes only */
3239         switch (cdb[0]) {
3240         case WRITE_6:
3241         case WRITE_12:
3242                 is_write = 1;
3243         case READ_6:
3244         case READ_12:
3245                 if (*cdb_len == 6) {
3246                         block = (((u32) cdb[2]) << 8) | cdb[3];
3247                         block_cnt = cdb[4];
3248                 } else {
3249                         BUG_ON(*cdb_len != 12);
3250                         block = (((u32) cdb[2]) << 24) |
3251                                 (((u32) cdb[3]) << 16) |
3252                                 (((u32) cdb[4]) << 8) |
3253                                 cdb[5];
3254                         block_cnt =
3255                                 (((u32) cdb[6]) << 24) |
3256                                 (((u32) cdb[7]) << 16) |
3257                                 (((u32) cdb[8]) << 8) |
3258                                 cdb[9];
3259                 }
3260                 if (block_cnt > 0xffff)
3261                         return IO_ACCEL_INELIGIBLE;
3262
3263                 cdb[0] = is_write ? WRITE_10 : READ_10;
3264                 cdb[1] = 0;
3265                 cdb[2] = (u8) (block >> 24);
3266                 cdb[3] = (u8) (block >> 16);
3267                 cdb[4] = (u8) (block >> 8);
3268                 cdb[5] = (u8) (block);
3269                 cdb[6] = 0;
3270                 cdb[7] = (u8) (block_cnt >> 8);
3271                 cdb[8] = (u8) (block_cnt);
3272                 cdb[9] = 0;
3273                 *cdb_len = 10;
3274                 break;
3275         }
3276         return 0;
3277 }
3278
3279 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
3280         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3281         u8 *scsi3addr)
3282 {
3283         struct scsi_cmnd *cmd = c->scsi_cmd;
3284         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
3285         unsigned int len;
3286         unsigned int total_len = 0;
3287         struct scatterlist *sg;
3288         u64 addr64;
3289         int use_sg, i;
3290         struct SGDescriptor *curr_sg;
3291         u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
3292
3293         /* TODO: implement chaining support */
3294         if (scsi_sg_count(cmd) > h->ioaccel_maxsg)
3295                 return IO_ACCEL_INELIGIBLE;
3296
3297         BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
3298
3299         if (fixup_ioaccel_cdb(cdb, &cdb_len))
3300                 return IO_ACCEL_INELIGIBLE;
3301
3302         c->cmd_type = CMD_IOACCEL1;
3303
3304         /* Adjust the DMA address to point to the accelerated command buffer */
3305         c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
3306                                 (c->cmdindex * sizeof(*cp));
3307         BUG_ON(c->busaddr & 0x0000007F);
3308
3309         use_sg = scsi_dma_map(cmd);
3310         if (use_sg < 0)
3311                 return use_sg;
3312
3313         if (use_sg) {
3314                 curr_sg = cp->SG;
3315                 scsi_for_each_sg(cmd, sg, use_sg, i) {
3316                         addr64 = (u64) sg_dma_address(sg);
3317                         len  = sg_dma_len(sg);
3318                         total_len += len;
3319                         curr_sg->Addr = cpu_to_le64(addr64);
3320                         curr_sg->Len = cpu_to_le32(len);
3321                         curr_sg->Ext = cpu_to_le32(0);
3322                         curr_sg++;
3323                 }
3324                 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST);
3325
3326                 switch (cmd->sc_data_direction) {
3327                 case DMA_TO_DEVICE:
3328                         control |= IOACCEL1_CONTROL_DATA_OUT;
3329                         break;
3330                 case DMA_FROM_DEVICE:
3331                         control |= IOACCEL1_CONTROL_DATA_IN;
3332                         break;
3333                 case DMA_NONE:
3334                         control |= IOACCEL1_CONTROL_NODATAXFER;
3335                         break;
3336                 default:
3337                         dev_err(&h->pdev->dev, "unknown data direction: %d\n",
3338                         cmd->sc_data_direction);
3339                         BUG();
3340                         break;
3341                 }
3342         } else {
3343                 control |= IOACCEL1_CONTROL_NODATAXFER;
3344         }
3345
3346         c->Header.SGList = use_sg;
3347         /* Fill out the command structure to submit */
3348         cp->dev_handle = ioaccel_handle & 0xFFFF;
3349         cp->transfer_len = total_len;
3350         cp->io_flags = IOACCEL1_IOFLAGS_IO_REQ |
3351                         (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK);
3352         cp->control = control;
3353         memcpy(cp->CDB, cdb, cdb_len);
3354         memcpy(cp->CISS_LUN, scsi3addr, 8);
3355         /* Tag was already set at init time. */
3356         enqueue_cmd_and_start_io(h, c);
3357         return 0;
3358 }
3359
3360 /*
3361  * Queue a command directly to a device behind the controller using the
3362  * I/O accelerator path.
3363  */
3364 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
3365         struct CommandList *c)
3366 {
3367         struct scsi_cmnd *cmd = c->scsi_cmd;
3368         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
3369
3370         return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
3371                 cmd->cmnd, cmd->cmd_len, dev->scsi3addr);
3372 }
3373
3374 /*
3375  * Set encryption parameters for the ioaccel2 request
3376  */
3377 static void set_encrypt_ioaccel2(struct ctlr_info *h,
3378         struct CommandList *c, struct io_accel2_cmd *cp)
3379 {
3380         struct scsi_cmnd *cmd = c->scsi_cmd;
3381         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
3382         struct raid_map_data *map = &dev->raid_map;
3383         u64 first_block;
3384
3385         BUG_ON(!(dev->offload_config && dev->offload_enabled));
3386
3387         /* Are we doing encryption on this device */
3388         if (!(map->flags & RAID_MAP_FLAG_ENCRYPT_ON))
3389                 return;
3390         /* Set the data encryption key index. */
3391         cp->dekindex = map->dekindex;
3392
3393         /* Set the encryption enable flag, encoded into direction field. */
3394         cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
3395
3396         /* Set encryption tweak values based on logical block address
3397          * If block size is 512, tweak value is LBA.
3398          * For other block sizes, tweak is (LBA * block size)/ 512)
3399          */
3400         switch (cmd->cmnd[0]) {
3401         /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
3402         case WRITE_6:
3403         case READ_6:
3404                 if (map->volume_blk_size == 512) {
3405                         cp->tweak_lower =
3406                                 (((u32) cmd->cmnd[2]) << 8) |
3407                                         cmd->cmnd[3];
3408                         cp->tweak_upper = 0;
3409                 } else {
3410                         first_block =
3411                                 (((u64) cmd->cmnd[2]) << 8) |
3412                                         cmd->cmnd[3];
3413                         first_block = (first_block * map->volume_blk_size)/512;
3414                         cp->tweak_lower = (u32)first_block;
3415                         cp->tweak_upper = (u32)(first_block >> 32);
3416                 }
3417                 break;
3418         case WRITE_10:
3419         case READ_10:
3420                 if (map->volume_blk_size == 512) {
3421                         cp->tweak_lower =
3422                                 (((u32) cmd->cmnd[2]) << 24) |
3423                                 (((u32) cmd->cmnd[3]) << 16) |
3424                                 (((u32) cmd->cmnd[4]) << 8) |
3425                                         cmd->cmnd[5];
3426                         cp->tweak_upper = 0;
3427                 } else {
3428                         first_block =
3429                                 (((u64) cmd->cmnd[2]) << 24) |
3430                                 (((u64) cmd->cmnd[3]) << 16) |
3431                                 (((u64) cmd->cmnd[4]) << 8) |
3432                                         cmd->cmnd[5];
3433                         first_block = (first_block * map->volume_blk_size)/512;
3434                         cp->tweak_lower = (u32)first_block;
3435                         cp->tweak_upper = (u32)(first_block >> 32);
3436                 }
3437                 break;
3438         /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
3439         case WRITE_12:
3440         case READ_12:
3441                 if (map->volume_blk_size == 512) {
3442                         cp->tweak_lower =
3443                                 (((u32) cmd->cmnd[2]) << 24) |
3444                                 (((u32) cmd->cmnd[3]) << 16) |
3445                                 (((u32) cmd->cmnd[4]) << 8) |
3446                                         cmd->cmnd[5];
3447                         cp->tweak_upper = 0;
3448                 } else {
3449                         first_block =
3450                                 (((u64) cmd->cmnd[2]) << 24) |
3451                                 (((u64) cmd->cmnd[3]) << 16) |
3452                                 (((u64) cmd->cmnd[4]) << 8) |
3453                                         cmd->cmnd[5];
3454                         first_block = (first_block * map->volume_blk_size)/512;
3455                         cp->tweak_lower = (u32)first_block;
3456                         cp->tweak_upper = (u32)(first_block >> 32);
3457                 }
3458                 break;
3459         case WRITE_16:
3460         case READ_16:
3461                 if (map->volume_blk_size == 512) {
3462                         cp->tweak_lower =
3463                                 (((u32) cmd->cmnd[6]) << 24) |
3464                                 (((u32) cmd->cmnd[7]) << 16) |
3465                                 (((u32) cmd->cmnd[8]) << 8) |
3466                                         cmd->cmnd[9];
3467                         cp->tweak_upper =
3468                                 (((u32) cmd->cmnd[2]) << 24) |
3469                                 (((u32) cmd->cmnd[3]) << 16) |
3470                                 (((u32) cmd->cmnd[4]) << 8) |
3471                                         cmd->cmnd[5];
3472                 } else {
3473                         first_block =
3474                                 (((u64) cmd->cmnd[2]) << 56) |
3475                                 (((u64) cmd->cmnd[3]) << 48) |
3476                                 (((u64) cmd->cmnd[4]) << 40) |
3477                                 (((u64) cmd->cmnd[5]) << 32) |
3478                                 (((u64) cmd->cmnd[6]) << 24) |
3479                                 (((u64) cmd->cmnd[7]) << 16) |
3480                                 (((u64) cmd->cmnd[8]) << 8) |
3481                                         cmd->cmnd[9];
3482                         first_block = (first_block * map->volume_blk_size)/512;
3483                         cp->tweak_lower = (u32)first_block;
3484                         cp->tweak_upper = (u32)(first_block >> 32);
3485                 }
3486                 break;
3487         default:
3488                 dev_err(&h->pdev->dev,
3489                         "ERROR: %s: IOACCEL request CDB size not supported for encryption\n",
3490                         __func__);
3491                 BUG();
3492                 break;
3493         }
3494 }
3495
3496 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
3497         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3498         u8 *scsi3addr)
3499 {
3500         struct scsi_cmnd *cmd = c->scsi_cmd;
3501         struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
3502         struct ioaccel2_sg_element *curr_sg;
3503         int use_sg, i;
3504         struct scatterlist *sg;
3505         u64 addr64;
3506         u32 len;
3507         u32 total_len = 0;
3508
3509         if (scsi_sg_count(cmd) > h->ioaccel_maxsg)
3510                 return IO_ACCEL_INELIGIBLE;
3511
3512         if (fixup_ioaccel_cdb(cdb, &cdb_len))
3513                 return IO_ACCEL_INELIGIBLE;
3514         c->cmd_type = CMD_IOACCEL2;
3515         /* Adjust the DMA address to point to the accelerated command buffer */
3516         c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
3517                                 (c->cmdindex * sizeof(*cp));
3518         BUG_ON(c->busaddr & 0x0000007F);
3519
3520         memset(cp, 0, sizeof(*cp));
3521         cp->IU_type = IOACCEL2_IU_TYPE;
3522
3523         use_sg = scsi_dma_map(cmd);
3524         if (use_sg < 0)
3525                 return use_sg;
3526
3527         if (use_sg) {
3528                 BUG_ON(use_sg > IOACCEL2_MAXSGENTRIES);
3529                 curr_sg = cp->sg;
3530                 scsi_for_each_sg(cmd, sg, use_sg, i) {
3531                         addr64 = (u64) sg_dma_address(sg);
3532                         len  = sg_dma_len(sg);
3533                         total_len += len;
3534                         curr_sg->address = cpu_to_le64(addr64);
3535                         curr_sg->length = cpu_to_le32(len);
3536                         curr_sg->reserved[0] = 0;
3537                         curr_sg->reserved[1] = 0;
3538                         curr_sg->reserved[2] = 0;
3539                         curr_sg->chain_indicator = 0;
3540                         curr_sg++;
3541                 }
3542
3543                 switch (cmd->sc_data_direction) {
3544                 case DMA_TO_DEVICE:
3545                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3546                         cp->direction |= IOACCEL2_DIR_DATA_OUT;
3547                         break;
3548                 case DMA_FROM_DEVICE:
3549                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3550                         cp->direction |= IOACCEL2_DIR_DATA_IN;
3551                         break;
3552                 case DMA_NONE:
3553                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3554                         cp->direction |= IOACCEL2_DIR_NO_DATA;
3555                         break;
3556                 default:
3557                         dev_err(&h->pdev->dev, "unknown data direction: %d\n",
3558                                 cmd->sc_data_direction);
3559                         BUG();
3560                         break;
3561                 }
3562         } else {
3563                 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3564                 cp->direction |= IOACCEL2_DIR_NO_DATA;
3565         }
3566
3567         /* Set encryption parameters, if necessary */
3568         set_encrypt_ioaccel2(h, c, cp);
3569
3570         cp->scsi_nexus = ioaccel_handle;
3571         cp->Tag = (c->cmdindex << DIRECT_LOOKUP_SHIFT) |
3572                                 DIRECT_LOOKUP_BIT;
3573         memcpy(cp->cdb, cdb, sizeof(cp->cdb));
3574
3575         /* fill in sg elements */
3576         cp->sg_count = (u8) use_sg;
3577
3578         cp->data_len = cpu_to_le32(total_len);
3579         cp->err_ptr = cpu_to_le64(c->busaddr +
3580                         offsetof(struct io_accel2_cmd, error_data));
3581         cp->err_len = cpu_to_le32(sizeof(cp->error_data));
3582
3583         enqueue_cmd_and_start_io(h, c);
3584         return 0;
3585 }
3586
3587 /*
3588  * Queue a command to the correct I/O accelerator path.
3589  */
3590 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
3591         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3592         u8 *scsi3addr)
3593 {
3594         if (h->transMethod & CFGTBL_Trans_io_accel1)
3595                 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
3596                                                 cdb, cdb_len, scsi3addr);
3597         else
3598                 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
3599                                                 cdb, cdb_len, scsi3addr);
3600 }
3601
3602 static void raid_map_helper(struct raid_map_data *map,
3603                 int offload_to_mirror, u32 *map_index, u32 *current_group)
3604 {
3605         if (offload_to_mirror == 0)  {
3606                 /* use physical disk in the first mirrored group. */
3607                 *map_index %= map->data_disks_per_row;
3608                 return;
3609         }
3610         do {
3611                 /* determine mirror group that *map_index indicates */
3612                 *current_group = *map_index / map->data_disks_per_row;
3613                 if (offload_to_mirror == *current_group)
3614                         continue;
3615                 if (*current_group < (map->layout_map_count - 1)) {
3616                         /* select map index from next group */
3617                         *map_index += map->data_disks_per_row;
3618                         (*current_group)++;
3619                 } else {
3620                         /* select map index from first group */
3621                         *map_index %= map->data_disks_per_row;
3622                         *current_group = 0;
3623                 }
3624         } while (offload_to_mirror != *current_group);
3625 }
3626
3627 /*
3628  * Attempt to perform offload RAID mapping for a logical volume I/O.
3629  */
3630 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
3631         struct CommandList *c)
3632 {
3633         struct scsi_cmnd *cmd = c->scsi_cmd;
3634         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
3635         struct raid_map_data *map = &dev->raid_map;
3636         struct raid_map_disk_data *dd = &map->data[0];
3637         int is_write = 0;
3638         u32 map_index;
3639         u64 first_block, last_block;
3640         u32 block_cnt;
3641         u32 blocks_per_row;
3642         u64 first_row, last_row;
3643         u32 first_row_offset, last_row_offset;
3644         u32 first_column, last_column;
3645         u64 r0_first_row, r0_last_row;
3646         u32 r5or6_blocks_per_row;
3647         u64 r5or6_first_row, r5or6_last_row;
3648         u32 r5or6_first_row_offset, r5or6_last_row_offset;
3649         u32 r5or6_first_column, r5or6_last_column;
3650         u32 total_disks_per_row;
3651         u32 stripesize;
3652         u32 first_group, last_group, current_group;
3653         u32 map_row;
3654         u32 disk_handle;
3655         u64 disk_block;
3656         u32 disk_block_cnt;
3657         u8 cdb[16];
3658         u8 cdb_len;
3659 #if BITS_PER_LONG == 32
3660         u64 tmpdiv;
3661 #endif
3662         int offload_to_mirror;
3663
3664         BUG_ON(!(dev->offload_config && dev->offload_enabled));
3665
3666         /* check for valid opcode, get LBA and block count */
3667         switch (cmd->cmnd[0]) {
3668         case WRITE_6:
3669                 is_write = 1;
3670         case READ_6:
3671                 first_block =
3672                         (((u64) cmd->cmnd[2]) << 8) |
3673                         cmd->cmnd[3];
3674                 block_cnt = cmd->cmnd[4];
3675                 if (block_cnt == 0)
3676                         block_cnt = 256;
3677                 break;
3678         case WRITE_10:
3679                 is_write = 1;
3680         case READ_10:
3681                 first_block =
3682                         (((u64) cmd->cmnd[2]) << 24) |
3683                         (((u64) cmd->cmnd[3]) << 16) |
3684                         (((u64) cmd->cmnd[4]) << 8) |
3685                         cmd->cmnd[5];
3686                 block_cnt =
3687                         (((u32) cmd->cmnd[7]) << 8) |
3688                         cmd->cmnd[8];
3689                 break;
3690         case WRITE_12:
3691                 is_write = 1;
3692         case READ_12:
3693                 first_block =
3694                         (((u64) cmd->cmnd[2]) << 24) |
3695                         (((u64) cmd->cmnd[3]) << 16) |
3696                         (((u64) cmd->cmnd[4]) << 8) |
3697                         cmd->cmnd[5];
3698                 block_cnt =
3699                         (((u32) cmd->cmnd[6]) << 24) |
3700                         (((u32) cmd->cmnd[7]) << 16) |
3701                         (((u32) cmd->cmnd[8]) << 8) |
3702                 cmd->cmnd[9];
3703                 break;
3704         case WRITE_16:
3705                 is_write = 1;
3706         case READ_16:
3707                 first_block =
3708                         (((u64) cmd->cmnd[2]) << 56) |
3709                         (((u64) cmd->cmnd[3]) << 48) |
3710                         (((u64) cmd->cmnd[4]) << 40) |
3711                         (((u64) cmd->cmnd[5]) << 32) |
3712                         (((u64) cmd->cmnd[6]) << 24) |
3713                         (((u64) cmd->cmnd[7]) << 16) |
3714                         (((u64) cmd->cmnd[8]) << 8) |
3715                         cmd->cmnd[9];
3716                 block_cnt =
3717                         (((u32) cmd->cmnd[10]) << 24) |
3718                         (((u32) cmd->cmnd[11]) << 16) |
3719                         (((u32) cmd->cmnd[12]) << 8) |
3720                         cmd->cmnd[13];
3721                 break;
3722         default:
3723                 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
3724         }
3725         last_block = first_block + block_cnt - 1;
3726
3727         /* check for write to non-RAID-0 */
3728         if (is_write && dev->raid_level != 0)
3729                 return IO_ACCEL_INELIGIBLE;
3730
3731         /* check for invalid block or wraparound */
3732         if (last_block >= map->volume_blk_cnt || last_block < first_block)
3733                 return IO_ACCEL_INELIGIBLE;
3734
3735         /* calculate stripe information for the request */
3736         blocks_per_row = map->data_disks_per_row * map->strip_size;
3737 #if BITS_PER_LONG == 32
3738         tmpdiv = first_block;
3739         (void) do_div(tmpdiv, blocks_per_row);
3740         first_row = tmpdiv;
3741         tmpdiv = last_block;
3742         (void) do_div(tmpdiv, blocks_per_row);
3743         last_row = tmpdiv;
3744         first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
3745         last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
3746         tmpdiv = first_row_offset;
3747         (void) do_div(tmpdiv,  map->strip_size);
3748         first_column = tmpdiv;
3749         tmpdiv = last_row_offset;
3750         (void) do_div(tmpdiv, map->strip_size);
3751         last_column = tmpdiv;
3752 #else
3753         first_row = first_block / blocks_per_row;
3754         last_row = last_block / blocks_per_row;
3755         first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
3756         last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
3757         first_column = first_row_offset / map->strip_size;
3758         last_column = last_row_offset / map->strip_size;
3759 #endif
3760
3761         /* if this isn't a single row/column then give to the controller */
3762         if ((first_row != last_row) || (first_column != last_column))
3763                 return IO_ACCEL_INELIGIBLE;
3764
3765         /* proceeding with driver mapping */
3766         total_disks_per_row = map->data_disks_per_row +
3767                                 map->metadata_disks_per_row;
3768         map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
3769                                 map->row_cnt;
3770         map_index = (map_row * total_disks_per_row) + first_column;
3771
3772         switch (dev->raid_level) {
3773         case HPSA_RAID_0:
3774                 break; /* nothing special to do */
3775         case HPSA_RAID_1:
3776                 /* Handles load balance across RAID 1 members.
3777                  * (2-drive R1 and R10 with even # of drives.)
3778                  * Appropriate for SSDs, not optimal for HDDs
3779                  */
3780                 BUG_ON(map->layout_map_count != 2);
3781                 if (dev->offload_to_mirror)
3782                         map_index += map->data_disks_per_row;
3783                 dev->offload_to_mirror = !dev->offload_to_mirror;
3784                 break;
3785         case HPSA_RAID_ADM:
3786                 /* Handles N-way mirrors  (R1-ADM)
3787                  * and R10 with # of drives divisible by 3.)
3788                  */
3789                 BUG_ON(map->layout_map_count != 3);
3790
3791                 offload_to_mirror = dev->offload_to_mirror;
3792                 raid_map_helper(map, offload_to_mirror,
3793                                 &map_index, &current_group);
3794                 /* set mirror group to use next time */
3795                 offload_to_mirror =
3796                         (offload_to_mirror >= map->layout_map_count - 1)
3797                         ? 0 : offload_to_mirror + 1;
3798                 dev->offload_to_mirror = offload_to_mirror;
3799                 /* Avoid direct use of dev->offload_to_mirror within this
3800                  * function since multiple threads might simultaneously
3801                  * increment it beyond the range of dev->layout_map_count -1.
3802                  */
3803                 break;
3804         case HPSA_RAID_5:
3805         case HPSA_RAID_6:
3806                 if (map->layout_map_count <= 1)
3807                         break;
3808
3809                 /* Verify first and last block are in same RAID group */
3810                 r5or6_blocks_per_row =
3811                         map->strip_size * map->data_disks_per_row;
3812                 BUG_ON(r5or6_blocks_per_row == 0);
3813                 stripesize = r5or6_blocks_per_row * map->layout_map_count;
3814 #if BITS_PER_LONG == 32
3815                 tmpdiv = first_block;
3816                 first_group = do_div(tmpdiv, stripesize);
3817                 tmpdiv = first_group;
3818                 (void) do_div(tmpdiv, r5or6_blocks_per_row);
3819                 first_group = tmpdiv;
3820                 tmpdiv = last_block;
3821                 last_group = do_div(tmpdiv, stripesize);
3822                 tmpdiv = last_group;
3823                 (void) do_div(tmpdiv, r5or6_blocks_per_row);
3824                 last_group = tmpdiv;
3825 #else
3826                 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
3827                 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
3828 #endif
3829                 if (first_group != last_group)
3830                         return IO_ACCEL_INELIGIBLE;
3831
3832                 /* Verify request is in a single row of RAID 5/6 */
3833 #if BITS_PER_LONG == 32
3834                 tmpdiv = first_block;
3835                 (void) do_div(tmpdiv, stripesize);
3836                 first_row = r5or6_first_row = r0_first_row = tmpdiv;
3837                 tmpdiv = last_block;
3838                 (void) do_div(tmpdiv, stripesize);
3839                 r5or6_last_row = r0_last_row = tmpdiv;
3840 #else
3841                 first_row = r5or6_first_row = r0_first_row =
3842                                                 first_block / stripesize;
3843                 r5or6_last_row = r0_last_row = last_block / stripesize;
3844 #endif
3845                 if (r5or6_first_row != r5or6_last_row)
3846                         return IO_ACCEL_INELIGIBLE;
3847
3848
3849                 /* Verify request is in a single column */
3850 #if BITS_PER_LONG == 32
3851                 tmpdiv = first_block;
3852                 first_row_offset = do_div(tmpdiv, stripesize);
3853                 tmpdiv = first_row_offset;
3854                 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
3855                 r5or6_first_row_offset = first_row_offset;
3856                 tmpdiv = last_block;
3857                 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
3858                 tmpdiv = r5or6_last_row_offset;
3859                 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
3860                 tmpdiv = r5or6_first_row_offset;
3861                 (void) do_div(tmpdiv, map->strip_size);
3862                 first_column = r5or6_first_column = tmpdiv;
3863                 tmpdiv = r5or6_last_row_offset;
3864                 (void) do_div(tmpdiv, map->strip_size);
3865                 r5or6_last_column = tmpdiv;
3866 #else
3867                 first_row_offset = r5or6_first_row_offset =
3868                         (u32)((first_block % stripesize) %
3869                                                 r5or6_blocks_per_row);
3870
3871                 r5or6_last_row_offset =
3872                         (u32)((last_block % stripesize) %
3873                                                 r5or6_blocks_per_row);
3874
3875                 first_column = r5or6_first_column =
3876                         r5or6_first_row_offset / map->strip_size;
3877                 r5or6_last_column =
3878                         r5or6_last_row_offset / map->strip_size;
3879 #endif
3880                 if (r5or6_first_column != r5or6_last_column)
3881                         return IO_ACCEL_INELIGIBLE;
3882
3883                 /* Request is eligible */
3884                 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
3885                         map->row_cnt;
3886
3887                 map_index = (first_group *
3888                         (map->row_cnt * total_disks_per_row)) +
3889                         (map_row * total_disks_per_row) + first_column;
3890                 break;
3891         default:
3892                 return IO_ACCEL_INELIGIBLE;
3893         }
3894
3895         disk_handle = dd[map_index].ioaccel_handle;
3896         disk_block = map->disk_starting_blk + (first_row * map->strip_size) +
3897                         (first_row_offset - (first_column * map->strip_size));
3898         disk_block_cnt = block_cnt;
3899
3900         /* handle differing logical/physical block sizes */
3901         if (map->phys_blk_shift) {
3902                 disk_block <<= map->phys_blk_shift;
3903                 disk_block_cnt <<= map->phys_blk_shift;
3904         }
3905         BUG_ON(disk_block_cnt > 0xffff);
3906
3907         /* build the new CDB for the physical disk I/O */
3908         if (disk_block > 0xffffffff) {
3909                 cdb[0] = is_write ? WRITE_16 : READ_16;
3910                 cdb[1] = 0;
3911                 cdb[2] = (u8) (disk_block >> 56);
3912                 cdb[3] = (u8) (disk_block >> 48);
3913                 cdb[4] = (u8) (disk_block >> 40);
3914                 cdb[5] = (u8) (disk_block >> 32);
3915                 cdb[6] = (u8) (disk_block >> 24);
3916                 cdb[7] = (u8) (disk_block >> 16);
3917                 cdb[8] = (u8) (disk_block >> 8);
3918                 cdb[9] = (u8) (disk_block);
3919                 cdb[10] = (u8) (disk_block_cnt >> 24);
3920                 cdb[11] = (u8) (disk_block_cnt >> 16);
3921                 cdb[12] = (u8) (disk_block_cnt >> 8);
3922                 cdb[13] = (u8) (disk_block_cnt);
3923                 cdb[14] = 0;
3924                 cdb[15] = 0;
3925                 cdb_len = 16;
3926         } else {
3927                 cdb[0] = is_write ? WRITE_10 : READ_10;
3928                 cdb[1] = 0;
3929                 cdb[2] = (u8) (disk_block >> 24);
3930                 cdb[3] = (u8) (disk_block >> 16);
3931                 cdb[4] = (u8) (disk_block >> 8);
3932                 cdb[5] = (u8) (disk_block);
3933                 cdb[6] = 0;
3934                 cdb[7] = (u8) (disk_block_cnt >> 8);
3935                 cdb[8] = (u8) (disk_block_cnt);
3936                 cdb[9] = 0;
3937                 cdb_len = 10;
3938         }
3939         return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
3940                                                 dev->scsi3addr);
3941 }
3942
3943 static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
3944         void (*done)(struct scsi_cmnd *))
3945 {
3946         struct ctlr_info *h;
3947         struct hpsa_scsi_dev_t *dev;
3948         unsigned char scsi3addr[8];
3949         struct CommandList *c;
3950         int rc = 0;
3951
3952         /* Get the ptr to our adapter structure out of cmd->host. */
3953         h = sdev_to_hba(cmd->device);
3954         dev = cmd->device->hostdata;
3955         if (!dev) {
3956                 cmd->result = DID_NO_CONNECT << 16;
3957                 done(cmd);
3958                 return 0;
3959         }
3960         memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
3961
3962         if (unlikely(lockup_detected(h))) {
3963                 cmd->result = DID_ERROR << 16;
3964                 done(cmd);
3965                 return 0;
3966         }
3967         c = cmd_alloc(h);
3968         if (c == NULL) {                        /* trouble... */
3969                 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
3970                 return SCSI_MLQUEUE_HOST_BUSY;
3971         }
3972
3973         /* Fill in the command list header */
3974
3975         cmd->scsi_done = done;    /* save this for use by completion code */
3976
3977         /* save c in case we have to abort it  */
3978         cmd->host_scribble = (unsigned char *) c;
3979
3980         c->cmd_type = CMD_SCSI;
3981         c->scsi_cmd = cmd;
3982
3983         /* Call alternate submit routine for I/O accelerated commands.
3984          * Retries always go down the normal I/O path.
3985          */
3986         if (likely(cmd->retries == 0 &&
3987                 cmd->request->cmd_type == REQ_TYPE_FS &&
3988                 h->acciopath_status)) {
3989                 if (dev->offload_enabled) {
3990                         rc = hpsa_scsi_ioaccel_raid_map(h, c);
3991                         if (rc == 0)
3992                                 return 0; /* Sent on ioaccel path */
3993                         if (rc < 0) {   /* scsi_dma_map failed. */
3994                                 cmd_free(h, c);
3995                                 return SCSI_MLQUEUE_HOST_BUSY;
3996                         }
3997                 } else if (dev->ioaccel_handle) {
3998                         rc = hpsa_scsi_ioaccel_direct_map(h, c);
3999                         if (rc == 0)
4000                                 return 0; /* Sent on direct map path */
4001                         if (rc < 0) {   /* scsi_dma_map failed. */
4002                                 cmd_free(h, c);
4003                                 return SCSI_MLQUEUE_HOST_BUSY;
4004                         }
4005                 }
4006         }
4007
4008         c->Header.ReplyQueue = 0;  /* unused in simple mode */
4009         memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
4010         c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT) |
4011                                         DIRECT_LOOKUP_BIT);
4012
4013         /* Fill in the request block... */
4014
4015         c->Request.Timeout = 0;
4016         memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
4017         BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
4018         c->Request.CDBLen = cmd->cmd_len;
4019         memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
4020         switch (cmd->sc_data_direction) {
4021         case DMA_TO_DEVICE:
4022                 c->Request.type_attr_dir =
4023                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE);
4024                 break;
4025         case DMA_FROM_DEVICE:
4026                 c->Request.type_attr_dir =
4027                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ);
4028                 break;
4029         case DMA_NONE:
4030                 c->Request.type_attr_dir =
4031                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE);
4032                 break;
4033         case DMA_BIDIRECTIONAL:
4034                 /* This can happen if a buggy application does a scsi passthru
4035                  * and sets both inlen and outlen to non-zero. ( see
4036                  * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
4037                  */
4038
4039                 c->Request.type_attr_dir =
4040                         TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD);
4041                 /* This is technically wrong, and hpsa controllers should
4042                  * reject it with CMD_INVALID, which is the most correct
4043                  * response, but non-fibre backends appear to let it
4044                  * slide by, and give the same results as if this field
4045                  * were set correctly.  Either way is acceptable for
4046                  * our purposes here.
4047                  */
4048
4049                 break;
4050
4051         default:
4052                 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4053                         cmd->sc_data_direction);
4054                 BUG();
4055                 break;
4056         }
4057
4058         if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
4059                 cmd_free(h, c);
4060                 return SCSI_MLQUEUE_HOST_BUSY;
4061         }
4062         enqueue_cmd_and_start_io(h, c);
4063         /* the cmd'll come back via intr handler in complete_scsi_command()  */
4064         return 0;
4065 }
4066
4067 static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
4068
4069 static int do_not_scan_if_controller_locked_up(struct ctlr_info *h)
4070 {
4071         unsigned long flags;
4072
4073         /*
4074          * Don't let rescans be initiated on a controller known
4075          * to be locked up.  If the controller locks up *during*
4076          * a rescan, that thread is probably hosed, but at least
4077          * we can prevent new rescan threads from piling up on a
4078          * locked up controller.
4079          */
4080         if (unlikely(lockup_detected(h))) {
4081                 spin_lock_irqsave(&h->scan_lock, flags);
4082                 h->scan_finished = 1;
4083                 wake_up_all(&h->scan_wait_queue);
4084                 spin_unlock_irqrestore(&h->scan_lock, flags);
4085                 return 1;
4086         }
4087         return 0;
4088 }
4089
4090 static void hpsa_scan_start(struct Scsi_Host *sh)
4091 {
4092         struct ctlr_info *h = shost_to_hba(sh);
4093         unsigned long flags;
4094
4095         if (do_not_scan_if_controller_locked_up(h))
4096                 return;
4097
4098         /* wait until any scan already in progress is finished. */
4099         while (1) {
4100                 spin_lock_irqsave(&h->scan_lock, flags);
4101                 if (h->scan_finished)
4102                         break;
4103                 spin_unlock_irqrestore(&h->scan_lock, flags);
4104                 wait_event(h->scan_wait_queue, h->scan_finished);
4105                 /* Note: We don't need to worry about a race between this
4106                  * thread and driver unload because the midlayer will
4107                  * have incremented the reference count, so unload won't
4108                  * happen if we're in here.
4109                  */
4110         }
4111         h->scan_finished = 0; /* mark scan as in progress */
4112         spin_unlock_irqrestore(&h->scan_lock, flags);
4113
4114         if (do_not_scan_if_controller_locked_up(h))
4115                 return;
4116
4117         hpsa_update_scsi_devices(h, h->scsi_host->host_no);
4118
4119         spin_lock_irqsave(&h->scan_lock, flags);
4120         h->scan_finished = 1; /* mark scan as finished. */
4121         wake_up_all(&h->scan_wait_queue);
4122         spin_unlock_irqrestore(&h->scan_lock, flags);
4123 }
4124
4125 static int hpsa_scan_finished(struct Scsi_Host *sh,
4126         unsigned long elapsed_time)
4127 {
4128         struct ctlr_info *h = shost_to_hba(sh);
4129         unsigned long flags;
4130         int finished;
4131
4132         spin_lock_irqsave(&h->scan_lock, flags);
4133         finished = h->scan_finished;
4134         spin_unlock_irqrestore(&h->scan_lock, flags);
4135         return finished;
4136 }
4137
4138 static int hpsa_change_queue_depth(struct scsi_device *sdev,
4139         int qdepth, int reason)
4140 {
4141         struct ctlr_info *h = sdev_to_hba(sdev);
4142
4143         if (reason != SCSI_QDEPTH_DEFAULT)
4144                 return -ENOTSUPP;
4145
4146         if (qdepth < 1)
4147                 qdepth = 1;
4148         else
4149                 if (qdepth > h->nr_cmds)
4150                         qdepth = h->nr_cmds;
4151         scsi_adjust_queue_depth(sdev, qdepth);
4152         return sdev->queue_depth;
4153 }
4154
4155 static void hpsa_unregister_scsi(struct ctlr_info *h)
4156 {
4157         /* we are being forcibly unloaded, and may not refuse. */
4158         scsi_remove_host(h->scsi_host);
4159         scsi_host_put(h->scsi_host);
4160         h->scsi_host = NULL;
4161 }
4162
4163 static int hpsa_register_scsi(struct ctlr_info *h)
4164 {
4165         struct Scsi_Host *sh;
4166         int error;
4167
4168         sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
4169         if (sh == NULL)
4170                 goto fail;
4171
4172         sh->io_port = 0;
4173         sh->n_io_port = 0;
4174         sh->this_id = -1;
4175         sh->max_channel = 3;
4176         sh->max_cmd_len = MAX_COMMAND_SIZE;
4177         sh->max_lun = HPSA_MAX_LUN;
4178         sh->max_id = HPSA_MAX_LUN;
4179         sh->can_queue = h->nr_cmds;
4180         if (h->hba_mode_enabled)
4181                 sh->cmd_per_lun = 7;
4182         else
4183                 sh->cmd_per_lun = h->nr_cmds;
4184         sh->sg_tablesize = h->maxsgentries;
4185         h->scsi_host = sh;
4186         sh->hostdata[0] = (unsigned long) h;
4187         sh->irq = h->intr[h->intr_mode];
4188         sh->unique_id = sh->irq;
4189         error = scsi_add_host(sh, &h->pdev->dev);
4190         if (error)
4191                 goto fail_host_put;
4192         scsi_scan_host(sh);
4193         return 0;
4194
4195  fail_host_put:
4196         dev_err(&h->pdev->dev, "%s: scsi_add_host"
4197                 " failed for controller %d\n", __func__, h->ctlr);
4198         scsi_host_put(sh);
4199         return error;
4200  fail:
4201         dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
4202                 " failed for controller %d\n", __func__, h->ctlr);
4203         return -ENOMEM;
4204 }
4205
4206 static int wait_for_device_to_become_ready(struct ctlr_info *h,
4207         unsigned char lunaddr[])
4208 {
4209         int rc;
4210         int count = 0;
4211         int waittime = 1; /* seconds */
4212         struct CommandList *c;
4213
4214         c = cmd_special_alloc(h);
4215         if (!c) {
4216                 dev_warn(&h->pdev->dev, "out of memory in "
4217                         "wait_for_device_to_become_ready.\n");
4218                 return IO_ERROR;
4219         }
4220
4221         /* Send test unit ready until device ready, or give up. */
4222         while (count < HPSA_TUR_RETRY_LIMIT) {
4223
4224                 /* Wait for a bit.  do this first, because if we send
4225                  * the TUR right away, the reset will just abort it.
4226                  */
4227                 msleep(1000 * waittime);
4228                 count++;
4229                 rc = 0; /* Device ready. */
4230
4231                 /* Increase wait time with each try, up to a point. */
4232                 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
4233                         waittime = waittime * 2;
4234
4235                 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
4236                 (void) fill_cmd(c, TEST_UNIT_READY, h,
4237                                 NULL, 0, 0, lunaddr, TYPE_CMD);
4238                 hpsa_scsi_do_simple_cmd_core(h, c);
4239                 /* no unmap needed here because no data xfer. */
4240
4241                 if (c->err_info->CommandStatus == CMD_SUCCESS)
4242                         break;
4243
4244                 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
4245                         c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
4246                         (c->err_info->SenseInfo[2] == NO_SENSE ||
4247                         c->err_info->SenseInfo[2] == UNIT_ATTENTION))
4248                         break;
4249
4250                 dev_warn(&h->pdev->dev, "waiting %d secs "
4251                         "for device to become ready.\n", waittime);
4252                 rc = 1; /* device not ready. */
4253         }
4254
4255         if (rc)
4256                 dev_warn(&h->pdev->dev, "giving up on device.\n");
4257         else
4258                 dev_warn(&h->pdev->dev, "device is ready.\n");
4259
4260         cmd_special_free(h, c);
4261         return rc;
4262 }
4263
4264 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
4265  * complaining.  Doing a host- or bus-reset can't do anything good here.
4266  */
4267 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
4268 {
4269         int rc;
4270         struct ctlr_info *h;
4271         struct hpsa_scsi_dev_t *dev;
4272
4273         /* find the controller to which the command to be aborted was sent */
4274         h = sdev_to_hba(scsicmd->device);
4275         if (h == NULL) /* paranoia */
4276                 return FAILED;
4277         dev = scsicmd->device->hostdata;
4278         if (!dev) {
4279                 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
4280                         "device lookup failed.\n");
4281                 return FAILED;
4282         }
4283         dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
4284                 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
4285         /* send a reset to the SCSI LUN which the command was sent to */
4286         rc = hpsa_send_reset(h, dev->scsi3addr, HPSA_RESET_TYPE_LUN);
4287         if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
4288                 return SUCCESS;
4289
4290         dev_warn(&h->pdev->dev, "resetting device failed.\n");
4291         return FAILED;
4292 }
4293
4294 static void swizzle_abort_tag(u8 *tag)
4295 {
4296         u8 original_tag[8];
4297
4298         memcpy(original_tag, tag, 8);
4299         tag[0] = original_tag[3];
4300         tag[1] = original_tag[2];
4301         tag[2] = original_tag[1];
4302         tag[3] = original_tag[0];
4303         tag[4] = original_tag[7];
4304         tag[5] = original_tag[6];
4305         tag[6] = original_tag[5];
4306         tag[7] = original_tag[4];
4307 }
4308
4309 static void hpsa_get_tag(struct ctlr_info *h,
4310         struct CommandList *c, u32 *taglower, u32 *tagupper)
4311 {
4312         if (c->cmd_type == CMD_IOACCEL1) {
4313                 struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *)
4314                         &h->ioaccel_cmd_pool[c->cmdindex];
4315                 *tagupper = (u32) (cm1->tag >> 32);
4316                 *taglower = (u32) (cm1->tag & 0x0ffffffffULL);
4317                 return;
4318         }
4319         if (c->cmd_type == CMD_IOACCEL2) {
4320                 struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *)
4321                         &h->ioaccel2_cmd_pool[c->cmdindex];
4322                 /* upper tag not used in ioaccel2 mode */
4323                 memset(tagupper, 0, sizeof(*tagupper));
4324                 *taglower = cm2->Tag;
4325                 return;
4326         }
4327         *tagupper = (u32) (c->Header.tag >> 32);
4328         *taglower = (u32) (c->Header.tag & 0x0ffffffffULL);
4329 }
4330
4331 static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
4332         struct CommandList *abort, int swizzle)
4333 {
4334         int rc = IO_OK;
4335         struct CommandList *c;
4336         struct ErrorInfo *ei;
4337         u32 tagupper, taglower;
4338
4339         c = cmd_special_alloc(h);
4340         if (c == NULL) {        /* trouble... */
4341                 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
4342                 return -ENOMEM;
4343         }
4344
4345         /* fill_cmd can't fail here, no buffer to map */
4346         (void) fill_cmd(c, HPSA_ABORT_MSG, h, abort,
4347                 0, 0, scsi3addr, TYPE_MSG);
4348         if (swizzle)
4349                 swizzle_abort_tag(&c->Request.CDB[4]);
4350         hpsa_scsi_do_simple_cmd_core(h, c);
4351         hpsa_get_tag(h, abort, &taglower, &tagupper);
4352         dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd_core completed.\n",
4353                 __func__, tagupper, taglower);
4354         /* no unmap needed here because no data xfer. */
4355
4356         ei = c->err_info;
4357         switch (ei->CommandStatus) {
4358         case CMD_SUCCESS:
4359                 break;
4360         case CMD_UNABORTABLE: /* Very common, don't make noise. */
4361                 rc = -1;
4362                 break;
4363         default:
4364                 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
4365                         __func__, tagupper, taglower);
4366                 hpsa_scsi_interpret_error(h, c);
4367                 rc = -1;
4368                 break;
4369         }
4370         cmd_special_free(h, c);
4371         dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n",
4372                 __func__, tagupper, taglower);
4373         return rc;
4374 }
4375
4376 /*
4377  * hpsa_find_cmd_in_queue
4378  *
4379  * Used to determine whether a command (find) is still present
4380  * in queue_head.   Optionally excludes the last element of queue_head.
4381  *
4382  * This is used to avoid unnecessary aborts.  Commands in h->reqQ have
4383  * not yet been submitted, and so can be aborted by the driver without
4384  * sending an abort to the hardware.
4385  *
4386  * Returns pointer to command if found in queue, NULL otherwise.
4387  */
4388 static struct CommandList *hpsa_find_cmd_in_queue(struct ctlr_info *h,
4389                         struct scsi_cmnd *find, struct list_head *queue_head)
4390 {
4391         unsigned long flags;
4392         struct CommandList *c = NULL;   /* ptr into cmpQ */
4393
4394         if (!find)
4395                 return NULL;
4396         spin_lock_irqsave(&h->lock, flags);
4397         list_for_each_entry(c, queue_head, list) {
4398                 if (c->scsi_cmd == NULL) /* e.g.: passthru ioctl */
4399                         continue;
4400                 if (c->scsi_cmd == find) {
4401                         spin_unlock_irqrestore(&h->lock, flags);
4402                         return c;
4403                 }
4404         }
4405         spin_unlock_irqrestore(&h->lock, flags);
4406         return NULL;
4407 }
4408
4409 static struct CommandList *hpsa_find_cmd_in_queue_by_tag(struct ctlr_info *h,
4410                                         u8 *tag, struct list_head *queue_head)
4411 {
4412         unsigned long flags;
4413         struct CommandList *c;
4414
4415         spin_lock_irqsave(&h->lock, flags);
4416         list_for_each_entry(c, queue_head, list) {
4417                 if (memcmp(&c->Header.tag, tag, 8) != 0)
4418                         continue;
4419                 spin_unlock_irqrestore(&h->lock, flags);
4420                 return c;
4421         }
4422         spin_unlock_irqrestore(&h->lock, flags);
4423         return NULL;
4424 }
4425
4426 /* ioaccel2 path firmware cannot handle abort task requests.
4427  * Change abort requests to physical target reset, and send to the
4428  * address of the physical disk used for the ioaccel 2 command.
4429  * Return 0 on success (IO_OK)
4430  *       -1 on failure
4431  */
4432
4433 static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h,
4434         unsigned char *scsi3addr, struct CommandList *abort)
4435 {
4436         int rc = IO_OK;
4437         struct scsi_cmnd *scmd; /* scsi command within request being aborted */
4438         struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */
4439         unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */
4440         unsigned char *psa = &phys_scsi3addr[0];
4441
4442         /* Get a pointer to the hpsa logical device. */
4443         scmd = (struct scsi_cmnd *) abort->scsi_cmd;
4444         dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata);
4445         if (dev == NULL) {
4446                 dev_warn(&h->pdev->dev,
4447                         "Cannot abort: no device pointer for command.\n");
4448                         return -1; /* not abortable */
4449         }
4450
4451         if (h->raid_offload_debug > 0)
4452                 dev_info(&h->pdev->dev,
4453                         "Reset as abort: Abort requested on C%d:B%d:T%d:L%d scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4454                         h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
4455                         scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3],
4456                         scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]);
4457
4458         if (!dev->offload_enabled) {
4459                 dev_warn(&h->pdev->dev,
4460                         "Can't abort: device is not operating in HP SSD Smart Path mode.\n");
4461                 return -1; /* not abortable */
4462         }
4463
4464         /* Incoming scsi3addr is logical addr. We need physical disk addr. */
4465         if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) {
4466                 dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n");
4467                 return -1; /* not abortable */
4468         }
4469
4470         /* send the reset */
4471         if (h->raid_offload_debug > 0)
4472                 dev_info(&h->pdev->dev,
4473                         "Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4474                         psa[0], psa[1], psa[2], psa[3],
4475                         psa[4], psa[5], psa[6], psa[7]);
4476         rc = hpsa_send_reset(h, psa, HPSA_RESET_TYPE_TARGET);
4477         if (rc != 0) {
4478                 dev_warn(&h->pdev->dev,
4479                         "Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4480                         psa[0], psa[1], psa[2], psa[3],
4481                         psa[4], psa[5], psa[6], psa[7]);
4482                 return rc; /* failed to reset */
4483         }
4484
4485         /* wait for device to recover */
4486         if (wait_for_device_to_become_ready(h, psa) != 0) {
4487                 dev_warn(&h->pdev->dev,
4488                         "Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4489                         psa[0], psa[1], psa[2], psa[3],
4490                         psa[4], psa[5], psa[6], psa[7]);
4491                 return -1;  /* failed to recover */
4492         }
4493
4494         /* device recovered */
4495         dev_info(&h->pdev->dev,
4496                 "Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4497                 psa[0], psa[1], psa[2], psa[3],
4498                 psa[4], psa[5], psa[6], psa[7]);
4499
4500         return rc; /* success */
4501 }
4502
4503 /* Some Smart Arrays need the abort tag swizzled, and some don't.  It's hard to
4504  * tell which kind we're dealing with, so we send the abort both ways.  There
4505  * shouldn't be any collisions between swizzled and unswizzled tags due to the
4506  * way we construct our tags but we check anyway in case the assumptions which
4507  * make this true someday become false.
4508  */
4509 static int hpsa_send_abort_both_ways(struct ctlr_info *h,
4510         unsigned char *scsi3addr, struct CommandList *abort)
4511 {
4512         u8 swizzled_tag[8];
4513         struct CommandList *c;
4514         int rc = 0, rc2 = 0;
4515
4516         /* ioccelerator mode 2 commands should be aborted via the
4517          * accelerated path, since RAID path is unaware of these commands,
4518          * but underlying firmware can't handle abort TMF.
4519          * Change abort to physical device reset.
4520          */
4521         if (abort->cmd_type == CMD_IOACCEL2)
4522                 return hpsa_send_reset_as_abort_ioaccel2(h, scsi3addr, abort);
4523
4524         /* we do not expect to find the swizzled tag in our queue, but
4525          * check anyway just to be sure the assumptions which make this
4526          * the case haven't become wrong.
4527          */
4528         memcpy(swizzled_tag, &abort->Request.CDB[4], 8);
4529         swizzle_abort_tag(swizzled_tag);
4530         c = hpsa_find_cmd_in_queue_by_tag(h, swizzled_tag, &h->cmpQ);
4531         if (c != NULL) {
4532                 dev_warn(&h->pdev->dev, "Unexpectedly found byte-swapped tag in completion queue.\n");
4533                 return hpsa_send_abort(h, scsi3addr, abort, 0);
4534         }
4535         rc = hpsa_send_abort(h, scsi3addr, abort, 0);
4536
4537         /* if the command is still in our queue, we can't conclude that it was
4538          * aborted (it might have just completed normally) but in any case
4539          * we don't need to try to abort it another way.
4540          */
4541         c = hpsa_find_cmd_in_queue(h, abort->scsi_cmd, &h->cmpQ);
4542         if (c)
4543                 rc2 = hpsa_send_abort(h, scsi3addr, abort, 1);
4544         return rc && rc2;
4545 }
4546
4547 /* Send an abort for the specified command.
4548  *      If the device and controller support it,
4549  *              send a task abort request.
4550  */
4551 static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
4552 {
4553
4554         int i, rc;
4555         struct ctlr_info *h;
4556         struct hpsa_scsi_dev_t *dev;
4557         struct CommandList *abort; /* pointer to command to be aborted */
4558         struct CommandList *found;
4559         struct scsi_cmnd *as;   /* ptr to scsi cmd inside aborted command. */
4560         char msg[256];          /* For debug messaging. */
4561         int ml = 0;
4562         u32 tagupper, taglower;
4563
4564         /* Find the controller of the command to be aborted */
4565         h = sdev_to_hba(sc->device);
4566         if (WARN(h == NULL,
4567                         "ABORT REQUEST FAILED, Controller lookup failed.\n"))
4568                 return FAILED;
4569
4570         /* Check that controller supports some kind of task abort */
4571         if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
4572                 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
4573                 return FAILED;
4574
4575         memset(msg, 0, sizeof(msg));
4576         ml += sprintf(msg+ml, "ABORT REQUEST on C%d:B%d:T%d:L%llu ",
4577                 h->scsi_host->host_no, sc->device->channel,
4578                 sc->device->id, sc->device->lun);
4579
4580         /* Find the device of the command to be aborted */
4581         dev = sc->device->hostdata;
4582         if (!dev) {
4583                 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
4584                                 msg);
4585                 return FAILED;
4586         }
4587
4588         /* Get SCSI command to be aborted */
4589         abort = (struct CommandList *) sc->host_scribble;
4590         if (abort == NULL) {
4591                 dev_err(&h->pdev->dev, "%s FAILED, Command to abort is NULL.\n",
4592                                 msg);
4593                 return FAILED;
4594         }
4595         hpsa_get_tag(h, abort, &taglower, &tagupper);
4596         ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower);
4597         as  = (struct scsi_cmnd *) abort->scsi_cmd;
4598         if (as != NULL)
4599                 ml += sprintf(msg+ml, "Command:0x%x SN:0x%lx ",
4600                         as->cmnd[0], as->serial_number);
4601         dev_dbg(&h->pdev->dev, "%s\n", msg);
4602         dev_warn(&h->pdev->dev, "Abort request on C%d:B%d:T%d:L%d\n",
4603                 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
4604
4605         /* Search reqQ to See if command is queued but not submitted,
4606          * if so, complete the command with aborted status and remove
4607          * it from the reqQ.
4608          */
4609         found = hpsa_find_cmd_in_queue(h, sc, &h->reqQ);
4610         if (found) {
4611                 found->err_info->CommandStatus = CMD_ABORTED;
4612                 finish_cmd(found);
4613                 dev_info(&h->pdev->dev, "%s Request SUCCEEDED (driver queue).\n",
4614                                 msg);
4615                 return SUCCESS;
4616         }
4617
4618         /* not in reqQ, if also not in cmpQ, must have already completed */
4619         found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
4620         if (!found)  {
4621                 dev_dbg(&h->pdev->dev, "%s Request SUCCEEDED (not known to driver).\n",
4622                                 msg);
4623                 return SUCCESS;
4624         }
4625
4626         /*
4627          * Command is in flight, or possibly already completed
4628          * by the firmware (but not to the scsi mid layer) but we can't
4629          * distinguish which.  Send the abort down.
4630          */
4631         rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort);
4632         if (rc != 0) {
4633                 dev_dbg(&h->pdev->dev, "%s Request FAILED.\n", msg);
4634                 dev_warn(&h->pdev->dev, "FAILED abort on device C%d:B%d:T%d:L%d\n",
4635                         h->scsi_host->host_no,
4636                         dev->bus, dev->target, dev->lun);
4637                 return FAILED;
4638         }
4639         dev_info(&h->pdev->dev, "%s REQUEST SUCCEEDED.\n", msg);
4640
4641         /* If the abort(s) above completed and actually aborted the
4642          * command, then the command to be aborted should already be
4643          * completed.  If not, wait around a bit more to see if they
4644          * manage to complete normally.
4645          */
4646 #define ABORT_COMPLETE_WAIT_SECS 30
4647         for (i = 0; i < ABORT_COMPLETE_WAIT_SECS * 10; i++) {
4648                 found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
4649                 if (!found)
4650                         return SUCCESS;
4651                 msleep(100);
4652         }
4653         dev_warn(&h->pdev->dev, "%s FAILED. Aborted command has not completed after %d seconds.\n",
4654                 msg, ABORT_COMPLETE_WAIT_SECS);
4655         return FAILED;
4656 }
4657
4658
4659 /*
4660  * For operations that cannot sleep, a command block is allocated at init,
4661  * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
4662  * which ones are free or in use.  Lock must be held when calling this.
4663  * cmd_free() is the complement.
4664  */
4665 static struct CommandList *cmd_alloc(struct ctlr_info *h)
4666 {
4667         struct CommandList *c;
4668         int i;
4669         union u64bit temp64;
4670         dma_addr_t cmd_dma_handle, err_dma_handle;
4671         unsigned long flags;
4672
4673         spin_lock_irqsave(&h->lock, flags);
4674         do {
4675                 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
4676                 if (i == h->nr_cmds) {
4677                         spin_unlock_irqrestore(&h->lock, flags);
4678                         return NULL;
4679                 }
4680         } while (test_and_set_bit
4681                  (i & (BITS_PER_LONG - 1),
4682                   h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
4683         spin_unlock_irqrestore(&h->lock, flags);
4684
4685         c = h->cmd_pool + i;
4686         memset(c, 0, sizeof(*c));
4687         cmd_dma_handle = h->cmd_pool_dhandle
4688             + i * sizeof(*c);
4689         c->err_info = h->errinfo_pool + i;
4690         memset(c->err_info, 0, sizeof(*c->err_info));
4691         err_dma_handle = h->errinfo_pool_dhandle
4692             + i * sizeof(*c->err_info);
4693
4694         c->cmdindex = i;
4695
4696         INIT_LIST_HEAD(&c->list);
4697         c->busaddr = (u32) cmd_dma_handle;
4698         temp64.val = (u64) err_dma_handle;
4699         c->ErrDesc.Addr = cpu_to_le64(err_dma_handle);
4700         c->ErrDesc.Len = cpu_to_le32(sizeof(*c->err_info));
4701
4702         c->h = h;
4703         return c;
4704 }
4705
4706 /* For operations that can wait for kmalloc to possibly sleep,
4707  * this routine can be called. Lock need not be held to call
4708  * cmd_special_alloc. cmd_special_free() is the complement.
4709  */
4710 static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
4711 {
4712         struct CommandList *c;
4713         dma_addr_t cmd_dma_handle, err_dma_handle;
4714
4715         c = pci_zalloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
4716         if (c == NULL)
4717                 return NULL;
4718
4719         c->cmd_type = CMD_SCSI;
4720         c->cmdindex = -1;
4721
4722         c->err_info = pci_zalloc_consistent(h->pdev, sizeof(*c->err_info),
4723                                             &err_dma_handle);
4724
4725         if (c->err_info == NULL) {
4726                 pci_free_consistent(h->pdev,
4727                         sizeof(*c), c, cmd_dma_handle);
4728                 return NULL;
4729         }
4730
4731         INIT_LIST_HEAD(&c->list);
4732         c->busaddr = (u32) cmd_dma_handle;
4733         c->ErrDesc.Addr = cpu_to_le64(err_dma_handle);
4734         c->ErrDesc.Len = cpu_to_le32(sizeof(*c->err_info));
4735
4736         c->h = h;
4737         return c;
4738 }
4739
4740 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
4741 {
4742         int i;
4743         unsigned long flags;
4744
4745         i = c - h->cmd_pool;
4746         spin_lock_irqsave(&h->lock, flags);
4747         clear_bit(i & (BITS_PER_LONG - 1),
4748                   h->cmd_pool_bits + (i / BITS_PER_LONG));
4749         spin_unlock_irqrestore(&h->lock, flags);
4750 }
4751
4752 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
4753 {
4754         pci_free_consistent(h->pdev, sizeof(*c->err_info),
4755                             c->err_info,
4756                             (dma_addr_t) le64_to_cpu(c->ErrDesc.Addr));
4757         pci_free_consistent(h->pdev, sizeof(*c),
4758                             c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
4759 }
4760
4761 #ifdef CONFIG_COMPAT
4762
4763 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd,
4764         void __user *arg)
4765 {
4766         IOCTL32_Command_struct __user *arg32 =
4767             (IOCTL32_Command_struct __user *) arg;
4768         IOCTL_Command_struct arg64;
4769         IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
4770         int err;
4771         u32 cp;
4772
4773         memset(&arg64, 0, sizeof(arg64));
4774         err = 0;
4775         err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
4776                            sizeof(arg64.LUN_info));
4777         err |= copy_from_user(&arg64.Request, &arg32->Request,
4778                            sizeof(arg64.Request));
4779         err |= copy_from_user(&arg64.error_info, &arg32->error_info,
4780                            sizeof(arg64.error_info));
4781         err |= get_user(arg64.buf_size, &arg32->buf_size);
4782         err |= get_user(cp, &arg32->buf);
4783         arg64.buf = compat_ptr(cp);
4784         err |= copy_to_user(p, &arg64, sizeof(arg64));
4785
4786         if (err)
4787                 return -EFAULT;
4788
4789         err = hpsa_ioctl(dev, CCISS_PASSTHRU, p);
4790         if (err)
4791                 return err;
4792         err |= copy_in_user(&arg32->error_info, &p->error_info,
4793                          sizeof(arg32->error_info));
4794         if (err)
4795                 return -EFAULT;
4796         return err;
4797 }
4798
4799 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
4800         int cmd, void __user *arg)
4801 {
4802         BIG_IOCTL32_Command_struct __user *arg32 =
4803             (BIG_IOCTL32_Command_struct __user *) arg;
4804         BIG_IOCTL_Command_struct arg64;
4805         BIG_IOCTL_Command_struct __user *p =
4806             compat_alloc_user_space(sizeof(arg64));
4807         int err;
4808         u32 cp;
4809
4810         memset(&arg64, 0, sizeof(arg64));
4811         err = 0;
4812         err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
4813                            sizeof(arg64.LUN_info));
4814         err |= copy_from_user(&arg64.Request, &arg32->Request,
4815                            sizeof(arg64.Request));
4816         err |= copy_from_user(&arg64.error_info, &arg32->error_info,
4817                            sizeof(arg64.error_info));
4818         err |= get_user(arg64.buf_size, &arg32->buf_size);
4819         err |= get_user(arg64.malloc_size, &arg32->malloc_size);
4820         err |= get_user(cp, &arg32->buf);
4821         arg64.buf = compat_ptr(cp);
4822         err |= copy_to_user(p, &arg64, sizeof(arg64));
4823
4824         if (err)
4825                 return -EFAULT;
4826
4827         err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p);
4828         if (err)
4829                 return err;
4830         err |= copy_in_user(&arg32->error_info, &p->error_info,
4831                          sizeof(arg32->error_info));
4832         if (err)
4833                 return -EFAULT;
4834         return err;
4835 }
4836
4837 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
4838 {
4839         switch (cmd) {
4840         case CCISS_GETPCIINFO:
4841         case CCISS_GETINTINFO:
4842         case CCISS_SETINTINFO:
4843         case CCISS_GETNODENAME:
4844         case CCISS_SETNODENAME:
4845         case CCISS_GETHEARTBEAT:
4846         case CCISS_GETBUSTYPES:
4847         case CCISS_GETFIRMVER:
4848         case CCISS_GETDRIVVER:
4849         case CCISS_REVALIDVOLS:
4850         case CCISS_DEREGDISK:
4851         case CCISS_REGNEWDISK:
4852         case CCISS_REGNEWD:
4853         case CCISS_RESCANDISK:
4854         case CCISS_GETLUNINFO:
4855                 return hpsa_ioctl(dev, cmd, arg);
4856
4857         case CCISS_PASSTHRU32:
4858                 return hpsa_ioctl32_passthru(dev, cmd, arg);
4859         case CCISS_BIG_PASSTHRU32:
4860                 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
4861
4862         default:
4863                 return -ENOIOCTLCMD;
4864         }
4865 }
4866 #endif
4867
4868 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
4869 {
4870         struct hpsa_pci_info pciinfo;
4871
4872         if (!argp)
4873                 return -EINVAL;
4874         pciinfo.domain = pci_domain_nr(h->pdev->bus);
4875         pciinfo.bus = h->pdev->bus->number;
4876         pciinfo.dev_fn = h->pdev->devfn;
4877         pciinfo.board_id = h->board_id;
4878         if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
4879                 return -EFAULT;
4880         return 0;
4881 }
4882
4883 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
4884 {
4885         DriverVer_type DriverVer;
4886         unsigned char vmaj, vmin, vsubmin;
4887         int rc;
4888
4889         rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
4890                 &vmaj, &vmin, &vsubmin);
4891         if (rc != 3) {
4892                 dev_info(&h->pdev->dev, "driver version string '%s' "
4893                         "unrecognized.", HPSA_DRIVER_VERSION);
4894                 vmaj = 0;
4895                 vmin = 0;
4896                 vsubmin = 0;
4897         }
4898         DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
4899         if (!argp)
4900                 return -EINVAL;
4901         if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
4902                 return -EFAULT;
4903         return 0;
4904 }
4905
4906 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
4907 {
4908         IOCTL_Command_struct iocommand;
4909         struct CommandList *c;
4910         char *buff = NULL;
4911         u64 temp64;
4912         int rc = 0;
4913
4914         if (!argp)
4915                 return -EINVAL;
4916         if (!capable(CAP_SYS_RAWIO))
4917                 return -EPERM;
4918         if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
4919                 return -EFAULT;
4920         if ((iocommand.buf_size < 1) &&
4921             (iocommand.Request.Type.Direction != XFER_NONE)) {
4922                 return -EINVAL;
4923         }
4924         if (iocommand.buf_size > 0) {
4925                 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
4926                 if (buff == NULL)
4927                         return -EFAULT;
4928                 if (iocommand.Request.Type.Direction & XFER_WRITE) {
4929                         /* Copy the data into the buffer we created */
4930                         if (copy_from_user(buff, iocommand.buf,
4931                                 iocommand.buf_size)) {
4932                                 rc = -EFAULT;
4933                                 goto out_kfree;
4934                         }
4935                 } else {
4936                         memset(buff, 0, iocommand.buf_size);
4937                 }
4938         }
4939         c = cmd_special_alloc(h);
4940         if (c == NULL) {
4941                 rc = -ENOMEM;
4942                 goto out_kfree;
4943         }
4944         /* Fill in the command type */
4945         c->cmd_type = CMD_IOCTL_PEND;
4946         /* Fill in Command Header */
4947         c->Header.ReplyQueue = 0; /* unused in simple mode */
4948         if (iocommand.buf_size > 0) {   /* buffer to fill */
4949                 c->Header.SGList = 1;
4950                 c->Header.SGTotal = cpu_to_le16(1);
4951         } else  { /* no buffers to fill */
4952                 c->Header.SGList = 0;
4953                 c->Header.SGTotal = cpu_to_le16(0);
4954         }
4955         memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
4956         /* use the kernel address the cmd block for tag */
4957         c->Header.tag = c->busaddr;
4958
4959         /* Fill in Request block */
4960         memcpy(&c->Request, &iocommand.Request,
4961                 sizeof(c->Request));
4962
4963         /* Fill in the scatter gather information */
4964         if (iocommand.buf_size > 0) {
4965                 temp64 = pci_map_single(h->pdev, buff,
4966                         iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
4967                 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) {
4968                         c->SG[0].Addr = cpu_to_le64(0);
4969                         c->SG[0].Len = cpu_to_le32(0);
4970                         rc = -ENOMEM;
4971                         goto out;
4972                 }
4973                 c->SG[0].Addr = cpu_to_le64(temp64);
4974                 c->SG[0].Len = cpu_to_le32(iocommand.buf_size);
4975                 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */
4976         }
4977         hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
4978         if (iocommand.buf_size > 0)
4979                 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
4980         check_ioctl_unit_attention(h, c);
4981
4982         /* Copy the error information out */
4983         memcpy(&iocommand.error_info, c->err_info,
4984                 sizeof(iocommand.error_info));
4985         if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
4986                 rc = -EFAULT;
4987                 goto out;
4988         }
4989         if ((iocommand.Request.Type.Direction & XFER_READ) &&
4990                 iocommand.buf_size > 0) {
4991                 /* Copy the data out of the buffer we created */
4992                 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
4993                         rc = -EFAULT;
4994                         goto out;
4995                 }
4996         }
4997 out:
4998         cmd_special_free(h, c);
4999 out_kfree:
5000         kfree(buff);
5001         return rc;
5002 }
5003
5004 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
5005 {
5006         BIG_IOCTL_Command_struct *ioc;
5007         struct CommandList *c;
5008         unsigned char **buff = NULL;
5009         int *buff_size = NULL;
5010         u64 temp64;
5011         BYTE sg_used = 0;
5012         int status = 0;
5013         int i;
5014         u32 left;
5015         u32 sz;
5016         BYTE __user *data_ptr;
5017
5018         if (!argp)
5019                 return -EINVAL;
5020         if (!capable(CAP_SYS_RAWIO))
5021                 return -EPERM;
5022         ioc = (BIG_IOCTL_Command_struct *)
5023             kmalloc(sizeof(*ioc), GFP_KERNEL);
5024         if (!ioc) {
5025                 status = -ENOMEM;
5026                 goto cleanup1;
5027         }
5028         if (copy_from_user(ioc, argp, sizeof(*ioc))) {
5029                 status = -EFAULT;
5030                 goto cleanup1;
5031         }
5032         if ((ioc->buf_size < 1) &&
5033             (ioc->Request.Type.Direction != XFER_NONE)) {
5034                 status = -EINVAL;
5035                 goto cleanup1;
5036         }
5037         /* Check kmalloc limits  using all SGs */
5038         if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
5039                 status = -EINVAL;
5040                 goto cleanup1;
5041         }
5042         if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
5043                 status = -EINVAL;
5044                 goto cleanup1;
5045         }
5046         buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
5047         if (!buff) {
5048                 status = -ENOMEM;
5049                 goto cleanup1;
5050         }
5051         buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
5052         if (!buff_size) {
5053                 status = -ENOMEM;
5054                 goto cleanup1;
5055         }
5056         left = ioc->buf_size;
5057         data_ptr = ioc->buf;
5058         while (left) {
5059                 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
5060                 buff_size[sg_used] = sz;
5061                 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
5062                 if (buff[sg_used] == NULL) {
5063                         status = -ENOMEM;
5064                         goto cleanup1;
5065                 }
5066                 if (ioc->Request.Type.Direction & XFER_WRITE) {
5067                         if (copy_from_user(buff[sg_used], data_ptr, sz)) {
5068                                 status = -EFAULT;
5069                                 goto cleanup1;
5070                         }
5071                 } else
5072                         memset(buff[sg_used], 0, sz);
5073                 left -= sz;
5074                 data_ptr += sz;
5075                 sg_used++;
5076         }
5077         c = cmd_special_alloc(h);
5078         if (c == NULL) {
5079                 status = -ENOMEM;
5080                 goto cleanup1;
5081         }
5082         c->cmd_type = CMD_IOCTL_PEND;
5083         c->Header.ReplyQueue = 0;
5084         c->Header.SGList = (u8) sg_used;
5085         c->Header.SGTotal = cpu_to_le16(sg_used);
5086         memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
5087         c->Header.tag = c->busaddr;
5088         memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
5089         if (ioc->buf_size > 0) {
5090                 int i;
5091                 for (i = 0; i < sg_used; i++) {
5092                         temp64 = pci_map_single(h->pdev, buff[i],
5093                                     buff_size[i], PCI_DMA_BIDIRECTIONAL);
5094                         if (dma_mapping_error(&h->pdev->dev,
5095                                                         (dma_addr_t) temp64)) {
5096                                 c->SG[i].Addr = cpu_to_le64(0);
5097                                 c->SG[i].Len = cpu_to_le32(0);
5098                                 hpsa_pci_unmap(h->pdev, c, i,
5099                                         PCI_DMA_BIDIRECTIONAL);
5100                                 status = -ENOMEM;
5101                                 goto cleanup0;
5102                         }
5103                         c->SG[i].Addr = cpu_to_le64(temp64);
5104                         c->SG[i].Len = cpu_to_le32(buff_size[i]);
5105                         c->SG[i].Ext = cpu_to_le32(0);
5106                 }
5107                 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST);
5108         }
5109         hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
5110         if (sg_used)
5111                 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
5112         check_ioctl_unit_attention(h, c);
5113         /* Copy the error information out */
5114         memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
5115         if (copy_to_user(argp, ioc, sizeof(*ioc))) {
5116                 status = -EFAULT;
5117                 goto cleanup0;
5118         }
5119         if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
5120                 /* Copy the data out of the buffer we created */
5121                 BYTE __user *ptr = ioc->buf;
5122                 for (i = 0; i < sg_used; i++) {
5123                         if (copy_to_user(ptr, buff[i], buff_size[i])) {
5124                                 status = -EFAULT;
5125                                 goto cleanup0;
5126                         }
5127                         ptr += buff_size[i];
5128                 }
5129         }
5130         status = 0;
5131 cleanup0:
5132         cmd_special_free(h, c);
5133 cleanup1:
5134         if (buff) {
5135                 for (i = 0; i < sg_used; i++)
5136                         kfree(buff[i]);
5137                 kfree(buff);
5138         }
5139         kfree(buff_size);
5140         kfree(ioc);
5141         return status;
5142 }
5143
5144 static void check_ioctl_unit_attention(struct ctlr_info *h,
5145         struct CommandList *c)
5146 {
5147         if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5148                         c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
5149                 (void) check_for_unit_attention(h, c);
5150 }
5151
5152 static int increment_passthru_count(struct ctlr_info *h)
5153 {
5154         unsigned long flags;
5155
5156         spin_lock_irqsave(&h->passthru_count_lock, flags);
5157         if (h->passthru_count >= HPSA_MAX_CONCURRENT_PASSTHRUS) {
5158                 spin_unlock_irqrestore(&h->passthru_count_lock, flags);
5159                 return -1;
5160         }
5161         h->passthru_count++;
5162         spin_unlock_irqrestore(&h->passthru_count_lock, flags);
5163         return 0;
5164 }
5165
5166 static void decrement_passthru_count(struct ctlr_info *h)
5167 {
5168         unsigned long flags;
5169
5170         spin_lock_irqsave(&h->passthru_count_lock, flags);
5171         if (h->passthru_count <= 0) {
5172                 spin_unlock_irqrestore(&h->passthru_count_lock, flags);
5173                 /* not expecting to get here. */
5174                 dev_warn(&h->pdev->dev, "Bug detected, passthru_count seems to be incorrect.\n");
5175                 return;
5176         }
5177         h->passthru_count--;
5178         spin_unlock_irqrestore(&h->passthru_count_lock, flags);
5179 }
5180
5181 /*
5182  * ioctl
5183  */
5184 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
5185 {
5186         struct ctlr_info *h;
5187         void __user *argp = (void __user *)arg;
5188         int rc;
5189
5190         h = sdev_to_hba(dev);
5191
5192         switch (cmd) {
5193         case CCISS_DEREGDISK:
5194         case CCISS_REGNEWDISK:
5195         case CCISS_REGNEWD:
5196                 hpsa_scan_start(h->scsi_host);
5197                 return 0;
5198         case CCISS_GETPCIINFO:
5199                 return hpsa_getpciinfo_ioctl(h, argp);
5200         case CCISS_GETDRIVVER:
5201                 return hpsa_getdrivver_ioctl(h, argp);
5202         case CCISS_PASSTHRU:
5203                 if (increment_passthru_count(h))
5204                         return -EAGAIN;
5205                 rc = hpsa_passthru_ioctl(h, argp);
5206                 decrement_passthru_count(h);
5207                 return rc;
5208         case CCISS_BIG_PASSTHRU:
5209                 if (increment_passthru_count(h))
5210                         return -EAGAIN;
5211                 rc = hpsa_big_passthru_ioctl(h, argp);
5212                 decrement_passthru_count(h);
5213                 return rc;
5214         default:
5215                 return -ENOTTY;
5216         }
5217 }
5218
5219 static int hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
5220                                 u8 reset_type)
5221 {
5222         struct CommandList *c;
5223
5224         c = cmd_alloc(h);
5225         if (!c)
5226                 return -ENOMEM;
5227         /* fill_cmd can't fail here, no data buffer to map */
5228         (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
5229                 RAID_CTLR_LUNID, TYPE_MSG);
5230         c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
5231         c->waiting = NULL;
5232         enqueue_cmd_and_start_io(h, c);
5233         /* Don't wait for completion, the reset won't complete.  Don't free
5234          * the command either.  This is the last command we will send before
5235          * re-initializing everything, so it doesn't matter and won't leak.
5236          */
5237         return 0;
5238 }
5239
5240 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
5241         void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
5242         int cmd_type)
5243 {
5244         int pci_dir = XFER_NONE;
5245         struct CommandList *a; /* for commands to be aborted */
5246         u32 tupper, tlower;
5247
5248         c->cmd_type = CMD_IOCTL_PEND;
5249         c->Header.ReplyQueue = 0;
5250         if (buff != NULL && size > 0) {
5251                 c->Header.SGList = 1;
5252                 c->Header.SGTotal = cpu_to_le16(1);
5253         } else {
5254                 c->Header.SGList = 0;
5255                 c->Header.SGTotal = cpu_to_le16(0);
5256         }
5257         c->Header.tag = c->busaddr;
5258         memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
5259
5260         if (cmd_type == TYPE_CMD) {
5261                 switch (cmd) {
5262                 case HPSA_INQUIRY:
5263                         /* are we trying to read a vital product page */
5264                         if (page_code & VPD_PAGE) {
5265                                 c->Request.CDB[1] = 0x01;
5266                                 c->Request.CDB[2] = (page_code & 0xff);
5267                         }
5268                         c->Request.CDBLen = 6;
5269                         c->Request.type_attr_dir =
5270                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5271                         c->Request.Timeout = 0;
5272                         c->Request.CDB[0] = HPSA_INQUIRY;
5273                         c->Request.CDB[4] = size & 0xFF;
5274                         break;
5275                 case HPSA_REPORT_LOG:
5276                 case HPSA_REPORT_PHYS:
5277                         /* Talking to controller so It's a physical command
5278                            mode = 00 target = 0.  Nothing to write.
5279                          */
5280                         c->Request.CDBLen = 12;
5281                         c->Request.type_attr_dir =
5282                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5283                         c->Request.Timeout = 0;
5284                         c->Request.CDB[0] = cmd;
5285                         c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
5286                         c->Request.CDB[7] = (size >> 16) & 0xFF;
5287                         c->Request.CDB[8] = (size >> 8) & 0xFF;
5288                         c->Request.CDB[9] = size & 0xFF;
5289                         break;
5290                 case HPSA_CACHE_FLUSH:
5291                         c->Request.CDBLen = 12;
5292                         c->Request.type_attr_dir =
5293                                         TYPE_ATTR_DIR(cmd_type,
5294                                                 ATTR_SIMPLE, XFER_WRITE);
5295                         c->Request.Timeout = 0;
5296                         c->Request.CDB[0] = BMIC_WRITE;
5297                         c->Request.CDB[6] = BMIC_CACHE_FLUSH;
5298                         c->Request.CDB[7] = (size >> 8) & 0xFF;
5299                         c->Request.CDB[8] = size & 0xFF;
5300                         break;
5301                 case TEST_UNIT_READY:
5302                         c->Request.CDBLen = 6;
5303                         c->Request.type_attr_dir =
5304                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
5305                         c->Request.Timeout = 0;
5306                         break;
5307                 case HPSA_GET_RAID_MAP:
5308                         c->Request.CDBLen = 12;
5309                         c->Request.type_attr_dir =
5310                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5311                         c->Request.Timeout = 0;
5312                         c->Request.CDB[0] = HPSA_CISS_READ;
5313                         c->Request.CDB[1] = cmd;
5314                         c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
5315                         c->Request.CDB[7] = (size >> 16) & 0xFF;
5316                         c->Request.CDB[8] = (size >> 8) & 0xFF;
5317                         c->Request.CDB[9] = size & 0xFF;
5318                         break;
5319                 case BMIC_SENSE_CONTROLLER_PARAMETERS:
5320                         c->Request.CDBLen = 10;
5321                         c->Request.type_attr_dir =
5322                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ);
5323                         c->Request.Timeout = 0;
5324                         c->Request.CDB[0] = BMIC_READ;
5325                         c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
5326                         c->Request.CDB[7] = (size >> 16) & 0xFF;
5327                         c->Request.CDB[8] = (size >> 8) & 0xFF;
5328                         break;
5329                 default:
5330                         dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
5331                         BUG();
5332                         return -1;
5333                 }
5334         } else if (cmd_type == TYPE_MSG) {
5335                 switch (cmd) {
5336
5337                 case  HPSA_DEVICE_RESET_MSG:
5338                         c->Request.CDBLen = 16;
5339                         c->Request.type_attr_dir =
5340                                 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE);
5341                         c->Request.Timeout = 0; /* Don't time out */
5342                         memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
5343                         c->Request.CDB[0] =  cmd;
5344                         c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
5345                         /* If bytes 4-7 are zero, it means reset the */
5346                         /* LunID device */
5347                         c->Request.CDB[4] = 0x00;
5348                         c->Request.CDB[5] = 0x00;
5349                         c->Request.CDB[6] = 0x00;
5350                         c->Request.CDB[7] = 0x00;
5351                         break;
5352                 case  HPSA_ABORT_MSG:
5353                         a = buff;       /* point to command to be aborted */
5354                         dev_dbg(&h->pdev->dev, "Abort Tag:0x%016llx using request Tag:0x%016llx",
5355                                 a->Header.tag, c->Header.tag);
5356                         tlower = (u32) (a->Header.tag >> 32);
5357                         tupper = (u32) (a->Header.tag & 0x0ffffffffULL);
5358                         c->Request.CDBLen = 16;
5359                         c->Request.type_attr_dir =
5360                                         TYPE_ATTR_DIR(cmd_type,
5361                                                 ATTR_SIMPLE, XFER_WRITE);
5362                         c->Request.Timeout = 0; /* Don't time out */
5363                         c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
5364                         c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
5365                         c->Request.CDB[2] = 0x00; /* reserved */
5366                         c->Request.CDB[3] = 0x00; /* reserved */
5367                         /* Tag to abort goes in CDB[4]-CDB[11] */
5368                         c->Request.CDB[4] = tlower & 0xFF;
5369                         c->Request.CDB[5] = (tlower >> 8) & 0xFF;
5370                         c->Request.CDB[6] = (tlower >> 16) & 0xFF;
5371                         c->Request.CDB[7] = (tlower >> 24) & 0xFF;
5372                         c->Request.CDB[8] = tupper & 0xFF;
5373                         c->Request.CDB[9] = (tupper >> 8) & 0xFF;
5374                         c->Request.CDB[10] = (tupper >> 16) & 0xFF;
5375                         c->Request.CDB[11] = (tupper >> 24) & 0xFF;
5376                         c->Request.CDB[12] = 0x00; /* reserved */
5377                         c->Request.CDB[13] = 0x00; /* reserved */
5378                         c->Request.CDB[14] = 0x00; /* reserved */
5379                         c->Request.CDB[15] = 0x00; /* reserved */
5380                 break;
5381                 default:
5382                         dev_warn(&h->pdev->dev, "unknown message type %d\n",
5383                                 cmd);
5384                         BUG();
5385                 }
5386         } else {
5387                 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
5388                 BUG();
5389         }
5390
5391         switch (GET_DIR(c->Request.type_attr_dir)) {
5392         case XFER_READ:
5393                 pci_dir = PCI_DMA_FROMDEVICE;
5394                 break;
5395         case XFER_WRITE:
5396                 pci_dir = PCI_DMA_TODEVICE;
5397                 break;
5398         case XFER_NONE:
5399                 pci_dir = PCI_DMA_NONE;
5400                 break;
5401         default:
5402                 pci_dir = PCI_DMA_BIDIRECTIONAL;
5403         }
5404         if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
5405                 return -1;
5406         return 0;
5407 }
5408
5409 /*
5410  * Map (physical) PCI mem into (virtual) kernel space
5411  */
5412 static void __iomem *remap_pci_mem(ulong base, ulong size)
5413 {
5414         ulong page_base = ((ulong) base) & PAGE_MASK;
5415         ulong page_offs = ((ulong) base) - page_base;
5416         void __iomem *page_remapped = ioremap_nocache(page_base,
5417                 page_offs + size);
5418
5419         return page_remapped ? (page_remapped + page_offs) : NULL;
5420 }
5421
5422 /* Takes cmds off the submission queue and sends them to the hardware,
5423  * then puts them on the queue of cmds waiting for completion.
5424  * Assumes h->lock is held
5425  */
5426 static void start_io(struct ctlr_info *h, unsigned long *flags)
5427 {
5428         struct CommandList *c;
5429
5430         while (!list_empty(&h->reqQ)) {
5431                 c = list_entry(h->reqQ.next, struct CommandList, list);
5432                 /* can't do anything if fifo is full */
5433                 if ((h->access.fifo_full(h))) {
5434                         h->fifo_recently_full = 1;
5435                         dev_warn(&h->pdev->dev, "fifo full\n");
5436                         break;
5437                 }
5438                 h->fifo_recently_full = 0;
5439
5440                 /* Get the first entry from the Request Q */
5441                 removeQ(c);
5442                 h->Qdepth--;
5443
5444                 /* Put job onto the completed Q */
5445                 addQ(&h->cmpQ, c);
5446                 atomic_inc(&h->commands_outstanding);
5447                 spin_unlock_irqrestore(&h->lock, *flags);
5448                 /* Tell the controller execute command */
5449                 h->access.submit_command(h, c);
5450                 spin_lock_irqsave(&h->lock, *flags);
5451         }
5452 }
5453
5454 static void lock_and_start_io(struct ctlr_info *h)
5455 {
5456         unsigned long flags;
5457
5458         spin_lock_irqsave(&h->lock, flags);
5459         start_io(h, &flags);
5460         spin_unlock_irqrestore(&h->lock, flags);
5461 }
5462
5463 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
5464 {
5465         return h->access.command_completed(h, q);
5466 }
5467
5468 static inline bool interrupt_pending(struct ctlr_info *h)
5469 {
5470         return h->access.intr_pending(h);
5471 }
5472
5473 static inline long interrupt_not_for_us(struct ctlr_info *h)
5474 {
5475         return (h->access.intr_pending(h) == 0) ||
5476                 (h->interrupts_enabled == 0);
5477 }
5478
5479 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
5480         u32 raw_tag)
5481 {
5482         if (unlikely(tag_index >= h->nr_cmds)) {
5483                 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
5484                 return 1;
5485         }
5486         return 0;
5487 }
5488
5489 static inline void finish_cmd(struct CommandList *c)
5490 {
5491         unsigned long flags;
5492         int io_may_be_stalled = 0;
5493         struct ctlr_info *h = c->h;
5494         int count;
5495
5496         spin_lock_irqsave(&h->lock, flags);
5497         removeQ(c);
5498
5499         /*
5500          * Check for possibly stalled i/o.
5501          *
5502          * If a fifo_full condition is encountered, requests will back up
5503          * in h->reqQ.  This queue is only emptied out by start_io which is
5504          * only called when a new i/o request comes in.  If no i/o's are
5505          * forthcoming, the i/o's in h->reqQ can get stuck.  So we call
5506          * start_io from here if we detect such a danger.
5507          *
5508          * Normally, we shouldn't hit this case, but pounding on the
5509          * CCISS_PASSTHRU ioctl can provoke it.  Only call start_io if
5510          * commands_outstanding is low.  We want to avoid calling
5511          * start_io from in here as much as possible, and esp. don't
5512          * want to get in a cycle where we call start_io every time
5513          * through here.
5514          */
5515         count = atomic_read(&h->commands_outstanding);
5516         spin_unlock_irqrestore(&h->lock, flags);
5517         if (unlikely(h->fifo_recently_full) && count < 5)
5518                 io_may_be_stalled = 1;
5519
5520         dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
5521         if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
5522                         || c->cmd_type == CMD_IOACCEL2))
5523                 complete_scsi_command(c);
5524         else if (c->cmd_type == CMD_IOCTL_PEND)
5525                 complete(c->waiting);
5526         if (unlikely(io_may_be_stalled))
5527                 lock_and_start_io(h);
5528 }
5529
5530 static inline u32 hpsa_tag_contains_index(u32 tag)
5531 {
5532         return tag & DIRECT_LOOKUP_BIT;
5533 }
5534
5535 static inline u32 hpsa_tag_to_index(u32 tag)
5536 {
5537         return tag >> DIRECT_LOOKUP_SHIFT;
5538 }
5539
5540
5541 static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
5542 {
5543 #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
5544 #define HPSA_SIMPLE_ERROR_BITS 0x03
5545         if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
5546                 return tag & ~HPSA_SIMPLE_ERROR_BITS;
5547         return tag & ~HPSA_PERF_ERROR_BITS;
5548 }
5549
5550 /* process completion of an indexed ("direct lookup") command */
5551 static inline void process_indexed_cmd(struct ctlr_info *h,
5552         u32 raw_tag)
5553 {
5554         u32 tag_index;
5555         struct CommandList *c;
5556
5557         tag_index = hpsa_tag_to_index(raw_tag);
5558         if (!bad_tag(h, tag_index, raw_tag)) {
5559                 c = h->cmd_pool + tag_index;
5560                 finish_cmd(c);
5561         }
5562 }
5563
5564 /* process completion of a non-indexed command */
5565 static inline void process_nonindexed_cmd(struct ctlr_info *h,
5566         u32 raw_tag)
5567 {
5568         u32 tag;
5569         struct CommandList *c = NULL;
5570         unsigned long flags;
5571
5572         tag = hpsa_tag_discard_error_bits(h, raw_tag);
5573         spin_lock_irqsave(&h->lock, flags);
5574         list_for_each_entry(c, &h->cmpQ, list) {
5575                 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
5576                         spin_unlock_irqrestore(&h->lock, flags);
5577                         finish_cmd(c);
5578                         return;
5579                 }
5580         }
5581         spin_unlock_irqrestore(&h->lock, flags);
5582         bad_tag(h, h->nr_cmds + 1, raw_tag);
5583 }
5584
5585 /* Some controllers, like p400, will give us one interrupt
5586  * after a soft reset, even if we turned interrupts off.
5587  * Only need to check for this in the hpsa_xxx_discard_completions
5588  * functions.
5589  */
5590 static int ignore_bogus_interrupt(struct ctlr_info *h)
5591 {
5592         if (likely(!reset_devices))
5593                 return 0;
5594
5595         if (likely(h->interrupts_enabled))
5596                 return 0;
5597
5598         dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
5599                 "(known firmware bug.)  Ignoring.\n");
5600
5601         return 1;
5602 }
5603
5604 /*
5605  * Convert &h->q[x] (passed to interrupt handlers) back to h.
5606  * Relies on (h-q[x] == x) being true for x such that
5607  * 0 <= x < MAX_REPLY_QUEUES.
5608  */
5609 static struct ctlr_info *queue_to_hba(u8 *queue)
5610 {
5611         return container_of((queue - *queue), struct ctlr_info, q[0]);
5612 }
5613
5614 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
5615 {
5616         struct ctlr_info *h = queue_to_hba(queue);
5617         u8 q = *(u8 *) queue;
5618         u32 raw_tag;
5619
5620         if (ignore_bogus_interrupt(h))
5621                 return IRQ_NONE;
5622
5623         if (interrupt_not_for_us(h))
5624                 return IRQ_NONE;
5625         h->last_intr_timestamp = get_jiffies_64();
5626         while (interrupt_pending(h)) {
5627                 raw_tag = get_next_completion(h, q);
5628                 while (raw_tag != FIFO_EMPTY)
5629                         raw_tag = next_command(h, q);
5630         }
5631         return IRQ_HANDLED;
5632 }
5633
5634 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
5635 {
5636         struct ctlr_info *h = queue_to_hba(queue);
5637         u32 raw_tag;
5638         u8 q = *(u8 *) queue;
5639
5640         if (ignore_bogus_interrupt(h))
5641                 return IRQ_NONE;
5642
5643         h->last_intr_timestamp = get_jiffies_64();
5644         raw_tag = get_next_completion(h, q);
5645         while (raw_tag != FIFO_EMPTY)
5646                 raw_tag = next_command(h, q);
5647         return IRQ_HANDLED;
5648 }
5649
5650 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
5651 {
5652         struct ctlr_info *h = queue_to_hba((u8 *) queue);
5653         u32 raw_tag;
5654         u8 q = *(u8 *) queue;
5655
5656         if (interrupt_not_for_us(h))
5657                 return IRQ_NONE;
5658         h->last_intr_timestamp = get_jiffies_64();
5659         while (interrupt_pending(h)) {
5660                 raw_tag = get_next_completion(h, q);
5661                 while (raw_tag != FIFO_EMPTY) {
5662                         if (likely(hpsa_tag_contains_index(raw_tag)))
5663                                 process_indexed_cmd(h, raw_tag);
5664                         else
5665                                 process_nonindexed_cmd(h, raw_tag);
5666                         raw_tag = next_command(h, q);
5667                 }
5668         }
5669         return IRQ_HANDLED;
5670 }
5671
5672 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
5673 {
5674         struct ctlr_info *h = queue_to_hba(queue);
5675         u32 raw_tag;
5676         u8 q = *(u8 *) queue;
5677
5678         h->last_intr_timestamp = get_jiffies_64();
5679         raw_tag = get_next_completion(h, q);
5680         while (raw_tag != FIFO_EMPTY) {
5681                 if (likely(hpsa_tag_contains_index(raw_tag)))
5682                         process_indexed_cmd(h, raw_tag);
5683                 else
5684                         process_nonindexed_cmd(h, raw_tag);
5685                 raw_tag = next_command(h, q);
5686         }
5687         return IRQ_HANDLED;
5688 }
5689
5690 /* Send a message CDB to the firmware. Careful, this only works
5691  * in simple mode, not performant mode due to the tag lookup.
5692  * We only ever use this immediately after a controller reset.
5693  */
5694 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
5695                         unsigned char type)
5696 {
5697         struct Command {
5698                 struct CommandListHeader CommandHeader;
5699                 struct RequestBlock Request;
5700                 struct ErrDescriptor ErrorDescriptor;
5701         };
5702         struct Command *cmd;
5703         static const size_t cmd_sz = sizeof(*cmd) +
5704                                         sizeof(cmd->ErrorDescriptor);
5705         dma_addr_t paddr64;
5706         uint32_t paddr32, tag;
5707         void __iomem *vaddr;
5708         int i, err;
5709
5710         vaddr = pci_ioremap_bar(pdev, 0);
5711         if (vaddr == NULL)
5712                 return -ENOMEM;
5713
5714         /* The Inbound Post Queue only accepts 32-bit physical addresses for the
5715          * CCISS commands, so they must be allocated from the lower 4GiB of
5716          * memory.
5717          */
5718         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
5719         if (err) {
5720                 iounmap(vaddr);
5721                 return -ENOMEM;
5722         }
5723
5724         cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
5725         if (cmd == NULL) {
5726                 iounmap(vaddr);
5727                 return -ENOMEM;
5728         }
5729
5730         /* This must fit, because of the 32-bit consistent DMA mask.  Also,
5731          * although there's no guarantee, we assume that the address is at
5732          * least 4-byte aligned (most likely, it's page-aligned).
5733          */
5734         paddr32 = paddr64;
5735
5736         cmd->CommandHeader.ReplyQueue = 0;
5737         cmd->CommandHeader.SGList = 0;
5738         cmd->CommandHeader.SGTotal = cpu_to_le16(0);
5739         cmd->CommandHeader.tag = paddr32;
5740         memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
5741
5742         cmd->Request.CDBLen = 16;
5743         cmd->Request.type_attr_dir =
5744                         TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE);
5745         cmd->Request.Timeout = 0; /* Don't time out */
5746         cmd->Request.CDB[0] = opcode;
5747         cmd->Request.CDB[1] = type;
5748         memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
5749         cmd->ErrorDescriptor.Addr =
5750                         cpu_to_le64((paddr32 + sizeof(*cmd)));
5751         cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo));
5752
5753         writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
5754
5755         for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
5756                 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
5757                 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
5758                         break;
5759                 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
5760         }
5761
5762         iounmap(vaddr);
5763
5764         /* we leak the DMA buffer here ... no choice since the controller could
5765          *  still complete the command.
5766          */
5767         if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
5768                 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
5769                         opcode, type);
5770                 return -ETIMEDOUT;
5771         }
5772
5773         pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
5774
5775         if (tag & HPSA_ERROR_BIT) {
5776                 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
5777                         opcode, type);
5778                 return -EIO;
5779         }
5780
5781         dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
5782                 opcode, type);
5783         return 0;
5784 }
5785
5786 #define hpsa_noop(p) hpsa_message(p, 3, 0)
5787
5788 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
5789         void __iomem *vaddr, u32 use_doorbell)
5790 {
5791         u16 pmcsr;
5792         int pos;
5793
5794         if (use_doorbell) {
5795                 /* For everything after the P600, the PCI power state method
5796                  * of resetting the controller doesn't work, so we have this
5797                  * other way using the doorbell register.
5798                  */
5799                 dev_info(&pdev->dev, "using doorbell to reset controller\n");
5800                 writel(use_doorbell, vaddr + SA5_DOORBELL);
5801
5802                 /* PMC hardware guys tell us we need a 10 second delay after
5803                  * doorbell reset and before any attempt to talk to the board
5804                  * at all to ensure that this actually works and doesn't fall
5805                  * over in some weird corner cases.
5806                  */
5807                 msleep(10000);
5808         } else { /* Try to do it the PCI power state way */
5809
5810                 /* Quoting from the Open CISS Specification: "The Power
5811                  * Management Control/Status Register (CSR) controls the power
5812                  * state of the device.  The normal operating state is D0,
5813                  * CSR=00h.  The software off state is D3, CSR=03h.  To reset
5814                  * the controller, place the interface device in D3 then to D0,
5815                  * this causes a secondary PCI reset which will reset the
5816                  * controller." */
5817
5818                 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
5819                 if (pos == 0) {
5820                         dev_err(&pdev->dev,
5821                                 "hpsa_reset_controller: "
5822                                 "PCI PM not supported\n");
5823                         return -ENODEV;
5824                 }
5825                 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
5826                 /* enter the D3hot power management state */
5827                 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
5828                 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
5829                 pmcsr |= PCI_D3hot;
5830                 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
5831
5832                 msleep(500);
5833
5834                 /* enter the D0 power management state */
5835                 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
5836                 pmcsr |= PCI_D0;
5837                 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
5838
5839                 /*
5840                  * The P600 requires a small delay when changing states.
5841                  * Otherwise we may think the board did not reset and we bail.
5842                  * This for kdump only and is particular to the P600.
5843                  */
5844                 msleep(500);
5845         }
5846         return 0;
5847 }
5848
5849 static void init_driver_version(char *driver_version, int len)
5850 {
5851         memset(driver_version, 0, len);
5852         strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
5853 }
5854
5855 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
5856 {
5857         char *driver_version;
5858         int i, size = sizeof(cfgtable->driver_version);
5859
5860         driver_version = kmalloc(size, GFP_KERNEL);
5861         if (!driver_version)
5862                 return -ENOMEM;
5863
5864         init_driver_version(driver_version, size);
5865         for (i = 0; i < size; i++)
5866                 writeb(driver_version[i], &cfgtable->driver_version[i]);
5867         kfree(driver_version);
5868         return 0;
5869 }
5870
5871 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
5872                                           unsigned char *driver_ver)
5873 {
5874         int i;
5875
5876         for (i = 0; i < sizeof(cfgtable->driver_version); i++)
5877                 driver_ver[i] = readb(&cfgtable->driver_version[i]);
5878 }
5879
5880 static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
5881 {
5882
5883         char *driver_ver, *old_driver_ver;
5884         int rc, size = sizeof(cfgtable->driver_version);
5885
5886         old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
5887         if (!old_driver_ver)
5888                 return -ENOMEM;
5889         driver_ver = old_driver_ver + size;
5890
5891         /* After a reset, the 32 bytes of "driver version" in the cfgtable
5892          * should have been changed, otherwise we know the reset failed.
5893          */
5894         init_driver_version(old_driver_ver, size);
5895         read_driver_ver_from_cfgtable(cfgtable, driver_ver);
5896         rc = !memcmp(driver_ver, old_driver_ver, size);
5897         kfree(old_driver_ver);
5898         return rc;
5899 }
5900 /* This does a hard reset of the controller using PCI power management
5901  * states or the using the doorbell register.
5902  */
5903 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
5904 {
5905         u64 cfg_offset;
5906         u32 cfg_base_addr;
5907         u64 cfg_base_addr_index;
5908         void __iomem *vaddr;
5909         unsigned long paddr;
5910         u32 misc_fw_support;
5911         int rc;
5912         struct CfgTable __iomem *cfgtable;
5913         u32 use_doorbell;
5914         u32 board_id;
5915         u16 command_register;
5916
5917         /* For controllers as old as the P600, this is very nearly
5918          * the same thing as
5919          *
5920          * pci_save_state(pci_dev);
5921          * pci_set_power_state(pci_dev, PCI_D3hot);
5922          * pci_set_power_state(pci_dev, PCI_D0);
5923          * pci_restore_state(pci_dev);
5924          *
5925          * For controllers newer than the P600, the pci power state
5926          * method of resetting doesn't work so we have another way
5927          * using the doorbell register.
5928          */
5929
5930         rc = hpsa_lookup_board_id(pdev, &board_id);
5931         if (rc < 0 || !ctlr_is_resettable(board_id)) {
5932                 dev_warn(&pdev->dev, "Not resetting device.\n");
5933                 return -ENODEV;
5934         }
5935
5936         /* if controller is soft- but not hard resettable... */
5937         if (!ctlr_is_hard_resettable(board_id))
5938                 return -ENOTSUPP; /* try soft reset later. */
5939
5940         /* Save the PCI command register */
5941         pci_read_config_word(pdev, 4, &command_register);
5942         pci_save_state(pdev);
5943
5944         /* find the first memory BAR, so we can find the cfg table */
5945         rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
5946         if (rc)
5947                 return rc;
5948         vaddr = remap_pci_mem(paddr, 0x250);
5949         if (!vaddr)
5950                 return -ENOMEM;
5951
5952         /* find cfgtable in order to check if reset via doorbell is supported */
5953         rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
5954                                         &cfg_base_addr_index, &cfg_offset);
5955         if (rc)
5956                 goto unmap_vaddr;
5957         cfgtable = remap_pci_mem(pci_resource_start(pdev,
5958                        cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
5959         if (!cfgtable) {
5960                 rc = -ENOMEM;
5961                 goto unmap_vaddr;
5962         }
5963         rc = write_driver_ver_to_cfgtable(cfgtable);
5964         if (rc)
5965                 goto unmap_vaddr;
5966
5967         /* If reset via doorbell register is supported, use that.
5968          * There are two such methods.  Favor the newest method.
5969          */
5970         misc_fw_support = readl(&cfgtable->misc_fw_support);
5971         use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
5972         if (use_doorbell) {
5973                 use_doorbell = DOORBELL_CTLR_RESET2;
5974         } else {
5975                 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
5976                 if (use_doorbell) {
5977                         dev_warn(&pdev->dev, "Soft reset not supported. "
5978                                 "Firmware update is required.\n");
5979                         rc = -ENOTSUPP; /* try soft reset */
5980                         goto unmap_cfgtable;
5981                 }
5982         }
5983
5984         rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
5985         if (rc)
5986                 goto unmap_cfgtable;
5987
5988         pci_restore_state(pdev);
5989         pci_write_config_word(pdev, 4, command_register);
5990
5991         /* Some devices (notably the HP Smart Array 5i Controller)
5992            need a little pause here */
5993         msleep(HPSA_POST_RESET_PAUSE_MSECS);
5994
5995         rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
5996         if (rc) {
5997                 dev_warn(&pdev->dev,
5998                         "failed waiting for board to become ready "
5999                         "after hard reset\n");
6000                 goto unmap_cfgtable;
6001         }
6002
6003         rc = controller_reset_failed(vaddr);
6004         if (rc < 0)
6005                 goto unmap_cfgtable;
6006         if (rc) {
6007                 dev_warn(&pdev->dev, "Unable to successfully reset "
6008                         "controller. Will try soft reset.\n");
6009                 rc = -ENOTSUPP;
6010         } else {
6011                 dev_info(&pdev->dev, "board ready after hard reset.\n");
6012         }
6013
6014 unmap_cfgtable:
6015         iounmap(cfgtable);
6016
6017 unmap_vaddr:
6018         iounmap(vaddr);
6019         return rc;
6020 }
6021
6022 /*
6023  *  We cannot read the structure directly, for portability we must use
6024  *   the io functions.
6025  *   This is for debug only.
6026  */
6027 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
6028 {
6029 #ifdef HPSA_DEBUG
6030         int i;
6031         char temp_name[17];
6032
6033         dev_info(dev, "Controller Configuration information\n");
6034         dev_info(dev, "------------------------------------\n");
6035         for (i = 0; i < 4; i++)
6036                 temp_name[i] = readb(&(tb->Signature[i]));
6037         temp_name[4] = '\0';
6038         dev_info(dev, "   Signature = %s\n", temp_name);
6039         dev_info(dev, "   Spec Number = %d\n", readl(&(tb->SpecValence)));
6040         dev_info(dev, "   Transport methods supported = 0x%x\n",
6041                readl(&(tb->TransportSupport)));
6042         dev_info(dev, "   Transport methods active = 0x%x\n",
6043                readl(&(tb->TransportActive)));
6044         dev_info(dev, "   Requested transport Method = 0x%x\n",
6045                readl(&(tb->HostWrite.TransportRequest)));
6046         dev_info(dev, "   Coalesce Interrupt Delay = 0x%x\n",
6047                readl(&(tb->HostWrite.CoalIntDelay)));
6048         dev_info(dev, "   Coalesce Interrupt Count = 0x%x\n",
6049                readl(&(tb->HostWrite.CoalIntCount)));
6050         dev_info(dev, "   Max outstanding commands = 0x%d\n",
6051                readl(&(tb->CmdsOutMax)));
6052         dev_info(dev, "   Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
6053         for (i = 0; i < 16; i++)
6054                 temp_name[i] = readb(&(tb->ServerName[i]));
6055         temp_name[16] = '\0';
6056         dev_info(dev, "   Server Name = %s\n", temp_name);
6057         dev_info(dev, "   Heartbeat Counter = 0x%x\n\n\n",
6058                 readl(&(tb->HeartBeat)));
6059 #endif                          /* HPSA_DEBUG */
6060 }
6061
6062 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
6063 {
6064         int i, offset, mem_type, bar_type;
6065
6066         if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
6067                 return 0;
6068         offset = 0;
6069         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
6070                 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
6071                 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
6072                         offset += 4;
6073                 else {
6074                         mem_type = pci_resource_flags(pdev, i) &
6075                             PCI_BASE_ADDRESS_MEM_TYPE_MASK;
6076                         switch (mem_type) {
6077                         case PCI_BASE_ADDRESS_MEM_TYPE_32:
6078                         case PCI_BASE_ADDRESS_MEM_TYPE_1M:
6079                                 offset += 4;    /* 32 bit */
6080                                 break;
6081                         case PCI_BASE_ADDRESS_MEM_TYPE_64:
6082                                 offset += 8;
6083                                 break;
6084                         default:        /* reserved in PCI 2.2 */
6085                                 dev_warn(&pdev->dev,
6086                                        "base address is invalid\n");
6087                                 return -1;
6088                                 break;
6089                         }
6090                 }
6091                 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
6092                         return i + 1;
6093         }
6094         return -1;
6095 }
6096
6097 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
6098  * controllers that are capable. If not, we use IO-APIC mode.
6099  */
6100
6101 static void hpsa_interrupt_mode(struct ctlr_info *h)
6102 {
6103 #ifdef CONFIG_PCI_MSI
6104         int err, i;
6105         struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
6106
6107         for (i = 0; i < MAX_REPLY_QUEUES; i++) {
6108                 hpsa_msix_entries[i].vector = 0;
6109                 hpsa_msix_entries[i].entry = i;
6110         }
6111
6112         /* Some boards advertise MSI but don't really support it */
6113         if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
6114             (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
6115                 goto default_int_mode;
6116         if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
6117                 dev_info(&h->pdev->dev, "MSIX\n");
6118                 h->msix_vector = MAX_REPLY_QUEUES;
6119                 if (h->msix_vector > num_online_cpus())
6120                         h->msix_vector = num_online_cpus();
6121                 err = pci_enable_msix_range(h->pdev, hpsa_msix_entries,
6122                                             1, h->msix_vector);
6123                 if (err < 0) {
6124                         dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", err);
6125                         h->msix_vector = 0;
6126                         goto single_msi_mode;
6127                 } else if (err < h->msix_vector) {
6128                         dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
6129                                "available\n", err);
6130                 }
6131                 h->msix_vector = err;
6132                 for (i = 0; i < h->msix_vector; i++)
6133                         h->intr[i] = hpsa_msix_entries[i].vector;
6134                 return;
6135         }
6136 single_msi_mode:
6137         if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
6138                 dev_info(&h->pdev->dev, "MSI\n");
6139                 if (!pci_enable_msi(h->pdev))
6140                         h->msi_vector = 1;
6141                 else
6142                         dev_warn(&h->pdev->dev, "MSI init failed\n");
6143         }
6144 default_int_mode:
6145 #endif                          /* CONFIG_PCI_MSI */
6146         /* if we get here we're going to use the default interrupt mode */
6147         h->intr[h->intr_mode] = h->pdev->irq;
6148 }
6149
6150 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
6151 {
6152         int i;
6153         u32 subsystem_vendor_id, subsystem_device_id;
6154
6155         subsystem_vendor_id = pdev->subsystem_vendor;
6156         subsystem_device_id = pdev->subsystem_device;
6157         *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
6158                     subsystem_vendor_id;
6159
6160         for (i = 0; i < ARRAY_SIZE(products); i++)
6161                 if (*board_id == products[i].board_id)
6162                         return i;
6163
6164         if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
6165                 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
6166                 !hpsa_allow_any) {
6167                 dev_warn(&pdev->dev, "unrecognized board ID: "
6168                         "0x%08x, ignoring.\n", *board_id);
6169                         return -ENODEV;
6170         }
6171         return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
6172 }
6173
6174 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
6175                                     unsigned long *memory_bar)
6176 {
6177         int i;
6178
6179         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
6180                 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
6181                         /* addressing mode bits already removed */
6182                         *memory_bar = pci_resource_start(pdev, i);
6183                         dev_dbg(&pdev->dev, "memory BAR = %lx\n",
6184                                 *memory_bar);
6185                         return 0;
6186                 }
6187         dev_warn(&pdev->dev, "no memory BAR found\n");
6188         return -ENODEV;
6189 }
6190
6191 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
6192                                      int wait_for_ready)
6193 {
6194         int i, iterations;
6195         u32 scratchpad;
6196         if (wait_for_ready)
6197                 iterations = HPSA_BOARD_READY_ITERATIONS;
6198         else
6199                 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
6200
6201         for (i = 0; i < iterations; i++) {
6202                 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
6203                 if (wait_for_ready) {
6204                         if (scratchpad == HPSA_FIRMWARE_READY)
6205                                 return 0;
6206                 } else {
6207                         if (scratchpad != HPSA_FIRMWARE_READY)
6208                                 return 0;
6209                 }
6210                 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
6211         }
6212         dev_warn(&pdev->dev, "board not ready, timed out.\n");
6213         return -ENODEV;
6214 }
6215
6216 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
6217                                u32 *cfg_base_addr, u64 *cfg_base_addr_index,
6218                                u64 *cfg_offset)
6219 {
6220         *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
6221         *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
6222         *cfg_base_addr &= (u32) 0x0000ffff;
6223         *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
6224         if (*cfg_base_addr_index == -1) {
6225                 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
6226                 return -ENODEV;
6227         }
6228         return 0;
6229 }
6230
6231 static int hpsa_find_cfgtables(struct ctlr_info *h)
6232 {
6233         u64 cfg_offset;
6234         u32 cfg_base_addr;
6235         u64 cfg_base_addr_index;
6236         u32 trans_offset;
6237         int rc;
6238
6239         rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
6240                 &cfg_base_addr_index, &cfg_offset);
6241         if (rc)
6242                 return rc;
6243         h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
6244                        cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
6245         if (!h->cfgtable)
6246                 return -ENOMEM;
6247         rc = write_driver_ver_to_cfgtable(h->cfgtable);
6248         if (rc)
6249                 return rc;
6250         /* Find performant mode table. */
6251         trans_offset = readl(&h->cfgtable->TransMethodOffset);
6252         h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
6253                                 cfg_base_addr_index)+cfg_offset+trans_offset,
6254                                 sizeof(*h->transtable));
6255         if (!h->transtable)
6256                 return -ENOMEM;
6257         return 0;
6258 }
6259
6260 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
6261 {
6262         h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
6263
6264         /* Limit commands in memory limited kdump scenario. */
6265         if (reset_devices && h->max_commands > 32)
6266                 h->max_commands = 32;
6267
6268         if (h->max_commands < 16) {
6269                 dev_warn(&h->pdev->dev, "Controller reports "
6270                         "max supported commands of %d, an obvious lie. "
6271                         "Using 16.  Ensure that firmware is up to date.\n",
6272                         h->max_commands);
6273                 h->max_commands = 16;
6274         }
6275 }
6276
6277 /* Interrogate the hardware for some limits:
6278  * max commands, max SG elements without chaining, and with chaining,
6279  * SG chain block size, etc.
6280  */
6281 static void hpsa_find_board_params(struct ctlr_info *h)
6282 {
6283         hpsa_get_max_perf_mode_cmds(h);
6284         h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
6285         h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
6286         h->fw_support = readl(&(h->cfgtable->misc_fw_support));
6287         /*
6288          * Limit in-command s/g elements to 32 save dma'able memory.
6289          * Howvever spec says if 0, use 31
6290          */
6291         h->max_cmd_sg_entries = 31;
6292         if (h->maxsgentries > 512) {
6293                 h->max_cmd_sg_entries = 32;
6294                 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries;
6295                 h->maxsgentries--; /* save one for chain pointer */
6296         } else {
6297                 h->chainsize = 0;
6298                 h->maxsgentries = 31; /* default to traditional values */
6299         }
6300
6301         /* Find out what task management functions are supported and cache */
6302         h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
6303         if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
6304                 dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
6305         if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
6306                 dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
6307 }
6308
6309 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
6310 {
6311         if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
6312                 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
6313                 return false;
6314         }
6315         return true;
6316 }
6317
6318 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
6319 {
6320         u32 driver_support;
6321
6322         driver_support = readl(&(h->cfgtable->driver_support));
6323         /* Need to enable prefetch in the SCSI core for 6400 in x86 */
6324 #ifdef CONFIG_X86
6325         driver_support |= ENABLE_SCSI_PREFETCH;
6326 #endif
6327         driver_support |= ENABLE_UNIT_ATTN;
6328         writel(driver_support, &(h->cfgtable->driver_support));
6329 }
6330
6331 /* Disable DMA prefetch for the P600.  Otherwise an ASIC bug may result
6332  * in a prefetch beyond physical memory.
6333  */
6334 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
6335 {
6336         u32 dma_prefetch;
6337
6338         if (h->board_id != 0x3225103C)
6339                 return;
6340         dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
6341         dma_prefetch |= 0x8000;
6342         writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
6343 }
6344
6345 static void hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
6346 {
6347         int i;
6348         u32 doorbell_value;
6349         unsigned long flags;
6350         /* wait until the clear_event_notify bit 6 is cleared by controller. */
6351         for (i = 0; i < MAX_CONFIG_WAIT; i++) {
6352                 spin_lock_irqsave(&h->lock, flags);
6353                 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
6354                 spin_unlock_irqrestore(&h->lock, flags);
6355                 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
6356                         break;
6357                 /* delay and try again */
6358                 msleep(20);
6359         }
6360 }
6361
6362 static void hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
6363 {
6364         int i;
6365         u32 doorbell_value;
6366         unsigned long flags;
6367
6368         /* under certain very rare conditions, this can take awhile.
6369          * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
6370          * as we enter this code.)
6371          */
6372         for (i = 0; i < MAX_CONFIG_WAIT; i++) {
6373                 spin_lock_irqsave(&h->lock, flags);
6374                 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
6375                 spin_unlock_irqrestore(&h->lock, flags);
6376                 if (!(doorbell_value & CFGTBL_ChangeReq))
6377                         break;
6378                 /* delay and try again */
6379                 usleep_range(10000, 20000);
6380         }
6381 }
6382
6383 static int hpsa_enter_simple_mode(struct ctlr_info *h)
6384 {
6385         u32 trans_support;
6386
6387         trans_support = readl(&(h->cfgtable->TransportSupport));
6388         if (!(trans_support & SIMPLE_MODE))
6389                 return -ENOTSUPP;
6390
6391         h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
6392
6393         /* Update the field, and then ring the doorbell */
6394         writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
6395         writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
6396         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
6397         hpsa_wait_for_mode_change_ack(h);
6398         print_cfg_table(&h->pdev->dev, h->cfgtable);
6399         if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
6400                 goto error;
6401         h->transMethod = CFGTBL_Trans_Simple;
6402         return 0;
6403 error:
6404         dev_warn(&h->pdev->dev, "unable to get board into simple mode\n");
6405         return -ENODEV;
6406 }
6407
6408 static int hpsa_pci_init(struct ctlr_info *h)
6409 {
6410         int prod_index, err;
6411
6412         prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
6413         if (prod_index < 0)
6414                 return -ENODEV;
6415         h->product_name = products[prod_index].product_name;
6416         h->access = *(products[prod_index].access);
6417
6418         pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
6419                                PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
6420
6421         err = pci_enable_device(h->pdev);
6422         if (err) {
6423                 dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
6424                 return err;
6425         }
6426
6427         /* Enable bus mastering (pci_disable_device may disable this) */
6428         pci_set_master(h->pdev);
6429
6430         err = pci_request_regions(h->pdev, HPSA);
6431         if (err) {
6432                 dev_err(&h->pdev->dev,
6433                         "cannot obtain PCI resources, aborting\n");
6434                 return err;
6435         }
6436         hpsa_interrupt_mode(h);
6437         err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
6438         if (err)
6439                 goto err_out_free_res;
6440         h->vaddr = remap_pci_mem(h->paddr, 0x250);
6441         if (!h->vaddr) {
6442                 err = -ENOMEM;
6443                 goto err_out_free_res;
6444         }
6445         err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
6446         if (err)
6447                 goto err_out_free_res;
6448         err = hpsa_find_cfgtables(h);
6449         if (err)
6450                 goto err_out_free_res;
6451         hpsa_find_board_params(h);
6452
6453         if (!hpsa_CISS_signature_present(h)) {
6454                 err = -ENODEV;
6455                 goto err_out_free_res;
6456         }
6457         hpsa_set_driver_support_bits(h);
6458         hpsa_p600_dma_prefetch_quirk(h);
6459         err = hpsa_enter_simple_mode(h);
6460         if (err)
6461                 goto err_out_free_res;
6462         return 0;
6463
6464 err_out_free_res:
6465         if (h->transtable)
6466                 iounmap(h->transtable);
6467         if (h->cfgtable)
6468                 iounmap(h->cfgtable);
6469         if (h->vaddr)
6470                 iounmap(h->vaddr);
6471         pci_disable_device(h->pdev);
6472         pci_release_regions(h->pdev);
6473         return err;
6474 }
6475
6476 static void hpsa_hba_inquiry(struct ctlr_info *h)
6477 {
6478         int rc;
6479
6480 #define HBA_INQUIRY_BYTE_COUNT 64
6481         h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
6482         if (!h->hba_inquiry_data)
6483                 return;
6484         rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
6485                 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
6486         if (rc != 0) {
6487                 kfree(h->hba_inquiry_data);
6488                 h->hba_inquiry_data = NULL;
6489         }
6490 }
6491
6492 static int hpsa_init_reset_devices(struct pci_dev *pdev)
6493 {
6494         int rc, i;
6495
6496         if (!reset_devices)
6497                 return 0;
6498
6499         /* kdump kernel is loading, we don't know in which state is
6500          * the pci interface. The dev->enable_cnt is equal zero
6501          * so we call enable+disable, wait a while and switch it on.
6502          */
6503         rc = pci_enable_device(pdev);
6504         if (rc) {
6505                 dev_warn(&pdev->dev, "Failed to enable PCI device\n");
6506                 return -ENODEV;
6507         }
6508         pci_disable_device(pdev);
6509         msleep(260);                    /* a randomly chosen number */
6510         rc = pci_enable_device(pdev);
6511         if (rc) {
6512                 dev_warn(&pdev->dev, "failed to enable device.\n");
6513                 return -ENODEV;
6514         }
6515         pci_set_master(pdev);
6516         /* Reset the controller with a PCI power-cycle or via doorbell */
6517         rc = hpsa_kdump_hard_reset_controller(pdev);
6518
6519         /* -ENOTSUPP here means we cannot reset the controller
6520          * but it's already (and still) up and running in
6521          * "performant mode".  Or, it might be 640x, which can't reset
6522          * due to concerns about shared bbwc between 6402/6404 pair.
6523          */
6524         if (rc) {
6525                 if (rc != -ENOTSUPP) /* just try to do the kdump anyhow. */
6526                         rc = -ENODEV;
6527                 goto out_disable;
6528         }
6529
6530         /* Now try to get the controller to respond to a no-op */
6531         dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
6532         for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
6533                 if (hpsa_noop(pdev) == 0)
6534                         break;
6535                 else
6536                         dev_warn(&pdev->dev, "no-op failed%s\n",
6537                                         (i < 11 ? "; re-trying" : ""));
6538         }
6539
6540 out_disable:
6541
6542         pci_disable_device(pdev);
6543         return rc;
6544 }
6545
6546 static int hpsa_allocate_cmd_pool(struct ctlr_info *h)
6547 {
6548         h->cmd_pool_bits = kzalloc(
6549                 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
6550                 sizeof(unsigned long), GFP_KERNEL);
6551         h->cmd_pool = pci_alloc_consistent(h->pdev,
6552                     h->nr_cmds * sizeof(*h->cmd_pool),
6553                     &(h->cmd_pool_dhandle));
6554         h->errinfo_pool = pci_alloc_consistent(h->pdev,
6555                     h->nr_cmds * sizeof(*h->errinfo_pool),
6556                     &(h->errinfo_pool_dhandle));
6557         if ((h->cmd_pool_bits == NULL)
6558             || (h->cmd_pool == NULL)
6559             || (h->errinfo_pool == NULL)) {
6560                 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
6561                 return -ENOMEM;
6562         }
6563         return 0;
6564 }
6565
6566 static void hpsa_free_cmd_pool(struct ctlr_info *h)
6567 {
6568         kfree(h->cmd_pool_bits);
6569         if (h->cmd_pool)
6570                 pci_free_consistent(h->pdev,
6571                             h->nr_cmds * sizeof(struct CommandList),
6572                             h->cmd_pool, h->cmd_pool_dhandle);
6573         if (h->ioaccel2_cmd_pool)
6574                 pci_free_consistent(h->pdev,
6575                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
6576                         h->ioaccel2_cmd_pool, h->ioaccel2_cmd_pool_dhandle);
6577         if (h->errinfo_pool)
6578                 pci_free_consistent(h->pdev,
6579                             h->nr_cmds * sizeof(struct ErrorInfo),
6580                             h->errinfo_pool,
6581                             h->errinfo_pool_dhandle);
6582         if (h->ioaccel_cmd_pool)
6583                 pci_free_consistent(h->pdev,
6584                         h->nr_cmds * sizeof(struct io_accel1_cmd),
6585                         h->ioaccel_cmd_pool, h->ioaccel_cmd_pool_dhandle);
6586 }
6587
6588 static void hpsa_irq_affinity_hints(struct ctlr_info *h)
6589 {
6590         int i, cpu, rc;
6591
6592         cpu = cpumask_first(cpu_online_mask);
6593         for (i = 0; i < h->msix_vector; i++) {
6594                 rc = irq_set_affinity_hint(h->intr[i], get_cpu_mask(cpu));
6595                 cpu = cpumask_next(cpu, cpu_online_mask);
6596         }
6597 }
6598
6599 static int hpsa_request_irq(struct ctlr_info *h,
6600         irqreturn_t (*msixhandler)(int, void *),
6601         irqreturn_t (*intxhandler)(int, void *))
6602 {
6603         int rc, i;
6604
6605         /*
6606          * initialize h->q[x] = x so that interrupt handlers know which
6607          * queue to process.
6608          */
6609         for (i = 0; i < MAX_REPLY_QUEUES; i++)
6610                 h->q[i] = (u8) i;
6611
6612         if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) {
6613                 /* If performant mode and MSI-X, use multiple reply queues */
6614                 for (i = 0; i < h->msix_vector; i++)
6615                         rc = request_irq(h->intr[i], msixhandler,
6616                                         0, h->devname,
6617                                         &h->q[i]);
6618                 hpsa_irq_affinity_hints(h);
6619         } else {
6620                 /* Use single reply pool */
6621                 if (h->msix_vector > 0 || h->msi_vector) {
6622                         rc = request_irq(h->intr[h->intr_mode],
6623                                 msixhandler, 0, h->devname,
6624                                 &h->q[h->intr_mode]);
6625                 } else {
6626                         rc = request_irq(h->intr[h->intr_mode],
6627                                 intxhandler, IRQF_SHARED, h->devname,
6628                                 &h->q[h->intr_mode]);
6629                 }
6630         }
6631         if (rc) {
6632                 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
6633                        h->intr[h->intr_mode], h->devname);
6634                 return -ENODEV;
6635         }
6636         return 0;
6637 }
6638
6639 static int hpsa_kdump_soft_reset(struct ctlr_info *h)
6640 {
6641         if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
6642                 HPSA_RESET_TYPE_CONTROLLER)) {
6643                 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
6644                 return -EIO;
6645         }
6646
6647         dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
6648         if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
6649                 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
6650                 return -1;
6651         }
6652
6653         dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
6654         if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
6655                 dev_warn(&h->pdev->dev, "Board failed to become ready "
6656                         "after soft reset.\n");
6657                 return -1;
6658         }
6659
6660         return 0;
6661 }
6662
6663 static void free_irqs(struct ctlr_info *h)
6664 {
6665         int i;
6666
6667         if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
6668                 /* Single reply queue, only one irq to free */
6669                 i = h->intr_mode;
6670                 irq_set_affinity_hint(h->intr[i], NULL);
6671                 free_irq(h->intr[i], &h->q[i]);
6672                 return;
6673         }
6674
6675         for (i = 0; i < h->msix_vector; i++) {
6676                 irq_set_affinity_hint(h->intr[i], NULL);
6677                 free_irq(h->intr[i], &h->q[i]);
6678         }
6679 }
6680
6681 static void hpsa_free_irqs_and_disable_msix(struct ctlr_info *h)
6682 {
6683         free_irqs(h);
6684 #ifdef CONFIG_PCI_MSI
6685         if (h->msix_vector) {
6686                 if (h->pdev->msix_enabled)
6687                         pci_disable_msix(h->pdev);
6688         } else if (h->msi_vector) {
6689                 if (h->pdev->msi_enabled)
6690                         pci_disable_msi(h->pdev);
6691         }
6692 #endif /* CONFIG_PCI_MSI */
6693 }
6694
6695 static void hpsa_free_reply_queues(struct ctlr_info *h)
6696 {
6697         int i;
6698
6699         for (i = 0; i < h->nreply_queues; i++) {
6700                 if (!h->reply_queue[i].head)
6701                         continue;
6702                 pci_free_consistent(h->pdev, h->reply_queue_size,
6703                         h->reply_queue[i].head, h->reply_queue[i].busaddr);
6704                 h->reply_queue[i].head = NULL;
6705                 h->reply_queue[i].busaddr = 0;
6706         }
6707 }
6708
6709 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
6710 {
6711         hpsa_free_irqs_and_disable_msix(h);
6712         hpsa_free_sg_chain_blocks(h);
6713         hpsa_free_cmd_pool(h);
6714         kfree(h->ioaccel1_blockFetchTable);
6715         kfree(h->blockFetchTable);
6716         hpsa_free_reply_queues(h);
6717         if (h->vaddr)
6718                 iounmap(h->vaddr);
6719         if (h->transtable)
6720                 iounmap(h->transtable);
6721         if (h->cfgtable)
6722                 iounmap(h->cfgtable);
6723         pci_disable_device(h->pdev);
6724         pci_release_regions(h->pdev);
6725         kfree(h);
6726 }
6727
6728 /* Called when controller lockup detected. */
6729 static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list)
6730 {
6731         struct CommandList *c = NULL;
6732
6733         assert_spin_locked(&h->lock);
6734         /* Mark all outstanding commands as failed and complete them. */
6735         while (!list_empty(list)) {
6736                 c = list_entry(list->next, struct CommandList, list);
6737                 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
6738                 finish_cmd(c);
6739         }
6740 }
6741
6742 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
6743 {
6744         int i, cpu;
6745
6746         cpu = cpumask_first(cpu_online_mask);
6747         for (i = 0; i < num_online_cpus(); i++) {
6748                 u32 *lockup_detected;
6749                 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
6750                 *lockup_detected = value;
6751                 cpu = cpumask_next(cpu, cpu_online_mask);
6752         }
6753         wmb(); /* be sure the per-cpu variables are out to memory */
6754 }
6755
6756 static void controller_lockup_detected(struct ctlr_info *h)
6757 {
6758         unsigned long flags;
6759         u32 lockup_detected;
6760
6761         h->access.set_intr_mask(h, HPSA_INTR_OFF);
6762         spin_lock_irqsave(&h->lock, flags);
6763         lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
6764         if (!lockup_detected) {
6765                 /* no heartbeat, but controller gave us a zero. */
6766                 dev_warn(&h->pdev->dev,
6767                         "lockup detected but scratchpad register is zero\n");
6768                 lockup_detected = 0xffffffff;
6769         }
6770         set_lockup_detected_for_all_cpus(h, lockup_detected);
6771         spin_unlock_irqrestore(&h->lock, flags);
6772         dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n",
6773                         lockup_detected);
6774         pci_disable_device(h->pdev);
6775         spin_lock_irqsave(&h->lock, flags);
6776         fail_all_cmds_on_list(h, &h->cmpQ);
6777         fail_all_cmds_on_list(h, &h->reqQ);
6778         spin_unlock_irqrestore(&h->lock, flags);
6779 }
6780
6781 static void detect_controller_lockup(struct ctlr_info *h)
6782 {
6783         u64 now;
6784         u32 heartbeat;
6785         unsigned long flags;
6786
6787         now = get_jiffies_64();
6788         /* If we've received an interrupt recently, we're ok. */
6789         if (time_after64(h->last_intr_timestamp +
6790                                 (h->heartbeat_sample_interval), now))
6791                 return;
6792
6793         /*
6794          * If we've already checked the heartbeat recently, we're ok.
6795          * This could happen if someone sends us a signal. We
6796          * otherwise don't care about signals in this thread.
6797          */
6798         if (time_after64(h->last_heartbeat_timestamp +
6799                                 (h->heartbeat_sample_interval), now))
6800                 return;
6801
6802         /* If heartbeat has not changed since we last looked, we're not ok. */
6803         spin_lock_irqsave(&h->lock, flags);
6804         heartbeat = readl(&h->cfgtable->HeartBeat);
6805         spin_unlock_irqrestore(&h->lock, flags);
6806         if (h->last_heartbeat == heartbeat) {
6807                 controller_lockup_detected(h);
6808                 return;
6809         }
6810
6811         /* We're ok. */
6812         h->last_heartbeat = heartbeat;
6813         h->last_heartbeat_timestamp = now;
6814 }
6815
6816 static void hpsa_ack_ctlr_events(struct ctlr_info *h)
6817 {
6818         int i;
6819         char *event_type;
6820
6821         /* Clear the driver-requested rescan flag */
6822         h->drv_req_rescan = 0;
6823
6824         /* Ask the controller to clear the events we're handling. */
6825         if ((h->transMethod & (CFGTBL_Trans_io_accel1
6826                         | CFGTBL_Trans_io_accel2)) &&
6827                 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
6828                  h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
6829
6830                 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
6831                         event_type = "state change";
6832                 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
6833                         event_type = "configuration change";
6834                 /* Stop sending new RAID offload reqs via the IO accelerator */
6835                 scsi_block_requests(h->scsi_host);
6836                 for (i = 0; i < h->ndevices; i++)
6837                         h->dev[i]->offload_enabled = 0;
6838                 hpsa_drain_accel_commands(h);
6839                 /* Set 'accelerator path config change' bit */
6840                 dev_warn(&h->pdev->dev,
6841                         "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
6842                         h->events, event_type);
6843                 writel(h->events, &(h->cfgtable->clear_event_notify));
6844                 /* Set the "clear event notify field update" bit 6 */
6845                 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
6846                 /* Wait until ctlr clears 'clear event notify field', bit 6 */
6847                 hpsa_wait_for_clear_event_notify_ack(h);
6848                 scsi_unblock_requests(h->scsi_host);
6849         } else {
6850                 /* Acknowledge controller notification events. */
6851                 writel(h->events, &(h->cfgtable->clear_event_notify));
6852                 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
6853                 hpsa_wait_for_clear_event_notify_ack(h);
6854 #if 0
6855                 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
6856                 hpsa_wait_for_mode_change_ack(h);
6857 #endif
6858         }
6859         return;
6860 }
6861
6862 /* Check a register on the controller to see if there are configuration
6863  * changes (added/changed/removed logical drives, etc.) which mean that
6864  * we should rescan the controller for devices.
6865  * Also check flag for driver-initiated rescan.
6866  */
6867 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
6868 {
6869         if (h->drv_req_rescan)
6870                 return 1;
6871
6872         if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
6873                 return 0;
6874
6875         h->events = readl(&(h->cfgtable->event_notify));
6876         return h->events & RESCAN_REQUIRED_EVENT_BITS;
6877 }
6878
6879 /*
6880  * Check if any of the offline devices have become ready
6881  */
6882 static int hpsa_offline_devices_ready(struct ctlr_info *h)
6883 {
6884         unsigned long flags;
6885         struct offline_device_entry *d;
6886         struct list_head *this, *tmp;
6887
6888         spin_lock_irqsave(&h->offline_device_lock, flags);
6889         list_for_each_safe(this, tmp, &h->offline_device_list) {
6890                 d = list_entry(this, struct offline_device_entry,
6891                                 offline_list);
6892                 spin_unlock_irqrestore(&h->offline_device_lock, flags);
6893                 if (!hpsa_volume_offline(h, d->scsi3addr)) {
6894                         spin_lock_irqsave(&h->offline_device_lock, flags);
6895                         list_del(&d->offline_list);
6896                         spin_unlock_irqrestore(&h->offline_device_lock, flags);
6897                         return 1;
6898                 }
6899                 spin_lock_irqsave(&h->offline_device_lock, flags);
6900         }
6901         spin_unlock_irqrestore(&h->offline_device_lock, flags);
6902         return 0;
6903 }
6904
6905
6906 static void hpsa_monitor_ctlr_worker(struct work_struct *work)
6907 {
6908         unsigned long flags;
6909         struct ctlr_info *h = container_of(to_delayed_work(work),
6910                                         struct ctlr_info, monitor_ctlr_work);
6911         detect_controller_lockup(h);
6912         if (lockup_detected(h))
6913                 return;
6914
6915         if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) {
6916                 scsi_host_get(h->scsi_host);
6917                 h->drv_req_rescan = 0;
6918                 hpsa_ack_ctlr_events(h);
6919                 hpsa_scan_start(h->scsi_host);
6920                 scsi_host_put(h->scsi_host);
6921         }
6922
6923         spin_lock_irqsave(&h->lock, flags);
6924         if (h->remove_in_progress) {
6925                 spin_unlock_irqrestore(&h->lock, flags);
6926                 return;
6927         }
6928         schedule_delayed_work(&h->monitor_ctlr_work,
6929                                 h->heartbeat_sample_interval);
6930         spin_unlock_irqrestore(&h->lock, flags);
6931 }
6932
6933 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
6934 {
6935         int dac, rc;
6936         struct ctlr_info *h;
6937         int try_soft_reset = 0;
6938         unsigned long flags;
6939
6940         if (number_of_controllers == 0)
6941                 printk(KERN_INFO DRIVER_NAME "\n");
6942
6943         rc = hpsa_init_reset_devices(pdev);
6944         if (rc) {
6945                 if (rc != -ENOTSUPP)
6946                         return rc;
6947                 /* If the reset fails in a particular way (it has no way to do
6948                  * a proper hard reset, so returns -ENOTSUPP) we can try to do
6949                  * a soft reset once we get the controller configured up to the
6950                  * point that it can accept a command.
6951                  */
6952                 try_soft_reset = 1;
6953                 rc = 0;
6954         }
6955
6956 reinit_after_soft_reset:
6957
6958         /* Command structures must be aligned on a 32-byte boundary because
6959          * the 5 lower bits of the address are used by the hardware. and by
6960          * the driver.  See comments in hpsa.h for more info.
6961          */
6962         BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
6963         h = kzalloc(sizeof(*h), GFP_KERNEL);
6964         if (!h)
6965                 return -ENOMEM;
6966
6967         h->pdev = pdev;
6968         h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
6969         INIT_LIST_HEAD(&h->cmpQ);
6970         INIT_LIST_HEAD(&h->reqQ);
6971         INIT_LIST_HEAD(&h->offline_device_list);
6972         spin_lock_init(&h->lock);
6973         spin_lock_init(&h->offline_device_lock);
6974         spin_lock_init(&h->scan_lock);
6975         spin_lock_init(&h->passthru_count_lock);
6976
6977         /* Allocate and clear per-cpu variable lockup_detected */
6978         h->lockup_detected = alloc_percpu(u32);
6979         if (!h->lockup_detected) {
6980                 rc = -ENOMEM;
6981                 goto clean1;
6982         }
6983         set_lockup_detected_for_all_cpus(h, 0);
6984
6985         rc = hpsa_pci_init(h);
6986         if (rc != 0)
6987                 goto clean1;
6988
6989         sprintf(h->devname, HPSA "%d", number_of_controllers);
6990         h->ctlr = number_of_controllers;
6991         number_of_controllers++;
6992
6993         /* configure PCI DMA stuff */
6994         rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
6995         if (rc == 0) {
6996                 dac = 1;
6997         } else {
6998                 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
6999                 if (rc == 0) {
7000                         dac = 0;
7001                 } else {
7002                         dev_err(&pdev->dev, "no suitable DMA available\n");
7003                         goto clean1;
7004                 }
7005         }
7006
7007         /* make sure the board interrupts are off */
7008         h->access.set_intr_mask(h, HPSA_INTR_OFF);
7009
7010         if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
7011                 goto clean2;
7012         dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
7013                h->devname, pdev->device,
7014                h->intr[h->intr_mode], dac ? "" : " not");
7015         if (hpsa_allocate_cmd_pool(h))
7016                 goto clean4;
7017         if (hpsa_allocate_sg_chain_blocks(h))
7018                 goto clean4;
7019         init_waitqueue_head(&h->scan_wait_queue);
7020         h->scan_finished = 1; /* no scan currently in progress */
7021
7022         pci_set_drvdata(pdev, h);
7023         h->ndevices = 0;
7024         h->hba_mode_enabled = 0;
7025         h->scsi_host = NULL;
7026         spin_lock_init(&h->devlock);
7027         hpsa_put_ctlr_into_performant_mode(h);
7028
7029         /* At this point, the controller is ready to take commands.
7030          * Now, if reset_devices and the hard reset didn't work, try
7031          * the soft reset and see if that works.
7032          */
7033         if (try_soft_reset) {
7034
7035                 /* This is kind of gross.  We may or may not get a completion
7036                  * from the soft reset command, and if we do, then the value
7037                  * from the fifo may or may not be valid.  So, we wait 10 secs
7038                  * after the reset throwing away any completions we get during
7039                  * that time.  Unregister the interrupt handler and register
7040                  * fake ones to scoop up any residual completions.
7041                  */
7042                 spin_lock_irqsave(&h->lock, flags);
7043                 h->access.set_intr_mask(h, HPSA_INTR_OFF);
7044                 spin_unlock_irqrestore(&h->lock, flags);
7045                 free_irqs(h);
7046                 rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
7047                                         hpsa_intx_discard_completions);
7048                 if (rc) {
7049                         dev_warn(&h->pdev->dev, "Failed to request_irq after "
7050                                 "soft reset.\n");
7051                         goto clean4;
7052                 }
7053
7054                 rc = hpsa_kdump_soft_reset(h);
7055                 if (rc)
7056                         /* Neither hard nor soft reset worked, we're hosed. */
7057                         goto clean4;
7058
7059                 dev_info(&h->pdev->dev, "Board READY.\n");
7060                 dev_info(&h->pdev->dev,
7061                         "Waiting for stale completions to drain.\n");
7062                 h->access.set_intr_mask(h, HPSA_INTR_ON);
7063                 msleep(10000);
7064                 h->access.set_intr_mask(h, HPSA_INTR_OFF);
7065
7066                 rc = controller_reset_failed(h->cfgtable);
7067                 if (rc)
7068                         dev_info(&h->pdev->dev,
7069                                 "Soft reset appears to have failed.\n");
7070
7071                 /* since the controller's reset, we have to go back and re-init
7072                  * everything.  Easiest to just forget what we've done and do it
7073                  * all over again.
7074                  */
7075                 hpsa_undo_allocations_after_kdump_soft_reset(h);
7076                 try_soft_reset = 0;
7077                 if (rc)
7078                         /* don't go to clean4, we already unallocated */
7079                         return -ENODEV;
7080
7081                 goto reinit_after_soft_reset;
7082         }
7083
7084                 /* Enable Accelerated IO path at driver layer */
7085                 h->acciopath_status = 1;
7086
7087         h->drv_req_rescan = 0;
7088
7089         /* Turn the interrupts on so we can service requests */
7090         h->access.set_intr_mask(h, HPSA_INTR_ON);
7091
7092         hpsa_hba_inquiry(h);
7093         hpsa_register_scsi(h);  /* hook ourselves into SCSI subsystem */
7094
7095         /* Monitor the controller for firmware lockups */
7096         h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
7097         INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
7098         schedule_delayed_work(&h->monitor_ctlr_work,
7099                                 h->heartbeat_sample_interval);
7100         return 0;
7101
7102 clean4:
7103         hpsa_free_sg_chain_blocks(h);
7104         hpsa_free_cmd_pool(h);
7105         free_irqs(h);
7106 clean2:
7107 clean1:
7108         if (h->lockup_detected)
7109                 free_percpu(h->lockup_detected);
7110         kfree(h);
7111         return rc;
7112 }
7113
7114 static void hpsa_flush_cache(struct ctlr_info *h)
7115 {
7116         char *flush_buf;
7117         struct CommandList *c;
7118
7119         /* Don't bother trying to flush the cache if locked up */
7120         if (unlikely(lockup_detected(h)))
7121                 return;
7122         flush_buf = kzalloc(4, GFP_KERNEL);
7123         if (!flush_buf)
7124                 return;
7125
7126         c = cmd_special_alloc(h);
7127         if (!c) {
7128                 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
7129                 goto out_of_memory;
7130         }
7131         if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
7132                 RAID_CTLR_LUNID, TYPE_CMD)) {
7133                 goto out;
7134         }
7135         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
7136         if (c->err_info->CommandStatus != 0)
7137 out:
7138                 dev_warn(&h->pdev->dev,
7139                         "error flushing cache on controller\n");
7140         cmd_special_free(h, c);
7141 out_of_memory:
7142         kfree(flush_buf);
7143 }
7144
7145 static void hpsa_shutdown(struct pci_dev *pdev)
7146 {
7147         struct ctlr_info *h;
7148
7149         h = pci_get_drvdata(pdev);
7150         /* Turn board interrupts off  and send the flush cache command
7151          * sendcmd will turn off interrupt, and send the flush...
7152          * To write all data in the battery backed cache to disks
7153          */
7154         hpsa_flush_cache(h);
7155         h->access.set_intr_mask(h, HPSA_INTR_OFF);
7156         hpsa_free_irqs_and_disable_msix(h);
7157 }
7158
7159 static void hpsa_free_device_info(struct ctlr_info *h)
7160 {
7161         int i;
7162
7163         for (i = 0; i < h->ndevices; i++)
7164                 kfree(h->dev[i]);
7165 }
7166
7167 static void hpsa_remove_one(struct pci_dev *pdev)
7168 {
7169         struct ctlr_info *h;
7170         unsigned long flags;
7171
7172         if (pci_get_drvdata(pdev) == NULL) {
7173                 dev_err(&pdev->dev, "unable to remove device\n");
7174                 return;
7175         }
7176         h = pci_get_drvdata(pdev);
7177
7178         /* Get rid of any controller monitoring work items */
7179         spin_lock_irqsave(&h->lock, flags);
7180         h->remove_in_progress = 1;
7181         cancel_delayed_work(&h->monitor_ctlr_work);
7182         spin_unlock_irqrestore(&h->lock, flags);
7183
7184         hpsa_unregister_scsi(h);        /* unhook from SCSI subsystem */
7185         hpsa_shutdown(pdev);
7186         iounmap(h->vaddr);
7187         iounmap(h->transtable);
7188         iounmap(h->cfgtable);
7189         hpsa_free_device_info(h);
7190         hpsa_free_sg_chain_blocks(h);
7191         pci_free_consistent(h->pdev,
7192                 h->nr_cmds * sizeof(struct CommandList),
7193                 h->cmd_pool, h->cmd_pool_dhandle);
7194         pci_free_consistent(h->pdev,
7195                 h->nr_cmds * sizeof(struct ErrorInfo),
7196                 h->errinfo_pool, h->errinfo_pool_dhandle);
7197         hpsa_free_reply_queues(h);
7198         kfree(h->cmd_pool_bits);
7199         kfree(h->blockFetchTable);
7200         kfree(h->ioaccel1_blockFetchTable);
7201         kfree(h->ioaccel2_blockFetchTable);
7202         kfree(h->hba_inquiry_data);
7203         pci_disable_device(pdev);
7204         pci_release_regions(pdev);
7205         free_percpu(h->lockup_detected);
7206         kfree(h);
7207 }
7208
7209 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
7210         __attribute__((unused)) pm_message_t state)
7211 {
7212         return -ENOSYS;
7213 }
7214
7215 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
7216 {
7217         return -ENOSYS;
7218 }
7219
7220 static struct pci_driver hpsa_pci_driver = {
7221         .name = HPSA,
7222         .probe = hpsa_init_one,
7223         .remove = hpsa_remove_one,
7224         .id_table = hpsa_pci_device_id, /* id_table */
7225         .shutdown = hpsa_shutdown,
7226         .suspend = hpsa_suspend,
7227         .resume = hpsa_resume,
7228 };
7229
7230 /* Fill in bucket_map[], given nsgs (the max number of
7231  * scatter gather elements supported) and bucket[],
7232  * which is an array of 8 integers.  The bucket[] array
7233  * contains 8 different DMA transfer sizes (in 16
7234  * byte increments) which the controller uses to fetch
7235  * commands.  This function fills in bucket_map[], which
7236  * maps a given number of scatter gather elements to one of
7237  * the 8 DMA transfer sizes.  The point of it is to allow the
7238  * controller to only do as much DMA as needed to fetch the
7239  * command, with the DMA transfer size encoded in the lower
7240  * bits of the command address.
7241  */
7242 static void  calc_bucket_map(int bucket[], int num_buckets,
7243         int nsgs, int min_blocks, int *bucket_map)
7244 {
7245         int i, j, b, size;
7246
7247         /* Note, bucket_map must have nsgs+1 entries. */
7248         for (i = 0; i <= nsgs; i++) {
7249                 /* Compute size of a command with i SG entries */
7250                 size = i + min_blocks;
7251                 b = num_buckets; /* Assume the biggest bucket */
7252                 /* Find the bucket that is just big enough */
7253                 for (j = 0; j < num_buckets; j++) {
7254                         if (bucket[j] >= size) {
7255                                 b = j;
7256                                 break;
7257                         }
7258                 }
7259                 /* for a command with i SG entries, use bucket b. */
7260                 bucket_map[i] = b;
7261         }
7262 }
7263
7264 static void hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
7265 {
7266         int i;
7267         unsigned long register_value;
7268         unsigned long transMethod = CFGTBL_Trans_Performant |
7269                         (trans_support & CFGTBL_Trans_use_short_tags) |
7270                                 CFGTBL_Trans_enable_directed_msix |
7271                         (trans_support & (CFGTBL_Trans_io_accel1 |
7272                                 CFGTBL_Trans_io_accel2));
7273         struct access_method access = SA5_performant_access;
7274
7275         /* This is a bit complicated.  There are 8 registers on
7276          * the controller which we write to to tell it 8 different
7277          * sizes of commands which there may be.  It's a way of
7278          * reducing the DMA done to fetch each command.  Encoded into
7279          * each command's tag are 3 bits which communicate to the controller
7280          * which of the eight sizes that command fits within.  The size of
7281          * each command depends on how many scatter gather entries there are.
7282          * Each SG entry requires 16 bytes.  The eight registers are programmed
7283          * with the number of 16-byte blocks a command of that size requires.
7284          * The smallest command possible requires 5 such 16 byte blocks.
7285          * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
7286          * blocks.  Note, this only extends to the SG entries contained
7287          * within the command block, and does not extend to chained blocks
7288          * of SG elements.   bft[] contains the eight values we write to
7289          * the registers.  They are not evenly distributed, but have more
7290          * sizes for small commands, and fewer sizes for larger commands.
7291          */
7292         int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
7293 #define MIN_IOACCEL2_BFT_ENTRY 5
7294 #define HPSA_IOACCEL2_HEADER_SZ 4
7295         int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
7296                         13, 14, 15, 16, 17, 18, 19,
7297                         HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
7298         BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
7299         BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
7300         BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
7301                                  16 * MIN_IOACCEL2_BFT_ENTRY);
7302         BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
7303         BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
7304         /*  5 = 1 s/g entry or 4k
7305          *  6 = 2 s/g entry or 8k
7306          *  8 = 4 s/g entry or 16k
7307          * 10 = 6 s/g entry or 24k
7308          */
7309
7310         /* If the controller supports either ioaccel method then
7311          * we can also use the RAID stack submit path that does not
7312          * perform the superfluous readl() after each command submission.
7313          */
7314         if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
7315                 access = SA5_performant_access_no_read;
7316
7317         /* Controller spec: zero out this buffer. */
7318         for (i = 0; i < h->nreply_queues; i++)
7319                 memset(h->reply_queue[i].head, 0, h->reply_queue_size);
7320
7321         bft[7] = SG_ENTRIES_IN_CMD + 4;
7322         calc_bucket_map(bft, ARRAY_SIZE(bft),
7323                                 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
7324         for (i = 0; i < 8; i++)
7325                 writel(bft[i], &h->transtable->BlockFetch[i]);
7326
7327         /* size of controller ring buffer */
7328         writel(h->max_commands, &h->transtable->RepQSize);
7329         writel(h->nreply_queues, &h->transtable->RepQCount);
7330         writel(0, &h->transtable->RepQCtrAddrLow32);
7331         writel(0, &h->transtable->RepQCtrAddrHigh32);
7332
7333         for (i = 0; i < h->nreply_queues; i++) {
7334                 writel(0, &h->transtable->RepQAddr[i].upper);
7335                 writel(h->reply_queue[i].busaddr,
7336                         &h->transtable->RepQAddr[i].lower);
7337         }
7338
7339         writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
7340         writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
7341         /*
7342          * enable outbound interrupt coalescing in accelerator mode;
7343          */
7344         if (trans_support & CFGTBL_Trans_io_accel1) {
7345                 access = SA5_ioaccel_mode1_access;
7346                 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
7347                 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
7348         } else {
7349                 if (trans_support & CFGTBL_Trans_io_accel2) {
7350                         access = SA5_ioaccel_mode2_access;
7351                         writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
7352                         writel(4, &h->cfgtable->HostWrite.CoalIntCount);
7353                 }
7354         }
7355         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7356         hpsa_wait_for_mode_change_ack(h);
7357         register_value = readl(&(h->cfgtable->TransportActive));
7358         if (!(register_value & CFGTBL_Trans_Performant)) {
7359                 dev_warn(&h->pdev->dev, "unable to get board into"
7360                                         " performant mode\n");
7361                 return;
7362         }
7363         /* Change the access methods to the performant access methods */
7364         h->access = access;
7365         h->transMethod = transMethod;
7366
7367         if (!((trans_support & CFGTBL_Trans_io_accel1) ||
7368                 (trans_support & CFGTBL_Trans_io_accel2)))
7369                 return;
7370
7371         if (trans_support & CFGTBL_Trans_io_accel1) {
7372                 /* Set up I/O accelerator mode */
7373                 for (i = 0; i < h->nreply_queues; i++) {
7374                         writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
7375                         h->reply_queue[i].current_entry =
7376                                 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
7377                 }
7378                 bft[7] = h->ioaccel_maxsg + 8;
7379                 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
7380                                 h->ioaccel1_blockFetchTable);
7381
7382                 /* initialize all reply queue entries to unused */
7383                 for (i = 0; i < h->nreply_queues; i++)
7384                         memset(h->reply_queue[i].head,
7385                                 (u8) IOACCEL_MODE1_REPLY_UNUSED,
7386                                 h->reply_queue_size);
7387
7388                 /* set all the constant fields in the accelerator command
7389                  * frames once at init time to save CPU cycles later.
7390                  */
7391                 for (i = 0; i < h->nr_cmds; i++) {
7392                         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
7393
7394                         cp->function = IOACCEL1_FUNCTION_SCSIIO;
7395                         cp->err_info = (u32) (h->errinfo_pool_dhandle +
7396                                         (i * sizeof(struct ErrorInfo)));
7397                         cp->err_info_len = sizeof(struct ErrorInfo);
7398                         cp->sgl_offset = IOACCEL1_SGLOFFSET;
7399                         cp->host_context_flags = IOACCEL1_HCFLAGS_CISS_FORMAT;
7400                         cp->timeout_sec = 0;
7401                         cp->ReplyQueue = 0;
7402                         cp->tag =
7403                                 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT) |
7404                                                 DIRECT_LOOKUP_BIT);
7405                         cp->host_addr =
7406                                 cpu_to_le64(h->ioaccel_cmd_pool_dhandle +
7407                                         (i * sizeof(struct io_accel1_cmd)));
7408                 }
7409         } else if (trans_support & CFGTBL_Trans_io_accel2) {
7410                 u64 cfg_offset, cfg_base_addr_index;
7411                 u32 bft2_offset, cfg_base_addr;
7412                 int rc;
7413
7414                 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7415                         &cfg_base_addr_index, &cfg_offset);
7416                 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
7417                 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
7418                 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
7419                                 4, h->ioaccel2_blockFetchTable);
7420                 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
7421                 BUILD_BUG_ON(offsetof(struct CfgTable,
7422                                 io_accel_request_size_offset) != 0xb8);
7423                 h->ioaccel2_bft2_regs =
7424                         remap_pci_mem(pci_resource_start(h->pdev,
7425                                         cfg_base_addr_index) +
7426                                         cfg_offset + bft2_offset,
7427                                         ARRAY_SIZE(bft2) *
7428                                         sizeof(*h->ioaccel2_bft2_regs));
7429                 for (i = 0; i < ARRAY_SIZE(bft2); i++)
7430                         writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
7431         }
7432         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7433         hpsa_wait_for_mode_change_ack(h);
7434 }
7435
7436 static int hpsa_alloc_ioaccel_cmd_and_bft(struct ctlr_info *h)
7437 {
7438         h->ioaccel_maxsg =
7439                 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
7440         if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
7441                 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
7442
7443         /* Command structures must be aligned on a 128-byte boundary
7444          * because the 7 lower bits of the address are used by the
7445          * hardware.
7446          */
7447         BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
7448                         IOACCEL1_COMMANDLIST_ALIGNMENT);
7449         h->ioaccel_cmd_pool =
7450                 pci_alloc_consistent(h->pdev,
7451                         h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
7452                         &(h->ioaccel_cmd_pool_dhandle));
7453
7454         h->ioaccel1_blockFetchTable =
7455                 kmalloc(((h->ioaccel_maxsg + 1) *
7456                                 sizeof(u32)), GFP_KERNEL);
7457
7458         if ((h->ioaccel_cmd_pool == NULL) ||
7459                 (h->ioaccel1_blockFetchTable == NULL))
7460                 goto clean_up;
7461
7462         memset(h->ioaccel_cmd_pool, 0,
7463                 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
7464         return 0;
7465
7466 clean_up:
7467         if (h->ioaccel_cmd_pool)
7468                 pci_free_consistent(h->pdev,
7469                         h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
7470                         h->ioaccel_cmd_pool, h->ioaccel_cmd_pool_dhandle);
7471         kfree(h->ioaccel1_blockFetchTable);
7472         return 1;
7473 }
7474
7475 static int ioaccel2_alloc_cmds_and_bft(struct ctlr_info *h)
7476 {
7477         /* Allocate ioaccel2 mode command blocks and block fetch table */
7478
7479         h->ioaccel_maxsg =
7480                 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
7481         if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
7482                 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
7483
7484         BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
7485                         IOACCEL2_COMMANDLIST_ALIGNMENT);
7486         h->ioaccel2_cmd_pool =
7487                 pci_alloc_consistent(h->pdev,
7488                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
7489                         &(h->ioaccel2_cmd_pool_dhandle));
7490
7491         h->ioaccel2_blockFetchTable =
7492                 kmalloc(((h->ioaccel_maxsg + 1) *
7493                                 sizeof(u32)), GFP_KERNEL);
7494
7495         if ((h->ioaccel2_cmd_pool == NULL) ||
7496                 (h->ioaccel2_blockFetchTable == NULL))
7497                 goto clean_up;
7498
7499         memset(h->ioaccel2_cmd_pool, 0,
7500                 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
7501         return 0;
7502
7503 clean_up:
7504         if (h->ioaccel2_cmd_pool)
7505                 pci_free_consistent(h->pdev,
7506                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
7507                         h->ioaccel2_cmd_pool, h->ioaccel2_cmd_pool_dhandle);
7508         kfree(h->ioaccel2_blockFetchTable);
7509         return 1;
7510 }
7511
7512 static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
7513 {
7514         u32 trans_support;
7515         unsigned long transMethod = CFGTBL_Trans_Performant |
7516                                         CFGTBL_Trans_use_short_tags;
7517         int i;
7518
7519         if (hpsa_simple_mode)
7520                 return;
7521
7522         trans_support = readl(&(h->cfgtable->TransportSupport));
7523         if (!(trans_support & PERFORMANT_MODE))
7524                 return;
7525
7526         /* Check for I/O accelerator mode support */
7527         if (trans_support & CFGTBL_Trans_io_accel1) {
7528                 transMethod |= CFGTBL_Trans_io_accel1 |
7529                                 CFGTBL_Trans_enable_directed_msix;
7530                 if (hpsa_alloc_ioaccel_cmd_and_bft(h))
7531                         goto clean_up;
7532         } else {
7533                 if (trans_support & CFGTBL_Trans_io_accel2) {
7534                                 transMethod |= CFGTBL_Trans_io_accel2 |
7535                                 CFGTBL_Trans_enable_directed_msix;
7536                 if (ioaccel2_alloc_cmds_and_bft(h))
7537                         goto clean_up;
7538                 }
7539         }
7540
7541         h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1;
7542         hpsa_get_max_perf_mode_cmds(h);
7543         /* Performant mode ring buffer and supporting data structures */
7544         h->reply_queue_size = h->max_commands * sizeof(u64);
7545
7546         for (i = 0; i < h->nreply_queues; i++) {
7547                 h->reply_queue[i].head = pci_alloc_consistent(h->pdev,
7548                                                 h->reply_queue_size,
7549                                                 &(h->reply_queue[i].busaddr));
7550                 if (!h->reply_queue[i].head)
7551                         goto clean_up;
7552                 h->reply_queue[i].size = h->max_commands;
7553                 h->reply_queue[i].wraparound = 1;  /* spec: init to 1 */
7554                 h->reply_queue[i].current_entry = 0;
7555         }
7556
7557         /* Need a block fetch table for performant mode */
7558         h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
7559                                 sizeof(u32)), GFP_KERNEL);
7560         if (!h->blockFetchTable)
7561                 goto clean_up;
7562
7563         hpsa_enter_performant_mode(h, trans_support);
7564         return;
7565
7566 clean_up:
7567         hpsa_free_reply_queues(h);
7568         kfree(h->blockFetchTable);
7569 }
7570
7571 static int is_accelerated_cmd(struct CommandList *c)
7572 {
7573         return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
7574 }
7575
7576 static void hpsa_drain_accel_commands(struct ctlr_info *h)
7577 {
7578         struct CommandList *c = NULL;
7579         unsigned long flags;
7580         int accel_cmds_out;
7581
7582         do { /* wait for all outstanding commands to drain out */
7583                 accel_cmds_out = 0;
7584                 spin_lock_irqsave(&h->lock, flags);
7585                 list_for_each_entry(c, &h->cmpQ, list)
7586                         accel_cmds_out += is_accelerated_cmd(c);
7587                 list_for_each_entry(c, &h->reqQ, list)
7588                         accel_cmds_out += is_accelerated_cmd(c);
7589                 spin_unlock_irqrestore(&h->lock, flags);
7590                 if (accel_cmds_out <= 0)
7591                         break;
7592                 msleep(100);
7593         } while (1);
7594 }
7595
7596 /*
7597  *  This is it.  Register the PCI driver information for the cards we control
7598  *  the OS will call our registered routines when it finds one of our cards.
7599  */
7600 static int __init hpsa_init(void)
7601 {
7602         return pci_register_driver(&hpsa_pci_driver);
7603 }
7604
7605 static void __exit hpsa_cleanup(void)
7606 {
7607         pci_unregister_driver(&hpsa_pci_driver);
7608 }
7609
7610 static void __attribute__((unused)) verify_offsets(void)
7611 {
7612 #define VERIFY_OFFSET(member, offset) \
7613         BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
7614
7615         VERIFY_OFFSET(structure_size, 0);
7616         VERIFY_OFFSET(volume_blk_size, 4);
7617         VERIFY_OFFSET(volume_blk_cnt, 8);
7618         VERIFY_OFFSET(phys_blk_shift, 16);
7619         VERIFY_OFFSET(parity_rotation_shift, 17);
7620         VERIFY_OFFSET(strip_size, 18);
7621         VERIFY_OFFSET(disk_starting_blk, 20);
7622         VERIFY_OFFSET(disk_blk_cnt, 28);
7623         VERIFY_OFFSET(data_disks_per_row, 36);
7624         VERIFY_OFFSET(metadata_disks_per_row, 38);
7625         VERIFY_OFFSET(row_cnt, 40);
7626         VERIFY_OFFSET(layout_map_count, 42);
7627         VERIFY_OFFSET(flags, 44);
7628         VERIFY_OFFSET(dekindex, 46);
7629         /* VERIFY_OFFSET(reserved, 48 */
7630         VERIFY_OFFSET(data, 64);
7631
7632 #undef VERIFY_OFFSET
7633
7634 #define VERIFY_OFFSET(member, offset) \
7635         BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
7636
7637         VERIFY_OFFSET(IU_type, 0);
7638         VERIFY_OFFSET(direction, 1);
7639         VERIFY_OFFSET(reply_queue, 2);
7640         /* VERIFY_OFFSET(reserved1, 3);  */
7641         VERIFY_OFFSET(scsi_nexus, 4);
7642         VERIFY_OFFSET(Tag, 8);
7643         VERIFY_OFFSET(cdb, 16);
7644         VERIFY_OFFSET(cciss_lun, 32);
7645         VERIFY_OFFSET(data_len, 40);
7646         VERIFY_OFFSET(cmd_priority_task_attr, 44);
7647         VERIFY_OFFSET(sg_count, 45);
7648         /* VERIFY_OFFSET(reserved3 */
7649         VERIFY_OFFSET(err_ptr, 48);
7650         VERIFY_OFFSET(err_len, 56);
7651         /* VERIFY_OFFSET(reserved4  */
7652         VERIFY_OFFSET(sg, 64);
7653
7654 #undef VERIFY_OFFSET
7655
7656 #define VERIFY_OFFSET(member, offset) \
7657         BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
7658
7659         VERIFY_OFFSET(dev_handle, 0x00);
7660         VERIFY_OFFSET(reserved1, 0x02);
7661         VERIFY_OFFSET(function, 0x03);
7662         VERIFY_OFFSET(reserved2, 0x04);
7663         VERIFY_OFFSET(err_info, 0x0C);
7664         VERIFY_OFFSET(reserved3, 0x10);
7665         VERIFY_OFFSET(err_info_len, 0x12);
7666         VERIFY_OFFSET(reserved4, 0x13);
7667         VERIFY_OFFSET(sgl_offset, 0x14);
7668         VERIFY_OFFSET(reserved5, 0x15);
7669         VERIFY_OFFSET(transfer_len, 0x1C);
7670         VERIFY_OFFSET(reserved6, 0x20);
7671         VERIFY_OFFSET(io_flags, 0x24);
7672         VERIFY_OFFSET(reserved7, 0x26);
7673         VERIFY_OFFSET(LUN, 0x34);
7674         VERIFY_OFFSET(control, 0x3C);
7675         VERIFY_OFFSET(CDB, 0x40);
7676         VERIFY_OFFSET(reserved8, 0x50);
7677         VERIFY_OFFSET(host_context_flags, 0x60);
7678         VERIFY_OFFSET(timeout_sec, 0x62);
7679         VERIFY_OFFSET(ReplyQueue, 0x64);
7680         VERIFY_OFFSET(reserved9, 0x65);
7681         VERIFY_OFFSET(tag, 0x68);
7682         VERIFY_OFFSET(host_addr, 0x70);
7683         VERIFY_OFFSET(CISS_LUN, 0x78);
7684         VERIFY_OFFSET(SG, 0x78 + 8);
7685 #undef VERIFY_OFFSET
7686 }
7687
7688 module_init(hpsa_init);
7689 module_exit(hpsa_cleanup);