drivers/scsi/hpsa.c

   1 /*
   2  *    Disk Array driver for HP Smart Array SAS controllers
   3  *    Copyright 2000, 2014 Hewlett-Packard Development Company, L.P.
   4  *
   5  *    This program is free software; you can redistribute it and/or modify
   6  *    it under the terms of the GNU General Public License as published by
   7  *    the Free Software Foundation; version 2 of the License.
   8  *
   9  *    This program is distributed in the hope that it will be useful,
  10  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
  13  *
  14  *    You should have received a copy of the GNU General Public License
  15  *    along with this program; if not, write to the Free Software
  16  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17  *
  18  *    Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19  *
  20  */
  21
  22 #include <linux/module.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/types.h>
  25 #include <linux/pci.h>
  26 #include <linux/pci-aspm.h>
  27 #include <linux/kernel.h>
  28 #include <linux/slab.h>
  29 #include <linux/delay.h>
  30 #include <linux/fs.h>
  31 #include <linux/timer.h>
  32 #include <linux/init.h>
  33 #include <linux/spinlock.h>
  34 #include <linux/compat.h>
  35 #include <linux/blktrace_api.h>
  36 #include <linux/uaccess.h>
  37 #include <linux/io.h>
  38 #include <linux/dma-mapping.h>
  39 #include <linux/completion.h>
  40 #include <linux/moduleparam.h>
  41 #include <scsi/scsi.h>
  42 #include <scsi/scsi_cmnd.h>
  43 #include <scsi/scsi_device.h>
  44 #include <scsi/scsi_host.h>
  45 #include <scsi/scsi_tcq.h>
  46 #include <linux/cciss_ioctl.h>
  47 #include <linux/string.h>
  48 #include <linux/bitmap.h>
  49 #include <linux/atomic.h>
  50 #include <linux/jiffies.h>
  51 #include <linux/percpu-defs.h>
  52 #include <linux/percpu.h>
  53 #include <asm/div64.h>
  54 #include "hpsa_cmd.h"
  55 #include "hpsa.h"
  56
  57 /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  58 #define HPSA_DRIVER_VERSION "3.4.4-1"
  59 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  60 #define HPSA "hpsa"
  61
  62 /* How long to wait (in milliseconds) for board to go into simple mode */
  63 #define MAX_CONFIG_WAIT 30000
  64 #define MAX_IOCTL_CONFIG_WAIT 1000
  65
  66 /*define how many times we will try a command because of bus resets */
  67 #define MAX_CMD_RETRIES 3
  68
  69 /* Embedded module documentation macros - see modules.h */
  70 MODULE_AUTHOR("Hewlett-Packard Company");
  71 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  72         HPSA_DRIVER_VERSION);
  73 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  74 MODULE_VERSION(HPSA_DRIVER_VERSION);
  75 MODULE_LICENSE("GPL");
  76
  77 static int hpsa_allow_any;
  78 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  79 MODULE_PARM_DESC(hpsa_allow_any,
  80                 "Allow hpsa driver to access unknown HP Smart Array hardware");
  81 static int hpsa_simple_mode;
  82 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
  83 MODULE_PARM_DESC(hpsa_simple_mode,
  84         "Use 'simple mode' rather than 'performant mode'");
  85
  86 /* define the PCI info for the cards we can control */
  87 static const struct pci_device_id hpsa_pci_device_id[] = {
  88         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3241},
  89         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3243},
  90         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3245},
  91         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3247},
  92         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3249},
  93         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324A},
  94         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324B},
  95         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3233},
  96         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3350},
  97         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3351},
  98         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3352},
  99         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3353},
 100         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3354},
 101         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3355},
 102         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3356},
 103         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1921},
 104         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1922},
 105         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1923},
 106         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1924},
 107         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1925},
 108         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1926},
 109         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1928},
 110         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1929},
 111         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BD},
 112         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BE},
 113         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21BF},
 114         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C0},
 115         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C1},
 116         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C2},
 117         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C3},
 118         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C4},
 119         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C5},
 120         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C6},
 121         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C7},
 122         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C8},
 123         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21C9},
 124         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CA},
 125         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CB},
 126         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CC},
 127         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CD},
 128         {PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSI,     0x103C, 0x21CE},
 129         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076},
 130         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087},
 131         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D},
 132         {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088},
 133         {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f},
 134         {PCI_VENDOR_ID_HP,     PCI_ANY_ID,      PCI_ANY_ID, PCI_ANY_ID,
 135                 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
 136         {0,}
 137 };
 138
 139 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
 140
 141 /*  board_id = Subsystem Device ID & Vendor ID
 142  *  product = Marketing Name for the board
 143  *  access = Address of the struct of function pointers
 144  */
 145 static struct board_type products[] = {
 146         {0x3241103C, "Smart Array P212", &SA5_access},
 147         {0x3243103C, "Smart Array P410", &SA5_access},
 148         {0x3245103C, "Smart Array P410i", &SA5_access},
 149         {0x3247103C, "Smart Array P411", &SA5_access},
 150         {0x3249103C, "Smart Array P812", &SA5_access},
 151         {0x324A103C, "Smart Array P712m", &SA5_access},
 152         {0x324B103C, "Smart Array P711m", &SA5_access},
 153         {0x3350103C, "Smart Array P222", &SA5_access},
 154         {0x3351103C, "Smart Array P420", &SA5_access},
 155         {0x3352103C, "Smart Array P421", &SA5_access},
 156         {0x3353103C, "Smart Array P822", &SA5_access},
 157         {0x3354103C, "Smart Array P420i", &SA5_access},
 158         {0x3355103C, "Smart Array P220i", &SA5_access},
 159         {0x3356103C, "Smart Array P721m", &SA5_access},
 160         {0x1921103C, "Smart Array P830i", &SA5_access},
 161         {0x1922103C, "Smart Array P430", &SA5_access},
 162         {0x1923103C, "Smart Array P431", &SA5_access},
 163         {0x1924103C, "Smart Array P830", &SA5_access},
 164         {0x1926103C, "Smart Array P731m", &SA5_access},
 165         {0x1928103C, "Smart Array P230i", &SA5_access},
 166         {0x1929103C, "Smart Array P530", &SA5_access},
 167         {0x21BD103C, "Smart Array", &SA5_access},
 168         {0x21BE103C, "Smart Array", &SA5_access},
 169         {0x21BF103C, "Smart Array", &SA5_access},
 170         {0x21C0103C, "Smart Array", &SA5_access},
 171         {0x21C1103C, "Smart Array", &SA5_access},
 172         {0x21C2103C, "Smart Array", &SA5_access},
 173         {0x21C3103C, "Smart Array", &SA5_access},
 174         {0x21C4103C, "Smart Array", &SA5_access},
 175         {0x21C5103C, "Smart Array", &SA5_access},
 176         {0x21C6103C, "Smart Array", &SA5_access},
 177         {0x21C7103C, "Smart Array", &SA5_access},
 178         {0x21C8103C, "Smart Array", &SA5_access},
 179         {0x21C9103C, "Smart Array", &SA5_access},
 180         {0x21CA103C, "Smart Array", &SA5_access},
 181         {0x21CB103C, "Smart Array", &SA5_access},
 182         {0x21CC103C, "Smart Array", &SA5_access},
 183         {0x21CD103C, "Smart Array", &SA5_access},
 184         {0x21CE103C, "Smart Array", &SA5_access},
 185         {0x00761590, "HP Storage P1224 Array Controller", &SA5_access},
 186         {0x00871590, "HP Storage P1224e Array Controller", &SA5_access},
 187         {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access},
 188         {0x00881590, "HP Storage P1228e Array Controller", &SA5_access},
 189         {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access},
 190         {0xFFFF103C, "Unknown Smart Array", &SA5_access},
 191 };
 192
 193 static int number_of_controllers;
 194
 195 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
 196 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
 197 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg);
 198 static void lock_and_start_io(struct ctlr_info *h);
 199 static void start_io(struct ctlr_info *h, unsigned long *flags);
 200
 201 #ifdef CONFIG_COMPAT
 202 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd,
 203         void __user *arg);
 204 #endif
 205
 206 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
 207 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
 208 static struct CommandList *cmd_alloc(struct ctlr_info *h);
 209 static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
 210 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
 211         void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
 212         int cmd_type);
 213 #define VPD_PAGE (1 << 8)
 214
 215 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 216 static void hpsa_scan_start(struct Scsi_Host *);
 217 static int hpsa_scan_finished(struct Scsi_Host *sh,
 218         unsigned long elapsed_time);
 219 static int hpsa_change_queue_depth(struct scsi_device *sdev,
 220         int qdepth, int reason);
 221
 222 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
 223 static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
 224 static int hpsa_slave_alloc(struct scsi_device *sdev);
 225 static void hpsa_slave_destroy(struct scsi_device *sdev);
 226
 227 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
 228 static int check_for_unit_attention(struct ctlr_info *h,
 229         struct CommandList *c);
 230 static void check_ioctl_unit_attention(struct ctlr_info *h,
 231         struct CommandList *c);
 232 /* performant mode helper functions */
 233 static void calc_bucket_map(int *bucket, int num_buckets,
 234         int nsgs, int min_blocks, int *bucket_map);
 235 static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
 236 static inline u32 next_command(struct ctlr_info *h, u8 q);
 237 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
 238                                u32 *cfg_base_addr, u64 *cfg_base_addr_index,
 239                                u64 *cfg_offset);
 240 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
 241                                     unsigned long *memory_bar);
 242 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
 243 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
 244                                      int wait_for_ready);
 245 static inline void finish_cmd(struct CommandList *c);
 246 static void hpsa_wait_for_mode_change_ack(struct ctlr_info *h);
 247 #define BOARD_NOT_READY 0
 248 #define BOARD_READY 1
 249 static void hpsa_drain_accel_commands(struct ctlr_info *h);
 250 static void hpsa_flush_cache(struct ctlr_info *h);
 251 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
 252         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
 253         u8 *scsi3addr);
 254
 255 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
 256 {
 257         unsigned long *priv = shost_priv(sdev->host);
 258         return (struct ctlr_info *) *priv;
 259 }
 260
 261 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
 262 {
 263         unsigned long *priv = shost_priv(sh);
 264         return (struct ctlr_info *) *priv;
 265 }
 266
 267 static int check_for_unit_attention(struct ctlr_info *h,
 268         struct CommandList *c)
 269 {
 270         if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
 271                 return 0;
 272
 273         switch (c->err_info->SenseInfo[12]) {
 274         case STATE_CHANGED:
 275                 dev_warn(&h->pdev->dev, HPSA "%d: a state change "
 276                         "detected, command retried\n", h->ctlr);
 277                 break;
 278         case LUN_FAILED:
 279                 dev_warn(&h->pdev->dev, HPSA "%d: LUN failure "
 280                         "detected, action required\n", h->ctlr);
 281                 break;
 282         case REPORT_LUNS_CHANGED:
 283                 dev_warn(&h->pdev->dev, HPSA "%d: report LUN data "
 284                         "changed, action required\n", h->ctlr);
 285         /*
 286          * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
 287          * target (array) devices.
 288          */
 289                 break;
 290         case POWER_OR_RESET:
 291                 dev_warn(&h->pdev->dev, HPSA "%d: a power on "
 292                         "or device reset detected\n", h->ctlr);
 293                 break;
 294         case UNIT_ATTENTION_CLEARED:
 295                 dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
 296                     "cleared by another initiator\n", h->ctlr);
 297                 break;
 298         default:
 299                 dev_warn(&h->pdev->dev, HPSA "%d: unknown "
 300                         "unit attention detected\n", h->ctlr);
 301                 break;
 302         }
 303         return 1;
 304 }
 305
 306 static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
 307 {
 308         if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
 309                 (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
 310                  c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
 311                 return 0;
 312         dev_warn(&h->pdev->dev, HPSA "device busy");
 313         return 1;
 314 }
 315
 316 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev,
 317                                          struct device_attribute *attr,
 318                                          const char *buf, size_t count)
 319 {
 320         int status, len;
 321         struct ctlr_info *h;
 322         struct Scsi_Host *shost = class_to_shost(dev);
 323         char tmpbuf[10];
 324
 325         if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
 326                 return -EACCES;
 327         len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
 328         strncpy(tmpbuf, buf, len);
 329         tmpbuf[len] = '\0';
 330         if (sscanf(tmpbuf, "%d", &status) != 1)
 331                 return -EINVAL;
 332         h = shost_to_hba(shost);
 333         h->acciopath_status = !!status;
 334         dev_warn(&h->pdev->dev,
 335                 "hpsa: HP SSD Smart Path %s via sysfs update.\n",
 336                 h->acciopath_status ? "enabled" : "disabled");
 337         return count;
 338 }
 339
 340 static ssize_t host_store_raid_offload_debug(struct device *dev,
 341                                          struct device_attribute *attr,
 342                                          const char *buf, size_t count)
 343 {
 344         int debug_level, len;
 345         struct ctlr_info *h;
 346         struct Scsi_Host *shost = class_to_shost(dev);
 347         char tmpbuf[10];
 348
 349         if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO))
 350                 return -EACCES;
 351         len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count;
 352         strncpy(tmpbuf, buf, len);
 353         tmpbuf[len] = '\0';
 354         if (sscanf(tmpbuf, "%d", &debug_level) != 1)
 355                 return -EINVAL;
 356         if (debug_level < 0)
 357                 debug_level = 0;
 358         h = shost_to_hba(shost);
 359         h->raid_offload_debug = debug_level;
 360         dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n",
 361                 h->raid_offload_debug);
 362         return count;
 363 }
 364
 365 static ssize_t host_store_rescan(struct device *dev,
 366                                  struct device_attribute *attr,
 367                                  const char *buf, size_t count)
 368 {
 369         struct ctlr_info *h;
 370         struct Scsi_Host *shost = class_to_shost(dev);
 371         h = shost_to_hba(shost);
 372         hpsa_scan_start(h->scsi_host);
 373         return count;
 374 }
 375
 376 static ssize_t host_show_firmware_revision(struct device *dev,
 377              struct device_attribute *attr, char *buf)
 378 {
 379         struct ctlr_info *h;
 380         struct Scsi_Host *shost = class_to_shost(dev);
 381         unsigned char *fwrev;
 382
 383         h = shost_to_hba(shost);
 384         if (!h->hba_inquiry_data)
 385                 return 0;
 386         fwrev = &h->hba_inquiry_data[32];
 387         return snprintf(buf, 20, "%c%c%c%c\n",
 388                 fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
 389 }
 390
 391 static ssize_t host_show_commands_outstanding(struct device *dev,
 392              struct device_attribute *attr, char *buf)
 393 {
 394         struct Scsi_Host *shost = class_to_shost(dev);
 395         struct ctlr_info *h = shost_to_hba(shost);
 396
 397         return snprintf(buf, 20, "%d\n", h->commands_outstanding);
 398 }
 399
 400 static ssize_t host_show_transport_mode(struct device *dev,
 401         struct device_attribute *attr, char *buf)
 402 {
 403         struct ctlr_info *h;
 404         struct Scsi_Host *shost = class_to_shost(dev);
 405
 406         h = shost_to_hba(shost);
 407         return snprintf(buf, 20, "%s\n",
 408                 h->transMethod & CFGTBL_Trans_Performant ?
 409                         "performant" : "simple");
 410 }
 411
 412 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev,
 413         struct device_attribute *attr, char *buf)
 414 {
 415         struct ctlr_info *h;
 416         struct Scsi_Host *shost = class_to_shost(dev);
 417
 418         h = shost_to_hba(shost);
 419         return snprintf(buf, 30, "HP SSD Smart Path %s\n",
 420                 (h->acciopath_status == 1) ?  "enabled" : "disabled");
 421 }
 422
 423 /* List of controllers which cannot be hard reset on kexec with reset_devices */
 424 static u32 unresettable_controller[] = {
 425         0x324a103C, /* Smart Array P712m */
 426         0x324b103C, /* SmartArray P711m */
 427         0x3223103C, /* Smart Array P800 */
 428         0x3234103C, /* Smart Array P400 */
 429         0x3235103C, /* Smart Array P400i */
 430         0x3211103C, /* Smart Array E200i */
 431         0x3212103C, /* Smart Array E200 */
 432         0x3213103C, /* Smart Array E200i */
 433         0x3214103C, /* Smart Array E200i */
 434         0x3215103C, /* Smart Array E200i */
 435         0x3237103C, /* Smart Array E500 */
 436         0x323D103C, /* Smart Array P700m */
 437         0x40800E11, /* Smart Array 5i */
 438         0x409C0E11, /* Smart Array 6400 */
 439         0x409D0E11, /* Smart Array 6400 EM */
 440         0x40700E11, /* Smart Array 5300 */
 441         0x40820E11, /* Smart Array 532 */
 442         0x40830E11, /* Smart Array 5312 */
 443         0x409A0E11, /* Smart Array 641 */
 444         0x409B0E11, /* Smart Array 642 */
 445         0x40910E11, /* Smart Array 6i */
 446 };
 447
 448 /* List of controllers which cannot even be soft reset */
 449 static u32 soft_unresettable_controller[] = {
 450         0x40800E11, /* Smart Array 5i */
 451         0x40700E11, /* Smart Array 5300 */
 452         0x40820E11, /* Smart Array 532 */
 453         0x40830E11, /* Smart Array 5312 */
 454         0x409A0E11, /* Smart Array 641 */
 455         0x409B0E11, /* Smart Array 642 */
 456         0x40910E11, /* Smart Array 6i */
 457         /* Exclude 640x boards.  These are two pci devices in one slot
 458          * which share a battery backed cache module.  One controls the
 459          * cache, the other accesses the cache through the one that controls
 460          * it.  If we reset the one controlling the cache, the other will
 461          * likely not be happy.  Just forbid resetting this conjoined mess.
 462          * The 640x isn't really supported by hpsa anyway.
 463          */
 464         0x409C0E11, /* Smart Array 6400 */
 465         0x409D0E11, /* Smart Array 6400 EM */
 466 };
 467
 468 static int ctlr_is_hard_resettable(u32 board_id)
 469 {
 470         int i;
 471
 472         for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
 473                 if (unresettable_controller[i] == board_id)
 474                         return 0;
 475         return 1;
 476 }
 477
 478 static int ctlr_is_soft_resettable(u32 board_id)
 479 {
 480         int i;
 481
 482         for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
 483                 if (soft_unresettable_controller[i] == board_id)
 484                         return 0;
 485         return 1;
 486 }
 487
 488 static int ctlr_is_resettable(u32 board_id)
 489 {
 490         return ctlr_is_hard_resettable(board_id) ||
 491                 ctlr_is_soft_resettable(board_id);
 492 }
 493
 494 static ssize_t host_show_resettable(struct device *dev,
 495         struct device_attribute *attr, char *buf)
 496 {
 497         struct ctlr_info *h;
 498         struct Scsi_Host *shost = class_to_shost(dev);
 499
 500         h = shost_to_hba(shost);
 501         return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
 502 }
 503
 504 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
 505 {
 506         return (scsi3addr[3] & 0xC0) == 0x40;
 507 }
 508
 509 static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
 510         "1(ADM)", "UNKNOWN"
 511 };
 512 #define HPSA_RAID_0     0
 513 #define HPSA_RAID_4     1
 514 #define HPSA_RAID_1     2       /* also used for RAID 10 */
 515 #define HPSA_RAID_5     3       /* also used for RAID 50 */
 516 #define HPSA_RAID_51    4
 517 #define HPSA_RAID_6     5       /* also used for RAID 60 */
 518 #define HPSA_RAID_ADM   6       /* also used for RAID 1+0 ADM */
 519 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
 520
 521 static ssize_t raid_level_show(struct device *dev,
 522              struct device_attribute *attr, char *buf)
 523 {
 524         ssize_t l = 0;
 525         unsigned char rlevel;
 526         struct ctlr_info *h;
 527         struct scsi_device *sdev;
 528         struct hpsa_scsi_dev_t *hdev;
 529         unsigned long flags;
 530
 531         sdev = to_scsi_device(dev);
 532         h = sdev_to_hba(sdev);
 533         spin_lock_irqsave(&h->lock, flags);
 534         hdev = sdev->hostdata;
 535         if (!hdev) {
 536                 spin_unlock_irqrestore(&h->lock, flags);
 537                 return -ENODEV;
 538         }
 539
 540         /* Is this even a logical drive? */
 541         if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
 542                 spin_unlock_irqrestore(&h->lock, flags);
 543                 l = snprintf(buf, PAGE_SIZE, "N/A\n");
 544                 return l;
 545         }
 546
 547         rlevel = hdev->raid_level;
 548         spin_unlock_irqrestore(&h->lock, flags);
 549         if (rlevel > RAID_UNKNOWN)
 550                 rlevel = RAID_UNKNOWN;
 551         l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
 552         return l;
 553 }
 554
 555 static ssize_t lunid_show(struct device *dev,
 556              struct device_attribute *attr, char *buf)
 557 {
 558         struct ctlr_info *h;
 559         struct scsi_device *sdev;
 560         struct hpsa_scsi_dev_t *hdev;
 561         unsigned long flags;
 562         unsigned char lunid[8];
 563
 564         sdev = to_scsi_device(dev);
 565         h = sdev_to_hba(sdev);
 566         spin_lock_irqsave(&h->lock, flags);
 567         hdev = sdev->hostdata;
 568         if (!hdev) {
 569                 spin_unlock_irqrestore(&h->lock, flags);
 570                 return -ENODEV;
 571         }
 572         memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
 573         spin_unlock_irqrestore(&h->lock, flags);
 574         return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
 575                 lunid[0], lunid[1], lunid[2], lunid[3],
 576                 lunid[4], lunid[5], lunid[6], lunid[7]);
 577 }
 578
 579 static ssize_t unique_id_show(struct device *dev,
 580              struct device_attribute *attr, char *buf)
 581 {
 582         struct ctlr_info *h;
 583         struct scsi_device *sdev;
 584         struct hpsa_scsi_dev_t *hdev;
 585         unsigned long flags;
 586         unsigned char sn[16];
 587
 588         sdev = to_scsi_device(dev);
 589         h = sdev_to_hba(sdev);
 590         spin_lock_irqsave(&h->lock, flags);
 591         hdev = sdev->hostdata;
 592         if (!hdev) {
 593                 spin_unlock_irqrestore(&h->lock, flags);
 594                 return -ENODEV;
 595         }
 596         memcpy(sn, hdev->device_id, sizeof(sn));
 597         spin_unlock_irqrestore(&h->lock, flags);
 598         return snprintf(buf, 16 * 2 + 2,
 599                         "%02X%02X%02X%02X%02X%02X%02X%02X"
 600                         "%02X%02X%02X%02X%02X%02X%02X%02X\n",
 601                         sn[0], sn[1], sn[2], sn[3],
 602                         sn[4], sn[5], sn[6], sn[7],
 603                         sn[8], sn[9], sn[10], sn[11],
 604                         sn[12], sn[13], sn[14], sn[15]);
 605 }
 606
 607 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev,
 608              struct device_attribute *attr, char *buf)
 609 {
 610         struct ctlr_info *h;
 611         struct scsi_device *sdev;
 612         struct hpsa_scsi_dev_t *hdev;
 613         unsigned long flags;
 614         int offload_enabled;
 615
 616         sdev = to_scsi_device(dev);
 617         h = sdev_to_hba(sdev);
 618         spin_lock_irqsave(&h->lock, flags);
 619         hdev = sdev->hostdata;
 620         if (!hdev) {
 621                 spin_unlock_irqrestore(&h->lock, flags);
 622                 return -ENODEV;
 623         }
 624         offload_enabled = hdev->offload_enabled;
 625         spin_unlock_irqrestore(&h->lock, flags);
 626         return snprintf(buf, 20, "%d\n", offload_enabled);
 627 }
 628
 629 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
 630 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
 631 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
 632 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
 633 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO,
 634                         host_show_hp_ssd_smart_path_enabled, NULL);
 635 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH,
 636                 host_show_hp_ssd_smart_path_status,
 637                 host_store_hp_ssd_smart_path_status);
 638 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL,
 639                         host_store_raid_offload_debug);
 640 static DEVICE_ATTR(firmware_revision, S_IRUGO,
 641         host_show_firmware_revision, NULL);
 642 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
 643         host_show_commands_outstanding, NULL);
 644 static DEVICE_ATTR(transport_mode, S_IRUGO,
 645         host_show_transport_mode, NULL);
 646 static DEVICE_ATTR(resettable, S_IRUGO,
 647         host_show_resettable, NULL);
 648
 649 static struct device_attribute *hpsa_sdev_attrs[] = {
 650         &dev_attr_raid_level,
 651         &dev_attr_lunid,
 652         &dev_attr_unique_id,
 653         &dev_attr_hp_ssd_smart_path_enabled,
 654         NULL,
 655 };
 656
 657 static struct device_attribute *hpsa_shost_attrs[] = {
 658         &dev_attr_rescan,
 659         &dev_attr_firmware_revision,
 660         &dev_attr_commands_outstanding,
 661         &dev_attr_transport_mode,
 662         &dev_attr_resettable,
 663         &dev_attr_hp_ssd_smart_path_status,
 664         &dev_attr_raid_offload_debug,
 665         NULL,
 666 };
 667
 668 static struct scsi_host_template hpsa_driver_template = {
 669         .module                 = THIS_MODULE,
 670         .name                   = HPSA,
 671         .proc_name              = HPSA,
 672         .queuecommand           = hpsa_scsi_queue_command,
 673         .scan_start             = hpsa_scan_start,
 674         .scan_finished          = hpsa_scan_finished,
 675         .change_queue_depth     = hpsa_change_queue_depth,
 676         .this_id                = -1,
 677         .use_clustering         = ENABLE_CLUSTERING,
 678         .eh_abort_handler       = hpsa_eh_abort_handler,
 679         .eh_device_reset_handler = hpsa_eh_device_reset_handler,
 680         .ioctl                  = hpsa_ioctl,
 681         .slave_alloc            = hpsa_slave_alloc,
 682         .slave_destroy          = hpsa_slave_destroy,
 683 #ifdef CONFIG_COMPAT
 684         .compat_ioctl           = hpsa_compat_ioctl,
 685 #endif
 686         .sdev_attrs = hpsa_sdev_attrs,
 687         .shost_attrs = hpsa_shost_attrs,
 688         .max_sectors = 8192,
 689         .no_write_same = 1,
 690 };
 691
 692
 693 /* Enqueuing and dequeuing functions for cmdlists. */
 694 static inline void addQ(struct list_head *list, struct CommandList *c)
 695 {
 696         list_add_tail(&c->list, list);
 697 }
 698
 699 static inline u32 next_command(struct ctlr_info *h, u8 q)
 700 {
 701         u32 a;
 702         struct reply_queue_buffer *rq = &h->reply_queue[q];
 703         unsigned long flags;
 704
 705         if (h->transMethod & CFGTBL_Trans_io_accel1)
 706                 return h->access.command_completed(h, q);
 707
 708         if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
 709                 return h->access.command_completed(h, q);
 710
 711         if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
 712                 a = rq->head[rq->current_entry];
 713                 rq->current_entry++;
 714                 spin_lock_irqsave(&h->lock, flags);
 715                 h->commands_outstanding--;
 716                 spin_unlock_irqrestore(&h->lock, flags);
 717         } else {
 718                 a = FIFO_EMPTY;
 719         }
 720         /* Check for wraparound */
 721         if (rq->current_entry == h->max_commands) {
 722                 rq->current_entry = 0;
 723                 rq->wraparound ^= 1;
 724         }
 725         return a;
 726 }
 727
 728 /*
 729  * There are some special bits in the bus address of the
 730  * command that we have to set for the controller to know
 731  * how to process the command:
 732  *
 733  * Normal performant mode:
 734  * bit 0: 1 means performant mode, 0 means simple mode.
 735  * bits 1-3 = block fetch table entry
 736  * bits 4-6 = command type (== 0)
 737  *
 738  * ioaccel1 mode:
 739  * bit 0 = "performant mode" bit.
 740  * bits 1-3 = block fetch table entry
 741  * bits 4-6 = command type (== 110)
 742  * (command type is needed because ioaccel1 mode
 743  * commands are submitted through the same register as normal
 744  * mode commands, so this is how the controller knows whether
 745  * the command is normal mode or ioaccel1 mode.)
 746  *
 747  * ioaccel2 mode:
 748  * bit 0 = "performant mode" bit.
 749  * bits 1-4 = block fetch table entry (note extra bit)
 750  * bits 4-6 = not needed, because ioaccel2 mode has
 751  * a separate special register for submitting commands.
 752  */
 753
 754 /* set_performant_mode: Modify the tag for cciss performant
 755  * set bit 0 for pull model, bits 3-1 for block fetch
 756  * register number
 757  */
 758 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
 759 {
 760         if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
 761                 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
 762                 if (likely(h->msix_vector > 0))
 763                         c->Header.ReplyQueue =
 764                                 raw_smp_processor_id() % h->nreply_queues;
 765         }
 766 }
 767
 768 static void set_ioaccel1_performant_mode(struct ctlr_info *h,
 769                                                 struct CommandList *c)
 770 {
 771         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
 772
 773         /* Tell the controller to post the reply to the queue for this
 774          * processor.  This seems to give the best I/O throughput.
 775          */
 776         cp->ReplyQueue = smp_processor_id() % h->nreply_queues;
 777         /* Set the bits in the address sent down to include:
 778          *  - performant mode bit (bit 0)
 779          *  - pull count (bits 1-3)
 780          *  - command type (bits 4-6)
 781          */
 782         c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) |
 783                                         IOACCEL1_BUSADDR_CMDTYPE;
 784 }
 785
 786 static void set_ioaccel2_performant_mode(struct ctlr_info *h,
 787                                                 struct CommandList *c)
 788 {
 789         struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
 790
 791         /* Tell the controller to post the reply to the queue for this
 792          * processor.  This seems to give the best I/O throughput.
 793          */
 794         cp->reply_queue = smp_processor_id() % h->nreply_queues;
 795         /* Set the bits in the address sent down to include:
 796          *  - performant mode bit not used in ioaccel mode 2
 797          *  - pull count (bits 0-3)
 798          *  - command type isn't needed for ioaccel2
 799          */
 800         c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]);
 801 }
 802
 803 static int is_firmware_flash_cmd(u8 *cdb)
 804 {
 805         return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
 806 }
 807
 808 /*
 809  * During firmware flash, the heartbeat register may not update as frequently
 810  * as it should.  So we dial down lockup detection during firmware flash. and
 811  * dial it back up when firmware flash completes.
 812  */
 813 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
 814 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
 815 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
 816                 struct CommandList *c)
 817 {
 818         if (!is_firmware_flash_cmd(c->Request.CDB))
 819                 return;
 820         atomic_inc(&h->firmware_flash_in_progress);
 821         h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
 822 }
 823
 824 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
 825                 struct CommandList *c)
 826 {
 827         if (is_firmware_flash_cmd(c->Request.CDB) &&
 828                 atomic_dec_and_test(&h->firmware_flash_in_progress))
 829                 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
 830 }
 831
 832 static void enqueue_cmd_and_start_io(struct ctlr_info *h,
 833         struct CommandList *c)
 834 {
 835         unsigned long flags;
 836
 837         switch (c->cmd_type) {
 838         case CMD_IOACCEL1:
 839                 set_ioaccel1_performant_mode(h, c);
 840                 break;
 841         case CMD_IOACCEL2:
 842                 set_ioaccel2_performant_mode(h, c);
 843                 break;
 844         default:
 845                 set_performant_mode(h, c);
 846         }
 847         dial_down_lockup_detection_during_fw_flash(h, c);
 848         spin_lock_irqsave(&h->lock, flags);
 849         addQ(&h->reqQ, c);
 850         h->Qdepth++;
 851         start_io(h, &flags);
 852         spin_unlock_irqrestore(&h->lock, flags);
 853 }
 854
 855 static inline void removeQ(struct CommandList *c)
 856 {
 857         if (WARN_ON(list_empty(&c->list)))
 858                 return;
 859         list_del_init(&c->list);
 860 }
 861
 862 static inline int is_hba_lunid(unsigned char scsi3addr[])
 863 {
 864         return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
 865 }
 866
 867 static inline int is_scsi_rev_5(struct ctlr_info *h)
 868 {
 869         if (!h->hba_inquiry_data)
 870                 return 0;
 871         if ((h->hba_inquiry_data[2] & 0x07) == 5)
 872                 return 1;
 873         return 0;
 874 }
 875
 876 static int hpsa_find_target_lun(struct ctlr_info *h,
 877         unsigned char scsi3addr[], int bus, int *target, int *lun)
 878 {
 879         /* finds an unused bus, target, lun for a new physical device
 880          * assumes h->devlock is held
 881          */
 882         int i, found = 0;
 883         DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
 884
 885         bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
 886
 887         for (i = 0; i < h->ndevices; i++) {
 888                 if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
 889                         __set_bit(h->dev[i]->target, lun_taken);
 890         }
 891
 892         i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
 893         if (i < HPSA_MAX_DEVICES) {
 894                 /* *bus = 1; */
 895                 *target = i;
 896                 *lun = 0;
 897                 found = 1;
 898         }
 899         return !found;
 900 }
 901
 902 /* Add an entry into h->dev[] array. */
 903 static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
 904                 struct hpsa_scsi_dev_t *device,
 905                 struct hpsa_scsi_dev_t *added[], int *nadded)
 906 {
 907         /* assumes h->devlock is held */
 908         int n = h->ndevices;
 909         int i;
 910         unsigned char addr1[8], addr2[8];
 911         struct hpsa_scsi_dev_t *sd;
 912
 913         if (n >= HPSA_MAX_DEVICES) {
 914                 dev_err(&h->pdev->dev, "too many devices, some will be "
 915                         "inaccessible.\n");
 916                 return -1;
 917         }
 918
 919         /* physical devices do not have lun or target assigned until now. */
 920         if (device->lun != -1)
 921                 /* Logical device, lun is already assigned. */
 922                 goto lun_assigned;
 923
 924         /* If this device a non-zero lun of a multi-lun device
 925          * byte 4 of the 8-byte LUN addr will contain the logical
 926          * unit no, zero otherise.
 927          */
 928         if (device->scsi3addr[4] == 0) {
 929                 /* This is not a non-zero lun of a multi-lun device */
 930                 if (hpsa_find_target_lun(h, device->scsi3addr,
 931                         device->bus, &device->target, &device->lun) != 0)
 932                         return -1;
 933                 goto lun_assigned;
 934         }
 935
 936         /* This is a non-zero lun of a multi-lun device.
 937          * Search through our list and find the device which
 938          * has the same 8 byte LUN address, excepting byte 4.
 939          * Assign the same bus and target for this new LUN.
 940          * Use the logical unit number from the firmware.
 941          */
 942         memcpy(addr1, device->scsi3addr, 8);
 943         addr1[4] = 0;
 944         for (i = 0; i < n; i++) {
 945                 sd = h->dev[i];
 946                 memcpy(addr2, sd->scsi3addr, 8);
 947                 addr2[4] = 0;
 948                 /* differ only in byte 4? */
 949                 if (memcmp(addr1, addr2, 8) == 0) {
 950                         device->bus = sd->bus;
 951                         device->target = sd->target;
 952                         device->lun = device->scsi3addr[4];
 953                         break;
 954                 }
 955         }
 956         if (device->lun == -1) {
 957                 dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
 958                         " suspect firmware bug or unsupported hardware "
 959                         "configuration.\n");
 960                         return -1;
 961         }
 962
 963 lun_assigned:
 964
 965         h->dev[n] = device;
 966         h->ndevices++;
 967         added[*nadded] = device;
 968         (*nadded)++;
 969
 970         /* initially, (before registering with scsi layer) we don't
 971          * know our hostno and we don't want to print anything first
 972          * time anyway (the scsi layer's inquiries will show that info)
 973          */
 974         /* if (hostno != -1) */
 975                 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
 976                         scsi_device_type(device->devtype), hostno,
 977                         device->bus, device->target, device->lun);
 978         return 0;
 979 }
 980
 981 /* Update an entry in h->dev[] array. */
 982 static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
 983         int entry, struct hpsa_scsi_dev_t *new_entry)
 984 {
 985         /* assumes h->devlock is held */
 986         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
 987
 988         /* Raid level changed. */
 989         h->dev[entry]->raid_level = new_entry->raid_level;
 990
 991         /* Raid offload parameters changed. */
 992         h->dev[entry]->offload_config = new_entry->offload_config;
 993         h->dev[entry]->offload_enabled = new_entry->offload_enabled;
 994         h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle;
 995         h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror;
 996         h->dev[entry]->raid_map = new_entry->raid_map;
 997
 998         dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n",
 999                 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
1000                 new_entry->target, new_entry->lun);
1001 }
1002
1003 /* Replace an entry from h->dev[] array. */
1004 static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
1005         int entry, struct hpsa_scsi_dev_t *new_entry,
1006         struct hpsa_scsi_dev_t *added[], int *nadded,
1007         struct hpsa_scsi_dev_t *removed[], int *nremoved)
1008 {
1009         /* assumes h->devlock is held */
1010         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1011         removed[*nremoved] = h->dev[entry];
1012         (*nremoved)++;
1013
1014         /*
1015          * New physical devices won't have target/lun assigned yet
1016          * so we need to preserve the values in the slot we are replacing.
1017          */
1018         if (new_entry->target == -1) {
1019                 new_entry->target = h->dev[entry]->target;
1020                 new_entry->lun = h->dev[entry]->lun;
1021         }
1022
1023         h->dev[entry] = new_entry;
1024         added[*nadded] = new_entry;
1025         (*nadded)++;
1026         dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
1027                 scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
1028                         new_entry->target, new_entry->lun);
1029 }
1030
1031 /* Remove an entry from h->dev[] array. */
1032 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
1033         struct hpsa_scsi_dev_t *removed[], int *nremoved)
1034 {
1035         /* assumes h->devlock is held */
1036         int i;
1037         struct hpsa_scsi_dev_t *sd;
1038
1039         BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
1040
1041         sd = h->dev[entry];
1042         removed[*nremoved] = h->dev[entry];
1043         (*nremoved)++;
1044
1045         for (i = entry; i < h->ndevices-1; i++)
1046                 h->dev[i] = h->dev[i+1];
1047         h->ndevices--;
1048         dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
1049                 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
1050                 sd->lun);
1051 }
1052
1053 #define SCSI3ADDR_EQ(a, b) ( \
1054         (a)[7] == (b)[7] && \
1055         (a)[6] == (b)[6] && \
1056         (a)[5] == (b)[5] && \
1057         (a)[4] == (b)[4] && \
1058         (a)[3] == (b)[3] && \
1059         (a)[2] == (b)[2] && \
1060         (a)[1] == (b)[1] && \
1061         (a)[0] == (b)[0])
1062
1063 static void fixup_botched_add(struct ctlr_info *h,
1064         struct hpsa_scsi_dev_t *added)
1065 {
1066         /* called when scsi_add_device fails in order to re-adjust
1067          * h->dev[] to match the mid layer's view.
1068          */
1069         unsigned long flags;
1070         int i, j;
1071
1072         spin_lock_irqsave(&h->lock, flags);
1073         for (i = 0; i < h->ndevices; i++) {
1074                 if (h->dev[i] == added) {
1075                         for (j = i; j < h->ndevices-1; j++)
1076                                 h->dev[j] = h->dev[j+1];
1077                         h->ndevices--;
1078                         break;
1079                 }
1080         }
1081         spin_unlock_irqrestore(&h->lock, flags);
1082         kfree(added);
1083 }
1084
1085 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
1086         struct hpsa_scsi_dev_t *dev2)
1087 {
1088         /* we compare everything except lun and target as these
1089          * are not yet assigned.  Compare parts likely
1090          * to differ first
1091          */
1092         if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
1093                 sizeof(dev1->scsi3addr)) != 0)
1094                 return 0;
1095         if (memcmp(dev1->device_id, dev2->device_id,
1096                 sizeof(dev1->device_id)) != 0)
1097                 return 0;
1098         if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
1099                 return 0;
1100         if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
1101                 return 0;
1102         if (dev1->devtype != dev2->devtype)
1103                 return 0;
1104         if (dev1->bus != dev2->bus)
1105                 return 0;
1106         return 1;
1107 }
1108
1109 static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
1110         struct hpsa_scsi_dev_t *dev2)
1111 {
1112         /* Device attributes that can change, but don't mean
1113          * that the device is a different device, nor that the OS
1114          * needs to be told anything about the change.
1115          */
1116         if (dev1->raid_level != dev2->raid_level)
1117                 return 1;
1118         if (dev1->offload_config != dev2->offload_config)
1119                 return 1;
1120         if (dev1->offload_enabled != dev2->offload_enabled)
1121                 return 1;
1122         return 0;
1123 }
1124
1125 /* Find needle in haystack.  If exact match found, return DEVICE_SAME,
1126  * and return needle location in *index.  If scsi3addr matches, but not
1127  * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
1128  * location in *index.
1129  * In the case of a minor device attribute change, such as RAID level, just
1130  * return DEVICE_UPDATED, along with the updated device's location in index.
1131  * If needle not found, return DEVICE_NOT_FOUND.
1132  */
1133 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
1134         struct hpsa_scsi_dev_t *haystack[], int haystack_size,
1135         int *index)
1136 {
1137         int i;
1138 #define DEVICE_NOT_FOUND 0
1139 #define DEVICE_CHANGED 1
1140 #define DEVICE_SAME 2
1141 #define DEVICE_UPDATED 3
1142         for (i = 0; i < haystack_size; i++) {
1143                 if (haystack[i] == NULL) /* previously removed. */
1144                         continue;
1145                 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
1146                         *index = i;
1147                         if (device_is_the_same(needle, haystack[i])) {
1148                                 if (device_updated(needle, haystack[i]))
1149                                         return DEVICE_UPDATED;
1150                                 return DEVICE_SAME;
1151                         } else {
1152                                 /* Keep offline devices offline */
1153                                 if (needle->volume_offline)
1154                                         return DEVICE_NOT_FOUND;
1155                                 return DEVICE_CHANGED;
1156                         }
1157                 }
1158         }
1159         *index = -1;
1160         return DEVICE_NOT_FOUND;
1161 }
1162
1163 static void hpsa_monitor_offline_device(struct ctlr_info *h,
1164                                         unsigned char scsi3addr[])
1165 {
1166         struct offline_device_entry *device;
1167         unsigned long flags;
1168
1169         /* Check to see if device is already on the list */
1170         spin_lock_irqsave(&h->offline_device_lock, flags);
1171         list_for_each_entry(device, &h->offline_device_list, offline_list) {
1172                 if (memcmp(device->scsi3addr, scsi3addr,
1173                         sizeof(device->scsi3addr)) == 0) {
1174                         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1175                         return;
1176                 }
1177         }
1178         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1179
1180         /* Device is not on the list, add it. */
1181         device = kmalloc(sizeof(*device), GFP_KERNEL);
1182         if (!device) {
1183                 dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__);
1184                 return;
1185         }
1186         memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr));
1187         spin_lock_irqsave(&h->offline_device_lock, flags);
1188         list_add_tail(&device->offline_list, &h->offline_device_list);
1189         spin_unlock_irqrestore(&h->offline_device_lock, flags);
1190 }
1191
1192 /* Print a message explaining various offline volume states */
1193 static void hpsa_show_volume_status(struct ctlr_info *h,
1194         struct hpsa_scsi_dev_t *sd)
1195 {
1196         if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED)
1197                 dev_info(&h->pdev->dev,
1198                         "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n",
1199                         h->scsi_host->host_no,
1200                         sd->bus, sd->target, sd->lun);
1201         switch (sd->volume_offline) {
1202         case HPSA_LV_OK:
1203                 break;
1204         case HPSA_LV_UNDERGOING_ERASE:
1205                 dev_info(&h->pdev->dev,
1206                         "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n",
1207                         h->scsi_host->host_no,
1208                         sd->bus, sd->target, sd->lun);
1209                 break;
1210         case HPSA_LV_UNDERGOING_RPI:
1211                 dev_info(&h->pdev->dev,
1212                         "C%d:B%d:T%d:L%d Volume is undergoing rapid parity initialization process.\n",
1213                         h->scsi_host->host_no,
1214                         sd->bus, sd->target, sd->lun);
1215                 break;
1216         case HPSA_LV_PENDING_RPI:
1217                 dev_info(&h->pdev->dev,
1218                                 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n",
1219                                 h->scsi_host->host_no,
1220                                 sd->bus, sd->target, sd->lun);
1221                 break;
1222         case HPSA_LV_ENCRYPTED_NO_KEY:
1223                 dev_info(&h->pdev->dev,
1224                         "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n",
1225                         h->scsi_host->host_no,
1226                         sd->bus, sd->target, sd->lun);
1227                 break;
1228         case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
1229                 dev_info(&h->pdev->dev,
1230                         "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n",
1231                         h->scsi_host->host_no,
1232                         sd->bus, sd->target, sd->lun);
1233                 break;
1234         case HPSA_LV_UNDERGOING_ENCRYPTION:
1235                 dev_info(&h->pdev->dev,
1236                         "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n",
1237                         h->scsi_host->host_no,
1238                         sd->bus, sd->target, sd->lun);
1239                 break;
1240         case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
1241                 dev_info(&h->pdev->dev,
1242                         "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n",
1243                         h->scsi_host->host_no,
1244                         sd->bus, sd->target, sd->lun);
1245                 break;
1246         case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
1247                 dev_info(&h->pdev->dev,
1248                         "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n",
1249                         h->scsi_host->host_no,
1250                         sd->bus, sd->target, sd->lun);
1251                 break;
1252         case HPSA_LV_PENDING_ENCRYPTION:
1253                 dev_info(&h->pdev->dev,
1254                         "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n",
1255                         h->scsi_host->host_no,
1256                         sd->bus, sd->target, sd->lun);
1257                 break;
1258         case HPSA_LV_PENDING_ENCRYPTION_REKEYING:
1259                 dev_info(&h->pdev->dev,
1260                         "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n",
1261                         h->scsi_host->host_no,
1262                         sd->bus, sd->target, sd->lun);
1263                 break;
1264         }
1265 }
1266
1267 static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
1268         struct hpsa_scsi_dev_t *sd[], int nsds)
1269 {
1270         /* sd contains scsi3 addresses and devtypes, and inquiry
1271          * data.  This function takes what's in sd to be the current
1272          * reality and updates h->dev[] to reflect that reality.
1273          */
1274         int i, entry, device_change, changes = 0;
1275         struct hpsa_scsi_dev_t *csd;
1276         unsigned long flags;
1277         struct hpsa_scsi_dev_t **added, **removed;
1278         int nadded, nremoved;
1279         struct Scsi_Host *sh = NULL;
1280
1281         added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
1282         removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
1283
1284         if (!added || !removed) {
1285                 dev_warn(&h->pdev->dev, "out of memory in "
1286                         "adjust_hpsa_scsi_table\n");
1287                 goto free_and_out;
1288         }
1289
1290         spin_lock_irqsave(&h->devlock, flags);
1291
1292         /* find any devices in h->dev[] that are not in
1293          * sd[] and remove them from h->dev[], and for any
1294          * devices which have changed, remove the old device
1295          * info and add the new device info.
1296          * If minor device attributes change, just update
1297          * the existing device structure.
1298          */
1299         i = 0;
1300         nremoved = 0;
1301         nadded = 0;
1302         while (i < h->ndevices) {
1303                 csd = h->dev[i];
1304                 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
1305                 if (device_change == DEVICE_NOT_FOUND) {
1306                         changes++;
1307                         hpsa_scsi_remove_entry(h, hostno, i,
1308                                 removed, &nremoved);
1309                         continue; /* remove ^^^, hence i not incremented */
1310                 } else if (device_change == DEVICE_CHANGED) {
1311                         changes++;
1312                         hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
1313                                 added, &nadded, removed, &nremoved);
1314                         /* Set it to NULL to prevent it from being freed
1315                          * at the bottom of hpsa_update_scsi_devices()
1316                          */
1317                         sd[entry] = NULL;
1318                 } else if (device_change == DEVICE_UPDATED) {
1319                         hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
1320                 }
1321                 i++;
1322         }
1323
1324         /* Now, make sure every device listed in sd[] is also
1325          * listed in h->dev[], adding them if they aren't found
1326          */
1327
1328         for (i = 0; i < nsds; i++) {
1329                 if (!sd[i]) /* if already added above. */
1330                         continue;
1331
1332                 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS
1333                  * as the SCSI mid-layer does not handle such devices well.
1334                  * It relentlessly loops sending TUR at 3Hz, then READ(10)
1335                  * at 160Hz, and prevents the system from coming up.
1336                  */
1337                 if (sd[i]->volume_offline) {
1338                         hpsa_show_volume_status(h, sd[i]);
1339                         dev_info(&h->pdev->dev, "c%db%dt%dl%d: temporarily offline\n",
1340                                 h->scsi_host->host_no,
1341                                 sd[i]->bus, sd[i]->target, sd[i]->lun);
1342                         continue;
1343                 }
1344
1345                 device_change = hpsa_scsi_find_entry(sd[i], h->dev,
1346                                         h->ndevices, &entry);
1347                 if (device_change == DEVICE_NOT_FOUND) {
1348                         changes++;
1349                         if (hpsa_scsi_add_entry(h, hostno, sd[i],
1350                                 added, &nadded) != 0)
1351                                 break;
1352                         sd[i] = NULL; /* prevent from being freed later. */
1353                 } else if (device_change == DEVICE_CHANGED) {
1354                         /* should never happen... */
1355                         changes++;
1356                         dev_warn(&h->pdev->dev,
1357                                 "device unexpectedly changed.\n");
1358                         /* but if it does happen, we just ignore that device */
1359                 }
1360         }
1361         spin_unlock_irqrestore(&h->devlock, flags);
1362
1363         /* Monitor devices which are in one of several NOT READY states to be
1364          * brought online later. This must be done without holding h->devlock,
1365          * so don't touch h->dev[]
1366          */
1367         for (i = 0; i < nsds; i++) {
1368                 if (!sd[i]) /* if already added above. */
1369                         continue;
1370                 if (sd[i]->volume_offline)
1371                         hpsa_monitor_offline_device(h, sd[i]->scsi3addr);
1372         }
1373
1374         /* Don't notify scsi mid layer of any changes the first time through
1375          * (or if there are no changes) scsi_scan_host will do it later the
1376          * first time through.
1377          */
1378         if (hostno == -1 || !changes)
1379                 goto free_and_out;
1380
1381         sh = h->scsi_host;
1382         /* Notify scsi mid layer of any removed devices */
1383         for (i = 0; i < nremoved; i++) {
1384                 struct scsi_device *sdev =
1385                         scsi_device_lookup(sh, removed[i]->bus,
1386                                 removed[i]->target, removed[i]->lun);
1387                 if (sdev != NULL) {
1388                         scsi_remove_device(sdev);
1389                         scsi_device_put(sdev);
1390                 } else {
1391                         /* We don't expect to get here.
1392                          * future cmds to this device will get selection
1393                          * timeout as if the device was gone.
1394                          */
1395                         dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
1396                                 " for removal.", hostno, removed[i]->bus,
1397                                 removed[i]->target, removed[i]->lun);
1398                 }
1399                 kfree(removed[i]);
1400                 removed[i] = NULL;
1401         }
1402
1403         /* Notify scsi mid layer of any added devices */
1404         for (i = 0; i < nadded; i++) {
1405                 if (scsi_add_device(sh, added[i]->bus,
1406                         added[i]->target, added[i]->lun) == 0)
1407                         continue;
1408                 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
1409                         "device not added.\n", hostno, added[i]->bus,
1410                         added[i]->target, added[i]->lun);
1411                 /* now we have to remove it from h->dev,
1412                  * since it didn't get added to scsi mid layer
1413                  */
1414                 fixup_botched_add(h, added[i]);
1415         }
1416
1417 free_and_out:
1418         kfree(added);
1419         kfree(removed);
1420 }
1421
1422 /*
1423  * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
1424  * Assume's h->devlock is held.
1425  */
1426 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1427         int bus, int target, int lun)
1428 {
1429         int i;
1430         struct hpsa_scsi_dev_t *sd;
1431
1432         for (i = 0; i < h->ndevices; i++) {
1433                 sd = h->dev[i];
1434                 if (sd->bus == bus && sd->target == target && sd->lun == lun)
1435                         return sd;
1436         }
1437         return NULL;
1438 }
1439
1440 /* link sdev->hostdata to our per-device structure. */
1441 static int hpsa_slave_alloc(struct scsi_device *sdev)
1442 {
1443         struct hpsa_scsi_dev_t *sd;
1444         unsigned long flags;
1445         struct ctlr_info *h;
1446
1447         h = sdev_to_hba(sdev);
1448         spin_lock_irqsave(&h->devlock, flags);
1449         sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
1450                 sdev_id(sdev), sdev->lun);
1451         if (sd != NULL)
1452                 sdev->hostdata = sd;
1453         spin_unlock_irqrestore(&h->devlock, flags);
1454         return 0;
1455 }
1456
1457 static void hpsa_slave_destroy(struct scsi_device *sdev)
1458 {
1459         /* nothing to do. */
1460 }
1461
1462 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
1463 {
1464         int i;
1465
1466         if (!h->cmd_sg_list)
1467                 return;
1468         for (i = 0; i < h->nr_cmds; i++) {
1469                 kfree(h->cmd_sg_list[i]);
1470                 h->cmd_sg_list[i] = NULL;
1471         }
1472         kfree(h->cmd_sg_list);
1473         h->cmd_sg_list = NULL;
1474 }
1475
1476 static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
1477 {
1478         int i;
1479
1480         if (h->chainsize <= 0)
1481                 return 0;
1482
1483         h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
1484                                 GFP_KERNEL);
1485         if (!h->cmd_sg_list)
1486                 return -ENOMEM;
1487         for (i = 0; i < h->nr_cmds; i++) {
1488                 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
1489                                                 h->chainsize, GFP_KERNEL);
1490                 if (!h->cmd_sg_list[i])
1491                         goto clean;
1492         }
1493         return 0;
1494
1495 clean:
1496         hpsa_free_sg_chain_blocks(h);
1497         return -ENOMEM;
1498 }
1499
1500 static int hpsa_map_sg_chain_block(struct ctlr_info *h,
1501         struct CommandList *c)
1502 {
1503         struct SGDescriptor *chain_sg, *chain_block;
1504         u64 temp64;
1505
1506         chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1507         chain_block = h->cmd_sg_list[c->cmdindex];
1508         chain_sg->Ext = HPSA_SG_CHAIN;
1509         chain_sg->Len = sizeof(*chain_sg) *
1510                 (c->Header.SGTotal - h->max_cmd_sg_entries);
1511         temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
1512                                 PCI_DMA_TODEVICE);
1513         if (dma_mapping_error(&h->pdev->dev, temp64)) {
1514                 /* prevent subsequent unmapping */
1515                 chain_sg->Addr.lower = 0;
1516                 chain_sg->Addr.upper = 0;
1517                 return -1;
1518         }
1519         chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
1520         chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
1521         return 0;
1522 }
1523
1524 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
1525         struct CommandList *c)
1526 {
1527         struct SGDescriptor *chain_sg;
1528         union u64bit temp64;
1529
1530         if (c->Header.SGTotal <= h->max_cmd_sg_entries)
1531                 return;
1532
1533         chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1534         temp64.val32.lower = chain_sg->Addr.lower;
1535         temp64.val32.upper = chain_sg->Addr.upper;
1536         pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
1537 }
1538
1539
1540 /* Decode the various types of errors on ioaccel2 path.
1541  * Return 1 for any error that should generate a RAID path retry.
1542  * Return 0 for errors that don't require a RAID path retry.
1543  */
1544 static int handle_ioaccel_mode2_error(struct ctlr_info *h,
1545                                         struct CommandList *c,
1546                                         struct scsi_cmnd *cmd,
1547                                         struct io_accel2_cmd *c2)
1548 {
1549         int data_len;
1550         int retry = 0;
1551
1552         switch (c2->error_data.serv_response) {
1553         case IOACCEL2_SERV_RESPONSE_COMPLETE:
1554                 switch (c2->error_data.status) {
1555                 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD:
1556                         break;
1557                 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND:
1558                         dev_warn(&h->pdev->dev,
1559                                 "%s: task complete with check condition.\n",
1560                                 "HP SSD Smart Path");
1561                         cmd->result |= SAM_STAT_CHECK_CONDITION;
1562                         if (c2->error_data.data_present !=
1563                                         IOACCEL2_SENSE_DATA_PRESENT) {
1564                                 memset(cmd->sense_buffer, 0,
1565                                         SCSI_SENSE_BUFFERSIZE);
1566                                 break;
1567                         }
1568                         /* copy the sense data */
1569                         data_len = c2->error_data.sense_data_len;
1570                         if (data_len > SCSI_SENSE_BUFFERSIZE)
1571                                 data_len = SCSI_SENSE_BUFFERSIZE;
1572                         if (data_len > sizeof(c2->error_data.sense_data_buff))
1573                                 data_len =
1574                                         sizeof(c2->error_data.sense_data_buff);
1575                         memcpy(cmd->sense_buffer,
1576                                 c2->error_data.sense_data_buff, data_len);
1577                         retry = 1;
1578                         break;
1579                 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY:
1580                         dev_warn(&h->pdev->dev,
1581                                 "%s: task complete with BUSY status.\n",
1582                                 "HP SSD Smart Path");
1583                         retry = 1;
1584                         break;
1585                 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON:
1586                         dev_warn(&h->pdev->dev,
1587                                 "%s: task complete with reservation conflict.\n",
1588                                 "HP SSD Smart Path");
1589                         retry = 1;
1590                         break;
1591                 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL:
1592                         /* Make scsi midlayer do unlimited retries */
1593                         cmd->result = DID_IMM_RETRY << 16;
1594                         break;
1595                 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED:
1596                         dev_warn(&h->pdev->dev,
1597                                 "%s: task complete with aborted status.\n",
1598                                 "HP SSD Smart Path");
1599                         retry = 1;
1600                         break;
1601                 default:
1602                         dev_warn(&h->pdev->dev,
1603                                 "%s: task complete with unrecognized status: 0x%02x\n",
1604                                 "HP SSD Smart Path", c2->error_data.status);
1605                         retry = 1;
1606                         break;
1607                 }
1608                 break;
1609         case IOACCEL2_SERV_RESPONSE_FAILURE:
1610                 /* don't expect to get here. */
1611                 dev_warn(&h->pdev->dev,
1612                         "unexpected delivery or target failure, status = 0x%02x\n",
1613                         c2->error_data.status);
1614                 retry = 1;
1615                 break;
1616         case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE:
1617                 break;
1618         case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS:
1619                 break;
1620         case IOACCEL2_SERV_RESPONSE_TMF_REJECTED:
1621                 dev_warn(&h->pdev->dev, "task management function rejected.\n");
1622                 retry = 1;
1623                 break;
1624         case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN:
1625                 dev_warn(&h->pdev->dev, "task management function invalid LUN\n");
1626                 break;
1627         default:
1628                 dev_warn(&h->pdev->dev,
1629                         "%s: Unrecognized server response: 0x%02x\n",
1630                         "HP SSD Smart Path",
1631                         c2->error_data.serv_response);
1632                 retry = 1;
1633                 break;
1634         }
1635
1636         return retry;   /* retry on raid path? */
1637 }
1638
1639 static void process_ioaccel2_completion(struct ctlr_info *h,
1640                 struct CommandList *c, struct scsi_cmnd *cmd,
1641                 struct hpsa_scsi_dev_t *dev)
1642 {
1643         struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex];
1644         int raid_retry = 0;
1645
1646         /* check for good status */
1647         if (likely(c2->error_data.serv_response == 0 &&
1648                         c2->error_data.status == 0)) {
1649                 cmd_free(h, c);
1650                 cmd->scsi_done(cmd);
1651                 return;
1652         }
1653
1654         /* Any RAID offload error results in retry which will use
1655          * the normal I/O path so the controller can handle whatever's
1656          * wrong.
1657          */
1658         if (is_logical_dev_addr_mode(dev->scsi3addr) &&
1659                 c2->error_data.serv_response ==
1660                         IOACCEL2_SERV_RESPONSE_FAILURE) {
1661                 dev->offload_enabled = 0;
1662                 h->drv_req_rescan = 1;  /* schedule controller for a rescan */
1663                 cmd->result = DID_SOFT_ERROR << 16;
1664                 cmd_free(h, c);
1665                 cmd->scsi_done(cmd);
1666                 return;
1667         }
1668         raid_retry = handle_ioaccel_mode2_error(h, c, cmd, c2);
1669         /* If error found, disable Smart Path, schedule a rescan,
1670          * and force a retry on the standard path.
1671          */
1672         if (raid_retry) {
1673                 dev_warn(&h->pdev->dev, "%s: Retrying on standard path.\n",
1674                         "HP SSD Smart Path");
1675                 dev->offload_enabled = 0; /* Disable Smart Path */
1676                 h->drv_req_rescan = 1;    /* schedule controller rescan */
1677                 cmd->result = DID_SOFT_ERROR << 16;
1678         }
1679         cmd_free(h, c);
1680         cmd->scsi_done(cmd);
1681 }
1682
1683 static void complete_scsi_command(struct CommandList *cp)
1684 {
1685         struct scsi_cmnd *cmd;
1686         struct ctlr_info *h;
1687         struct ErrorInfo *ei;
1688         struct hpsa_scsi_dev_t *dev;
1689
1690         unsigned char sense_key;
1691         unsigned char asc;      /* additional sense code */
1692         unsigned char ascq;     /* additional sense code qualifier */
1693         unsigned long sense_data_size;
1694
1695         ei = cp->err_info;
1696         cmd = (struct scsi_cmnd *) cp->scsi_cmd;
1697         h = cp->h;
1698         dev = cmd->device->hostdata;
1699
1700         scsi_dma_unmap(cmd); /* undo the DMA mappings */
1701         if ((cp->cmd_type == CMD_SCSI) &&
1702                 (cp->Header.SGTotal > h->max_cmd_sg_entries))
1703                 hpsa_unmap_sg_chain_block(h, cp);
1704
1705         cmd->result = (DID_OK << 16);           /* host byte */
1706         cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
1707
1708         if (cp->cmd_type == CMD_IOACCEL2)
1709                 return process_ioaccel2_completion(h, cp, cmd, dev);
1710
1711         cmd->result |= ei->ScsiStatus;
1712
1713         scsi_set_resid(cmd, ei->ResidualCnt);
1714         if (ei->CommandStatus == 0) {
1715                 cmd_free(h, cp);
1716                 cmd->scsi_done(cmd);
1717                 return;
1718         }
1719
1720         /* copy the sense data */
1721         if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
1722                 sense_data_size = SCSI_SENSE_BUFFERSIZE;
1723         else
1724                 sense_data_size = sizeof(ei->SenseInfo);
1725         if (ei->SenseLen < sense_data_size)
1726                 sense_data_size = ei->SenseLen;
1727
1728         memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
1729
1730         /* For I/O accelerator commands, copy over some fields to the normal
1731          * CISS header used below for error handling.
1732          */
1733         if (cp->cmd_type == CMD_IOACCEL1) {
1734                 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex];
1735                 cp->Header.SGList = cp->Header.SGTotal = scsi_sg_count(cmd);
1736                 cp->Request.CDBLen = c->io_flags & IOACCEL1_IOFLAGS_CDBLEN_MASK;
1737                 cp->Header.Tag.lower = c->Tag.lower;
1738                 cp->Header.Tag.upper = c->Tag.upper;
1739                 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8);
1740                 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen);
1741
1742                 /* Any RAID offload error results in retry which will use
1743                  * the normal I/O path so the controller can handle whatever's
1744                  * wrong.
1745                  */
1746                 if (is_logical_dev_addr_mode(dev->scsi3addr)) {
1747                         if (ei->CommandStatus == CMD_IOACCEL_DISABLED)
1748                                 dev->offload_enabled = 0;
1749                         cmd->result = DID_SOFT_ERROR << 16;
1750                         cmd_free(h, cp);
1751                         cmd->scsi_done(cmd);
1752                         return;
1753                 }
1754         }
1755
1756         /* an error has occurred */
1757         switch (ei->CommandStatus) {
1758
1759         case CMD_TARGET_STATUS:
1760                 if (ei->ScsiStatus) {
1761                         /* Get sense key */
1762                         sense_key = 0xf & ei->SenseInfo[2];
1763                         /* Get additional sense code */
1764                         asc = ei->SenseInfo[12];
1765                         /* Get addition sense code qualifier */
1766                         ascq = ei->SenseInfo[13];
1767                 }
1768
1769                 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
1770                         if (check_for_unit_attention(h, cp))
1771                                 break;
1772                         if (sense_key == ILLEGAL_REQUEST) {
1773                                 /*
1774                                  * SCSI REPORT_LUNS is commonly unsupported on
1775                                  * Smart Array.  Suppress noisy complaint.
1776                                  */
1777                                 if (cp->Request.CDB[0] == REPORT_LUNS)
1778                                         break;
1779
1780                                 /* If ASC/ASCQ indicate Logical Unit
1781                                  * Not Supported condition,
1782                                  */
1783                                 if ((asc == 0x25) && (ascq == 0x0)) {
1784                                         dev_warn(&h->pdev->dev, "cp %p "
1785                                                 "has check condition\n", cp);
1786                                         break;
1787                                 }
1788                         }
1789
1790                         if (sense_key == NOT_READY) {
1791                                 /* If Sense is Not Ready, Logical Unit
1792                                  * Not ready, Manual Intervention
1793                                  * required
1794                                  */
1795                                 if ((asc == 0x04) && (ascq == 0x03)) {
1796                                         dev_warn(&h->pdev->dev, "cp %p "
1797                                                 "has check condition: unit "
1798                                                 "not ready, manual "
1799                                                 "intervention required\n", cp);
1800                                         break;
1801                                 }
1802                         }
1803                         if (sense_key == ABORTED_COMMAND) {
1804                                 /* Aborted command is retryable */
1805                                 dev_warn(&h->pdev->dev, "cp %p "
1806                                         "has check condition: aborted command: "
1807                                         "ASC: 0x%x, ASCQ: 0x%x\n",
1808                                         cp, asc, ascq);
1809                                 cmd->result |= DID_SOFT_ERROR << 16;
1810                                 break;
1811                         }
1812                         /* Must be some other type of check condition */
1813                         dev_dbg(&h->pdev->dev, "cp %p has check condition: "
1814                                         "unknown type: "
1815                                         "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1816                                         "Returning result: 0x%x, "
1817                                         "cmd=[%02x %02x %02x %02x %02x "
1818                                         "%02x %02x %02x %02x %02x %02x "
1819                                         "%02x %02x %02x %02x %02x]\n",
1820                                         cp, sense_key, asc, ascq,
1821                                         cmd->result,
1822                                         cmd->cmnd[0], cmd->cmnd[1],
1823                                         cmd->cmnd[2], cmd->cmnd[3],
1824                                         cmd->cmnd[4], cmd->cmnd[5],
1825                                         cmd->cmnd[6], cmd->cmnd[7],
1826                                         cmd->cmnd[8], cmd->cmnd[9],
1827                                         cmd->cmnd[10], cmd->cmnd[11],
1828                                         cmd->cmnd[12], cmd->cmnd[13],
1829                                         cmd->cmnd[14], cmd->cmnd[15]);
1830                         break;
1831                 }
1832
1833
1834                 /* Problem was not a check condition
1835                  * Pass it up to the upper layers...
1836                  */
1837                 if (ei->ScsiStatus) {
1838                         dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
1839                                 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1840                                 "Returning result: 0x%x\n",
1841                                 cp, ei->ScsiStatus,
1842                                 sense_key, asc, ascq,
1843                                 cmd->result);
1844                 } else {  /* scsi status is zero??? How??? */
1845                         dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
1846                                 "Returning no connection.\n", cp),
1847
1848                         /* Ordinarily, this case should never happen,
1849                          * but there is a bug in some released firmware
1850                          * revisions that allows it to happen if, for
1851                          * example, a 4100 backplane loses power and
1852                          * the tape drive is in it.  We assume that
1853                          * it's a fatal error of some kind because we
1854                          * can't show that it wasn't. We will make it
1855                          * look like selection timeout since that is
1856                          * the most common reason for this to occur,
1857                          * and it's severe enough.
1858                          */
1859
1860                         cmd->result = DID_NO_CONNECT << 16;
1861                 }
1862                 break;
1863
1864         case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1865                 break;
1866         case CMD_DATA_OVERRUN:
1867                 dev_warn(&h->pdev->dev, "cp %p has"
1868                         " completed with data overrun "
1869                         "reported\n", cp);
1870                 break;
1871         case CMD_INVALID: {
1872                 /* print_bytes(cp, sizeof(*cp), 1, 0);
1873                 print_cmd(cp); */
1874                 /* We get CMD_INVALID if you address a non-existent device
1875                  * instead of a selection timeout (no response).  You will
1876                  * see this if you yank out a drive, then try to access it.
1877                  * This is kind of a shame because it means that any other
1878                  * CMD_INVALID (e.g. driver bug) will get interpreted as a
1879                  * missing target. */
1880                 cmd->result = DID_NO_CONNECT << 16;
1881         }
1882                 break;
1883         case CMD_PROTOCOL_ERR:
1884                 cmd->result = DID_ERROR << 16;
1885                 dev_warn(&h->pdev->dev, "cp %p has "
1886                         "protocol error\n", cp);
1887                 break;
1888         case CMD_HARDWARE_ERR:
1889                 cmd->result = DID_ERROR << 16;
1890                 dev_warn(&h->pdev->dev, "cp %p had  hardware error\n", cp);
1891                 break;
1892         case CMD_CONNECTION_LOST:
1893                 cmd->result = DID_ERROR << 16;
1894                 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
1895                 break;
1896         case CMD_ABORTED:
1897                 cmd->result = DID_ABORT << 16;
1898                 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
1899                                 cp, ei->ScsiStatus);
1900                 break;
1901         case CMD_ABORT_FAILED:
1902                 cmd->result = DID_ERROR << 16;
1903                 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
1904                 break;
1905         case CMD_UNSOLICITED_ABORT:
1906                 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
1907                 dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
1908                         "abort\n", cp);
1909                 break;
1910         case CMD_TIMEOUT:
1911                 cmd->result = DID_TIME_OUT << 16;
1912                 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
1913                 break;
1914         case CMD_UNABORTABLE:
1915                 cmd->result = DID_ERROR << 16;
1916                 dev_warn(&h->pdev->dev, "Command unabortable\n");
1917                 break;
1918         case CMD_IOACCEL_DISABLED:
1919                 /* This only handles the direct pass-through case since RAID
1920                  * offload is handled above.  Just attempt a retry.
1921                  */
1922                 cmd->result = DID_SOFT_ERROR << 16;
1923                 dev_warn(&h->pdev->dev,
1924                                 "cp %p had HP SSD Smart Path error\n", cp);
1925                 break;
1926         default:
1927                 cmd->result = DID_ERROR << 16;
1928                 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
1929                                 cp, ei->CommandStatus);
1930         }
1931         cmd_free(h, cp);
1932         cmd->scsi_done(cmd);
1933 }
1934
1935 static void hpsa_pci_unmap(struct pci_dev *pdev,
1936         struct CommandList *c, int sg_used, int data_direction)
1937 {
1938         int i;
1939         union u64bit addr64;
1940
1941         for (i = 0; i < sg_used; i++) {
1942                 addr64.val32.lower = c->SG[i].Addr.lower;
1943                 addr64.val32.upper = c->SG[i].Addr.upper;
1944                 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
1945                         data_direction);
1946         }
1947 }
1948
1949 static int hpsa_map_one(struct pci_dev *pdev,
1950                 struct CommandList *cp,
1951                 unsigned char *buf,
1952                 size_t buflen,
1953                 int data_direction)
1954 {
1955         u64 addr64;
1956
1957         if (buflen == 0 || data_direction == PCI_DMA_NONE) {
1958                 cp->Header.SGList = 0;
1959                 cp->Header.SGTotal = 0;
1960                 return 0;
1961         }
1962
1963         addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
1964         if (dma_mapping_error(&pdev->dev, addr64)) {
1965                 /* Prevent subsequent unmap of something never mapped */
1966                 cp->Header.SGList = 0;
1967                 cp->Header.SGTotal = 0;
1968                 return -1;
1969         }
1970         cp->SG[0].Addr.lower =
1971           (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
1972         cp->SG[0].Addr.upper =
1973           (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
1974         cp->SG[0].Len = buflen;
1975         cp->SG[0].Ext = HPSA_SG_LAST; /* we are not chaining */
1976         cp->Header.SGList = (u8) 1;   /* no. SGs contig in this cmd */
1977         cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
1978         return 0;
1979 }
1980
1981 static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
1982         struct CommandList *c)
1983 {
1984         DECLARE_COMPLETION_ONSTACK(wait);
1985
1986         c->waiting = &wait;
1987         enqueue_cmd_and_start_io(h, c);
1988         wait_for_completion(&wait);
1989 }
1990
1991 static u32 lockup_detected(struct ctlr_info *h)
1992 {
1993         int cpu;
1994         u32 rc, *lockup_detected;
1995
1996         cpu = get_cpu();
1997         lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
1998         rc = *lockup_detected;
1999         put_cpu();
2000         return rc;
2001 }
2002
2003 static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h,
2004         struct CommandList *c)
2005 {
2006         /* If controller lockup detected, fake a hardware error. */
2007         if (unlikely(lockup_detected(h)))
2008                 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
2009         else
2010                 hpsa_scsi_do_simple_cmd_core(h, c);
2011 }
2012
2013 #define MAX_DRIVER_CMD_RETRIES 25
2014 static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
2015         struct CommandList *c, int data_direction)
2016 {
2017         int backoff_time = 10, retry_count = 0;
2018
2019         do {
2020                 memset(c->err_info, 0, sizeof(*c->err_info));
2021                 hpsa_scsi_do_simple_cmd_core(h, c);
2022                 retry_count++;
2023                 if (retry_count > 3) {
2024                         msleep(backoff_time);
2025                         if (backoff_time < 1000)
2026                                 backoff_time *= 2;
2027                 }
2028         } while ((check_for_unit_attention(h, c) ||
2029                         check_for_busy(h, c)) &&
2030                         retry_count <= MAX_DRIVER_CMD_RETRIES);
2031         hpsa_pci_unmap(h->pdev, c, 1, data_direction);
2032 }
2033
2034 static void hpsa_print_cmd(struct ctlr_info *h, char *txt,
2035                                 struct CommandList *c)
2036 {
2037         const u8 *cdb = c->Request.CDB;
2038         const u8 *lun = c->Header.LUN.LunAddrBytes;
2039
2040         dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x"
2041         " CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n",
2042                 txt, lun[0], lun[1], lun[2], lun[3],
2043                 lun[4], lun[5], lun[6], lun[7],
2044                 cdb[0], cdb[1], cdb[2], cdb[3],
2045                 cdb[4], cdb[5], cdb[6], cdb[7],
2046                 cdb[8], cdb[9], cdb[10], cdb[11],
2047                 cdb[12], cdb[13], cdb[14], cdb[15]);
2048 }
2049
2050 static void hpsa_scsi_interpret_error(struct ctlr_info *h,
2051                         struct CommandList *cp)
2052 {
2053         const struct ErrorInfo *ei = cp->err_info;
2054         struct device *d = &cp->h->pdev->dev;
2055         const u8 *sd = ei->SenseInfo;
2056
2057         switch (ei->CommandStatus) {
2058         case CMD_TARGET_STATUS:
2059                 hpsa_print_cmd(h, "SCSI status", cp);
2060                 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION)
2061                         dev_warn(d, "SCSI Status = 02, Sense key = %02x, ASC = %02x, ASCQ = %02x\n",
2062                                 sd[2] & 0x0f, sd[12], sd[13]);
2063                 else
2064                         dev_warn(d, "SCSI Status = %02x\n", ei->ScsiStatus);
2065                 if (ei->ScsiStatus == 0)
2066                         dev_warn(d, "SCSI status is abnormally zero.  "
2067                         "(probably indicates selection timeout "
2068                         "reported incorrectly due to a known "
2069                         "firmware bug, circa July, 2001.)\n");
2070                 break;
2071         case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
2072                 break;
2073         case CMD_DATA_OVERRUN:
2074                 hpsa_print_cmd(h, "overrun condition", cp);
2075                 break;
2076         case CMD_INVALID: {
2077                 /* controller unfortunately reports SCSI passthru's
2078                  * to non-existent targets as invalid commands.
2079                  */
2080                 hpsa_print_cmd(h, "invalid command", cp);
2081                 dev_warn(d, "probably means device no longer present\n");
2082                 }
2083                 break;
2084         case CMD_PROTOCOL_ERR:
2085                 hpsa_print_cmd(h, "protocol error", cp);
2086                 break;
2087         case CMD_HARDWARE_ERR:
2088                 hpsa_print_cmd(h, "hardware error", cp);
2089                 break;
2090         case CMD_CONNECTION_LOST:
2091                 hpsa_print_cmd(h, "connection lost", cp);
2092                 break;
2093         case CMD_ABORTED:
2094                 hpsa_print_cmd(h, "aborted", cp);
2095                 break;
2096         case CMD_ABORT_FAILED:
2097                 hpsa_print_cmd(h, "abort failed", cp);
2098                 break;
2099         case CMD_UNSOLICITED_ABORT:
2100                 hpsa_print_cmd(h, "unsolicited abort", cp);
2101                 break;
2102         case CMD_TIMEOUT:
2103                 hpsa_print_cmd(h, "timed out", cp);
2104                 break;
2105         case CMD_UNABORTABLE:
2106                 hpsa_print_cmd(h, "unabortable", cp);
2107                 break;
2108         default:
2109                 hpsa_print_cmd(h, "unknown status", cp);
2110                 dev_warn(d, "Unknown command status %x\n",
2111                                 ei->CommandStatus);
2112         }
2113 }
2114
2115 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
2116                         u16 page, unsigned char *buf,
2117                         unsigned char bufsize)
2118 {
2119         int rc = IO_OK;
2120         struct CommandList *c;
2121         struct ErrorInfo *ei;
2122
2123         c = cmd_special_alloc(h);
2124
2125         if (c == NULL) {                        /* trouble... */
2126                 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2127                 return -ENOMEM;
2128         }
2129
2130         if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
2131                         page, scsi3addr, TYPE_CMD)) {
2132                 rc = -1;
2133                 goto out;
2134         }
2135         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
2136         ei = c->err_info;
2137         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2138                 hpsa_scsi_interpret_error(h, c);
2139                 rc = -1;
2140         }
2141 out:
2142         cmd_special_free(h, c);
2143         return rc;
2144 }
2145
2146 static int hpsa_bmic_ctrl_mode_sense(struct ctlr_info *h,
2147                 unsigned char *scsi3addr, unsigned char page,
2148                 struct bmic_controller_parameters *buf, size_t bufsize)
2149 {
2150         int rc = IO_OK;
2151         struct CommandList *c;
2152         struct ErrorInfo *ei;
2153
2154         c = cmd_special_alloc(h);
2155
2156         if (c == NULL) {                        /* trouble... */
2157                 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2158                 return -ENOMEM;
2159         }
2160
2161         if (fill_cmd(c, BMIC_SENSE_CONTROLLER_PARAMETERS, h, buf, bufsize,
2162                         page, scsi3addr, TYPE_CMD)) {
2163                 rc = -1;
2164                 goto out;
2165         }
2166         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
2167         ei = c->err_info;
2168         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2169                 hpsa_scsi_interpret_error(h, c);
2170                 rc = -1;
2171         }
2172 out:
2173         cmd_special_free(h, c);
2174         return rc;
2175         }
2176
2177 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr,
2178         u8 reset_type)
2179 {
2180         int rc = IO_OK;
2181         struct CommandList *c;
2182         struct ErrorInfo *ei;
2183
2184         c = cmd_special_alloc(h);
2185
2186         if (c == NULL) {                        /* trouble... */
2187                 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2188                 return -ENOMEM;
2189         }
2190
2191         /* fill_cmd can't fail here, no data buffer to map. */
2192         (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
2193                         scsi3addr, TYPE_MSG);
2194         c->Request.CDB[1] = reset_type; /* fill_cmd defaults to LUN reset */
2195         hpsa_scsi_do_simple_cmd_core(h, c);
2196         /* no unmap needed here because no data xfer. */
2197
2198         ei = c->err_info;
2199         if (ei->CommandStatus != 0) {
2200                 hpsa_scsi_interpret_error(h, c);
2201                 rc = -1;
2202         }
2203         cmd_special_free(h, c);
2204         return rc;
2205 }
2206
2207 static void hpsa_get_raid_level(struct ctlr_info *h,
2208         unsigned char *scsi3addr, unsigned char *raid_level)
2209 {
2210         int rc;
2211         unsigned char *buf;
2212
2213         *raid_level = RAID_UNKNOWN;
2214         buf = kzalloc(64, GFP_KERNEL);
2215         if (!buf)
2216                 return;
2217         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0xC1, buf, 64);
2218         if (rc == 0)
2219                 *raid_level = buf[8];
2220         if (*raid_level > RAID_UNKNOWN)
2221                 *raid_level = RAID_UNKNOWN;
2222         kfree(buf);
2223         return;
2224 }
2225
2226 #define HPSA_MAP_DEBUG
2227 #ifdef HPSA_MAP_DEBUG
2228 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc,
2229                                 struct raid_map_data *map_buff)
2230 {
2231         struct raid_map_disk_data *dd = &map_buff->data[0];
2232         int map, row, col;
2233         u16 map_cnt, row_cnt, disks_per_row;
2234
2235         if (rc != 0)
2236                 return;
2237
2238         /* Show details only if debugging has been activated. */
2239         if (h->raid_offload_debug < 2)
2240                 return;
2241
2242         dev_info(&h->pdev->dev, "structure_size = %u\n",
2243                                 le32_to_cpu(map_buff->structure_size));
2244         dev_info(&h->pdev->dev, "volume_blk_size = %u\n",
2245                         le32_to_cpu(map_buff->volume_blk_size));
2246         dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n",
2247                         le64_to_cpu(map_buff->volume_blk_cnt));
2248         dev_info(&h->pdev->dev, "physicalBlockShift = %u\n",
2249                         map_buff->phys_blk_shift);
2250         dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n",
2251                         map_buff->parity_rotation_shift);
2252         dev_info(&h->pdev->dev, "strip_size = %u\n",
2253                         le16_to_cpu(map_buff->strip_size));
2254         dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n",
2255                         le64_to_cpu(map_buff->disk_starting_blk));
2256         dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n",
2257                         le64_to_cpu(map_buff->disk_blk_cnt));
2258         dev_info(&h->pdev->dev, "data_disks_per_row = %u\n",
2259                         le16_to_cpu(map_buff->data_disks_per_row));
2260         dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n",
2261                         le16_to_cpu(map_buff->metadata_disks_per_row));
2262         dev_info(&h->pdev->dev, "row_cnt = %u\n",
2263                         le16_to_cpu(map_buff->row_cnt));
2264         dev_info(&h->pdev->dev, "layout_map_count = %u\n",
2265                         le16_to_cpu(map_buff->layout_map_count));
2266         dev_info(&h->pdev->dev, "flags = %u\n",
2267                         le16_to_cpu(map_buff->flags));
2268         if (map_buff->flags & RAID_MAP_FLAG_ENCRYPT_ON)
2269                 dev_info(&h->pdev->dev, "encrypytion = ON\n");
2270         else
2271                 dev_info(&h->pdev->dev, "encrypytion = OFF\n");
2272         dev_info(&h->pdev->dev, "dekindex = %u\n",
2273                         le16_to_cpu(map_buff->dekindex));
2274
2275         map_cnt = le16_to_cpu(map_buff->layout_map_count);
2276         for (map = 0; map < map_cnt; map++) {
2277                 dev_info(&h->pdev->dev, "Map%u:\n", map);
2278                 row_cnt = le16_to_cpu(map_buff->row_cnt);
2279                 for (row = 0; row < row_cnt; row++) {
2280                         dev_info(&h->pdev->dev, "  Row%u:\n", row);
2281                         disks_per_row =
2282                                 le16_to_cpu(map_buff->data_disks_per_row);
2283                         for (col = 0; col < disks_per_row; col++, dd++)
2284                                 dev_info(&h->pdev->dev,
2285                                         "    D%02u: h=0x%04x xor=%u,%u\n",
2286                                         col, dd->ioaccel_handle,
2287                                         dd->xor_mult[0], dd->xor_mult[1]);
2288                         disks_per_row =
2289                                 le16_to_cpu(map_buff->metadata_disks_per_row);
2290                         for (col = 0; col < disks_per_row; col++, dd++)
2291                                 dev_info(&h->pdev->dev,
2292                                         "    M%02u: h=0x%04x xor=%u,%u\n",
2293                                         col, dd->ioaccel_handle,
2294                                         dd->xor_mult[0], dd->xor_mult[1]);
2295                 }
2296         }
2297 }
2298 #else
2299 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h,
2300                         __attribute__((unused)) int rc,
2301                         __attribute__((unused)) struct raid_map_data *map_buff)
2302 {
2303 }
2304 #endif
2305
2306 static int hpsa_get_raid_map(struct ctlr_info *h,
2307         unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
2308 {
2309         int rc = 0;
2310         struct CommandList *c;
2311         struct ErrorInfo *ei;
2312
2313         c = cmd_special_alloc(h);
2314         if (c == NULL) {
2315                 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2316                 return -ENOMEM;
2317         }
2318         if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map,
2319                         sizeof(this_device->raid_map), 0,
2320                         scsi3addr, TYPE_CMD)) {
2321                 dev_warn(&h->pdev->dev, "Out of memory in hpsa_get_raid_map()\n");
2322                 cmd_special_free(h, c);
2323                 return -ENOMEM;
2324         }
2325         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
2326         ei = c->err_info;
2327         if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
2328                 hpsa_scsi_interpret_error(h, c);
2329                 cmd_special_free(h, c);
2330                 return -1;
2331         }
2332         cmd_special_free(h, c);
2333
2334         /* @todo in the future, dynamically allocate RAID map memory */
2335         if (le32_to_cpu(this_device->raid_map.structure_size) >
2336                                 sizeof(this_device->raid_map)) {
2337                 dev_warn(&h->pdev->dev, "RAID map size is too large!\n");
2338                 rc = -1;
2339         }
2340         hpsa_debug_map_buff(h, rc, &this_device->raid_map);
2341         return rc;
2342 }
2343
2344 static int hpsa_vpd_page_supported(struct ctlr_info *h,
2345         unsigned char scsi3addr[], u8 page)
2346 {
2347         int rc;
2348         int i;
2349         int pages;
2350         unsigned char *buf, bufsize;
2351
2352         buf = kzalloc(256, GFP_KERNEL);
2353         if (!buf)
2354                 return 0;
2355
2356         /* Get the size of the page list first */
2357         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
2358                                 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
2359                                 buf, HPSA_VPD_HEADER_SZ);
2360         if (rc != 0)
2361                 goto exit_unsupported;
2362         pages = buf[3];
2363         if ((pages + HPSA_VPD_HEADER_SZ) <= 255)
2364                 bufsize = pages + HPSA_VPD_HEADER_SZ;
2365         else
2366                 bufsize = 255;
2367
2368         /* Get the whole VPD page list */
2369         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
2370                                 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES,
2371                                 buf, bufsize);
2372         if (rc != 0)
2373                 goto exit_unsupported;
2374
2375         pages = buf[3];
2376         for (i = 1; i <= pages; i++)
2377                 if (buf[3 + i] == page)
2378                         goto exit_supported;
2379 exit_unsupported:
2380         kfree(buf);
2381         return 0;
2382 exit_supported:
2383         kfree(buf);
2384         return 1;
2385 }
2386
2387 static void hpsa_get_ioaccel_status(struct ctlr_info *h,
2388         unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device)
2389 {
2390         int rc;
2391         unsigned char *buf;
2392         u8 ioaccel_status;
2393
2394         this_device->offload_config = 0;
2395         this_device->offload_enabled = 0;
2396
2397         buf = kzalloc(64, GFP_KERNEL);
2398         if (!buf)
2399                 return;
2400         if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS))
2401                 goto out;
2402         rc = hpsa_scsi_do_inquiry(h, scsi3addr,
2403                         VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64);
2404         if (rc != 0)
2405                 goto out;
2406
2407 #define IOACCEL_STATUS_BYTE 4
2408 #define OFFLOAD_CONFIGURED_BIT 0x01
2409 #define OFFLOAD_ENABLED_BIT 0x02
2410         ioaccel_status = buf[IOACCEL_STATUS_BYTE];
2411         this_device->offload_config =
2412                 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT);
2413         if (this_device->offload_config) {
2414                 this_device->offload_enabled =
2415                         !!(ioaccel_status & OFFLOAD_ENABLED_BIT);
2416                 if (hpsa_get_raid_map(h, scsi3addr, this_device))
2417                         this_device->offload_enabled = 0;
2418         }
2419 out:
2420         kfree(buf);
2421         return;
2422 }
2423
2424 /* Get the device id from inquiry page 0x83 */
2425 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
2426         unsigned char *device_id, int buflen)
2427 {
2428         int rc;
2429         unsigned char *buf;
2430
2431         if (buflen > 16)
2432                 buflen = 16;
2433         buf = kzalloc(64, GFP_KERNEL);
2434         if (!buf)
2435                 return -ENOMEM;
2436         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0x83, buf, 64);
2437         if (rc == 0)
2438                 memcpy(device_id, &buf[8], buflen);
2439         kfree(buf);
2440         return rc != 0;
2441 }
2442
2443 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
2444                 struct ReportLUNdata *buf, int bufsize,
2445                 int extended_response)
2446 {
2447         int rc = IO_OK;
2448         struct CommandList *c;
2449         unsigned char scsi3addr[8];
2450         struct ErrorInfo *ei;
2451
2452         c = cmd_special_alloc(h);
2453         if (c == NULL) {                        /* trouble... */
2454                 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2455                 return -1;
2456         }
2457         /* address the controller */
2458         memset(scsi3addr, 0, sizeof(scsi3addr));
2459         if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
2460                 buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
2461                 rc = -1;
2462                 goto out;
2463         }
2464         if (extended_response)
2465                 c->Request.CDB[1] = extended_response;
2466         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
2467         ei = c->err_info;
2468         if (ei->CommandStatus != 0 &&
2469             ei->CommandStatus != CMD_DATA_UNDERRUN) {
2470                 hpsa_scsi_interpret_error(h, c);
2471                 rc = -1;
2472         } else {
2473                 if (buf->extended_response_flag != extended_response) {
2474                         dev_err(&h->pdev->dev,
2475                                 "report luns requested format %u, got %u\n",
2476                                 extended_response,
2477                                 buf->extended_response_flag);
2478                         rc = -1;
2479                 }
2480         }
2481 out:
2482         cmd_special_free(h, c);
2483         return rc;
2484 }
2485
2486 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
2487                 struct ReportLUNdata *buf,
2488                 int bufsize, int extended_response)
2489 {
2490         return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
2491 }
2492
2493 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
2494                 struct ReportLUNdata *buf, int bufsize)
2495 {
2496         return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
2497 }
2498
2499 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
2500         int bus, int target, int lun)
2501 {
2502         device->bus = bus;
2503         device->target = target;
2504         device->lun = lun;
2505 }
2506
2507 /* Use VPD inquiry to get details of volume status */
2508 static int hpsa_get_volume_status(struct ctlr_info *h,
2509                                         unsigned char scsi3addr[])
2510 {
2511         int rc;
2512         int status;
2513         int size;
2514         unsigned char *buf;
2515
2516         buf = kzalloc(64, GFP_KERNEL);
2517         if (!buf)
2518                 return HPSA_VPD_LV_STATUS_UNSUPPORTED;
2519
2520         /* Does controller have VPD for logical volume status? */
2521         if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS))
2522                 goto exit_failed;
2523
2524         /* Get the size of the VPD return buffer */
2525         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
2526                                         buf, HPSA_VPD_HEADER_SZ);
2527         if (rc != 0)
2528                 goto exit_failed;
2529         size = buf[3];
2530
2531         /* Now get the whole VPD buffer */
2532         rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS,
2533                                         buf, size + HPSA_VPD_HEADER_SZ);
2534         if (rc != 0)
2535                 goto exit_failed;
2536         status = buf[4]; /* status byte */
2537
2538         kfree(buf);
2539         return status;
2540 exit_failed:
2541         kfree(buf);
2542         return HPSA_VPD_LV_STATUS_UNSUPPORTED;
2543 }
2544
2545 /* Determine offline status of a volume.
2546  * Return either:
2547  *  0 (not offline)
2548  *  0xff (offline for unknown reasons)
2549  *  # (integer code indicating one of several NOT READY states
2550  *     describing why a volume is to be kept offline)
2551  */
2552 static int hpsa_volume_offline(struct ctlr_info *h,
2553                                         unsigned char scsi3addr[])
2554 {
2555         struct CommandList *c;
2556         unsigned char *sense, sense_key, asc, ascq;
2557         int ldstat = 0;
2558         u16 cmd_status;
2559         u8 scsi_status;
2560 #define ASC_LUN_NOT_READY 0x04
2561 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04
2562 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02
2563
2564         c = cmd_alloc(h);
2565         if (!c)
2566                 return 0;
2567         (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD);
2568         hpsa_scsi_do_simple_cmd_core(h, c);
2569         sense = c->err_info->SenseInfo;
2570         sense_key = sense[2];
2571         asc = sense[12];
2572         ascq = sense[13];
2573         cmd_status = c->err_info->CommandStatus;
2574         scsi_status = c->err_info->ScsiStatus;
2575         cmd_free(h, c);
2576         /* Is the volume 'not ready'? */
2577         if (cmd_status != CMD_TARGET_STATUS ||
2578                 scsi_status != SAM_STAT_CHECK_CONDITION ||
2579                 sense_key != NOT_READY ||
2580                 asc != ASC_LUN_NOT_READY)  {
2581                 return 0;
2582         }
2583
2584         /* Determine the reason for not ready state */
2585         ldstat = hpsa_get_volume_status(h, scsi3addr);
2586
2587         /* Keep volume offline in certain cases: */
2588         switch (ldstat) {
2589         case HPSA_LV_UNDERGOING_ERASE:
2590         case HPSA_LV_UNDERGOING_RPI:
2591         case HPSA_LV_PENDING_RPI:
2592         case HPSA_LV_ENCRYPTED_NO_KEY:
2593         case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER:
2594         case HPSA_LV_UNDERGOING_ENCRYPTION:
2595         case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING:
2596         case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER:
2597                 return ldstat;
2598         case HPSA_VPD_LV_STATUS_UNSUPPORTED:
2599                 /* If VPD status page isn't available,
2600                  * use ASC/ASCQ to determine state
2601                  */
2602                 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) ||
2603                         (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ))
2604                         return ldstat;
2605                 break;
2606         default:
2607                 break;
2608         }
2609         return 0;
2610 }
2611
2612 static int hpsa_update_device_info(struct ctlr_info *h,
2613         unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
2614         unsigned char *is_OBDR_device)
2615 {
2616
2617 #define OBDR_SIG_OFFSET 43
2618 #define OBDR_TAPE_SIG "$DR-10"
2619 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
2620 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
2621
2622         unsigned char *inq_buff;
2623         unsigned char *obdr_sig;
2624
2625         inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
2626         if (!inq_buff)
2627                 goto bail_out;
2628
2629         /* Do an inquiry to the device to see what it is. */
2630         if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
2631                 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
2632                 /* Inquiry failed (msg printed already) */
2633                 dev_err(&h->pdev->dev,
2634                         "hpsa_update_device_info: inquiry failed\n");
2635                 goto bail_out;
2636         }
2637
2638         this_device->devtype = (inq_buff[0] & 0x1f);
2639         memcpy(this_device->scsi3addr, scsi3addr, 8);
2640         memcpy(this_device->vendor, &inq_buff[8],
2641                 sizeof(this_device->vendor));
2642         memcpy(this_device->model, &inq_buff[16],
2643                 sizeof(this_device->model));
2644         memset(this_device->device_id, 0,
2645                 sizeof(this_device->device_id));
2646         hpsa_get_device_id(h, scsi3addr, this_device->device_id,
2647                 sizeof(this_device->device_id));
2648
2649         if (this_device->devtype == TYPE_DISK &&
2650                 is_logical_dev_addr_mode(scsi3addr)) {
2651                 int volume_offline;
2652
2653                 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
2654                 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC)
2655                         hpsa_get_ioaccel_status(h, scsi3addr, this_device);
2656                 volume_offline = hpsa_volume_offline(h, scsi3addr);
2657                 if (volume_offline < 0 || volume_offline > 0xff)
2658                         volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED;
2659                 this_device->volume_offline = volume_offline & 0xff;
2660         } else {
2661                 this_device->raid_level = RAID_UNKNOWN;
2662                 this_device->offload_config = 0;
2663                 this_device->offload_enabled = 0;
2664                 this_device->volume_offline = 0;
2665         }
2666
2667         if (is_OBDR_device) {
2668                 /* See if this is a One-Button-Disaster-Recovery device
2669                  * by looking for "$DR-10" at offset 43 in inquiry data.
2670                  */
2671                 obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
2672                 *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
2673                                         strncmp(obdr_sig, OBDR_TAPE_SIG,
2674                                                 OBDR_SIG_LEN) == 0);
2675         }
2676
2677         kfree(inq_buff);
2678         return 0;
2679
2680 bail_out:
2681         kfree(inq_buff);
2682         return 1;
2683 }
2684
2685 static unsigned char *ext_target_model[] = {
2686         "MSA2012",
2687         "MSA2024",
2688         "MSA2312",
2689         "MSA2324",
2690         "P2000 G3 SAS",
2691         "MSA 2040 SAS",
2692         NULL,
2693 };
2694
2695 static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
2696 {
2697         int i;
2698
2699         for (i = 0; ext_target_model[i]; i++)
2700                 if (strncmp(device->model, ext_target_model[i],
2701                         strlen(ext_target_model[i])) == 0)
2702                         return 1;
2703         return 0;
2704 }
2705
2706 /* Helper function to assign bus, target, lun mapping of devices.
2707  * Puts non-external target logical volumes on bus 0, external target logical
2708  * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
2709  * Logical drive target and lun are assigned at this time, but
2710  * physical device lun and target assignment are deferred (assigned
2711  * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
2712  */
2713 static void figure_bus_target_lun(struct ctlr_info *h,
2714         u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
2715 {
2716         u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
2717
2718         if (!is_logical_dev_addr_mode(lunaddrbytes)) {
2719                 /* physical device, target and lun filled in later */
2720                 if (is_hba_lunid(lunaddrbytes))
2721                         hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
2722                 else
2723                         /* defer target, lun assignment for physical devices */
2724                         hpsa_set_bus_target_lun(device, 2, -1, -1);
2725                 return;
2726         }
2727         /* It's a logical device */
2728         if (is_ext_target(h, device)) {
2729                 /* external target way, put logicals on bus 1
2730                  * and match target/lun numbers box
2731                  * reports, other smart array, bus 0, target 0, match lunid
2732                  */
2733                 hpsa_set_bus_target_lun(device,
2734                         1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
2735                 return;
2736         }
2737         hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
2738 }
2739
2740 /*
2741  * If there is no lun 0 on a target, linux won't find any devices.
2742  * For the external targets (arrays), we have to manually detect the enclosure
2743  * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
2744  * it for some reason.  *tmpdevice is the target we're adding,
2745  * this_device is a pointer into the current element of currentsd[]
2746  * that we're building up in update_scsi_devices(), below.
2747  * lunzerobits is a bitmap that tracks which targets already have a
2748  * lun 0 assigned.
2749  * Returns 1 if an enclosure was added, 0 if not.
2750  */
2751 static int add_ext_target_dev(struct ctlr_info *h,
2752         struct hpsa_scsi_dev_t *tmpdevice,
2753         struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
2754         unsigned long lunzerobits[], int *n_ext_target_devs)
2755 {
2756         unsigned char scsi3addr[8];
2757
2758         if (test_bit(tmpdevice->target, lunzerobits))
2759                 return 0; /* There is already a lun 0 on this target. */
2760
2761         if (!is_logical_dev_addr_mode(lunaddrbytes))
2762                 return 0; /* It's the logical targets that may lack lun 0. */
2763
2764         if (!is_ext_target(h, tmpdevice))
2765                 return 0; /* Only external target devices have this problem. */
2766
2767         if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
2768                 return 0;
2769
2770         memset(scsi3addr, 0, 8);
2771         scsi3addr[3] = tmpdevice->target;
2772         if (is_hba_lunid(scsi3addr))
2773                 return 0; /* Don't add the RAID controller here. */
2774
2775         if (is_scsi_rev_5(h))
2776                 return 0; /* p1210m doesn't need to do this. */
2777
2778         if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
2779                 dev_warn(&h->pdev->dev, "Maximum number of external "
2780                         "target devices exceeded.  Check your hardware "
2781                         "configuration.");
2782                 return 0;
2783         }
2784
2785         if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
2786                 return 0;
2787         (*n_ext_target_devs)++;
2788         hpsa_set_bus_target_lun(this_device,
2789                                 tmpdevice->bus, tmpdevice->target, 0);
2790         set_bit(tmpdevice->target, lunzerobits);
2791         return 1;
2792 }
2793
2794 /*
2795  * Get address of physical disk used for an ioaccel2 mode command:
2796  *      1. Extract ioaccel2 handle from the command.
2797  *      2. Find a matching ioaccel2 handle from list of physical disks.
2798  *      3. Return:
2799  *              1 and set scsi3addr to address of matching physical
2800  *              0 if no matching physical disk was found.
2801  */
2802 static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h,
2803         struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr)
2804 {
2805         struct ReportExtendedLUNdata *physicals = NULL;
2806         int responsesize = 24;  /* size of physical extended response */
2807         int extended = 2;       /* flag forces reporting 'other dev info'. */
2808         int reportsize = sizeof(*physicals) + HPSA_MAX_PHYS_LUN * responsesize;
2809         u32 nphysicals = 0;     /* number of reported physical devs */
2810         int found = 0;          /* found match (1) or not (0) */
2811         u32 find;               /* handle we need to match */
2812         int i;
2813         struct scsi_cmnd *scmd; /* scsi command within request being aborted */
2814         struct hpsa_scsi_dev_t *d; /* device of request being aborted */
2815         struct io_accel2_cmd *c2a; /* ioaccel2 command to abort */
2816         u32 it_nexus;           /* 4 byte device handle for the ioaccel2 cmd */
2817         u32 scsi_nexus;         /* 4 byte device handle for the ioaccel2 cmd */
2818
2819         if (ioaccel2_cmd_to_abort->cmd_type != CMD_IOACCEL2)
2820                 return 0; /* no match */
2821
2822         /* point to the ioaccel2 device handle */
2823         c2a = &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex];
2824         if (c2a == NULL)
2825                 return 0; /* no match */
2826
2827         scmd = (struct scsi_cmnd *) ioaccel2_cmd_to_abort->scsi_cmd;
2828         if (scmd == NULL)
2829                 return 0; /* no match */
2830
2831         d = scmd->device->hostdata;
2832         if (d == NULL)
2833                 return 0; /* no match */
2834
2835         it_nexus = cpu_to_le32((u32) d->ioaccel_handle);
2836         scsi_nexus = cpu_to_le32((u32) c2a->scsi_nexus);
2837         find = c2a->scsi_nexus;
2838
2839         if (h->raid_offload_debug > 0)
2840                 dev_info(&h->pdev->dev,
2841                         "%s: scsi_nexus:0x%08x device id: 0x%02x%02x%02x%02x %02x%02x%02x%02x %02x%02x%02x%02x %02x%02x%02x%02x\n",
2842                         __func__, scsi_nexus,
2843                         d->device_id[0], d->device_id[1], d->device_id[2],
2844                         d->device_id[3], d->device_id[4], d->device_id[5],
2845                         d->device_id[6], d->device_id[7], d->device_id[8],
2846                         d->device_id[9], d->device_id[10], d->device_id[11],
2847                         d->device_id[12], d->device_id[13], d->device_id[14],
2848                         d->device_id[15]);
2849
2850         /* Get the list of physical devices */
2851         physicals = kzalloc(reportsize, GFP_KERNEL);
2852         if (physicals == NULL)
2853                 return 0;
2854         if (hpsa_scsi_do_report_phys_luns(h, (struct ReportLUNdata *) physicals,
2855                 reportsize, extended)) {
2856                 dev_err(&h->pdev->dev,
2857                         "Can't lookup %s device handle: report physical LUNs failed.\n",
2858                         "HP SSD Smart Path");
2859                 kfree(physicals);
2860                 return 0;
2861         }
2862         nphysicals = be32_to_cpu(*((__be32 *)physicals->LUNListLength)) /
2863                                                         responsesize;
2864
2865         /* find ioaccel2 handle in list of physicals: */
2866         for (i = 0; i < nphysicals; i++) {
2867                 struct ext_report_lun_entry *entry = &physicals->LUN[i];
2868
2869                 /* handle is in bytes 28-31 of each lun */
2870                 if (entry->ioaccel_handle != find)
2871                         continue; /* didn't match */
2872                 found = 1;
2873                 memcpy(scsi3addr, entry->lunid, 8);
2874                 if (h->raid_offload_debug > 0)
2875                         dev_info(&h->pdev->dev,
2876                                 "%s: Searched h=0x%08x, Found h=0x%08x, scsiaddr 0x%8phN\n",
2877                                 __func__, find,
2878                                 entry->ioaccel_handle, scsi3addr);
2879                 break; /* found it */
2880         }
2881
2882         kfree(physicals);
2883         if (found)
2884                 return 1;
2885         else
2886                 return 0;
2887
2888 }
2889 /*
2890  * Do CISS_REPORT_PHYS and CISS_REPORT_LOG.  Data is returned in physdev,
2891  * logdev.  The number of luns in physdev and logdev are returned in
2892  * *nphysicals and *nlogicals, respectively.
2893  * Returns 0 on success, -1 otherwise.
2894  */
2895 static int hpsa_gather_lun_info(struct ctlr_info *h,
2896         int reportlunsize,
2897         struct ReportLUNdata *physdev, u32 *nphysicals, int *physical_mode,
2898         struct ReportLUNdata *logdev, u32 *nlogicals)
2899 {
2900         int physical_entry_size = 8;
2901
2902         *physical_mode = 0;
2903
2904         /* For I/O accelerator mode we need to read physical device handles */
2905         if (h->transMethod & CFGTBL_Trans_io_accel1 ||
2906                 h->transMethod & CFGTBL_Trans_io_accel2) {
2907                 *physical_mode = HPSA_REPORT_PHYS_EXTENDED;
2908                 physical_entry_size = 24;
2909         }
2910         if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize,
2911                                                         *physical_mode)) {
2912                 dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
2913                 return -1;
2914         }
2915         *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) /
2916                                                         physical_entry_size;
2917         if (*nphysicals > HPSA_MAX_PHYS_LUN) {
2918                 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
2919                         "  %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
2920                         *nphysicals - HPSA_MAX_PHYS_LUN);
2921                 *nphysicals = HPSA_MAX_PHYS_LUN;
2922         }
2923         if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
2924                 dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
2925                 return -1;
2926         }
2927         *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
2928         /* Reject Logicals in excess of our max capability. */
2929         if (*nlogicals > HPSA_MAX_LUN) {
2930                 dev_warn(&h->pdev->dev,
2931                         "maximum logical LUNs (%d) exceeded.  "
2932                         "%d LUNs ignored.\n", HPSA_MAX_LUN,
2933                         *nlogicals - HPSA_MAX_LUN);
2934                         *nlogicals = HPSA_MAX_LUN;
2935         }
2936         if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
2937                 dev_warn(&h->pdev->dev,
2938                         "maximum logical + physical LUNs (%d) exceeded. "
2939                         "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
2940                         *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
2941                 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
2942         }
2943         return 0;
2944 }
2945
2946 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position,
2947         int i, int nphysicals, int nlogicals,
2948         struct ReportExtendedLUNdata *physdev_list,
2949         struct ReportLUNdata *logdev_list)
2950 {
2951         /* Helper function, figure out where the LUN ID info is coming from
2952          * given index i, lists of physical and logical devices, where in
2953          * the list the raid controller is supposed to appear (first or last)
2954          */
2955
2956         int logicals_start = nphysicals + (raid_ctlr_position == 0);
2957         int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
2958
2959         if (i == raid_ctlr_position)
2960                 return RAID_CTLR_LUNID;
2961
2962         if (i < logicals_start)
2963                 return &physdev_list->LUN[i -
2964                                 (raid_ctlr_position == 0)].lunid[0];
2965
2966         if (i < last_device)
2967                 return &logdev_list->LUN[i - nphysicals -
2968                         (raid_ctlr_position == 0)][0];
2969         BUG();
2970         return NULL;
2971 }
2972
2973 static int hpsa_hba_mode_enabled(struct ctlr_info *h)
2974 {
2975         int rc;
2976         int hba_mode_enabled;
2977         struct bmic_controller_parameters *ctlr_params;
2978         ctlr_params = kzalloc(sizeof(struct bmic_controller_parameters),
2979                 GFP_KERNEL);
2980
2981         if (!ctlr_params)
2982                 return -ENOMEM;
2983         rc = hpsa_bmic_ctrl_mode_sense(h, RAID_CTLR_LUNID, 0, ctlr_params,
2984                 sizeof(struct bmic_controller_parameters));
2985         if (rc) {
2986                 kfree(ctlr_params);
2987                 return rc;
2988         }
2989
2990         hba_mode_enabled =
2991                 ((ctlr_params->nvram_flags & HBA_MODE_ENABLED_FLAG) != 0);
2992         kfree(ctlr_params);
2993         return hba_mode_enabled;
2994 }
2995
2996 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
2997 {
2998         /* the idea here is we could get notified
2999          * that some devices have changed, so we do a report
3000          * physical luns and report logical luns cmd, and adjust
3001          * our list of devices accordingly.
3002          *
3003          * The scsi3addr's of devices won't change so long as the
3004          * adapter is not reset.  That means we can rescan and
3005          * tell which devices we already know about, vs. new
3006          * devices, vs.  disappearing devices.
3007          */
3008         struct ReportExtendedLUNdata *physdev_list = NULL;
3009         struct ReportLUNdata *logdev_list = NULL;
3010         u32 nphysicals = 0;
3011         u32 nlogicals = 0;
3012         int physical_mode = 0;
3013         u32 ndev_allocated = 0;
3014         struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
3015         int ncurrent = 0;
3016         int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 24;
3017         int i, n_ext_target_devs, ndevs_to_allocate;
3018         int raid_ctlr_position;
3019         int rescan_hba_mode;
3020         DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
3021
3022         currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
3023         physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
3024         logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
3025         tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
3026
3027         if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
3028                 dev_err(&h->pdev->dev, "out of memory\n");
3029                 goto out;
3030         }
3031         memset(lunzerobits, 0, sizeof(lunzerobits));
3032
3033         rescan_hba_mode = hpsa_hba_mode_enabled(h);
3034         if (rescan_hba_mode < 0)
3035                 goto out;
3036
3037         if (!h->hba_mode_enabled && rescan_hba_mode)
3038                 dev_warn(&h->pdev->dev, "HBA mode enabled\n");
3039         else if (h->hba_mode_enabled && !rescan_hba_mode)
3040                 dev_warn(&h->pdev->dev, "HBA mode disabled\n");
3041
3042         h->hba_mode_enabled = rescan_hba_mode;
3043
3044         if (hpsa_gather_lun_info(h, reportlunsize,
3045                         (struct ReportLUNdata *) physdev_list, &nphysicals,
3046                         &physical_mode, logdev_list, &nlogicals))
3047                 goto out;
3048
3049         /* We might see up to the maximum number of logical and physical disks
3050          * plus external target devices, and a device for the local RAID
3051          * controller.
3052          */
3053         ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
3054
3055         /* Allocate the per device structures */
3056         for (i = 0; i < ndevs_to_allocate; i++) {
3057                 if (i >= HPSA_MAX_DEVICES) {
3058                         dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
3059                                 "  %d devices ignored.\n", HPSA_MAX_DEVICES,
3060                                 ndevs_to_allocate - HPSA_MAX_DEVICES);
3061                         break;
3062                 }
3063
3064                 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
3065                 if (!currentsd[i]) {
3066                         dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
3067                                 __FILE__, __LINE__);
3068                         goto out;
3069                 }
3070                 ndev_allocated++;
3071         }
3072
3073         if (is_scsi_rev_5(h))
3074                 raid_ctlr_position = 0;
3075         else
3076                 raid_ctlr_position = nphysicals + nlogicals;
3077
3078         /* adjust our table of devices */
3079         n_ext_target_devs = 0;
3080         for (i = 0; i < nphysicals + nlogicals + 1; i++) {
3081                 u8 *lunaddrbytes, is_OBDR = 0;
3082
3083                 /* Figure out where the LUN ID info is coming from */
3084                 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
3085                         i, nphysicals, nlogicals, physdev_list, logdev_list);
3086                 /* skip masked physical devices. */
3087                 if (lunaddrbytes[3] & 0xC0 &&
3088                         i < nphysicals + (raid_ctlr_position == 0))
3089                         continue;
3090
3091                 /* Get device type, vendor, model, device id */
3092                 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
3093                                                         &is_OBDR))
3094                         continue; /* skip it if we can't talk to it. */
3095                 figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
3096                 this_device = currentsd[ncurrent];
3097
3098                 /*
3099                  * For external target devices, we have to insert a LUN 0 which
3100                  * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
3101                  * is nonetheless an enclosure device there.  We have to
3102                  * present that otherwise linux won't find anything if
3103                  * there is no lun 0.
3104                  */
3105                 if (add_ext_target_dev(h, tmpdevice, this_device,
3106                                 lunaddrbytes, lunzerobits,
3107                                 &n_ext_target_devs)) {
3108                         ncurrent++;
3109                         this_device = currentsd[ncurrent];
3110                 }
3111
3112                 *this_device = *tmpdevice;
3113
3114                 switch (this_device->devtype) {
3115                 case TYPE_ROM:
3116                         /* We don't *really* support actual CD-ROM devices,
3117                          * just "One Button Disaster Recovery" tape drive
3118                          * which temporarily pretends to be a CD-ROM drive.
3119                          * So we check that the device is really an OBDR tape
3120                          * device by checking for "$DR-10" in bytes 43-48 of
3121                          * the inquiry data.
3122                          */
3123                         if (is_OBDR)
3124                                 ncurrent++;
3125                         break;
3126                 case TYPE_DISK:
3127                         if (h->hba_mode_enabled) {
3128                                 /* never use raid mapper in HBA mode */
3129                                 this_device->offload_enabled = 0;
3130                                 ncurrent++;
3131                                 break;
3132                         } else if (h->acciopath_status) {
3133                                 if (i >= nphysicals) {
3134                                         ncurrent++;
3135                                         break;
3136                                 }
3137                         } else {
3138                                 if (i < nphysicals)
3139                                         break;
3140                                 ncurrent++;
3141                                 break;
3142                         }
3143                         if (physical_mode == HPSA_REPORT_PHYS_EXTENDED) {
3144                                 memcpy(&this_device->ioaccel_handle,
3145                                         &lunaddrbytes[20],
3146                                         sizeof(this_device->ioaccel_handle));
3147                                 ncurrent++;
3148                         }
3149                         break;
3150                 case TYPE_TAPE:
3151                 case TYPE_MEDIUM_CHANGER:
3152                         ncurrent++;
3153                         break;
3154                 case TYPE_RAID:
3155                         /* Only present the Smartarray HBA as a RAID controller.
3156                          * If it's a RAID controller other than the HBA itself
3157                          * (an external RAID controller, MSA500 or similar)
3158                          * don't present it.
3159                          */
3160                         if (!is_hba_lunid(lunaddrbytes))
3161                                 break;
3162                         ncurrent++;
3163                         break;
3164                 default:
3165                         break;
3166                 }
3167                 if (ncurrent >= HPSA_MAX_DEVICES)
3168                         break;
3169         }
3170         adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
3171 out:
3172         kfree(tmpdevice);
3173         for (i = 0; i < ndev_allocated; i++)
3174                 kfree(currentsd[i]);
3175         kfree(currentsd);
3176         kfree(physdev_list);
3177         kfree(logdev_list);
3178 }
3179
3180 /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
3181  * dma mapping  and fills in the scatter gather entries of the
3182  * hpsa command, cp.
3183  */
3184 static int hpsa_scatter_gather(struct ctlr_info *h,
3185                 struct CommandList *cp,
3186                 struct scsi_cmnd *cmd)
3187 {
3188         unsigned int len;
3189         struct scatterlist *sg;
3190         u64 addr64;
3191         int use_sg, i, sg_index, chained;
3192         struct SGDescriptor *curr_sg;
3193
3194         BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
3195
3196         use_sg = scsi_dma_map(cmd);
3197         if (use_sg < 0)
3198                 return use_sg;
3199
3200         if (!use_sg)
3201                 goto sglist_finished;
3202
3203         curr_sg = cp->SG;
3204         chained = 0;
3205         sg_index = 0;
3206         scsi_for_each_sg(cmd, sg, use_sg, i) {
3207                 if (i == h->max_cmd_sg_entries - 1 &&
3208                         use_sg > h->max_cmd_sg_entries) {
3209                         chained = 1;
3210                         curr_sg = h->cmd_sg_list[cp->cmdindex];
3211                         sg_index = 0;
3212                 }
3213                 addr64 = (u64) sg_dma_address(sg);
3214                 len  = sg_dma_len(sg);
3215                 curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
3216                 curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
3217                 curr_sg->Len = len;
3218                 curr_sg->Ext = (i < scsi_sg_count(cmd) - 1) ? 0 : HPSA_SG_LAST;
3219                 curr_sg++;
3220         }
3221
3222         if (use_sg + chained > h->maxSG)
3223                 h->maxSG = use_sg + chained;
3224
3225         if (chained) {
3226                 cp->Header.SGList = h->max_cmd_sg_entries;
3227                 cp->Header.SGTotal = (u16) (use_sg + 1);
3228                 if (hpsa_map_sg_chain_block(h, cp)) {
3229                         scsi_dma_unmap(cmd);
3230                         return -1;
3231                 }
3232                 return 0;
3233         }
3234
3235 sglist_finished:
3236
3237         cp->Header.SGList = (u8) use_sg;   /* no. SGs contig in this cmd */
3238         cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
3239         return 0;
3240 }
3241
3242 #define IO_ACCEL_INELIGIBLE (1)
3243 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len)
3244 {
3245         int is_write = 0;
3246         u32 block;
3247         u32 block_cnt;
3248
3249         /* Perform some CDB fixups if needed using 10 byte reads/writes only */
3250         switch (cdb[0]) {
3251         case WRITE_6:
3252         case WRITE_12:
3253                 is_write = 1;
3254         case READ_6:
3255         case READ_12:
3256                 if (*cdb_len == 6) {
3257                         block = (((u32) cdb[2]) << 8) | cdb[3];
3258                         block_cnt = cdb[4];
3259                 } else {
3260                         BUG_ON(*cdb_len != 12);
3261                         block = (((u32) cdb[2]) << 24) |
3262                                 (((u32) cdb[3]) << 16) |
3263                                 (((u32) cdb[4]) << 8) |
3264                                 cdb[5];
3265                         block_cnt =
3266                                 (((u32) cdb[6]) << 24) |
3267                                 (((u32) cdb[7]) << 16) |
3268                                 (((u32) cdb[8]) << 8) |
3269                                 cdb[9];
3270                 }
3271                 if (block_cnt > 0xffff)
3272                         return IO_ACCEL_INELIGIBLE;
3273
3274                 cdb[0] = is_write ? WRITE_10 : READ_10;
3275                 cdb[1] = 0;
3276                 cdb[2] = (u8) (block >> 24);
3277                 cdb[3] = (u8) (block >> 16);
3278                 cdb[4] = (u8) (block >> 8);
3279                 cdb[5] = (u8) (block);
3280                 cdb[6] = 0;
3281                 cdb[7] = (u8) (block_cnt >> 8);
3282                 cdb[8] = (u8) (block_cnt);
3283                 cdb[9] = 0;
3284                 *cdb_len = 10;
3285                 break;
3286         }
3287         return 0;
3288 }
3289
3290 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h,
3291         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3292         u8 *scsi3addr)
3293 {
3294         struct scsi_cmnd *cmd = c->scsi_cmd;
3295         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex];
3296         unsigned int len;
3297         unsigned int total_len = 0;
3298         struct scatterlist *sg;
3299         u64 addr64;
3300         int use_sg, i;
3301         struct SGDescriptor *curr_sg;
3302         u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE;
3303
3304         /* TODO: implement chaining support */
3305         if (scsi_sg_count(cmd) > h->ioaccel_maxsg)
3306                 return IO_ACCEL_INELIGIBLE;
3307
3308         BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX);
3309
3310         if (fixup_ioaccel_cdb(cdb, &cdb_len))
3311                 return IO_ACCEL_INELIGIBLE;
3312
3313         c->cmd_type = CMD_IOACCEL1;
3314
3315         /* Adjust the DMA address to point to the accelerated command buffer */
3316         c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle +
3317                                 (c->cmdindex * sizeof(*cp));
3318         BUG_ON(c->busaddr & 0x0000007F);
3319
3320         use_sg = scsi_dma_map(cmd);
3321         if (use_sg < 0)
3322                 return use_sg;
3323
3324         if (use_sg) {
3325                 curr_sg = cp->SG;
3326                 scsi_for_each_sg(cmd, sg, use_sg, i) {
3327                         addr64 = (u64) sg_dma_address(sg);
3328                         len  = sg_dma_len(sg);
3329                         total_len += len;
3330                         curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
3331                         curr_sg->Addr.upper =
3332                                 (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
3333                         curr_sg->Len = len;
3334
3335                         if (i == (scsi_sg_count(cmd) - 1))
3336                                 curr_sg->Ext = HPSA_SG_LAST;
3337                         else
3338                                 curr_sg->Ext = 0;  /* we are not chaining */
3339                         curr_sg++;
3340                 }
3341
3342                 switch (cmd->sc_data_direction) {
3343                 case DMA_TO_DEVICE:
3344                         control |= IOACCEL1_CONTROL_DATA_OUT;
3345                         break;
3346                 case DMA_FROM_DEVICE:
3347                         control |= IOACCEL1_CONTROL_DATA_IN;
3348                         break;
3349                 case DMA_NONE:
3350                         control |= IOACCEL1_CONTROL_NODATAXFER;
3351                         break;
3352                 default:
3353                         dev_err(&h->pdev->dev, "unknown data direction: %d\n",
3354                         cmd->sc_data_direction);
3355                         BUG();
3356                         break;
3357                 }
3358         } else {
3359                 control |= IOACCEL1_CONTROL_NODATAXFER;
3360         }
3361
3362         c->Header.SGList = use_sg;
3363         /* Fill out the command structure to submit */
3364         cp->dev_handle = ioaccel_handle & 0xFFFF;
3365         cp->transfer_len = total_len;
3366         cp->io_flags = IOACCEL1_IOFLAGS_IO_REQ |
3367                         (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK);
3368         cp->control = control;
3369         memcpy(cp->CDB, cdb, cdb_len);
3370         memcpy(cp->CISS_LUN, scsi3addr, 8);
3371         /* Tag was already set at init time. */
3372         enqueue_cmd_and_start_io(h, c);
3373         return 0;
3374 }
3375
3376 /*
3377  * Queue a command directly to a device behind the controller using the
3378  * I/O accelerator path.
3379  */
3380 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h,
3381         struct CommandList *c)
3382 {
3383         struct scsi_cmnd *cmd = c->scsi_cmd;
3384         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
3385
3386         return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle,
3387                 cmd->cmnd, cmd->cmd_len, dev->scsi3addr);
3388 }
3389
3390 /*
3391  * Set encryption parameters for the ioaccel2 request
3392  */
3393 static void set_encrypt_ioaccel2(struct ctlr_info *h,
3394         struct CommandList *c, struct io_accel2_cmd *cp)
3395 {
3396         struct scsi_cmnd *cmd = c->scsi_cmd;
3397         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
3398         struct raid_map_data *map = &dev->raid_map;
3399         u64 first_block;
3400
3401         BUG_ON(!(dev->offload_config && dev->offload_enabled));
3402
3403         /* Are we doing encryption on this device */
3404         if (!(map->flags & RAID_MAP_FLAG_ENCRYPT_ON))
3405                 return;
3406         /* Set the data encryption key index. */
3407         cp->dekindex = map->dekindex;
3408
3409         /* Set the encryption enable flag, encoded into direction field. */
3410         cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK;
3411
3412         /* Set encryption tweak values based on logical block address
3413          * If block size is 512, tweak value is LBA.
3414          * For other block sizes, tweak is (LBA * block size)/ 512)
3415          */
3416         switch (cmd->cmnd[0]) {
3417         /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */
3418         case WRITE_6:
3419         case READ_6:
3420                 if (map->volume_blk_size == 512) {
3421                         cp->tweak_lower =
3422                                 (((u32) cmd->cmnd[2]) << 8) |
3423                                         cmd->cmnd[3];
3424                         cp->tweak_upper = 0;
3425                 } else {
3426                         first_block =
3427                                 (((u64) cmd->cmnd[2]) << 8) |
3428                                         cmd->cmnd[3];
3429                         first_block = (first_block * map->volume_blk_size)/512;
3430                         cp->tweak_lower = (u32)first_block;
3431                         cp->tweak_upper = (u32)(first_block >> 32);
3432                 }
3433                 break;
3434         case WRITE_10:
3435         case READ_10:
3436                 if (map->volume_blk_size == 512) {
3437                         cp->tweak_lower =
3438                                 (((u32) cmd->cmnd[2]) << 24) |
3439                                 (((u32) cmd->cmnd[3]) << 16) |
3440                                 (((u32) cmd->cmnd[4]) << 8) |
3441                                         cmd->cmnd[5];
3442                         cp->tweak_upper = 0;
3443                 } else {
3444                         first_block =
3445                                 (((u64) cmd->cmnd[2]) << 24) |
3446                                 (((u64) cmd->cmnd[3]) << 16) |
3447                                 (((u64) cmd->cmnd[4]) << 8) |
3448                                         cmd->cmnd[5];
3449                         first_block = (first_block * map->volume_blk_size)/512;
3450                         cp->tweak_lower = (u32)first_block;
3451                         cp->tweak_upper = (u32)(first_block >> 32);
3452                 }
3453                 break;
3454         /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */
3455         case WRITE_12:
3456         case READ_12:
3457                 if (map->volume_blk_size == 512) {
3458                         cp->tweak_lower =
3459                                 (((u32) cmd->cmnd[2]) << 24) |
3460                                 (((u32) cmd->cmnd[3]) << 16) |
3461                                 (((u32) cmd->cmnd[4]) << 8) |
3462                                         cmd->cmnd[5];
3463                         cp->tweak_upper = 0;
3464                 } else {
3465                         first_block =
3466                                 (((u64) cmd->cmnd[2]) << 24) |
3467                                 (((u64) cmd->cmnd[3]) << 16) |
3468                                 (((u64) cmd->cmnd[4]) << 8) |
3469                                         cmd->cmnd[5];
3470                         first_block = (first_block * map->volume_blk_size)/512;
3471                         cp->tweak_lower = (u32)first_block;
3472                         cp->tweak_upper = (u32)(first_block >> 32);
3473                 }
3474                 break;
3475         case WRITE_16:
3476         case READ_16:
3477                 if (map->volume_blk_size == 512) {
3478                         cp->tweak_lower =
3479                                 (((u32) cmd->cmnd[6]) << 24) |
3480                                 (((u32) cmd->cmnd[7]) << 16) |
3481                                 (((u32) cmd->cmnd[8]) << 8) |
3482                                         cmd->cmnd[9];
3483                         cp->tweak_upper =
3484                                 (((u32) cmd->cmnd[2]) << 24) |
3485                                 (((u32) cmd->cmnd[3]) << 16) |
3486                                 (((u32) cmd->cmnd[4]) << 8) |
3487                                         cmd->cmnd[5];
3488                 } else {
3489                         first_block =
3490                                 (((u64) cmd->cmnd[2]) << 56) |
3491                                 (((u64) cmd->cmnd[3]) << 48) |
3492                                 (((u64) cmd->cmnd[4]) << 40) |
3493                                 (((u64) cmd->cmnd[5]) << 32) |
3494                                 (((u64) cmd->cmnd[6]) << 24) |
3495                                 (((u64) cmd->cmnd[7]) << 16) |
3496                                 (((u64) cmd->cmnd[8]) << 8) |
3497                                         cmd->cmnd[9];
3498                         first_block = (first_block * map->volume_blk_size)/512;
3499                         cp->tweak_lower = (u32)first_block;
3500                         cp->tweak_upper = (u32)(first_block >> 32);
3501                 }
3502                 break;
3503         default:
3504                 dev_err(&h->pdev->dev,
3505                         "ERROR: %s: IOACCEL request CDB size not supported for encryption\n",
3506                         __func__);
3507                 BUG();
3508                 break;
3509         }
3510 }
3511
3512 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h,
3513         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3514         u8 *scsi3addr)
3515 {
3516         struct scsi_cmnd *cmd = c->scsi_cmd;
3517         struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex];
3518         struct ioaccel2_sg_element *curr_sg;
3519         int use_sg, i;
3520         struct scatterlist *sg;
3521         u64 addr64;
3522         u32 len;
3523         u32 total_len = 0;
3524
3525         if (scsi_sg_count(cmd) > h->ioaccel_maxsg)
3526                 return IO_ACCEL_INELIGIBLE;
3527
3528         if (fixup_ioaccel_cdb(cdb, &cdb_len))
3529                 return IO_ACCEL_INELIGIBLE;
3530         c->cmd_type = CMD_IOACCEL2;
3531         /* Adjust the DMA address to point to the accelerated command buffer */
3532         c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle +
3533                                 (c->cmdindex * sizeof(*cp));
3534         BUG_ON(c->busaddr & 0x0000007F);
3535
3536         memset(cp, 0, sizeof(*cp));
3537         cp->IU_type = IOACCEL2_IU_TYPE;
3538
3539         use_sg = scsi_dma_map(cmd);
3540         if (use_sg < 0)
3541                 return use_sg;
3542
3543         if (use_sg) {
3544                 BUG_ON(use_sg > IOACCEL2_MAXSGENTRIES);
3545                 curr_sg = cp->sg;
3546                 scsi_for_each_sg(cmd, sg, use_sg, i) {
3547                         addr64 = (u64) sg_dma_address(sg);
3548                         len  = sg_dma_len(sg);
3549                         total_len += len;
3550                         curr_sg->address = cpu_to_le64(addr64);
3551                         curr_sg->length = cpu_to_le32(len);
3552                         curr_sg->reserved[0] = 0;
3553                         curr_sg->reserved[1] = 0;
3554                         curr_sg->reserved[2] = 0;
3555                         curr_sg->chain_indicator = 0;
3556                         curr_sg++;
3557                 }
3558
3559                 switch (cmd->sc_data_direction) {
3560                 case DMA_TO_DEVICE:
3561                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3562                         cp->direction |= IOACCEL2_DIR_DATA_OUT;
3563                         break;
3564                 case DMA_FROM_DEVICE:
3565                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3566                         cp->direction |= IOACCEL2_DIR_DATA_IN;
3567                         break;
3568                 case DMA_NONE:
3569                         cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3570                         cp->direction |= IOACCEL2_DIR_NO_DATA;
3571                         break;
3572                 default:
3573                         dev_err(&h->pdev->dev, "unknown data direction: %d\n",
3574                                 cmd->sc_data_direction);
3575                         BUG();
3576                         break;
3577                 }
3578         } else {
3579                 cp->direction &= ~IOACCEL2_DIRECTION_MASK;
3580                 cp->direction |= IOACCEL2_DIR_NO_DATA;
3581         }
3582
3583         /* Set encryption parameters, if necessary */
3584         set_encrypt_ioaccel2(h, c, cp);
3585
3586         cp->scsi_nexus = ioaccel_handle;
3587         cp->Tag = (c->cmdindex << DIRECT_LOOKUP_SHIFT) |
3588                                 DIRECT_LOOKUP_BIT;
3589         memcpy(cp->cdb, cdb, sizeof(cp->cdb));
3590
3591         /* fill in sg elements */
3592         cp->sg_count = (u8) use_sg;
3593
3594         cp->data_len = cpu_to_le32(total_len);
3595         cp->err_ptr = cpu_to_le64(c->busaddr +
3596                         offsetof(struct io_accel2_cmd, error_data));
3597         cp->err_len = cpu_to_le32((u32) sizeof(cp->error_data));
3598
3599         enqueue_cmd_and_start_io(h, c);
3600         return 0;
3601 }
3602
3603 /*
3604  * Queue a command to the correct I/O accelerator path.
3605  */
3606 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h,
3607         struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len,
3608         u8 *scsi3addr)
3609 {
3610         if (h->transMethod & CFGTBL_Trans_io_accel1)
3611                 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle,
3612                                                 cdb, cdb_len, scsi3addr);
3613         else
3614                 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle,
3615                                                 cdb, cdb_len, scsi3addr);
3616 }
3617
3618 static void raid_map_helper(struct raid_map_data *map,
3619                 int offload_to_mirror, u32 *map_index, u32 *current_group)
3620 {
3621         if (offload_to_mirror == 0)  {
3622                 /* use physical disk in the first mirrored group. */
3623                 *map_index %= map->data_disks_per_row;
3624                 return;
3625         }
3626         do {
3627                 /* determine mirror group that *map_index indicates */
3628                 *current_group = *map_index / map->data_disks_per_row;
3629                 if (offload_to_mirror == *current_group)
3630                         continue;
3631                 if (*current_group < (map->layout_map_count - 1)) {
3632                         /* select map index from next group */
3633                         *map_index += map->data_disks_per_row;
3634                         (*current_group)++;
3635                 } else {
3636                         /* select map index from first group */
3637                         *map_index %= map->data_disks_per_row;
3638                         *current_group = 0;
3639                 }
3640         } while (offload_to_mirror != *current_group);
3641 }
3642
3643 /*
3644  * Attempt to perform offload RAID mapping for a logical volume I/O.
3645  */
3646 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h,
3647         struct CommandList *c)
3648 {
3649         struct scsi_cmnd *cmd = c->scsi_cmd;
3650         struct hpsa_scsi_dev_t *dev = cmd->device->hostdata;
3651         struct raid_map_data *map = &dev->raid_map;
3652         struct raid_map_disk_data *dd = &map->data[0];
3653         int is_write = 0;
3654         u32 map_index;
3655         u64 first_block, last_block;
3656         u32 block_cnt;
3657         u32 blocks_per_row;
3658         u64 first_row, last_row;
3659         u32 first_row_offset, last_row_offset;
3660         u32 first_column, last_column;
3661         u64 r0_first_row, r0_last_row;
3662         u32 r5or6_blocks_per_row;
3663         u64 r5or6_first_row, r5or6_last_row;
3664         u32 r5or6_first_row_offset, r5or6_last_row_offset;
3665         u32 r5or6_first_column, r5or6_last_column;
3666         u32 total_disks_per_row;
3667         u32 stripesize;
3668         u32 first_group, last_group, current_group;
3669         u32 map_row;
3670         u32 disk_handle;
3671         u64 disk_block;
3672         u32 disk_block_cnt;
3673         u8 cdb[16];
3674         u8 cdb_len;
3675 #if BITS_PER_LONG == 32
3676         u64 tmpdiv;
3677 #endif
3678         int offload_to_mirror;
3679
3680         BUG_ON(!(dev->offload_config && dev->offload_enabled));
3681
3682         /* check for valid opcode, get LBA and block count */
3683         switch (cmd->cmnd[0]) {
3684         case WRITE_6:
3685                 is_write = 1;
3686         case READ_6:
3687                 first_block =
3688                         (((u64) cmd->cmnd[2]) << 8) |
3689                         cmd->cmnd[3];
3690                 block_cnt = cmd->cmnd[4];
3691                 if (block_cnt == 0)
3692                         block_cnt = 256;
3693                 break;
3694         case WRITE_10:
3695                 is_write = 1;
3696         case READ_10:
3697                 first_block =
3698                         (((u64) cmd->cmnd[2]) << 24) |
3699                         (((u64) cmd->cmnd[3]) << 16) |
3700                         (((u64) cmd->cmnd[4]) << 8) |
3701                         cmd->cmnd[5];
3702                 block_cnt =
3703                         (((u32) cmd->cmnd[7]) << 8) |
3704                         cmd->cmnd[8];
3705                 break;
3706         case WRITE_12:
3707                 is_write = 1;
3708         case READ_12:
3709                 first_block =
3710                         (((u64) cmd->cmnd[2]) << 24) |
3711                         (((u64) cmd->cmnd[3]) << 16) |
3712                         (((u64) cmd->cmnd[4]) << 8) |
3713                         cmd->cmnd[5];
3714                 block_cnt =
3715                         (((u32) cmd->cmnd[6]) << 24) |
3716                         (((u32) cmd->cmnd[7]) << 16) |
3717                         (((u32) cmd->cmnd[8]) << 8) |
3718                 cmd->cmnd[9];
3719                 break;
3720         case WRITE_16:
3721                 is_write = 1;
3722         case READ_16:
3723                 first_block =
3724                         (((u64) cmd->cmnd[2]) << 56) |
3725                         (((u64) cmd->cmnd[3]) << 48) |
3726                         (((u64) cmd->cmnd[4]) << 40) |
3727                         (((u64) cmd->cmnd[5]) << 32) |
3728                         (((u64) cmd->cmnd[6]) << 24) |
3729                         (((u64) cmd->cmnd[7]) << 16) |
3730                         (((u64) cmd->cmnd[8]) << 8) |
3731                         cmd->cmnd[9];
3732                 block_cnt =
3733                         (((u32) cmd->cmnd[10]) << 24) |
3734                         (((u32) cmd->cmnd[11]) << 16) |
3735                         (((u32) cmd->cmnd[12]) << 8) |
3736                         cmd->cmnd[13];
3737                 break;
3738         default:
3739                 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */
3740         }
3741         last_block = first_block + block_cnt - 1;
3742
3743         /* check for write to non-RAID-0 */
3744         if (is_write && dev->raid_level != 0)
3745                 return IO_ACCEL_INELIGIBLE;
3746
3747         /* check for invalid block or wraparound */
3748         if (last_block >= map->volume_blk_cnt || last_block < first_block)
3749                 return IO_ACCEL_INELIGIBLE;
3750
3751         /* calculate stripe information for the request */
3752         blocks_per_row = map->data_disks_per_row * map->strip_size;
3753 #if BITS_PER_LONG == 32
3754         tmpdiv = first_block;
3755         (void) do_div(tmpdiv, blocks_per_row);
3756         first_row = tmpdiv;
3757         tmpdiv = last_block;
3758         (void) do_div(tmpdiv, blocks_per_row);
3759         last_row = tmpdiv;
3760         first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
3761         last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
3762         tmpdiv = first_row_offset;
3763         (void) do_div(tmpdiv,  map->strip_size);
3764         first_column = tmpdiv;
3765         tmpdiv = last_row_offset;
3766         (void) do_div(tmpdiv, map->strip_size);
3767         last_column = tmpdiv;
3768 #else
3769         first_row = first_block / blocks_per_row;
3770         last_row = last_block / blocks_per_row;
3771         first_row_offset = (u32) (first_block - (first_row * blocks_per_row));
3772         last_row_offset = (u32) (last_block - (last_row * blocks_per_row));
3773         first_column = first_row_offset / map->strip_size;
3774         last_column = last_row_offset / map->strip_size;
3775 #endif
3776
3777         /* if this isn't a single row/column then give to the controller */
3778         if ((first_row != last_row) || (first_column != last_column))
3779                 return IO_ACCEL_INELIGIBLE;
3780
3781         /* proceeding with driver mapping */
3782         total_disks_per_row = map->data_disks_per_row +
3783                                 map->metadata_disks_per_row;
3784         map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
3785                                 map->row_cnt;
3786         map_index = (map_row * total_disks_per_row) + first_column;
3787
3788         switch (dev->raid_level) {
3789         case HPSA_RAID_0:
3790                 break; /* nothing special to do */
3791         case HPSA_RAID_1:
3792                 /* Handles load balance across RAID 1 members.
3793                  * (2-drive R1 and R10 with even # of drives.)
3794                  * Appropriate for SSDs, not optimal for HDDs
3795                  */
3796                 BUG_ON(map->layout_map_count != 2);
3797                 if (dev->offload_to_mirror)
3798                         map_index += map->data_disks_per_row;
3799                 dev->offload_to_mirror = !dev->offload_to_mirror;
3800                 break;
3801         case HPSA_RAID_ADM:
3802                 /* Handles N-way mirrors  (R1-ADM)
3803                  * and R10 with # of drives divisible by 3.)
3804                  */
3805                 BUG_ON(map->layout_map_count != 3);
3806
3807                 offload_to_mirror = dev->offload_to_mirror;
3808                 raid_map_helper(map, offload_to_mirror,
3809                                 &map_index, &current_group);
3810                 /* set mirror group to use next time */
3811                 offload_to_mirror =
3812                         (offload_to_mirror >= map->layout_map_count - 1)
3813                         ? 0 : offload_to_mirror + 1;
3814                 /* FIXME: remove after debug/dev */
3815                 BUG_ON(offload_to_mirror >= map->layout_map_count);
3816                 dev_warn(&h->pdev->dev,
3817                         "DEBUG: Using physical disk map index %d from mirror group %d\n",
3818                         map_index, offload_to_mirror);
3819                 dev->offload_to_mirror = offload_to_mirror;
3820                 /* Avoid direct use of dev->offload_to_mirror within this
3821                  * function since multiple threads might simultaneously
3822                  * increment it beyond the range of dev->layout_map_count -1.
3823                  */
3824                 break;
3825         case HPSA_RAID_5:
3826         case HPSA_RAID_6:
3827                 if (map->layout_map_count <= 1)
3828                         break;
3829
3830                 /* Verify first and last block are in same RAID group */
3831                 r5or6_blocks_per_row =
3832                         map->strip_size * map->data_disks_per_row;
3833                 BUG_ON(r5or6_blocks_per_row == 0);
3834                 stripesize = r5or6_blocks_per_row * map->layout_map_count;
3835 #if BITS_PER_LONG == 32
3836                 tmpdiv = first_block;
3837                 first_group = do_div(tmpdiv, stripesize);
3838                 tmpdiv = first_group;
3839                 (void) do_div(tmpdiv, r5or6_blocks_per_row);
3840                 first_group = tmpdiv;
3841                 tmpdiv = last_block;
3842                 last_group = do_div(tmpdiv, stripesize);
3843                 tmpdiv = last_group;
3844                 (void) do_div(tmpdiv, r5or6_blocks_per_row);
3845                 last_group = tmpdiv;
3846 #else
3847                 first_group = (first_block % stripesize) / r5or6_blocks_per_row;
3848                 last_group = (last_block % stripesize) / r5or6_blocks_per_row;
3849 #endif
3850                 if (first_group != last_group)
3851                         return IO_ACCEL_INELIGIBLE;
3852
3853                 /* Verify request is in a single row of RAID 5/6 */
3854 #if BITS_PER_LONG == 32
3855                 tmpdiv = first_block;
3856                 (void) do_div(tmpdiv, stripesize);
3857                 first_row = r5or6_first_row = r0_first_row = tmpdiv;
3858                 tmpdiv = last_block;
3859                 (void) do_div(tmpdiv, stripesize);
3860                 r5or6_last_row = r0_last_row = tmpdiv;
3861 #else
3862                 first_row = r5or6_first_row = r0_first_row =
3863                                                 first_block / stripesize;
3864                 r5or6_last_row = r0_last_row = last_block / stripesize;
3865 #endif
3866                 if (r5or6_first_row != r5or6_last_row)
3867                         return IO_ACCEL_INELIGIBLE;
3868
3869
3870                 /* Verify request is in a single column */
3871 #if BITS_PER_LONG == 32
3872                 tmpdiv = first_block;
3873                 first_row_offset = do_div(tmpdiv, stripesize);
3874                 tmpdiv = first_row_offset;
3875                 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row);
3876                 r5or6_first_row_offset = first_row_offset;
3877                 tmpdiv = last_block;
3878                 r5or6_last_row_offset = do_div(tmpdiv, stripesize);
3879                 tmpdiv = r5or6_last_row_offset;
3880                 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row);
3881                 tmpdiv = r5or6_first_row_offset;
3882                 (void) do_div(tmpdiv, map->strip_size);
3883                 first_column = r5or6_first_column = tmpdiv;
3884                 tmpdiv = r5or6_last_row_offset;
3885                 (void) do_div(tmpdiv, map->strip_size);
3886                 r5or6_last_column = tmpdiv;
3887 #else
3888                 first_row_offset = r5or6_first_row_offset =
3889                         (u32)((first_block % stripesize) %
3890                                                 r5or6_blocks_per_row);
3891
3892                 r5or6_last_row_offset =
3893                         (u32)((last_block % stripesize) %
3894                                                 r5or6_blocks_per_row);
3895
3896                 first_column = r5or6_first_column =
3897                         r5or6_first_row_offset / map->strip_size;
3898                 r5or6_last_column =
3899                         r5or6_last_row_offset / map->strip_size;
3900 #endif
3901                 if (r5or6_first_column != r5or6_last_column)
3902                         return IO_ACCEL_INELIGIBLE;
3903
3904                 /* Request is eligible */
3905                 map_row = ((u32)(first_row >> map->parity_rotation_shift)) %
3906                         map->row_cnt;
3907
3908                 map_index = (first_group *
3909                         (map->row_cnt * total_disks_per_row)) +
3910                         (map_row * total_disks_per_row) + first_column;
3911                 break;
3912         default:
3913                 return IO_ACCEL_INELIGIBLE;
3914         }
3915
3916         disk_handle = dd[map_index].ioaccel_handle;
3917         disk_block = map->disk_starting_blk + (first_row * map->strip_size) +
3918                         (first_row_offset - (first_column * map->strip_size));
3919         disk_block_cnt = block_cnt;
3920
3921         /* handle differing logical/physical block sizes */
3922         if (map->phys_blk_shift) {
3923                 disk_block <<= map->phys_blk_shift;
3924                 disk_block_cnt <<= map->phys_blk_shift;
3925         }
3926         BUG_ON(disk_block_cnt > 0xffff);
3927
3928         /* build the new CDB for the physical disk I/O */
3929         if (disk_block > 0xffffffff) {
3930                 cdb[0] = is_write ? WRITE_16 : READ_16;
3931                 cdb[1] = 0;
3932                 cdb[2] = (u8) (disk_block >> 56);
3933                 cdb[3] = (u8) (disk_block >> 48);
3934                 cdb[4] = (u8) (disk_block >> 40);
3935                 cdb[5] = (u8) (disk_block >> 32);
3936                 cdb[6] = (u8) (disk_block >> 24);
3937                 cdb[7] = (u8) (disk_block >> 16);
3938                 cdb[8] = (u8) (disk_block >> 8);
3939                 cdb[9] = (u8) (disk_block);
3940                 cdb[10] = (u8) (disk_block_cnt >> 24);
3941                 cdb[11] = (u8) (disk_block_cnt >> 16);
3942                 cdb[12] = (u8) (disk_block_cnt >> 8);
3943                 cdb[13] = (u8) (disk_block_cnt);
3944                 cdb[14] = 0;
3945                 cdb[15] = 0;
3946                 cdb_len = 16;
3947         } else {
3948                 cdb[0] = is_write ? WRITE_10 : READ_10;
3949                 cdb[1] = 0;
3950                 cdb[2] = (u8) (disk_block >> 24);
3951                 cdb[3] = (u8) (disk_block >> 16);
3952                 cdb[4] = (u8) (disk_block >> 8);
3953                 cdb[5] = (u8) (disk_block);
3954                 cdb[6] = 0;
3955                 cdb[7] = (u8) (disk_block_cnt >> 8);
3956                 cdb[8] = (u8) (disk_block_cnt);
3957                 cdb[9] = 0;
3958                 cdb_len = 10;
3959         }
3960         return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len,
3961                                                 dev->scsi3addr);
3962 }
3963
3964 static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
3965         void (*done)(struct scsi_cmnd *))
3966 {
3967         struct ctlr_info *h;
3968         struct hpsa_scsi_dev_t *dev;
3969         unsigned char scsi3addr[8];
3970         struct CommandList *c;
3971         int rc = 0;
3972
3973         /* Get the ptr to our adapter structure out of cmd->host. */
3974         h = sdev_to_hba(cmd->device);
3975         dev = cmd->device->hostdata;
3976         if (!dev) {
3977                 cmd->result = DID_NO_CONNECT << 16;
3978                 done(cmd);
3979                 return 0;
3980         }
3981         memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
3982
3983         if (unlikely(lockup_detected(h))) {
3984                 cmd->result = DID_ERROR << 16;
3985                 done(cmd);
3986                 return 0;
3987         }
3988         c = cmd_alloc(h);
3989         if (c == NULL) {                        /* trouble... */
3990                 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
3991                 return SCSI_MLQUEUE_HOST_BUSY;
3992         }
3993
3994         /* Fill in the command list header */
3995
3996         cmd->scsi_done = done;    /* save this for use by completion code */
3997
3998         /* save c in case we have to abort it  */
3999         cmd->host_scribble = (unsigned char *) c;
4000
4001         c->cmd_type = CMD_SCSI;
4002         c->scsi_cmd = cmd;
4003
4004         /* Call alternate submit routine for I/O accelerated commands.
4005          * Retries always go down the normal I/O path.
4006          */
4007         if (likely(cmd->retries == 0 &&
4008                 cmd->request->cmd_type == REQ_TYPE_FS &&
4009                 h->acciopath_status)) {
4010                 if (dev->offload_enabled) {
4011                         rc = hpsa_scsi_ioaccel_raid_map(h, c);
4012                         if (rc == 0)
4013                                 return 0; /* Sent on ioaccel path */
4014                         if (rc < 0) {   /* scsi_dma_map failed. */
4015                                 cmd_free(h, c);
4016                                 return SCSI_MLQUEUE_HOST_BUSY;
4017                         }
4018                 } else if (dev->ioaccel_handle) {
4019                         rc = hpsa_scsi_ioaccel_direct_map(h, c);
4020                         if (rc == 0)
4021                                 return 0; /* Sent on direct map path */
4022                         if (rc < 0) {   /* scsi_dma_map failed. */
4023                                 cmd_free(h, c);
4024                                 return SCSI_MLQUEUE_HOST_BUSY;
4025                         }
4026                 }
4027         }
4028
4029         c->Header.ReplyQueue = 0;  /* unused in simple mode */
4030         memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
4031         c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
4032         c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
4033
4034         /* Fill in the request block... */
4035
4036         c->Request.Timeout = 0;
4037         memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
4038         BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
4039         c->Request.CDBLen = cmd->cmd_len;
4040         memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
4041         c->Request.Type.Type = TYPE_CMD;
4042         c->Request.Type.Attribute = ATTR_SIMPLE;
4043         switch (cmd->sc_data_direction) {
4044         case DMA_TO_DEVICE:
4045                 c->Request.Type.Direction = XFER_WRITE;
4046                 break;
4047         case DMA_FROM_DEVICE:
4048                 c->Request.Type.Direction = XFER_READ;
4049                 break;
4050         case DMA_NONE:
4051                 c->Request.Type.Direction = XFER_NONE;
4052                 break;
4053         case DMA_BIDIRECTIONAL:
4054                 /* This can happen if a buggy application does a scsi passthru
4055                  * and sets both inlen and outlen to non-zero. ( see
4056                  * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
4057                  */
4058
4059                 c->Request.Type.Direction = XFER_RSVD;
4060                 /* This is technically wrong, and hpsa controllers should
4061                  * reject it with CMD_INVALID, which is the most correct
4062                  * response, but non-fibre backends appear to let it
4063                  * slide by, and give the same results as if this field
4064                  * were set correctly.  Either way is acceptable for
4065                  * our purposes here.
4066                  */
4067
4068                 break;
4069
4070         default:
4071                 dev_err(&h->pdev->dev, "unknown data direction: %d\n",
4072                         cmd->sc_data_direction);
4073                 BUG();
4074                 break;
4075         }
4076
4077         if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
4078                 cmd_free(h, c);
4079                 return SCSI_MLQUEUE_HOST_BUSY;
4080         }
4081         enqueue_cmd_and_start_io(h, c);
4082         /* the cmd'll come back via intr handler in complete_scsi_command()  */
4083         return 0;
4084 }
4085
4086 static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
4087
4088 static int do_not_scan_if_controller_locked_up(struct ctlr_info *h)
4089 {
4090         unsigned long flags;
4091
4092         /*
4093          * Don't let rescans be initiated on a controller known
4094          * to be locked up.  If the controller locks up *during*
4095          * a rescan, that thread is probably hosed, but at least
4096          * we can prevent new rescan threads from piling up on a
4097          * locked up controller.
4098          */
4099         if (unlikely(lockup_detected(h))) {
4100                 spin_lock_irqsave(&h->scan_lock, flags);
4101                 h->scan_finished = 1;
4102                 wake_up_all(&h->scan_wait_queue);
4103                 spin_unlock_irqrestore(&h->scan_lock, flags);
4104                 return 1;
4105         }
4106         return 0;
4107 }
4108
4109 static void hpsa_scan_start(struct Scsi_Host *sh)
4110 {
4111         struct ctlr_info *h = shost_to_hba(sh);
4112         unsigned long flags;
4113
4114         if (do_not_scan_if_controller_locked_up(h))
4115                 return;
4116
4117         /* wait until any scan already in progress is finished. */
4118         while (1) {
4119                 spin_lock_irqsave(&h->scan_lock, flags);
4120                 if (h->scan_finished)
4121                         break;
4122                 spin_unlock_irqrestore(&h->scan_lock, flags);
4123                 wait_event(h->scan_wait_queue, h->scan_finished);
4124                 /* Note: We don't need to worry about a race between this
4125                  * thread and driver unload because the midlayer will
4126                  * have incremented the reference count, so unload won't
4127                  * happen if we're in here.
4128                  */
4129         }
4130         h->scan_finished = 0; /* mark scan as in progress */
4131         spin_unlock_irqrestore(&h->scan_lock, flags);
4132
4133         if (do_not_scan_if_controller_locked_up(h))
4134                 return;
4135
4136         hpsa_update_scsi_devices(h, h->scsi_host->host_no);
4137
4138         spin_lock_irqsave(&h->scan_lock, flags);
4139         h->scan_finished = 1; /* mark scan as finished. */
4140         wake_up_all(&h->scan_wait_queue);
4141         spin_unlock_irqrestore(&h->scan_lock, flags);
4142 }
4143
4144 static int hpsa_scan_finished(struct Scsi_Host *sh,
4145         unsigned long elapsed_time)
4146 {
4147         struct ctlr_info *h = shost_to_hba(sh);
4148         unsigned long flags;
4149         int finished;
4150
4151         spin_lock_irqsave(&h->scan_lock, flags);
4152         finished = h->scan_finished;
4153         spin_unlock_irqrestore(&h->scan_lock, flags);
4154         return finished;
4155 }
4156
4157 static int hpsa_change_queue_depth(struct scsi_device *sdev,
4158         int qdepth, int reason)
4159 {
4160         struct ctlr_info *h = sdev_to_hba(sdev);
4161
4162         if (reason != SCSI_QDEPTH_DEFAULT)
4163                 return -ENOTSUPP;
4164
4165         if (qdepth < 1)
4166                 qdepth = 1;
4167         else
4168                 if (qdepth > h->nr_cmds)
4169                         qdepth = h->nr_cmds;
4170         scsi_adjust_queue_depth(sdev, qdepth);
4171         return sdev->queue_depth;
4172 }
4173
4174 static void hpsa_unregister_scsi(struct ctlr_info *h)
4175 {
4176         /* we are being forcibly unloaded, and may not refuse. */
4177         scsi_remove_host(h->scsi_host);
4178         scsi_host_put(h->scsi_host);
4179         h->scsi_host = NULL;
4180 }
4181
4182 static int hpsa_register_scsi(struct ctlr_info *h)
4183 {
4184         struct Scsi_Host *sh;
4185         int error;
4186
4187         sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
4188         if (sh == NULL)
4189                 goto fail;
4190
4191         sh->io_port = 0;
4192         sh->n_io_port = 0;
4193         sh->this_id = -1;
4194         sh->max_channel = 3;
4195         sh->max_cmd_len = MAX_COMMAND_SIZE;
4196         sh->max_lun = HPSA_MAX_LUN;
4197         sh->max_id = HPSA_MAX_LUN;
4198         sh->can_queue = h->nr_cmds;
4199         if (h->hba_mode_enabled)
4200                 sh->cmd_per_lun = 7;
4201         else
4202                 sh->cmd_per_lun = h->nr_cmds;
4203         sh->sg_tablesize = h->maxsgentries;
4204         h->scsi_host = sh;
4205         sh->hostdata[0] = (unsigned long) h;
4206         sh->irq = h->intr[h->intr_mode];
4207         sh->unique_id = sh->irq;
4208         error = scsi_add_host(sh, &h->pdev->dev);
4209         if (error)
4210                 goto fail_host_put;
4211         scsi_scan_host(sh);
4212         return 0;
4213
4214  fail_host_put:
4215         dev_err(&h->pdev->dev, "%s: scsi_add_host"
4216                 " failed for controller %d\n", __func__, h->ctlr);
4217         scsi_host_put(sh);
4218         return error;
4219  fail:
4220         dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
4221                 " failed for controller %d\n", __func__, h->ctlr);
4222         return -ENOMEM;
4223 }
4224
4225 static int wait_for_device_to_become_ready(struct ctlr_info *h,
4226         unsigned char lunaddr[])
4227 {
4228         int rc;
4229         int count = 0;
4230         int waittime = 1; /* seconds */
4231         struct CommandList *c;
4232
4233         c = cmd_special_alloc(h);
4234         if (!c) {
4235                 dev_warn(&h->pdev->dev, "out of memory in "
4236                         "wait_for_device_to_become_ready.\n");
4237                 return IO_ERROR;
4238         }
4239
4240         /* Send test unit ready until device ready, or give up. */
4241         while (count < HPSA_TUR_RETRY_LIMIT) {
4242
4243                 /* Wait for a bit.  do this first, because if we send
4244                  * the TUR right away, the reset will just abort it.
4245                  */
4246                 msleep(1000 * waittime);
4247                 count++;
4248                 rc = 0; /* Device ready. */
4249
4250                 /* Increase wait time with each try, up to a point. */
4251                 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
4252                         waittime = waittime * 2;
4253
4254                 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
4255                 (void) fill_cmd(c, TEST_UNIT_READY, h,
4256                                 NULL, 0, 0, lunaddr, TYPE_CMD);
4257                 hpsa_scsi_do_simple_cmd_core(h, c);
4258                 /* no unmap needed here because no data xfer. */
4259
4260                 if (c->err_info->CommandStatus == CMD_SUCCESS)
4261                         break;
4262
4263                 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
4264                         c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
4265                         (c->err_info->SenseInfo[2] == NO_SENSE ||
4266                         c->err_info->SenseInfo[2] == UNIT_ATTENTION))
4267                         break;
4268
4269                 dev_warn(&h->pdev->dev, "waiting %d secs "
4270                         "for device to become ready.\n", waittime);
4271                 rc = 1; /* device not ready. */
4272         }
4273
4274         if (rc)
4275                 dev_warn(&h->pdev->dev, "giving up on device.\n");
4276         else
4277                 dev_warn(&h->pdev->dev, "device is ready.\n");
4278
4279         cmd_special_free(h, c);
4280         return rc;
4281 }
4282
4283 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
4284  * complaining.  Doing a host- or bus-reset can't do anything good here.
4285  */
4286 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
4287 {
4288         int rc;
4289         struct ctlr_info *h;
4290         struct hpsa_scsi_dev_t *dev;
4291
4292         /* find the controller to which the command to be aborted was sent */
4293         h = sdev_to_hba(scsicmd->device);
4294         if (h == NULL) /* paranoia */
4295                 return FAILED;
4296         dev = scsicmd->device->hostdata;
4297         if (!dev) {
4298                 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
4299                         "device lookup failed.\n");
4300                 return FAILED;
4301         }
4302         dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
4303                 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
4304         /* send a reset to the SCSI LUN which the command was sent to */
4305         rc = hpsa_send_reset(h, dev->scsi3addr, HPSA_RESET_TYPE_LUN);
4306         if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
4307                 return SUCCESS;
4308
4309         dev_warn(&h->pdev->dev, "resetting device failed.\n");
4310         return FAILED;
4311 }
4312
4313 static void swizzle_abort_tag(u8 *tag)
4314 {
4315         u8 original_tag[8];
4316
4317         memcpy(original_tag, tag, 8);
4318         tag[0] = original_tag[3];
4319         tag[1] = original_tag[2];
4320         tag[2] = original_tag[1];
4321         tag[3] = original_tag[0];
4322         tag[4] = original_tag[7];
4323         tag[5] = original_tag[6];
4324         tag[6] = original_tag[5];
4325         tag[7] = original_tag[4];
4326 }
4327
4328 static void hpsa_get_tag(struct ctlr_info *h,
4329         struct CommandList *c, u32 *taglower, u32 *tagupper)
4330 {
4331         if (c->cmd_type == CMD_IOACCEL1) {
4332                 struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *)
4333                         &h->ioaccel_cmd_pool[c->cmdindex];
4334                 *tagupper = cm1->Tag.upper;
4335                 *taglower = cm1->Tag.lower;
4336                 return;
4337         }
4338         if (c->cmd_type == CMD_IOACCEL2) {
4339                 struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *)
4340                         &h->ioaccel2_cmd_pool[c->cmdindex];
4341                 /* upper tag not used in ioaccel2 mode */
4342                 memset(tagupper, 0, sizeof(*tagupper));
4343                 *taglower = cm2->Tag;
4344                 return;
4345         }
4346         *tagupper = c->Header.Tag.upper;
4347         *taglower = c->Header.Tag.lower;
4348 }
4349
4350
4351 static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
4352         struct CommandList *abort, int swizzle)
4353 {
4354         int rc = IO_OK;
4355         struct CommandList *c;
4356         struct ErrorInfo *ei;
4357         u32 tagupper, taglower;
4358
4359         c = cmd_special_alloc(h);
4360         if (c == NULL) {        /* trouble... */
4361                 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
4362                 return -ENOMEM;
4363         }
4364
4365         /* fill_cmd can't fail here, no buffer to map */
4366         (void) fill_cmd(c, HPSA_ABORT_MSG, h, abort,
4367                 0, 0, scsi3addr, TYPE_MSG);
4368         if (swizzle)
4369                 swizzle_abort_tag(&c->Request.CDB[4]);
4370         hpsa_scsi_do_simple_cmd_core(h, c);
4371         hpsa_get_tag(h, abort, &taglower, &tagupper);
4372         dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd_core completed.\n",
4373                 __func__, tagupper, taglower);
4374         /* no unmap needed here because no data xfer. */
4375
4376         ei = c->err_info;
4377         switch (ei->CommandStatus) {
4378         case CMD_SUCCESS:
4379                 break;
4380         case CMD_UNABORTABLE: /* Very common, don't make noise. */
4381                 rc = -1;
4382                 break;
4383         default:
4384                 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
4385                         __func__, tagupper, taglower);
4386                 hpsa_scsi_interpret_error(h, c);
4387                 rc = -1;
4388                 break;
4389         }
4390         cmd_special_free(h, c);
4391         dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n",
4392                 __func__, tagupper, taglower);
4393         return rc;
4394 }
4395
4396 /*
4397  * hpsa_find_cmd_in_queue
4398  *
4399  * Used to determine whether a command (find) is still present
4400  * in queue_head.   Optionally excludes the last element of queue_head.
4401  *
4402  * This is used to avoid unnecessary aborts.  Commands in h->reqQ have
4403  * not yet been submitted, and so can be aborted by the driver without
4404  * sending an abort to the hardware.
4405  *
4406  * Returns pointer to command if found in queue, NULL otherwise.
4407  */
4408 static struct CommandList *hpsa_find_cmd_in_queue(struct ctlr_info *h,
4409                         struct scsi_cmnd *find, struct list_head *queue_head)
4410 {
4411         unsigned long flags;
4412         struct CommandList *c = NULL;   /* ptr into cmpQ */
4413
4414         if (!find)
4415                 return NULL;
4416         spin_lock_irqsave(&h->lock, flags);
4417         list_for_each_entry(c, queue_head, list) {
4418                 if (c->scsi_cmd == NULL) /* e.g.: passthru ioctl */
4419                         continue;
4420                 if (c->scsi_cmd == find) {
4421                         spin_unlock_irqrestore(&h->lock, flags);
4422                         return c;
4423                 }
4424         }
4425         spin_unlock_irqrestore(&h->lock, flags);
4426         return NULL;
4427 }
4428
4429 static struct CommandList *hpsa_find_cmd_in_queue_by_tag(struct ctlr_info *h,
4430                                         u8 *tag, struct list_head *queue_head)
4431 {
4432         unsigned long flags;
4433         struct CommandList *c;
4434
4435         spin_lock_irqsave(&h->lock, flags);
4436         list_for_each_entry(c, queue_head, list) {
4437                 if (memcmp(&c->Header.Tag, tag, 8) != 0)
4438                         continue;
4439                 spin_unlock_irqrestore(&h->lock, flags);
4440                 return c;
4441         }
4442         spin_unlock_irqrestore(&h->lock, flags);
4443         return NULL;
4444 }
4445
4446 /* ioaccel2 path firmware cannot handle abort task requests.
4447  * Change abort requests to physical target reset, and send to the
4448  * address of the physical disk used for the ioaccel 2 command.
4449  * Return 0 on success (IO_OK)
4450  *       -1 on failure
4451  */
4452
4453 static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h,
4454         unsigned char *scsi3addr, struct CommandList *abort)
4455 {
4456         int rc = IO_OK;
4457         struct scsi_cmnd *scmd; /* scsi command within request being aborted */
4458         struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */
4459         unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */
4460         unsigned char *psa = &phys_scsi3addr[0];
4461
4462         /* Get a pointer to the hpsa logical device. */
4463         scmd = (struct scsi_cmnd *) abort->scsi_cmd;
4464         dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata);
4465         if (dev == NULL) {
4466                 dev_warn(&h->pdev->dev,
4467                         "Cannot abort: no device pointer for command.\n");
4468                         return -1; /* not abortable */
4469         }
4470
4471         if (h->raid_offload_debug > 0)
4472                 dev_info(&h->pdev->dev,
4473                         "Reset as abort: Abort requested on C%d:B%d:T%d:L%d scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4474                         h->scsi_host->host_no, dev->bus, dev->target, dev->lun,
4475                         scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3],
4476                         scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]);
4477
4478         if (!dev->offload_enabled) {
4479                 dev_warn(&h->pdev->dev,
4480                         "Can't abort: device is not operating in HP SSD Smart Path mode.\n");
4481                 return -1; /* not abortable */
4482         }
4483
4484         /* Incoming scsi3addr is logical addr. We need physical disk addr. */
4485         if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) {
4486                 dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n");
4487                 return -1; /* not abortable */
4488         }
4489
4490         /* send the reset */
4491         if (h->raid_offload_debug > 0)
4492                 dev_info(&h->pdev->dev,
4493                         "Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4494                         psa[0], psa[1], psa[2], psa[3],
4495                         psa[4], psa[5], psa[6], psa[7]);
4496         rc = hpsa_send_reset(h, psa, HPSA_RESET_TYPE_TARGET);
4497         if (rc != 0) {
4498                 dev_warn(&h->pdev->dev,
4499                         "Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4500                         psa[0], psa[1], psa[2], psa[3],
4501                         psa[4], psa[5], psa[6], psa[7]);
4502                 return rc; /* failed to reset */
4503         }
4504
4505         /* wait for device to recover */
4506         if (wait_for_device_to_become_ready(h, psa) != 0) {
4507                 dev_warn(&h->pdev->dev,
4508                         "Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4509                         psa[0], psa[1], psa[2], psa[3],
4510                         psa[4], psa[5], psa[6], psa[7]);
4511                 return -1;  /* failed to recover */
4512         }
4513
4514         /* device recovered */
4515         dev_info(&h->pdev->dev,
4516                 "Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
4517                 psa[0], psa[1], psa[2], psa[3],
4518                 psa[4], psa[5], psa[6], psa[7]);
4519
4520         return rc; /* success */
4521 }
4522
4523 /* Some Smart Arrays need the abort tag swizzled, and some don't.  It's hard to
4524  * tell which kind we're dealing with, so we send the abort both ways.  There
4525  * shouldn't be any collisions between swizzled and unswizzled tags due to the
4526  * way we construct our tags but we check anyway in case the assumptions which
4527  * make this true someday become false.
4528  */
4529 static int hpsa_send_abort_both_ways(struct ctlr_info *h,
4530         unsigned char *scsi3addr, struct CommandList *abort)
4531 {
4532         u8 swizzled_tag[8];
4533         struct CommandList *c;
4534         int rc = 0, rc2 = 0;
4535
4536         /* ioccelerator mode 2 commands should be aborted via the
4537          * accelerated path, since RAID path is unaware of these commands,
4538          * but underlying firmware can't handle abort TMF.
4539          * Change abort to physical device reset.
4540          */
4541         if (abort->cmd_type == CMD_IOACCEL2)
4542                 return hpsa_send_reset_as_abort_ioaccel2(h, scsi3addr, abort);
4543
4544         /* we do not expect to find the swizzled tag in our queue, but
4545          * check anyway just to be sure the assumptions which make this
4546          * the case haven't become wrong.
4547          */
4548         memcpy(swizzled_tag, &abort->Request.CDB[4], 8);
4549         swizzle_abort_tag(swizzled_tag);
4550         c = hpsa_find_cmd_in_queue_by_tag(h, swizzled_tag, &h->cmpQ);
4551         if (c != NULL) {
4552                 dev_warn(&h->pdev->dev, "Unexpectedly found byte-swapped tag in completion queue.\n");
4553                 return hpsa_send_abort(h, scsi3addr, abort, 0);
4554         }
4555         rc = hpsa_send_abort(h, scsi3addr, abort, 0);
4556
4557         /* if the command is still in our queue, we can't conclude that it was
4558          * aborted (it might have just completed normally) but in any case
4559          * we don't need to try to abort it another way.
4560          */
4561         c = hpsa_find_cmd_in_queue(h, abort->scsi_cmd, &h->cmpQ);
4562         if (c)
4563                 rc2 = hpsa_send_abort(h, scsi3addr, abort, 1);
4564         return rc && rc2;
4565 }
4566
4567 /* Send an abort for the specified command.
4568  *      If the device and controller support it,
4569  *              send a task abort request.
4570  */
4571 static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
4572 {
4573
4574         int i, rc;
4575         struct ctlr_info *h;
4576         struct hpsa_scsi_dev_t *dev;
4577         struct CommandList *abort; /* pointer to command to be aborted */
4578         struct CommandList *found;
4579         struct scsi_cmnd *as;   /* ptr to scsi cmd inside aborted command. */
4580         char msg[256];          /* For debug messaging. */
4581         int ml = 0;
4582         u32 tagupper, taglower;
4583
4584         /* Find the controller of the command to be aborted */
4585         h = sdev_to_hba(sc->device);
4586         if (WARN(h == NULL,
4587                         "ABORT REQUEST FAILED, Controller lookup failed.\n"))
4588                 return FAILED;
4589
4590         /* Check that controller supports some kind of task abort */
4591         if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
4592                 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
4593                 return FAILED;
4594
4595         memset(msg, 0, sizeof(msg));
4596         ml += sprintf(msg+ml, "ABORT REQUEST on C%d:B%d:T%d:L%llu ",
4597                 h->scsi_host->host_no, sc->device->channel,
4598                 sc->device->id, sc->device->lun);
4599
4600         /* Find the device of the command to be aborted */
4601         dev = sc->device->hostdata;
4602         if (!dev) {
4603                 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
4604                                 msg);
4605                 return FAILED;
4606         }
4607
4608         /* Get SCSI command to be aborted */
4609         abort = (struct CommandList *) sc->host_scribble;
4610         if (abort == NULL) {
4611                 dev_err(&h->pdev->dev, "%s FAILED, Command to abort is NULL.\n",
4612                                 msg);
4613                 return FAILED;
4614         }
4615         hpsa_get_tag(h, abort, &taglower, &tagupper);
4616         ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower);
4617         as  = (struct scsi_cmnd *) abort->scsi_cmd;
4618         if (as != NULL)
4619                 ml += sprintf(msg+ml, "Command:0x%x SN:0x%lx ",
4620                         as->cmnd[0], as->serial_number);
4621         dev_dbg(&h->pdev->dev, "%s\n", msg);
4622         dev_warn(&h->pdev->dev, "Abort request on C%d:B%d:T%d:L%d\n",
4623                 h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
4624
4625         /* Search reqQ to See if command is queued but not submitted,
4626          * if so, complete the command with aborted status and remove
4627          * it from the reqQ.
4628          */
4629         found = hpsa_find_cmd_in_queue(h, sc, &h->reqQ);
4630         if (found) {
4631                 found->err_info->CommandStatus = CMD_ABORTED;
4632                 finish_cmd(found);
4633                 dev_info(&h->pdev->dev, "%s Request SUCCEEDED (driver queue).\n",
4634                                 msg);
4635                 return SUCCESS;
4636         }
4637
4638         /* not in reqQ, if also not in cmpQ, must have already completed */
4639         found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
4640         if (!found)  {
4641                 dev_dbg(&h->pdev->dev, "%s Request SUCCEEDED (not known to driver).\n",
4642                                 msg);
4643                 return SUCCESS;
4644         }
4645
4646         /*
4647          * Command is in flight, or possibly already completed
4648          * by the firmware (but not to the scsi mid layer) but we can't
4649          * distinguish which.  Send the abort down.
4650          */
4651         rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort);
4652         if (rc != 0) {
4653                 dev_dbg(&h->pdev->dev, "%s Request FAILED.\n", msg);
4654                 dev_warn(&h->pdev->dev, "FAILED abort on device C%d:B%d:T%d:L%d\n",
4655                         h->scsi_host->host_no,
4656                         dev->bus, dev->target, dev->lun);
4657                 return FAILED;
4658         }
4659         dev_info(&h->pdev->dev, "%s REQUEST SUCCEEDED.\n", msg);
4660
4661         /* If the abort(s) above completed and actually aborted the
4662          * command, then the command to be aborted should already be
4663          * completed.  If not, wait around a bit more to see if they
4664          * manage to complete normally.
4665          */
4666 #define ABORT_COMPLETE_WAIT_SECS 30
4667         for (i = 0; i < ABORT_COMPLETE_WAIT_SECS * 10; i++) {
4668                 found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
4669                 if (!found)
4670                         return SUCCESS;
4671                 msleep(100);
4672         }
4673         dev_warn(&h->pdev->dev, "%s FAILED. Aborted command has not completed after %d seconds.\n",
4674                 msg, ABORT_COMPLETE_WAIT_SECS);
4675         return FAILED;
4676 }
4677
4678
4679 /*
4680  * For operations that cannot sleep, a command block is allocated at init,
4681  * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
4682  * which ones are free or in use.  Lock must be held when calling this.
4683  * cmd_free() is the complement.
4684  */
4685 static struct CommandList *cmd_alloc(struct ctlr_info *h)
4686 {
4687         struct CommandList *c;
4688         int i;
4689         union u64bit temp64;
4690         dma_addr_t cmd_dma_handle, err_dma_handle;
4691         unsigned long flags;
4692
4693         spin_lock_irqsave(&h->lock, flags);
4694         do {
4695                 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
4696                 if (i == h->nr_cmds) {
4697                         spin_unlock_irqrestore(&h->lock, flags);
4698                         return NULL;
4699                 }
4700         } while (test_and_set_bit
4701                  (i & (BITS_PER_LONG - 1),
4702                   h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
4703         spin_unlock_irqrestore(&h->lock, flags);
4704
4705         c = h->cmd_pool + i;
4706         memset(c, 0, sizeof(*c));
4707         cmd_dma_handle = h->cmd_pool_dhandle
4708             + i * sizeof(*c);
4709         c->err_info = h->errinfo_pool + i;
4710         memset(c->err_info, 0, sizeof(*c->err_info));
4711         err_dma_handle = h->errinfo_pool_dhandle
4712             + i * sizeof(*c->err_info);
4713
4714         c->cmdindex = i;
4715
4716         INIT_LIST_HEAD(&c->list);
4717         c->busaddr = (u32) cmd_dma_handle;
4718         temp64.val = (u64) err_dma_handle;
4719         c->ErrDesc.Addr.lower = temp64.val32.lower;
4720         c->ErrDesc.Addr.upper = temp64.val32.upper;
4721         c->ErrDesc.Len = sizeof(*c->err_info);
4722
4723         c->h = h;
4724         return c;
4725 }
4726
4727 /* For operations that can wait for kmalloc to possibly sleep,
4728  * this routine can be called. Lock need not be held to call
4729  * cmd_special_alloc. cmd_special_free() is the complement.
4730  */
4731 static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
4732 {
4733         struct CommandList *c;
4734         union u64bit temp64;
4735         dma_addr_t cmd_dma_handle, err_dma_handle;
4736
4737         c = pci_zalloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
4738         if (c == NULL)
4739                 return NULL;
4740
4741         c->cmd_type = CMD_SCSI;
4742         c->cmdindex = -1;
4743
4744         c->err_info = pci_zalloc_consistent(h->pdev, sizeof(*c->err_info),
4745                                             &err_dma_handle);
4746
4747         if (c->err_info == NULL) {
4748                 pci_free_consistent(h->pdev,
4749                         sizeof(*c), c, cmd_dma_handle);
4750                 return NULL;
4751         }
4752
4753         INIT_LIST_HEAD(&c->list);
4754         c->busaddr = (u32) cmd_dma_handle;
4755         temp64.val = (u64) err_dma_handle;
4756         c->ErrDesc.Addr.lower = temp64.val32.lower;
4757         c->ErrDesc.Addr.upper = temp64.val32.upper;
4758         c->ErrDesc.Len = sizeof(*c->err_info);
4759
4760         c->h = h;
4761         return c;
4762 }
4763
4764 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
4765 {
4766         int i;
4767         unsigned long flags;
4768
4769         i = c - h->cmd_pool;
4770         spin_lock_irqsave(&h->lock, flags);
4771         clear_bit(i & (BITS_PER_LONG - 1),
4772                   h->cmd_pool_bits + (i / BITS_PER_LONG));
4773         spin_unlock_irqrestore(&h->lock, flags);
4774 }
4775
4776 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
4777 {
4778         union u64bit temp64;
4779
4780         temp64.val32.lower = c->ErrDesc.Addr.lower;
4781         temp64.val32.upper = c->ErrDesc.Addr.upper;
4782         pci_free_consistent(h->pdev, sizeof(*c->err_info),
4783                             c->err_info, (dma_addr_t) temp64.val);
4784         pci_free_consistent(h->pdev, sizeof(*c),
4785                             c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
4786 }
4787
4788 #ifdef CONFIG_COMPAT
4789
4790 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd,
4791         void __user *arg)
4792 {
4793         IOCTL32_Command_struct __user *arg32 =
4794             (IOCTL32_Command_struct __user *) arg;
4795         IOCTL_Command_struct arg64;
4796         IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
4797         int err;
4798         u32 cp;
4799
4800         memset(&arg64, 0, sizeof(arg64));
4801         err = 0;
4802         err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
4803                            sizeof(arg64.LUN_info));
4804         err |= copy_from_user(&arg64.Request, &arg32->Request,
4805                            sizeof(arg64.Request));
4806         err |= copy_from_user(&arg64.error_info, &arg32->error_info,
4807                            sizeof(arg64.error_info));
4808         err |= get_user(arg64.buf_size, &arg32->buf_size);
4809         err |= get_user(cp, &arg32->buf);
4810         arg64.buf = compat_ptr(cp);
4811         err |= copy_to_user(p, &arg64, sizeof(arg64));
4812
4813         if (err)
4814                 return -EFAULT;
4815
4816         err = hpsa_ioctl(dev, CCISS_PASSTHRU, p);
4817         if (err)
4818                 return err;
4819         err |= copy_in_user(&arg32->error_info, &p->error_info,
4820                          sizeof(arg32->error_info));
4821         if (err)
4822                 return -EFAULT;
4823         return err;
4824 }
4825
4826 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
4827         int cmd, void __user *arg)
4828 {
4829         BIG_IOCTL32_Command_struct __user *arg32 =
4830             (BIG_IOCTL32_Command_struct __user *) arg;
4831         BIG_IOCTL_Command_struct arg64;
4832         BIG_IOCTL_Command_struct __user *p =
4833             compat_alloc_user_space(sizeof(arg64));
4834         int err;
4835         u32 cp;
4836
4837         memset(&arg64, 0, sizeof(arg64));
4838         err = 0;
4839         err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
4840                            sizeof(arg64.LUN_info));
4841         err |= copy_from_user(&arg64.Request, &arg32->Request,
4842                            sizeof(arg64.Request));
4843         err |= copy_from_user(&arg64.error_info, &arg32->error_info,
4844                            sizeof(arg64.error_info));
4845         err |= get_user(arg64.buf_size, &arg32->buf_size);
4846         err |= get_user(arg64.malloc_size, &arg32->malloc_size);
4847         err |= get_user(cp, &arg32->buf);
4848         arg64.buf = compat_ptr(cp);
4849         err |= copy_to_user(p, &arg64, sizeof(arg64));
4850
4851         if (err)
4852                 return -EFAULT;
4853
4854         err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p);
4855         if (err)
4856                 return err;
4857         err |= copy_in_user(&arg32->error_info, &p->error_info,
4858                          sizeof(arg32->error_info));
4859         if (err)
4860                 return -EFAULT;
4861         return err;
4862 }
4863
4864 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
4865 {
4866         switch (cmd) {
4867         case CCISS_GETPCIINFO:
4868         case CCISS_GETINTINFO:
4869         case CCISS_SETINTINFO:
4870         case CCISS_GETNODENAME:
4871         case CCISS_SETNODENAME:
4872         case CCISS_GETHEARTBEAT:
4873         case CCISS_GETBUSTYPES:
4874         case CCISS_GETFIRMVER:
4875         case CCISS_GETDRIVVER:
4876         case CCISS_REVALIDVOLS:
4877         case CCISS_DEREGDISK:
4878         case CCISS_REGNEWDISK:
4879         case CCISS_REGNEWD:
4880         case CCISS_RESCANDISK:
4881         case CCISS_GETLUNINFO:
4882                 return hpsa_ioctl(dev, cmd, arg);
4883
4884         case CCISS_PASSTHRU32:
4885                 return hpsa_ioctl32_passthru(dev, cmd, arg);
4886         case CCISS_BIG_PASSTHRU32:
4887                 return hpsa_ioctl32_big_passthru(dev, cmd, arg);
4888
4889         default:
4890                 return -ENOIOCTLCMD;
4891         }
4892 }
4893 #endif
4894
4895 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
4896 {
4897         struct hpsa_pci_info pciinfo;
4898
4899         if (!argp)
4900                 return -EINVAL;
4901         pciinfo.domain = pci_domain_nr(h->pdev->bus);
4902         pciinfo.bus = h->pdev->bus->number;
4903         pciinfo.dev_fn = h->pdev->devfn;
4904         pciinfo.board_id = h->board_id;
4905         if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
4906                 return -EFAULT;
4907         return 0;
4908 }
4909
4910 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
4911 {
4912         DriverVer_type DriverVer;
4913         unsigned char vmaj, vmin, vsubmin;
4914         int rc;
4915
4916         rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
4917                 &vmaj, &vmin, &vsubmin);
4918         if (rc != 3) {
4919                 dev_info(&h->pdev->dev, "driver version string '%s' "
4920                         "unrecognized.", HPSA_DRIVER_VERSION);
4921                 vmaj = 0;
4922                 vmin = 0;
4923                 vsubmin = 0;
4924         }
4925         DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
4926         if (!argp)
4927                 return -EINVAL;
4928         if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
4929                 return -EFAULT;
4930         return 0;
4931 }
4932
4933 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
4934 {
4935         IOCTL_Command_struct iocommand;
4936         struct CommandList *c;
4937         char *buff = NULL;
4938         union u64bit temp64;
4939         int rc = 0;
4940
4941         if (!argp)
4942                 return -EINVAL;
4943         if (!capable(CAP_SYS_RAWIO))
4944                 return -EPERM;
4945         if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
4946                 return -EFAULT;
4947         if ((iocommand.buf_size < 1) &&
4948             (iocommand.Request.Type.Direction != XFER_NONE)) {
4949                 return -EINVAL;
4950         }
4951         if (iocommand.buf_size > 0) {
4952                 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
4953                 if (buff == NULL)
4954                         return -EFAULT;
4955                 if (iocommand.Request.Type.Direction & XFER_WRITE) {
4956                         /* Copy the data into the buffer we created */
4957                         if (copy_from_user(buff, iocommand.buf,
4958                                 iocommand.buf_size)) {
4959                                 rc = -EFAULT;
4960                                 goto out_kfree;
4961                         }
4962                 } else {
4963                         memset(buff, 0, iocommand.buf_size);
4964                 }
4965         }
4966         c = cmd_special_alloc(h);
4967         if (c == NULL) {
4968                 rc = -ENOMEM;
4969                 goto out_kfree;
4970         }
4971         /* Fill in the command type */
4972         c->cmd_type = CMD_IOCTL_PEND;
4973         /* Fill in Command Header */
4974         c->Header.ReplyQueue = 0; /* unused in simple mode */
4975         if (iocommand.buf_size > 0) {   /* buffer to fill */
4976                 c->Header.SGList = 1;
4977                 c->Header.SGTotal = 1;
4978         } else  { /* no buffers to fill */
4979                 c->Header.SGList = 0;
4980                 c->Header.SGTotal = 0;
4981         }
4982         memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
4983         /* use the kernel address the cmd block for tag */
4984         c->Header.Tag.lower = c->busaddr;
4985
4986         /* Fill in Request block */
4987         memcpy(&c->Request, &iocommand.Request,
4988                 sizeof(c->Request));
4989
4990         /* Fill in the scatter gather information */
4991         if (iocommand.buf_size > 0) {
4992                 temp64.val = pci_map_single(h->pdev, buff,
4993                         iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
4994                 if (dma_mapping_error(&h->pdev->dev, temp64.val)) {
4995                         c->SG[0].Addr.lower = 0;
4996                         c->SG[0].Addr.upper = 0;
4997                         c->SG[0].Len = 0;
4998                         rc = -ENOMEM;
4999                         goto out;
5000                 }
5001                 c->SG[0].Addr.lower = temp64.val32.lower;
5002                 c->SG[0].Addr.upper = temp64.val32.upper;
5003                 c->SG[0].Len = iocommand.buf_size;
5004                 c->SG[0].Ext = HPSA_SG_LAST; /* we are not chaining*/
5005         }
5006         hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
5007         if (iocommand.buf_size > 0)
5008                 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
5009         check_ioctl_unit_attention(h, c);
5010
5011         /* Copy the error information out */
5012         memcpy(&iocommand.error_info, c->err_info,
5013                 sizeof(iocommand.error_info));
5014         if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
5015                 rc = -EFAULT;
5016                 goto out;
5017         }
5018         if ((iocommand.Request.Type.Direction & XFER_READ) &&
5019                 iocommand.buf_size > 0) {
5020                 /* Copy the data out of the buffer we created */
5021                 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
5022                         rc = -EFAULT;
5023                         goto out;
5024                 }
5025         }
5026 out:
5027         cmd_special_free(h, c);
5028 out_kfree:
5029         kfree(buff);
5030         return rc;
5031 }
5032
5033 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
5034 {
5035         BIG_IOCTL_Command_struct *ioc;
5036         struct CommandList *c;
5037         unsigned char **buff = NULL;
5038         int *buff_size = NULL;
5039         union u64bit temp64;
5040         BYTE sg_used = 0;
5041         int status = 0;
5042         int i;
5043         u32 left;
5044         u32 sz;
5045         BYTE __user *data_ptr;
5046
5047         if (!argp)
5048                 return -EINVAL;
5049         if (!capable(CAP_SYS_RAWIO))
5050                 return -EPERM;
5051         ioc = (BIG_IOCTL_Command_struct *)
5052             kmalloc(sizeof(*ioc), GFP_KERNEL);
5053         if (!ioc) {
5054                 status = -ENOMEM;
5055                 goto cleanup1;
5056         }
5057         if (copy_from_user(ioc, argp, sizeof(*ioc))) {
5058                 status = -EFAULT;
5059                 goto cleanup1;
5060         }
5061         if ((ioc->buf_size < 1) &&
5062             (ioc->Request.Type.Direction != XFER_NONE)) {
5063                 status = -EINVAL;
5064                 goto cleanup1;
5065         }
5066         /* Check kmalloc limits  using all SGs */
5067         if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
5068                 status = -EINVAL;
5069                 goto cleanup1;
5070         }
5071         if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
5072                 status = -EINVAL;
5073                 goto cleanup1;
5074         }
5075         buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
5076         if (!buff) {
5077                 status = -ENOMEM;
5078                 goto cleanup1;
5079         }
5080         buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
5081         if (!buff_size) {
5082                 status = -ENOMEM;
5083                 goto cleanup1;
5084         }
5085         left = ioc->buf_size;
5086         data_ptr = ioc->buf;
5087         while (left) {
5088                 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
5089                 buff_size[sg_used] = sz;
5090                 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
5091                 if (buff[sg_used] == NULL) {
5092                         status = -ENOMEM;
5093                         goto cleanup1;
5094                 }
5095                 if (ioc->Request.Type.Direction & XFER_WRITE) {
5096                         if (copy_from_user(buff[sg_used], data_ptr, sz)) {
5097                                 status = -EFAULT;
5098                                 goto cleanup1;
5099                         }
5100                 } else
5101                         memset(buff[sg_used], 0, sz);
5102                 left -= sz;
5103                 data_ptr += sz;
5104                 sg_used++;
5105         }
5106         c = cmd_special_alloc(h);
5107         if (c == NULL) {
5108                 status = -ENOMEM;
5109                 goto cleanup1;
5110         }
5111         c->cmd_type = CMD_IOCTL_PEND;
5112         c->Header.ReplyQueue = 0;
5113         c->Header.SGList = c->Header.SGTotal = sg_used;
5114         memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
5115         c->Header.Tag.lower = c->busaddr;
5116         memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
5117         if (ioc->buf_size > 0) {
5118                 int i;
5119                 for (i = 0; i < sg_used; i++) {
5120                         temp64.val = pci_map_single(h->pdev, buff[i],
5121                                     buff_size[i], PCI_DMA_BIDIRECTIONAL);
5122                         if (dma_mapping_error(&h->pdev->dev, temp64.val)) {
5123                                 c->SG[i].Addr.lower = 0;
5124                                 c->SG[i].Addr.upper = 0;
5125                                 c->SG[i].Len = 0;
5126                                 hpsa_pci_unmap(h->pdev, c, i,
5127                                         PCI_DMA_BIDIRECTIONAL);
5128                                 status = -ENOMEM;
5129                                 goto cleanup0;
5130                         }
5131                         c->SG[i].Addr.lower = temp64.val32.lower;
5132                         c->SG[i].Addr.upper = temp64.val32.upper;
5133                         c->SG[i].Len = buff_size[i];
5134                         c->SG[i].Ext = i < sg_used - 1 ? 0 : HPSA_SG_LAST;
5135                 }
5136         }
5137         hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
5138         if (sg_used)
5139                 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
5140         check_ioctl_unit_attention(h, c);
5141         /* Copy the error information out */
5142         memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
5143         if (copy_to_user(argp, ioc, sizeof(*ioc))) {
5144                 status = -EFAULT;
5145                 goto cleanup0;
5146         }
5147         if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) {
5148                 /* Copy the data out of the buffer we created */
5149                 BYTE __user *ptr = ioc->buf;
5150                 for (i = 0; i < sg_used; i++) {
5151                         if (copy_to_user(ptr, buff[i], buff_size[i])) {
5152                                 status = -EFAULT;
5153                                 goto cleanup0;
5154                         }
5155                         ptr += buff_size[i];
5156                 }
5157         }
5158         status = 0;
5159 cleanup0:
5160         cmd_special_free(h, c);
5161 cleanup1:
5162         if (buff) {
5163                 for (i = 0; i < sg_used; i++)
5164                         kfree(buff[i]);
5165                 kfree(buff);
5166         }
5167         kfree(buff_size);
5168         kfree(ioc);
5169         return status;
5170 }
5171
5172 static void check_ioctl_unit_attention(struct ctlr_info *h,
5173         struct CommandList *c)
5174 {
5175         if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
5176                         c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
5177                 (void) check_for_unit_attention(h, c);
5178 }
5179
5180 static int increment_passthru_count(struct ctlr_info *h)
5181 {
5182         unsigned long flags;
5183
5184         spin_lock_irqsave(&h->passthru_count_lock, flags);
5185         if (h->passthru_count >= HPSA_MAX_CONCURRENT_PASSTHRUS) {
5186                 spin_unlock_irqrestore(&h->passthru_count_lock, flags);
5187                 return -1;
5188         }
5189         h->passthru_count++;
5190         spin_unlock_irqrestore(&h->passthru_count_lock, flags);
5191         return 0;
5192 }
5193
5194 static void decrement_passthru_count(struct ctlr_info *h)
5195 {
5196         unsigned long flags;
5197
5198         spin_lock_irqsave(&h->passthru_count_lock, flags);
5199         if (h->passthru_count <= 0) {
5200                 spin_unlock_irqrestore(&h->passthru_count_lock, flags);
5201                 /* not expecting to get here. */
5202                 dev_warn(&h->pdev->dev, "Bug detected, passthru_count seems to be incorrect.\n");
5203                 return;
5204         }
5205         h->passthru_count--;
5206         spin_unlock_irqrestore(&h->passthru_count_lock, flags);
5207 }
5208
5209 /*
5210  * ioctl
5211  */
5212 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg)
5213 {
5214         struct ctlr_info *h;
5215         void __user *argp = (void __user *)arg;
5216         int rc;
5217
5218         h = sdev_to_hba(dev);
5219
5220         switch (cmd) {
5221         case CCISS_DEREGDISK:
5222         case CCISS_REGNEWDISK:
5223         case CCISS_REGNEWD:
5224                 hpsa_scan_start(h->scsi_host);
5225                 return 0;
5226         case CCISS_GETPCIINFO:
5227                 return hpsa_getpciinfo_ioctl(h, argp);
5228         case CCISS_GETDRIVVER:
5229                 return hpsa_getdrivver_ioctl(h, argp);
5230         case CCISS_PASSTHRU:
5231                 if (increment_passthru_count(h))
5232                         return -EAGAIN;
5233                 rc = hpsa_passthru_ioctl(h, argp);
5234                 decrement_passthru_count(h);
5235                 return rc;
5236         case CCISS_BIG_PASSTHRU:
5237                 if (increment_passthru_count(h))
5238                         return -EAGAIN;
5239                 rc = hpsa_big_passthru_ioctl(h, argp);
5240                 decrement_passthru_count(h);
5241                 return rc;
5242         default:
5243                 return -ENOTTY;
5244         }
5245 }
5246
5247 static int hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
5248                                 u8 reset_type)
5249 {
5250         struct CommandList *c;
5251
5252         c = cmd_alloc(h);
5253         if (!c)
5254                 return -ENOMEM;
5255         /* fill_cmd can't fail here, no data buffer to map */
5256         (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
5257                 RAID_CTLR_LUNID, TYPE_MSG);
5258         c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
5259         c->waiting = NULL;
5260         enqueue_cmd_and_start_io(h, c);
5261         /* Don't wait for completion, the reset won't complete.  Don't free
5262          * the command either.  This is the last command we will send before
5263          * re-initializing everything, so it doesn't matter and won't leak.
5264          */
5265         return 0;
5266 }
5267
5268 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
5269         void *buff, size_t size, u16 page_code, unsigned char *scsi3addr,
5270         int cmd_type)
5271 {
5272         int pci_dir = XFER_NONE;
5273         struct CommandList *a; /* for commands to be aborted */
5274
5275         c->cmd_type = CMD_IOCTL_PEND;
5276         c->Header.ReplyQueue = 0;
5277         if (buff != NULL && size > 0) {
5278                 c->Header.SGList = 1;
5279                 c->Header.SGTotal = 1;
5280         } else {
5281                 c->Header.SGList = 0;
5282                 c->Header.SGTotal = 0;
5283         }
5284         c->Header.Tag.lower = c->busaddr;
5285         memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
5286
5287         c->Request.Type.Type = cmd_type;
5288         if (cmd_type == TYPE_CMD) {
5289                 switch (cmd) {
5290                 case HPSA_INQUIRY:
5291                         /* are we trying to read a vital product page */
5292                         if (page_code & VPD_PAGE) {
5293                                 c->Request.CDB[1] = 0x01;
5294                                 c->Request.CDB[2] = (page_code & 0xff);
5295                         }
5296                         c->Request.CDBLen = 6;
5297                         c->Request.Type.Attribute = ATTR_SIMPLE;
5298                         c->Request.Type.Direction = XFER_READ;
5299                         c->Request.Timeout = 0;
5300                         c->Request.CDB[0] = HPSA_INQUIRY;
5301                         c->Request.CDB[4] = size & 0xFF;
5302                         break;
5303                 case HPSA_REPORT_LOG:
5304                 case HPSA_REPORT_PHYS:
5305                         /* Talking to controller so It's a physical command
5306                            mode = 00 target = 0.  Nothing to write.
5307                          */
5308                         c->Request.CDBLen = 12;
5309                         c->Request.Type.Attribute = ATTR_SIMPLE;
5310                         c->Request.Type.Direction = XFER_READ;
5311                         c->Request.Timeout = 0;
5312                         c->Request.CDB[0] = cmd;
5313                         c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
5314                         c->Request.CDB[7] = (size >> 16) & 0xFF;
5315                         c->Request.CDB[8] = (size >> 8) & 0xFF;
5316                         c->Request.CDB[9] = size & 0xFF;
5317                         break;
5318                 case HPSA_CACHE_FLUSH:
5319                         c->Request.CDBLen = 12;
5320                         c->Request.Type.Attribute = ATTR_SIMPLE;
5321                         c->Request.Type.Direction = XFER_WRITE;
5322                         c->Request.Timeout = 0;
5323                         c->Request.CDB[0] = BMIC_WRITE;
5324                         c->Request.CDB[6] = BMIC_CACHE_FLUSH;
5325                         c->Request.CDB[7] = (size >> 8) & 0xFF;
5326                         c->Request.CDB[8] = size & 0xFF;
5327                         break;
5328                 case TEST_UNIT_READY:
5329                         c->Request.CDBLen = 6;
5330                         c->Request.Type.Attribute = ATTR_SIMPLE;
5331                         c->Request.Type.Direction = XFER_NONE;
5332                         c->Request.Timeout = 0;
5333                         break;
5334                 case HPSA_GET_RAID_MAP:
5335                         c->Request.CDBLen = 12;
5336                         c->Request.Type.Attribute = ATTR_SIMPLE;
5337                         c->Request.Type.Direction = XFER_READ;
5338                         c->Request.Timeout = 0;
5339                         c->Request.CDB[0] = HPSA_CISS_READ;
5340                         c->Request.CDB[1] = cmd;
5341                         c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
5342                         c->Request.CDB[7] = (size >> 16) & 0xFF;
5343                         c->Request.CDB[8] = (size >> 8) & 0xFF;
5344                         c->Request.CDB[9] = size & 0xFF;
5345                         break;
5346                 case BMIC_SENSE_CONTROLLER_PARAMETERS:
5347                         c->Request.CDBLen = 10;
5348                         c->Request.Type.Attribute = ATTR_SIMPLE;
5349                         c->Request.Type.Direction = XFER_READ;
5350                         c->Request.Timeout = 0;
5351                         c->Request.CDB[0] = BMIC_READ;
5352                         c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS;
5353                         c->Request.CDB[7] = (size >> 16) & 0xFF;
5354                         c->Request.CDB[8] = (size >> 8) & 0xFF;
5355                         break;
5356                 default:
5357                         dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
5358                         BUG();
5359                         return -1;
5360                 }
5361         } else if (cmd_type == TYPE_MSG) {
5362                 switch (cmd) {
5363
5364                 case  HPSA_DEVICE_RESET_MSG:
5365                         c->Request.CDBLen = 16;
5366                         c->Request.Type.Type =  1; /* It is a MSG not a CMD */
5367                         c->Request.Type.Attribute = ATTR_SIMPLE;
5368                         c->Request.Type.Direction = XFER_NONE;
5369                         c->Request.Timeout = 0; /* Don't time out */
5370                         memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
5371                         c->Request.CDB[0] =  cmd;
5372                         c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
5373                         /* If bytes 4-7 are zero, it means reset the */
5374                         /* LunID device */
5375                         c->Request.CDB[4] = 0x00;
5376                         c->Request.CDB[5] = 0x00;
5377                         c->Request.CDB[6] = 0x00;
5378                         c->Request.CDB[7] = 0x00;
5379                         break;
5380                 case  HPSA_ABORT_MSG:
5381                         a = buff;       /* point to command to be aborted */
5382                         dev_dbg(&h->pdev->dev, "Abort Tag:0x%08x:%08x using request Tag:0x%08x:%08x\n",
5383                                 a->Header.Tag.upper, a->Header.Tag.lower,
5384                                 c->Header.Tag.upper, c->Header.Tag.lower);
5385                         c->Request.CDBLen = 16;
5386                         c->Request.Type.Type = TYPE_MSG;
5387                         c->Request.Type.Attribute = ATTR_SIMPLE;
5388                         c->Request.Type.Direction = XFER_WRITE;
5389                         c->Request.Timeout = 0; /* Don't time out */
5390                         c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
5391                         c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
5392                         c->Request.CDB[2] = 0x00; /* reserved */
5393                         c->Request.CDB[3] = 0x00; /* reserved */
5394                         /* Tag to abort goes in CDB[4]-CDB[11] */
5395                         c->Request.CDB[4] = a->Header.Tag.lower & 0xFF;
5396                         c->Request.CDB[5] = (a->Header.Tag.lower >> 8) & 0xFF;
5397                         c->Request.CDB[6] = (a->Header.Tag.lower >> 16) & 0xFF;
5398                         c->Request.CDB[7] = (a->Header.Tag.lower >> 24) & 0xFF;
5399                         c->Request.CDB[8] = a->Header.Tag.upper & 0xFF;
5400                         c->Request.CDB[9] = (a->Header.Tag.upper >> 8) & 0xFF;
5401                         c->Request.CDB[10] = (a->Header.Tag.upper >> 16) & 0xFF;
5402                         c->Request.CDB[11] = (a->Header.Tag.upper >> 24) & 0xFF;
5403                         c->Request.CDB[12] = 0x00; /* reserved */
5404                         c->Request.CDB[13] = 0x00; /* reserved */
5405                         c->Request.CDB[14] = 0x00; /* reserved */
5406                         c->Request.CDB[15] = 0x00; /* reserved */
5407                 break;
5408                 default:
5409                         dev_warn(&h->pdev->dev, "unknown message type %d\n",
5410                                 cmd);
5411                         BUG();
5412                 }
5413         } else {
5414                 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
5415                 BUG();
5416         }
5417
5418         switch (c->Request.Type.Direction) {
5419         case XFER_READ:
5420                 pci_dir = PCI_DMA_FROMDEVICE;
5421                 break;
5422         case XFER_WRITE:
5423                 pci_dir = PCI_DMA_TODEVICE;
5424                 break;
5425         case XFER_NONE:
5426                 pci_dir = PCI_DMA_NONE;
5427                 break;
5428         default:
5429                 pci_dir = PCI_DMA_BIDIRECTIONAL;
5430         }
5431         if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
5432                 return -1;
5433         return 0;
5434 }
5435
5436 /*
5437  * Map (physical) PCI mem into (virtual) kernel space
5438  */
5439 static void __iomem *remap_pci_mem(ulong base, ulong size)
5440 {
5441         ulong page_base = ((ulong) base) & PAGE_MASK;
5442         ulong page_offs = ((ulong) base) - page_base;
5443         void __iomem *page_remapped = ioremap_nocache(page_base,
5444                 page_offs + size);
5445
5446         return page_remapped ? (page_remapped + page_offs) : NULL;
5447 }
5448
5449 /* Takes cmds off the submission queue and sends them to the hardware,
5450  * then puts them on the queue of cmds waiting for completion.
5451  * Assumes h->lock is held
5452  */
5453 static void start_io(struct ctlr_info *h, unsigned long *flags)
5454 {
5455         struct CommandList *c;
5456
5457         while (!list_empty(&h->reqQ)) {
5458                 c = list_entry(h->reqQ.next, struct CommandList, list);
5459                 /* can't do anything if fifo is full */
5460                 if ((h->access.fifo_full(h))) {
5461                         h->fifo_recently_full = 1;
5462                         dev_warn(&h->pdev->dev, "fifo full\n");
5463                         break;
5464                 }
5465                 h->fifo_recently_full = 0;
5466
5467                 /* Get the first entry from the Request Q */
5468                 removeQ(c);
5469                 h->Qdepth--;
5470
5471                 /* Put job onto the completed Q */
5472                 addQ(&h->cmpQ, c);
5473
5474                 /* Must increment commands_outstanding before unlocking
5475                  * and submitting to avoid race checking for fifo full
5476                  * condition.
5477                  */
5478                 h->commands_outstanding++;
5479
5480                 /* Tell the controller execute command */
5481                 spin_unlock_irqrestore(&h->lock, *flags);
5482                 h->access.submit_command(h, c);
5483                 spin_lock_irqsave(&h->lock, *flags);
5484         }
5485 }
5486
5487 static void lock_and_start_io(struct ctlr_info *h)
5488 {
5489         unsigned long flags;
5490
5491         spin_lock_irqsave(&h->lock, flags);
5492         start_io(h, &flags);
5493         spin_unlock_irqrestore(&h->lock, flags);
5494 }
5495
5496 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
5497 {
5498         return h->access.command_completed(h, q);
5499 }
5500
5501 static inline bool interrupt_pending(struct ctlr_info *h)
5502 {
5503         return h->access.intr_pending(h);
5504 }
5505
5506 static inline long interrupt_not_for_us(struct ctlr_info *h)
5507 {
5508         return (h->access.intr_pending(h) == 0) ||
5509                 (h->interrupts_enabled == 0);
5510 }
5511
5512 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
5513         u32 raw_tag)
5514 {
5515         if (unlikely(tag_index >= h->nr_cmds)) {
5516                 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
5517                 return 1;
5518         }
5519         return 0;
5520 }
5521
5522 static inline void finish_cmd(struct CommandList *c)
5523 {
5524         unsigned long flags;
5525         int io_may_be_stalled = 0;
5526         struct ctlr_info *h = c->h;
5527
5528         spin_lock_irqsave(&h->lock, flags);
5529         removeQ(c);
5530
5531         /*
5532          * Check for possibly stalled i/o.
5533          *
5534          * If a fifo_full condition is encountered, requests will back up
5535          * in h->reqQ.  This queue is only emptied out by start_io which is
5536          * only called when a new i/o request comes in.  If no i/o's are
5537          * forthcoming, the i/o's in h->reqQ can get stuck.  So we call
5538          * start_io from here if we detect such a danger.
5539          *
5540          * Normally, we shouldn't hit this case, but pounding on the
5541          * CCISS_PASSTHRU ioctl can provoke it.  Only call start_io if
5542          * commands_outstanding is low.  We want to avoid calling
5543          * start_io from in here as much as possible, and esp. don't
5544          * want to get in a cycle where we call start_io every time
5545          * through here.
5546          */
5547         if (unlikely(h->fifo_recently_full) &&
5548                 h->commands_outstanding < 5)
5549                 io_may_be_stalled = 1;
5550
5551         spin_unlock_irqrestore(&h->lock, flags);
5552
5553         dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
5554         if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI
5555                         || c->cmd_type == CMD_IOACCEL2))
5556                 complete_scsi_command(c);
5557         else if (c->cmd_type == CMD_IOCTL_PEND)
5558                 complete(c->waiting);
5559         if (unlikely(io_may_be_stalled))
5560                 lock_and_start_io(h);
5561 }
5562
5563 static inline u32 hpsa_tag_contains_index(u32 tag)
5564 {
5565         return tag & DIRECT_LOOKUP_BIT;
5566 }
5567
5568 static inline u32 hpsa_tag_to_index(u32 tag)
5569 {
5570         return tag >> DIRECT_LOOKUP_SHIFT;
5571 }
5572
5573
5574 static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
5575 {
5576 #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
5577 #define HPSA_SIMPLE_ERROR_BITS 0x03
5578         if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
5579                 return tag & ~HPSA_SIMPLE_ERROR_BITS;
5580         return tag & ~HPSA_PERF_ERROR_BITS;
5581 }
5582
5583 /* process completion of an indexed ("direct lookup") command */
5584 static inline void process_indexed_cmd(struct ctlr_info *h,
5585         u32 raw_tag)
5586 {
5587         u32 tag_index;
5588         struct CommandList *c;
5589
5590         tag_index = hpsa_tag_to_index(raw_tag);
5591         if (!bad_tag(h, tag_index, raw_tag)) {
5592                 c = h->cmd_pool + tag_index;
5593                 finish_cmd(c);
5594         }
5595 }
5596
5597 /* process completion of a non-indexed command */
5598 static inline void process_nonindexed_cmd(struct ctlr_info *h,
5599         u32 raw_tag)
5600 {
5601         u32 tag;
5602         struct CommandList *c = NULL;
5603         unsigned long flags;
5604
5605         tag = hpsa_tag_discard_error_bits(h, raw_tag);
5606         spin_lock_irqsave(&h->lock, flags);
5607         list_for_each_entry(c, &h->cmpQ, list) {
5608                 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
5609                         spin_unlock_irqrestore(&h->lock, flags);
5610                         finish_cmd(c);
5611                         return;
5612                 }
5613         }
5614         spin_unlock_irqrestore(&h->lock, flags);
5615         bad_tag(h, h->nr_cmds + 1, raw_tag);
5616 }
5617
5618 /* Some controllers, like p400, will give us one interrupt
5619  * after a soft reset, even if we turned interrupts off.
5620  * Only need to check for this in the hpsa_xxx_discard_completions
5621  * functions.
5622  */
5623 static int ignore_bogus_interrupt(struct ctlr_info *h)
5624 {
5625         if (likely(!reset_devices))
5626                 return 0;
5627
5628         if (likely(h->interrupts_enabled))
5629                 return 0;
5630
5631         dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
5632                 "(known firmware bug.)  Ignoring.\n");
5633
5634         return 1;
5635 }
5636
5637 /*
5638  * Convert &h->q[x] (passed to interrupt handlers) back to h.
5639  * Relies on (h-q[x] == x) being true for x such that
5640  * 0 <= x < MAX_REPLY_QUEUES.
5641  */
5642 static struct ctlr_info *queue_to_hba(u8 *queue)
5643 {
5644         return container_of((queue - *queue), struct ctlr_info, q[0]);
5645 }
5646
5647 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
5648 {
5649         struct ctlr_info *h = queue_to_hba(queue);
5650         u8 q = *(u8 *) queue;
5651         u32 raw_tag;
5652
5653         if (ignore_bogus_interrupt(h))
5654                 return IRQ_NONE;
5655
5656         if (interrupt_not_for_us(h))
5657                 return IRQ_NONE;
5658         h->last_intr_timestamp = get_jiffies_64();
5659         while (interrupt_pending(h)) {
5660                 raw_tag = get_next_completion(h, q);
5661                 while (raw_tag != FIFO_EMPTY)
5662                         raw_tag = next_command(h, q);
5663         }
5664         return IRQ_HANDLED;
5665 }
5666
5667 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
5668 {
5669         struct ctlr_info *h = queue_to_hba(queue);
5670         u32 raw_tag;
5671         u8 q = *(u8 *) queue;
5672
5673         if (ignore_bogus_interrupt(h))
5674                 return IRQ_NONE;
5675
5676         h->last_intr_timestamp = get_jiffies_64();
5677         raw_tag = get_next_completion(h, q);
5678         while (raw_tag != FIFO_EMPTY)
5679                 raw_tag = next_command(h, q);
5680         return IRQ_HANDLED;
5681 }
5682
5683 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
5684 {
5685         struct ctlr_info *h = queue_to_hba((u8 *) queue);
5686         u32 raw_tag;
5687         u8 q = *(u8 *) queue;
5688
5689         if (interrupt_not_for_us(h))
5690                 return IRQ_NONE;
5691         h->last_intr_timestamp = get_jiffies_64();
5692         while (interrupt_pending(h)) {
5693                 raw_tag = get_next_completion(h, q);
5694                 while (raw_tag != FIFO_EMPTY) {
5695                         if (likely(hpsa_tag_contains_index(raw_tag)))
5696                                 process_indexed_cmd(h, raw_tag);
5697                         else
5698                                 process_nonindexed_cmd(h, raw_tag);
5699                         raw_tag = next_command(h, q);
5700                 }
5701         }
5702         return IRQ_HANDLED;
5703 }
5704
5705 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
5706 {
5707         struct ctlr_info *h = queue_to_hba(queue);
5708         u32 raw_tag;
5709         u8 q = *(u8 *) queue;
5710
5711         h->last_intr_timestamp = get_jiffies_64();
5712         raw_tag = get_next_completion(h, q);
5713         while (raw_tag != FIFO_EMPTY) {
5714                 if (likely(hpsa_tag_contains_index(raw_tag)))
5715                         process_indexed_cmd(h, raw_tag);
5716                 else
5717                         process_nonindexed_cmd(h, raw_tag);
5718                 raw_tag = next_command(h, q);
5719         }
5720         return IRQ_HANDLED;
5721 }
5722
5723 /* Send a message CDB to the firmware. Careful, this only works
5724  * in simple mode, not performant mode due to the tag lookup.
5725  * We only ever use this immediately after a controller reset.
5726  */
5727 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
5728                         unsigned char type)
5729 {
5730         struct Command {
5731                 struct CommandListHeader CommandHeader;
5732                 struct RequestBlock Request;
5733                 struct ErrDescriptor ErrorDescriptor;
5734         };
5735         struct Command *cmd;
5736         static const size_t cmd_sz = sizeof(*cmd) +
5737                                         sizeof(cmd->ErrorDescriptor);
5738         dma_addr_t paddr64;
5739         uint32_t paddr32, tag;
5740         void __iomem *vaddr;
5741         int i, err;
5742
5743         vaddr = pci_ioremap_bar(pdev, 0);
5744         if (vaddr == NULL)
5745                 return -ENOMEM;
5746
5747         /* The Inbound Post Queue only accepts 32-bit physical addresses for the
5748          * CCISS commands, so they must be allocated from the lower 4GiB of
5749          * memory.
5750          */
5751         err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
5752         if (err) {
5753                 iounmap(vaddr);
5754                 return -ENOMEM;
5755         }
5756
5757         cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
5758         if (cmd == NULL) {
5759                 iounmap(vaddr);
5760                 return -ENOMEM;
5761         }
5762
5763         /* This must fit, because of the 32-bit consistent DMA mask.  Also,
5764          * although there's no guarantee, we assume that the address is at
5765          * least 4-byte aligned (most likely, it's page-aligned).
5766          */
5767         paddr32 = paddr64;
5768
5769         cmd->CommandHeader.ReplyQueue = 0;
5770         cmd->CommandHeader.SGList = 0;
5771         cmd->CommandHeader.SGTotal = 0;
5772         cmd->CommandHeader.Tag.lower = paddr32;
5773         cmd->CommandHeader.Tag.upper = 0;
5774         memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
5775
5776         cmd->Request.CDBLen = 16;
5777         cmd->Request.Type.Type = TYPE_MSG;
5778         cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
5779         cmd->Request.Type.Direction = XFER_NONE;
5780         cmd->Request.Timeout = 0; /* Don't time out */
5781         cmd->Request.CDB[0] = opcode;
5782         cmd->Request.CDB[1] = type;
5783         memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
5784         cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
5785         cmd->ErrorDescriptor.Addr.upper = 0;
5786         cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
5787
5788         writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
5789
5790         for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
5791                 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
5792                 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
5793                         break;
5794                 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
5795         }
5796
5797         iounmap(vaddr);
5798
5799         /* we leak the DMA buffer here ... no choice since the controller could
5800          *  still complete the command.
5801          */
5802         if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
5803                 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
5804                         opcode, type);
5805                 return -ETIMEDOUT;
5806         }
5807
5808         pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
5809
5810         if (tag & HPSA_ERROR_BIT) {
5811                 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
5812                         opcode, type);
5813                 return -EIO;
5814         }
5815
5816         dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
5817                 opcode, type);
5818         return 0;
5819 }
5820
5821 #define hpsa_noop(p) hpsa_message(p, 3, 0)
5822
5823 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
5824         void __iomem *vaddr, u32 use_doorbell)
5825 {
5826         u16 pmcsr;
5827         int pos;
5828
5829         if (use_doorbell) {
5830                 /* For everything after the P600, the PCI power state method
5831                  * of resetting the controller doesn't work, so we have this
5832                  * other way using the doorbell register.
5833                  */
5834                 dev_info(&pdev->dev, "using doorbell to reset controller\n");
5835                 writel(use_doorbell, vaddr + SA5_DOORBELL);
5836
5837                 /* PMC hardware guys tell us we need a 10 second delay after
5838                  * doorbell reset and before any attempt to talk to the board
5839                  * at all to ensure that this actually works and doesn't fall
5840                  * over in some weird corner cases.
5841                  */
5842                 msleep(10000);
5843         } else { /* Try to do it the PCI power state way */
5844
5845                 /* Quoting from the Open CISS Specification: "The Power
5846                  * Management Control/Status Register (CSR) controls the power
5847                  * state of the device.  The normal operating state is D0,
5848                  * CSR=00h.  The software off state is D3, CSR=03h.  To reset
5849                  * the controller, place the interface device in D3 then to D0,
5850                  * this causes a secondary PCI reset which will reset the
5851                  * controller." */
5852
5853                 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
5854                 if (pos == 0) {
5855                         dev_err(&pdev->dev,
5856                                 "hpsa_reset_controller: "
5857                                 "PCI PM not supported\n");
5858                         return -ENODEV;
5859                 }
5860                 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
5861                 /* enter the D3hot power management state */
5862                 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
5863                 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
5864                 pmcsr |= PCI_D3hot;
5865                 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
5866
5867                 msleep(500);
5868
5869                 /* enter the D0 power management state */
5870                 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
5871                 pmcsr |= PCI_D0;
5872                 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
5873
5874                 /*
5875                  * The P600 requires a small delay when changing states.
5876                  * Otherwise we may think the board did not reset and we bail.
5877                  * This for kdump only and is particular to the P600.
5878                  */
5879                 msleep(500);
5880         }
5881         return 0;
5882 }
5883
5884 static void init_driver_version(char *driver_version, int len)
5885 {
5886         memset(driver_version, 0, len);
5887         strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
5888 }
5889
5890 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
5891 {
5892         char *driver_version;
5893         int i, size = sizeof(cfgtable->driver_version);
5894
5895         driver_version = kmalloc(size, GFP_KERNEL);
5896         if (!driver_version)
5897                 return -ENOMEM;
5898
5899         init_driver_version(driver_version, size);
5900         for (i = 0; i < size; i++)
5901                 writeb(driver_version[i], &cfgtable->driver_version[i]);
5902         kfree(driver_version);
5903         return 0;
5904 }
5905
5906 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
5907                                           unsigned char *driver_ver)
5908 {
5909         int i;
5910
5911         for (i = 0; i < sizeof(cfgtable->driver_version); i++)
5912                 driver_ver[i] = readb(&cfgtable->driver_version[i]);
5913 }
5914
5915 static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
5916 {
5917
5918         char *driver_ver, *old_driver_ver;
5919         int rc, size = sizeof(cfgtable->driver_version);
5920
5921         old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
5922         if (!old_driver_ver)
5923                 return -ENOMEM;
5924         driver_ver = old_driver_ver + size;
5925
5926         /* After a reset, the 32 bytes of "driver version" in the cfgtable
5927          * should have been changed, otherwise we know the reset failed.
5928          */
5929         init_driver_version(old_driver_ver, size);
5930         read_driver_ver_from_cfgtable(cfgtable, driver_ver);
5931         rc = !memcmp(driver_ver, old_driver_ver, size);
5932         kfree(old_driver_ver);
5933         return rc;
5934 }
5935 /* This does a hard reset of the controller using PCI power management
5936  * states or the using the doorbell register.
5937  */
5938 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
5939 {
5940         u64 cfg_offset;
5941         u32 cfg_base_addr;
5942         u64 cfg_base_addr_index;
5943         void __iomem *vaddr;
5944         unsigned long paddr;
5945         u32 misc_fw_support;
5946         int rc;
5947         struct CfgTable __iomem *cfgtable;
5948         u32 use_doorbell;
5949         u32 board_id;
5950         u16 command_register;
5951
5952         /* For controllers as old as the P600, this is very nearly
5953          * the same thing as
5954          *
5955          * pci_save_state(pci_dev);
5956          * pci_set_power_state(pci_dev, PCI_D3hot);
5957          * pci_set_power_state(pci_dev, PCI_D0);
5958          * pci_restore_state(pci_dev);
5959          *
5960          * For controllers newer than the P600, the pci power state
5961          * method of resetting doesn't work so we have another way
5962          * using the doorbell register.
5963          */
5964
5965         rc = hpsa_lookup_board_id(pdev, &board_id);
5966         if (rc < 0 || !ctlr_is_resettable(board_id)) {
5967                 dev_warn(&pdev->dev, "Not resetting device.\n");
5968                 return -ENODEV;
5969         }
5970
5971         /* if controller is soft- but not hard resettable... */
5972         if (!ctlr_is_hard_resettable(board_id))
5973                 return -ENOTSUPP; /* try soft reset later. */
5974
5975         /* Save the PCI command register */
5976         pci_read_config_word(pdev, 4, &command_register);
5977         pci_save_state(pdev);
5978
5979         /* find the first memory BAR, so we can find the cfg table */
5980         rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
5981         if (rc)
5982                 return rc;
5983         vaddr = remap_pci_mem(paddr, 0x250);
5984         if (!vaddr)
5985                 return -ENOMEM;
5986
5987         /* find cfgtable in order to check if reset via doorbell is supported */
5988         rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
5989                                         &cfg_base_addr_index, &cfg_offset);
5990         if (rc)
5991                 goto unmap_vaddr;
5992         cfgtable = remap_pci_mem(pci_resource_start(pdev,
5993                        cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
5994         if (!cfgtable) {
5995                 rc = -ENOMEM;
5996                 goto unmap_vaddr;
5997         }
5998         rc = write_driver_ver_to_cfgtable(cfgtable);
5999         if (rc)
6000                 goto unmap_vaddr;
6001
6002         /* If reset via doorbell register is supported, use that.
6003          * There are two such methods.  Favor the newest method.
6004          */
6005         misc_fw_support = readl(&cfgtable->misc_fw_support);
6006         use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
6007         if (use_doorbell) {
6008                 use_doorbell = DOORBELL_CTLR_RESET2;
6009         } else {
6010                 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
6011                 if (use_doorbell) {
6012                         dev_warn(&pdev->dev, "Soft reset not supported. "
6013                                 "Firmware update is required.\n");
6014                         rc = -ENOTSUPP; /* try soft reset */
6015                         goto unmap_cfgtable;
6016                 }
6017         }
6018
6019         rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
6020         if (rc)
6021                 goto unmap_cfgtable;
6022
6023         pci_restore_state(pdev);
6024         pci_write_config_word(pdev, 4, command_register);
6025
6026         /* Some devices (notably the HP Smart Array 5i Controller)
6027            need a little pause here */
6028         msleep(HPSA_POST_RESET_PAUSE_MSECS);
6029
6030         rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
6031         if (rc) {
6032                 dev_warn(&pdev->dev,
6033                         "failed waiting for board to become ready "
6034                         "after hard reset\n");
6035                 goto unmap_cfgtable;
6036         }
6037
6038         rc = controller_reset_failed(vaddr);
6039         if (rc < 0)
6040                 goto unmap_cfgtable;
6041         if (rc) {
6042                 dev_warn(&pdev->dev, "Unable to successfully reset "
6043                         "controller. Will try soft reset.\n");
6044                 rc = -ENOTSUPP;
6045         } else {
6046                 dev_info(&pdev->dev, "board ready after hard reset.\n");
6047         }
6048
6049 unmap_cfgtable:
6050         iounmap(cfgtable);
6051
6052 unmap_vaddr:
6053         iounmap(vaddr);
6054         return rc;
6055 }
6056
6057 /*
6058  *  We cannot read the structure directly, for portability we must use
6059  *   the io functions.
6060  *   This is for debug only.
6061  */
6062 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb)
6063 {
6064 #ifdef HPSA_DEBUG
6065         int i;
6066         char temp_name[17];
6067
6068         dev_info(dev, "Controller Configuration information\n");
6069         dev_info(dev, "------------------------------------\n");
6070         for (i = 0; i < 4; i++)
6071                 temp_name[i] = readb(&(tb->Signature[i]));
6072         temp_name[4] = '\0';
6073         dev_info(dev, "   Signature = %s\n", temp_name);
6074         dev_info(dev, "   Spec Number = %d\n", readl(&(tb->SpecValence)));
6075         dev_info(dev, "   Transport methods supported = 0x%x\n",
6076                readl(&(tb->TransportSupport)));
6077         dev_info(dev, "   Transport methods active = 0x%x\n",
6078                readl(&(tb->TransportActive)));
6079         dev_info(dev, "   Requested transport Method = 0x%x\n",
6080                readl(&(tb->HostWrite.TransportRequest)));
6081         dev_info(dev, "   Coalesce Interrupt Delay = 0x%x\n",
6082                readl(&(tb->HostWrite.CoalIntDelay)));
6083         dev_info(dev, "   Coalesce Interrupt Count = 0x%x\n",
6084                readl(&(tb->HostWrite.CoalIntCount)));
6085         dev_info(dev, "   Max outstanding commands = 0x%d\n",
6086                readl(&(tb->CmdsOutMax)));
6087         dev_info(dev, "   Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
6088         for (i = 0; i < 16; i++)
6089                 temp_name[i] = readb(&(tb->ServerName[i]));
6090         temp_name[16] = '\0';
6091         dev_info(dev, "   Server Name = %s\n", temp_name);
6092         dev_info(dev, "   Heartbeat Counter = 0x%x\n\n\n",
6093                 readl(&(tb->HeartBeat)));
6094 #endif                          /* HPSA_DEBUG */
6095 }
6096
6097 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
6098 {
6099         int i, offset, mem_type, bar_type;
6100
6101         if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
6102                 return 0;
6103         offset = 0;
6104         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
6105                 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
6106                 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
6107                         offset += 4;
6108                 else {
6109                         mem_type = pci_resource_flags(pdev, i) &
6110                             PCI_BASE_ADDRESS_MEM_TYPE_MASK;
6111                         switch (mem_type) {
6112                         case PCI_BASE_ADDRESS_MEM_TYPE_32:
6113                         case PCI_BASE_ADDRESS_MEM_TYPE_1M:
6114                                 offset += 4;    /* 32 bit */
6115                                 break;
6116                         case PCI_BASE_ADDRESS_MEM_TYPE_64:
6117                                 offset += 8;
6118                                 break;
6119                         default:        /* reserved in PCI 2.2 */
6120                                 dev_warn(&pdev->dev,
6121                                        "base address is invalid\n");
6122                                 return -1;
6123                                 break;
6124                         }
6125                 }
6126                 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
6127                         return i + 1;
6128         }
6129         return -1;
6130 }
6131
6132 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
6133  * controllers that are capable. If not, we use IO-APIC mode.
6134  */
6135
6136 static void hpsa_interrupt_mode(struct ctlr_info *h)
6137 {
6138 #ifdef CONFIG_PCI_MSI
6139         int err, i;
6140         struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
6141
6142         for (i = 0; i < MAX_REPLY_QUEUES; i++) {
6143                 hpsa_msix_entries[i].vector = 0;
6144                 hpsa_msix_entries[i].entry = i;
6145         }
6146
6147         /* Some boards advertise MSI but don't really support it */
6148         if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
6149             (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
6150                 goto default_int_mode;
6151         if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
6152                 dev_info(&h->pdev->dev, "MSIX\n");
6153                 h->msix_vector = MAX_REPLY_QUEUES;
6154                 if (h->msix_vector > num_online_cpus())
6155                         h->msix_vector = num_online_cpus();
6156                 err = pci_enable_msix_range(h->pdev, hpsa_msix_entries,
6157                                             1, h->msix_vector);
6158                 if (err < 0) {
6159                         dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", err);
6160                         h->msix_vector = 0;
6161                         goto single_msi_mode;
6162                 } else if (err < h->msix_vector) {
6163                         dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
6164                                "available\n", err);
6165                 }
6166                 h->msix_vector = err;
6167                 for (i = 0; i < h->msix_vector; i++)
6168                         h->intr[i] = hpsa_msix_entries[i].vector;
6169                 return;
6170         }
6171 single_msi_mode:
6172         if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
6173                 dev_info(&h->pdev->dev, "MSI\n");
6174                 if (!pci_enable_msi(h->pdev))
6175                         h->msi_vector = 1;
6176                 else
6177                         dev_warn(&h->pdev->dev, "MSI init failed\n");
6178         }
6179 default_int_mode:
6180 #endif                          /* CONFIG_PCI_MSI */
6181         /* if we get here we're going to use the default interrupt mode */
6182         h->intr[h->intr_mode] = h->pdev->irq;
6183 }
6184
6185 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
6186 {
6187         int i;
6188         u32 subsystem_vendor_id, subsystem_device_id;
6189
6190         subsystem_vendor_id = pdev->subsystem_vendor;
6191         subsystem_device_id = pdev->subsystem_device;
6192         *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
6193                     subsystem_vendor_id;
6194
6195         for (i = 0; i < ARRAY_SIZE(products); i++)
6196                 if (*board_id == products[i].board_id)
6197                         return i;
6198
6199         if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
6200                 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
6201                 !hpsa_allow_any) {
6202                 dev_warn(&pdev->dev, "unrecognized board ID: "
6203                         "0x%08x, ignoring.\n", *board_id);
6204                         return -ENODEV;
6205         }
6206         return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
6207 }
6208
6209 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
6210                                     unsigned long *memory_bar)
6211 {
6212         int i;
6213
6214         for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
6215                 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
6216                         /* addressing mode bits already removed */
6217                         *memory_bar = pci_resource_start(pdev, i);
6218                         dev_dbg(&pdev->dev, "memory BAR = %lx\n",
6219                                 *memory_bar);
6220                         return 0;
6221                 }
6222         dev_warn(&pdev->dev, "no memory BAR found\n");
6223         return -ENODEV;
6224 }
6225
6226 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
6227                                      int wait_for_ready)
6228 {
6229         int i, iterations;
6230         u32 scratchpad;
6231         if (wait_for_ready)
6232                 iterations = HPSA_BOARD_READY_ITERATIONS;
6233         else
6234                 iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
6235
6236         for (i = 0; i < iterations; i++) {
6237                 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
6238                 if (wait_for_ready) {
6239                         if (scratchpad == HPSA_FIRMWARE_READY)
6240                                 return 0;
6241                 } else {
6242                         if (scratchpad != HPSA_FIRMWARE_READY)
6243                                 return 0;
6244                 }
6245                 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
6246         }
6247         dev_warn(&pdev->dev, "board not ready, timed out.\n");
6248         return -ENODEV;
6249 }
6250
6251 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
6252                                u32 *cfg_base_addr, u64 *cfg_base_addr_index,
6253                                u64 *cfg_offset)
6254 {
6255         *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
6256         *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
6257         *cfg_base_addr &= (u32) 0x0000ffff;
6258         *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
6259         if (*cfg_base_addr_index == -1) {
6260                 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
6261                 return -ENODEV;
6262         }
6263         return 0;
6264 }
6265
6266 static int hpsa_find_cfgtables(struct ctlr_info *h)
6267 {
6268         u64 cfg_offset;
6269         u32 cfg_base_addr;
6270         u64 cfg_base_addr_index;
6271         u32 trans_offset;
6272         int rc;
6273
6274         rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
6275                 &cfg_base_addr_index, &cfg_offset);
6276         if (rc)
6277                 return rc;
6278         h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
6279                        cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
6280         if (!h->cfgtable)
6281                 return -ENOMEM;
6282         rc = write_driver_ver_to_cfgtable(h->cfgtable);
6283         if (rc)
6284                 return rc;
6285         /* Find performant mode table. */
6286         trans_offset = readl(&h->cfgtable->TransMethodOffset);
6287         h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
6288                                 cfg_base_addr_index)+cfg_offset+trans_offset,
6289                                 sizeof(*h->transtable));
6290         if (!h->transtable)
6291                 return -ENOMEM;
6292         return 0;
6293 }
6294
6295 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
6296 {
6297         h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
6298
6299         /* Limit commands in memory limited kdump scenario. */
6300         if (reset_devices && h->max_commands > 32)
6301                 h->max_commands = 32;
6302
6303         if (h->max_commands < 16) {
6304                 dev_warn(&h->pdev->dev, "Controller reports "
6305                         "max supported commands of %d, an obvious lie. "
6306                         "Using 16.  Ensure that firmware is up to date.\n",
6307                         h->max_commands);
6308                 h->max_commands = 16;
6309         }
6310 }
6311
6312 /* Interrogate the hardware for some limits:
6313  * max commands, max SG elements without chaining, and with chaining,
6314  * SG chain block size, etc.
6315  */
6316 static void hpsa_find_board_params(struct ctlr_info *h)
6317 {
6318         hpsa_get_max_perf_mode_cmds(h);
6319         h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
6320         h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
6321         h->fw_support = readl(&(h->cfgtable->misc_fw_support));
6322         /*
6323          * Limit in-command s/g elements to 32 save dma'able memory.
6324          * Howvever spec says if 0, use 31
6325          */
6326         h->max_cmd_sg_entries = 31;
6327         if (h->maxsgentries > 512) {
6328                 h->max_cmd_sg_entries = 32;
6329                 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
6330                 h->maxsgentries--; /* save one for chain pointer */
6331         } else {
6332                 h->maxsgentries = 31; /* default to traditional values */
6333                 h->chainsize = 0;
6334         }
6335
6336         /* Find out what task management functions are supported and cache */
6337         h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
6338         if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags))
6339                 dev_warn(&h->pdev->dev, "Physical aborts not supported\n");
6340         if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
6341                 dev_warn(&h->pdev->dev, "Logical aborts not supported\n");
6342 }
6343
6344 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
6345 {
6346         if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
6347                 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
6348                 return false;
6349         }
6350         return true;
6351 }
6352
6353 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h)
6354 {
6355         u32 driver_support;
6356
6357         driver_support = readl(&(h->cfgtable->driver_support));
6358         /* Need to enable prefetch in the SCSI core for 6400 in x86 */
6359 #ifdef CONFIG_X86
6360         driver_support |= ENABLE_SCSI_PREFETCH;
6361 #endif
6362         driver_support |= ENABLE_UNIT_ATTN;
6363         writel(driver_support, &(h->cfgtable->driver_support));
6364 }
6365
6366 /* Disable DMA prefetch for the P600.  Otherwise an ASIC bug may result
6367  * in a prefetch beyond physical memory.
6368  */
6369 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
6370 {
6371         u32 dma_prefetch;
6372
6373         if (h->board_id != 0x3225103C)
6374                 return;
6375         dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
6376         dma_prefetch |= 0x8000;
6377         writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
6378 }
6379
6380 static void hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h)
6381 {
6382         int i;
6383         u32 doorbell_value;
6384         unsigned long flags;
6385         /* wait until the clear_event_notify bit 6 is cleared by controller. */
6386         for (i = 0; i < MAX_CONFIG_WAIT; i++) {
6387                 spin_lock_irqsave(&h->lock, flags);
6388                 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
6389                 spin_unlock_irqrestore(&h->lock, flags);
6390                 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS))
6391                         break;
6392                 /* delay and try again */
6393                 msleep(20);
6394         }
6395 }
6396
6397 static void hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
6398 {
6399         int i;
6400         u32 doorbell_value;
6401         unsigned long flags;
6402
6403         /* under certain very rare conditions, this can take awhile.
6404          * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
6405          * as we enter this code.)
6406          */
6407         for (i = 0; i < MAX_CONFIG_WAIT; i++) {
6408                 spin_lock_irqsave(&h->lock, flags);
6409                 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
6410                 spin_unlock_irqrestore(&h->lock, flags);
6411                 if (!(doorbell_value & CFGTBL_ChangeReq))
6412                         break;
6413                 /* delay and try again */
6414                 usleep_range(10000, 20000);
6415         }
6416 }
6417
6418 static int hpsa_enter_simple_mode(struct ctlr_info *h)
6419 {
6420         u32 trans_support;
6421
6422         trans_support = readl(&(h->cfgtable->TransportSupport));
6423         if (!(trans_support & SIMPLE_MODE))
6424                 return -ENOTSUPP;
6425
6426         h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
6427
6428         /* Update the field, and then ring the doorbell */
6429         writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
6430         writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
6431         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
6432         hpsa_wait_for_mode_change_ack(h);
6433         print_cfg_table(&h->pdev->dev, h->cfgtable);
6434         if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple))
6435                 goto error;
6436         h->transMethod = CFGTBL_Trans_Simple;
6437         return 0;
6438 error:
6439         dev_warn(&h->pdev->dev, "unable to get board into simple mode\n");
6440         return -ENODEV;
6441 }
6442
6443 static int hpsa_pci_init(struct ctlr_info *h)
6444 {
6445         int prod_index, err;
6446
6447         prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
6448         if (prod_index < 0)
6449                 return -ENODEV;
6450         h->product_name = products[prod_index].product_name;
6451         h->access = *(products[prod_index].access);
6452
6453         pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
6454                                PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
6455
6456         err = pci_enable_device(h->pdev);
6457         if (err) {
6458                 dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
6459                 return err;
6460         }
6461
6462         /* Enable bus mastering (pci_disable_device may disable this) */
6463         pci_set_master(h->pdev);
6464
6465         err = pci_request_regions(h->pdev, HPSA);
6466         if (err) {
6467                 dev_err(&h->pdev->dev,
6468                         "cannot obtain PCI resources, aborting\n");
6469                 return err;
6470         }
6471         hpsa_interrupt_mode(h);
6472         err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
6473         if (err)
6474                 goto err_out_free_res;
6475         h->vaddr = remap_pci_mem(h->paddr, 0x250);
6476         if (!h->vaddr) {
6477                 err = -ENOMEM;
6478                 goto err_out_free_res;
6479         }
6480         err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
6481         if (err)
6482                 goto err_out_free_res;
6483         err = hpsa_find_cfgtables(h);
6484         if (err)
6485                 goto err_out_free_res;
6486         hpsa_find_board_params(h);
6487
6488         if (!hpsa_CISS_signature_present(h)) {
6489                 err = -ENODEV;
6490                 goto err_out_free_res;
6491         }
6492         hpsa_set_driver_support_bits(h);
6493         hpsa_p600_dma_prefetch_quirk(h);
6494         err = hpsa_enter_simple_mode(h);
6495         if (err)
6496                 goto err_out_free_res;
6497         return 0;
6498
6499 err_out_free_res:
6500         if (h->transtable)
6501                 iounmap(h->transtable);
6502         if (h->cfgtable)
6503                 iounmap(h->cfgtable);
6504         if (h->vaddr)
6505                 iounmap(h->vaddr);
6506         pci_disable_device(h->pdev);
6507         pci_release_regions(h->pdev);
6508         return err;
6509 }
6510
6511 static void hpsa_hba_inquiry(struct ctlr_info *h)
6512 {
6513         int rc;
6514
6515 #define HBA_INQUIRY_BYTE_COUNT 64
6516         h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
6517         if (!h->hba_inquiry_data)
6518                 return;
6519         rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
6520                 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
6521         if (rc != 0) {
6522                 kfree(h->hba_inquiry_data);
6523                 h->hba_inquiry_data = NULL;
6524         }
6525 }
6526
6527 static int hpsa_init_reset_devices(struct pci_dev *pdev)
6528 {
6529         int rc, i;
6530
6531         if (!reset_devices)
6532                 return 0;
6533
6534         /* kdump kernel is loading, we don't know in which state is
6535          * the pci interface. The dev->enable_cnt is equal zero
6536          * so we call enable+disable, wait a while and switch it on.
6537          */
6538         rc = pci_enable_device(pdev);
6539         if (rc) {
6540                 dev_warn(&pdev->dev, "Failed to enable PCI device\n");
6541                 return -ENODEV;
6542         }
6543         pci_disable_device(pdev);
6544         msleep(260);                    /* a randomly chosen number */
6545         rc = pci_enable_device(pdev);
6546         if (rc) {
6547                 dev_warn(&pdev->dev, "failed to enable device.\n");
6548                 return -ENODEV;
6549         }
6550         pci_set_master(pdev);
6551         /* Reset the controller with a PCI power-cycle or via doorbell */
6552         rc = hpsa_kdump_hard_reset_controller(pdev);
6553
6554         /* -ENOTSUPP here means we cannot reset the controller
6555          * but it's already (and still) up and running in
6556          * "performant mode".  Or, it might be 640x, which can't reset
6557          * due to concerns about shared bbwc between 6402/6404 pair.
6558          */
6559         if (rc) {
6560                 if (rc != -ENOTSUPP) /* just try to do the kdump anyhow. */
6561                         rc = -ENODEV;
6562                 goto out_disable;
6563         }
6564
6565         /* Now try to get the controller to respond to a no-op */
6566         dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
6567         for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
6568                 if (hpsa_noop(pdev) == 0)
6569                         break;
6570                 else
6571                         dev_warn(&pdev->dev, "no-op failed%s\n",
6572                                         (i < 11 ? "; re-trying" : ""));
6573         }
6574
6575 out_disable:
6576
6577         pci_disable_device(pdev);
6578         return rc;
6579 }
6580
6581 static int hpsa_allocate_cmd_pool(struct ctlr_info *h)
6582 {
6583         h->cmd_pool_bits = kzalloc(
6584                 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
6585                 sizeof(unsigned long), GFP_KERNEL);
6586         h->cmd_pool = pci_alloc_consistent(h->pdev,
6587                     h->nr_cmds * sizeof(*h->cmd_pool),
6588                     &(h->cmd_pool_dhandle));
6589         h->errinfo_pool = pci_alloc_consistent(h->pdev,
6590                     h->nr_cmds * sizeof(*h->errinfo_pool),
6591                     &(h->errinfo_pool_dhandle));
6592         if ((h->cmd_pool_bits == NULL)
6593             || (h->cmd_pool == NULL)
6594             || (h->errinfo_pool == NULL)) {
6595                 dev_err(&h->pdev->dev, "out of memory in %s", __func__);
6596                 return -ENOMEM;
6597         }
6598         return 0;
6599 }
6600
6601 static void hpsa_free_cmd_pool(struct ctlr_info *h)
6602 {
6603         kfree(h->cmd_pool_bits);
6604         if (h->cmd_pool)
6605                 pci_free_consistent(h->pdev,
6606                             h->nr_cmds * sizeof(struct CommandList),
6607                             h->cmd_pool, h->cmd_pool_dhandle);
6608         if (h->ioaccel2_cmd_pool)
6609                 pci_free_consistent(h->pdev,
6610                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
6611                         h->ioaccel2_cmd_pool, h->ioaccel2_cmd_pool_dhandle);
6612         if (h->errinfo_pool)
6613                 pci_free_consistent(h->pdev,
6614                             h->nr_cmds * sizeof(struct ErrorInfo),
6615                             h->errinfo_pool,
6616                             h->errinfo_pool_dhandle);
6617         if (h->ioaccel_cmd_pool)
6618                 pci_free_consistent(h->pdev,
6619                         h->nr_cmds * sizeof(struct io_accel1_cmd),
6620                         h->ioaccel_cmd_pool, h->ioaccel_cmd_pool_dhandle);
6621 }
6622
6623 static void hpsa_irq_affinity_hints(struct ctlr_info *h)
6624 {
6625         int i, cpu, rc;
6626
6627         cpu = cpumask_first(cpu_online_mask);
6628         for (i = 0; i < h->msix_vector; i++) {
6629                 rc = irq_set_affinity_hint(h->intr[i], get_cpu_mask(cpu));
6630                 cpu = cpumask_next(cpu, cpu_online_mask);
6631         }
6632 }
6633
6634 static int hpsa_request_irq(struct ctlr_info *h,
6635         irqreturn_t (*msixhandler)(int, void *),
6636         irqreturn_t (*intxhandler)(int, void *))
6637 {
6638         int rc, i;
6639
6640         /*
6641          * initialize h->q[x] = x so that interrupt handlers know which
6642          * queue to process.
6643          */
6644         for (i = 0; i < MAX_REPLY_QUEUES; i++)
6645                 h->q[i] = (u8) i;
6646
6647         if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) {
6648                 /* If performant mode and MSI-X, use multiple reply queues */
6649                 for (i = 0; i < h->msix_vector; i++)
6650                         rc = request_irq(h->intr[i], msixhandler,
6651                                         0, h->devname,
6652                                         &h->q[i]);
6653                 hpsa_irq_affinity_hints(h);
6654         } else {
6655                 /* Use single reply pool */
6656                 if (h->msix_vector > 0 || h->msi_vector) {
6657                         rc = request_irq(h->intr[h->intr_mode],
6658                                 msixhandler, 0, h->devname,
6659                                 &h->q[h->intr_mode]);
6660                 } else {
6661                         rc = request_irq(h->intr[h->intr_mode],
6662                                 intxhandler, IRQF_SHARED, h->devname,
6663                                 &h->q[h->intr_mode]);
6664                 }
6665         }
6666         if (rc) {
6667                 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
6668                        h->intr[h->intr_mode], h->devname);
6669                 return -ENODEV;
6670         }
6671         return 0;
6672 }
6673
6674 static int hpsa_kdump_soft_reset(struct ctlr_info *h)
6675 {
6676         if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
6677                 HPSA_RESET_TYPE_CONTROLLER)) {
6678                 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
6679                 return -EIO;
6680         }
6681
6682         dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
6683         if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
6684                 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
6685                 return -1;
6686         }
6687
6688         dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
6689         if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
6690                 dev_warn(&h->pdev->dev, "Board failed to become ready "
6691                         "after soft reset.\n");
6692                 return -1;
6693         }
6694
6695         return 0;
6696 }
6697
6698 static void free_irqs(struct ctlr_info *h)
6699 {
6700         int i;
6701
6702         if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
6703                 /* Single reply queue, only one irq to free */
6704                 i = h->intr_mode;
6705                 irq_set_affinity_hint(h->intr[i], NULL);
6706                 free_irq(h->intr[i], &h->q[i]);
6707                 return;
6708         }
6709
6710         for (i = 0; i < h->msix_vector; i++) {
6711                 irq_set_affinity_hint(h->intr[i], NULL);
6712                 free_irq(h->intr[i], &h->q[i]);
6713         }
6714 }
6715
6716 static void hpsa_free_irqs_and_disable_msix(struct ctlr_info *h)
6717 {
6718         free_irqs(h);
6719 #ifdef CONFIG_PCI_MSI
6720         if (h->msix_vector) {
6721                 if (h->pdev->msix_enabled)
6722                         pci_disable_msix(h->pdev);
6723         } else if (h->msi_vector) {
6724                 if (h->pdev->msi_enabled)
6725                         pci_disable_msi(h->pdev);
6726         }
6727 #endif /* CONFIG_PCI_MSI */
6728 }
6729
6730 static void hpsa_free_reply_queues(struct ctlr_info *h)
6731 {
6732         int i;
6733
6734         for (i = 0; i < h->nreply_queues; i++) {
6735                 if (!h->reply_queue[i].head)
6736                         continue;
6737                 pci_free_consistent(h->pdev, h->reply_queue_size,
6738                         h->reply_queue[i].head, h->reply_queue[i].busaddr);
6739                 h->reply_queue[i].head = NULL;
6740                 h->reply_queue[i].busaddr = 0;
6741         }
6742 }
6743
6744 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
6745 {
6746         hpsa_free_irqs_and_disable_msix(h);
6747         hpsa_free_sg_chain_blocks(h);
6748         hpsa_free_cmd_pool(h);
6749         kfree(h->ioaccel1_blockFetchTable);
6750         kfree(h->blockFetchTable);
6751         hpsa_free_reply_queues(h);
6752         if (h->vaddr)
6753                 iounmap(h->vaddr);
6754         if (h->transtable)
6755                 iounmap(h->transtable);
6756         if (h->cfgtable)
6757                 iounmap(h->cfgtable);
6758         pci_disable_device(h->pdev);
6759         pci_release_regions(h->pdev);
6760         kfree(h);
6761 }
6762
6763 /* Called when controller lockup detected. */
6764 static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list)
6765 {
6766         struct CommandList *c = NULL;
6767
6768         assert_spin_locked(&h->lock);
6769         /* Mark all outstanding commands as failed and complete them. */
6770         while (!list_empty(list)) {
6771                 c = list_entry(list->next, struct CommandList, list);
6772                 c->err_info->CommandStatus = CMD_HARDWARE_ERR;
6773                 finish_cmd(c);
6774         }
6775 }
6776
6777 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value)
6778 {
6779         int i, cpu;
6780
6781         cpu = cpumask_first(cpu_online_mask);
6782         for (i = 0; i < num_online_cpus(); i++) {
6783                 u32 *lockup_detected;
6784                 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu);
6785                 *lockup_detected = value;
6786                 cpu = cpumask_next(cpu, cpu_online_mask);
6787         }
6788         wmb(); /* be sure the per-cpu variables are out to memory */
6789 }
6790
6791 static void controller_lockup_detected(struct ctlr_info *h)
6792 {
6793         unsigned long flags;
6794         u32 lockup_detected;
6795
6796         h->access.set_intr_mask(h, HPSA_INTR_OFF);
6797         spin_lock_irqsave(&h->lock, flags);
6798         lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
6799         if (!lockup_detected) {
6800                 /* no heartbeat, but controller gave us a zero. */
6801                 dev_warn(&h->pdev->dev,
6802                         "lockup detected but scratchpad register is zero\n");
6803                 lockup_detected = 0xffffffff;
6804         }
6805         set_lockup_detected_for_all_cpus(h, lockup_detected);
6806         spin_unlock_irqrestore(&h->lock, flags);
6807         dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n",
6808                         lockup_detected);
6809         pci_disable_device(h->pdev);
6810         spin_lock_irqsave(&h->lock, flags);
6811         fail_all_cmds_on_list(h, &h->cmpQ);
6812         fail_all_cmds_on_list(h, &h->reqQ);
6813         spin_unlock_irqrestore(&h->lock, flags);
6814 }
6815
6816 static void detect_controller_lockup(struct ctlr_info *h)
6817 {
6818         u64 now;
6819         u32 heartbeat;
6820         unsigned long flags;
6821
6822         now = get_jiffies_64();
6823         /* If we've received an interrupt recently, we're ok. */
6824         if (time_after64(h->last_intr_timestamp +
6825                                 (h->heartbeat_sample_interval), now))
6826                 return;
6827
6828         /*
6829          * If we've already checked the heartbeat recently, we're ok.
6830          * This could happen if someone sends us a signal. We
6831          * otherwise don't care about signals in this thread.
6832          */
6833         if (time_after64(h->last_heartbeat_timestamp +
6834                                 (h->heartbeat_sample_interval), now))
6835                 return;
6836
6837         /* If heartbeat has not changed since we last looked, we're not ok. */
6838         spin_lock_irqsave(&h->lock, flags);
6839         heartbeat = readl(&h->cfgtable->HeartBeat);
6840         spin_unlock_irqrestore(&h->lock, flags);
6841         if (h->last_heartbeat == heartbeat) {
6842                 controller_lockup_detected(h);
6843                 return;
6844         }
6845
6846         /* We're ok. */
6847         h->last_heartbeat = heartbeat;
6848         h->last_heartbeat_timestamp = now;
6849 }
6850
6851 static void hpsa_ack_ctlr_events(struct ctlr_info *h)
6852 {
6853         int i;
6854         char *event_type;
6855
6856         /* Clear the driver-requested rescan flag */
6857         h->drv_req_rescan = 0;
6858
6859         /* Ask the controller to clear the events we're handling. */
6860         if ((h->transMethod & (CFGTBL_Trans_io_accel1
6861                         | CFGTBL_Trans_io_accel2)) &&
6862                 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE ||
6863                  h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) {
6864
6865                 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE)
6866                         event_type = "state change";
6867                 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)
6868                         event_type = "configuration change";
6869                 /* Stop sending new RAID offload reqs via the IO accelerator */
6870                 scsi_block_requests(h->scsi_host);
6871                 for (i = 0; i < h->ndevices; i++)
6872                         h->dev[i]->offload_enabled = 0;
6873                 hpsa_drain_accel_commands(h);
6874                 /* Set 'accelerator path config change' bit */
6875                 dev_warn(&h->pdev->dev,
6876                         "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n",
6877                         h->events, event_type);
6878                 writel(h->events, &(h->cfgtable->clear_event_notify));
6879                 /* Set the "clear event notify field update" bit 6 */
6880                 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
6881                 /* Wait until ctlr clears 'clear event notify field', bit 6 */
6882                 hpsa_wait_for_clear_event_notify_ack(h);
6883                 scsi_unblock_requests(h->scsi_host);
6884         } else {
6885                 /* Acknowledge controller notification events. */
6886                 writel(h->events, &(h->cfgtable->clear_event_notify));
6887                 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
6888                 hpsa_wait_for_clear_event_notify_ack(h);
6889 #if 0
6890                 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
6891                 hpsa_wait_for_mode_change_ack(h);
6892 #endif
6893         }
6894         return;
6895 }
6896
6897 /* Check a register on the controller to see if there are configuration
6898  * changes (added/changed/removed logical drives, etc.) which mean that
6899  * we should rescan the controller for devices.
6900  * Also check flag for driver-initiated rescan.
6901  */
6902 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h)
6903 {
6904         if (h->drv_req_rescan)
6905                 return 1;
6906
6907         if (!(h->fw_support & MISC_FW_EVENT_NOTIFY))
6908                 return 0;
6909
6910         h->events = readl(&(h->cfgtable->event_notify));
6911         return h->events & RESCAN_REQUIRED_EVENT_BITS;
6912 }
6913
6914 /*
6915  * Check if any of the offline devices have become ready
6916  */
6917 static int hpsa_offline_devices_ready(struct ctlr_info *h)
6918 {
6919         unsigned long flags;
6920         struct offline_device_entry *d;
6921         struct list_head *this, *tmp;
6922
6923         spin_lock_irqsave(&h->offline_device_lock, flags);
6924         list_for_each_safe(this, tmp, &h->offline_device_list) {
6925                 d = list_entry(this, struct offline_device_entry,
6926                                 offline_list);
6927                 spin_unlock_irqrestore(&h->offline_device_lock, flags);
6928                 if (!hpsa_volume_offline(h, d->scsi3addr)) {
6929                         spin_lock_irqsave(&h->offline_device_lock, flags);
6930                         list_del(&d->offline_list);
6931                         spin_unlock_irqrestore(&h->offline_device_lock, flags);
6932                         return 1;
6933                 }
6934                 spin_lock_irqsave(&h->offline_device_lock, flags);
6935         }
6936         spin_unlock_irqrestore(&h->offline_device_lock, flags);
6937         return 0;
6938 }
6939
6940
6941 static void hpsa_monitor_ctlr_worker(struct work_struct *work)
6942 {
6943         unsigned long flags;
6944         struct ctlr_info *h = container_of(to_delayed_work(work),
6945                                         struct ctlr_info, monitor_ctlr_work);
6946         detect_controller_lockup(h);
6947         if (lockup_detected(h))
6948                 return;
6949
6950         if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) {
6951                 scsi_host_get(h->scsi_host);
6952                 h->drv_req_rescan = 0;
6953                 hpsa_ack_ctlr_events(h);
6954                 hpsa_scan_start(h->scsi_host);
6955                 scsi_host_put(h->scsi_host);
6956         }
6957
6958         spin_lock_irqsave(&h->lock, flags);
6959         if (h->remove_in_progress) {
6960                 spin_unlock_irqrestore(&h->lock, flags);
6961                 return;
6962         }
6963         schedule_delayed_work(&h->monitor_ctlr_work,
6964                                 h->heartbeat_sample_interval);
6965         spin_unlock_irqrestore(&h->lock, flags);
6966 }
6967
6968 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
6969 {
6970         int dac, rc;
6971         struct ctlr_info *h;
6972         int try_soft_reset = 0;
6973         unsigned long flags;
6974
6975         if (number_of_controllers == 0)
6976                 printk(KERN_INFO DRIVER_NAME "\n");
6977
6978         rc = hpsa_init_reset_devices(pdev);
6979         if (rc) {
6980                 if (rc != -ENOTSUPP)
6981                         return rc;
6982                 /* If the reset fails in a particular way (it has no way to do
6983                  * a proper hard reset, so returns -ENOTSUPP) we can try to do
6984                  * a soft reset once we get the controller configured up to the
6985                  * point that it can accept a command.
6986                  */
6987                 try_soft_reset = 1;
6988                 rc = 0;
6989         }
6990
6991 reinit_after_soft_reset:
6992
6993         /* Command structures must be aligned on a 32-byte boundary because
6994          * the 5 lower bits of the address are used by the hardware. and by
6995          * the driver.  See comments in hpsa.h for more info.
6996          */
6997         BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
6998         h = kzalloc(sizeof(*h), GFP_KERNEL);
6999         if (!h)
7000                 return -ENOMEM;
7001
7002         h->pdev = pdev;
7003         h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
7004         INIT_LIST_HEAD(&h->cmpQ);
7005         INIT_LIST_HEAD(&h->reqQ);
7006         INIT_LIST_HEAD(&h->offline_device_list);
7007         spin_lock_init(&h->lock);
7008         spin_lock_init(&h->offline_device_lock);
7009         spin_lock_init(&h->scan_lock);
7010         spin_lock_init(&h->passthru_count_lock);
7011
7012         /* Allocate and clear per-cpu variable lockup_detected */
7013         h->lockup_detected = alloc_percpu(u32);
7014         if (!h->lockup_detected) {
7015                 rc = -ENOMEM;
7016                 goto clean1;
7017         }
7018         set_lockup_detected_for_all_cpus(h, 0);
7019
7020         rc = hpsa_pci_init(h);
7021         if (rc != 0)
7022                 goto clean1;
7023
7024         sprintf(h->devname, HPSA "%d", number_of_controllers);
7025         h->ctlr = number_of_controllers;
7026         number_of_controllers++;
7027
7028         /* configure PCI DMA stuff */
7029         rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
7030         if (rc == 0) {
7031                 dac = 1;
7032         } else {
7033                 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
7034                 if (rc == 0) {
7035                         dac = 0;
7036                 } else {
7037                         dev_err(&pdev->dev, "no suitable DMA available\n");
7038                         goto clean1;
7039                 }
7040         }
7041
7042         /* make sure the board interrupts are off */
7043         h->access.set_intr_mask(h, HPSA_INTR_OFF);
7044
7045         if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
7046                 goto clean2;
7047         dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
7048                h->devname, pdev->device,
7049                h->intr[h->intr_mode], dac ? "" : " not");
7050         if (hpsa_allocate_cmd_pool(h))
7051                 goto clean4;
7052         if (hpsa_allocate_sg_chain_blocks(h))
7053                 goto clean4;
7054         init_waitqueue_head(&h->scan_wait_queue);
7055         h->scan_finished = 1; /* no scan currently in progress */
7056
7057         pci_set_drvdata(pdev, h);
7058         h->ndevices = 0;
7059         h->hba_mode_enabled = 0;
7060         h->scsi_host = NULL;
7061         spin_lock_init(&h->devlock);
7062         hpsa_put_ctlr_into_performant_mode(h);
7063
7064         /* At this point, the controller is ready to take commands.
7065          * Now, if reset_devices and the hard reset didn't work, try
7066          * the soft reset and see if that works.
7067          */
7068         if (try_soft_reset) {
7069
7070                 /* This is kind of gross.  We may or may not get a completion
7071                  * from the soft reset command, and if we do, then the value
7072                  * from the fifo may or may not be valid.  So, we wait 10 secs
7073                  * after the reset throwing away any completions we get during
7074                  * that time.  Unregister the interrupt handler and register
7075                  * fake ones to scoop up any residual completions.
7076                  */
7077                 spin_lock_irqsave(&h->lock, flags);
7078                 h->access.set_intr_mask(h, HPSA_INTR_OFF);
7079                 spin_unlock_irqrestore(&h->lock, flags);
7080                 free_irqs(h);
7081                 rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
7082                                         hpsa_intx_discard_completions);
7083                 if (rc) {
7084                         dev_warn(&h->pdev->dev, "Failed to request_irq after "
7085                                 "soft reset.\n");
7086                         goto clean4;
7087                 }
7088
7089                 rc = hpsa_kdump_soft_reset(h);
7090                 if (rc)
7091                         /* Neither hard nor soft reset worked, we're hosed. */
7092                         goto clean4;
7093
7094                 dev_info(&h->pdev->dev, "Board READY.\n");
7095                 dev_info(&h->pdev->dev,
7096                         "Waiting for stale completions to drain.\n");
7097                 h->access.set_intr_mask(h, HPSA_INTR_ON);
7098                 msleep(10000);
7099                 h->access.set_intr_mask(h, HPSA_INTR_OFF);
7100
7101                 rc = controller_reset_failed(h->cfgtable);
7102                 if (rc)
7103                         dev_info(&h->pdev->dev,
7104                                 "Soft reset appears to have failed.\n");
7105
7106                 /* since the controller's reset, we have to go back and re-init
7107                  * everything.  Easiest to just forget what we've done and do it
7108                  * all over again.
7109                  */
7110                 hpsa_undo_allocations_after_kdump_soft_reset(h);
7111                 try_soft_reset = 0;
7112                 if (rc)
7113                         /* don't go to clean4, we already unallocated */
7114                         return -ENODEV;
7115
7116                 goto reinit_after_soft_reset;
7117         }
7118
7119                 /* Enable Accelerated IO path at driver layer */
7120                 h->acciopath_status = 1;
7121
7122         h->drv_req_rescan = 0;
7123
7124         /* Turn the interrupts on so we can service requests */
7125         h->access.set_intr_mask(h, HPSA_INTR_ON);
7126
7127         hpsa_hba_inquiry(h);
7128         hpsa_register_scsi(h);  /* hook ourselves into SCSI subsystem */
7129
7130         /* Monitor the controller for firmware lockups */
7131         h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
7132         INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker);
7133         schedule_delayed_work(&h->monitor_ctlr_work,
7134                                 h->heartbeat_sample_interval);
7135         return 0;
7136
7137 clean4:
7138         hpsa_free_sg_chain_blocks(h);
7139         hpsa_free_cmd_pool(h);
7140         free_irqs(h);
7141 clean2:
7142 clean1:
7143         if (h->lockup_detected)
7144                 free_percpu(h->lockup_detected);
7145         kfree(h);
7146         return rc;
7147 }
7148
7149 static void hpsa_flush_cache(struct ctlr_info *h)
7150 {
7151         char *flush_buf;
7152         struct CommandList *c;
7153
7154         /* Don't bother trying to flush the cache if locked up */
7155         if (unlikely(lockup_detected(h)))
7156                 return;
7157         flush_buf = kzalloc(4, GFP_KERNEL);
7158         if (!flush_buf)
7159                 return;
7160
7161         c = cmd_special_alloc(h);
7162         if (!c) {
7163                 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
7164                 goto out_of_memory;
7165         }
7166         if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
7167                 RAID_CTLR_LUNID, TYPE_CMD)) {
7168                 goto out;
7169         }
7170         hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
7171         if (c->err_info->CommandStatus != 0)
7172 out:
7173                 dev_warn(&h->pdev->dev,
7174                         "error flushing cache on controller\n");
7175         cmd_special_free(h, c);
7176 out_of_memory:
7177         kfree(flush_buf);
7178 }
7179
7180 static void hpsa_shutdown(struct pci_dev *pdev)
7181 {
7182         struct ctlr_info *h;
7183
7184         h = pci_get_drvdata(pdev);
7185         /* Turn board interrupts off  and send the flush cache command
7186          * sendcmd will turn off interrupt, and send the flush...
7187          * To write all data in the battery backed cache to disks
7188          */
7189         hpsa_flush_cache(h);
7190         h->access.set_intr_mask(h, HPSA_INTR_OFF);
7191         hpsa_free_irqs_and_disable_msix(h);
7192 }
7193
7194 static void hpsa_free_device_info(struct ctlr_info *h)
7195 {
7196         int i;
7197
7198         for (i = 0; i < h->ndevices; i++)
7199                 kfree(h->dev[i]);
7200 }
7201
7202 static void hpsa_remove_one(struct pci_dev *pdev)
7203 {
7204         struct ctlr_info *h;
7205         unsigned long flags;
7206
7207         if (pci_get_drvdata(pdev) == NULL) {
7208                 dev_err(&pdev->dev, "unable to remove device\n");
7209                 return;
7210         }
7211         h = pci_get_drvdata(pdev);
7212
7213         /* Get rid of any controller monitoring work items */
7214         spin_lock_irqsave(&h->lock, flags);
7215         h->remove_in_progress = 1;
7216         cancel_delayed_work(&h->monitor_ctlr_work);
7217         spin_unlock_irqrestore(&h->lock, flags);
7218
7219         hpsa_unregister_scsi(h);        /* unhook from SCSI subsystem */
7220         hpsa_shutdown(pdev);
7221         iounmap(h->vaddr);
7222         iounmap(h->transtable);
7223         iounmap(h->cfgtable);
7224         hpsa_free_device_info(h);
7225         hpsa_free_sg_chain_blocks(h);
7226         pci_free_consistent(h->pdev,
7227                 h->nr_cmds * sizeof(struct CommandList),
7228                 h->cmd_pool, h->cmd_pool_dhandle);
7229         pci_free_consistent(h->pdev,
7230                 h->nr_cmds * sizeof(struct ErrorInfo),
7231                 h->errinfo_pool, h->errinfo_pool_dhandle);
7232         hpsa_free_reply_queues(h);
7233         kfree(h->cmd_pool_bits);
7234         kfree(h->blockFetchTable);
7235         kfree(h->ioaccel1_blockFetchTable);
7236         kfree(h->ioaccel2_blockFetchTable);
7237         kfree(h->hba_inquiry_data);
7238         pci_disable_device(pdev);
7239         pci_release_regions(pdev);
7240         free_percpu(h->lockup_detected);
7241         kfree(h);
7242 }
7243
7244 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
7245         __attribute__((unused)) pm_message_t state)
7246 {
7247         return -ENOSYS;
7248 }
7249
7250 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
7251 {
7252         return -ENOSYS;
7253 }
7254
7255 static struct pci_driver hpsa_pci_driver = {
7256         .name = HPSA,
7257         .probe = hpsa_init_one,
7258         .remove = hpsa_remove_one,
7259         .id_table = hpsa_pci_device_id, /* id_table */
7260         .shutdown = hpsa_shutdown,
7261         .suspend = hpsa_suspend,
7262         .resume = hpsa_resume,
7263 };
7264
7265 /* Fill in bucket_map[], given nsgs (the max number of
7266  * scatter gather elements supported) and bucket[],
7267  * which is an array of 8 integers.  The bucket[] array
7268  * contains 8 different DMA transfer sizes (in 16
7269  * byte increments) which the controller uses to fetch
7270  * commands.  This function fills in bucket_map[], which
7271  * maps a given number of scatter gather elements to one of
7272  * the 8 DMA transfer sizes.  The point of it is to allow the
7273  * controller to only do as much DMA as needed to fetch the
7274  * command, with the DMA transfer size encoded in the lower
7275  * bits of the command address.
7276  */
7277 static void  calc_bucket_map(int bucket[], int num_buckets,
7278         int nsgs, int min_blocks, int *bucket_map)
7279 {
7280         int i, j, b, size;
7281
7282         /* Note, bucket_map must have nsgs+1 entries. */
7283         for (i = 0; i <= nsgs; i++) {
7284                 /* Compute size of a command with i SG entries */
7285                 size = i + min_blocks;
7286                 b = num_buckets; /* Assume the biggest bucket */
7287                 /* Find the bucket that is just big enough */
7288                 for (j = 0; j < num_buckets; j++) {
7289                         if (bucket[j] >= size) {
7290                                 b = j;
7291                                 break;
7292                         }
7293                 }
7294                 /* for a command with i SG entries, use bucket b. */
7295                 bucket_map[i] = b;
7296         }
7297 }
7298
7299 static void hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
7300 {
7301         int i;
7302         unsigned long register_value;
7303         unsigned long transMethod = CFGTBL_Trans_Performant |
7304                         (trans_support & CFGTBL_Trans_use_short_tags) |
7305                                 CFGTBL_Trans_enable_directed_msix |
7306                         (trans_support & (CFGTBL_Trans_io_accel1 |
7307                                 CFGTBL_Trans_io_accel2));
7308         struct access_method access = SA5_performant_access;
7309
7310         /* This is a bit complicated.  There are 8 registers on
7311          * the controller which we write to to tell it 8 different
7312          * sizes of commands which there may be.  It's a way of
7313          * reducing the DMA done to fetch each command.  Encoded into
7314          * each command's tag are 3 bits which communicate to the controller
7315          * which of the eight sizes that command fits within.  The size of
7316          * each command depends on how many scatter gather entries there are.
7317          * Each SG entry requires 16 bytes.  The eight registers are programmed
7318          * with the number of 16-byte blocks a command of that size requires.
7319          * The smallest command possible requires 5 such 16 byte blocks.
7320          * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
7321          * blocks.  Note, this only extends to the SG entries contained
7322          * within the command block, and does not extend to chained blocks
7323          * of SG elements.   bft[] contains the eight values we write to
7324          * the registers.  They are not evenly distributed, but have more
7325          * sizes for small commands, and fewer sizes for larger commands.
7326          */
7327         int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
7328 #define MIN_IOACCEL2_BFT_ENTRY 5
7329 #define HPSA_IOACCEL2_HEADER_SZ 4
7330         int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
7331                         13, 14, 15, 16, 17, 18, 19,
7332                         HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
7333         BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
7334         BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
7335         BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
7336                                  16 * MIN_IOACCEL2_BFT_ENTRY);
7337         BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
7338         BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
7339         /*  5 = 1 s/g entry or 4k
7340          *  6 = 2 s/g entry or 8k
7341          *  8 = 4 s/g entry or 16k
7342          * 10 = 6 s/g entry or 24k
7343          */
7344
7345         /* If the controller supports either ioaccel method then
7346          * we can also use the RAID stack submit path that does not
7347          * perform the superfluous readl() after each command submission.
7348          */
7349         if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2))
7350                 access = SA5_performant_access_no_read;
7351
7352         /* Controller spec: zero out this buffer. */
7353         for (i = 0; i < h->nreply_queues; i++)
7354                 memset(h->reply_queue[i].head, 0, h->reply_queue_size);
7355
7356         bft[7] = SG_ENTRIES_IN_CMD + 4;
7357         calc_bucket_map(bft, ARRAY_SIZE(bft),
7358                                 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable);
7359         for (i = 0; i < 8; i++)
7360                 writel(bft[i], &h->transtable->BlockFetch[i]);
7361
7362         /* size of controller ring buffer */
7363         writel(h->max_commands, &h->transtable->RepQSize);
7364         writel(h->nreply_queues, &h->transtable->RepQCount);
7365         writel(0, &h->transtable->RepQCtrAddrLow32);
7366         writel(0, &h->transtable->RepQCtrAddrHigh32);
7367
7368         for (i = 0; i < h->nreply_queues; i++) {
7369                 writel(0, &h->transtable->RepQAddr[i].upper);
7370                 writel(h->reply_queue[i].busaddr,
7371                         &h->transtable->RepQAddr[i].lower);
7372         }
7373
7374         writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
7375         writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
7376         /*
7377          * enable outbound interrupt coalescing in accelerator mode;
7378          */
7379         if (trans_support & CFGTBL_Trans_io_accel1) {
7380                 access = SA5_ioaccel_mode1_access;
7381                 writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
7382                 writel(4, &h->cfgtable->HostWrite.CoalIntCount);
7383         } else {
7384                 if (trans_support & CFGTBL_Trans_io_accel2) {
7385                         access = SA5_ioaccel_mode2_access;
7386                         writel(10, &h->cfgtable->HostWrite.CoalIntDelay);
7387                         writel(4, &h->cfgtable->HostWrite.CoalIntCount);
7388                 }
7389         }
7390         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7391         hpsa_wait_for_mode_change_ack(h);
7392         register_value = readl(&(h->cfgtable->TransportActive));
7393         if (!(register_value & CFGTBL_Trans_Performant)) {
7394                 dev_warn(&h->pdev->dev, "unable to get board into"
7395                                         " performant mode\n");
7396                 return;
7397         }
7398         /* Change the access methods to the performant access methods */
7399         h->access = access;
7400         h->transMethod = transMethod;
7401
7402         if (!((trans_support & CFGTBL_Trans_io_accel1) ||
7403                 (trans_support & CFGTBL_Trans_io_accel2)))
7404                 return;
7405
7406         if (trans_support & CFGTBL_Trans_io_accel1) {
7407                 /* Set up I/O accelerator mode */
7408                 for (i = 0; i < h->nreply_queues; i++) {
7409                         writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
7410                         h->reply_queue[i].current_entry =
7411                                 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
7412                 }
7413                 bft[7] = h->ioaccel_maxsg + 8;
7414                 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
7415                                 h->ioaccel1_blockFetchTable);
7416
7417                 /* initialize all reply queue entries to unused */
7418                 for (i = 0; i < h->nreply_queues; i++)
7419                         memset(h->reply_queue[i].head,
7420                                 (u8) IOACCEL_MODE1_REPLY_UNUSED,
7421                                 h->reply_queue_size);
7422
7423                 /* set all the constant fields in the accelerator command
7424                  * frames once at init time to save CPU cycles later.
7425                  */
7426                 for (i = 0; i < h->nr_cmds; i++) {
7427                         struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
7428
7429                         cp->function = IOACCEL1_FUNCTION_SCSIIO;
7430                         cp->err_info = (u32) (h->errinfo_pool_dhandle +
7431                                         (i * sizeof(struct ErrorInfo)));
7432                         cp->err_info_len = sizeof(struct ErrorInfo);
7433                         cp->sgl_offset = IOACCEL1_SGLOFFSET;
7434                         cp->host_context_flags = IOACCEL1_HCFLAGS_CISS_FORMAT;
7435                         cp->timeout_sec = 0;
7436                         cp->ReplyQueue = 0;
7437                         cp->Tag.lower = (i << DIRECT_LOOKUP_SHIFT) |
7438                                                 DIRECT_LOOKUP_BIT;
7439                         cp->Tag.upper = 0;
7440                         cp->host_addr.lower =
7441                                 (u32) (h->ioaccel_cmd_pool_dhandle +
7442                                         (i * sizeof(struct io_accel1_cmd)));
7443                         cp->host_addr.upper = 0;
7444                 }
7445         } else if (trans_support & CFGTBL_Trans_io_accel2) {
7446                 u64 cfg_offset, cfg_base_addr_index;
7447                 u32 bft2_offset, cfg_base_addr;
7448                 int rc;
7449
7450                 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7451                         &cfg_base_addr_index, &cfg_offset);
7452                 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
7453                 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
7454                 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
7455                                 4, h->ioaccel2_blockFetchTable);
7456                 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
7457                 BUILD_BUG_ON(offsetof(struct CfgTable,
7458                                 io_accel_request_size_offset) != 0xb8);
7459                 h->ioaccel2_bft2_regs =
7460                         remap_pci_mem(pci_resource_start(h->pdev,
7461                                         cfg_base_addr_index) +
7462                                         cfg_offset + bft2_offset,
7463                                         ARRAY_SIZE(bft2) *
7464                                         sizeof(*h->ioaccel2_bft2_regs));
7465                 for (i = 0; i < ARRAY_SIZE(bft2); i++)
7466                         writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
7467         }
7468         writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7469         hpsa_wait_for_mode_change_ack(h);
7470 }
7471
7472 static int hpsa_alloc_ioaccel_cmd_and_bft(struct ctlr_info *h)
7473 {
7474         h->ioaccel_maxsg =
7475                 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
7476         if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES)
7477                 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES;
7478
7479         /* Command structures must be aligned on a 128-byte boundary
7480          * because the 7 lower bits of the address are used by the
7481          * hardware.
7482          */
7483         BUILD_BUG_ON(sizeof(struct io_accel1_cmd) %
7484                         IOACCEL1_COMMANDLIST_ALIGNMENT);
7485         h->ioaccel_cmd_pool =
7486                 pci_alloc_consistent(h->pdev,
7487                         h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
7488                         &(h->ioaccel_cmd_pool_dhandle));
7489
7490         h->ioaccel1_blockFetchTable =
7491                 kmalloc(((h->ioaccel_maxsg + 1) *
7492                                 sizeof(u32)), GFP_KERNEL);
7493
7494         if ((h->ioaccel_cmd_pool == NULL) ||
7495                 (h->ioaccel1_blockFetchTable == NULL))
7496                 goto clean_up;
7497
7498         memset(h->ioaccel_cmd_pool, 0,
7499                 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool));
7500         return 0;
7501
7502 clean_up:
7503         if (h->ioaccel_cmd_pool)
7504                 pci_free_consistent(h->pdev,
7505                         h->nr_cmds * sizeof(*h->ioaccel_cmd_pool),
7506                         h->ioaccel_cmd_pool, h->ioaccel_cmd_pool_dhandle);
7507         kfree(h->ioaccel1_blockFetchTable);
7508         return 1;
7509 }
7510
7511 static int ioaccel2_alloc_cmds_and_bft(struct ctlr_info *h)
7512 {
7513         /* Allocate ioaccel2 mode command blocks and block fetch table */
7514
7515         h->ioaccel_maxsg =
7516                 readl(&(h->cfgtable->io_accel_max_embedded_sg_count));
7517         if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES)
7518                 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES;
7519
7520         BUILD_BUG_ON(sizeof(struct io_accel2_cmd) %
7521                         IOACCEL2_COMMANDLIST_ALIGNMENT);
7522         h->ioaccel2_cmd_pool =
7523                 pci_alloc_consistent(h->pdev,
7524                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
7525                         &(h->ioaccel2_cmd_pool_dhandle));
7526
7527         h->ioaccel2_blockFetchTable =
7528                 kmalloc(((h->ioaccel_maxsg + 1) *
7529                                 sizeof(u32)), GFP_KERNEL);
7530
7531         if ((h->ioaccel2_cmd_pool == NULL) ||
7532                 (h->ioaccel2_blockFetchTable == NULL))
7533                 goto clean_up;
7534
7535         memset(h->ioaccel2_cmd_pool, 0,
7536                 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool));
7537         return 0;
7538
7539 clean_up:
7540         if (h->ioaccel2_cmd_pool)
7541                 pci_free_consistent(h->pdev,
7542                         h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool),
7543                         h->ioaccel2_cmd_pool, h->ioaccel2_cmd_pool_dhandle);
7544         kfree(h->ioaccel2_blockFetchTable);
7545         return 1;
7546 }
7547
7548 static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
7549 {
7550         u32 trans_support;
7551         unsigned long transMethod = CFGTBL_Trans_Performant |
7552                                         CFGTBL_Trans_use_short_tags;
7553         int i;
7554
7555         if (hpsa_simple_mode)
7556                 return;
7557
7558         trans_support = readl(&(h->cfgtable->TransportSupport));
7559         if (!(trans_support & PERFORMANT_MODE))
7560                 return;
7561
7562         /* Check for I/O accelerator mode support */
7563         if (trans_support & CFGTBL_Trans_io_accel1) {
7564                 transMethod |= CFGTBL_Trans_io_accel1 |
7565                                 CFGTBL_Trans_enable_directed_msix;
7566                 if (hpsa_alloc_ioaccel_cmd_and_bft(h))
7567                         goto clean_up;
7568         } else {
7569                 if (trans_support & CFGTBL_Trans_io_accel2) {
7570                                 transMethod |= CFGTBL_Trans_io_accel2 |
7571                                 CFGTBL_Trans_enable_directed_msix;
7572                 if (ioaccel2_alloc_cmds_and_bft(h))
7573                         goto clean_up;
7574                 }
7575         }
7576
7577         h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1;
7578         hpsa_get_max_perf_mode_cmds(h);
7579         /* Performant mode ring buffer and supporting data structures */
7580         h->reply_queue_size = h->max_commands * sizeof(u64);
7581
7582         for (i = 0; i < h->nreply_queues; i++) {
7583                 h->reply_queue[i].head = pci_alloc_consistent(h->pdev,
7584                                                 h->reply_queue_size,
7585                                                 &(h->reply_queue[i].busaddr));
7586                 if (!h->reply_queue[i].head)
7587                         goto clean_up;
7588                 h->reply_queue[i].size = h->max_commands;
7589                 h->reply_queue[i].wraparound = 1;  /* spec: init to 1 */
7590                 h->reply_queue[i].current_entry = 0;
7591         }
7592
7593         /* Need a block fetch table for performant mode */
7594         h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
7595                                 sizeof(u32)), GFP_KERNEL);
7596         if (!h->blockFetchTable)
7597                 goto clean_up;
7598
7599         hpsa_enter_performant_mode(h, trans_support);
7600         return;
7601
7602 clean_up:
7603         hpsa_free_reply_queues(h);
7604         kfree(h->blockFetchTable);
7605 }
7606
7607 static int is_accelerated_cmd(struct CommandList *c)
7608 {
7609         return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2;
7610 }
7611
7612 static void hpsa_drain_accel_commands(struct ctlr_info *h)
7613 {
7614         struct CommandList *c = NULL;
7615         unsigned long flags;
7616         int accel_cmds_out;
7617
7618         do { /* wait for all outstanding commands to drain out */
7619                 accel_cmds_out = 0;
7620                 spin_lock_irqsave(&h->lock, flags);
7621                 list_for_each_entry(c, &h->cmpQ, list)
7622                         accel_cmds_out += is_accelerated_cmd(c);
7623                 list_for_each_entry(c, &h->reqQ, list)
7624                         accel_cmds_out += is_accelerated_cmd(c);
7625                 spin_unlock_irqrestore(&h->lock, flags);
7626                 if (accel_cmds_out <= 0)
7627                         break;
7628                 msleep(100);
7629         } while (1);
7630 }
7631
7632 /*
7633  *  This is it.  Register the PCI driver information for the cards we control
7634  *  the OS will call our registered routines when it finds one of our cards.
7635  */
7636 static int __init hpsa_init(void)
7637 {
7638         return pci_register_driver(&hpsa_pci_driver);
7639 }
7640
7641 static void __exit hpsa_cleanup(void)
7642 {
7643         pci_unregister_driver(&hpsa_pci_driver);
7644 }
7645
7646 static void __attribute__((unused)) verify_offsets(void)
7647 {
7648 #define VERIFY_OFFSET(member, offset) \
7649         BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset)
7650
7651         VERIFY_OFFSET(structure_size, 0);
7652         VERIFY_OFFSET(volume_blk_size, 4);
7653         VERIFY_OFFSET(volume_blk_cnt, 8);
7654         VERIFY_OFFSET(phys_blk_shift, 16);
7655         VERIFY_OFFSET(parity_rotation_shift, 17);
7656         VERIFY_OFFSET(strip_size, 18);
7657         VERIFY_OFFSET(disk_starting_blk, 20);
7658         VERIFY_OFFSET(disk_blk_cnt, 28);
7659         VERIFY_OFFSET(data_disks_per_row, 36);
7660         VERIFY_OFFSET(metadata_disks_per_row, 38);
7661         VERIFY_OFFSET(row_cnt, 40);
7662         VERIFY_OFFSET(layout_map_count, 42);
7663         VERIFY_OFFSET(flags, 44);
7664         VERIFY_OFFSET(dekindex, 46);
7665         /* VERIFY_OFFSET(reserved, 48 */
7666         VERIFY_OFFSET(data, 64);
7667
7668 #undef VERIFY_OFFSET
7669
7670 #define VERIFY_OFFSET(member, offset) \
7671         BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset)
7672
7673         VERIFY_OFFSET(IU_type, 0);
7674         VERIFY_OFFSET(direction, 1);
7675         VERIFY_OFFSET(reply_queue, 2);
7676         /* VERIFY_OFFSET(reserved1, 3);  */
7677         VERIFY_OFFSET(scsi_nexus, 4);
7678         VERIFY_OFFSET(Tag, 8);
7679         VERIFY_OFFSET(cdb, 16);
7680         VERIFY_OFFSET(cciss_lun, 32);
7681         VERIFY_OFFSET(data_len, 40);
7682         VERIFY_OFFSET(cmd_priority_task_attr, 44);
7683         VERIFY_OFFSET(sg_count, 45);
7684         /* VERIFY_OFFSET(reserved3 */
7685         VERIFY_OFFSET(err_ptr, 48);
7686         VERIFY_OFFSET(err_len, 56);
7687         /* VERIFY_OFFSET(reserved4  */
7688         VERIFY_OFFSET(sg, 64);
7689
7690 #undef VERIFY_OFFSET
7691
7692 #define VERIFY_OFFSET(member, offset) \
7693         BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset)
7694
7695         VERIFY_OFFSET(dev_handle, 0x00);
7696         VERIFY_OFFSET(reserved1, 0x02);
7697         VERIFY_OFFSET(function, 0x03);
7698         VERIFY_OFFSET(reserved2, 0x04);
7699         VERIFY_OFFSET(err_info, 0x0C);
7700         VERIFY_OFFSET(reserved3, 0x10);
7701         VERIFY_OFFSET(err_info_len, 0x12);
7702         VERIFY_OFFSET(reserved4, 0x13);
7703         VERIFY_OFFSET(sgl_offset, 0x14);
7704         VERIFY_OFFSET(reserved5, 0x15);
7705         VERIFY_OFFSET(transfer_len, 0x1C);
7706         VERIFY_OFFSET(reserved6, 0x20);
7707         VERIFY_OFFSET(io_flags, 0x24);
7708         VERIFY_OFFSET(reserved7, 0x26);
7709         VERIFY_OFFSET(LUN, 0x34);
7710         VERIFY_OFFSET(control, 0x3C);
7711         VERIFY_OFFSET(CDB, 0x40);
7712         VERIFY_OFFSET(reserved8, 0x50);
7713         VERIFY_OFFSET(host_context_flags, 0x60);
7714         VERIFY_OFFSET(timeout_sec, 0x62);
7715         VERIFY_OFFSET(ReplyQueue, 0x64);
7716         VERIFY_OFFSET(reserved9, 0x65);
7717         VERIFY_OFFSET(Tag, 0x68);
7718         VERIFY_OFFSET(host_addr, 0x70);
7719         VERIFY_OFFSET(CISS_LUN, 0x78);
7720         VERIFY_OFFSET(SG, 0x78 + 8);
7721 #undef VERIFY_OFFSET
7722 }
7723
7724 module_init(hpsa_init);
7725 module_exit(hpsa_cleanup);