1 /*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2009-2012 Emulex. All rights reserved. *
5 * EMULEX and SLI are trademarks of Emulex. *
8 * This program is free software; you can redistribute it and/or *
9 * modify it under the terms of version 2 of the GNU General *
10 * Public License as published by the Free Software Foundation. *
11 * This program is distributed in the hope that it will be useful. *
12 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
13 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
14 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
15 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
16 * TO BE LEGALLY INVALID. See the GNU General Public License for *
17 * more details, a copy of which can be found in the file COPYING *
18 * included with this package. *
19 *******************************************************************/
21 /* Macros to deal with bit fields. Each bit field must have 3 #defines
22 * associated with it (_SHIFT, _MASK, and _WORD).
23 * EG. For a bit field that is in the 7th bit of the "field4" field of a
24 * structure and is 2 bits in size the following #defines must exist:
30 * #define example_bit_field_SHIFT 7
31 * #define example_bit_field_MASK 0x03
32 * #define example_bit_field_WORD field4
35 * Then the macros below may be used to get or set the value of that field.
36 * EG. To get the value of the bit field from the above example:
38 * value = bf_get(example_bit_field, &t1);
39 * And then to set that bit field:
40 * bf_set(example_bit_field, &t1, 2);
41 * Or clear that bit field:
42 * bf_set(example_bit_field, &t1, 0);
44 #define bf_get_be32(name, ptr) \
45 ((be32_to_cpu((ptr)->name##_WORD) >> name##_SHIFT) & name##_MASK)
46 #define bf_get_le32(name, ptr) \
47 ((le32_to_cpu((ptr)->name##_WORD) >> name##_SHIFT) & name##_MASK)
48 #define bf_get(name, ptr) \
49 (((ptr)->name##_WORD >> name##_SHIFT) & name##_MASK)
50 #define bf_set_le32(name, ptr, value) \
51 ((ptr)->name##_WORD = cpu_to_le32(((((value) & \
52 name##_MASK) << name##_SHIFT) | (le32_to_cpu((ptr)->name##_WORD) & \
53 ~(name##_MASK << name##_SHIFT)))))
54 #define bf_set(name, ptr, value) \
55 ((ptr)->name##_WORD = ((((value) & name##_MASK) << name##_SHIFT) | \
56 ((ptr)->name##_WORD & ~(name##_MASK << name##_SHIFT))))
63 struct lpfc_sli_intf {
65 #define lpfc_sli_intf_valid_SHIFT 29
66 #define lpfc_sli_intf_valid_MASK 0x00000007
67 #define lpfc_sli_intf_valid_WORD word0
68 #define LPFC_SLI_INTF_VALID 6
69 #define lpfc_sli_intf_sli_hint2_SHIFT 24
70 #define lpfc_sli_intf_sli_hint2_MASK 0x0000001F
71 #define lpfc_sli_intf_sli_hint2_WORD word0
72 #define LPFC_SLI_INTF_SLI_HINT2_NONE 0
73 #define lpfc_sli_intf_sli_hint1_SHIFT 16
74 #define lpfc_sli_intf_sli_hint1_MASK 0x000000FF
75 #define lpfc_sli_intf_sli_hint1_WORD word0
76 #define LPFC_SLI_INTF_SLI_HINT1_NONE 0
77 #define LPFC_SLI_INTF_SLI_HINT1_1 1
78 #define LPFC_SLI_INTF_SLI_HINT1_2 2
79 #define lpfc_sli_intf_if_type_SHIFT 12
80 #define lpfc_sli_intf_if_type_MASK 0x0000000F
81 #define lpfc_sli_intf_if_type_WORD word0
82 #define LPFC_SLI_INTF_IF_TYPE_0 0
83 #define LPFC_SLI_INTF_IF_TYPE_1 1
84 #define LPFC_SLI_INTF_IF_TYPE_2 2
85 #define lpfc_sli_intf_sli_family_SHIFT 8
86 #define lpfc_sli_intf_sli_family_MASK 0x0000000F
87 #define lpfc_sli_intf_sli_family_WORD word0
88 #define LPFC_SLI_INTF_FAMILY_BE2 0x0
89 #define LPFC_SLI_INTF_FAMILY_BE3 0x1
90 #define LPFC_SLI_INTF_FAMILY_LNCR_A0 0xa
91 #define LPFC_SLI_INTF_FAMILY_LNCR_B0 0xb
92 #define lpfc_sli_intf_slirev_SHIFT 4
93 #define lpfc_sli_intf_slirev_MASK 0x0000000F
94 #define lpfc_sli_intf_slirev_WORD word0
95 #define LPFC_SLI_INTF_REV_SLI3 3
96 #define LPFC_SLI_INTF_REV_SLI4 4
97 #define lpfc_sli_intf_func_type_SHIFT 0
98 #define lpfc_sli_intf_func_type_MASK 0x00000001
99 #define lpfc_sli_intf_func_type_WORD word0
100 #define LPFC_SLI_INTF_IF_TYPE_PHYS 0
101 #define LPFC_SLI_INTF_IF_TYPE_VIRT 1
104 #define LPFC_SLI4_MBX_EMBED true
105 #define LPFC_SLI4_MBX_NEMBED false
107 #define LPFC_SLI4_MB_WORD_COUNT 64
108 #define LPFC_MAX_MQ_PAGE 8
109 #define LPFC_MAX_WQ_PAGE_V0 4
110 #define LPFC_MAX_WQ_PAGE 8
111 #define LPFC_MAX_CQ_PAGE 4
112 #define LPFC_MAX_EQ_PAGE 8
114 #define LPFC_VIR_FUNC_MAX 32 /* Maximum number of virtual functions */
115 #define LPFC_PCI_FUNC_MAX 5 /* Maximum number of PCI functions */
116 #define LPFC_VFR_PAGE_SIZE 0x1000 /* 4KB BAR2 per-VF register page size */
118 /* Define SLI4 Alignment requirements. */
119 #define LPFC_ALIGN_16_BYTE 16
120 #define LPFC_ALIGN_64_BYTE 64
122 /* Define SLI4 specific definitions. */
123 #define LPFC_MQ_CQE_BYTE_OFFSET 256
124 #define LPFC_MBX_CMD_HDR_LENGTH 16
125 #define LPFC_MBX_ERROR_RANGE 0x4000
126 #define LPFC_BMBX_BIT1_ADDR_HI 0x2
127 #define LPFC_BMBX_BIT1_ADDR_LO 0
128 #define LPFC_RPI_HDR_COUNT 64
129 #define LPFC_HDR_TEMPLATE_SIZE 4096
130 #define LPFC_RPI_ALLOC_ERROR 0xFFFF
131 #define LPFC_FCF_RECORD_WD_CNT 132
132 #define LPFC_ENTIRE_FCF_DATABASE 0
133 #define LPFC_DFLT_FCF_INDEX 0
135 /* Virtual function numbers */
169 /* PCI function numbers */
170 #define LPFC_PCI_FUNC0 0
171 #define LPFC_PCI_FUNC1 1
172 #define LPFC_PCI_FUNC2 2
173 #define LPFC_PCI_FUNC3 3
174 #define LPFC_PCI_FUNC4 4
176 /* SLI4 interface type-2 PDEV_CTL register */
177 #define LPFC_CTL_PDEV_CTL_OFFSET 0x414
178 #define LPFC_CTL_PDEV_CTL_DRST 0x00000001
179 #define LPFC_CTL_PDEV_CTL_FRST 0x00000002
180 #define LPFC_CTL_PDEV_CTL_DD 0x00000004
181 #define LPFC_CTL_PDEV_CTL_LC 0x00000008
182 #define LPFC_CTL_PDEV_CTL_FRL_ALL 0x00
183 #define LPFC_CTL_PDEV_CTL_FRL_FC_FCOE 0x10
184 #define LPFC_CTL_PDEV_CTL_FRL_NIC 0x20
186 #define LPFC_FW_DUMP_REQUEST (LPFC_CTL_PDEV_CTL_DD | LPFC_CTL_PDEV_CTL_FRST)
188 /* Active interrupt test count */
189 #define LPFC_ACT_INTR_CNT 4
191 /* Algrithmns for scheduling FCP commands to WQs */
192 #define LPFC_FCP_SCHED_ROUND_ROBIN 0
193 #define LPFC_FCP_SCHED_BY_CPU 1
195 /* Delay Multiplier constant */
196 #define LPFC_DMULT_CONST 651042
198 /* Configuration of Interrupts / sec for entire HBA port */
199 #define LPFC_MIN_IMAX 5000
200 #define LPFC_MAX_IMAX 5000000
201 #define LPFC_DEF_IMAX 50000
203 /* PORT_CAPABILITIES constants. */
204 #define LPFC_MAX_SUPPORTED_PAGES 8
210 #ifdef __BIG_ENDIAN_BITFIELD
211 uint32_t bdeFlags:8; /* BDE Flags 0 IS A SUPPORTED
213 uint32_t bdeSize:24; /* Size of buffer (in bytes) */
214 #else /* __LITTLE_ENDIAN_BITFIELD */
215 uint32_t bdeSize:24; /* Size of buffer (in bytes) */
216 uint32_t bdeFlags:8; /* BDE Flags 0 IS A SUPPORTED
219 #define BUFF_TYPE_BDE_64 0x00 /* BDE (Host_resident) */
220 #define BUFF_TYPE_BDE_IMMED 0x01 /* Immediate Data BDE */
221 #define BUFF_TYPE_BDE_64P 0x02 /* BDE (Port-resident) */
222 #define BUFF_TYPE_BDE_64I 0x08 /* Input BDE (Host-resident) */
223 #define BUFF_TYPE_BDE_64IP 0x0A /* Input BDE (Port-resident) */
224 #define BUFF_TYPE_BLP_64 0x40 /* BLP (Host-resident) */
225 #define BUFF_TYPE_BLP_64P 0x42 /* BLP (Port-resident) */
232 struct lpfc_sli4_flags {
234 #define lpfc_idx_rsrc_rdy_SHIFT 0
235 #define lpfc_idx_rsrc_rdy_MASK 0x00000001
236 #define lpfc_idx_rsrc_rdy_WORD word0
237 #define LPFC_IDX_RSRC_RDY 1
238 #define lpfc_rpi_rsrc_rdy_SHIFT 1
239 #define lpfc_rpi_rsrc_rdy_MASK 0x00000001
240 #define lpfc_rpi_rsrc_rdy_WORD word0
241 #define LPFC_RPI_RSRC_RDY 1
242 #define lpfc_vpi_rsrc_rdy_SHIFT 2
243 #define lpfc_vpi_rsrc_rdy_MASK 0x00000001
244 #define lpfc_vpi_rsrc_rdy_WORD word0
245 #define LPFC_VPI_RSRC_RDY 1
246 #define lpfc_vfi_rsrc_rdy_SHIFT 3
247 #define lpfc_vfi_rsrc_rdy_MASK 0x00000001
248 #define lpfc_vfi_rsrc_rdy_WORD word0
249 #define LPFC_VFI_RSRC_RDY 1
252 struct sli4_bls_rsp {
253 uint32_t word0_rsvd; /* Word0 must be reserved */
255 #define lpfc_abts_orig_SHIFT 0
256 #define lpfc_abts_orig_MASK 0x00000001
257 #define lpfc_abts_orig_WORD word1
258 #define LPFC_ABTS_UNSOL_RSP 1
259 #define LPFC_ABTS_UNSOL_INT 0
261 #define lpfc_abts_rxid_SHIFT 0
262 #define lpfc_abts_rxid_MASK 0x0000FFFF
263 #define lpfc_abts_rxid_WORD word2
264 #define lpfc_abts_oxid_SHIFT 16
265 #define lpfc_abts_oxid_MASK 0x0000FFFF
266 #define lpfc_abts_oxid_WORD word2
268 #define lpfc_vndr_code_SHIFT 0
269 #define lpfc_vndr_code_MASK 0x000000FF
270 #define lpfc_vndr_code_WORD word3
271 #define lpfc_rsn_expln_SHIFT 8
272 #define lpfc_rsn_expln_MASK 0x000000FF
273 #define lpfc_rsn_expln_WORD word3
274 #define lpfc_rsn_code_SHIFT 16
275 #define lpfc_rsn_code_MASK 0x000000FF
276 #define lpfc_rsn_code_WORD word3
279 uint32_t word5_rsvd; /* Word5 must be reserved */
282 /* event queue entry structure */
285 #define lpfc_eqe_resource_id_SHIFT 16
286 #define lpfc_eqe_resource_id_MASK 0x000000FF
287 #define lpfc_eqe_resource_id_WORD word0
288 #define lpfc_eqe_minor_code_SHIFT 4
289 #define lpfc_eqe_minor_code_MASK 0x00000FFF
290 #define lpfc_eqe_minor_code_WORD word0
291 #define lpfc_eqe_major_code_SHIFT 1
292 #define lpfc_eqe_major_code_MASK 0x00000007
293 #define lpfc_eqe_major_code_WORD word0
294 #define lpfc_eqe_valid_SHIFT 0
295 #define lpfc_eqe_valid_MASK 0x00000001
296 #define lpfc_eqe_valid_WORD word0
299 /* completion queue entry structure (common fields for all cqe types) */
305 #define lpfc_cqe_valid_SHIFT 31
306 #define lpfc_cqe_valid_MASK 0x00000001
307 #define lpfc_cqe_valid_WORD word3
308 #define lpfc_cqe_code_SHIFT 16
309 #define lpfc_cqe_code_MASK 0x000000FF
310 #define lpfc_cqe_code_WORD word3
313 /* Completion Queue Entry Status Codes */
314 #define CQE_STATUS_SUCCESS 0x0
315 #define CQE_STATUS_FCP_RSP_FAILURE 0x1
316 #define CQE_STATUS_REMOTE_STOP 0x2
317 #define CQE_STATUS_LOCAL_REJECT 0x3
318 #define CQE_STATUS_NPORT_RJT 0x4
319 #define CQE_STATUS_FABRIC_RJT 0x5
320 #define CQE_STATUS_NPORT_BSY 0x6
321 #define CQE_STATUS_FABRIC_BSY 0x7
322 #define CQE_STATUS_INTERMED_RSP 0x8
323 #define CQE_STATUS_LS_RJT 0x9
324 #define CQE_STATUS_CMD_REJECT 0xb
325 #define CQE_STATUS_FCP_TGT_LENCHECK 0xc
326 #define CQE_STATUS_NEED_BUFF_ENTRY 0xf
327 #define CQE_STATUS_DI_ERROR 0x16
329 /* Used when mapping CQE status to IOCB */
330 #define LPFC_IOCB_STATUS_MASK 0xf
332 /* Status returned by hardware (valid only if status = CQE_STATUS_SUCCESS). */
333 #define CQE_HW_STATUS_NO_ERR 0x0
334 #define CQE_HW_STATUS_UNDERRUN 0x1
335 #define CQE_HW_STATUS_OVERRUN 0x2
337 /* Completion Queue Entry Codes */
338 #define CQE_CODE_COMPL_WQE 0x1
339 #define CQE_CODE_RELEASE_WQE 0x2
340 #define CQE_CODE_RECEIVE 0x4
341 #define CQE_CODE_XRI_ABORTED 0x5
342 #define CQE_CODE_RECEIVE_V1 0x9
345 * Define mask value for xri_aborted and wcqe completed CQE extended status.
346 * Currently, extended status is limited to 9 bits (0x0 -> 0x103) .
348 #define WCQE_PARAM_MASK 0x1FF
350 /* completion queue entry for wqe completions */
351 struct lpfc_wcqe_complete {
353 #define lpfc_wcqe_c_request_tag_SHIFT 16
354 #define lpfc_wcqe_c_request_tag_MASK 0x0000FFFF
355 #define lpfc_wcqe_c_request_tag_WORD word0
356 #define lpfc_wcqe_c_status_SHIFT 8
357 #define lpfc_wcqe_c_status_MASK 0x000000FF
358 #define lpfc_wcqe_c_status_WORD word0
359 #define lpfc_wcqe_c_hw_status_SHIFT 0
360 #define lpfc_wcqe_c_hw_status_MASK 0x000000FF
361 #define lpfc_wcqe_c_hw_status_WORD word0
362 uint32_t total_data_placed;
364 #define lpfc_wcqe_c_bg_edir_SHIFT 5
365 #define lpfc_wcqe_c_bg_edir_MASK 0x00000001
366 #define lpfc_wcqe_c_bg_edir_WORD parameter
367 #define lpfc_wcqe_c_bg_tdpv_SHIFT 3
368 #define lpfc_wcqe_c_bg_tdpv_MASK 0x00000001
369 #define lpfc_wcqe_c_bg_tdpv_WORD parameter
370 #define lpfc_wcqe_c_bg_re_SHIFT 2
371 #define lpfc_wcqe_c_bg_re_MASK 0x00000001
372 #define lpfc_wcqe_c_bg_re_WORD parameter
373 #define lpfc_wcqe_c_bg_ae_SHIFT 1
374 #define lpfc_wcqe_c_bg_ae_MASK 0x00000001
375 #define lpfc_wcqe_c_bg_ae_WORD parameter
376 #define lpfc_wcqe_c_bg_ge_SHIFT 0
377 #define lpfc_wcqe_c_bg_ge_MASK 0x00000001
378 #define lpfc_wcqe_c_bg_ge_WORD parameter
380 #define lpfc_wcqe_c_valid_SHIFT lpfc_cqe_valid_SHIFT
381 #define lpfc_wcqe_c_valid_MASK lpfc_cqe_valid_MASK
382 #define lpfc_wcqe_c_valid_WORD lpfc_cqe_valid_WORD
383 #define lpfc_wcqe_c_xb_SHIFT 28
384 #define lpfc_wcqe_c_xb_MASK 0x00000001
385 #define lpfc_wcqe_c_xb_WORD word3
386 #define lpfc_wcqe_c_pv_SHIFT 27
387 #define lpfc_wcqe_c_pv_MASK 0x00000001
388 #define lpfc_wcqe_c_pv_WORD word3
389 #define lpfc_wcqe_c_priority_SHIFT 24
390 #define lpfc_wcqe_c_priority_MASK 0x00000007
391 #define lpfc_wcqe_c_priority_WORD word3
392 #define lpfc_wcqe_c_code_SHIFT lpfc_cqe_code_SHIFT
393 #define lpfc_wcqe_c_code_MASK lpfc_cqe_code_MASK
394 #define lpfc_wcqe_c_code_WORD lpfc_cqe_code_WORD
397 /* completion queue entry for wqe release */
398 struct lpfc_wcqe_release {
402 #define lpfc_wcqe_r_wq_id_SHIFT 16
403 #define lpfc_wcqe_r_wq_id_MASK 0x0000FFFF
404 #define lpfc_wcqe_r_wq_id_WORD word2
405 #define lpfc_wcqe_r_wqe_index_SHIFT 0
406 #define lpfc_wcqe_r_wqe_index_MASK 0x0000FFFF
407 #define lpfc_wcqe_r_wqe_index_WORD word2
409 #define lpfc_wcqe_r_valid_SHIFT lpfc_cqe_valid_SHIFT
410 #define lpfc_wcqe_r_valid_MASK lpfc_cqe_valid_MASK
411 #define lpfc_wcqe_r_valid_WORD lpfc_cqe_valid_WORD
412 #define lpfc_wcqe_r_code_SHIFT lpfc_cqe_code_SHIFT
413 #define lpfc_wcqe_r_code_MASK lpfc_cqe_code_MASK
414 #define lpfc_wcqe_r_code_WORD lpfc_cqe_code_WORD
417 struct sli4_wcqe_xri_aborted {
419 #define lpfc_wcqe_xa_status_SHIFT 8
420 #define lpfc_wcqe_xa_status_MASK 0x000000FF
421 #define lpfc_wcqe_xa_status_WORD word0
424 #define lpfc_wcqe_xa_remote_xid_SHIFT 16
425 #define lpfc_wcqe_xa_remote_xid_MASK 0x0000FFFF
426 #define lpfc_wcqe_xa_remote_xid_WORD word2
427 #define lpfc_wcqe_xa_xri_SHIFT 0
428 #define lpfc_wcqe_xa_xri_MASK 0x0000FFFF
429 #define lpfc_wcqe_xa_xri_WORD word2
431 #define lpfc_wcqe_xa_valid_SHIFT lpfc_cqe_valid_SHIFT
432 #define lpfc_wcqe_xa_valid_MASK lpfc_cqe_valid_MASK
433 #define lpfc_wcqe_xa_valid_WORD lpfc_cqe_valid_WORD
434 #define lpfc_wcqe_xa_ia_SHIFT 30
435 #define lpfc_wcqe_xa_ia_MASK 0x00000001
436 #define lpfc_wcqe_xa_ia_WORD word3
437 #define CQE_XRI_ABORTED_IA_REMOTE 0
438 #define CQE_XRI_ABORTED_IA_LOCAL 1
439 #define lpfc_wcqe_xa_br_SHIFT 29
440 #define lpfc_wcqe_xa_br_MASK 0x00000001
441 #define lpfc_wcqe_xa_br_WORD word3
442 #define CQE_XRI_ABORTED_BR_BA_ACC 0
443 #define CQE_XRI_ABORTED_BR_BA_RJT 1
444 #define lpfc_wcqe_xa_eo_SHIFT 28
445 #define lpfc_wcqe_xa_eo_MASK 0x00000001
446 #define lpfc_wcqe_xa_eo_WORD word3
447 #define CQE_XRI_ABORTED_EO_REMOTE 0
448 #define CQE_XRI_ABORTED_EO_LOCAL 1
449 #define lpfc_wcqe_xa_code_SHIFT lpfc_cqe_code_SHIFT
450 #define lpfc_wcqe_xa_code_MASK lpfc_cqe_code_MASK
451 #define lpfc_wcqe_xa_code_WORD lpfc_cqe_code_WORD
454 /* completion queue entry structure for rqe completion */
457 #define lpfc_rcqe_bindex_SHIFT 16
458 #define lpfc_rcqe_bindex_MASK 0x0000FFF
459 #define lpfc_rcqe_bindex_WORD word0
460 #define lpfc_rcqe_status_SHIFT 8
461 #define lpfc_rcqe_status_MASK 0x000000FF
462 #define lpfc_rcqe_status_WORD word0
463 #define FC_STATUS_RQ_SUCCESS 0x10 /* Async receive successful */
464 #define FC_STATUS_RQ_BUF_LEN_EXCEEDED 0x11 /* payload truncated */
465 #define FC_STATUS_INSUFF_BUF_NEED_BUF 0x12 /* Insufficient buffers */
466 #define FC_STATUS_INSUFF_BUF_FRM_DISC 0x13 /* Frame Discard */
468 #define lpfc_rcqe_fcf_id_v1_SHIFT 0
469 #define lpfc_rcqe_fcf_id_v1_MASK 0x0000003F
470 #define lpfc_rcqe_fcf_id_v1_WORD word1
472 #define lpfc_rcqe_length_SHIFT 16
473 #define lpfc_rcqe_length_MASK 0x0000FFFF
474 #define lpfc_rcqe_length_WORD word2
475 #define lpfc_rcqe_rq_id_SHIFT 6
476 #define lpfc_rcqe_rq_id_MASK 0x000003FF
477 #define lpfc_rcqe_rq_id_WORD word2
478 #define lpfc_rcqe_fcf_id_SHIFT 0
479 #define lpfc_rcqe_fcf_id_MASK 0x0000003F
480 #define lpfc_rcqe_fcf_id_WORD word2
481 #define lpfc_rcqe_rq_id_v1_SHIFT 0
482 #define lpfc_rcqe_rq_id_v1_MASK 0x0000FFFF
483 #define lpfc_rcqe_rq_id_v1_WORD word2
485 #define lpfc_rcqe_valid_SHIFT lpfc_cqe_valid_SHIFT
486 #define lpfc_rcqe_valid_MASK lpfc_cqe_valid_MASK
487 #define lpfc_rcqe_valid_WORD lpfc_cqe_valid_WORD
488 #define lpfc_rcqe_port_SHIFT 30
489 #define lpfc_rcqe_port_MASK 0x00000001
490 #define lpfc_rcqe_port_WORD word3
491 #define lpfc_rcqe_hdr_length_SHIFT 24
492 #define lpfc_rcqe_hdr_length_MASK 0x0000001F
493 #define lpfc_rcqe_hdr_length_WORD word3
494 #define lpfc_rcqe_code_SHIFT lpfc_cqe_code_SHIFT
495 #define lpfc_rcqe_code_MASK lpfc_cqe_code_MASK
496 #define lpfc_rcqe_code_WORD lpfc_cqe_code_WORD
497 #define lpfc_rcqe_eof_SHIFT 8
498 #define lpfc_rcqe_eof_MASK 0x000000FF
499 #define lpfc_rcqe_eof_WORD word3
500 #define FCOE_EOFn 0x41
501 #define FCOE_EOFt 0x42
502 #define FCOE_EOFni 0x49
503 #define FCOE_EOFa 0x50
504 #define lpfc_rcqe_sof_SHIFT 0
505 #define lpfc_rcqe_sof_MASK 0x000000FF
506 #define lpfc_rcqe_sof_WORD word3
507 #define FCOE_SOFi2 0x2d
508 #define FCOE_SOFi3 0x2e
509 #define FCOE_SOFn2 0x35
510 #define FCOE_SOFn3 0x36
518 /* buffer descriptors */
523 #define lpfc_bde4_last_SHIFT 31
524 #define lpfc_bde4_last_MASK 0x00000001
525 #define lpfc_bde4_last_WORD word2
526 #define lpfc_bde4_sge_offset_SHIFT 0
527 #define lpfc_bde4_sge_offset_MASK 0x000003FF
528 #define lpfc_bde4_sge_offset_WORD word2
530 #define lpfc_bde4_length_SHIFT 0
531 #define lpfc_bde4_length_MASK 0x000000FF
532 #define lpfc_bde4_length_WORD word3
535 struct lpfc_register {
539 /* The following BAR0 Registers apply to SLI4 if_type 0 UCNAs. */
540 #define LPFC_UERR_STATUS_HI 0x00A4
541 #define LPFC_UERR_STATUS_LO 0x00A0
542 #define LPFC_UE_MASK_HI 0x00AC
543 #define LPFC_UE_MASK_LO 0x00A8
545 /* The following BAR0 register sets are defined for if_type 0 and 2 UCNAs. */
546 #define LPFC_SLI_INTF 0x0058
548 #define LPFC_CTL_PORT_SEM_OFFSET 0x400
549 #define lpfc_port_smphr_perr_SHIFT 31
550 #define lpfc_port_smphr_perr_MASK 0x1
551 #define lpfc_port_smphr_perr_WORD word0
552 #define lpfc_port_smphr_sfi_SHIFT 30
553 #define lpfc_port_smphr_sfi_MASK 0x1
554 #define lpfc_port_smphr_sfi_WORD word0
555 #define lpfc_port_smphr_nip_SHIFT 29
556 #define lpfc_port_smphr_nip_MASK 0x1
557 #define lpfc_port_smphr_nip_WORD word0
558 #define lpfc_port_smphr_ipc_SHIFT 28
559 #define lpfc_port_smphr_ipc_MASK 0x1
560 #define lpfc_port_smphr_ipc_WORD word0
561 #define lpfc_port_smphr_scr1_SHIFT 27
562 #define lpfc_port_smphr_scr1_MASK 0x1
563 #define lpfc_port_smphr_scr1_WORD word0
564 #define lpfc_port_smphr_scr2_SHIFT 26
565 #define lpfc_port_smphr_scr2_MASK 0x1
566 #define lpfc_port_smphr_scr2_WORD word0
567 #define lpfc_port_smphr_host_scratch_SHIFT 16
568 #define lpfc_port_smphr_host_scratch_MASK 0xFF
569 #define lpfc_port_smphr_host_scratch_WORD word0
570 #define lpfc_port_smphr_port_status_SHIFT 0
571 #define lpfc_port_smphr_port_status_MASK 0xFFFF
572 #define lpfc_port_smphr_port_status_WORD word0
574 #define LPFC_POST_STAGE_POWER_ON_RESET 0x0000
575 #define LPFC_POST_STAGE_AWAITING_HOST_RDY 0x0001
576 #define LPFC_POST_STAGE_HOST_RDY 0x0002
577 #define LPFC_POST_STAGE_BE_RESET 0x0003
578 #define LPFC_POST_STAGE_SEEPROM_CS_START 0x0100
579 #define LPFC_POST_STAGE_SEEPROM_CS_DONE 0x0101
580 #define LPFC_POST_STAGE_DDR_CONFIG_START 0x0200
581 #define LPFC_POST_STAGE_DDR_CONFIG_DONE 0x0201
582 #define LPFC_POST_STAGE_DDR_CALIBRATE_START 0x0300
583 #define LPFC_POST_STAGE_DDR_CALIBRATE_DONE 0x0301
584 #define LPFC_POST_STAGE_DDR_TEST_START 0x0400
585 #define LPFC_POST_STAGE_DDR_TEST_DONE 0x0401
586 #define LPFC_POST_STAGE_REDBOOT_INIT_START 0x0600
587 #define LPFC_POST_STAGE_REDBOOT_INIT_DONE 0x0601
588 #define LPFC_POST_STAGE_FW_IMAGE_LOAD_START 0x0700
589 #define LPFC_POST_STAGE_FW_IMAGE_LOAD_DONE 0x0701
590 #define LPFC_POST_STAGE_ARMFW_START 0x0800
591 #define LPFC_POST_STAGE_DHCP_QUERY_START 0x0900
592 #define LPFC_POST_STAGE_DHCP_QUERY_DONE 0x0901
593 #define LPFC_POST_STAGE_BOOT_TARGET_DISCOVERY_START 0x0A00
594 #define LPFC_POST_STAGE_BOOT_TARGET_DISCOVERY_DONE 0x0A01
595 #define LPFC_POST_STAGE_RC_OPTION_SET 0x0B00
596 #define LPFC_POST_STAGE_SWITCH_LINK 0x0B01
597 #define LPFC_POST_STAGE_SEND_ICDS_MESSAGE 0x0B02
598 #define LPFC_POST_STAGE_PERFROM_TFTP 0x0B03
599 #define LPFC_POST_STAGE_PARSE_XML 0x0B04
600 #define LPFC_POST_STAGE_DOWNLOAD_IMAGE 0x0B05
601 #define LPFC_POST_STAGE_FLASH_IMAGE 0x0B06
602 #define LPFC_POST_STAGE_RC_DONE 0x0B07
603 #define LPFC_POST_STAGE_REBOOT_SYSTEM 0x0B08
604 #define LPFC_POST_STAGE_MAC_ADDRESS 0x0C00
605 #define LPFC_POST_STAGE_PORT_READY 0xC000
606 #define LPFC_POST_STAGE_PORT_UE 0xF000
608 #define LPFC_CTL_PORT_STA_OFFSET 0x404
609 #define lpfc_sliport_status_err_SHIFT 31
610 #define lpfc_sliport_status_err_MASK 0x1
611 #define lpfc_sliport_status_err_WORD word0
612 #define lpfc_sliport_status_end_SHIFT 30
613 #define lpfc_sliport_status_end_MASK 0x1
614 #define lpfc_sliport_status_end_WORD word0
615 #define lpfc_sliport_status_oti_SHIFT 29
616 #define lpfc_sliport_status_oti_MASK 0x1
617 #define lpfc_sliport_status_oti_WORD word0
618 #define lpfc_sliport_status_rn_SHIFT 24
619 #define lpfc_sliport_status_rn_MASK 0x1
620 #define lpfc_sliport_status_rn_WORD word0
621 #define lpfc_sliport_status_rdy_SHIFT 23
622 #define lpfc_sliport_status_rdy_MASK 0x1
623 #define lpfc_sliport_status_rdy_WORD word0
624 #define MAX_IF_TYPE_2_RESETS 1000
626 #define LPFC_CTL_PORT_CTL_OFFSET 0x408
627 #define lpfc_sliport_ctrl_end_SHIFT 30
628 #define lpfc_sliport_ctrl_end_MASK 0x1
629 #define lpfc_sliport_ctrl_end_WORD word0
630 #define LPFC_SLIPORT_LITTLE_ENDIAN 0
631 #define LPFC_SLIPORT_BIG_ENDIAN 1
632 #define lpfc_sliport_ctrl_ip_SHIFT 27
633 #define lpfc_sliport_ctrl_ip_MASK 0x1
634 #define lpfc_sliport_ctrl_ip_WORD word0
635 #define LPFC_SLIPORT_INIT_PORT 1
637 #define LPFC_CTL_PORT_ER1_OFFSET 0x40C
638 #define LPFC_CTL_PORT_ER2_OFFSET 0x410
640 /* The following Registers apply to SLI4 if_type 0 UCNAs. They typically
643 #define LPFC_SLIPORT_IF0_SMPHR 0x00AC
645 #define LPFC_IMR_MASK_ALL 0xFFFFFFFF
646 #define LPFC_ISCR_CLEAR_ALL 0xFFFFFFFF
648 #define LPFC_HST_ISR0 0x0C18
649 #define LPFC_HST_ISR1 0x0C1C
650 #define LPFC_HST_ISR2 0x0C20
651 #define LPFC_HST_ISR3 0x0C24
652 #define LPFC_HST_ISR4 0x0C28
654 #define LPFC_HST_IMR0 0x0C48
655 #define LPFC_HST_IMR1 0x0C4C
656 #define LPFC_HST_IMR2 0x0C50
657 #define LPFC_HST_IMR3 0x0C54
658 #define LPFC_HST_IMR4 0x0C58
660 #define LPFC_HST_ISCR0 0x0C78
661 #define LPFC_HST_ISCR1 0x0C7C
662 #define LPFC_HST_ISCR2 0x0C80
663 #define LPFC_HST_ISCR3 0x0C84
664 #define LPFC_HST_ISCR4 0x0C88
666 #define LPFC_SLI4_INTR0 BIT0
667 #define LPFC_SLI4_INTR1 BIT1
668 #define LPFC_SLI4_INTR2 BIT2
669 #define LPFC_SLI4_INTR3 BIT3
670 #define LPFC_SLI4_INTR4 BIT4
671 #define LPFC_SLI4_INTR5 BIT5
672 #define LPFC_SLI4_INTR6 BIT6
673 #define LPFC_SLI4_INTR7 BIT7
674 #define LPFC_SLI4_INTR8 BIT8
675 #define LPFC_SLI4_INTR9 BIT9
676 #define LPFC_SLI4_INTR10 BIT10
677 #define LPFC_SLI4_INTR11 BIT11
678 #define LPFC_SLI4_INTR12 BIT12
679 #define LPFC_SLI4_INTR13 BIT13
680 #define LPFC_SLI4_INTR14 BIT14
681 #define LPFC_SLI4_INTR15 BIT15
682 #define LPFC_SLI4_INTR16 BIT16
683 #define LPFC_SLI4_INTR17 BIT17
684 #define LPFC_SLI4_INTR18 BIT18
685 #define LPFC_SLI4_INTR19 BIT19
686 #define LPFC_SLI4_INTR20 BIT20
687 #define LPFC_SLI4_INTR21 BIT21
688 #define LPFC_SLI4_INTR22 BIT22
689 #define LPFC_SLI4_INTR23 BIT23
690 #define LPFC_SLI4_INTR24 BIT24
691 #define LPFC_SLI4_INTR25 BIT25
692 #define LPFC_SLI4_INTR26 BIT26
693 #define LPFC_SLI4_INTR27 BIT27
694 #define LPFC_SLI4_INTR28 BIT28
695 #define LPFC_SLI4_INTR29 BIT29
696 #define LPFC_SLI4_INTR30 BIT30
697 #define LPFC_SLI4_INTR31 BIT31
700 * The Doorbell registers defined here exist in different BAR
701 * register sets depending on the UCNA Port's reported if_type
702 * value. For UCNA ports running SLI4 and if_type 0, they reside in
703 * BAR4. For UCNA ports running SLI4 and if_type 2, they reside in
704 * BAR0. The offsets are the same so the driver must account for
705 * any base address difference.
707 #define LPFC_ULP0_RQ_DOORBELL 0x00A0
708 #define LPFC_ULP1_RQ_DOORBELL 0x00C0
709 #define lpfc_rq_db_list_fm_num_posted_SHIFT 24
710 #define lpfc_rq_db_list_fm_num_posted_MASK 0x00FF
711 #define lpfc_rq_db_list_fm_num_posted_WORD word0
712 #define lpfc_rq_db_list_fm_index_SHIFT 16
713 #define lpfc_rq_db_list_fm_index_MASK 0x00FF
714 #define lpfc_rq_db_list_fm_index_WORD word0
715 #define lpfc_rq_db_list_fm_id_SHIFT 0
716 #define lpfc_rq_db_list_fm_id_MASK 0xFFFF
717 #define lpfc_rq_db_list_fm_id_WORD word0
718 #define lpfc_rq_db_ring_fm_num_posted_SHIFT 16
719 #define lpfc_rq_db_ring_fm_num_posted_MASK 0x3FFF
720 #define lpfc_rq_db_ring_fm_num_posted_WORD word0
721 #define lpfc_rq_db_ring_fm_id_SHIFT 0
722 #define lpfc_rq_db_ring_fm_id_MASK 0xFFFF
723 #define lpfc_rq_db_ring_fm_id_WORD word0
725 #define LPFC_ULP0_WQ_DOORBELL 0x0040
726 #define LPFC_ULP1_WQ_DOORBELL 0x0060
727 #define lpfc_wq_db_list_fm_num_posted_SHIFT 24
728 #define lpfc_wq_db_list_fm_num_posted_MASK 0x00FF
729 #define lpfc_wq_db_list_fm_num_posted_WORD word0
730 #define lpfc_wq_db_list_fm_index_SHIFT 16
731 #define lpfc_wq_db_list_fm_index_MASK 0x00FF
732 #define lpfc_wq_db_list_fm_index_WORD word0
733 #define lpfc_wq_db_list_fm_id_SHIFT 0
734 #define lpfc_wq_db_list_fm_id_MASK 0xFFFF
735 #define lpfc_wq_db_list_fm_id_WORD word0
736 #define lpfc_wq_db_ring_fm_num_posted_SHIFT 16
737 #define lpfc_wq_db_ring_fm_num_posted_MASK 0x3FFF
738 #define lpfc_wq_db_ring_fm_num_posted_WORD word0
739 #define lpfc_wq_db_ring_fm_id_SHIFT 0
740 #define lpfc_wq_db_ring_fm_id_MASK 0xFFFF
741 #define lpfc_wq_db_ring_fm_id_WORD word0
743 #define LPFC_EQCQ_DOORBELL 0x0120
744 #define lpfc_eqcq_doorbell_se_SHIFT 31
745 #define lpfc_eqcq_doorbell_se_MASK 0x0001
746 #define lpfc_eqcq_doorbell_se_WORD word0
747 #define LPFC_EQCQ_SOLICIT_ENABLE_OFF 0
748 #define LPFC_EQCQ_SOLICIT_ENABLE_ON 1
749 #define lpfc_eqcq_doorbell_arm_SHIFT 29
750 #define lpfc_eqcq_doorbell_arm_MASK 0x0001
751 #define lpfc_eqcq_doorbell_arm_WORD word0
752 #define lpfc_eqcq_doorbell_num_released_SHIFT 16
753 #define lpfc_eqcq_doorbell_num_released_MASK 0x1FFF
754 #define lpfc_eqcq_doorbell_num_released_WORD word0
755 #define lpfc_eqcq_doorbell_qt_SHIFT 10
756 #define lpfc_eqcq_doorbell_qt_MASK 0x0001
757 #define lpfc_eqcq_doorbell_qt_WORD word0
758 #define LPFC_QUEUE_TYPE_COMPLETION 0
759 #define LPFC_QUEUE_TYPE_EVENT 1
760 #define lpfc_eqcq_doorbell_eqci_SHIFT 9
761 #define lpfc_eqcq_doorbell_eqci_MASK 0x0001
762 #define lpfc_eqcq_doorbell_eqci_WORD word0
763 #define lpfc_eqcq_doorbell_cqid_lo_SHIFT 0
764 #define lpfc_eqcq_doorbell_cqid_lo_MASK 0x03FF
765 #define lpfc_eqcq_doorbell_cqid_lo_WORD word0
766 #define lpfc_eqcq_doorbell_cqid_hi_SHIFT 11
767 #define lpfc_eqcq_doorbell_cqid_hi_MASK 0x001F
768 #define lpfc_eqcq_doorbell_cqid_hi_WORD word0
769 #define lpfc_eqcq_doorbell_eqid_lo_SHIFT 0
770 #define lpfc_eqcq_doorbell_eqid_lo_MASK 0x01FF
771 #define lpfc_eqcq_doorbell_eqid_lo_WORD word0
772 #define lpfc_eqcq_doorbell_eqid_hi_SHIFT 11
773 #define lpfc_eqcq_doorbell_eqid_hi_MASK 0x001F
774 #define lpfc_eqcq_doorbell_eqid_hi_WORD word0
775 #define LPFC_CQID_HI_FIELD_SHIFT 10
776 #define LPFC_EQID_HI_FIELD_SHIFT 9
778 #define LPFC_BMBX 0x0160
779 #define lpfc_bmbx_addr_SHIFT 2
780 #define lpfc_bmbx_addr_MASK 0x3FFFFFFF
781 #define lpfc_bmbx_addr_WORD word0
782 #define lpfc_bmbx_hi_SHIFT 1
783 #define lpfc_bmbx_hi_MASK 0x0001
784 #define lpfc_bmbx_hi_WORD word0
785 #define lpfc_bmbx_rdy_SHIFT 0
786 #define lpfc_bmbx_rdy_MASK 0x0001
787 #define lpfc_bmbx_rdy_WORD word0
789 #define LPFC_MQ_DOORBELL 0x0140
790 #define lpfc_mq_doorbell_num_posted_SHIFT 16
791 #define lpfc_mq_doorbell_num_posted_MASK 0x3FFF
792 #define lpfc_mq_doorbell_num_posted_WORD word0
793 #define lpfc_mq_doorbell_id_SHIFT 0
794 #define lpfc_mq_doorbell_id_MASK 0xFFFF
795 #define lpfc_mq_doorbell_id_WORD word0
797 struct lpfc_sli4_cfg_mhdr {
799 #define lpfc_mbox_hdr_emb_SHIFT 0
800 #define lpfc_mbox_hdr_emb_MASK 0x00000001
801 #define lpfc_mbox_hdr_emb_WORD word1
802 #define lpfc_mbox_hdr_sge_cnt_SHIFT 3
803 #define lpfc_mbox_hdr_sge_cnt_MASK 0x0000001F
804 #define lpfc_mbox_hdr_sge_cnt_WORD word1
805 uint32_t payload_length;
811 union lpfc_sli4_cfg_shdr {
814 #define lpfc_mbox_hdr_opcode_SHIFT 0
815 #define lpfc_mbox_hdr_opcode_MASK 0x000000FF
816 #define lpfc_mbox_hdr_opcode_WORD word6
817 #define lpfc_mbox_hdr_subsystem_SHIFT 8
818 #define lpfc_mbox_hdr_subsystem_MASK 0x000000FF
819 #define lpfc_mbox_hdr_subsystem_WORD word6
820 #define lpfc_mbox_hdr_port_number_SHIFT 16
821 #define lpfc_mbox_hdr_port_number_MASK 0x000000FF
822 #define lpfc_mbox_hdr_port_number_WORD word6
823 #define lpfc_mbox_hdr_domain_SHIFT 24
824 #define lpfc_mbox_hdr_domain_MASK 0x000000FF
825 #define lpfc_mbox_hdr_domain_WORD word6
827 uint32_t request_length;
829 #define lpfc_mbox_hdr_version_SHIFT 0
830 #define lpfc_mbox_hdr_version_MASK 0x000000FF
831 #define lpfc_mbox_hdr_version_WORD word9
832 #define lpfc_mbox_hdr_pf_num_SHIFT 16
833 #define lpfc_mbox_hdr_pf_num_MASK 0x000000FF
834 #define lpfc_mbox_hdr_pf_num_WORD word9
835 #define lpfc_mbox_hdr_vh_num_SHIFT 24
836 #define lpfc_mbox_hdr_vh_num_MASK 0x000000FF
837 #define lpfc_mbox_hdr_vh_num_WORD word9
838 #define LPFC_Q_CREATE_VERSION_2 2
839 #define LPFC_Q_CREATE_VERSION_1 1
840 #define LPFC_Q_CREATE_VERSION_0 0
841 #define LPFC_OPCODE_VERSION_0 0
842 #define LPFC_OPCODE_VERSION_1 1
846 #define lpfc_mbox_hdr_opcode_SHIFT 0
847 #define lpfc_mbox_hdr_opcode_MASK 0x000000FF
848 #define lpfc_mbox_hdr_opcode_WORD word6
849 #define lpfc_mbox_hdr_subsystem_SHIFT 8
850 #define lpfc_mbox_hdr_subsystem_MASK 0x000000FF
851 #define lpfc_mbox_hdr_subsystem_WORD word6
852 #define lpfc_mbox_hdr_domain_SHIFT 24
853 #define lpfc_mbox_hdr_domain_MASK 0x000000FF
854 #define lpfc_mbox_hdr_domain_WORD word6
856 #define lpfc_mbox_hdr_status_SHIFT 0
857 #define lpfc_mbox_hdr_status_MASK 0x000000FF
858 #define lpfc_mbox_hdr_status_WORD word7
859 #define lpfc_mbox_hdr_add_status_SHIFT 8
860 #define lpfc_mbox_hdr_add_status_MASK 0x000000FF
861 #define lpfc_mbox_hdr_add_status_WORD word7
862 uint32_t response_length;
863 uint32_t actual_response_length;
867 /* Mailbox Header structures.
868 * struct mbox_header is defined for first generation SLI4_CFG mailbox
869 * calls deployed for BE-based ports.
871 * struct sli4_mbox_header is defined for second generation SLI4
872 * ports that don't deploy the SLI4_CFG mechanism.
875 struct lpfc_sli4_cfg_mhdr cfg_mhdr;
876 union lpfc_sli4_cfg_shdr cfg_shdr;
879 #define LPFC_EXTENT_LOCAL 0
880 #define LPFC_TIMEOUT_DEFAULT 0
881 #define LPFC_EXTENT_VERSION_DEFAULT 0
883 /* Subsystem Definitions */
884 #define LPFC_MBOX_SUBSYSTEM_NA 0x0
885 #define LPFC_MBOX_SUBSYSTEM_COMMON 0x1
886 #define LPFC_MBOX_SUBSYSTEM_FCOE 0xC
888 /* Device Specific Definitions */
890 /* The HOST ENDIAN defines are in Big Endian format. */
891 #define HOST_ENDIAN_LOW_WORD0 0xFF3412FF
892 #define HOST_ENDIAN_HIGH_WORD1 0xFF7856FF
895 #define LPFC_MBOX_OPCODE_NA 0x00
896 #define LPFC_MBOX_OPCODE_CQ_CREATE 0x0C
897 #define LPFC_MBOX_OPCODE_EQ_CREATE 0x0D
898 #define LPFC_MBOX_OPCODE_MQ_CREATE 0x15
899 #define LPFC_MBOX_OPCODE_GET_CNTL_ATTRIBUTES 0x20
900 #define LPFC_MBOX_OPCODE_NOP 0x21
901 #define LPFC_MBOX_OPCODE_MODIFY_EQ_DELAY 0x29
902 #define LPFC_MBOX_OPCODE_MQ_DESTROY 0x35
903 #define LPFC_MBOX_OPCODE_CQ_DESTROY 0x36
904 #define LPFC_MBOX_OPCODE_EQ_DESTROY 0x37
905 #define LPFC_MBOX_OPCODE_QUERY_FW_CFG 0x3A
906 #define LPFC_MBOX_OPCODE_FUNCTION_RESET 0x3D
907 #define LPFC_MBOX_OPCODE_SET_PHYSICAL_LINK_CONFIG 0x3E
908 #define LPFC_MBOX_OPCODE_SET_BOOT_CONFIG 0x43
909 #define LPFC_MBOX_OPCODE_GET_PORT_NAME 0x4D
910 #define LPFC_MBOX_OPCODE_MQ_CREATE_EXT 0x5A
911 #define LPFC_MBOX_OPCODE_GET_VPD_DATA 0x5B
912 #define LPFC_MBOX_OPCODE_SEND_ACTIVATION 0x73
913 #define LPFC_MBOX_OPCODE_RESET_LICENSES 0x74
914 #define LPFC_MBOX_OPCODE_GET_RSRC_EXTENT_INFO 0x9A
915 #define LPFC_MBOX_OPCODE_GET_ALLOC_RSRC_EXTENT 0x9B
916 #define LPFC_MBOX_OPCODE_ALLOC_RSRC_EXTENT 0x9C
917 #define LPFC_MBOX_OPCODE_DEALLOC_RSRC_EXTENT 0x9D
918 #define LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG 0xA0
919 #define LPFC_MBOX_OPCODE_GET_PROFILE_CAPACITIES 0xA1
920 #define LPFC_MBOX_OPCODE_GET_PROFILE_CONFIG 0xA4
921 #define LPFC_MBOX_OPCODE_SET_PROFILE_CONFIG 0xA5
922 #define LPFC_MBOX_OPCODE_GET_PROFILE_LIST 0xA6
923 #define LPFC_MBOX_OPCODE_SET_ACT_PROFILE 0xA8
924 #define LPFC_MBOX_OPCODE_GET_FACTORY_PROFILE_CONFIG 0xA9
925 #define LPFC_MBOX_OPCODE_READ_OBJECT 0xAB
926 #define LPFC_MBOX_OPCODE_WRITE_OBJECT 0xAC
927 #define LPFC_MBOX_OPCODE_READ_OBJECT_LIST 0xAD
928 #define LPFC_MBOX_OPCODE_DELETE_OBJECT 0xAE
929 #define LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS 0xB5
932 #define LPFC_MBOX_OPCODE_FCOE_WQ_CREATE 0x01
933 #define LPFC_MBOX_OPCODE_FCOE_WQ_DESTROY 0x02
934 #define LPFC_MBOX_OPCODE_FCOE_POST_SGL_PAGES 0x03
935 #define LPFC_MBOX_OPCODE_FCOE_REMOVE_SGL_PAGES 0x04
936 #define LPFC_MBOX_OPCODE_FCOE_RQ_CREATE 0x05
937 #define LPFC_MBOX_OPCODE_FCOE_RQ_DESTROY 0x06
938 #define LPFC_MBOX_OPCODE_FCOE_READ_FCF_TABLE 0x08
939 #define LPFC_MBOX_OPCODE_FCOE_ADD_FCF 0x09
940 #define LPFC_MBOX_OPCODE_FCOE_DELETE_FCF 0x0A
941 #define LPFC_MBOX_OPCODE_FCOE_POST_HDR_TEMPLATE 0x0B
942 #define LPFC_MBOX_OPCODE_FCOE_REDISCOVER_FCF 0x10
943 #define LPFC_MBOX_OPCODE_FCOE_SET_FCLINK_SETTINGS 0x21
944 #define LPFC_MBOX_OPCODE_FCOE_LINK_DIAG_STATE 0x22
945 #define LPFC_MBOX_OPCODE_FCOE_LINK_DIAG_LOOPBACK 0x23
947 /* Mailbox command structures */
950 #define lpfc_eq_context_size_SHIFT 31
951 #define lpfc_eq_context_size_MASK 0x00000001
952 #define lpfc_eq_context_size_WORD word0
953 #define LPFC_EQE_SIZE_4 0x0
954 #define LPFC_EQE_SIZE_16 0x1
955 #define lpfc_eq_context_valid_SHIFT 29
956 #define lpfc_eq_context_valid_MASK 0x00000001
957 #define lpfc_eq_context_valid_WORD word0
959 #define lpfc_eq_context_count_SHIFT 26
960 #define lpfc_eq_context_count_MASK 0x00000003
961 #define lpfc_eq_context_count_WORD word1
962 #define LPFC_EQ_CNT_256 0x0
963 #define LPFC_EQ_CNT_512 0x1
964 #define LPFC_EQ_CNT_1024 0x2
965 #define LPFC_EQ_CNT_2048 0x3
966 #define LPFC_EQ_CNT_4096 0x4
968 #define lpfc_eq_context_delay_multi_SHIFT 13
969 #define lpfc_eq_context_delay_multi_MASK 0x000003FF
970 #define lpfc_eq_context_delay_multi_WORD word2
974 struct eq_delay_info {
977 uint32_t delay_multi;
979 #define LPFC_MAX_EQ_DELAY 8
981 struct sgl_page_pairs {
982 uint32_t sgl_pg0_addr_lo;
983 uint32_t sgl_pg0_addr_hi;
984 uint32_t sgl_pg1_addr_lo;
985 uint32_t sgl_pg1_addr_hi;
988 struct lpfc_mbx_post_sgl_pages {
989 struct mbox_header header;
991 #define lpfc_post_sgl_pages_xri_SHIFT 0
992 #define lpfc_post_sgl_pages_xri_MASK 0x0000FFFF
993 #define lpfc_post_sgl_pages_xri_WORD word0
994 #define lpfc_post_sgl_pages_xricnt_SHIFT 16
995 #define lpfc_post_sgl_pages_xricnt_MASK 0x0000FFFF
996 #define lpfc_post_sgl_pages_xricnt_WORD word0
997 struct sgl_page_pairs sgl_pg_pairs[1];
1000 /* word0 of page-1 struct shares the same SHIFT/MASK/WORD defines as above */
1001 struct lpfc_mbx_post_uembed_sgl_page1 {
1002 union lpfc_sli4_cfg_shdr cfg_shdr;
1004 struct sgl_page_pairs sgl_pg_pairs;
1007 struct lpfc_mbx_sge {
1013 struct lpfc_mbx_nembed_cmd {
1014 struct lpfc_sli4_cfg_mhdr cfg_mhdr;
1015 #define LPFC_SLI4_MBX_SGE_MAX_PAGES 19
1016 struct lpfc_mbx_sge sge[LPFC_SLI4_MBX_SGE_MAX_PAGES];
1019 struct lpfc_mbx_nembed_sge_virt {
1020 void *addr[LPFC_SLI4_MBX_SGE_MAX_PAGES];
1023 struct lpfc_mbx_eq_create {
1024 struct mbox_header header;
1028 #define lpfc_mbx_eq_create_num_pages_SHIFT 0
1029 #define lpfc_mbx_eq_create_num_pages_MASK 0x0000FFFF
1030 #define lpfc_mbx_eq_create_num_pages_WORD word0
1031 struct eq_context context;
1032 struct dma_address page[LPFC_MAX_EQ_PAGE];
1036 #define lpfc_mbx_eq_create_q_id_SHIFT 0
1037 #define lpfc_mbx_eq_create_q_id_MASK 0x0000FFFF
1038 #define lpfc_mbx_eq_create_q_id_WORD word0
1043 struct lpfc_mbx_modify_eq_delay {
1044 struct mbox_header header;
1048 struct eq_delay_info eq[LPFC_MAX_EQ_DELAY];
1056 struct lpfc_mbx_eq_destroy {
1057 struct mbox_header header;
1061 #define lpfc_mbx_eq_destroy_q_id_SHIFT 0
1062 #define lpfc_mbx_eq_destroy_q_id_MASK 0x0000FFFF
1063 #define lpfc_mbx_eq_destroy_q_id_WORD word0
1071 struct lpfc_mbx_nop {
1072 struct mbox_header header;
1073 uint32_t context[2];
1078 #define lpfc_cq_context_event_SHIFT 31
1079 #define lpfc_cq_context_event_MASK 0x00000001
1080 #define lpfc_cq_context_event_WORD word0
1081 #define lpfc_cq_context_valid_SHIFT 29
1082 #define lpfc_cq_context_valid_MASK 0x00000001
1083 #define lpfc_cq_context_valid_WORD word0
1084 #define lpfc_cq_context_count_SHIFT 27
1085 #define lpfc_cq_context_count_MASK 0x00000003
1086 #define lpfc_cq_context_count_WORD word0
1087 #define LPFC_CQ_CNT_256 0x0
1088 #define LPFC_CQ_CNT_512 0x1
1089 #define LPFC_CQ_CNT_1024 0x2
1091 #define lpfc_cq_eq_id_SHIFT 22 /* Version 0 Only */
1092 #define lpfc_cq_eq_id_MASK 0x000000FF
1093 #define lpfc_cq_eq_id_WORD word1
1094 #define lpfc_cq_eq_id_2_SHIFT 0 /* Version 2 Only */
1095 #define lpfc_cq_eq_id_2_MASK 0x0000FFFF
1096 #define lpfc_cq_eq_id_2_WORD word1
1101 struct lpfc_mbx_cq_create {
1102 struct mbox_header header;
1106 #define lpfc_mbx_cq_create_page_size_SHIFT 16 /* Version 2 Only */
1107 #define lpfc_mbx_cq_create_page_size_MASK 0x000000FF
1108 #define lpfc_mbx_cq_create_page_size_WORD word0
1109 #define lpfc_mbx_cq_create_num_pages_SHIFT 0
1110 #define lpfc_mbx_cq_create_num_pages_MASK 0x0000FFFF
1111 #define lpfc_mbx_cq_create_num_pages_WORD word0
1112 struct cq_context context;
1113 struct dma_address page[LPFC_MAX_CQ_PAGE];
1117 #define lpfc_mbx_cq_create_q_id_SHIFT 0
1118 #define lpfc_mbx_cq_create_q_id_MASK 0x0000FFFF
1119 #define lpfc_mbx_cq_create_q_id_WORD word0
1124 struct lpfc_mbx_cq_destroy {
1125 struct mbox_header header;
1129 #define lpfc_mbx_cq_destroy_q_id_SHIFT 0
1130 #define lpfc_mbx_cq_destroy_q_id_MASK 0x0000FFFF
1131 #define lpfc_mbx_cq_destroy_q_id_WORD word0
1146 struct lpfc_mbx_wq_create {
1147 struct mbox_header header;
1149 struct { /* Version 0 Request */
1151 #define lpfc_mbx_wq_create_num_pages_SHIFT 0
1152 #define lpfc_mbx_wq_create_num_pages_MASK 0x000000FF
1153 #define lpfc_mbx_wq_create_num_pages_WORD word0
1154 #define lpfc_mbx_wq_create_dua_SHIFT 8
1155 #define lpfc_mbx_wq_create_dua_MASK 0x00000001
1156 #define lpfc_mbx_wq_create_dua_WORD word0
1157 #define lpfc_mbx_wq_create_cq_id_SHIFT 16
1158 #define lpfc_mbx_wq_create_cq_id_MASK 0x0000FFFF
1159 #define lpfc_mbx_wq_create_cq_id_WORD word0
1160 struct dma_address page[LPFC_MAX_WQ_PAGE_V0];
1162 #define lpfc_mbx_wq_create_bua_SHIFT 0
1163 #define lpfc_mbx_wq_create_bua_MASK 0x00000001
1164 #define lpfc_mbx_wq_create_bua_WORD word9
1165 #define lpfc_mbx_wq_create_ulp_num_SHIFT 8
1166 #define lpfc_mbx_wq_create_ulp_num_MASK 0x000000FF
1167 #define lpfc_mbx_wq_create_ulp_num_WORD word9
1169 struct { /* Version 1 Request */
1170 uint32_t word0; /* Word 0 is the same as in v0 */
1172 #define lpfc_mbx_wq_create_page_size_SHIFT 0
1173 #define lpfc_mbx_wq_create_page_size_MASK 0x000000FF
1174 #define lpfc_mbx_wq_create_page_size_WORD word1
1175 #define lpfc_mbx_wq_create_wqe_size_SHIFT 8
1176 #define lpfc_mbx_wq_create_wqe_size_MASK 0x0000000F
1177 #define lpfc_mbx_wq_create_wqe_size_WORD word1
1178 #define LPFC_WQ_WQE_SIZE_64 0x5
1179 #define LPFC_WQ_WQE_SIZE_128 0x6
1180 #define lpfc_mbx_wq_create_wqe_count_SHIFT 16
1181 #define lpfc_mbx_wq_create_wqe_count_MASK 0x0000FFFF
1182 #define lpfc_mbx_wq_create_wqe_count_WORD word1
1184 struct dma_address page[LPFC_MAX_WQ_PAGE-1];
1188 #define lpfc_mbx_wq_create_q_id_SHIFT 0
1189 #define lpfc_mbx_wq_create_q_id_MASK 0x0000FFFF
1190 #define lpfc_mbx_wq_create_q_id_WORD word0
1191 uint32_t doorbell_offset;
1193 #define lpfc_mbx_wq_create_bar_set_SHIFT 0
1194 #define lpfc_mbx_wq_create_bar_set_MASK 0x0000FFFF
1195 #define lpfc_mbx_wq_create_bar_set_WORD word2
1196 #define WQ_PCI_BAR_0_AND_1 0x00
1197 #define WQ_PCI_BAR_2_AND_3 0x01
1198 #define WQ_PCI_BAR_4_AND_5 0x02
1199 #define lpfc_mbx_wq_create_db_format_SHIFT 16
1200 #define lpfc_mbx_wq_create_db_format_MASK 0x0000FFFF
1201 #define lpfc_mbx_wq_create_db_format_WORD word2
1206 struct lpfc_mbx_wq_destroy {
1207 struct mbox_header header;
1211 #define lpfc_mbx_wq_destroy_q_id_SHIFT 0
1212 #define lpfc_mbx_wq_destroy_q_id_MASK 0x0000FFFF
1213 #define lpfc_mbx_wq_destroy_q_id_WORD word0
1221 #define LPFC_HDR_BUF_SIZE 128
1222 #define LPFC_DATA_BUF_SIZE 2048
1225 #define lpfc_rq_context_rqe_count_SHIFT 16 /* Version 0 Only */
1226 #define lpfc_rq_context_rqe_count_MASK 0x0000000F
1227 #define lpfc_rq_context_rqe_count_WORD word0
1228 #define LPFC_RQ_RING_SIZE_512 9 /* 512 entries */
1229 #define LPFC_RQ_RING_SIZE_1024 10 /* 1024 entries */
1230 #define LPFC_RQ_RING_SIZE_2048 11 /* 2048 entries */
1231 #define LPFC_RQ_RING_SIZE_4096 12 /* 4096 entries */
1232 #define lpfc_rq_context_rqe_count_1_SHIFT 16 /* Version 1 Only */
1233 #define lpfc_rq_context_rqe_count_1_MASK 0x0000FFFF
1234 #define lpfc_rq_context_rqe_count_1_WORD word0
1235 #define lpfc_rq_context_rqe_size_SHIFT 8 /* Version 1 Only */
1236 #define lpfc_rq_context_rqe_size_MASK 0x0000000F
1237 #define lpfc_rq_context_rqe_size_WORD word0
1238 #define LPFC_RQE_SIZE_8 2
1239 #define LPFC_RQE_SIZE_16 3
1240 #define LPFC_RQE_SIZE_32 4
1241 #define LPFC_RQE_SIZE_64 5
1242 #define LPFC_RQE_SIZE_128 6
1243 #define lpfc_rq_context_page_size_SHIFT 0 /* Version 1 Only */
1244 #define lpfc_rq_context_page_size_MASK 0x000000FF
1245 #define lpfc_rq_context_page_size_WORD word0
1248 #define lpfc_rq_context_cq_id_SHIFT 16
1249 #define lpfc_rq_context_cq_id_MASK 0x000003FF
1250 #define lpfc_rq_context_cq_id_WORD word2
1251 #define lpfc_rq_context_buf_size_SHIFT 0
1252 #define lpfc_rq_context_buf_size_MASK 0x0000FFFF
1253 #define lpfc_rq_context_buf_size_WORD word2
1254 uint32_t buffer_size; /* Version 1 Only */
1257 struct lpfc_mbx_rq_create {
1258 struct mbox_header header;
1262 #define lpfc_mbx_rq_create_num_pages_SHIFT 0
1263 #define lpfc_mbx_rq_create_num_pages_MASK 0x0000FFFF
1264 #define lpfc_mbx_rq_create_num_pages_WORD word0
1265 #define lpfc_mbx_rq_create_dua_SHIFT 16
1266 #define lpfc_mbx_rq_create_dua_MASK 0x00000001
1267 #define lpfc_mbx_rq_create_dua_WORD word0
1268 #define lpfc_mbx_rq_create_bqu_SHIFT 17
1269 #define lpfc_mbx_rq_create_bqu_MASK 0x00000001
1270 #define lpfc_mbx_rq_create_bqu_WORD word0
1271 #define lpfc_mbx_rq_create_ulp_num_SHIFT 24
1272 #define lpfc_mbx_rq_create_ulp_num_MASK 0x000000FF
1273 #define lpfc_mbx_rq_create_ulp_num_WORD word0
1274 struct rq_context context;
1275 struct dma_address page[LPFC_MAX_WQ_PAGE];
1279 #define lpfc_mbx_rq_create_q_id_SHIFT 0
1280 #define lpfc_mbx_rq_create_q_id_MASK 0x0000FFFF
1281 #define lpfc_mbx_rq_create_q_id_WORD word0
1282 uint32_t doorbell_offset;
1284 #define lpfc_mbx_rq_create_bar_set_SHIFT 0
1285 #define lpfc_mbx_rq_create_bar_set_MASK 0x0000FFFF
1286 #define lpfc_mbx_rq_create_bar_set_WORD word2
1287 #define lpfc_mbx_rq_create_db_format_SHIFT 16
1288 #define lpfc_mbx_rq_create_db_format_MASK 0x0000FFFF
1289 #define lpfc_mbx_rq_create_db_format_WORD word2
1294 struct lpfc_mbx_rq_destroy {
1295 struct mbox_header header;
1299 #define lpfc_mbx_rq_destroy_q_id_SHIFT 0
1300 #define lpfc_mbx_rq_destroy_q_id_MASK 0x0000FFFF
1301 #define lpfc_mbx_rq_destroy_q_id_WORD word0
1311 #define lpfc_mq_context_cq_id_SHIFT 22 /* Version 0 Only */
1312 #define lpfc_mq_context_cq_id_MASK 0x000003FF
1313 #define lpfc_mq_context_cq_id_WORD word0
1314 #define lpfc_mq_context_ring_size_SHIFT 16
1315 #define lpfc_mq_context_ring_size_MASK 0x0000000F
1316 #define lpfc_mq_context_ring_size_WORD word0
1317 #define LPFC_MQ_RING_SIZE_16 0x5
1318 #define LPFC_MQ_RING_SIZE_32 0x6
1319 #define LPFC_MQ_RING_SIZE_64 0x7
1320 #define LPFC_MQ_RING_SIZE_128 0x8
1322 #define lpfc_mq_context_valid_SHIFT 31
1323 #define lpfc_mq_context_valid_MASK 0x00000001
1324 #define lpfc_mq_context_valid_WORD word1
1329 struct lpfc_mbx_mq_create {
1330 struct mbox_header header;
1334 #define lpfc_mbx_mq_create_num_pages_SHIFT 0
1335 #define lpfc_mbx_mq_create_num_pages_MASK 0x0000FFFF
1336 #define lpfc_mbx_mq_create_num_pages_WORD word0
1337 struct mq_context context;
1338 struct dma_address page[LPFC_MAX_MQ_PAGE];
1342 #define lpfc_mbx_mq_create_q_id_SHIFT 0
1343 #define lpfc_mbx_mq_create_q_id_MASK 0x0000FFFF
1344 #define lpfc_mbx_mq_create_q_id_WORD word0
1349 struct lpfc_mbx_mq_create_ext {
1350 struct mbox_header header;
1354 #define lpfc_mbx_mq_create_ext_num_pages_SHIFT 0
1355 #define lpfc_mbx_mq_create_ext_num_pages_MASK 0x0000FFFF
1356 #define lpfc_mbx_mq_create_ext_num_pages_WORD word0
1357 #define lpfc_mbx_mq_create_ext_cq_id_SHIFT 16 /* Version 1 Only */
1358 #define lpfc_mbx_mq_create_ext_cq_id_MASK 0x0000FFFF
1359 #define lpfc_mbx_mq_create_ext_cq_id_WORD word0
1360 uint32_t async_evt_bmap;
1361 #define lpfc_mbx_mq_create_ext_async_evt_link_SHIFT LPFC_TRAILER_CODE_LINK
1362 #define lpfc_mbx_mq_create_ext_async_evt_link_MASK 0x00000001
1363 #define lpfc_mbx_mq_create_ext_async_evt_link_WORD async_evt_bmap
1364 #define LPFC_EVT_CODE_LINK_NO_LINK 0x0
1365 #define LPFC_EVT_CODE_LINK_10_MBIT 0x1
1366 #define LPFC_EVT_CODE_LINK_100_MBIT 0x2
1367 #define LPFC_EVT_CODE_LINK_1_GBIT 0x3
1368 #define LPFC_EVT_CODE_LINK_10_GBIT 0x4
1369 #define lpfc_mbx_mq_create_ext_async_evt_fip_SHIFT LPFC_TRAILER_CODE_FCOE
1370 #define lpfc_mbx_mq_create_ext_async_evt_fip_MASK 0x00000001
1371 #define lpfc_mbx_mq_create_ext_async_evt_fip_WORD async_evt_bmap
1372 #define lpfc_mbx_mq_create_ext_async_evt_group5_SHIFT LPFC_TRAILER_CODE_GRP5
1373 #define lpfc_mbx_mq_create_ext_async_evt_group5_MASK 0x00000001
1374 #define lpfc_mbx_mq_create_ext_async_evt_group5_WORD async_evt_bmap
1375 #define lpfc_mbx_mq_create_ext_async_evt_fc_SHIFT LPFC_TRAILER_CODE_FC
1376 #define lpfc_mbx_mq_create_ext_async_evt_fc_MASK 0x00000001
1377 #define lpfc_mbx_mq_create_ext_async_evt_fc_WORD async_evt_bmap
1378 #define LPFC_EVT_CODE_FC_NO_LINK 0x0
1379 #define LPFC_EVT_CODE_FC_1_GBAUD 0x1
1380 #define LPFC_EVT_CODE_FC_2_GBAUD 0x2
1381 #define LPFC_EVT_CODE_FC_4_GBAUD 0x4
1382 #define LPFC_EVT_CODE_FC_8_GBAUD 0x8
1383 #define LPFC_EVT_CODE_FC_10_GBAUD 0xA
1384 #define LPFC_EVT_CODE_FC_16_GBAUD 0x10
1385 #define lpfc_mbx_mq_create_ext_async_evt_sli_SHIFT LPFC_TRAILER_CODE_SLI
1386 #define lpfc_mbx_mq_create_ext_async_evt_sli_MASK 0x00000001
1387 #define lpfc_mbx_mq_create_ext_async_evt_sli_WORD async_evt_bmap
1388 struct mq_context context;
1389 struct dma_address page[LPFC_MAX_MQ_PAGE];
1393 #define lpfc_mbx_mq_create_q_id_SHIFT 0
1394 #define lpfc_mbx_mq_create_q_id_MASK 0x0000FFFF
1395 #define lpfc_mbx_mq_create_q_id_WORD word0
1398 #define LPFC_ASYNC_EVENT_LINK_STATE 0x2
1399 #define LPFC_ASYNC_EVENT_FCF_STATE 0x4
1400 #define LPFC_ASYNC_EVENT_GROUP5 0x20
1403 struct lpfc_mbx_mq_destroy {
1404 struct mbox_header header;
1408 #define lpfc_mbx_mq_destroy_q_id_SHIFT 0
1409 #define lpfc_mbx_mq_destroy_q_id_MASK 0x0000FFFF
1410 #define lpfc_mbx_mq_destroy_q_id_WORD word0
1418 /* Start Gen 2 SLI4 Mailbox definitions: */
1420 /* Define allocate-ready Gen 2 SLI4 FCoE Resource Extent Types. */
1421 #define LPFC_RSC_TYPE_FCOE_VFI 0x20
1422 #define LPFC_RSC_TYPE_FCOE_VPI 0x21
1423 #define LPFC_RSC_TYPE_FCOE_RPI 0x22
1424 #define LPFC_RSC_TYPE_FCOE_XRI 0x23
1426 struct lpfc_mbx_get_rsrc_extent_info {
1427 struct mbox_header header;
1431 #define lpfc_mbx_get_rsrc_extent_info_type_SHIFT 0
1432 #define lpfc_mbx_get_rsrc_extent_info_type_MASK 0x0000FFFF
1433 #define lpfc_mbx_get_rsrc_extent_info_type_WORD word4
1437 #define lpfc_mbx_get_rsrc_extent_info_cnt_SHIFT 0
1438 #define lpfc_mbx_get_rsrc_extent_info_cnt_MASK 0x0000FFFF
1439 #define lpfc_mbx_get_rsrc_extent_info_cnt_WORD word4
1440 #define lpfc_mbx_get_rsrc_extent_info_size_SHIFT 16
1441 #define lpfc_mbx_get_rsrc_extent_info_size_MASK 0x0000FFFF
1442 #define lpfc_mbx_get_rsrc_extent_info_size_WORD word4
1447 struct lpfc_mbx_query_fw_config {
1448 struct mbox_header header;
1450 uint32_t config_number;
1451 #define LPFC_FC_FCOE 0x00000007
1452 uint32_t asic_revision;
1453 uint32_t physical_port;
1454 uint32_t function_mode;
1455 #define LPFC_FCOE_INI_MODE 0x00000040
1456 #define LPFC_FCOE_TGT_MODE 0x00000080
1457 #define LPFC_DUA_MODE 0x00000800
1459 #define LPFC_ULP_FCOE_INIT_MODE 0x00000040
1460 #define LPFC_ULP_FCOE_TGT_MODE 0x00000080
1461 uint32_t ulp0_nap_words[12];
1463 uint32_t ulp1_nap_words[12];
1464 uint32_t function_capabilities;
1469 uint32_t ulp0_nap2_words[2];
1470 uint32_t ulp1_nap2_words[2];
1474 struct lpfc_id_range {
1476 #define lpfc_mbx_rsrc_id_word4_0_SHIFT 0
1477 #define lpfc_mbx_rsrc_id_word4_0_MASK 0x0000FFFF
1478 #define lpfc_mbx_rsrc_id_word4_0_WORD word5
1479 #define lpfc_mbx_rsrc_id_word4_1_SHIFT 16
1480 #define lpfc_mbx_rsrc_id_word4_1_MASK 0x0000FFFF
1481 #define lpfc_mbx_rsrc_id_word4_1_WORD word5
1484 struct lpfc_mbx_set_link_diag_state {
1485 struct mbox_header header;
1489 #define lpfc_mbx_set_diag_state_diag_SHIFT 0
1490 #define lpfc_mbx_set_diag_state_diag_MASK 0x00000001
1491 #define lpfc_mbx_set_diag_state_diag_WORD word0
1492 #define lpfc_mbx_set_diag_state_diag_bit_valid_SHIFT 2
1493 #define lpfc_mbx_set_diag_state_diag_bit_valid_MASK 0x00000001
1494 #define lpfc_mbx_set_diag_state_diag_bit_valid_WORD word0
1495 #define LPFC_DIAG_STATE_DIAG_BIT_VALID_NO_CHANGE 0
1496 #define LPFC_DIAG_STATE_DIAG_BIT_VALID_CHANGE 1
1497 #define lpfc_mbx_set_diag_state_link_num_SHIFT 16
1498 #define lpfc_mbx_set_diag_state_link_num_MASK 0x0000003F
1499 #define lpfc_mbx_set_diag_state_link_num_WORD word0
1500 #define lpfc_mbx_set_diag_state_link_type_SHIFT 22
1501 #define lpfc_mbx_set_diag_state_link_type_MASK 0x00000003
1502 #define lpfc_mbx_set_diag_state_link_type_WORD word0
1510 struct lpfc_mbx_set_link_diag_loopback {
1511 struct mbox_header header;
1515 #define lpfc_mbx_set_diag_lpbk_type_SHIFT 0
1516 #define lpfc_mbx_set_diag_lpbk_type_MASK 0x00000003
1517 #define lpfc_mbx_set_diag_lpbk_type_WORD word0
1518 #define LPFC_DIAG_LOOPBACK_TYPE_DISABLE 0x0
1519 #define LPFC_DIAG_LOOPBACK_TYPE_INTERNAL 0x1
1520 #define LPFC_DIAG_LOOPBACK_TYPE_SERDES 0x2
1521 #define lpfc_mbx_set_diag_lpbk_link_num_SHIFT 16
1522 #define lpfc_mbx_set_diag_lpbk_link_num_MASK 0x0000003F
1523 #define lpfc_mbx_set_diag_lpbk_link_num_WORD word0
1524 #define lpfc_mbx_set_diag_lpbk_link_type_SHIFT 22
1525 #define lpfc_mbx_set_diag_lpbk_link_type_MASK 0x00000003
1526 #define lpfc_mbx_set_diag_lpbk_link_type_WORD word0
1534 struct lpfc_mbx_run_link_diag_test {
1535 struct mbox_header header;
1539 #define lpfc_mbx_run_diag_test_link_num_SHIFT 16
1540 #define lpfc_mbx_run_diag_test_link_num_MASK 0x0000003F
1541 #define lpfc_mbx_run_diag_test_link_num_WORD word0
1542 #define lpfc_mbx_run_diag_test_link_type_SHIFT 22
1543 #define lpfc_mbx_run_diag_test_link_type_MASK 0x00000003
1544 #define lpfc_mbx_run_diag_test_link_type_WORD word0
1546 #define lpfc_mbx_run_diag_test_test_id_SHIFT 0
1547 #define lpfc_mbx_run_diag_test_test_id_MASK 0x0000FFFF
1548 #define lpfc_mbx_run_diag_test_test_id_WORD word1
1549 #define lpfc_mbx_run_diag_test_loops_SHIFT 16
1550 #define lpfc_mbx_run_diag_test_loops_MASK 0x0000FFFF
1551 #define lpfc_mbx_run_diag_test_loops_WORD word1
1553 #define lpfc_mbx_run_diag_test_test_ver_SHIFT 0
1554 #define lpfc_mbx_run_diag_test_test_ver_MASK 0x0000FFFF
1555 #define lpfc_mbx_run_diag_test_test_ver_WORD word2
1556 #define lpfc_mbx_run_diag_test_err_act_SHIFT 16
1557 #define lpfc_mbx_run_diag_test_err_act_MASK 0x000000FF
1558 #define lpfc_mbx_run_diag_test_err_act_WORD word2
1567 * struct lpfc_mbx_alloc_rsrc_extents:
1568 * A mbox is generically 256 bytes long. An SLI4_CONFIG mailbox requires
1569 * 6 words of header + 4 words of shared subcommand header +
1570 * 1 words of Extent-Opcode-specific header = 11 words or 44 bytes total.
1572 * An embedded version of SLI4_CONFIG therefore has 256 - 44 = 212 bytes
1573 * for extents payload.
1575 * 212/2 (bytes per extent) = 106 extents.
1576 * 106/2 (extents per word) = 53 words.
1577 * lpfc_id_range id is statically size to 53.
1579 * This mailbox definition is used for ALLOC or GET_ALLOCATED
1580 * extent ranges. For ALLOC, the type and cnt are required.
1581 * For GET_ALLOCATED, only the type is required.
1583 struct lpfc_mbx_alloc_rsrc_extents {
1584 struct mbox_header header;
1588 #define lpfc_mbx_alloc_rsrc_extents_type_SHIFT 0
1589 #define lpfc_mbx_alloc_rsrc_extents_type_MASK 0x0000FFFF
1590 #define lpfc_mbx_alloc_rsrc_extents_type_WORD word4
1591 #define lpfc_mbx_alloc_rsrc_extents_cnt_SHIFT 16
1592 #define lpfc_mbx_alloc_rsrc_extents_cnt_MASK 0x0000FFFF
1593 #define lpfc_mbx_alloc_rsrc_extents_cnt_WORD word4
1597 #define lpfc_mbx_rsrc_cnt_SHIFT 0
1598 #define lpfc_mbx_rsrc_cnt_MASK 0x0000FFFF
1599 #define lpfc_mbx_rsrc_cnt_WORD word4
1600 struct lpfc_id_range id[53];
1606 * This is the non-embedded version of ALLOC or GET RSRC_EXTENTS. Word4 in this
1607 * structure shares the same SHIFT/MASK/WORD defines provided in the
1608 * mbx_alloc_rsrc_extents and mbx_get_alloc_rsrc_extents, word4, provided in
1609 * the structures defined above. This non-embedded structure provides for the
1610 * maximum number of extents supported by the port.
1612 struct lpfc_mbx_nembed_rsrc_extent {
1613 union lpfc_sli4_cfg_shdr cfg_shdr;
1615 struct lpfc_id_range id;
1618 struct lpfc_mbx_dealloc_rsrc_extents {
1619 struct mbox_header header;
1622 #define lpfc_mbx_dealloc_rsrc_extents_type_SHIFT 0
1623 #define lpfc_mbx_dealloc_rsrc_extents_type_MASK 0x0000FFFF
1624 #define lpfc_mbx_dealloc_rsrc_extents_type_WORD word4
1629 /* Start SLI4 FCoE specific mbox structures. */
1631 struct lpfc_mbx_post_hdr_tmpl {
1632 struct mbox_header header;
1634 #define lpfc_mbx_post_hdr_tmpl_rpi_offset_SHIFT 0
1635 #define lpfc_mbx_post_hdr_tmpl_rpi_offset_MASK 0x0000FFFF
1636 #define lpfc_mbx_post_hdr_tmpl_rpi_offset_WORD word10
1637 #define lpfc_mbx_post_hdr_tmpl_page_cnt_SHIFT 16
1638 #define lpfc_mbx_post_hdr_tmpl_page_cnt_MASK 0x0000FFFF
1639 #define lpfc_mbx_post_hdr_tmpl_page_cnt_WORD word10
1640 uint32_t rpi_paddr_lo;
1641 uint32_t rpi_paddr_hi;
1644 struct sli4_sge { /* SLI-4 */
1649 #define lpfc_sli4_sge_offset_SHIFT 0
1650 #define lpfc_sli4_sge_offset_MASK 0x07FFFFFF
1651 #define lpfc_sli4_sge_offset_WORD word2
1652 #define lpfc_sli4_sge_type_SHIFT 27
1653 #define lpfc_sli4_sge_type_MASK 0x0000000F
1654 #define lpfc_sli4_sge_type_WORD word2
1655 #define LPFC_SGE_TYPE_DATA 0x0
1656 #define LPFC_SGE_TYPE_DIF 0x4
1657 #define LPFC_SGE_TYPE_LSP 0x5
1658 #define LPFC_SGE_TYPE_PEDIF 0x6
1659 #define LPFC_SGE_TYPE_PESEED 0x7
1660 #define LPFC_SGE_TYPE_DISEED 0x8
1661 #define LPFC_SGE_TYPE_ENC 0x9
1662 #define LPFC_SGE_TYPE_ATM 0xA
1663 #define LPFC_SGE_TYPE_SKIP 0xC
1664 #define lpfc_sli4_sge_last_SHIFT 31 /* Last SEG in the SGL sets it */
1665 #define lpfc_sli4_sge_last_MASK 0x00000001
1666 #define lpfc_sli4_sge_last_WORD word2
1670 struct sli4_sge_diseed { /* SLI-4 */
1672 uint32_t ref_tag_tran;
1675 #define lpfc_sli4_sge_dif_apptran_SHIFT 0
1676 #define lpfc_sli4_sge_dif_apptran_MASK 0x0000FFFF
1677 #define lpfc_sli4_sge_dif_apptran_WORD word2
1678 #define lpfc_sli4_sge_dif_af_SHIFT 24
1679 #define lpfc_sli4_sge_dif_af_MASK 0x00000001
1680 #define lpfc_sli4_sge_dif_af_WORD word2
1681 #define lpfc_sli4_sge_dif_na_SHIFT 25
1682 #define lpfc_sli4_sge_dif_na_MASK 0x00000001
1683 #define lpfc_sli4_sge_dif_na_WORD word2
1684 #define lpfc_sli4_sge_dif_hi_SHIFT 26
1685 #define lpfc_sli4_sge_dif_hi_MASK 0x00000001
1686 #define lpfc_sli4_sge_dif_hi_WORD word2
1687 #define lpfc_sli4_sge_dif_type_SHIFT 27
1688 #define lpfc_sli4_sge_dif_type_MASK 0x0000000F
1689 #define lpfc_sli4_sge_dif_type_WORD word2
1690 #define lpfc_sli4_sge_dif_last_SHIFT 31 /* Last SEG in the SGL sets it */
1691 #define lpfc_sli4_sge_dif_last_MASK 0x00000001
1692 #define lpfc_sli4_sge_dif_last_WORD word2
1694 #define lpfc_sli4_sge_dif_apptag_SHIFT 0
1695 #define lpfc_sli4_sge_dif_apptag_MASK 0x0000FFFF
1696 #define lpfc_sli4_sge_dif_apptag_WORD word3
1697 #define lpfc_sli4_sge_dif_bs_SHIFT 16
1698 #define lpfc_sli4_sge_dif_bs_MASK 0x00000007
1699 #define lpfc_sli4_sge_dif_bs_WORD word3
1700 #define lpfc_sli4_sge_dif_ai_SHIFT 19
1701 #define lpfc_sli4_sge_dif_ai_MASK 0x00000001
1702 #define lpfc_sli4_sge_dif_ai_WORD word3
1703 #define lpfc_sli4_sge_dif_me_SHIFT 20
1704 #define lpfc_sli4_sge_dif_me_MASK 0x00000001
1705 #define lpfc_sli4_sge_dif_me_WORD word3
1706 #define lpfc_sli4_sge_dif_re_SHIFT 21
1707 #define lpfc_sli4_sge_dif_re_MASK 0x00000001
1708 #define lpfc_sli4_sge_dif_re_WORD word3
1709 #define lpfc_sli4_sge_dif_ce_SHIFT 22
1710 #define lpfc_sli4_sge_dif_ce_MASK 0x00000001
1711 #define lpfc_sli4_sge_dif_ce_WORD word3
1712 #define lpfc_sli4_sge_dif_nr_SHIFT 23
1713 #define lpfc_sli4_sge_dif_nr_MASK 0x00000001
1714 #define lpfc_sli4_sge_dif_nr_WORD word3
1715 #define lpfc_sli4_sge_dif_oprx_SHIFT 24
1716 #define lpfc_sli4_sge_dif_oprx_MASK 0x0000000F
1717 #define lpfc_sli4_sge_dif_oprx_WORD word3
1718 #define lpfc_sli4_sge_dif_optx_SHIFT 28
1719 #define lpfc_sli4_sge_dif_optx_MASK 0x0000000F
1720 #define lpfc_sli4_sge_dif_optx_WORD word3
1721 /* optx and oprx use BG_OP_IN defines in lpfc_hw.h */
1725 uint32_t max_rcv_size;
1726 uint32_t fka_adv_period;
1727 uint32_t fip_priority;
1729 #define lpfc_fcf_record_mac_0_SHIFT 0
1730 #define lpfc_fcf_record_mac_0_MASK 0x000000FF
1731 #define lpfc_fcf_record_mac_0_WORD word3
1732 #define lpfc_fcf_record_mac_1_SHIFT 8
1733 #define lpfc_fcf_record_mac_1_MASK 0x000000FF
1734 #define lpfc_fcf_record_mac_1_WORD word3
1735 #define lpfc_fcf_record_mac_2_SHIFT 16
1736 #define lpfc_fcf_record_mac_2_MASK 0x000000FF
1737 #define lpfc_fcf_record_mac_2_WORD word3
1738 #define lpfc_fcf_record_mac_3_SHIFT 24
1739 #define lpfc_fcf_record_mac_3_MASK 0x000000FF
1740 #define lpfc_fcf_record_mac_3_WORD word3
1742 #define lpfc_fcf_record_mac_4_SHIFT 0
1743 #define lpfc_fcf_record_mac_4_MASK 0x000000FF
1744 #define lpfc_fcf_record_mac_4_WORD word4
1745 #define lpfc_fcf_record_mac_5_SHIFT 8
1746 #define lpfc_fcf_record_mac_5_MASK 0x000000FF
1747 #define lpfc_fcf_record_mac_5_WORD word4
1748 #define lpfc_fcf_record_fcf_avail_SHIFT 16
1749 #define lpfc_fcf_record_fcf_avail_MASK 0x000000FF
1750 #define lpfc_fcf_record_fcf_avail_WORD word4
1751 #define lpfc_fcf_record_mac_addr_prov_SHIFT 24
1752 #define lpfc_fcf_record_mac_addr_prov_MASK 0x000000FF
1753 #define lpfc_fcf_record_mac_addr_prov_WORD word4
1754 #define LPFC_FCF_FPMA 1 /* Fabric Provided MAC Address */
1755 #define LPFC_FCF_SPMA 2 /* Server Provided MAC Address */
1757 #define lpfc_fcf_record_fab_name_0_SHIFT 0
1758 #define lpfc_fcf_record_fab_name_0_MASK 0x000000FF
1759 #define lpfc_fcf_record_fab_name_0_WORD word5
1760 #define lpfc_fcf_record_fab_name_1_SHIFT 8
1761 #define lpfc_fcf_record_fab_name_1_MASK 0x000000FF
1762 #define lpfc_fcf_record_fab_name_1_WORD word5
1763 #define lpfc_fcf_record_fab_name_2_SHIFT 16
1764 #define lpfc_fcf_record_fab_name_2_MASK 0x000000FF
1765 #define lpfc_fcf_record_fab_name_2_WORD word5
1766 #define lpfc_fcf_record_fab_name_3_SHIFT 24
1767 #define lpfc_fcf_record_fab_name_3_MASK 0x000000FF
1768 #define lpfc_fcf_record_fab_name_3_WORD word5
1770 #define lpfc_fcf_record_fab_name_4_SHIFT 0
1771 #define lpfc_fcf_record_fab_name_4_MASK 0x000000FF
1772 #define lpfc_fcf_record_fab_name_4_WORD word6
1773 #define lpfc_fcf_record_fab_name_5_SHIFT 8
1774 #define lpfc_fcf_record_fab_name_5_MASK 0x000000FF
1775 #define lpfc_fcf_record_fab_name_5_WORD word6
1776 #define lpfc_fcf_record_fab_name_6_SHIFT 16
1777 #define lpfc_fcf_record_fab_name_6_MASK 0x000000FF
1778 #define lpfc_fcf_record_fab_name_6_WORD word6
1779 #define lpfc_fcf_record_fab_name_7_SHIFT 24
1780 #define lpfc_fcf_record_fab_name_7_MASK 0x000000FF
1781 #define lpfc_fcf_record_fab_name_7_WORD word6
1783 #define lpfc_fcf_record_fc_map_0_SHIFT 0
1784 #define lpfc_fcf_record_fc_map_0_MASK 0x000000FF
1785 #define lpfc_fcf_record_fc_map_0_WORD word7
1786 #define lpfc_fcf_record_fc_map_1_SHIFT 8
1787 #define lpfc_fcf_record_fc_map_1_MASK 0x000000FF
1788 #define lpfc_fcf_record_fc_map_1_WORD word7
1789 #define lpfc_fcf_record_fc_map_2_SHIFT 16
1790 #define lpfc_fcf_record_fc_map_2_MASK 0x000000FF
1791 #define lpfc_fcf_record_fc_map_2_WORD word7
1792 #define lpfc_fcf_record_fcf_valid_SHIFT 24
1793 #define lpfc_fcf_record_fcf_valid_MASK 0x00000001
1794 #define lpfc_fcf_record_fcf_valid_WORD word7
1795 #define lpfc_fcf_record_fcf_fc_SHIFT 25
1796 #define lpfc_fcf_record_fcf_fc_MASK 0x00000001
1797 #define lpfc_fcf_record_fcf_fc_WORD word7
1798 #define lpfc_fcf_record_fcf_sol_SHIFT 31
1799 #define lpfc_fcf_record_fcf_sol_MASK 0x00000001
1800 #define lpfc_fcf_record_fcf_sol_WORD word7
1802 #define lpfc_fcf_record_fcf_index_SHIFT 0
1803 #define lpfc_fcf_record_fcf_index_MASK 0x0000FFFF
1804 #define lpfc_fcf_record_fcf_index_WORD word8
1805 #define lpfc_fcf_record_fcf_state_SHIFT 16
1806 #define lpfc_fcf_record_fcf_state_MASK 0x0000FFFF
1807 #define lpfc_fcf_record_fcf_state_WORD word8
1808 uint8_t vlan_bitmap[512];
1810 #define lpfc_fcf_record_switch_name_0_SHIFT 0
1811 #define lpfc_fcf_record_switch_name_0_MASK 0x000000FF
1812 #define lpfc_fcf_record_switch_name_0_WORD word137
1813 #define lpfc_fcf_record_switch_name_1_SHIFT 8
1814 #define lpfc_fcf_record_switch_name_1_MASK 0x000000FF
1815 #define lpfc_fcf_record_switch_name_1_WORD word137
1816 #define lpfc_fcf_record_switch_name_2_SHIFT 16
1817 #define lpfc_fcf_record_switch_name_2_MASK 0x000000FF
1818 #define lpfc_fcf_record_switch_name_2_WORD word137
1819 #define lpfc_fcf_record_switch_name_3_SHIFT 24
1820 #define lpfc_fcf_record_switch_name_3_MASK 0x000000FF
1821 #define lpfc_fcf_record_switch_name_3_WORD word137
1823 #define lpfc_fcf_record_switch_name_4_SHIFT 0
1824 #define lpfc_fcf_record_switch_name_4_MASK 0x000000FF
1825 #define lpfc_fcf_record_switch_name_4_WORD word138
1826 #define lpfc_fcf_record_switch_name_5_SHIFT 8
1827 #define lpfc_fcf_record_switch_name_5_MASK 0x000000FF
1828 #define lpfc_fcf_record_switch_name_5_WORD word138
1829 #define lpfc_fcf_record_switch_name_6_SHIFT 16
1830 #define lpfc_fcf_record_switch_name_6_MASK 0x000000FF
1831 #define lpfc_fcf_record_switch_name_6_WORD word138
1832 #define lpfc_fcf_record_switch_name_7_SHIFT 24
1833 #define lpfc_fcf_record_switch_name_7_MASK 0x000000FF
1834 #define lpfc_fcf_record_switch_name_7_WORD word138
1837 struct lpfc_mbx_read_fcf_tbl {
1838 union lpfc_sli4_cfg_shdr cfg_shdr;
1842 #define lpfc_mbx_read_fcf_tbl_indx_SHIFT 0
1843 #define lpfc_mbx_read_fcf_tbl_indx_MASK 0x0000FFFF
1844 #define lpfc_mbx_read_fcf_tbl_indx_WORD word10
1851 #define lpfc_mbx_read_fcf_tbl_nxt_vindx_SHIFT 0
1852 #define lpfc_mbx_read_fcf_tbl_nxt_vindx_MASK 0x0000FFFF
1853 #define lpfc_mbx_read_fcf_tbl_nxt_vindx_WORD word11
1856 struct lpfc_mbx_add_fcf_tbl_entry {
1857 union lpfc_sli4_cfg_shdr cfg_shdr;
1859 #define lpfc_mbx_add_fcf_tbl_fcfi_SHIFT 0
1860 #define lpfc_mbx_add_fcf_tbl_fcfi_MASK 0x0000FFFF
1861 #define lpfc_mbx_add_fcf_tbl_fcfi_WORD word10
1862 struct lpfc_mbx_sge fcf_sge;
1865 struct lpfc_mbx_del_fcf_tbl_entry {
1866 struct mbox_header header;
1868 #define lpfc_mbx_del_fcf_tbl_count_SHIFT 0
1869 #define lpfc_mbx_del_fcf_tbl_count_MASK 0x0000FFFF
1870 #define lpfc_mbx_del_fcf_tbl_count_WORD word10
1871 #define lpfc_mbx_del_fcf_tbl_index_SHIFT 16
1872 #define lpfc_mbx_del_fcf_tbl_index_MASK 0x0000FFFF
1873 #define lpfc_mbx_del_fcf_tbl_index_WORD word10
1876 struct lpfc_mbx_redisc_fcf_tbl {
1877 struct mbox_header header;
1879 #define lpfc_mbx_redisc_fcf_count_SHIFT 0
1880 #define lpfc_mbx_redisc_fcf_count_MASK 0x0000FFFF
1881 #define lpfc_mbx_redisc_fcf_count_WORD word10
1884 #define lpfc_mbx_redisc_fcf_index_SHIFT 0
1885 #define lpfc_mbx_redisc_fcf_index_MASK 0x0000FFFF
1886 #define lpfc_mbx_redisc_fcf_index_WORD word12
1889 /* Status field for embedded SLI_CONFIG mailbox command */
1890 #define STATUS_SUCCESS 0x0
1891 #define STATUS_FAILED 0x1
1892 #define STATUS_ILLEGAL_REQUEST 0x2
1893 #define STATUS_ILLEGAL_FIELD 0x3
1894 #define STATUS_INSUFFICIENT_BUFFER 0x4
1895 #define STATUS_UNAUTHORIZED_REQUEST 0x5
1896 #define STATUS_FLASHROM_SAVE_FAILED 0x17
1897 #define STATUS_FLASHROM_RESTORE_FAILED 0x18
1898 #define STATUS_ICCBINDEX_ALLOC_FAILED 0x1a
1899 #define STATUS_IOCTLHANDLE_ALLOC_FAILED 0x1b
1900 #define STATUS_INVALID_PHY_ADDR_FROM_OSM 0x1c
1901 #define STATUS_INVALID_PHY_ADDR_LEN_FROM_OSM 0x1d
1902 #define STATUS_ASSERT_FAILED 0x1e
1903 #define STATUS_INVALID_SESSION 0x1f
1904 #define STATUS_INVALID_CONNECTION 0x20
1905 #define STATUS_BTL_PATH_EXCEEDS_OSM_LIMIT 0x21
1906 #define STATUS_BTL_NO_FREE_SLOT_PATH 0x24
1907 #define STATUS_BTL_NO_FREE_SLOT_TGTID 0x25
1908 #define STATUS_OSM_DEVSLOT_NOT_FOUND 0x26
1909 #define STATUS_FLASHROM_READ_FAILED 0x27
1910 #define STATUS_POLL_IOCTL_TIMEOUT 0x28
1911 #define STATUS_ERROR_ACITMAIN 0x2a
1912 #define STATUS_REBOOT_REQUIRED 0x2c
1913 #define STATUS_FCF_IN_USE 0x3a
1914 #define STATUS_FCF_TABLE_EMPTY 0x43
1916 struct lpfc_mbx_sli4_config {
1917 struct mbox_header header;
1920 struct lpfc_mbx_init_vfi {
1922 #define lpfc_init_vfi_vr_SHIFT 31
1923 #define lpfc_init_vfi_vr_MASK 0x00000001
1924 #define lpfc_init_vfi_vr_WORD word1
1925 #define lpfc_init_vfi_vt_SHIFT 30
1926 #define lpfc_init_vfi_vt_MASK 0x00000001
1927 #define lpfc_init_vfi_vt_WORD word1
1928 #define lpfc_init_vfi_vf_SHIFT 29
1929 #define lpfc_init_vfi_vf_MASK 0x00000001
1930 #define lpfc_init_vfi_vf_WORD word1
1931 #define lpfc_init_vfi_vp_SHIFT 28
1932 #define lpfc_init_vfi_vp_MASK 0x00000001
1933 #define lpfc_init_vfi_vp_WORD word1
1934 #define lpfc_init_vfi_vfi_SHIFT 0
1935 #define lpfc_init_vfi_vfi_MASK 0x0000FFFF
1936 #define lpfc_init_vfi_vfi_WORD word1
1938 #define lpfc_init_vfi_vpi_SHIFT 16
1939 #define lpfc_init_vfi_vpi_MASK 0x0000FFFF
1940 #define lpfc_init_vfi_vpi_WORD word2
1941 #define lpfc_init_vfi_fcfi_SHIFT 0
1942 #define lpfc_init_vfi_fcfi_MASK 0x0000FFFF
1943 #define lpfc_init_vfi_fcfi_WORD word2
1945 #define lpfc_init_vfi_pri_SHIFT 13
1946 #define lpfc_init_vfi_pri_MASK 0x00000007
1947 #define lpfc_init_vfi_pri_WORD word3
1948 #define lpfc_init_vfi_vf_id_SHIFT 1
1949 #define lpfc_init_vfi_vf_id_MASK 0x00000FFF
1950 #define lpfc_init_vfi_vf_id_WORD word3
1952 #define lpfc_init_vfi_hop_count_SHIFT 24
1953 #define lpfc_init_vfi_hop_count_MASK 0x000000FF
1954 #define lpfc_init_vfi_hop_count_WORD word4
1956 #define MBX_VFI_IN_USE 0x9F02
1959 struct lpfc_mbx_reg_vfi {
1961 #define lpfc_reg_vfi_upd_SHIFT 29
1962 #define lpfc_reg_vfi_upd_MASK 0x00000001
1963 #define lpfc_reg_vfi_upd_WORD word1
1964 #define lpfc_reg_vfi_vp_SHIFT 28
1965 #define lpfc_reg_vfi_vp_MASK 0x00000001
1966 #define lpfc_reg_vfi_vp_WORD word1
1967 #define lpfc_reg_vfi_vfi_SHIFT 0
1968 #define lpfc_reg_vfi_vfi_MASK 0x0000FFFF
1969 #define lpfc_reg_vfi_vfi_WORD word1
1971 #define lpfc_reg_vfi_vpi_SHIFT 16
1972 #define lpfc_reg_vfi_vpi_MASK 0x0000FFFF
1973 #define lpfc_reg_vfi_vpi_WORD word2
1974 #define lpfc_reg_vfi_fcfi_SHIFT 0
1975 #define lpfc_reg_vfi_fcfi_MASK 0x0000FFFF
1976 #define lpfc_reg_vfi_fcfi_WORD word2
1978 struct ulp_bde64 bde;
1982 #define lpfc_reg_vfi_nport_id_SHIFT 0
1983 #define lpfc_reg_vfi_nport_id_MASK 0x00FFFFFF
1984 #define lpfc_reg_vfi_nport_id_WORD word10
1987 struct lpfc_mbx_init_vpi {
1989 #define lpfc_init_vpi_vfi_SHIFT 16
1990 #define lpfc_init_vpi_vfi_MASK 0x0000FFFF
1991 #define lpfc_init_vpi_vfi_WORD word1
1992 #define lpfc_init_vpi_vpi_SHIFT 0
1993 #define lpfc_init_vpi_vpi_MASK 0x0000FFFF
1994 #define lpfc_init_vpi_vpi_WORD word1
1997 struct lpfc_mbx_read_vpi {
1998 uint32_t word1_rsvd;
2000 #define lpfc_mbx_read_vpi_vnportid_SHIFT 0
2001 #define lpfc_mbx_read_vpi_vnportid_MASK 0x00FFFFFF
2002 #define lpfc_mbx_read_vpi_vnportid_WORD word2
2003 uint32_t word3_rsvd;
2005 #define lpfc_mbx_read_vpi_acq_alpa_SHIFT 0
2006 #define lpfc_mbx_read_vpi_acq_alpa_MASK 0x000000FF
2007 #define lpfc_mbx_read_vpi_acq_alpa_WORD word4
2008 #define lpfc_mbx_read_vpi_pb_SHIFT 15
2009 #define lpfc_mbx_read_vpi_pb_MASK 0x00000001
2010 #define lpfc_mbx_read_vpi_pb_WORD word4
2011 #define lpfc_mbx_read_vpi_spec_alpa_SHIFT 16
2012 #define lpfc_mbx_read_vpi_spec_alpa_MASK 0x000000FF
2013 #define lpfc_mbx_read_vpi_spec_alpa_WORD word4
2014 #define lpfc_mbx_read_vpi_ns_SHIFT 30
2015 #define lpfc_mbx_read_vpi_ns_MASK 0x00000001
2016 #define lpfc_mbx_read_vpi_ns_WORD word4
2017 #define lpfc_mbx_read_vpi_hl_SHIFT 31
2018 #define lpfc_mbx_read_vpi_hl_MASK 0x00000001
2019 #define lpfc_mbx_read_vpi_hl_WORD word4
2020 uint32_t word5_rsvd;
2022 #define lpfc_mbx_read_vpi_vpi_SHIFT 0
2023 #define lpfc_mbx_read_vpi_vpi_MASK 0x0000FFFF
2024 #define lpfc_mbx_read_vpi_vpi_WORD word6
2026 #define lpfc_mbx_read_vpi_mac_0_SHIFT 0
2027 #define lpfc_mbx_read_vpi_mac_0_MASK 0x000000FF
2028 #define lpfc_mbx_read_vpi_mac_0_WORD word7
2029 #define lpfc_mbx_read_vpi_mac_1_SHIFT 8
2030 #define lpfc_mbx_read_vpi_mac_1_MASK 0x000000FF
2031 #define lpfc_mbx_read_vpi_mac_1_WORD word7
2032 #define lpfc_mbx_read_vpi_mac_2_SHIFT 16
2033 #define lpfc_mbx_read_vpi_mac_2_MASK 0x000000FF
2034 #define lpfc_mbx_read_vpi_mac_2_WORD word7
2035 #define lpfc_mbx_read_vpi_mac_3_SHIFT 24
2036 #define lpfc_mbx_read_vpi_mac_3_MASK 0x000000FF
2037 #define lpfc_mbx_read_vpi_mac_3_WORD word7
2039 #define lpfc_mbx_read_vpi_mac_4_SHIFT 0
2040 #define lpfc_mbx_read_vpi_mac_4_MASK 0x000000FF
2041 #define lpfc_mbx_read_vpi_mac_4_WORD word8
2042 #define lpfc_mbx_read_vpi_mac_5_SHIFT 8
2043 #define lpfc_mbx_read_vpi_mac_5_MASK 0x000000FF
2044 #define lpfc_mbx_read_vpi_mac_5_WORD word8
2045 #define lpfc_mbx_read_vpi_vlan_tag_SHIFT 16
2046 #define lpfc_mbx_read_vpi_vlan_tag_MASK 0x00000FFF
2047 #define lpfc_mbx_read_vpi_vlan_tag_WORD word8
2048 #define lpfc_mbx_read_vpi_vv_SHIFT 28
2049 #define lpfc_mbx_read_vpi_vv_MASK 0x0000001
2050 #define lpfc_mbx_read_vpi_vv_WORD word8
2053 struct lpfc_mbx_unreg_vfi {
2054 uint32_t word1_rsvd;
2056 #define lpfc_unreg_vfi_vfi_SHIFT 0
2057 #define lpfc_unreg_vfi_vfi_MASK 0x0000FFFF
2058 #define lpfc_unreg_vfi_vfi_WORD word2
2061 struct lpfc_mbx_resume_rpi {
2063 #define lpfc_resume_rpi_index_SHIFT 0
2064 #define lpfc_resume_rpi_index_MASK 0x0000FFFF
2065 #define lpfc_resume_rpi_index_WORD word1
2066 #define lpfc_resume_rpi_ii_SHIFT 30
2067 #define lpfc_resume_rpi_ii_MASK 0x00000003
2068 #define lpfc_resume_rpi_ii_WORD word1
2069 #define RESUME_INDEX_RPI 0
2070 #define RESUME_INDEX_VPI 1
2071 #define RESUME_INDEX_VFI 2
2072 #define RESUME_INDEX_FCFI 3
2076 #define REG_FCF_INVALID_QID 0xFFFF
2077 struct lpfc_mbx_reg_fcfi {
2079 #define lpfc_reg_fcfi_info_index_SHIFT 0
2080 #define lpfc_reg_fcfi_info_index_MASK 0x0000FFFF
2081 #define lpfc_reg_fcfi_info_index_WORD word1
2082 #define lpfc_reg_fcfi_fcfi_SHIFT 16
2083 #define lpfc_reg_fcfi_fcfi_MASK 0x0000FFFF
2084 #define lpfc_reg_fcfi_fcfi_WORD word1
2086 #define lpfc_reg_fcfi_rq_id1_SHIFT 0
2087 #define lpfc_reg_fcfi_rq_id1_MASK 0x0000FFFF
2088 #define lpfc_reg_fcfi_rq_id1_WORD word2
2089 #define lpfc_reg_fcfi_rq_id0_SHIFT 16
2090 #define lpfc_reg_fcfi_rq_id0_MASK 0x0000FFFF
2091 #define lpfc_reg_fcfi_rq_id0_WORD word2
2093 #define lpfc_reg_fcfi_rq_id3_SHIFT 0
2094 #define lpfc_reg_fcfi_rq_id3_MASK 0x0000FFFF
2095 #define lpfc_reg_fcfi_rq_id3_WORD word3
2096 #define lpfc_reg_fcfi_rq_id2_SHIFT 16
2097 #define lpfc_reg_fcfi_rq_id2_MASK 0x0000FFFF
2098 #define lpfc_reg_fcfi_rq_id2_WORD word3
2100 #define lpfc_reg_fcfi_type_match0_SHIFT 24
2101 #define lpfc_reg_fcfi_type_match0_MASK 0x000000FF
2102 #define lpfc_reg_fcfi_type_match0_WORD word4
2103 #define lpfc_reg_fcfi_type_mask0_SHIFT 16
2104 #define lpfc_reg_fcfi_type_mask0_MASK 0x000000FF
2105 #define lpfc_reg_fcfi_type_mask0_WORD word4
2106 #define lpfc_reg_fcfi_rctl_match0_SHIFT 8
2107 #define lpfc_reg_fcfi_rctl_match0_MASK 0x000000FF
2108 #define lpfc_reg_fcfi_rctl_match0_WORD word4
2109 #define lpfc_reg_fcfi_rctl_mask0_SHIFT 0
2110 #define lpfc_reg_fcfi_rctl_mask0_MASK 0x000000FF
2111 #define lpfc_reg_fcfi_rctl_mask0_WORD word4
2113 #define lpfc_reg_fcfi_type_match1_SHIFT 24
2114 #define lpfc_reg_fcfi_type_match1_MASK 0x000000FF
2115 #define lpfc_reg_fcfi_type_match1_WORD word5
2116 #define lpfc_reg_fcfi_type_mask1_SHIFT 16
2117 #define lpfc_reg_fcfi_type_mask1_MASK 0x000000FF
2118 #define lpfc_reg_fcfi_type_mask1_WORD word5
2119 #define lpfc_reg_fcfi_rctl_match1_SHIFT 8
2120 #define lpfc_reg_fcfi_rctl_match1_MASK 0x000000FF
2121 #define lpfc_reg_fcfi_rctl_match1_WORD word5
2122 #define lpfc_reg_fcfi_rctl_mask1_SHIFT 0
2123 #define lpfc_reg_fcfi_rctl_mask1_MASK 0x000000FF
2124 #define lpfc_reg_fcfi_rctl_mask1_WORD word5
2126 #define lpfc_reg_fcfi_type_match2_SHIFT 24
2127 #define lpfc_reg_fcfi_type_match2_MASK 0x000000FF
2128 #define lpfc_reg_fcfi_type_match2_WORD word6
2129 #define lpfc_reg_fcfi_type_mask2_SHIFT 16
2130 #define lpfc_reg_fcfi_type_mask2_MASK 0x000000FF
2131 #define lpfc_reg_fcfi_type_mask2_WORD word6
2132 #define lpfc_reg_fcfi_rctl_match2_SHIFT 8
2133 #define lpfc_reg_fcfi_rctl_match2_MASK 0x000000FF
2134 #define lpfc_reg_fcfi_rctl_match2_WORD word6
2135 #define lpfc_reg_fcfi_rctl_mask2_SHIFT 0
2136 #define lpfc_reg_fcfi_rctl_mask2_MASK 0x000000FF
2137 #define lpfc_reg_fcfi_rctl_mask2_WORD word6
2139 #define lpfc_reg_fcfi_type_match3_SHIFT 24
2140 #define lpfc_reg_fcfi_type_match3_MASK 0x000000FF
2141 #define lpfc_reg_fcfi_type_match3_WORD word7
2142 #define lpfc_reg_fcfi_type_mask3_SHIFT 16
2143 #define lpfc_reg_fcfi_type_mask3_MASK 0x000000FF
2144 #define lpfc_reg_fcfi_type_mask3_WORD word7
2145 #define lpfc_reg_fcfi_rctl_match3_SHIFT 8
2146 #define lpfc_reg_fcfi_rctl_match3_MASK 0x000000FF
2147 #define lpfc_reg_fcfi_rctl_match3_WORD word7
2148 #define lpfc_reg_fcfi_rctl_mask3_SHIFT 0
2149 #define lpfc_reg_fcfi_rctl_mask3_MASK 0x000000FF
2150 #define lpfc_reg_fcfi_rctl_mask3_WORD word7
2152 #define lpfc_reg_fcfi_mam_SHIFT 13
2153 #define lpfc_reg_fcfi_mam_MASK 0x00000003
2154 #define lpfc_reg_fcfi_mam_WORD word8
2155 #define LPFC_MAM_BOTH 0 /* Both SPMA and FPMA */
2156 #define LPFC_MAM_SPMA 1 /* Server Provided MAC Address */
2157 #define LPFC_MAM_FPMA 2 /* Fabric Provided MAC Address */
2158 #define lpfc_reg_fcfi_vv_SHIFT 12
2159 #define lpfc_reg_fcfi_vv_MASK 0x00000001
2160 #define lpfc_reg_fcfi_vv_WORD word8
2161 #define lpfc_reg_fcfi_vlan_tag_SHIFT 0
2162 #define lpfc_reg_fcfi_vlan_tag_MASK 0x00000FFF
2163 #define lpfc_reg_fcfi_vlan_tag_WORD word8
2166 struct lpfc_mbx_unreg_fcfi {
2169 #define lpfc_unreg_fcfi_SHIFT 0
2170 #define lpfc_unreg_fcfi_MASK 0x0000FFFF
2171 #define lpfc_unreg_fcfi_WORD word2
2174 struct lpfc_mbx_read_rev {
2176 #define lpfc_mbx_rd_rev_sli_lvl_SHIFT 16
2177 #define lpfc_mbx_rd_rev_sli_lvl_MASK 0x0000000F
2178 #define lpfc_mbx_rd_rev_sli_lvl_WORD word1
2179 #define lpfc_mbx_rd_rev_fcoe_SHIFT 20
2180 #define lpfc_mbx_rd_rev_fcoe_MASK 0x00000001
2181 #define lpfc_mbx_rd_rev_fcoe_WORD word1
2182 #define lpfc_mbx_rd_rev_cee_ver_SHIFT 21
2183 #define lpfc_mbx_rd_rev_cee_ver_MASK 0x00000003
2184 #define lpfc_mbx_rd_rev_cee_ver_WORD word1
2185 #define LPFC_PREDCBX_CEE_MODE 0
2186 #define LPFC_DCBX_CEE_MODE 1
2187 #define lpfc_mbx_rd_rev_vpd_SHIFT 29
2188 #define lpfc_mbx_rd_rev_vpd_MASK 0x00000001
2189 #define lpfc_mbx_rd_rev_vpd_WORD word1
2190 uint32_t first_hw_rev;
2191 uint32_t second_hw_rev;
2192 uint32_t word4_rsvd;
2193 uint32_t third_hw_rev;
2195 #define lpfc_mbx_rd_rev_fcph_low_SHIFT 0
2196 #define lpfc_mbx_rd_rev_fcph_low_MASK 0x000000FF
2197 #define lpfc_mbx_rd_rev_fcph_low_WORD word6
2198 #define lpfc_mbx_rd_rev_fcph_high_SHIFT 8
2199 #define lpfc_mbx_rd_rev_fcph_high_MASK 0x000000FF
2200 #define lpfc_mbx_rd_rev_fcph_high_WORD word6
2201 #define lpfc_mbx_rd_rev_ftr_lvl_low_SHIFT 16
2202 #define lpfc_mbx_rd_rev_ftr_lvl_low_MASK 0x000000FF
2203 #define lpfc_mbx_rd_rev_ftr_lvl_low_WORD word6
2204 #define lpfc_mbx_rd_rev_ftr_lvl_high_SHIFT 24
2205 #define lpfc_mbx_rd_rev_ftr_lvl_high_MASK 0x000000FF
2206 #define lpfc_mbx_rd_rev_ftr_lvl_high_WORD word6
2207 uint32_t word7_rsvd;
2209 uint8_t fw_name[16];
2210 uint32_t ulp_fw_id_rev;
2211 uint8_t ulp_fw_name[16];
2212 uint32_t word18_47_rsvd[30];
2214 #define lpfc_mbx_rd_rev_avail_len_SHIFT 0
2215 #define lpfc_mbx_rd_rev_avail_len_MASK 0x00FFFFFF
2216 #define lpfc_mbx_rd_rev_avail_len_WORD word48
2217 uint32_t vpd_paddr_low;
2218 uint32_t vpd_paddr_high;
2219 uint32_t avail_vpd_len;
2220 uint32_t rsvd_52_63[12];
2223 struct lpfc_mbx_read_config {
2225 #define lpfc_mbx_rd_conf_extnts_inuse_SHIFT 31
2226 #define lpfc_mbx_rd_conf_extnts_inuse_MASK 0x00000001
2227 #define lpfc_mbx_rd_conf_extnts_inuse_WORD word1
2229 #define lpfc_mbx_rd_conf_lnk_numb_SHIFT 0
2230 #define lpfc_mbx_rd_conf_lnk_numb_MASK 0x0000003F
2231 #define lpfc_mbx_rd_conf_lnk_numb_WORD word2
2232 #define lpfc_mbx_rd_conf_lnk_type_SHIFT 6
2233 #define lpfc_mbx_rd_conf_lnk_type_MASK 0x00000003
2234 #define lpfc_mbx_rd_conf_lnk_type_WORD word2
2235 #define LPFC_LNK_TYPE_GE 0
2236 #define LPFC_LNK_TYPE_FC 1
2237 #define lpfc_mbx_rd_conf_lnk_ldv_SHIFT 8
2238 #define lpfc_mbx_rd_conf_lnk_ldv_MASK 0x00000001
2239 #define lpfc_mbx_rd_conf_lnk_ldv_WORD word2
2240 #define lpfc_mbx_rd_conf_topology_SHIFT 24
2241 #define lpfc_mbx_rd_conf_topology_MASK 0x000000FF
2242 #define lpfc_mbx_rd_conf_topology_WORD word2
2245 #define lpfc_mbx_rd_conf_e_d_tov_SHIFT 0
2246 #define lpfc_mbx_rd_conf_e_d_tov_MASK 0x0000FFFF
2247 #define lpfc_mbx_rd_conf_e_d_tov_WORD word4
2250 #define lpfc_mbx_rd_conf_r_a_tov_SHIFT 0
2251 #define lpfc_mbx_rd_conf_r_a_tov_MASK 0x0000FFFF
2252 #define lpfc_mbx_rd_conf_r_a_tov_WORD word6
2256 #define lpfc_mbx_rd_conf_lmt_SHIFT 0
2257 #define lpfc_mbx_rd_conf_lmt_MASK 0x0000FFFF
2258 #define lpfc_mbx_rd_conf_lmt_WORD word9
2262 #define lpfc_mbx_rd_conf_xri_base_SHIFT 0
2263 #define lpfc_mbx_rd_conf_xri_base_MASK 0x0000FFFF
2264 #define lpfc_mbx_rd_conf_xri_base_WORD word12
2265 #define lpfc_mbx_rd_conf_xri_count_SHIFT 16
2266 #define lpfc_mbx_rd_conf_xri_count_MASK 0x0000FFFF
2267 #define lpfc_mbx_rd_conf_xri_count_WORD word12
2269 #define lpfc_mbx_rd_conf_rpi_base_SHIFT 0
2270 #define lpfc_mbx_rd_conf_rpi_base_MASK 0x0000FFFF
2271 #define lpfc_mbx_rd_conf_rpi_base_WORD word13
2272 #define lpfc_mbx_rd_conf_rpi_count_SHIFT 16
2273 #define lpfc_mbx_rd_conf_rpi_count_MASK 0x0000FFFF
2274 #define lpfc_mbx_rd_conf_rpi_count_WORD word13
2276 #define lpfc_mbx_rd_conf_vpi_base_SHIFT 0
2277 #define lpfc_mbx_rd_conf_vpi_base_MASK 0x0000FFFF
2278 #define lpfc_mbx_rd_conf_vpi_base_WORD word14
2279 #define lpfc_mbx_rd_conf_vpi_count_SHIFT 16
2280 #define lpfc_mbx_rd_conf_vpi_count_MASK 0x0000FFFF
2281 #define lpfc_mbx_rd_conf_vpi_count_WORD word14
2283 #define lpfc_mbx_rd_conf_vfi_base_SHIFT 0
2284 #define lpfc_mbx_rd_conf_vfi_base_MASK 0x0000FFFF
2285 #define lpfc_mbx_rd_conf_vfi_base_WORD word15
2286 #define lpfc_mbx_rd_conf_vfi_count_SHIFT 16
2287 #define lpfc_mbx_rd_conf_vfi_count_MASK 0x0000FFFF
2288 #define lpfc_mbx_rd_conf_vfi_count_WORD word15
2290 #define lpfc_mbx_rd_conf_fcfi_count_SHIFT 16
2291 #define lpfc_mbx_rd_conf_fcfi_count_MASK 0x0000FFFF
2292 #define lpfc_mbx_rd_conf_fcfi_count_WORD word16
2294 #define lpfc_mbx_rd_conf_rq_count_SHIFT 0
2295 #define lpfc_mbx_rd_conf_rq_count_MASK 0x0000FFFF
2296 #define lpfc_mbx_rd_conf_rq_count_WORD word17
2297 #define lpfc_mbx_rd_conf_eq_count_SHIFT 16
2298 #define lpfc_mbx_rd_conf_eq_count_MASK 0x0000FFFF
2299 #define lpfc_mbx_rd_conf_eq_count_WORD word17
2301 #define lpfc_mbx_rd_conf_wq_count_SHIFT 0
2302 #define lpfc_mbx_rd_conf_wq_count_MASK 0x0000FFFF
2303 #define lpfc_mbx_rd_conf_wq_count_WORD word18
2304 #define lpfc_mbx_rd_conf_cq_count_SHIFT 16
2305 #define lpfc_mbx_rd_conf_cq_count_MASK 0x0000FFFF
2306 #define lpfc_mbx_rd_conf_cq_count_WORD word18
2309 struct lpfc_mbx_request_features {
2311 #define lpfc_mbx_rq_ftr_qry_SHIFT 0
2312 #define lpfc_mbx_rq_ftr_qry_MASK 0x00000001
2313 #define lpfc_mbx_rq_ftr_qry_WORD word1
2315 #define lpfc_mbx_rq_ftr_rq_iaab_SHIFT 0
2316 #define lpfc_mbx_rq_ftr_rq_iaab_MASK 0x00000001
2317 #define lpfc_mbx_rq_ftr_rq_iaab_WORD word2
2318 #define lpfc_mbx_rq_ftr_rq_npiv_SHIFT 1
2319 #define lpfc_mbx_rq_ftr_rq_npiv_MASK 0x00000001
2320 #define lpfc_mbx_rq_ftr_rq_npiv_WORD word2
2321 #define lpfc_mbx_rq_ftr_rq_dif_SHIFT 2
2322 #define lpfc_mbx_rq_ftr_rq_dif_MASK 0x00000001
2323 #define lpfc_mbx_rq_ftr_rq_dif_WORD word2
2324 #define lpfc_mbx_rq_ftr_rq_vf_SHIFT 3
2325 #define lpfc_mbx_rq_ftr_rq_vf_MASK 0x00000001
2326 #define lpfc_mbx_rq_ftr_rq_vf_WORD word2
2327 #define lpfc_mbx_rq_ftr_rq_fcpi_SHIFT 4
2328 #define lpfc_mbx_rq_ftr_rq_fcpi_MASK 0x00000001
2329 #define lpfc_mbx_rq_ftr_rq_fcpi_WORD word2
2330 #define lpfc_mbx_rq_ftr_rq_fcpt_SHIFT 5
2331 #define lpfc_mbx_rq_ftr_rq_fcpt_MASK 0x00000001
2332 #define lpfc_mbx_rq_ftr_rq_fcpt_WORD word2
2333 #define lpfc_mbx_rq_ftr_rq_fcpc_SHIFT 6
2334 #define lpfc_mbx_rq_ftr_rq_fcpc_MASK 0x00000001
2335 #define lpfc_mbx_rq_ftr_rq_fcpc_WORD word2
2336 #define lpfc_mbx_rq_ftr_rq_ifip_SHIFT 7
2337 #define lpfc_mbx_rq_ftr_rq_ifip_MASK 0x00000001
2338 #define lpfc_mbx_rq_ftr_rq_ifip_WORD word2
2339 #define lpfc_mbx_rq_ftr_rq_perfh_SHIFT 11
2340 #define lpfc_mbx_rq_ftr_rq_perfh_MASK 0x00000001
2341 #define lpfc_mbx_rq_ftr_rq_perfh_WORD word2
2343 #define lpfc_mbx_rq_ftr_rsp_iaab_SHIFT 0
2344 #define lpfc_mbx_rq_ftr_rsp_iaab_MASK 0x00000001
2345 #define lpfc_mbx_rq_ftr_rsp_iaab_WORD word3
2346 #define lpfc_mbx_rq_ftr_rsp_npiv_SHIFT 1
2347 #define lpfc_mbx_rq_ftr_rsp_npiv_MASK 0x00000001
2348 #define lpfc_mbx_rq_ftr_rsp_npiv_WORD word3
2349 #define lpfc_mbx_rq_ftr_rsp_dif_SHIFT 2
2350 #define lpfc_mbx_rq_ftr_rsp_dif_MASK 0x00000001
2351 #define lpfc_mbx_rq_ftr_rsp_dif_WORD word3
2352 #define lpfc_mbx_rq_ftr_rsp_vf_SHIFT 3
2353 #define lpfc_mbx_rq_ftr_rsp_vf__MASK 0x00000001
2354 #define lpfc_mbx_rq_ftr_rsp_vf_WORD word3
2355 #define lpfc_mbx_rq_ftr_rsp_fcpi_SHIFT 4
2356 #define lpfc_mbx_rq_ftr_rsp_fcpi_MASK 0x00000001
2357 #define lpfc_mbx_rq_ftr_rsp_fcpi_WORD word3
2358 #define lpfc_mbx_rq_ftr_rsp_fcpt_SHIFT 5
2359 #define lpfc_mbx_rq_ftr_rsp_fcpt_MASK 0x00000001
2360 #define lpfc_mbx_rq_ftr_rsp_fcpt_WORD word3
2361 #define lpfc_mbx_rq_ftr_rsp_fcpc_SHIFT 6
2362 #define lpfc_mbx_rq_ftr_rsp_fcpc_MASK 0x00000001
2363 #define lpfc_mbx_rq_ftr_rsp_fcpc_WORD word3
2364 #define lpfc_mbx_rq_ftr_rsp_ifip_SHIFT 7
2365 #define lpfc_mbx_rq_ftr_rsp_ifip_MASK 0x00000001
2366 #define lpfc_mbx_rq_ftr_rsp_ifip_WORD word3
2367 #define lpfc_mbx_rq_ftr_rsp_perfh_SHIFT 11
2368 #define lpfc_mbx_rq_ftr_rsp_perfh_MASK 0x00000001
2369 #define lpfc_mbx_rq_ftr_rsp_perfh_WORD word3
2372 struct lpfc_mbx_supp_pages {
2375 #define qs_MASK 0x00000001
2376 #define qs_WORD word1
2378 #define wr_MASK 0x00000001
2379 #define wr_WORD word1
2381 #define pf_MASK 0x000000ff
2382 #define pf_WORD word1
2383 #define cpn_SHIFT 16
2384 #define cpn_MASK 0x000000ff
2385 #define cpn_WORD word1
2387 #define list_offset_SHIFT 0
2388 #define list_offset_MASK 0x000000ff
2389 #define list_offset_WORD word2
2390 #define next_offset_SHIFT 8
2391 #define next_offset_MASK 0x000000ff
2392 #define next_offset_WORD word2
2393 #define elem_cnt_SHIFT 16
2394 #define elem_cnt_MASK 0x000000ff
2395 #define elem_cnt_WORD word2
2397 #define pn_0_SHIFT 24
2398 #define pn_0_MASK 0x000000ff
2399 #define pn_0_WORD word3
2400 #define pn_1_SHIFT 16
2401 #define pn_1_MASK 0x000000ff
2402 #define pn_1_WORD word3
2403 #define pn_2_SHIFT 8
2404 #define pn_2_MASK 0x000000ff
2405 #define pn_2_WORD word3
2406 #define pn_3_SHIFT 0
2407 #define pn_3_MASK 0x000000ff
2408 #define pn_3_WORD word3
2410 #define pn_4_SHIFT 24
2411 #define pn_4_MASK 0x000000ff
2412 #define pn_4_WORD word4
2413 #define pn_5_SHIFT 16
2414 #define pn_5_MASK 0x000000ff
2415 #define pn_5_WORD word4
2416 #define pn_6_SHIFT 8
2417 #define pn_6_MASK 0x000000ff
2418 #define pn_6_WORD word4
2419 #define pn_7_SHIFT 0
2420 #define pn_7_MASK 0x000000ff
2421 #define pn_7_WORD word4
2423 #define LPFC_SUPP_PAGES 0
2424 #define LPFC_BLOCK_GUARD_PROFILES 1
2425 #define LPFC_SLI4_PARAMETERS 2
2428 struct lpfc_mbx_pc_sli4_params {
2431 #define qs_MASK 0x00000001
2432 #define qs_WORD word1
2434 #define wr_MASK 0x00000001
2435 #define wr_WORD word1
2437 #define pf_MASK 0x000000ff
2438 #define pf_WORD word1
2439 #define cpn_SHIFT 16
2440 #define cpn_MASK 0x000000ff
2441 #define cpn_WORD word1
2443 #define if_type_SHIFT 0
2444 #define if_type_MASK 0x00000007
2445 #define if_type_WORD word2
2446 #define sli_rev_SHIFT 4
2447 #define sli_rev_MASK 0x0000000f
2448 #define sli_rev_WORD word2
2449 #define sli_family_SHIFT 8
2450 #define sli_family_MASK 0x000000ff
2451 #define sli_family_WORD word2
2452 #define featurelevel_1_SHIFT 16
2453 #define featurelevel_1_MASK 0x000000ff
2454 #define featurelevel_1_WORD word2
2455 #define featurelevel_2_SHIFT 24
2456 #define featurelevel_2_MASK 0x0000001f
2457 #define featurelevel_2_WORD word2
2459 #define fcoe_SHIFT 0
2460 #define fcoe_MASK 0x00000001
2461 #define fcoe_WORD word3
2463 #define fc_MASK 0x00000001
2464 #define fc_WORD word3
2466 #define nic_MASK 0x00000001
2467 #define nic_WORD word3
2468 #define iscsi_SHIFT 3
2469 #define iscsi_MASK 0x00000001
2470 #define iscsi_WORD word3
2471 #define rdma_SHIFT 4
2472 #define rdma_MASK 0x00000001
2473 #define rdma_WORD word3
2474 uint32_t sge_supp_len;
2475 #define SLI4_PAGE_SIZE 4096
2477 #define if_page_sz_SHIFT 0
2478 #define if_page_sz_MASK 0x0000ffff
2479 #define if_page_sz_WORD word5
2480 #define loopbk_scope_SHIFT 24
2481 #define loopbk_scope_MASK 0x0000000f
2482 #define loopbk_scope_WORD word5
2483 #define rq_db_window_SHIFT 28
2484 #define rq_db_window_MASK 0x0000000f
2485 #define rq_db_window_WORD word5
2487 #define eq_pages_SHIFT 0
2488 #define eq_pages_MASK 0x0000000f
2489 #define eq_pages_WORD word6
2490 #define eqe_size_SHIFT 8
2491 #define eqe_size_MASK 0x000000ff
2492 #define eqe_size_WORD word6
2494 #define cq_pages_SHIFT 0
2495 #define cq_pages_MASK 0x0000000f
2496 #define cq_pages_WORD word7
2497 #define cqe_size_SHIFT 8
2498 #define cqe_size_MASK 0x000000ff
2499 #define cqe_size_WORD word7
2501 #define mq_pages_SHIFT 0
2502 #define mq_pages_MASK 0x0000000f
2503 #define mq_pages_WORD word8
2504 #define mqe_size_SHIFT 8
2505 #define mqe_size_MASK 0x000000ff
2506 #define mqe_size_WORD word8
2507 #define mq_elem_cnt_SHIFT 16
2508 #define mq_elem_cnt_MASK 0x000000ff
2509 #define mq_elem_cnt_WORD word8
2511 #define wq_pages_SHIFT 0
2512 #define wq_pages_MASK 0x0000ffff
2513 #define wq_pages_WORD word9
2514 #define wqe_size_SHIFT 8
2515 #define wqe_size_MASK 0x000000ff
2516 #define wqe_size_WORD word9
2518 #define rq_pages_SHIFT 0
2519 #define rq_pages_MASK 0x0000ffff
2520 #define rq_pages_WORD word10
2521 #define rqe_size_SHIFT 8
2522 #define rqe_size_MASK 0x000000ff
2523 #define rqe_size_WORD word10
2525 #define hdr_pages_SHIFT 0
2526 #define hdr_pages_MASK 0x0000000f
2527 #define hdr_pages_WORD word11
2528 #define hdr_size_SHIFT 8
2529 #define hdr_size_MASK 0x0000000f
2530 #define hdr_size_WORD word11
2531 #define hdr_pp_align_SHIFT 16
2532 #define hdr_pp_align_MASK 0x0000ffff
2533 #define hdr_pp_align_WORD word11
2535 #define sgl_pages_SHIFT 0
2536 #define sgl_pages_MASK 0x0000000f
2537 #define sgl_pages_WORD word12
2538 #define sgl_pp_align_SHIFT 16
2539 #define sgl_pp_align_MASK 0x0000ffff
2540 #define sgl_pp_align_WORD word12
2541 uint32_t rsvd_13_63[51];
2543 #define SLI4_PAGE_ALIGN(addr) (((addr)+((SLI4_PAGE_SIZE)-1)) \
2544 &(~((SLI4_PAGE_SIZE)-1)))
2546 struct lpfc_sli4_parameters {
2548 #define cfg_prot_type_SHIFT 0
2549 #define cfg_prot_type_MASK 0x000000FF
2550 #define cfg_prot_type_WORD word0
2552 #define cfg_ft_SHIFT 0
2553 #define cfg_ft_MASK 0x00000001
2554 #define cfg_ft_WORD word1
2555 #define cfg_sli_rev_SHIFT 4
2556 #define cfg_sli_rev_MASK 0x0000000f
2557 #define cfg_sli_rev_WORD word1
2558 #define cfg_sli_family_SHIFT 8
2559 #define cfg_sli_family_MASK 0x0000000f
2560 #define cfg_sli_family_WORD word1
2561 #define cfg_if_type_SHIFT 12
2562 #define cfg_if_type_MASK 0x0000000f
2563 #define cfg_if_type_WORD word1
2564 #define cfg_sli_hint_1_SHIFT 16
2565 #define cfg_sli_hint_1_MASK 0x000000ff
2566 #define cfg_sli_hint_1_WORD word1
2567 #define cfg_sli_hint_2_SHIFT 24
2568 #define cfg_sli_hint_2_MASK 0x0000001f
2569 #define cfg_sli_hint_2_WORD word1
2573 #define cfg_cqv_SHIFT 14
2574 #define cfg_cqv_MASK 0x00000003
2575 #define cfg_cqv_WORD word4
2578 #define cfg_mqv_SHIFT 14
2579 #define cfg_mqv_MASK 0x00000003
2580 #define cfg_mqv_WORD word6
2583 #define cfg_wqv_SHIFT 14
2584 #define cfg_wqv_MASK 0x00000003
2585 #define cfg_wqv_WORD word8
2588 #define cfg_rqv_SHIFT 14
2589 #define cfg_rqv_MASK 0x00000003
2590 #define cfg_rqv_WORD word10
2592 #define cfg_rq_db_window_SHIFT 28
2593 #define cfg_rq_db_window_MASK 0x0000000f
2594 #define cfg_rq_db_window_WORD word11
2596 #define cfg_fcoe_SHIFT 0
2597 #define cfg_fcoe_MASK 0x00000001
2598 #define cfg_fcoe_WORD word12
2599 #define cfg_ext_SHIFT 1
2600 #define cfg_ext_MASK 0x00000001
2601 #define cfg_ext_WORD word12
2602 #define cfg_hdrr_SHIFT 2
2603 #define cfg_hdrr_MASK 0x00000001
2604 #define cfg_hdrr_WORD word12
2605 #define cfg_phwq_SHIFT 15
2606 #define cfg_phwq_MASK 0x00000001
2607 #define cfg_phwq_WORD word12
2608 #define cfg_loopbk_scope_SHIFT 28
2609 #define cfg_loopbk_scope_MASK 0x0000000f
2610 #define cfg_loopbk_scope_WORD word12
2611 uint32_t sge_supp_len;
2613 #define cfg_sgl_page_cnt_SHIFT 0
2614 #define cfg_sgl_page_cnt_MASK 0x0000000f
2615 #define cfg_sgl_page_cnt_WORD word14
2616 #define cfg_sgl_page_size_SHIFT 8
2617 #define cfg_sgl_page_size_MASK 0x000000ff
2618 #define cfg_sgl_page_size_WORD word14
2619 #define cfg_sgl_pp_align_SHIFT 16
2620 #define cfg_sgl_pp_align_MASK 0x000000ff
2621 #define cfg_sgl_pp_align_WORD word14
2629 struct lpfc_mbx_get_sli4_parameters {
2630 struct mbox_header header;
2631 struct lpfc_sli4_parameters sli4_parameters;
2634 struct lpfc_rscr_desc_generic {
2635 #define LPFC_RSRC_DESC_WSIZE 22
2636 uint32_t desc[LPFC_RSRC_DESC_WSIZE];
2639 struct lpfc_rsrc_desc_pcie {
2641 #define lpfc_rsrc_desc_pcie_type_SHIFT 0
2642 #define lpfc_rsrc_desc_pcie_type_MASK 0x000000ff
2643 #define lpfc_rsrc_desc_pcie_type_WORD word0
2644 #define LPFC_RSRC_DESC_TYPE_PCIE 0x40
2645 #define lpfc_rsrc_desc_pcie_length_SHIFT 8
2646 #define lpfc_rsrc_desc_pcie_length_MASK 0x000000ff
2647 #define lpfc_rsrc_desc_pcie_length_WORD word0
2649 #define lpfc_rsrc_desc_pcie_pfnum_SHIFT 0
2650 #define lpfc_rsrc_desc_pcie_pfnum_MASK 0x000000ff
2651 #define lpfc_rsrc_desc_pcie_pfnum_WORD word1
2654 #define lpfc_rsrc_desc_pcie_sriov_sta_SHIFT 0
2655 #define lpfc_rsrc_desc_pcie_sriov_sta_MASK 0x000000ff
2656 #define lpfc_rsrc_desc_pcie_sriov_sta_WORD word3
2657 #define lpfc_rsrc_desc_pcie_pf_sta_SHIFT 8
2658 #define lpfc_rsrc_desc_pcie_pf_sta_MASK 0x000000ff
2659 #define lpfc_rsrc_desc_pcie_pf_sta_WORD word3
2660 #define lpfc_rsrc_desc_pcie_pf_type_SHIFT 16
2661 #define lpfc_rsrc_desc_pcie_pf_type_MASK 0x000000ff
2662 #define lpfc_rsrc_desc_pcie_pf_type_WORD word3
2664 #define lpfc_rsrc_desc_pcie_nr_virtfn_SHIFT 0
2665 #define lpfc_rsrc_desc_pcie_nr_virtfn_MASK 0x0000ffff
2666 #define lpfc_rsrc_desc_pcie_nr_virtfn_WORD word4
2669 struct lpfc_rsrc_desc_fcfcoe {
2671 #define lpfc_rsrc_desc_fcfcoe_type_SHIFT 0
2672 #define lpfc_rsrc_desc_fcfcoe_type_MASK 0x000000ff
2673 #define lpfc_rsrc_desc_fcfcoe_type_WORD word0
2674 #define LPFC_RSRC_DESC_TYPE_FCFCOE 0x43
2675 #define lpfc_rsrc_desc_fcfcoe_length_SHIFT 8
2676 #define lpfc_rsrc_desc_fcfcoe_length_MASK 0x000000ff
2677 #define lpfc_rsrc_desc_fcfcoe_length_WORD word0
2678 #define LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD 0
2679 #define LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH 72
2680 #define LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH 88
2682 #define lpfc_rsrc_desc_fcfcoe_vfnum_SHIFT 0
2683 #define lpfc_rsrc_desc_fcfcoe_vfnum_MASK 0x000000ff
2684 #define lpfc_rsrc_desc_fcfcoe_vfnum_WORD word1
2685 #define lpfc_rsrc_desc_fcfcoe_pfnum_SHIFT 16
2686 #define lpfc_rsrc_desc_fcfcoe_pfnum_MASK 0x000007ff
2687 #define lpfc_rsrc_desc_fcfcoe_pfnum_WORD word1
2689 #define lpfc_rsrc_desc_fcfcoe_rpi_cnt_SHIFT 0
2690 #define lpfc_rsrc_desc_fcfcoe_rpi_cnt_MASK 0x0000ffff
2691 #define lpfc_rsrc_desc_fcfcoe_rpi_cnt_WORD word2
2692 #define lpfc_rsrc_desc_fcfcoe_xri_cnt_SHIFT 16
2693 #define lpfc_rsrc_desc_fcfcoe_xri_cnt_MASK 0x0000ffff
2694 #define lpfc_rsrc_desc_fcfcoe_xri_cnt_WORD word2
2696 #define lpfc_rsrc_desc_fcfcoe_wq_cnt_SHIFT 0
2697 #define lpfc_rsrc_desc_fcfcoe_wq_cnt_MASK 0x0000ffff
2698 #define lpfc_rsrc_desc_fcfcoe_wq_cnt_WORD word3
2699 #define lpfc_rsrc_desc_fcfcoe_rq_cnt_SHIFT 16
2700 #define lpfc_rsrc_desc_fcfcoe_rq_cnt_MASK 0x0000ffff
2701 #define lpfc_rsrc_desc_fcfcoe_rq_cnt_WORD word3
2703 #define lpfc_rsrc_desc_fcfcoe_cq_cnt_SHIFT 0
2704 #define lpfc_rsrc_desc_fcfcoe_cq_cnt_MASK 0x0000ffff
2705 #define lpfc_rsrc_desc_fcfcoe_cq_cnt_WORD word4
2706 #define lpfc_rsrc_desc_fcfcoe_vpi_cnt_SHIFT 16
2707 #define lpfc_rsrc_desc_fcfcoe_vpi_cnt_MASK 0x0000ffff
2708 #define lpfc_rsrc_desc_fcfcoe_vpi_cnt_WORD word4
2710 #define lpfc_rsrc_desc_fcfcoe_fcfi_cnt_SHIFT 0
2711 #define lpfc_rsrc_desc_fcfcoe_fcfi_cnt_MASK 0x0000ffff
2712 #define lpfc_rsrc_desc_fcfcoe_fcfi_cnt_WORD word5
2713 #define lpfc_rsrc_desc_fcfcoe_vfi_cnt_SHIFT 16
2714 #define lpfc_rsrc_desc_fcfcoe_vfi_cnt_MASK 0x0000ffff
2715 #define lpfc_rsrc_desc_fcfcoe_vfi_cnt_WORD word5
2724 #define lpfc_rsrc_desc_fcfcoe_lnk_nr_SHIFT 0
2725 #define lpfc_rsrc_desc_fcfcoe_lnk_nr_MASK 0x0000003f
2726 #define lpfc_rsrc_desc_fcfcoe_lnk_nr_WORD word13
2727 #define lpfc_rsrc_desc_fcfcoe_lnk_tp_SHIFT 6
2728 #define lpfc_rsrc_desc_fcfcoe_lnk_tp_MASK 0x00000003
2729 #define lpfc_rsrc_desc_fcfcoe_lnk_tp_WORD word13
2730 #define lpfc_rsrc_desc_fcfcoe_lmc_SHIFT 8
2731 #define lpfc_rsrc_desc_fcfcoe_lmc_MASK 0x00000001
2732 #define lpfc_rsrc_desc_fcfcoe_lmc_WORD word13
2733 #define lpfc_rsrc_desc_fcfcoe_lld_SHIFT 9
2734 #define lpfc_rsrc_desc_fcfcoe_lld_MASK 0x00000001
2735 #define lpfc_rsrc_desc_fcfcoe_lld_WORD word13
2736 #define lpfc_rsrc_desc_fcfcoe_eq_cnt_SHIFT 16
2737 #define lpfc_rsrc_desc_fcfcoe_eq_cnt_MASK 0x0000ffff
2738 #define lpfc_rsrc_desc_fcfcoe_eq_cnt_WORD word13
2739 /* extended FC/FCoE Resource Descriptor when length = 88 bytes */
2744 uint32_t reserved[4];
2747 struct lpfc_func_cfg {
2748 #define LPFC_RSRC_DESC_MAX_NUM 2
2749 uint32_t rsrc_desc_count;
2750 struct lpfc_rscr_desc_generic desc[LPFC_RSRC_DESC_MAX_NUM];
2753 struct lpfc_mbx_get_func_cfg {
2754 struct mbox_header header;
2755 #define LPFC_CFG_TYPE_PERSISTENT_OVERRIDE 0x0
2756 #define LPFC_CFG_TYPE_FACTURY_DEFAULT 0x1
2757 #define LPFC_CFG_TYPE_CURRENT_ACTIVE 0x2
2758 struct lpfc_func_cfg func_cfg;
2761 struct lpfc_prof_cfg {
2762 #define LPFC_RSRC_DESC_MAX_NUM 2
2763 uint32_t rsrc_desc_count;
2764 struct lpfc_rscr_desc_generic desc[LPFC_RSRC_DESC_MAX_NUM];
2767 struct lpfc_mbx_get_prof_cfg {
2768 struct mbox_header header;
2769 #define LPFC_CFG_TYPE_PERSISTENT_OVERRIDE 0x0
2770 #define LPFC_CFG_TYPE_FACTURY_DEFAULT 0x1
2771 #define LPFC_CFG_TYPE_CURRENT_ACTIVE 0x2
2775 #define lpfc_mbx_get_prof_cfg_prof_id_SHIFT 0
2776 #define lpfc_mbx_get_prof_cfg_prof_id_MASK 0x000000ff
2777 #define lpfc_mbx_get_prof_cfg_prof_id_WORD word10
2778 #define lpfc_mbx_get_prof_cfg_prof_tp_SHIFT 8
2779 #define lpfc_mbx_get_prof_cfg_prof_tp_MASK 0x00000003
2780 #define lpfc_mbx_get_prof_cfg_prof_tp_WORD word10
2783 struct lpfc_prof_cfg prof_cfg;
2788 struct lpfc_controller_attribute {
2789 uint32_t version_string[8];
2790 uint32_t manufacturer_name[8];
2791 uint32_t supported_modes;
2793 #define lpfc_cntl_attr_eprom_ver_lo_SHIFT 0
2794 #define lpfc_cntl_attr_eprom_ver_lo_MASK 0x000000ff
2795 #define lpfc_cntl_attr_eprom_ver_lo_WORD word17
2796 #define lpfc_cntl_attr_eprom_ver_hi_SHIFT 8
2797 #define lpfc_cntl_attr_eprom_ver_hi_MASK 0x000000ff
2798 #define lpfc_cntl_attr_eprom_ver_hi_WORD word17
2799 uint32_t mbx_da_struct_ver;
2800 uint32_t ep_fw_da_struct_ver;
2801 uint32_t ncsi_ver_str[3];
2802 uint32_t dflt_ext_timeout;
2803 uint32_t model_number[8];
2804 uint32_t description[16];
2805 uint32_t serial_number[8];
2806 uint32_t ip_ver_str[8];
2807 uint32_t fw_ver_str[8];
2808 uint32_t bios_ver_str[8];
2809 uint32_t redboot_ver_str[8];
2810 uint32_t driver_ver_str[8];
2811 uint32_t flash_fw_ver_str[8];
2812 uint32_t functionality;
2814 #define lpfc_cntl_attr_max_cbd_len_SHIFT 0
2815 #define lpfc_cntl_attr_max_cbd_len_MASK 0x0000ffff
2816 #define lpfc_cntl_attr_max_cbd_len_WORD word105
2817 #define lpfc_cntl_attr_asic_rev_SHIFT 16
2818 #define lpfc_cntl_attr_asic_rev_MASK 0x000000ff
2819 #define lpfc_cntl_attr_asic_rev_WORD word105
2820 #define lpfc_cntl_attr_gen_guid0_SHIFT 24
2821 #define lpfc_cntl_attr_gen_guid0_MASK 0x000000ff
2822 #define lpfc_cntl_attr_gen_guid0_WORD word105
2823 uint32_t gen_guid1_12[3];
2825 #define lpfc_cntl_attr_gen_guid13_14_SHIFT 0
2826 #define lpfc_cntl_attr_gen_guid13_14_MASK 0x0000ffff
2827 #define lpfc_cntl_attr_gen_guid13_14_WORD word109
2828 #define lpfc_cntl_attr_gen_guid15_SHIFT 16
2829 #define lpfc_cntl_attr_gen_guid15_MASK 0x000000ff
2830 #define lpfc_cntl_attr_gen_guid15_WORD word109
2831 #define lpfc_cntl_attr_hba_port_cnt_SHIFT 24
2832 #define lpfc_cntl_attr_hba_port_cnt_MASK 0x000000ff
2833 #define lpfc_cntl_attr_hba_port_cnt_WORD word109
2835 #define lpfc_cntl_attr_dflt_lnk_tmo_SHIFT 0
2836 #define lpfc_cntl_attr_dflt_lnk_tmo_MASK 0x0000ffff
2837 #define lpfc_cntl_attr_dflt_lnk_tmo_WORD word110
2838 #define lpfc_cntl_attr_multi_func_dev_SHIFT 24
2839 #define lpfc_cntl_attr_multi_func_dev_MASK 0x000000ff
2840 #define lpfc_cntl_attr_multi_func_dev_WORD word110
2842 #define lpfc_cntl_attr_cache_valid_SHIFT 0
2843 #define lpfc_cntl_attr_cache_valid_MASK 0x000000ff
2844 #define lpfc_cntl_attr_cache_valid_WORD word111
2845 #define lpfc_cntl_attr_hba_status_SHIFT 8
2846 #define lpfc_cntl_attr_hba_status_MASK 0x000000ff
2847 #define lpfc_cntl_attr_hba_status_WORD word111
2848 #define lpfc_cntl_attr_max_domain_SHIFT 16
2849 #define lpfc_cntl_attr_max_domain_MASK 0x000000ff
2850 #define lpfc_cntl_attr_max_domain_WORD word111
2851 #define lpfc_cntl_attr_lnk_numb_SHIFT 24
2852 #define lpfc_cntl_attr_lnk_numb_MASK 0x0000003f
2853 #define lpfc_cntl_attr_lnk_numb_WORD word111
2854 #define lpfc_cntl_attr_lnk_type_SHIFT 30
2855 #define lpfc_cntl_attr_lnk_type_MASK 0x00000003
2856 #define lpfc_cntl_attr_lnk_type_WORD word111
2857 uint32_t fw_post_status;
2858 uint32_t hba_mtu[8];
2860 uint32_t reserved1[3];
2862 #define lpfc_cntl_attr_pci_vendor_id_SHIFT 0
2863 #define lpfc_cntl_attr_pci_vendor_id_MASK 0x0000ffff
2864 #define lpfc_cntl_attr_pci_vendor_id_WORD word125
2865 #define lpfc_cntl_attr_pci_device_id_SHIFT 16
2866 #define lpfc_cntl_attr_pci_device_id_MASK 0x0000ffff
2867 #define lpfc_cntl_attr_pci_device_id_WORD word125
2869 #define lpfc_cntl_attr_pci_subvdr_id_SHIFT 0
2870 #define lpfc_cntl_attr_pci_subvdr_id_MASK 0x0000ffff
2871 #define lpfc_cntl_attr_pci_subvdr_id_WORD word126
2872 #define lpfc_cntl_attr_pci_subsys_id_SHIFT 16
2873 #define lpfc_cntl_attr_pci_subsys_id_MASK 0x0000ffff
2874 #define lpfc_cntl_attr_pci_subsys_id_WORD word126
2876 #define lpfc_cntl_attr_pci_bus_num_SHIFT 0
2877 #define lpfc_cntl_attr_pci_bus_num_MASK 0x000000ff
2878 #define lpfc_cntl_attr_pci_bus_num_WORD word127
2879 #define lpfc_cntl_attr_pci_dev_num_SHIFT 8
2880 #define lpfc_cntl_attr_pci_dev_num_MASK 0x000000ff
2881 #define lpfc_cntl_attr_pci_dev_num_WORD word127
2882 #define lpfc_cntl_attr_pci_fnc_num_SHIFT 16
2883 #define lpfc_cntl_attr_pci_fnc_num_MASK 0x000000ff
2884 #define lpfc_cntl_attr_pci_fnc_num_WORD word127
2885 #define lpfc_cntl_attr_inf_type_SHIFT 24
2886 #define lpfc_cntl_attr_inf_type_MASK 0x000000ff
2887 #define lpfc_cntl_attr_inf_type_WORD word127
2888 uint32_t unique_id[2];
2890 #define lpfc_cntl_attr_num_netfil_SHIFT 0
2891 #define lpfc_cntl_attr_num_netfil_MASK 0x000000ff
2892 #define lpfc_cntl_attr_num_netfil_WORD word130
2893 uint32_t reserved2[4];
2896 struct lpfc_mbx_get_cntl_attributes {
2897 union lpfc_sli4_cfg_shdr cfg_shdr;
2898 struct lpfc_controller_attribute cntl_attr;
2901 struct lpfc_mbx_get_port_name {
2902 struct mbox_header header;
2906 #define lpfc_mbx_get_port_name_lnk_type_SHIFT 0
2907 #define lpfc_mbx_get_port_name_lnk_type_MASK 0x00000003
2908 #define lpfc_mbx_get_port_name_lnk_type_WORD word4
2912 #define lpfc_mbx_get_port_name_name0_SHIFT 0
2913 #define lpfc_mbx_get_port_name_name0_MASK 0x000000FF
2914 #define lpfc_mbx_get_port_name_name0_WORD word4
2915 #define lpfc_mbx_get_port_name_name1_SHIFT 8
2916 #define lpfc_mbx_get_port_name_name1_MASK 0x000000FF
2917 #define lpfc_mbx_get_port_name_name1_WORD word4
2918 #define lpfc_mbx_get_port_name_name2_SHIFT 16
2919 #define lpfc_mbx_get_port_name_name2_MASK 0x000000FF
2920 #define lpfc_mbx_get_port_name_name2_WORD word4
2921 #define lpfc_mbx_get_port_name_name3_SHIFT 24
2922 #define lpfc_mbx_get_port_name_name3_MASK 0x000000FF
2923 #define lpfc_mbx_get_port_name_name3_WORD word4
2924 #define LPFC_LINK_NUMBER_0 0
2925 #define LPFC_LINK_NUMBER_1 1
2926 #define LPFC_LINK_NUMBER_2 2
2927 #define LPFC_LINK_NUMBER_3 3
2932 /* Mailbox Completion Queue Error Messages */
2933 #define MB_CQE_STATUS_SUCCESS 0x0
2934 #define MB_CQE_STATUS_INSUFFICIENT_PRIVILEGES 0x1
2935 #define MB_CQE_STATUS_INVALID_PARAMETER 0x2
2936 #define MB_CQE_STATUS_INSUFFICIENT_RESOURCES 0x3
2937 #define MB_CEQ_STATUS_QUEUE_FLUSHING 0x4
2938 #define MB_CQE_STATUS_DMA_FAILED 0x5
2940 #define LPFC_MBX_WR_CONFIG_MAX_BDE 8
2941 struct lpfc_mbx_wr_object {
2942 struct mbox_header header;
2946 #define lpfc_wr_object_eof_SHIFT 31
2947 #define lpfc_wr_object_eof_MASK 0x00000001
2948 #define lpfc_wr_object_eof_WORD word4
2949 #define lpfc_wr_object_write_length_SHIFT 0
2950 #define lpfc_wr_object_write_length_MASK 0x00FFFFFF
2951 #define lpfc_wr_object_write_length_WORD word4
2952 uint32_t write_offset;
2953 uint32_t object_name[26];
2955 struct ulp_bde64 bde[LPFC_MBX_WR_CONFIG_MAX_BDE];
2958 uint32_t actual_write_length;
2963 /* mailbox queue entry structure */
2966 #define lpfc_mqe_status_SHIFT 16
2967 #define lpfc_mqe_status_MASK 0x0000FFFF
2968 #define lpfc_mqe_status_WORD word0
2969 #define lpfc_mqe_command_SHIFT 8
2970 #define lpfc_mqe_command_MASK 0x000000FF
2971 #define lpfc_mqe_command_WORD word0
2973 uint32_t mb_words[LPFC_SLI4_MB_WORD_COUNT - 1];
2974 /* sli4 mailbox commands */
2975 struct lpfc_mbx_sli4_config sli4_config;
2976 struct lpfc_mbx_init_vfi init_vfi;
2977 struct lpfc_mbx_reg_vfi reg_vfi;
2978 struct lpfc_mbx_reg_vfi unreg_vfi;
2979 struct lpfc_mbx_init_vpi init_vpi;
2980 struct lpfc_mbx_resume_rpi resume_rpi;
2981 struct lpfc_mbx_read_fcf_tbl read_fcf_tbl;
2982 struct lpfc_mbx_add_fcf_tbl_entry add_fcf_entry;
2983 struct lpfc_mbx_del_fcf_tbl_entry del_fcf_entry;
2984 struct lpfc_mbx_redisc_fcf_tbl redisc_fcf_tbl;
2985 struct lpfc_mbx_reg_fcfi reg_fcfi;
2986 struct lpfc_mbx_unreg_fcfi unreg_fcfi;
2987 struct lpfc_mbx_mq_create mq_create;
2988 struct lpfc_mbx_mq_create_ext mq_create_ext;
2989 struct lpfc_mbx_eq_create eq_create;
2990 struct lpfc_mbx_modify_eq_delay eq_delay;
2991 struct lpfc_mbx_cq_create cq_create;
2992 struct lpfc_mbx_wq_create wq_create;
2993 struct lpfc_mbx_rq_create rq_create;
2994 struct lpfc_mbx_mq_destroy mq_destroy;
2995 struct lpfc_mbx_eq_destroy eq_destroy;
2996 struct lpfc_mbx_cq_destroy cq_destroy;
2997 struct lpfc_mbx_wq_destroy wq_destroy;
2998 struct lpfc_mbx_rq_destroy rq_destroy;
2999 struct lpfc_mbx_get_rsrc_extent_info rsrc_extent_info;
3000 struct lpfc_mbx_alloc_rsrc_extents alloc_rsrc_extents;
3001 struct lpfc_mbx_dealloc_rsrc_extents dealloc_rsrc_extents;
3002 struct lpfc_mbx_post_sgl_pages post_sgl_pages;
3003 struct lpfc_mbx_nembed_cmd nembed_cmd;
3004 struct lpfc_mbx_read_rev read_rev;
3005 struct lpfc_mbx_read_vpi read_vpi;
3006 struct lpfc_mbx_read_config rd_config;
3007 struct lpfc_mbx_request_features req_ftrs;
3008 struct lpfc_mbx_post_hdr_tmpl hdr_tmpl;
3009 struct lpfc_mbx_query_fw_config query_fw_cfg;
3010 struct lpfc_mbx_supp_pages supp_pages;
3011 struct lpfc_mbx_pc_sli4_params sli4_params;
3012 struct lpfc_mbx_get_sli4_parameters get_sli4_parameters;
3013 struct lpfc_mbx_set_link_diag_state link_diag_state;
3014 struct lpfc_mbx_set_link_diag_loopback link_diag_loopback;
3015 struct lpfc_mbx_run_link_diag_test link_diag_test;
3016 struct lpfc_mbx_get_func_cfg get_func_cfg;
3017 struct lpfc_mbx_get_prof_cfg get_prof_cfg;
3018 struct lpfc_mbx_wr_object wr_object;
3019 struct lpfc_mbx_get_port_name get_port_name;
3020 struct lpfc_mbx_nop nop;
3026 #define lpfc_mcqe_status_SHIFT 0
3027 #define lpfc_mcqe_status_MASK 0x0000FFFF
3028 #define lpfc_mcqe_status_WORD word0
3029 #define lpfc_mcqe_ext_status_SHIFT 16
3030 #define lpfc_mcqe_ext_status_MASK 0x0000FFFF
3031 #define lpfc_mcqe_ext_status_WORD word0
3035 #define lpfc_trailer_valid_SHIFT 31
3036 #define lpfc_trailer_valid_MASK 0x00000001
3037 #define lpfc_trailer_valid_WORD trailer
3038 #define lpfc_trailer_async_SHIFT 30
3039 #define lpfc_trailer_async_MASK 0x00000001
3040 #define lpfc_trailer_async_WORD trailer
3041 #define lpfc_trailer_hpi_SHIFT 29
3042 #define lpfc_trailer_hpi_MASK 0x00000001
3043 #define lpfc_trailer_hpi_WORD trailer
3044 #define lpfc_trailer_completed_SHIFT 28
3045 #define lpfc_trailer_completed_MASK 0x00000001
3046 #define lpfc_trailer_completed_WORD trailer
3047 #define lpfc_trailer_consumed_SHIFT 27
3048 #define lpfc_trailer_consumed_MASK 0x00000001
3049 #define lpfc_trailer_consumed_WORD trailer
3050 #define lpfc_trailer_type_SHIFT 16
3051 #define lpfc_trailer_type_MASK 0x000000FF
3052 #define lpfc_trailer_type_WORD trailer
3053 #define lpfc_trailer_code_SHIFT 8
3054 #define lpfc_trailer_code_MASK 0x000000FF
3055 #define lpfc_trailer_code_WORD trailer
3056 #define LPFC_TRAILER_CODE_LINK 0x1
3057 #define LPFC_TRAILER_CODE_FCOE 0x2
3058 #define LPFC_TRAILER_CODE_DCBX 0x3
3059 #define LPFC_TRAILER_CODE_GRP5 0x5
3060 #define LPFC_TRAILER_CODE_FC 0x10
3061 #define LPFC_TRAILER_CODE_SLI 0x11
3064 struct lpfc_acqe_link {
3066 #define lpfc_acqe_link_speed_SHIFT 24
3067 #define lpfc_acqe_link_speed_MASK 0x000000FF
3068 #define lpfc_acqe_link_speed_WORD word0
3069 #define LPFC_ASYNC_LINK_SPEED_ZERO 0x0
3070 #define LPFC_ASYNC_LINK_SPEED_10MBPS 0x1
3071 #define LPFC_ASYNC_LINK_SPEED_100MBPS 0x2
3072 #define LPFC_ASYNC_LINK_SPEED_1GBPS 0x3
3073 #define LPFC_ASYNC_LINK_SPEED_10GBPS 0x4
3074 #define lpfc_acqe_link_duplex_SHIFT 16
3075 #define lpfc_acqe_link_duplex_MASK 0x000000FF
3076 #define lpfc_acqe_link_duplex_WORD word0
3077 #define LPFC_ASYNC_LINK_DUPLEX_NONE 0x0
3078 #define LPFC_ASYNC_LINK_DUPLEX_HALF 0x1
3079 #define LPFC_ASYNC_LINK_DUPLEX_FULL 0x2
3080 #define lpfc_acqe_link_status_SHIFT 8
3081 #define lpfc_acqe_link_status_MASK 0x000000FF
3082 #define lpfc_acqe_link_status_WORD word0
3083 #define LPFC_ASYNC_LINK_STATUS_DOWN 0x0
3084 #define LPFC_ASYNC_LINK_STATUS_UP 0x1
3085 #define LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN 0x2
3086 #define LPFC_ASYNC_LINK_STATUS_LOGICAL_UP 0x3
3087 #define lpfc_acqe_link_type_SHIFT 6
3088 #define lpfc_acqe_link_type_MASK 0x00000003
3089 #define lpfc_acqe_link_type_WORD word0
3090 #define lpfc_acqe_link_number_SHIFT 0
3091 #define lpfc_acqe_link_number_MASK 0x0000003F
3092 #define lpfc_acqe_link_number_WORD word0
3094 #define lpfc_acqe_link_fault_SHIFT 0
3095 #define lpfc_acqe_link_fault_MASK 0x000000FF
3096 #define lpfc_acqe_link_fault_WORD word1
3097 #define LPFC_ASYNC_LINK_FAULT_NONE 0x0
3098 #define LPFC_ASYNC_LINK_FAULT_LOCAL 0x1
3099 #define LPFC_ASYNC_LINK_FAULT_REMOTE 0x2
3100 #define lpfc_acqe_logical_link_speed_SHIFT 16
3101 #define lpfc_acqe_logical_link_speed_MASK 0x0000FFFF
3102 #define lpfc_acqe_logical_link_speed_WORD word1
3105 #define LPFC_LINK_EVENT_TYPE_PHYSICAL 0x0
3106 #define LPFC_LINK_EVENT_TYPE_VIRTUAL 0x1
3109 struct lpfc_acqe_fip {
3112 #define lpfc_acqe_fip_fcf_count_SHIFT 0
3113 #define lpfc_acqe_fip_fcf_count_MASK 0x0000FFFF
3114 #define lpfc_acqe_fip_fcf_count_WORD word1
3115 #define lpfc_acqe_fip_event_type_SHIFT 16
3116 #define lpfc_acqe_fip_event_type_MASK 0x0000FFFF
3117 #define lpfc_acqe_fip_event_type_WORD word1
3120 #define LPFC_FIP_EVENT_TYPE_NEW_FCF 0x1
3121 #define LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL 0x2
3122 #define LPFC_FIP_EVENT_TYPE_FCF_DEAD 0x3
3123 #define LPFC_FIP_EVENT_TYPE_CVL 0x4
3124 #define LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD 0x5
3127 struct lpfc_acqe_dcbx {
3134 struct lpfc_acqe_grp5 {
3136 #define lpfc_acqe_grp5_type_SHIFT 6
3137 #define lpfc_acqe_grp5_type_MASK 0x00000003
3138 #define lpfc_acqe_grp5_type_WORD word0
3139 #define lpfc_acqe_grp5_number_SHIFT 0
3140 #define lpfc_acqe_grp5_number_MASK 0x0000003F
3141 #define lpfc_acqe_grp5_number_WORD word0
3143 #define lpfc_acqe_grp5_llink_spd_SHIFT 16
3144 #define lpfc_acqe_grp5_llink_spd_MASK 0x0000FFFF
3145 #define lpfc_acqe_grp5_llink_spd_WORD word1
3150 struct lpfc_acqe_fc_la {
3152 #define lpfc_acqe_fc_la_speed_SHIFT 24
3153 #define lpfc_acqe_fc_la_speed_MASK 0x000000FF
3154 #define lpfc_acqe_fc_la_speed_WORD word0
3155 #define LPFC_FC_LA_SPEED_UNKOWN 0x0
3156 #define LPFC_FC_LA_SPEED_1G 0x1
3157 #define LPFC_FC_LA_SPEED_2G 0x2
3158 #define LPFC_FC_LA_SPEED_4G 0x4
3159 #define LPFC_FC_LA_SPEED_8G 0x8
3160 #define LPFC_FC_LA_SPEED_10G 0xA
3161 #define LPFC_FC_LA_SPEED_16G 0x10
3162 #define lpfc_acqe_fc_la_topology_SHIFT 16
3163 #define lpfc_acqe_fc_la_topology_MASK 0x000000FF
3164 #define lpfc_acqe_fc_la_topology_WORD word0
3165 #define LPFC_FC_LA_TOP_UNKOWN 0x0
3166 #define LPFC_FC_LA_TOP_P2P 0x1
3167 #define LPFC_FC_LA_TOP_FCAL 0x2
3168 #define LPFC_FC_LA_TOP_INTERNAL_LOOP 0x3
3169 #define LPFC_FC_LA_TOP_SERDES_LOOP 0x4
3170 #define lpfc_acqe_fc_la_att_type_SHIFT 8
3171 #define lpfc_acqe_fc_la_att_type_MASK 0x000000FF
3172 #define lpfc_acqe_fc_la_att_type_WORD word0
3173 #define LPFC_FC_LA_TYPE_LINK_UP 0x1
3174 #define LPFC_FC_LA_TYPE_LINK_DOWN 0x2
3175 #define LPFC_FC_LA_TYPE_NO_HARD_ALPA 0x3
3176 #define lpfc_acqe_fc_la_port_type_SHIFT 6
3177 #define lpfc_acqe_fc_la_port_type_MASK 0x00000003
3178 #define lpfc_acqe_fc_la_port_type_WORD word0
3179 #define LPFC_LINK_TYPE_ETHERNET 0x0
3180 #define LPFC_LINK_TYPE_FC 0x1
3181 #define lpfc_acqe_fc_la_port_number_SHIFT 0
3182 #define lpfc_acqe_fc_la_port_number_MASK 0x0000003F
3183 #define lpfc_acqe_fc_la_port_number_WORD word0
3185 #define lpfc_acqe_fc_la_llink_spd_SHIFT 16
3186 #define lpfc_acqe_fc_la_llink_spd_MASK 0x0000FFFF
3187 #define lpfc_acqe_fc_la_llink_spd_WORD word1
3188 #define lpfc_acqe_fc_la_fault_SHIFT 0
3189 #define lpfc_acqe_fc_la_fault_MASK 0x000000FF
3190 #define lpfc_acqe_fc_la_fault_WORD word1
3191 #define LPFC_FC_LA_FAULT_NONE 0x0
3192 #define LPFC_FC_LA_FAULT_LOCAL 0x1
3193 #define LPFC_FC_LA_FAULT_REMOTE 0x2
3196 #define LPFC_FC_LA_EVENT_TYPE_FC_LINK 0x1
3197 #define LPFC_FC_LA_EVENT_TYPE_SHARED_LINK 0x2
3200 struct lpfc_acqe_misconfigured_event {
3203 #define lpfc_sli_misconfigured_port0_SHIFT 0
3204 #define lpfc_sli_misconfigured_port0_MASK 0x000000FF
3205 #define lpfc_sli_misconfigured_port0_WORD word0
3206 #define lpfc_sli_misconfigured_port1_SHIFT 8
3207 #define lpfc_sli_misconfigured_port1_MASK 0x000000FF
3208 #define lpfc_sli_misconfigured_port1_WORD word0
3209 #define lpfc_sli_misconfigured_port2_SHIFT 16
3210 #define lpfc_sli_misconfigured_port2_MASK 0x000000FF
3211 #define lpfc_sli_misconfigured_port2_WORD word0
3212 #define lpfc_sli_misconfigured_port3_SHIFT 24
3213 #define lpfc_sli_misconfigured_port3_MASK 0x000000FF
3214 #define lpfc_sli_misconfigured_port3_WORD word0
3216 #define LPFC_SLI_EVENT_STATUS_VALID 0x00
3217 #define LPFC_SLI_EVENT_STATUS_NOT_PRESENT 0x01
3218 #define LPFC_SLI_EVENT_STATUS_WRONG_TYPE 0x02
3219 #define LPFC_SLI_EVENT_STATUS_UNSUPPORTED 0x03
3222 struct lpfc_acqe_sli {
3223 uint32_t event_data1;
3224 uint32_t event_data2;
3227 #define LPFC_SLI_EVENT_TYPE_PORT_ERROR 0x1
3228 #define LPFC_SLI_EVENT_TYPE_OVER_TEMP 0x2
3229 #define LPFC_SLI_EVENT_TYPE_NORM_TEMP 0x3
3230 #define LPFC_SLI_EVENT_TYPE_NVLOG_POST 0x4
3231 #define LPFC_SLI_EVENT_TYPE_DIAG_DUMP 0x5
3232 #define LPFC_SLI_EVENT_TYPE_MISCONFIGURED 0x9
3236 * Define the bootstrap mailbox (bmbx) region used to communicate
3237 * mailbox command between the host and port. The mailbox consists
3238 * of a payload area of 256 bytes and a completion queue of length
3241 struct lpfc_bmbx_create {
3242 struct lpfc_mqe mqe;
3243 struct lpfc_mcqe mcqe;
3246 #define SGL_ALIGN_SZ 64
3247 #define SGL_PAGE_SIZE 4096
3248 /* align SGL addr on a size boundary - adjust address up */
3249 #define NO_XRI 0xffff
3253 #define wqe_xri_tag_SHIFT 0
3254 #define wqe_xri_tag_MASK 0x0000FFFF
3255 #define wqe_xri_tag_WORD word6
3256 #define wqe_ctxt_tag_SHIFT 16
3257 #define wqe_ctxt_tag_MASK 0x0000FFFF
3258 #define wqe_ctxt_tag_WORD word6
3260 #define wqe_dif_SHIFT 0
3261 #define wqe_dif_MASK 0x00000003
3262 #define wqe_dif_WORD word7
3263 #define LPFC_WQE_DIF_PASSTHRU 1
3264 #define LPFC_WQE_DIF_STRIP 2
3265 #define LPFC_WQE_DIF_INSERT 3
3266 #define wqe_ct_SHIFT 2
3267 #define wqe_ct_MASK 0x00000003
3268 #define wqe_ct_WORD word7
3269 #define wqe_status_SHIFT 4
3270 #define wqe_status_MASK 0x0000000f
3271 #define wqe_status_WORD word7
3272 #define wqe_cmnd_SHIFT 8
3273 #define wqe_cmnd_MASK 0x000000ff
3274 #define wqe_cmnd_WORD word7
3275 #define wqe_class_SHIFT 16
3276 #define wqe_class_MASK 0x00000007
3277 #define wqe_class_WORD word7
3278 #define wqe_ar_SHIFT 19
3279 #define wqe_ar_MASK 0x00000001
3280 #define wqe_ar_WORD word7
3281 #define wqe_ag_SHIFT wqe_ar_SHIFT
3282 #define wqe_ag_MASK wqe_ar_MASK
3283 #define wqe_ag_WORD wqe_ar_WORD
3284 #define wqe_pu_SHIFT 20
3285 #define wqe_pu_MASK 0x00000003
3286 #define wqe_pu_WORD word7
3287 #define wqe_erp_SHIFT 22
3288 #define wqe_erp_MASK 0x00000001
3289 #define wqe_erp_WORD word7
3290 #define wqe_conf_SHIFT wqe_erp_SHIFT
3291 #define wqe_conf_MASK wqe_erp_MASK
3292 #define wqe_conf_WORD wqe_erp_WORD
3293 #define wqe_lnk_SHIFT 23
3294 #define wqe_lnk_MASK 0x00000001
3295 #define wqe_lnk_WORD word7
3296 #define wqe_tmo_SHIFT 24
3297 #define wqe_tmo_MASK 0x000000ff
3298 #define wqe_tmo_WORD word7
3299 uint32_t abort_tag; /* word 8 in WQE */
3301 #define wqe_reqtag_SHIFT 0
3302 #define wqe_reqtag_MASK 0x0000FFFF
3303 #define wqe_reqtag_WORD word9
3304 #define wqe_temp_rpi_SHIFT 16
3305 #define wqe_temp_rpi_MASK 0x0000FFFF
3306 #define wqe_temp_rpi_WORD word9
3307 #define wqe_rcvoxid_SHIFT 16
3308 #define wqe_rcvoxid_MASK 0x0000FFFF
3309 #define wqe_rcvoxid_WORD word9
3311 #define wqe_ebde_cnt_SHIFT 0
3312 #define wqe_ebde_cnt_MASK 0x0000000f
3313 #define wqe_ebde_cnt_WORD word10
3314 #define wqe_lenloc_SHIFT 7
3315 #define wqe_lenloc_MASK 0x00000003
3316 #define wqe_lenloc_WORD word10
3317 #define LPFC_WQE_LENLOC_NONE 0
3318 #define LPFC_WQE_LENLOC_WORD3 1
3319 #define LPFC_WQE_LENLOC_WORD12 2
3320 #define LPFC_WQE_LENLOC_WORD4 3
3321 #define wqe_qosd_SHIFT 9
3322 #define wqe_qosd_MASK 0x00000001
3323 #define wqe_qosd_WORD word10
3324 #define wqe_xbl_SHIFT 11
3325 #define wqe_xbl_MASK 0x00000001
3326 #define wqe_xbl_WORD word10
3327 #define wqe_iod_SHIFT 13
3328 #define wqe_iod_MASK 0x00000001
3329 #define wqe_iod_WORD word10
3330 #define LPFC_WQE_IOD_WRITE 0
3331 #define LPFC_WQE_IOD_READ 1
3332 #define wqe_dbde_SHIFT 14
3333 #define wqe_dbde_MASK 0x00000001
3334 #define wqe_dbde_WORD word10
3335 #define wqe_wqes_SHIFT 15
3336 #define wqe_wqes_MASK 0x00000001
3337 #define wqe_wqes_WORD word10
3338 /* Note that this field overlaps above fields */
3339 #define wqe_wqid_SHIFT 1
3340 #define wqe_wqid_MASK 0x00007fff
3341 #define wqe_wqid_WORD word10
3342 #define wqe_pri_SHIFT 16
3343 #define wqe_pri_MASK 0x00000007
3344 #define wqe_pri_WORD word10
3345 #define wqe_pv_SHIFT 19
3346 #define wqe_pv_MASK 0x00000001
3347 #define wqe_pv_WORD word10
3348 #define wqe_xc_SHIFT 21
3349 #define wqe_xc_MASK 0x00000001
3350 #define wqe_xc_WORD word10
3351 #define wqe_sr_SHIFT 22
3352 #define wqe_sr_MASK 0x00000001
3353 #define wqe_sr_WORD word10
3354 #define wqe_ccpe_SHIFT 23
3355 #define wqe_ccpe_MASK 0x00000001
3356 #define wqe_ccpe_WORD word10
3357 #define wqe_ccp_SHIFT 24
3358 #define wqe_ccp_MASK 0x000000ff
3359 #define wqe_ccp_WORD word10
3361 #define wqe_cmd_type_SHIFT 0
3362 #define wqe_cmd_type_MASK 0x0000000f
3363 #define wqe_cmd_type_WORD word11
3364 #define wqe_els_id_SHIFT 4
3365 #define wqe_els_id_MASK 0x00000003
3366 #define wqe_els_id_WORD word11
3367 #define LPFC_ELS_ID_FLOGI 3
3368 #define LPFC_ELS_ID_FDISC 2
3369 #define LPFC_ELS_ID_LOGO 1
3370 #define LPFC_ELS_ID_DEFAULT 0
3371 #define wqe_wqec_SHIFT 7
3372 #define wqe_wqec_MASK 0x00000001
3373 #define wqe_wqec_WORD word11
3374 #define wqe_cqid_SHIFT 16
3375 #define wqe_cqid_MASK 0x0000ffff
3376 #define wqe_cqid_WORD word11
3377 #define LPFC_WQE_CQ_ID_DEFAULT 0xffff
3382 #define wqe_els_did_SHIFT 0
3383 #define wqe_els_did_MASK 0x00FFFFFF
3384 #define wqe_els_did_WORD word5
3385 #define wqe_xmit_bls_pt_SHIFT 28
3386 #define wqe_xmit_bls_pt_MASK 0x00000003
3387 #define wqe_xmit_bls_pt_WORD word5
3388 #define wqe_xmit_bls_ar_SHIFT 30
3389 #define wqe_xmit_bls_ar_MASK 0x00000001
3390 #define wqe_xmit_bls_ar_WORD word5
3391 #define wqe_xmit_bls_xo_SHIFT 31
3392 #define wqe_xmit_bls_xo_MASK 0x00000001
3393 #define wqe_xmit_bls_xo_WORD word5
3396 struct lpfc_wqe_generic{
3397 struct ulp_bde64 bde;
3401 struct wqe_common wqe_com;
3402 uint32_t payload[4];
3405 struct els_request64_wqe {
3406 struct ulp_bde64 bde;
3407 uint32_t payload_len;
3409 #define els_req64_sid_SHIFT 0
3410 #define els_req64_sid_MASK 0x00FFFFFF
3411 #define els_req64_sid_WORD word4
3412 #define els_req64_sp_SHIFT 24
3413 #define els_req64_sp_MASK 0x00000001
3414 #define els_req64_sp_WORD word4
3415 #define els_req64_vf_SHIFT 25
3416 #define els_req64_vf_MASK 0x00000001
3417 #define els_req64_vf_WORD word4
3418 struct wqe_did wqe_dest;
3419 struct wqe_common wqe_com; /* words 6-11 */
3421 #define els_req64_vfid_SHIFT 1
3422 #define els_req64_vfid_MASK 0x00000FFF
3423 #define els_req64_vfid_WORD word12
3424 #define els_req64_pri_SHIFT 13
3425 #define els_req64_pri_MASK 0x00000007
3426 #define els_req64_pri_WORD word12
3428 #define els_req64_hopcnt_SHIFT 24
3429 #define els_req64_hopcnt_MASK 0x000000ff
3430 #define els_req64_hopcnt_WORD word13
3431 uint32_t reserved[2];
3434 struct xmit_els_rsp64_wqe {
3435 struct ulp_bde64 bde;
3436 uint32_t response_payload_len;
3438 #define els_rsp64_sid_SHIFT 0
3439 #define els_rsp64_sid_MASK 0x00FFFFFF
3440 #define els_rsp64_sid_WORD word4
3441 #define els_rsp64_sp_SHIFT 24
3442 #define els_rsp64_sp_MASK 0x00000001
3443 #define els_rsp64_sp_WORD word4
3444 struct wqe_did wqe_dest;
3445 struct wqe_common wqe_com; /* words 6-11 */
3447 #define wqe_rsp_temp_rpi_SHIFT 0
3448 #define wqe_rsp_temp_rpi_MASK 0x0000FFFF
3449 #define wqe_rsp_temp_rpi_WORD word12
3450 uint32_t rsvd_13_15[3];
3453 struct xmit_bls_rsp64_wqe {
3455 /* Payload0 for BA_ACC */
3456 #define xmit_bls_rsp64_acc_seq_id_SHIFT 16
3457 #define xmit_bls_rsp64_acc_seq_id_MASK 0x000000ff
3458 #define xmit_bls_rsp64_acc_seq_id_WORD payload0
3459 #define xmit_bls_rsp64_acc_seq_id_vald_SHIFT 24
3460 #define xmit_bls_rsp64_acc_seq_id_vald_MASK 0x000000ff
3461 #define xmit_bls_rsp64_acc_seq_id_vald_WORD payload0
3462 /* Payload0 for BA_RJT */
3463 #define xmit_bls_rsp64_rjt_vspec_SHIFT 0
3464 #define xmit_bls_rsp64_rjt_vspec_MASK 0x000000ff
3465 #define xmit_bls_rsp64_rjt_vspec_WORD payload0
3466 #define xmit_bls_rsp64_rjt_expc_SHIFT 8
3467 #define xmit_bls_rsp64_rjt_expc_MASK 0x000000ff
3468 #define xmit_bls_rsp64_rjt_expc_WORD payload0
3469 #define xmit_bls_rsp64_rjt_rsnc_SHIFT 16
3470 #define xmit_bls_rsp64_rjt_rsnc_MASK 0x000000ff
3471 #define xmit_bls_rsp64_rjt_rsnc_WORD payload0
3473 #define xmit_bls_rsp64_rxid_SHIFT 0
3474 #define xmit_bls_rsp64_rxid_MASK 0x0000ffff
3475 #define xmit_bls_rsp64_rxid_WORD word1
3476 #define xmit_bls_rsp64_oxid_SHIFT 16
3477 #define xmit_bls_rsp64_oxid_MASK 0x0000ffff
3478 #define xmit_bls_rsp64_oxid_WORD word1
3480 #define xmit_bls_rsp64_seqcnthi_SHIFT 0
3481 #define xmit_bls_rsp64_seqcnthi_MASK 0x0000ffff
3482 #define xmit_bls_rsp64_seqcnthi_WORD word2
3483 #define xmit_bls_rsp64_seqcntlo_SHIFT 16
3484 #define xmit_bls_rsp64_seqcntlo_MASK 0x0000ffff
3485 #define xmit_bls_rsp64_seqcntlo_WORD word2
3488 struct wqe_did wqe_dest;
3489 struct wqe_common wqe_com; /* words 6-11 */
3491 #define xmit_bls_rsp64_temprpi_SHIFT 0
3492 #define xmit_bls_rsp64_temprpi_MASK 0x0000ffff
3493 #define xmit_bls_rsp64_temprpi_WORD word12
3494 uint32_t rsvd_13_15[3];
3497 struct wqe_rctl_dfctl {
3499 #define wqe_si_SHIFT 2
3500 #define wqe_si_MASK 0x000000001
3501 #define wqe_si_WORD word5
3502 #define wqe_la_SHIFT 3
3503 #define wqe_la_MASK 0x000000001
3504 #define wqe_la_WORD word5
3505 #define wqe_xo_SHIFT 6
3506 #define wqe_xo_MASK 0x000000001
3507 #define wqe_xo_WORD word5
3508 #define wqe_ls_SHIFT 7
3509 #define wqe_ls_MASK 0x000000001
3510 #define wqe_ls_WORD word5
3511 #define wqe_dfctl_SHIFT 8
3512 #define wqe_dfctl_MASK 0x0000000ff
3513 #define wqe_dfctl_WORD word5
3514 #define wqe_type_SHIFT 16
3515 #define wqe_type_MASK 0x0000000ff
3516 #define wqe_type_WORD word5
3517 #define wqe_rctl_SHIFT 24
3518 #define wqe_rctl_MASK 0x0000000ff
3519 #define wqe_rctl_WORD word5
3522 struct xmit_seq64_wqe {
3523 struct ulp_bde64 bde;
3525 uint32_t relative_offset;
3526 struct wqe_rctl_dfctl wge_ctl;
3527 struct wqe_common wqe_com; /* words 6-11 */
3529 uint32_t rsvd_12_15[3];
3531 struct xmit_bcast64_wqe {
3532 struct ulp_bde64 bde;
3533 uint32_t seq_payload_len;
3535 struct wqe_rctl_dfctl wge_ctl; /* word 5 */
3536 struct wqe_common wqe_com; /* words 6-11 */
3537 uint32_t rsvd_12_15[4];
3540 struct gen_req64_wqe {
3541 struct ulp_bde64 bde;
3542 uint32_t request_payload_len;
3543 uint32_t relative_offset;
3544 struct wqe_rctl_dfctl wge_ctl; /* word 5 */
3545 struct wqe_common wqe_com; /* words 6-11 */
3546 uint32_t rsvd_12_15[4];
3549 struct create_xri_wqe {
3550 uint32_t rsrvd[5]; /* words 0-4 */
3551 struct wqe_did wqe_dest; /* word 5 */
3552 struct wqe_common wqe_com; /* words 6-11 */
3553 uint32_t rsvd_12_15[4]; /* word 12-15 */
3556 #define T_REQUEST_TAG 3
3559 struct abort_cmd_wqe {
3562 #define abort_cmd_ia_SHIFT 0
3563 #define abort_cmd_ia_MASK 0x000000001
3564 #define abort_cmd_ia_WORD word3
3565 #define abort_cmd_criteria_SHIFT 8
3566 #define abort_cmd_criteria_MASK 0x0000000ff
3567 #define abort_cmd_criteria_WORD word3
3570 struct wqe_common wqe_com; /* words 6-11 */
3571 uint32_t rsvd_12_15[4]; /* word 12-15 */
3574 struct fcp_iwrite64_wqe {
3575 struct ulp_bde64 bde;
3576 uint32_t payload_offset_len;
3577 uint32_t total_xfer_len;
3578 uint32_t initial_xfer_len;
3579 struct wqe_common wqe_com; /* words 6-11 */
3581 struct ulp_bde64 ph_bde; /* words 13-15 */
3584 struct fcp_iread64_wqe {
3585 struct ulp_bde64 bde;
3586 uint32_t payload_offset_len; /* word 3 */
3587 uint32_t total_xfer_len; /* word 4 */
3588 uint32_t rsrvd5; /* word 5 */
3589 struct wqe_common wqe_com; /* words 6-11 */
3591 struct ulp_bde64 ph_bde; /* words 13-15 */
3594 struct fcp_icmnd64_wqe {
3595 struct ulp_bde64 bde; /* words 0-2 */
3596 uint32_t rsrvd3; /* word 3 */
3597 uint32_t rsrvd4; /* word 4 */
3598 uint32_t rsrvd5; /* word 5 */
3599 struct wqe_common wqe_com; /* words 6-11 */
3600 uint32_t rsvd_12_15[4]; /* word 12-15 */
3606 struct lpfc_wqe_generic generic;
3607 struct fcp_icmnd64_wqe fcp_icmd;
3608 struct fcp_iread64_wqe fcp_iread;
3609 struct fcp_iwrite64_wqe fcp_iwrite;
3610 struct abort_cmd_wqe abort_cmd;
3611 struct create_xri_wqe create_xri;
3612 struct xmit_bcast64_wqe xmit_bcast64;
3613 struct xmit_seq64_wqe xmit_sequence;
3614 struct xmit_bls_rsp64_wqe xmit_bls_rsp;
3615 struct xmit_els_rsp64_wqe xmit_els_rsp;
3616 struct els_request64_wqe els_req;
3617 struct gen_req64_wqe gen_req;
3620 #define LPFC_GROUP_OJECT_MAGIC_NUM 0xfeaa0001
3621 #define LPFC_FILE_TYPE_GROUP 0xf7
3622 #define LPFC_FILE_ID_GROUP 0xa2
3623 struct lpfc_grp_hdr {
3625 uint32_t magic_number;
3627 #define lpfc_grp_hdr_file_type_SHIFT 24
3628 #define lpfc_grp_hdr_file_type_MASK 0x000000FF
3629 #define lpfc_grp_hdr_file_type_WORD word2
3630 #define lpfc_grp_hdr_id_SHIFT 16
3631 #define lpfc_grp_hdr_id_MASK 0x000000FF
3632 #define lpfc_grp_hdr_id_WORD word2
3633 uint8_t rev_name[128];
3635 uint8_t revision[32];
3638 #define FCP_COMMAND 0x0
3639 #define FCP_COMMAND_DATA_OUT 0x1
3640 #define ELS_COMMAND_NON_FIP 0xC
3641 #define ELS_COMMAND_FIP 0xD
3642 #define OTHER_COMMAND 0x8
3644 #define LPFC_FW_DUMP 1
3645 #define LPFC_FW_RESET 2
3646 #define LPFC_DV_RESET 3