drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2012 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <scsi/scsi_tcq.h>
  17 #include <scsi/scsicam.h>
  18 #include <scsi/scsi_transport.h>
  19 #include <scsi/scsi_transport_fc.h>
  20
  21 #include "qla_target.h"
  22
  23 /*
  24  * Driver version
  25  */
  26 char qla2x00_version_str[40];
  27
  28 static int apidev_major;
  29
  30 /*
  31  * SRB allocation cache
  32  */
  33 static struct kmem_cache *srb_cachep;
  34
  35 /*
  36  * CT6 CTX allocation cache
  37  */
  38 static struct kmem_cache *ctx_cachep;
  39 /*
  40  * error level for logging
  41  */
  42 int ql_errlev = ql_log_all;
  43
  44 static int ql2xenableclass2;
  45 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  46 MODULE_PARM_DESC(ql2xenableclass2,
  47                 "Specify if Class 2 operations are supported from the very "
  48                 "beginning. Default is 0 - class 2 not supported.");
  49
  50 int ql2xlogintimeout = 20;
  51 module_param(ql2xlogintimeout, int, S_IRUGO);
  52 MODULE_PARM_DESC(ql2xlogintimeout,
  53                 "Login timeout value in seconds.");
  54
  55 int qlport_down_retry;
  56 module_param(qlport_down_retry, int, S_IRUGO);
  57 MODULE_PARM_DESC(qlport_down_retry,
  58                 "Maximum number of command retries to a port that returns "
  59                 "a PORT-DOWN status.");
  60
  61 int ql2xplogiabsentdevice;
  62 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  63 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  64                 "Option to enable PLOGI to devices that are not present after "
  65                 "a Fabric scan.  This is needed for several broken switches. "
  66                 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  67
  68 int ql2xloginretrycount = 0;
  69 module_param(ql2xloginretrycount, int, S_IRUGO);
  70 MODULE_PARM_DESC(ql2xloginretrycount,
  71                 "Specify an alternate value for the NVRAM login retry count.");
  72
  73 int ql2xallocfwdump = 1;
  74 module_param(ql2xallocfwdump, int, S_IRUGO);
  75 MODULE_PARM_DESC(ql2xallocfwdump,
  76                 "Option to enable allocation of memory for a firmware dump "
  77                 "during HBA initialization.  Memory allocation requirements "
  78                 "vary by ISP type.  Default is 1 - allocate memory.");
  79
  80 int ql2xextended_error_logging;
  81 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  82 MODULE_PARM_DESC(ql2xextended_error_logging,
  83                 "Option to enable extended error logging,\n"
  84                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  85                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  86                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  87                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  88                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  89                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  90                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  91                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  92                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
  93                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
  94                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
  95                 "\t\t0x1e400000 - Preferred value for capturing essential "
  96                 "debug information (equivalent to old "
  97                 "ql2xextended_error_logging=1).\n"
  98                 "\t\tDo LOGICAL OR of the value to enable more than one level");
  99
 100 int ql2xshiftctondsd = 6;
 101 module_param(ql2xshiftctondsd, int, S_IRUGO);
 102 MODULE_PARM_DESC(ql2xshiftctondsd,
 103                 "Set to control shifting of command type processing "
 104                 "based on total number of SG elements.");
 105
 106 static void qla2x00_free_device(scsi_qla_host_t *);
 107
 108 int ql2xfdmienable=1;
 109 module_param(ql2xfdmienable, int, S_IRUGO);
 110 MODULE_PARM_DESC(ql2xfdmienable,
 111                 "Enables FDMI registrations. "
 112                 "0 - no FDMI. Default is 1 - perform FDMI.");
 113
 114 int ql2xmaxqdepth = MAX_Q_DEPTH;
 115 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 116 MODULE_PARM_DESC(ql2xmaxqdepth,
 117                 "Maximum queue depth to set for each LUN. "
 118                 "Default is 32.");
 119
 120 int ql2xenabledif = 2;
 121 module_param(ql2xenabledif, int, S_IRUGO);
 122 MODULE_PARM_DESC(ql2xenabledif,
 123                 " Enable T10-CRC-DIF "
 124                 " Default is 0 - No DIF Support. 1 - Enable it"
 125                 ", 2 - Enable DIF for all types, except Type 0.");
 126
 127 int ql2xenablehba_err_chk = 2;
 128 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 129 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 130                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 131                 " Default is 1.\n"
 132                 "  0 -- Error isolation disabled\n"
 133                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 134                 "  2 -- Error isolation enabled for all Types\n");
 135
 136 int ql2xiidmaenable=1;
 137 module_param(ql2xiidmaenable, int, S_IRUGO);
 138 MODULE_PARM_DESC(ql2xiidmaenable,
 139                 "Enables iIDMA settings "
 140                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 141
 142 int ql2xmaxqueues = 1;
 143 module_param(ql2xmaxqueues, int, S_IRUGO);
 144 MODULE_PARM_DESC(ql2xmaxqueues,
 145                 "Enables MQ settings "
 146                 "Default is 1 for single queue. Set it to number "
 147                 "of queues in MQ mode.");
 148
 149 int ql2xmultique_tag;
 150 module_param(ql2xmultique_tag, int, S_IRUGO);
 151 MODULE_PARM_DESC(ql2xmultique_tag,
 152                 "Enables CPU affinity settings for the driver "
 153                 "Default is 0 for no affinity of request and response IO. "
 154                 "Set it to 1 to turn on the cpu affinity.");
 155
 156 int ql2xfwloadbin;
 157 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 158 MODULE_PARM_DESC(ql2xfwloadbin,
 159                 "Option to specify location from which to load ISP firmware:.\n"
 160                 " 2 -- load firmware via the request_firmware() (hotplug).\n"
 161                 "      interface.\n"
 162                 " 1 -- load firmware from flash.\n"
 163                 " 0 -- use default semantics.\n");
 164
 165 int ql2xetsenable;
 166 module_param(ql2xetsenable, int, S_IRUGO);
 167 MODULE_PARM_DESC(ql2xetsenable,
 168                 "Enables firmware ETS burst."
 169                 "Default is 0 - skip ETS enablement.");
 170
 171 int ql2xdbwr = 1;
 172 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 173 MODULE_PARM_DESC(ql2xdbwr,
 174                 "Option to specify scheme for request queue posting.\n"
 175                 " 0 -- Regular doorbell.\n"
 176                 " 1 -- CAMRAM doorbell (faster).\n");
 177
 178 int ql2xtargetreset = 1;
 179 module_param(ql2xtargetreset, int, S_IRUGO);
 180 MODULE_PARM_DESC(ql2xtargetreset,
 181                  "Enable target reset."
 182                  "Default is 1 - use hw defaults.");
 183
 184 int ql2xgffidenable;
 185 module_param(ql2xgffidenable, int, S_IRUGO);
 186 MODULE_PARM_DESC(ql2xgffidenable,
 187                 "Enables GFF_ID checks of port type. "
 188                 "Default is 0 - Do not use GFF_ID information.");
 189
 190 int ql2xasynctmfenable;
 191 module_param(ql2xasynctmfenable, int, S_IRUGO);
 192 MODULE_PARM_DESC(ql2xasynctmfenable,
 193                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 194                 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
 195
 196 int ql2xdontresethba;
 197 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 198 MODULE_PARM_DESC(ql2xdontresethba,
 199                 "Option to specify reset behaviour.\n"
 200                 " 0 (Default) -- Reset on failure.\n"
 201                 " 1 -- Do not reset on failure.\n");
 202
 203 uint ql2xmaxlun = MAX_LUNS;
 204 module_param(ql2xmaxlun, uint, S_IRUGO);
 205 MODULE_PARM_DESC(ql2xmaxlun,
 206                 "Defines the maximum LU number to register with the SCSI "
 207                 "midlayer. Default is 65535.");
 208
 209 int ql2xmdcapmask = 0x1F;
 210 module_param(ql2xmdcapmask, int, S_IRUGO);
 211 MODULE_PARM_DESC(ql2xmdcapmask,
 212                 "Set the Minidump driver capture mask level. "
 213                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 214
 215 int ql2xmdenable = 1;
 216 module_param(ql2xmdenable, int, S_IRUGO);
 217 MODULE_PARM_DESC(ql2xmdenable,
 218                 "Enable/disable MiniDump. "
 219                 "0 - MiniDump disabled. "
 220                 "1 (Default) - MiniDump enabled.");
 221
 222 /*
 223  * SCSI host template entry points
 224  */
 225 static int qla2xxx_slave_configure(struct scsi_device * device);
 226 static int qla2xxx_slave_alloc(struct scsi_device *);
 227 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
 228 static void qla2xxx_scan_start(struct Scsi_Host *);
 229 static void qla2xxx_slave_destroy(struct scsi_device *);
 230 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 231 static int qla2xxx_eh_abort(struct scsi_cmnd *);
 232 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
 233 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
 234 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
 235 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
 236
 237 static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
 238 static int qla2x00_change_queue_type(struct scsi_device *, int);
 239
 240 struct scsi_host_template qla2xxx_driver_template = {
 241         .module                 = THIS_MODULE,
 242         .name                   = QLA2XXX_DRIVER_NAME,
 243         .queuecommand           = qla2xxx_queuecommand,
 244
 245         .eh_abort_handler       = qla2xxx_eh_abort,
 246         .eh_device_reset_handler = qla2xxx_eh_device_reset,
 247         .eh_target_reset_handler = qla2xxx_eh_target_reset,
 248         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
 249         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
 250
 251         .slave_configure        = qla2xxx_slave_configure,
 252
 253         .slave_alloc            = qla2xxx_slave_alloc,
 254         .slave_destroy          = qla2xxx_slave_destroy,
 255         .scan_finished          = qla2xxx_scan_finished,
 256         .scan_start             = qla2xxx_scan_start,
 257         .change_queue_depth     = qla2x00_change_queue_depth,
 258         .change_queue_type      = qla2x00_change_queue_type,
 259         .this_id                = -1,
 260         .cmd_per_lun            = 3,
 261         .use_clustering         = ENABLE_CLUSTERING,
 262         .sg_tablesize           = SG_ALL,
 263
 264         .max_sectors            = 0xFFFF,
 265         .shost_attrs            = qla2x00_host_attrs,
 266
 267         .supported_mode         = MODE_INITIATOR,
 268 };
 269
 270 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 271 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 272
 273 /* TODO Convert to inlines
 274  *
 275  * Timer routines
 276  */
 277
 278 __inline__ void
 279 qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
 280 {
 281         init_timer(&vha->timer);
 282         vha->timer.expires = jiffies + interval * HZ;
 283         vha->timer.data = (unsigned long)vha;
 284         vha->timer.function = (void (*)(unsigned long))func;
 285         add_timer(&vha->timer);
 286         vha->timer_active = 1;
 287 }
 288
 289 static inline void
 290 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 291 {
 292         /* Currently used for 82XX only. */
 293         if (vha->device_flags & DFLG_DEV_FAILED) {
 294                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 295                     "Device in a failed state, returning.\n");
 296                 return;
 297         }
 298
 299         mod_timer(&vha->timer, jiffies + interval * HZ);
 300 }
 301
 302 static __inline__ void
 303 qla2x00_stop_timer(scsi_qla_host_t *vha)
 304 {
 305         del_timer_sync(&vha->timer);
 306         vha->timer_active = 0;
 307 }
 308
 309 static int qla2x00_do_dpc(void *data);
 310
 311 static void qla2x00_rst_aen(scsi_qla_host_t *);
 312
 313 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 314         struct req_que **, struct rsp_que **);
 315 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 316 static void qla2x00_mem_free(struct qla_hw_data *);
 317
 318 /* -------------------------------------------------------------------------- */
 319 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 320                                 struct rsp_que *rsp)
 321 {
 322         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 323         ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
 324                                 GFP_KERNEL);
 325         if (!ha->req_q_map) {
 326                 ql_log(ql_log_fatal, vha, 0x003b,
 327                     "Unable to allocate memory for request queue ptrs.\n");
 328                 goto fail_req_map;
 329         }
 330
 331         ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
 332                                 GFP_KERNEL);
 333         if (!ha->rsp_q_map) {
 334                 ql_log(ql_log_fatal, vha, 0x003c,
 335                     "Unable to allocate memory for response queue ptrs.\n");
 336                 goto fail_rsp_map;
 337         }
 338         /*
 339          * Make sure we record at least the request and response queue zero in
 340          * case we need to free them if part of the probe fails.
 341          */
 342         ha->rsp_q_map[0] = rsp;
 343         ha->req_q_map[0] = req;
 344         set_bit(0, ha->rsp_qid_map);
 345         set_bit(0, ha->req_qid_map);
 346         return 1;
 347
 348 fail_rsp_map:
 349         kfree(ha->req_q_map);
 350         ha->req_q_map = NULL;
 351 fail_req_map:
 352         return -ENOMEM;
 353 }
 354
 355 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 356 {
 357         if (req && req->ring)
 358                 dma_free_coherent(&ha->pdev->dev,
 359                 (req->length + 1) * sizeof(request_t),
 360                 req->ring, req->dma);
 361
 362         if (req)
 363                 kfree(req->outstanding_cmds);
 364
 365         kfree(req);
 366         req = NULL;
 367 }
 368
 369 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 370 {
 371         if (rsp && rsp->ring)
 372                 dma_free_coherent(&ha->pdev->dev,
 373                 (rsp->length + 1) * sizeof(response_t),
 374                 rsp->ring, rsp->dma);
 375
 376         kfree(rsp);
 377         rsp = NULL;
 378 }
 379
 380 static void qla2x00_free_queues(struct qla_hw_data *ha)
 381 {
 382         struct req_que *req;
 383         struct rsp_que *rsp;
 384         int cnt;
 385
 386         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 387                 req = ha->req_q_map[cnt];
 388                 qla2x00_free_req_que(ha, req);
 389         }
 390         kfree(ha->req_q_map);
 391         ha->req_q_map = NULL;
 392
 393         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 394                 rsp = ha->rsp_q_map[cnt];
 395                 qla2x00_free_rsp_que(ha, rsp);
 396         }
 397         kfree(ha->rsp_q_map);
 398         ha->rsp_q_map = NULL;
 399 }
 400
 401 static int qla25xx_setup_mode(struct scsi_qla_host *vha)
 402 {
 403         uint16_t options = 0;
 404         int ques, req, ret;
 405         struct qla_hw_data *ha = vha->hw;
 406
 407         if (!(ha->fw_attributes & BIT_6)) {
 408                 ql_log(ql_log_warn, vha, 0x00d8,
 409                     "Firmware is not multi-queue capable.\n");
 410                 goto fail;
 411         }
 412         if (ql2xmultique_tag) {
 413                 /* create a request queue for IO */
 414                 options |= BIT_7;
 415                 req = qla25xx_create_req_que(ha, options, 0, 0, -1,
 416                         QLA_DEFAULT_QUE_QOS);
 417                 if (!req) {
 418                         ql_log(ql_log_warn, vha, 0x00e0,
 419                             "Failed to create request queue.\n");
 420                         goto fail;
 421                 }
 422                 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1);
 423                 vha->req = ha->req_q_map[req];
 424                 options |= BIT_1;
 425                 for (ques = 1; ques < ha->max_rsp_queues; ques++) {
 426                         ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
 427                         if (!ret) {
 428                                 ql_log(ql_log_warn, vha, 0x00e8,
 429                                     "Failed to create response queue.\n");
 430                                 goto fail2;
 431                         }
 432                 }
 433                 ha->flags.cpu_affinity_enabled = 1;
 434                 ql_dbg(ql_dbg_multiq, vha, 0xc007,
 435                     "CPU affinity mode enalbed, "
 436                     "no. of response queues:%d no. of request queues:%d.\n",
 437                     ha->max_rsp_queues, ha->max_req_queues);
 438                 ql_dbg(ql_dbg_init, vha, 0x00e9,
 439                     "CPU affinity mode enalbed, "
 440                     "no. of response queues:%d no. of request queues:%d.\n",
 441                     ha->max_rsp_queues, ha->max_req_queues);
 442         }
 443         return 0;
 444 fail2:
 445         qla25xx_delete_queues(vha);
 446         destroy_workqueue(ha->wq);
 447         ha->wq = NULL;
 448         vha->req = ha->req_q_map[0];
 449 fail:
 450         ha->mqenable = 0;
 451         kfree(ha->req_q_map);
 452         kfree(ha->rsp_q_map);
 453         ha->max_req_queues = ha->max_rsp_queues = 1;
 454         return 1;
 455 }
 456
 457 static char *
 458 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
 459 {
 460         struct qla_hw_data *ha = vha->hw;
 461         static char *pci_bus_modes[] = {
 462                 "33", "66", "100", "133",
 463         };
 464         uint16_t pci_bus;
 465
 466         strcpy(str, "PCI");
 467         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 468         if (pci_bus) {
 469                 strcat(str, "-X (");
 470                 strcat(str, pci_bus_modes[pci_bus]);
 471         } else {
 472                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 473                 strcat(str, " (");
 474                 strcat(str, pci_bus_modes[pci_bus]);
 475         }
 476         strcat(str, " MHz)");
 477
 478         return (str);
 479 }
 480
 481 static char *
 482 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
 483 {
 484         static char *pci_bus_modes[] = { "33", "66", "100", "133", };
 485         struct qla_hw_data *ha = vha->hw;
 486         uint32_t pci_bus;
 487         int pcie_reg;
 488
 489         pcie_reg = pci_pcie_cap(ha->pdev);
 490         if (pcie_reg) {
 491                 char lwstr[6];
 492                 uint16_t pcie_lstat, lspeed, lwidth;
 493
 494                 pcie_reg += PCI_EXP_LNKCAP;
 495                 pci_read_config_word(ha->pdev, pcie_reg, &pcie_lstat);
 496                 lspeed = pcie_lstat & (BIT_0 | BIT_1 | BIT_2 | BIT_3);
 497                 lwidth = (pcie_lstat &
 498                     (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4;
 499
 500                 strcpy(str, "PCIe (");
 501                 switch (lspeed) {
 502                 case 1:
 503                         strcat(str, "2.5GT/s ");
 504                         break;
 505                 case 2:
 506                         strcat(str, "5.0GT/s ");
 507                         break;
 508                 case 3:
 509                         strcat(str, "8.0GT/s ");
 510                         break;
 511                 default:
 512                         strcat(str, "<unknown> ");
 513                         break;
 514                 }
 515                 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
 516                 strcat(str, lwstr);
 517
 518                 return str;
 519         }
 520
 521         strcpy(str, "PCI");
 522         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 523         if (pci_bus == 0 || pci_bus == 8) {
 524                 strcat(str, " (");
 525                 strcat(str, pci_bus_modes[pci_bus >> 3]);
 526         } else {
 527                 strcat(str, "-X ");
 528                 if (pci_bus & BIT_2)
 529                         strcat(str, "Mode 2");
 530                 else
 531                         strcat(str, "Mode 1");
 532                 strcat(str, " (");
 533                 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
 534         }
 535         strcat(str, " MHz)");
 536
 537         return str;
 538 }
 539
 540 static char *
 541 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
 542 {
 543         char un_str[10];
 544         struct qla_hw_data *ha = vha->hw;
 545
 546         sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
 547             ha->fw_minor_version,
 548             ha->fw_subminor_version);
 549
 550         if (ha->fw_attributes & BIT_9) {
 551                 strcat(str, "FLX");
 552                 return (str);
 553         }
 554
 555         switch (ha->fw_attributes & 0xFF) {
 556         case 0x7:
 557                 strcat(str, "EF");
 558                 break;
 559         case 0x17:
 560                 strcat(str, "TP");
 561                 break;
 562         case 0x37:
 563                 strcat(str, "IP");
 564                 break;
 565         case 0x77:
 566                 strcat(str, "VI");
 567                 break;
 568         default:
 569                 sprintf(un_str, "(%x)", ha->fw_attributes);
 570                 strcat(str, un_str);
 571                 break;
 572         }
 573         if (ha->fw_attributes & 0x100)
 574                 strcat(str, "X");
 575
 576         return (str);
 577 }
 578
 579 static char *
 580 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
 581 {
 582         struct qla_hw_data *ha = vha->hw;
 583
 584         sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
 585             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 586         return str;
 587 }
 588
 589 void
 590 qla2x00_sp_free_dma(void *vha, void *ptr)
 591 {
 592         srb_t *sp = (srb_t *)ptr;
 593         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 594         struct qla_hw_data *ha = sp->fcport->vha->hw;
 595         void *ctx = GET_CMD_CTX_SP(sp);
 596
 597         if (sp->flags & SRB_DMA_VALID) {
 598                 scsi_dma_unmap(cmd);
 599                 sp->flags &= ~SRB_DMA_VALID;
 600         }
 601
 602         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 603                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 604                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 605                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 606         }
 607
 608         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 609                 /* List assured to be having elements */
 610                 qla2x00_clean_dsd_pool(ha, sp);
 611                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 612         }
 613
 614         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 615                 dma_pool_free(ha->dl_dma_pool, ctx,
 616                     ((struct crc_context *)ctx)->crc_ctx_dma);
 617                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 618         }
 619
 620         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 621                 struct ct6_dsd *ctx1 = (struct ct6_dsd *)ctx;
 622
 623                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 624                         ctx1->fcp_cmnd_dma);
 625                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 626                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 627                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 628                 mempool_free(ctx1, ha->ctx_mempool);
 629                 ctx1 = NULL;
 630         }
 631
 632         CMD_SP(cmd) = NULL;
 633         mempool_free(sp, ha->srb_mempool);
 634 }
 635
 636 static void
 637 qla2x00_sp_compl(void *data, void *ptr, int res)
 638 {
 639         struct qla_hw_data *ha = (struct qla_hw_data *)data;
 640         srb_t *sp = (srb_t *)ptr;
 641         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 642
 643         cmd->result = res;
 644
 645         if (atomic_read(&sp->ref_count) == 0) {
 646                 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3015,
 647                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 648                     sp, GET_CMD_SP(sp));
 649                 if (ql2xextended_error_logging & ql_dbg_io)
 650                         BUG();
 651                 return;
 652         }
 653         if (!atomic_dec_and_test(&sp->ref_count))
 654                 return;
 655
 656         qla2x00_sp_free_dma(ha, sp);
 657         cmd->scsi_done(cmd);
 658 }
 659
 660 static int
 661 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 662 {
 663         scsi_qla_host_t *vha = shost_priv(host);
 664         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 665         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 666         struct qla_hw_data *ha = vha->hw;
 667         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 668         srb_t *sp;
 669         int rval;
 670
 671         if (ha->flags.eeh_busy) {
 672                 if (ha->flags.pci_channel_io_perm_failure) {
 673                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 674                             "PCI Channel IO permanent failure, exiting "
 675                             "cmd=%p.\n", cmd);
 676                         cmd->result = DID_NO_CONNECT << 16;
 677                 } else {
 678                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 679                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 680                         cmd->result = DID_REQUEUE << 16;
 681                 }
 682                 goto qc24_fail_command;
 683         }
 684
 685         rval = fc_remote_port_chkready(rport);
 686         if (rval) {
 687                 cmd->result = rval;
 688                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 689                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 690                     cmd, rval);
 691                 goto qc24_fail_command;
 692         }
 693
 694         if (!vha->flags.difdix_supported &&
 695                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 696                         ql_dbg(ql_dbg_io, vha, 0x3004,
 697                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 698                             cmd);
 699                         cmd->result = DID_NO_CONNECT << 16;
 700                         goto qc24_fail_command;
 701         }
 702
 703         if (!fcport) {
 704                 cmd->result = DID_NO_CONNECT << 16;
 705                 goto qc24_fail_command;
 706         }
 707
 708         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 709                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 710                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 711                         ql_dbg(ql_dbg_io, vha, 0x3005,
 712                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 713                             atomic_read(&fcport->state),
 714                             atomic_read(&base_vha->loop_state));
 715                         cmd->result = DID_NO_CONNECT << 16;
 716                         goto qc24_fail_command;
 717                 }
 718                 goto qc24_target_busy;
 719         }
 720
 721         sp = qla2x00_get_sp(base_vha, fcport, GFP_ATOMIC);
 722         if (!sp) {
 723                 set_bit(HOST_RAMP_DOWN_QUEUE_DEPTH, &vha->dpc_flags);
 724                 goto qc24_host_busy;
 725         }
 726
 727         sp->u.scmd.cmd = cmd;
 728         sp->type = SRB_SCSI_CMD;
 729         atomic_set(&sp->ref_count, 1);
 730         CMD_SP(cmd) = (void *)sp;
 731         sp->free = qla2x00_sp_free_dma;
 732         sp->done = qla2x00_sp_compl;
 733
 734         rval = ha->isp_ops->start_scsi(sp);
 735         if (rval != QLA_SUCCESS) {
 736                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 737                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 738                 set_bit(HOST_RAMP_DOWN_QUEUE_DEPTH, &vha->dpc_flags);
 739                 goto qc24_host_busy_free_sp;
 740         }
 741
 742         return 0;
 743
 744 qc24_host_busy_free_sp:
 745         qla2x00_sp_free_dma(ha, sp);
 746
 747 qc24_host_busy:
 748         return SCSI_MLQUEUE_HOST_BUSY;
 749
 750 qc24_target_busy:
 751         return SCSI_MLQUEUE_TARGET_BUSY;
 752
 753 qc24_fail_command:
 754         cmd->scsi_done(cmd);
 755
 756         return 0;
 757 }
 758
 759 /*
 760  * qla2x00_eh_wait_on_command
 761  *    Waits for the command to be returned by the Firmware for some
 762  *    max time.
 763  *
 764  * Input:
 765  *    cmd = Scsi Command to wait on.
 766  *
 767  * Return:
 768  *    Not Found : 0
 769  *    Found : 1
 770  */
 771 static int
 772 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
 773 {
 774 #define ABORT_POLLING_PERIOD    1000
 775 #define ABORT_WAIT_ITER         ((10 * 1000) / (ABORT_POLLING_PERIOD))
 776         unsigned long wait_iter = ABORT_WAIT_ITER;
 777         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 778         struct qla_hw_data *ha = vha->hw;
 779         int ret = QLA_SUCCESS;
 780
 781         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
 782                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
 783                     "Return:eh_wait.\n");
 784                 return ret;
 785         }
 786
 787         while (CMD_SP(cmd) && wait_iter--) {
 788                 msleep(ABORT_POLLING_PERIOD);
 789         }
 790         if (CMD_SP(cmd))
 791                 ret = QLA_FUNCTION_FAILED;
 792
 793         return ret;
 794 }
 795
 796 /*
 797  * qla2x00_wait_for_hba_online
 798  *    Wait till the HBA is online after going through
 799  *    <= MAX_RETRIES_OF_ISP_ABORT  or
 800  *    finally HBA is disabled ie marked offline
 801  *
 802  * Input:
 803  *     ha - pointer to host adapter structure
 804  *
 805  * Note:
 806  *    Does context switching-Release SPIN_LOCK
 807  *    (if any) before calling this routine.
 808  *
 809  * Return:
 810  *    Success (Adapter is online) : 0
 811  *    Failed  (Adapter is offline/disabled) : 1
 812  */
 813 int
 814 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
 815 {
 816         int             return_status;
 817         unsigned long   wait_online;
 818         struct qla_hw_data *ha = vha->hw;
 819         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 820
 821         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 822         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 823             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 824             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 825             ha->dpc_active) && time_before(jiffies, wait_online)) {
 826
 827                 msleep(1000);
 828         }
 829         if (base_vha->flags.online)
 830                 return_status = QLA_SUCCESS;
 831         else
 832                 return_status = QLA_FUNCTION_FAILED;
 833
 834         return (return_status);
 835 }
 836
 837 /*
 838  * qla2x00_wait_for_reset_ready
 839  *    Wait till the HBA is online after going through
 840  *    <= MAX_RETRIES_OF_ISP_ABORT  or
 841  *    finally HBA is disabled ie marked offline or flash
 842  *    operations are in progress.
 843  *
 844  * Input:
 845  *     ha - pointer to host adapter structure
 846  *
 847  * Note:
 848  *    Does context switching-Release SPIN_LOCK
 849  *    (if any) before calling this routine.
 850  *
 851  * Return:
 852  *    Success (Adapter is online/no flash ops) : 0
 853  *    Failed  (Adapter is offline/disabled/flash ops in progress) : 1
 854  */
 855 static int
 856 qla2x00_wait_for_reset_ready(scsi_qla_host_t *vha)
 857 {
 858         int             return_status;
 859         unsigned long   wait_online;
 860         struct qla_hw_data *ha = vha->hw;
 861         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 862
 863         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 864         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 865             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 866             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 867             ha->optrom_state != QLA_SWAITING ||
 868             ha->dpc_active) && time_before(jiffies, wait_online))
 869                 msleep(1000);
 870
 871         if (base_vha->flags.online &&  ha->optrom_state == QLA_SWAITING)
 872                 return_status = QLA_SUCCESS;
 873         else
 874                 return_status = QLA_FUNCTION_FAILED;
 875
 876         ql_dbg(ql_dbg_taskm, vha, 0x8019,
 877             "%s return status=%d.\n", __func__, return_status);
 878
 879         return return_status;
 880 }
 881
 882 int
 883 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
 884 {
 885         int             return_status;
 886         unsigned long   wait_reset;
 887         struct qla_hw_data *ha = vha->hw;
 888         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 889
 890         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 891         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 892             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 893             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 894             ha->dpc_active) && time_before(jiffies, wait_reset)) {
 895
 896                 msleep(1000);
 897
 898                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
 899                     ha->flags.chip_reset_done)
 900                         break;
 901         }
 902         if (ha->flags.chip_reset_done)
 903                 return_status = QLA_SUCCESS;
 904         else
 905                 return_status = QLA_FUNCTION_FAILED;
 906
 907         return return_status;
 908 }
 909
 910 static void
 911 sp_get(struct srb *sp)
 912 {
 913         atomic_inc(&sp->ref_count);
 914 }
 915
 916 /**************************************************************************
 917 * qla2xxx_eh_abort
 918 *
 919 * Description:
 920 *    The abort function will abort the specified command.
 921 *
 922 * Input:
 923 *    cmd = Linux SCSI command packet to be aborted.
 924 *
 925 * Returns:
 926 *    Either SUCCESS or FAILED.
 927 *
 928 * Note:
 929 *    Only return FAILED if command not returned by firmware.
 930 **************************************************************************/
 931 static int
 932 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
 933 {
 934         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 935         srb_t *sp;
 936         int ret;
 937         unsigned int id, lun;
 938         unsigned long flags;
 939         int wait = 0;
 940         struct qla_hw_data *ha = vha->hw;
 941
 942         if (!CMD_SP(cmd))
 943                 return SUCCESS;
 944
 945         ret = fc_block_scsi_eh(cmd);
 946         if (ret != 0)
 947                 return ret;
 948         ret = SUCCESS;
 949
 950         id = cmd->device->id;
 951         lun = cmd->device->lun;
 952
 953         spin_lock_irqsave(&ha->hardware_lock, flags);
 954         sp = (srb_t *) CMD_SP(cmd);
 955         if (!sp) {
 956                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 957                 return SUCCESS;
 958         }
 959
 960         ql_dbg(ql_dbg_taskm, vha, 0x8002,
 961             "Aborting from RISC nexus=%ld:%d:%d sp=%p cmd=%p\n",
 962             vha->host_no, id, lun, sp, cmd);
 963
 964         /* Get a reference to the sp and drop the lock.*/
 965         sp_get(sp);
 966
 967         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 968         if (ha->isp_ops->abort_command(sp)) {
 969                 ret = FAILED;
 970                 ql_dbg(ql_dbg_taskm, vha, 0x8003,
 971                     "Abort command mbx failed cmd=%p.\n", cmd);
 972         } else {
 973                 ql_dbg(ql_dbg_taskm, vha, 0x8004,
 974                     "Abort command mbx success cmd=%p.\n", cmd);
 975                 wait = 1;
 976         }
 977
 978         spin_lock_irqsave(&ha->hardware_lock, flags);
 979         sp->done(ha, sp, 0);
 980         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 981
 982         /* Did the command return during mailbox execution? */
 983         if (ret == FAILED && !CMD_SP(cmd))
 984                 ret = SUCCESS;
 985
 986         /* Wait for the command to be returned. */
 987         if (wait) {
 988                 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
 989                         ql_log(ql_log_warn, vha, 0x8006,
 990                             "Abort handler timed out cmd=%p.\n", cmd);
 991                         ret = FAILED;
 992                 }
 993         }
 994
 995         ql_log(ql_log_info, vha, 0x801c,
 996             "Abort command issued nexus=%ld:%d:%d --  %d %x.\n",
 997             vha->host_no, id, lun, wait, ret);
 998
 999         return ret;
1000 }
1001
1002 int
1003 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1004         unsigned int l, enum nexus_wait_type type)
1005 {
1006         int cnt, match, status;
1007         unsigned long flags;
1008         struct qla_hw_data *ha = vha->hw;
1009         struct req_que *req;
1010         srb_t *sp;
1011         struct scsi_cmnd *cmd;
1012
1013         status = QLA_SUCCESS;
1014
1015         spin_lock_irqsave(&ha->hardware_lock, flags);
1016         req = vha->req;
1017         for (cnt = 1; status == QLA_SUCCESS &&
1018                 cnt < req->num_outstanding_cmds; cnt++) {
1019                 sp = req->outstanding_cmds[cnt];
1020                 if (!sp)
1021                         continue;
1022                 if (sp->type != SRB_SCSI_CMD)
1023                         continue;
1024                 if (vha->vp_idx != sp->fcport->vha->vp_idx)
1025                         continue;
1026                 match = 0;
1027                 cmd = GET_CMD_SP(sp);
1028                 switch (type) {
1029                 case WAIT_HOST:
1030                         match = 1;
1031                         break;
1032                 case WAIT_TARGET:
1033                         match = cmd->device->id == t;
1034                         break;
1035                 case WAIT_LUN:
1036                         match = (cmd->device->id == t &&
1037                                 cmd->device->lun == l);
1038                         break;
1039                 }
1040                 if (!match)
1041                         continue;
1042
1043                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1044                 status = qla2x00_eh_wait_on_command(cmd);
1045                 spin_lock_irqsave(&ha->hardware_lock, flags);
1046         }
1047         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1048
1049         return status;
1050 }
1051
1052 static char *reset_errors[] = {
1053         "HBA not online",
1054         "HBA not ready",
1055         "Task management failed",
1056         "Waiting for command completions",
1057 };
1058
1059 static int
1060 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1061     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int))
1062 {
1063         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1064         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1065         int err;
1066
1067         if (!fcport) {
1068                 return FAILED;
1069         }
1070
1071         err = fc_block_scsi_eh(cmd);
1072         if (err != 0)
1073                 return err;
1074
1075         ql_log(ql_log_info, vha, 0x8009,
1076             "%s RESET ISSUED nexus=%ld:%d:%d cmd=%p.\n", name, vha->host_no,
1077             cmd->device->id, cmd->device->lun, cmd);
1078
1079         err = 0;
1080         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1081                 ql_log(ql_log_warn, vha, 0x800a,
1082                     "Wait for hba online failed for cmd=%p.\n", cmd);
1083                 goto eh_reset_failed;
1084         }
1085         err = 2;
1086         if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1087                 != QLA_SUCCESS) {
1088                 ql_log(ql_log_warn, vha, 0x800c,
1089                     "do_reset failed for cmd=%p.\n", cmd);
1090                 goto eh_reset_failed;
1091         }
1092         err = 3;
1093         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1094             cmd->device->lun, type) != QLA_SUCCESS) {
1095                 ql_log(ql_log_warn, vha, 0x800d,
1096                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1097                 goto eh_reset_failed;
1098         }
1099
1100         ql_log(ql_log_info, vha, 0x800e,
1101             "%s RESET SUCCEEDED nexus:%ld:%d:%d cmd=%p.\n", name,
1102             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1103
1104         return SUCCESS;
1105
1106 eh_reset_failed:
1107         ql_log(ql_log_info, vha, 0x800f,
1108             "%s RESET FAILED: %s nexus=%ld:%d:%d cmd=%p.\n", name,
1109             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1110             cmd);
1111         return FAILED;
1112 }
1113
1114 static int
1115 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1116 {
1117         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1118         struct qla_hw_data *ha = vha->hw;
1119
1120         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1121             ha->isp_ops->lun_reset);
1122 }
1123
1124 static int
1125 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1126 {
1127         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1128         struct qla_hw_data *ha = vha->hw;
1129
1130         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1131             ha->isp_ops->target_reset);
1132 }
1133
1134 /**************************************************************************
1135 * qla2xxx_eh_bus_reset
1136 *
1137 * Description:
1138 *    The bus reset function will reset the bus and abort any executing
1139 *    commands.
1140 *
1141 * Input:
1142 *    cmd = Linux SCSI command packet of the command that cause the
1143 *          bus reset.
1144 *
1145 * Returns:
1146 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1147 *
1148 **************************************************************************/
1149 static int
1150 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1151 {
1152         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1153         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1154         int ret = FAILED;
1155         unsigned int id, lun;
1156
1157         id = cmd->device->id;
1158         lun = cmd->device->lun;
1159
1160         if (!fcport) {
1161                 return ret;
1162         }
1163
1164         ret = fc_block_scsi_eh(cmd);
1165         if (ret != 0)
1166                 return ret;
1167         ret = FAILED;
1168
1169         ql_log(ql_log_info, vha, 0x8012,
1170             "BUS RESET ISSUED nexus=%ld:%d:%d.\n", vha->host_no, id, lun);
1171
1172         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1173                 ql_log(ql_log_fatal, vha, 0x8013,
1174                     "Wait for hba online failed board disabled.\n");
1175                 goto eh_bus_reset_done;
1176         }
1177
1178         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1179                 ret = SUCCESS;
1180
1181         if (ret == FAILED)
1182                 goto eh_bus_reset_done;
1183
1184         /* Flush outstanding commands. */
1185         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1186             QLA_SUCCESS) {
1187                 ql_log(ql_log_warn, vha, 0x8014,
1188                     "Wait for pending commands failed.\n");
1189                 ret = FAILED;
1190         }
1191
1192 eh_bus_reset_done:
1193         ql_log(ql_log_warn, vha, 0x802b,
1194             "BUS RESET %s nexus=%ld:%d:%d.\n",
1195             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1196
1197         return ret;
1198 }
1199
1200 /**************************************************************************
1201 * qla2xxx_eh_host_reset
1202 *
1203 * Description:
1204 *    The reset function will reset the Adapter.
1205 *
1206 * Input:
1207 *      cmd = Linux SCSI command packet of the command that cause the
1208 *            adapter reset.
1209 *
1210 * Returns:
1211 *      Either SUCCESS or FAILED.
1212 *
1213 * Note:
1214 **************************************************************************/
1215 static int
1216 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1217 {
1218         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1219         struct qla_hw_data *ha = vha->hw;
1220         int ret = FAILED;
1221         unsigned int id, lun;
1222         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1223
1224         id = cmd->device->id;
1225         lun = cmd->device->lun;
1226
1227         ql_log(ql_log_info, vha, 0x8018,
1228             "ADAPTER RESET ISSUED nexus=%ld:%d:%d.\n", vha->host_no, id, lun);
1229
1230         if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS)
1231                 goto eh_host_reset_lock;
1232
1233         if (vha != base_vha) {
1234                 if (qla2x00_vp_abort_isp(vha))
1235                         goto eh_host_reset_lock;
1236         } else {
1237                 if (IS_QLA82XX(vha->hw)) {
1238                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1239                                 /* Ctx reset success */
1240                                 ret = SUCCESS;
1241                                 goto eh_host_reset_lock;
1242                         }
1243                         /* fall thru if ctx reset failed */
1244                 }
1245                 if (ha->wq)
1246                         flush_workqueue(ha->wq);
1247
1248                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1249                 if (ha->isp_ops->abort_isp(base_vha)) {
1250                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1251                         /* failed. schedule dpc to try */
1252                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1253
1254                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1255                                 ql_log(ql_log_warn, vha, 0x802a,
1256                                     "wait for hba online failed.\n");
1257                                 goto eh_host_reset_lock;
1258                         }
1259                 }
1260                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1261         }
1262
1263         /* Waiting for command to be returned to OS.*/
1264         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1265                 QLA_SUCCESS)
1266                 ret = SUCCESS;
1267
1268 eh_host_reset_lock:
1269         ql_log(ql_log_info, vha, 0x8017,
1270             "ADAPTER RESET %s nexus=%ld:%d:%d.\n",
1271             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1272
1273         return ret;
1274 }
1275
1276 /*
1277 * qla2x00_loop_reset
1278 *      Issue loop reset.
1279 *
1280 * Input:
1281 *      ha = adapter block pointer.
1282 *
1283 * Returns:
1284 *      0 = success
1285 */
1286 int
1287 qla2x00_loop_reset(scsi_qla_host_t *vha)
1288 {
1289         int ret;
1290         struct fc_port *fcport;
1291         struct qla_hw_data *ha = vha->hw;
1292
1293         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1294                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1295                         if (fcport->port_type != FCT_TARGET)
1296                                 continue;
1297
1298                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1299                         if (ret != QLA_SUCCESS) {
1300                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1301                                     "Bus Reset failed: Target Reset=%d "
1302                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1303                         }
1304                 }
1305         }
1306
1307         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1308                 atomic_set(&vha->loop_state, LOOP_DOWN);
1309                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1310                 qla2x00_mark_all_devices_lost(vha, 0);
1311                 ret = qla2x00_full_login_lip(vha);
1312                 if (ret != QLA_SUCCESS) {
1313                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1314                             "full_login_lip=%d.\n", ret);
1315                 }
1316         }
1317
1318         if (ha->flags.enable_lip_reset) {
1319                 ret = qla2x00_lip_reset(vha);
1320                 if (ret != QLA_SUCCESS)
1321                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1322                             "lip_reset failed (%d).\n", ret);
1323         }
1324
1325         /* Issue marker command only when we are going to start the I/O */
1326         vha->marker_needed = 1;
1327
1328         return QLA_SUCCESS;
1329 }
1330
1331 void
1332 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1333 {
1334         int que, cnt;
1335         unsigned long flags;
1336         srb_t *sp;
1337         struct qla_hw_data *ha = vha->hw;
1338         struct req_que *req;
1339
1340         spin_lock_irqsave(&ha->hardware_lock, flags);
1341         for (que = 0; que < ha->max_req_queues; que++) {
1342                 req = ha->req_q_map[que];
1343                 if (!req)
1344                         continue;
1345                 if (!req->outstanding_cmds)
1346                         continue;
1347                 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1348                         sp = req->outstanding_cmds[cnt];
1349                         if (sp) {
1350                                 req->outstanding_cmds[cnt] = NULL;
1351                                 sp->done(vha, sp, res);
1352                         }
1353                 }
1354         }
1355         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1356 }
1357
1358 static int
1359 qla2xxx_slave_alloc(struct scsi_device *sdev)
1360 {
1361         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1362
1363         if (!rport || fc_remote_port_chkready(rport))
1364                 return -ENXIO;
1365
1366         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1367
1368         return 0;
1369 }
1370
1371 static int
1372 qla2xxx_slave_configure(struct scsi_device *sdev)
1373 {
1374         scsi_qla_host_t *vha = shost_priv(sdev->host);
1375         struct req_que *req = vha->req;
1376
1377         if (IS_T10_PI_CAPABLE(vha->hw))
1378                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1379
1380         if (sdev->tagged_supported)
1381                 scsi_activate_tcq(sdev, req->max_q_depth);
1382         else
1383                 scsi_deactivate_tcq(sdev, req->max_q_depth);
1384         return 0;
1385 }
1386
1387 static void
1388 qla2xxx_slave_destroy(struct scsi_device *sdev)
1389 {
1390         sdev->hostdata = NULL;
1391 }
1392
1393 static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
1394 {
1395         fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
1396
1397         if (!scsi_track_queue_full(sdev, qdepth))
1398                 return;
1399
1400         ql_dbg(ql_dbg_io, fcport->vha, 0x3029,
1401             "Queue depth adjusted-down to %d for nexus=%ld:%d:%d.\n",
1402             sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun);
1403 }
1404
1405 static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
1406 {
1407         fc_port_t *fcport = sdev->hostdata;
1408         struct scsi_qla_host *vha = fcport->vha;
1409         struct req_que *req = NULL;
1410
1411         req = vha->req;
1412         if (!req)
1413                 return;
1414
1415         if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
1416                 return;
1417
1418         if (sdev->ordered_tags)
1419                 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
1420         else
1421                 scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
1422
1423         ql_dbg(ql_dbg_io, vha, 0x302a,
1424             "Queue depth adjusted-up to %d for nexus=%ld:%d:%d.\n",
1425             sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun);
1426 }
1427
1428 static int
1429 qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
1430 {
1431         switch (reason) {
1432         case SCSI_QDEPTH_DEFAULT:
1433                 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
1434                 break;
1435         case SCSI_QDEPTH_QFULL:
1436                 qla2x00_handle_queue_full(sdev, qdepth);
1437                 break;
1438         case SCSI_QDEPTH_RAMP_UP:
1439                 qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
1440                 break;
1441         default:
1442                 return -EOPNOTSUPP;
1443         }
1444
1445         return sdev->queue_depth;
1446 }
1447
1448 static int
1449 qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
1450 {
1451         if (sdev->tagged_supported) {
1452                 scsi_set_tag_type(sdev, tag_type);
1453                 if (tag_type)
1454                         scsi_activate_tcq(sdev, sdev->queue_depth);
1455                 else
1456                         scsi_deactivate_tcq(sdev, sdev->queue_depth);
1457         } else
1458                 tag_type = 0;
1459
1460         return tag_type;
1461 }
1462
1463 static void
1464 qla2x00_host_ramp_down_queuedepth(scsi_qla_host_t *vha)
1465 {
1466         scsi_qla_host_t *vp;
1467         struct Scsi_Host *shost;
1468         struct scsi_device *sdev;
1469         struct qla_hw_data *ha = vha->hw;
1470         unsigned long flags;
1471
1472         ha->host_last_rampdown_time = jiffies;
1473
1474         if (ha->cfg_lun_q_depth <= vha->host->cmd_per_lun)
1475                 return;
1476
1477         if ((ha->cfg_lun_q_depth / 2) < vha->host->cmd_per_lun)
1478                 ha->cfg_lun_q_depth = vha->host->cmd_per_lun;
1479         else
1480                 ha->cfg_lun_q_depth = ha->cfg_lun_q_depth / 2;
1481
1482         /*
1483          * Geometrically ramp down the queue depth for all devices on this
1484          * adapter
1485          */
1486         spin_lock_irqsave(&ha->vport_slock, flags);
1487         list_for_each_entry(vp, &ha->vp_list, list) {
1488                 shost = vp->host;
1489                 shost_for_each_device(sdev, shost) {
1490                         if (sdev->queue_depth > shost->cmd_per_lun) {
1491                                 if (sdev->queue_depth < ha->cfg_lun_q_depth)
1492                                         continue;
1493                                 ql_log(ql_log_warn, vp, 0x3031,
1494                                     "%ld:%d:%d: Ramping down queue depth to %d",
1495                                     vp->host_no, sdev->id, sdev->lun,
1496                                     ha->cfg_lun_q_depth);
1497                                 qla2x00_change_queue_depth(sdev,
1498                                     ha->cfg_lun_q_depth, SCSI_QDEPTH_DEFAULT);
1499                         }
1500                 }
1501         }
1502         spin_unlock_irqrestore(&ha->vport_slock, flags);
1503
1504         return;
1505 }
1506
1507 static void
1508 qla2x00_host_ramp_up_queuedepth(scsi_qla_host_t *vha)
1509 {
1510         scsi_qla_host_t *vp;
1511         struct Scsi_Host *shost;
1512         struct scsi_device *sdev;
1513         struct qla_hw_data *ha = vha->hw;
1514         unsigned long flags;
1515
1516         ha->host_last_rampup_time = jiffies;
1517         ha->cfg_lun_q_depth++;
1518
1519         /*
1520          * Linearly ramp up the queue depth for all devices on this
1521          * adapter
1522          */
1523         spin_lock_irqsave(&ha->vport_slock, flags);
1524         list_for_each_entry(vp, &ha->vp_list, list) {
1525                 shost = vp->host;
1526                 shost_for_each_device(sdev, shost) {
1527                         if (sdev->queue_depth > ha->cfg_lun_q_depth)
1528                                 continue;
1529                         qla2x00_change_queue_depth(sdev, ha->cfg_lun_q_depth,
1530                             SCSI_QDEPTH_RAMP_UP);
1531                 }
1532         }
1533         spin_unlock_irqrestore(&ha->vport_slock, flags);
1534
1535         return;
1536 }
1537
1538 /**
1539  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1540  * @ha: HA context
1541  *
1542  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1543  * supported addressing method.
1544  */
1545 static void
1546 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1547 {
1548         /* Assume a 32bit DMA mask. */
1549         ha->flags.enable_64bit_addressing = 0;
1550
1551         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1552                 /* Any upper-dword bits set? */
1553                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1554                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1555                         /* Ok, a 64bit DMA mask is applicable. */
1556                         ha->flags.enable_64bit_addressing = 1;
1557                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1558                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1559                         return;
1560                 }
1561         }
1562
1563         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1564         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1565 }
1566
1567 static void
1568 qla2x00_enable_intrs(struct qla_hw_data *ha)
1569 {
1570         unsigned long flags = 0;
1571         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1572
1573         spin_lock_irqsave(&ha->hardware_lock, flags);
1574         ha->interrupts_on = 1;
1575         /* enable risc and host interrupts */
1576         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1577         RD_REG_WORD(&reg->ictrl);
1578         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1579
1580 }
1581
1582 static void
1583 qla2x00_disable_intrs(struct qla_hw_data *ha)
1584 {
1585         unsigned long flags = 0;
1586         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1587
1588         spin_lock_irqsave(&ha->hardware_lock, flags);
1589         ha->interrupts_on = 0;
1590         /* disable risc and host interrupts */
1591         WRT_REG_WORD(&reg->ictrl, 0);
1592         RD_REG_WORD(&reg->ictrl);
1593         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1594 }
1595
1596 static void
1597 qla24xx_enable_intrs(struct qla_hw_data *ha)
1598 {
1599         unsigned long flags = 0;
1600         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1601
1602         spin_lock_irqsave(&ha->hardware_lock, flags);
1603         ha->interrupts_on = 1;
1604         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1605         RD_REG_DWORD(&reg->ictrl);
1606         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1607 }
1608
1609 static void
1610 qla24xx_disable_intrs(struct qla_hw_data *ha)
1611 {
1612         unsigned long flags = 0;
1613         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1614
1615         if (IS_NOPOLLING_TYPE(ha))
1616                 return;
1617         spin_lock_irqsave(&ha->hardware_lock, flags);
1618         ha->interrupts_on = 0;
1619         WRT_REG_DWORD(&reg->ictrl, 0);
1620         RD_REG_DWORD(&reg->ictrl);
1621         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1622 }
1623
1624 static int
1625 qla2x00_iospace_config(struct qla_hw_data *ha)
1626 {
1627         resource_size_t pio;
1628         uint16_t msix;
1629         int cpus;
1630
1631         if (pci_request_selected_regions(ha->pdev, ha->bars,
1632             QLA2XXX_DRIVER_NAME)) {
1633                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1634                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1635                     pci_name(ha->pdev));
1636                 goto iospace_error_exit;
1637         }
1638         if (!(ha->bars & 1))
1639                 goto skip_pio;
1640
1641         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1642         pio = pci_resource_start(ha->pdev, 0);
1643         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1644                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1645                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1646                             "Invalid pci I/O region size (%s).\n",
1647                             pci_name(ha->pdev));
1648                         pio = 0;
1649                 }
1650         } else {
1651                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1652                     "Region #0 no a PIO resource (%s).\n",
1653                     pci_name(ha->pdev));
1654                 pio = 0;
1655         }
1656         ha->pio_address = pio;
1657         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1658             "PIO address=%llu.\n",
1659             (unsigned long long)ha->pio_address);
1660
1661 skip_pio:
1662         /* Use MMIO operations for all accesses. */
1663         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1664                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1665                     "Region #1 not an MMIO resource (%s), aborting.\n",
1666                     pci_name(ha->pdev));
1667                 goto iospace_error_exit;
1668         }
1669         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1670                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1671                     "Invalid PCI mem region size (%s), aborting.\n",
1672                     pci_name(ha->pdev));
1673                 goto iospace_error_exit;
1674         }
1675
1676         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1677         if (!ha->iobase) {
1678                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1679                     "Cannot remap MMIO (%s), aborting.\n",
1680                     pci_name(ha->pdev));
1681                 goto iospace_error_exit;
1682         }
1683
1684         /* Determine queue resources */
1685         ha->max_req_queues = ha->max_rsp_queues = 1;
1686         if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
1687                 (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
1688                 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1689                 goto mqiobase_exit;
1690
1691         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1692                         pci_resource_len(ha->pdev, 3));
1693         if (ha->mqiobase) {
1694                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1695                     "MQIO Base=%p.\n", ha->mqiobase);
1696                 /* Read MSIX vector size of the board */
1697                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1698                 ha->msix_count = msix;
1699                 /* Max queues are bounded by available msix vectors */
1700                 /* queue 0 uses two msix vectors */
1701                 if (ql2xmultique_tag) {
1702                         cpus = num_online_cpus();
1703                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1704                                 (cpus + 1) : (ha->msix_count - 1);
1705                         ha->max_req_queues = 2;
1706                 } else if (ql2xmaxqueues > 1) {
1707                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1708                             QLA_MQ_SIZE : ql2xmaxqueues;
1709                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc008,
1710                             "QoS mode set, max no of request queues:%d.\n",
1711                             ha->max_req_queues);
1712                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0019,
1713                             "QoS mode set, max no of request queues:%d.\n",
1714                             ha->max_req_queues);
1715                 }
1716                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1717                     "MSI-X vector count: %d.\n", msix);
1718         } else
1719                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
1720                     "BAR 3 not enabled.\n");
1721
1722 mqiobase_exit:
1723         ha->msix_count = ha->max_rsp_queues + 1;
1724         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
1725             "MSIX Count:%d.\n", ha->msix_count);
1726         return (0);
1727
1728 iospace_error_exit:
1729         return (-ENOMEM);
1730 }
1731
1732
1733 static int
1734 qla83xx_iospace_config(struct qla_hw_data *ha)
1735 {
1736         uint16_t msix;
1737         int cpus;
1738
1739         if (pci_request_selected_regions(ha->pdev, ha->bars,
1740             QLA2XXX_DRIVER_NAME)) {
1741                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
1742                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1743                     pci_name(ha->pdev));
1744
1745                 goto iospace_error_exit;
1746         }
1747
1748         /* Use MMIO operations for all accesses. */
1749         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
1750                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
1751                     "Invalid pci I/O region size (%s).\n",
1752                     pci_name(ha->pdev));
1753                 goto iospace_error_exit;
1754         }
1755         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1756                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
1757                     "Invalid PCI mem region size (%s), aborting\n",
1758                         pci_name(ha->pdev));
1759                 goto iospace_error_exit;
1760         }
1761
1762         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
1763         if (!ha->iobase) {
1764                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
1765                     "Cannot remap MMIO (%s), aborting.\n",
1766                     pci_name(ha->pdev));
1767                 goto iospace_error_exit;
1768         }
1769
1770         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
1771         /* 83XX 26XX always use MQ type access for queues
1772          * - mbar 2, a.k.a region 4 */
1773         ha->max_req_queues = ha->max_rsp_queues = 1;
1774         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
1775                         pci_resource_len(ha->pdev, 4));
1776
1777         if (!ha->mqiobase) {
1778                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
1779                     "BAR2/region4 not enabled\n");
1780                 goto mqiobase_exit;
1781         }
1782
1783         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
1784                         pci_resource_len(ha->pdev, 2));
1785         if (ha->msixbase) {
1786                 /* Read MSIX vector size of the board */
1787                 pci_read_config_word(ha->pdev,
1788                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
1789                 ha->msix_count = msix;
1790                 /* Max queues are bounded by available msix vectors */
1791                 /* queue 0 uses two msix vectors */
1792                 if (ql2xmultique_tag) {
1793                         cpus = num_online_cpus();
1794                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1795                                 (cpus + 1) : (ha->msix_count - 1);
1796                         ha->max_req_queues = 2;
1797                 } else if (ql2xmaxqueues > 1) {
1798                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1799                                                 QLA_MQ_SIZE : ql2xmaxqueues;
1800                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc00c,
1801                             "QoS mode set, max no of request queues:%d.\n",
1802                             ha->max_req_queues);
1803                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
1804                             "QoS mode set, max no of request queues:%d.\n",
1805                             ha->max_req_queues);
1806                 }
1807                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
1808                     "MSI-X vector count: %d.\n", msix);
1809         } else
1810                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
1811                     "BAR 1 not enabled.\n");
1812
1813 mqiobase_exit:
1814         ha->msix_count = ha->max_rsp_queues + 1;
1815
1816         qlt_83xx_iospace_config(ha);
1817
1818         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
1819             "MSIX Count:%d.\n", ha->msix_count);
1820         return 0;
1821
1822 iospace_error_exit:
1823         return -ENOMEM;
1824 }
1825
1826 static struct isp_operations qla2100_isp_ops = {
1827         .pci_config             = qla2100_pci_config,
1828         .reset_chip             = qla2x00_reset_chip,
1829         .chip_diag              = qla2x00_chip_diag,
1830         .config_rings           = qla2x00_config_rings,
1831         .reset_adapter          = qla2x00_reset_adapter,
1832         .nvram_config           = qla2x00_nvram_config,
1833         .update_fw_options      = qla2x00_update_fw_options,
1834         .load_risc              = qla2x00_load_risc,
1835         .pci_info_str           = qla2x00_pci_info_str,
1836         .fw_version_str         = qla2x00_fw_version_str,
1837         .intr_handler           = qla2100_intr_handler,
1838         .enable_intrs           = qla2x00_enable_intrs,
1839         .disable_intrs          = qla2x00_disable_intrs,
1840         .abort_command          = qla2x00_abort_command,
1841         .target_reset           = qla2x00_abort_target,
1842         .lun_reset              = qla2x00_lun_reset,
1843         .fabric_login           = qla2x00_login_fabric,
1844         .fabric_logout          = qla2x00_fabric_logout,
1845         .calc_req_entries       = qla2x00_calc_iocbs_32,
1846         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1847         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1848         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1849         .read_nvram             = qla2x00_read_nvram_data,
1850         .write_nvram            = qla2x00_write_nvram_data,
1851         .fw_dump                = qla2100_fw_dump,
1852         .beacon_on              = NULL,
1853         .beacon_off             = NULL,
1854         .beacon_blink           = NULL,
1855         .read_optrom            = qla2x00_read_optrom_data,
1856         .write_optrom           = qla2x00_write_optrom_data,
1857         .get_flash_version      = qla2x00_get_flash_version,
1858         .start_scsi             = qla2x00_start_scsi,
1859         .abort_isp              = qla2x00_abort_isp,
1860         .iospace_config         = qla2x00_iospace_config,
1861 };
1862
1863 static struct isp_operations qla2300_isp_ops = {
1864         .pci_config             = qla2300_pci_config,
1865         .reset_chip             = qla2x00_reset_chip,
1866         .chip_diag              = qla2x00_chip_diag,
1867         .config_rings           = qla2x00_config_rings,
1868         .reset_adapter          = qla2x00_reset_adapter,
1869         .nvram_config           = qla2x00_nvram_config,
1870         .update_fw_options      = qla2x00_update_fw_options,
1871         .load_risc              = qla2x00_load_risc,
1872         .pci_info_str           = qla2x00_pci_info_str,
1873         .fw_version_str         = qla2x00_fw_version_str,
1874         .intr_handler           = qla2300_intr_handler,
1875         .enable_intrs           = qla2x00_enable_intrs,
1876         .disable_intrs          = qla2x00_disable_intrs,
1877         .abort_command          = qla2x00_abort_command,
1878         .target_reset           = qla2x00_abort_target,
1879         .lun_reset              = qla2x00_lun_reset,
1880         .fabric_login           = qla2x00_login_fabric,
1881         .fabric_logout          = qla2x00_fabric_logout,
1882         .calc_req_entries       = qla2x00_calc_iocbs_32,
1883         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1884         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1885         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1886         .read_nvram             = qla2x00_read_nvram_data,
1887         .write_nvram            = qla2x00_write_nvram_data,
1888         .fw_dump                = qla2300_fw_dump,
1889         .beacon_on              = qla2x00_beacon_on,
1890         .beacon_off             = qla2x00_beacon_off,
1891         .beacon_blink           = qla2x00_beacon_blink,
1892         .read_optrom            = qla2x00_read_optrom_data,
1893         .write_optrom           = qla2x00_write_optrom_data,
1894         .get_flash_version      = qla2x00_get_flash_version,
1895         .start_scsi             = qla2x00_start_scsi,
1896         .abort_isp              = qla2x00_abort_isp,
1897         .iospace_config         = qla2x00_iospace_config,
1898 };
1899
1900 static struct isp_operations qla24xx_isp_ops = {
1901         .pci_config             = qla24xx_pci_config,
1902         .reset_chip             = qla24xx_reset_chip,
1903         .chip_diag              = qla24xx_chip_diag,
1904         .config_rings           = qla24xx_config_rings,
1905         .reset_adapter          = qla24xx_reset_adapter,
1906         .nvram_config           = qla24xx_nvram_config,
1907         .update_fw_options      = qla24xx_update_fw_options,
1908         .load_risc              = qla24xx_load_risc,
1909         .pci_info_str           = qla24xx_pci_info_str,
1910         .fw_version_str         = qla24xx_fw_version_str,
1911         .intr_handler           = qla24xx_intr_handler,
1912         .enable_intrs           = qla24xx_enable_intrs,
1913         .disable_intrs          = qla24xx_disable_intrs,
1914         .abort_command          = qla24xx_abort_command,
1915         .target_reset           = qla24xx_abort_target,
1916         .lun_reset              = qla24xx_lun_reset,
1917         .fabric_login           = qla24xx_login_fabric,
1918         .fabric_logout          = qla24xx_fabric_logout,
1919         .calc_req_entries       = NULL,
1920         .build_iocbs            = NULL,
1921         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1922         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1923         .read_nvram             = qla24xx_read_nvram_data,
1924         .write_nvram            = qla24xx_write_nvram_data,
1925         .fw_dump                = qla24xx_fw_dump,
1926         .beacon_on              = qla24xx_beacon_on,
1927         .beacon_off             = qla24xx_beacon_off,
1928         .beacon_blink           = qla24xx_beacon_blink,
1929         .read_optrom            = qla24xx_read_optrom_data,
1930         .write_optrom           = qla24xx_write_optrom_data,
1931         .get_flash_version      = qla24xx_get_flash_version,
1932         .start_scsi             = qla24xx_start_scsi,
1933         .abort_isp              = qla2x00_abort_isp,
1934         .iospace_config         = qla2x00_iospace_config,
1935 };
1936
1937 static struct isp_operations qla25xx_isp_ops = {
1938         .pci_config             = qla25xx_pci_config,
1939         .reset_chip             = qla24xx_reset_chip,
1940         .chip_diag              = qla24xx_chip_diag,
1941         .config_rings           = qla24xx_config_rings,
1942         .reset_adapter          = qla24xx_reset_adapter,
1943         .nvram_config           = qla24xx_nvram_config,
1944         .update_fw_options      = qla24xx_update_fw_options,
1945         .load_risc              = qla24xx_load_risc,
1946         .pci_info_str           = qla24xx_pci_info_str,
1947         .fw_version_str         = qla24xx_fw_version_str,
1948         .intr_handler           = qla24xx_intr_handler,
1949         .enable_intrs           = qla24xx_enable_intrs,
1950         .disable_intrs          = qla24xx_disable_intrs,
1951         .abort_command          = qla24xx_abort_command,
1952         .target_reset           = qla24xx_abort_target,
1953         .lun_reset              = qla24xx_lun_reset,
1954         .fabric_login           = qla24xx_login_fabric,
1955         .fabric_logout          = qla24xx_fabric_logout,
1956         .calc_req_entries       = NULL,
1957         .build_iocbs            = NULL,
1958         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1959         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1960         .read_nvram             = qla25xx_read_nvram_data,
1961         .write_nvram            = qla25xx_write_nvram_data,
1962         .fw_dump                = qla25xx_fw_dump,
1963         .beacon_on              = qla24xx_beacon_on,
1964         .beacon_off             = qla24xx_beacon_off,
1965         .beacon_blink           = qla24xx_beacon_blink,
1966         .read_optrom            = qla25xx_read_optrom_data,
1967         .write_optrom           = qla24xx_write_optrom_data,
1968         .get_flash_version      = qla24xx_get_flash_version,
1969         .start_scsi             = qla24xx_dif_start_scsi,
1970         .abort_isp              = qla2x00_abort_isp,
1971         .iospace_config         = qla2x00_iospace_config,
1972 };
1973
1974 static struct isp_operations qla81xx_isp_ops = {
1975         .pci_config             = qla25xx_pci_config,
1976         .reset_chip             = qla24xx_reset_chip,
1977         .chip_diag              = qla24xx_chip_diag,
1978         .config_rings           = qla24xx_config_rings,
1979         .reset_adapter          = qla24xx_reset_adapter,
1980         .nvram_config           = qla81xx_nvram_config,
1981         .update_fw_options      = qla81xx_update_fw_options,
1982         .load_risc              = qla81xx_load_risc,
1983         .pci_info_str           = qla24xx_pci_info_str,
1984         .fw_version_str         = qla24xx_fw_version_str,
1985         .intr_handler           = qla24xx_intr_handler,
1986         .enable_intrs           = qla24xx_enable_intrs,
1987         .disable_intrs          = qla24xx_disable_intrs,
1988         .abort_command          = qla24xx_abort_command,
1989         .target_reset           = qla24xx_abort_target,
1990         .lun_reset              = qla24xx_lun_reset,
1991         .fabric_login           = qla24xx_login_fabric,
1992         .fabric_logout          = qla24xx_fabric_logout,
1993         .calc_req_entries       = NULL,
1994         .build_iocbs            = NULL,
1995         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1996         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1997         .read_nvram             = NULL,
1998         .write_nvram            = NULL,
1999         .fw_dump                = qla81xx_fw_dump,
2000         .beacon_on              = qla24xx_beacon_on,
2001         .beacon_off             = qla24xx_beacon_off,
2002         .beacon_blink           = qla83xx_beacon_blink,
2003         .read_optrom            = qla25xx_read_optrom_data,
2004         .write_optrom           = qla24xx_write_optrom_data,
2005         .get_flash_version      = qla24xx_get_flash_version,
2006         .start_scsi             = qla24xx_dif_start_scsi,
2007         .abort_isp              = qla2x00_abort_isp,
2008         .iospace_config         = qla2x00_iospace_config,
2009 };
2010
2011 static struct isp_operations qla82xx_isp_ops = {
2012         .pci_config             = qla82xx_pci_config,
2013         .reset_chip             = qla82xx_reset_chip,
2014         .chip_diag              = qla24xx_chip_diag,
2015         .config_rings           = qla82xx_config_rings,
2016         .reset_adapter          = qla24xx_reset_adapter,
2017         .nvram_config           = qla81xx_nvram_config,
2018         .update_fw_options      = qla24xx_update_fw_options,
2019         .load_risc              = qla82xx_load_risc,
2020         .pci_info_str           = qla24xx_pci_info_str,
2021         .fw_version_str         = qla24xx_fw_version_str,
2022         .intr_handler           = qla82xx_intr_handler,
2023         .enable_intrs           = qla82xx_enable_intrs,
2024         .disable_intrs          = qla82xx_disable_intrs,
2025         .abort_command          = qla24xx_abort_command,
2026         .target_reset           = qla24xx_abort_target,
2027         .lun_reset              = qla24xx_lun_reset,
2028         .fabric_login           = qla24xx_login_fabric,
2029         .fabric_logout          = qla24xx_fabric_logout,
2030         .calc_req_entries       = NULL,
2031         .build_iocbs            = NULL,
2032         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2033         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2034         .read_nvram             = qla24xx_read_nvram_data,
2035         .write_nvram            = qla24xx_write_nvram_data,
2036         .fw_dump                = qla24xx_fw_dump,
2037         .beacon_on              = qla82xx_beacon_on,
2038         .beacon_off             = qla82xx_beacon_off,
2039         .beacon_blink           = NULL,
2040         .read_optrom            = qla82xx_read_optrom_data,
2041         .write_optrom           = qla82xx_write_optrom_data,
2042         .get_flash_version      = qla24xx_get_flash_version,
2043         .start_scsi             = qla82xx_start_scsi,
2044         .abort_isp              = qla82xx_abort_isp,
2045         .iospace_config         = qla82xx_iospace_config,
2046 };
2047
2048 static struct isp_operations qla83xx_isp_ops = {
2049         .pci_config             = qla25xx_pci_config,
2050         .reset_chip             = qla24xx_reset_chip,
2051         .chip_diag              = qla24xx_chip_diag,
2052         .config_rings           = qla24xx_config_rings,
2053         .reset_adapter          = qla24xx_reset_adapter,
2054         .nvram_config           = qla81xx_nvram_config,
2055         .update_fw_options      = qla81xx_update_fw_options,
2056         .load_risc              = qla81xx_load_risc,
2057         .pci_info_str           = qla24xx_pci_info_str,
2058         .fw_version_str         = qla24xx_fw_version_str,
2059         .intr_handler           = qla24xx_intr_handler,
2060         .enable_intrs           = qla24xx_enable_intrs,
2061         .disable_intrs          = qla24xx_disable_intrs,
2062         .abort_command          = qla24xx_abort_command,
2063         .target_reset           = qla24xx_abort_target,
2064         .lun_reset              = qla24xx_lun_reset,
2065         .fabric_login           = qla24xx_login_fabric,
2066         .fabric_logout          = qla24xx_fabric_logout,
2067         .calc_req_entries       = NULL,
2068         .build_iocbs            = NULL,
2069         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2070         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2071         .read_nvram             = NULL,
2072         .write_nvram            = NULL,
2073         .fw_dump                = qla83xx_fw_dump,
2074         .beacon_on              = qla24xx_beacon_on,
2075         .beacon_off             = qla24xx_beacon_off,
2076         .beacon_blink           = qla83xx_beacon_blink,
2077         .read_optrom            = qla25xx_read_optrom_data,
2078         .write_optrom           = qla24xx_write_optrom_data,
2079         .get_flash_version      = qla24xx_get_flash_version,
2080         .start_scsi             = qla24xx_dif_start_scsi,
2081         .abort_isp              = qla2x00_abort_isp,
2082         .iospace_config         = qla83xx_iospace_config,
2083 };
2084
2085 static inline void
2086 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2087 {
2088         ha->device_type = DT_EXTENDED_IDS;
2089         switch (ha->pdev->device) {
2090         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2091                 ha->device_type |= DT_ISP2100;
2092                 ha->device_type &= ~DT_EXTENDED_IDS;
2093                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2094                 break;
2095         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2096                 ha->device_type |= DT_ISP2200;
2097                 ha->device_type &= ~DT_EXTENDED_IDS;
2098                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2099                 break;
2100         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2101                 ha->device_type |= DT_ISP2300;
2102                 ha->device_type |= DT_ZIO_SUPPORTED;
2103                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2104                 break;
2105         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2106                 ha->device_type |= DT_ISP2312;
2107                 ha->device_type |= DT_ZIO_SUPPORTED;
2108                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2109                 break;
2110         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2111                 ha->device_type |= DT_ISP2322;
2112                 ha->device_type |= DT_ZIO_SUPPORTED;
2113                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2114                     ha->pdev->subsystem_device == 0x0170)
2115                         ha->device_type |= DT_OEM_001;
2116                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2117                 break;
2118         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2119                 ha->device_type |= DT_ISP6312;
2120                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2121                 break;
2122         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2123                 ha->device_type |= DT_ISP6322;
2124                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2125                 break;
2126         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2127                 ha->device_type |= DT_ISP2422;
2128                 ha->device_type |= DT_ZIO_SUPPORTED;
2129                 ha->device_type |= DT_FWI2;
2130                 ha->device_type |= DT_IIDMA;
2131                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2132                 break;
2133         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2134                 ha->device_type |= DT_ISP2432;
2135                 ha->device_type |= DT_ZIO_SUPPORTED;
2136                 ha->device_type |= DT_FWI2;
2137                 ha->device_type |= DT_IIDMA;
2138                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2139                 break;
2140         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2141                 ha->device_type |= DT_ISP8432;
2142                 ha->device_type |= DT_ZIO_SUPPORTED;
2143                 ha->device_type |= DT_FWI2;
2144                 ha->device_type |= DT_IIDMA;
2145                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2146                 break;
2147         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2148                 ha->device_type |= DT_ISP5422;
2149                 ha->device_type |= DT_FWI2;
2150                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2151                 break;
2152         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2153                 ha->device_type |= DT_ISP5432;
2154                 ha->device_type |= DT_FWI2;
2155                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2156                 break;
2157         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2158                 ha->device_type |= DT_ISP2532;
2159                 ha->device_type |= DT_ZIO_SUPPORTED;
2160                 ha->device_type |= DT_FWI2;
2161                 ha->device_type |= DT_IIDMA;
2162                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2163                 break;
2164         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2165                 ha->device_type |= DT_ISP8001;
2166                 ha->device_type |= DT_ZIO_SUPPORTED;
2167                 ha->device_type |= DT_FWI2;
2168                 ha->device_type |= DT_IIDMA;
2169                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2170                 break;
2171         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2172                 ha->device_type |= DT_ISP8021;
2173                 ha->device_type |= DT_ZIO_SUPPORTED;
2174                 ha->device_type |= DT_FWI2;
2175                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2176                 /* Initialize 82XX ISP flags */
2177                 qla82xx_init_flags(ha);
2178                 break;
2179         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2180                 ha->device_type |= DT_ISP2031;
2181                 ha->device_type |= DT_ZIO_SUPPORTED;
2182                 ha->device_type |= DT_FWI2;
2183                 ha->device_type |= DT_IIDMA;
2184                 ha->device_type |= DT_T10_PI;
2185                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2186                 break;
2187         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2188                 ha->device_type |= DT_ISP8031;
2189                 ha->device_type |= DT_ZIO_SUPPORTED;
2190                 ha->device_type |= DT_FWI2;
2191                 ha->device_type |= DT_IIDMA;
2192                 ha->device_type |= DT_T10_PI;
2193                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2194                 break;
2195         }
2196
2197         if (IS_QLA82XX(ha))
2198                 ha->port_no = !(ha->portnum & 1);
2199         else
2200                 /* Get adapter physical port no from interrupt pin register. */
2201                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2202
2203         if (ha->port_no & 1)
2204                 ha->flags.port0 = 1;
2205         else
2206                 ha->flags.port0 = 0;
2207         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2208             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2209             ha->device_type, ha->flags.port0, ha->fw_srisc_address);
2210 }
2211
2212 static void
2213 qla2xxx_scan_start(struct Scsi_Host *shost)
2214 {
2215         scsi_qla_host_t *vha = shost_priv(shost);
2216
2217         if (vha->hw->flags.running_gold_fw)
2218                 return;
2219
2220         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2221         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2222         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2223         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2224 }
2225
2226 static int
2227 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2228 {
2229         scsi_qla_host_t *vha = shost_priv(shost);
2230
2231         if (!vha->host)
2232                 return 1;
2233         if (time > vha->hw->loop_reset_delay * HZ)
2234                 return 1;
2235
2236         return atomic_read(&vha->loop_state) == LOOP_READY;
2237 }
2238
2239 /*
2240  * PCI driver interface
2241  */
2242 static int
2243 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2244 {
2245         int     ret = -ENODEV;
2246         struct Scsi_Host *host;
2247         scsi_qla_host_t *base_vha = NULL;
2248         struct qla_hw_data *ha;
2249         char pci_info[30];
2250         char fw_str[30], wq_name[30];
2251         struct scsi_host_template *sht;
2252         int bars, mem_only = 0;
2253         uint16_t req_length = 0, rsp_length = 0;
2254         struct req_que *req = NULL;
2255         struct rsp_que *rsp = NULL;
2256
2257         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2258         sht = &qla2xxx_driver_template;
2259         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2260             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2261             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2262             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2263             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2264             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2265             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2266             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2267             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2268             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031) {
2269                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2270                 mem_only = 1;
2271                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2272                     "Mem only adapter.\n");
2273         }
2274         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2275             "Bars=%d.\n", bars);
2276
2277         if (mem_only) {
2278                 if (pci_enable_device_mem(pdev))
2279                         goto probe_out;
2280         } else {
2281                 if (pci_enable_device(pdev))
2282                         goto probe_out;
2283         }
2284
2285         /* This may fail but that's ok */
2286         pci_enable_pcie_error_reporting(pdev);
2287
2288         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2289         if (!ha) {
2290                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2291                     "Unable to allocate memory for ha.\n");
2292                 goto probe_out;
2293         }
2294         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2295             "Memory allocated for ha=%p.\n", ha);
2296         ha->pdev = pdev;
2297         ha->tgt.enable_class_2 = ql2xenableclass2;
2298
2299         /* Clear our data area */
2300         ha->bars = bars;
2301         ha->mem_only = mem_only;
2302         spin_lock_init(&ha->hardware_lock);
2303         spin_lock_init(&ha->vport_slock);
2304         mutex_init(&ha->selflogin_lock);
2305
2306         /* Set ISP-type information. */
2307         qla2x00_set_isp_flags(ha);
2308
2309         /* Set EEH reset type to fundamental if required by hba */
2310         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2311             IS_QLA83XX(ha))
2312                 pdev->needs_freset = 1;
2313
2314         ha->prev_topology = 0;
2315         ha->init_cb_size = sizeof(init_cb_t);
2316         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2317         ha->optrom_size = OPTROM_SIZE_2300;
2318         ha->cfg_lun_q_depth = ql2xmaxqdepth;
2319
2320         /* Assign ISP specific operations. */
2321         if (IS_QLA2100(ha)) {
2322                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2323                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2324                 req_length = REQUEST_ENTRY_CNT_2100;
2325                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2326                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2327                 ha->gid_list_info_size = 4;
2328                 ha->flash_conf_off = ~0;
2329                 ha->flash_data_off = ~0;
2330                 ha->nvram_conf_off = ~0;
2331                 ha->nvram_data_off = ~0;
2332                 ha->isp_ops = &qla2100_isp_ops;
2333         } else if (IS_QLA2200(ha)) {
2334                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2335                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2336                 req_length = REQUEST_ENTRY_CNT_2200;
2337                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2338                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2339                 ha->gid_list_info_size = 4;
2340                 ha->flash_conf_off = ~0;
2341                 ha->flash_data_off = ~0;
2342                 ha->nvram_conf_off = ~0;
2343                 ha->nvram_data_off = ~0;
2344                 ha->isp_ops = &qla2100_isp_ops;
2345         } else if (IS_QLA23XX(ha)) {
2346                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2347                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2348                 req_length = REQUEST_ENTRY_CNT_2200;
2349                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2350                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2351                 ha->gid_list_info_size = 6;
2352                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2353                         ha->optrom_size = OPTROM_SIZE_2322;
2354                 ha->flash_conf_off = ~0;
2355                 ha->flash_data_off = ~0;
2356                 ha->nvram_conf_off = ~0;
2357                 ha->nvram_data_off = ~0;
2358                 ha->isp_ops = &qla2300_isp_ops;
2359         } else if (IS_QLA24XX_TYPE(ha)) {
2360                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2361                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2362                 req_length = REQUEST_ENTRY_CNT_24XX;
2363                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2364                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2365                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2366                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2367                 ha->gid_list_info_size = 8;
2368                 ha->optrom_size = OPTROM_SIZE_24XX;
2369                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2370                 ha->isp_ops = &qla24xx_isp_ops;
2371                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2372                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2373                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2374                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2375         } else if (IS_QLA25XX(ha)) {
2376                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2377                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2378                 req_length = REQUEST_ENTRY_CNT_24XX;
2379                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2380                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2381                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2382                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2383                 ha->gid_list_info_size = 8;
2384                 ha->optrom_size = OPTROM_SIZE_25XX;
2385                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2386                 ha->isp_ops = &qla25xx_isp_ops;
2387                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2388                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2389                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2390                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2391         } else if (IS_QLA81XX(ha)) {
2392                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2393                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2394                 req_length = REQUEST_ENTRY_CNT_24XX;
2395                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2396                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2397                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2398                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2399                 ha->gid_list_info_size = 8;
2400                 ha->optrom_size = OPTROM_SIZE_81XX;
2401                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2402                 ha->isp_ops = &qla81xx_isp_ops;
2403                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2404                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2405                 ha->nvram_conf_off = ~0;
2406                 ha->nvram_data_off = ~0;
2407         } else if (IS_QLA82XX(ha)) {
2408                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2409                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2410                 req_length = REQUEST_ENTRY_CNT_82XX;
2411                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2412                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2413                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2414                 ha->gid_list_info_size = 8;
2415                 ha->optrom_size = OPTROM_SIZE_82XX;
2416                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2417                 ha->isp_ops = &qla82xx_isp_ops;
2418                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2419                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2420                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2421                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2422         } else if (IS_QLA83XX(ha)) {
2423                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2424                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2425                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2426                 req_length = REQUEST_ENTRY_CNT_24XX;
2427                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2428                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2429                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2430                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2431                 ha->gid_list_info_size = 8;
2432                 ha->optrom_size = OPTROM_SIZE_83XX;
2433                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2434                 ha->isp_ops = &qla83xx_isp_ops;
2435                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2436                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2437                 ha->nvram_conf_off = ~0;
2438                 ha->nvram_data_off = ~0;
2439         }
2440
2441         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2442             "mbx_count=%d, req_length=%d, "
2443             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2444             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2445             "max_fibre_devices=%d.\n",
2446             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2447             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2448             ha->nvram_npiv_size, ha->max_fibre_devices);
2449         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2450             "isp_ops=%p, flash_conf_off=%d, "
2451             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2452             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2453             ha->nvram_conf_off, ha->nvram_data_off);
2454
2455         /* Configure PCI I/O space */
2456         ret = ha->isp_ops->iospace_config(ha);
2457         if (ret)
2458                 goto iospace_config_failed;
2459
2460         ql_log_pci(ql_log_info, pdev, 0x001d,
2461             "Found an ISP%04X irq %d iobase 0x%p.\n",
2462             pdev->device, pdev->irq, ha->iobase);
2463         mutex_init(&ha->vport_lock);
2464         init_completion(&ha->mbx_cmd_comp);
2465         complete(&ha->mbx_cmd_comp);
2466         init_completion(&ha->mbx_intr_comp);
2467         init_completion(&ha->dcbx_comp);
2468
2469         set_bit(0, (unsigned long *) ha->vp_idx_map);
2470
2471         qla2x00_config_dma_addressing(ha);
2472         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
2473             "64 Bit addressing is %s.\n",
2474             ha->flags.enable_64bit_addressing ? "enable" :
2475             "disable");
2476         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2477         if (!ret) {
2478                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
2479                     "Failed to allocate memory for adapter, aborting.\n");
2480
2481                 goto probe_hw_failed;
2482         }
2483
2484         req->max_q_depth = MAX_Q_DEPTH;
2485         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2486                 req->max_q_depth = ql2xmaxqdepth;
2487
2488
2489         base_vha = qla2x00_create_host(sht, ha);
2490         if (!base_vha) {
2491                 ret = -ENOMEM;
2492                 qla2x00_mem_free(ha);
2493                 qla2x00_free_req_que(ha, req);
2494                 qla2x00_free_rsp_que(ha, rsp);
2495                 goto probe_hw_failed;
2496         }
2497
2498         pci_set_drvdata(pdev, base_vha);
2499
2500         host = base_vha->host;
2501         base_vha->req = req;
2502         host->can_queue = req->length + 128;
2503         if (IS_QLA2XXX_MIDTYPE(ha))
2504                 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
2505         else
2506                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2507                                                 base_vha->vp_idx;
2508
2509         /* Set the SG table size based on ISP type */
2510         if (!IS_FWI2_CAPABLE(ha)) {
2511                 if (IS_QLA2100(ha))
2512                         host->sg_tablesize = 32;
2513         } else {
2514                 if (!IS_QLA82XX(ha))
2515                         host->sg_tablesize = QLA_SG_ALL;
2516         }
2517         ql_dbg(ql_dbg_init, base_vha, 0x0032,
2518             "can_queue=%d, req=%p, "
2519             "mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
2520             host->can_queue, base_vha->req,
2521             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
2522         host->max_id = ha->max_fibre_devices;
2523         host->cmd_per_lun = 3;
2524         host->unique_id = host->host_no;
2525         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
2526                 host->max_cmd_len = 32;
2527         else
2528                 host->max_cmd_len = MAX_CMDSZ;
2529         host->max_channel = MAX_BUSES - 1;
2530         host->max_lun = ql2xmaxlun;
2531         host->transportt = qla2xxx_transport_template;
2532         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
2533
2534         ql_dbg(ql_dbg_init, base_vha, 0x0033,
2535             "max_id=%d this_id=%d "
2536             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
2537             "max_lun=%d transportt=%p, vendor_id=%llu.\n", host->max_id,
2538             host->this_id, host->cmd_per_lun, host->unique_id,
2539             host->max_cmd_len, host->max_channel, host->max_lun,
2540             host->transportt, sht->vendor_id);
2541
2542 que_init:
2543         /* Alloc arrays of request and response ring ptrs */
2544         if (!qla2x00_alloc_queues(ha, req, rsp)) {
2545                 ql_log(ql_log_fatal, base_vha, 0x003d,
2546                     "Failed to allocate memory for queue pointers..."
2547                     "aborting.\n");
2548                 goto probe_init_failed;
2549         }
2550
2551         qlt_probe_one_stage1(base_vha, ha);
2552
2553         /* Set up the irqs */
2554         ret = qla2x00_request_irqs(ha, rsp);
2555         if (ret)
2556                 goto probe_init_failed;
2557
2558         pci_save_state(pdev);
2559
2560         /* Assign back pointers */
2561         rsp->req = req;
2562         req->rsp = rsp;
2563
2564         /* FWI2-capable only. */
2565         req->req_q_in = &ha->iobase->isp24.req_q_in;
2566         req->req_q_out = &ha->iobase->isp24.req_q_out;
2567         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2568         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
2569         if (ha->mqenable || IS_QLA83XX(ha)) {
2570                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2571                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2572                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2573                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
2574         }
2575
2576         if (IS_QLA82XX(ha)) {
2577                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2578                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2579                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2580         }
2581
2582         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
2583             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2584             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2585         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
2586             "req->req_q_in=%p req->req_q_out=%p "
2587             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2588             req->req_q_in, req->req_q_out,
2589             rsp->rsp_q_in, rsp->rsp_q_out);
2590         ql_dbg(ql_dbg_init, base_vha, 0x003e,
2591             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2592             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2593         ql_dbg(ql_dbg_init, base_vha, 0x003f,
2594             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2595             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
2596
2597         if (qla2x00_initialize_adapter(base_vha)) {
2598                 ql_log(ql_log_fatal, base_vha, 0x00d6,
2599                     "Failed to initialize adapter - Adapter flags %x.\n",
2600                     base_vha->device_flags);
2601
2602                 if (IS_QLA82XX(ha)) {
2603                         qla82xx_idc_lock(ha);
2604                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2605                                 QLA8XXX_DEV_FAILED);
2606                         qla82xx_idc_unlock(ha);
2607                         ql_log(ql_log_fatal, base_vha, 0x00d7,
2608                             "HW State: FAILED.\n");
2609                 }
2610
2611                 ret = -ENODEV;
2612                 goto probe_failed;
2613         }
2614
2615         if (ha->mqenable) {
2616                 if (qla25xx_setup_mode(base_vha)) {
2617                         ql_log(ql_log_warn, base_vha, 0x00ec,
2618                             "Failed to create queues, falling back to single queue mode.\n");
2619                         goto que_init;
2620                 }
2621         }
2622
2623         if (ha->flags.running_gold_fw)
2624                 goto skip_dpc;
2625
2626         /*
2627          * Startup the kernel thread for this host adapter
2628          */
2629         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
2630             "%s_dpc", base_vha->host_str);
2631         if (IS_ERR(ha->dpc_thread)) {
2632                 ql_log(ql_log_fatal, base_vha, 0x00ed,
2633                     "Failed to start DPC thread.\n");
2634                 ret = PTR_ERR(ha->dpc_thread);
2635                 goto probe_failed;
2636         }
2637         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
2638             "DPC thread started successfully.\n");
2639
2640         /*
2641          * If we're not coming up in initiator mode, we might sit for
2642          * a while without waking up the dpc thread, which leads to a
2643          * stuck process warning.  So just kick the dpc once here and
2644          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
2645          */
2646         qla2xxx_wake_dpc(base_vha);
2647
2648         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
2649                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
2650                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
2651                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
2652
2653                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
2654                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
2655                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
2656                 INIT_WORK(&ha->idc_state_handler,
2657                     qla83xx_idc_state_handler_work);
2658                 INIT_WORK(&ha->nic_core_unrecoverable,
2659                     qla83xx_nic_core_unrecoverable_work);
2660         }
2661
2662 skip_dpc:
2663         list_add_tail(&base_vha->list, &ha->vp_list);
2664         base_vha->host->irq = ha->pdev->irq;
2665
2666         /* Initialized the timer */
2667         qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
2668         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
2669             "Started qla2x00_timer with "
2670             "interval=%d.\n", WATCH_INTERVAL);
2671         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
2672             "Detected hba at address=%p.\n",
2673             ha);
2674
2675         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
2676                 if (ha->fw_attributes & BIT_4) {
2677                         int prot = 0, guard;
2678                         base_vha->flags.difdix_supported = 1;
2679                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
2680                             "Registering for DIF/DIX type 1 and 3 protection.\n");
2681                         if (ql2xenabledif == 1)
2682                                 prot = SHOST_DIX_TYPE0_PROTECTION;
2683                         scsi_host_set_prot(host,
2684                             prot | SHOST_DIF_TYPE1_PROTECTION
2685                             | SHOST_DIF_TYPE2_PROTECTION
2686                             | SHOST_DIF_TYPE3_PROTECTION
2687                             | SHOST_DIX_TYPE1_PROTECTION
2688                             | SHOST_DIX_TYPE2_PROTECTION
2689                             | SHOST_DIX_TYPE3_PROTECTION);
2690
2691                         guard = SHOST_DIX_GUARD_CRC;
2692
2693                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
2694                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
2695                                 guard |= SHOST_DIX_GUARD_IP;
2696
2697                         scsi_host_set_guard(host, guard);
2698                 } else
2699                         base_vha->flags.difdix_supported = 0;
2700         }
2701
2702         ha->isp_ops->enable_intrs(ha);
2703
2704         ret = scsi_add_host(host, &pdev->dev);
2705         if (ret)
2706                 goto probe_failed;
2707
2708         base_vha->flags.init_done = 1;
2709         base_vha->flags.online = 1;
2710
2711         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
2712             "Init done and hba is online.\n");
2713
2714         if (qla_ini_mode_enabled(base_vha))
2715                 scsi_scan_host(host);
2716         else
2717                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
2718                         "skipping scsi_scan_host() for non-initiator port\n");
2719
2720         qla2x00_alloc_sysfs_attr(base_vha);
2721
2722         qla2x00_init_host_attr(base_vha);
2723
2724         qla2x00_dfs_setup(base_vha);
2725
2726         ql_log(ql_log_info, base_vha, 0x00fb,
2727             "QLogic %s - %s.\n",
2728             ha->model_number, ha->model_desc ? ha->model_desc : "");
2729         ql_log(ql_log_info, base_vha, 0x00fc,
2730             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
2731             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
2732             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
2733             base_vha->host_no,
2734             ha->isp_ops->fw_version_str(base_vha, fw_str));
2735
2736         qlt_add_target(ha, base_vha);
2737
2738         return 0;
2739
2740 probe_init_failed:
2741         qla2x00_free_req_que(ha, req);
2742         ha->req_q_map[0] = NULL;
2743         clear_bit(0, ha->req_qid_map);
2744         qla2x00_free_rsp_que(ha, rsp);
2745         ha->rsp_q_map[0] = NULL;
2746         clear_bit(0, ha->rsp_qid_map);
2747         ha->max_req_queues = ha->max_rsp_queues = 0;
2748
2749 probe_failed:
2750         if (base_vha->timer_active)
2751                 qla2x00_stop_timer(base_vha);
2752         base_vha->flags.online = 0;
2753         if (ha->dpc_thread) {
2754                 struct task_struct *t = ha->dpc_thread;
2755
2756                 ha->dpc_thread = NULL;
2757                 kthread_stop(t);
2758         }
2759
2760         qla2x00_free_device(base_vha);
2761
2762         scsi_host_put(base_vha->host);
2763
2764 probe_hw_failed:
2765         if (IS_QLA82XX(ha)) {
2766                 qla82xx_idc_lock(ha);
2767                 qla82xx_clear_drv_active(ha);
2768                 qla82xx_idc_unlock(ha);
2769         }
2770 iospace_config_failed:
2771         if (IS_QLA82XX(ha)) {
2772                 if (!ha->nx_pcibase)
2773                         iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2774                 if (!ql2xdbwr)
2775                         iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2776         } else {
2777                 if (ha->iobase)
2778                         iounmap(ha->iobase);
2779         }
2780         pci_release_selected_regions(ha->pdev, ha->bars);
2781         kfree(ha);
2782         ha = NULL;
2783
2784 probe_out:
2785         pci_disable_device(pdev);
2786         return ret;
2787 }
2788
2789 static void
2790 qla2x00_stop_dpc_thread(scsi_qla_host_t *vha)
2791 {
2792         struct qla_hw_data *ha = vha->hw;
2793         struct task_struct *t = ha->dpc_thread;
2794
2795         if (ha->dpc_thread == NULL)
2796                 return;
2797         /*
2798          * qla2xxx_wake_dpc checks for ->dpc_thread
2799          * so we need to zero it out.
2800          */
2801         ha->dpc_thread = NULL;
2802         kthread_stop(t);
2803 }
2804
2805 static void
2806 qla2x00_shutdown(struct pci_dev *pdev)
2807 {
2808         scsi_qla_host_t *vha;
2809         struct qla_hw_data  *ha;
2810
2811         vha = pci_get_drvdata(pdev);
2812         ha = vha->hw;
2813
2814         /* Turn-off FCE trace */
2815         if (ha->flags.fce_enabled) {
2816                 qla2x00_disable_fce_trace(vha, NULL, NULL);
2817                 ha->flags.fce_enabled = 0;
2818         }
2819
2820         /* Turn-off EFT trace */
2821         if (ha->eft)
2822                 qla2x00_disable_eft_trace(vha);
2823
2824         /* Stop currently executing firmware. */
2825         qla2x00_try_to_stop_firmware(vha);
2826
2827         /* Turn adapter off line */
2828         vha->flags.online = 0;
2829
2830         /* turn-off interrupts on the card */
2831         if (ha->interrupts_on) {
2832                 vha->flags.init_done = 0;
2833                 ha->isp_ops->disable_intrs(ha);
2834         }
2835
2836         qla2x00_free_irqs(vha);
2837
2838         qla2x00_free_fw_dump(ha);
2839 }
2840
2841 static void
2842 qla2x00_remove_one(struct pci_dev *pdev)
2843 {
2844         scsi_qla_host_t *base_vha, *vha;
2845         struct qla_hw_data  *ha;
2846         unsigned long flags;
2847
2848         /*
2849          * If the PCI device is disabled that means that probe failed and any
2850          * resources should be have cleaned up on probe exit.
2851          */
2852         if (!atomic_read(&pdev->enable_cnt))
2853                 return;
2854
2855         base_vha = pci_get_drvdata(pdev);
2856         ha = base_vha->hw;
2857
2858         ha->flags.host_shutting_down = 1;
2859
2860         set_bit(UNLOADING, &base_vha->dpc_flags);
2861         mutex_lock(&ha->vport_lock);
2862         while (ha->cur_vport_count) {
2863                 struct Scsi_Host *scsi_host;
2864
2865                 spin_lock_irqsave(&ha->vport_slock, flags);
2866
2867                 BUG_ON(base_vha->list.next == &ha->vp_list);
2868                 /* This assumes first entry in ha->vp_list is always base vha */
2869                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
2870                 scsi_host = scsi_host_get(vha->host);
2871
2872                 spin_unlock_irqrestore(&ha->vport_slock, flags);
2873                 mutex_unlock(&ha->vport_lock);
2874
2875                 fc_vport_terminate(vha->fc_vport);
2876                 scsi_host_put(vha->host);
2877
2878                 mutex_lock(&ha->vport_lock);
2879         }
2880         mutex_unlock(&ha->vport_lock);
2881
2882         if (IS_QLA8031(ha)) {
2883                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
2884                     "Clearing fcoe driver presence.\n");
2885                 if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
2886                         ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
2887                             "Error while clearing DRV-Presence.\n");
2888         }
2889
2890         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
2891
2892         qla2x00_dfs_remove(base_vha);
2893
2894         qla84xx_put_chip(base_vha);
2895
2896         /* Disable timer */
2897         if (base_vha->timer_active)
2898                 qla2x00_stop_timer(base_vha);
2899
2900         base_vha->flags.online = 0;
2901
2902         /* Flush the work queue and remove it */
2903         if (ha->wq) {
2904                 flush_workqueue(ha->wq);
2905                 destroy_workqueue(ha->wq);
2906                 ha->wq = NULL;
2907         }
2908
2909         /* Cancel all work and destroy DPC workqueues */
2910         if (ha->dpc_lp_wq) {
2911                 cancel_work_sync(&ha->idc_aen);
2912                 destroy_workqueue(ha->dpc_lp_wq);
2913                 ha->dpc_lp_wq = NULL;
2914         }
2915
2916         if (ha->dpc_hp_wq) {
2917                 cancel_work_sync(&ha->nic_core_reset);
2918                 cancel_work_sync(&ha->idc_state_handler);
2919                 cancel_work_sync(&ha->nic_core_unrecoverable);
2920                 destroy_workqueue(ha->dpc_hp_wq);
2921                 ha->dpc_hp_wq = NULL;
2922         }
2923
2924         /* Kill the kernel thread for this host */
2925         if (ha->dpc_thread) {
2926                 struct task_struct *t = ha->dpc_thread;
2927
2928                 /*
2929                  * qla2xxx_wake_dpc checks for ->dpc_thread
2930                  * so we need to zero it out.
2931                  */
2932                 ha->dpc_thread = NULL;
2933                 kthread_stop(t);
2934         }
2935         qlt_remove_target(ha, base_vha);
2936
2937         qla2x00_free_sysfs_attr(base_vha);
2938
2939         fc_remove_host(base_vha->host);
2940
2941         scsi_remove_host(base_vha->host);
2942
2943         qla2x00_free_device(base_vha);
2944
2945         scsi_host_put(base_vha->host);
2946
2947         if (IS_QLA82XX(ha)) {
2948                 qla82xx_idc_lock(ha);
2949                 qla82xx_clear_drv_active(ha);
2950                 qla82xx_idc_unlock(ha);
2951
2952                 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2953                 if (!ql2xdbwr)
2954                         iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2955         } else {
2956                 if (ha->iobase)
2957                         iounmap(ha->iobase);
2958
2959                 if (ha->mqiobase)
2960                         iounmap(ha->mqiobase);
2961
2962                 if (IS_QLA83XX(ha) && ha->msixbase)
2963                         iounmap(ha->msixbase);
2964         }
2965
2966         pci_release_selected_regions(ha->pdev, ha->bars);
2967         kfree(ha);
2968         ha = NULL;
2969
2970         pci_disable_pcie_error_reporting(pdev);
2971
2972         pci_disable_device(pdev);
2973         pci_set_drvdata(pdev, NULL);
2974 }
2975
2976 static void
2977 qla2x00_free_device(scsi_qla_host_t *vha)
2978 {
2979         struct qla_hw_data *ha = vha->hw;
2980
2981         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
2982
2983         /* Disable timer */
2984         if (vha->timer_active)
2985                 qla2x00_stop_timer(vha);
2986
2987         qla2x00_stop_dpc_thread(vha);
2988
2989         qla25xx_delete_queues(vha);
2990         if (ha->flags.fce_enabled)
2991                 qla2x00_disable_fce_trace(vha, NULL, NULL);
2992
2993         if (ha->eft)
2994                 qla2x00_disable_eft_trace(vha);
2995
2996         /* Stop currently executing firmware. */
2997         qla2x00_try_to_stop_firmware(vha);
2998
2999         vha->flags.online = 0;
3000
3001         /* turn-off interrupts on the card */
3002         if (ha->interrupts_on) {
3003                 vha->flags.init_done = 0;
3004                 ha->isp_ops->disable_intrs(ha);
3005         }
3006
3007         qla2x00_free_irqs(vha);
3008
3009         qla2x00_free_fcports(vha);
3010
3011         qla2x00_mem_free(ha);
3012
3013         qla82xx_md_free(vha);
3014
3015         qla2x00_free_queues(ha);
3016 }
3017
3018 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3019 {
3020         fc_port_t *fcport, *tfcport;
3021
3022         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
3023                 list_del(&fcport->list);
3024                 qla2x00_clear_loop_id(fcport);
3025                 kfree(fcport);
3026                 fcport = NULL;
3027         }
3028 }
3029
3030 static inline void
3031 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3032     int defer)
3033 {
3034         struct fc_rport *rport;
3035         scsi_qla_host_t *base_vha;
3036         unsigned long flags;
3037
3038         if (!fcport->rport)
3039                 return;
3040
3041         rport = fcport->rport;
3042         if (defer) {
3043                 base_vha = pci_get_drvdata(vha->hw->pdev);
3044                 spin_lock_irqsave(vha->host->host_lock, flags);
3045                 fcport->drport = rport;
3046                 spin_unlock_irqrestore(vha->host->host_lock, flags);
3047                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3048                 qla2xxx_wake_dpc(base_vha);
3049         } else {
3050                 fc_remote_port_delete(rport);
3051                 qlt_fc_port_deleted(vha, fcport);
3052         }
3053 }
3054
3055 /*
3056  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3057  *
3058  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3059  *
3060  * Return: None.
3061  *
3062  * Context:
3063  */
3064 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3065     int do_login, int defer)
3066 {
3067         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3068             vha->vp_idx == fcport->vha->vp_idx) {
3069                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3070                 qla2x00_schedule_rport_del(vha, fcport, defer);
3071         }
3072         /*
3073          * We may need to retry the login, so don't change the state of the
3074          * port but do the retries.
3075          */
3076         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3077                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3078
3079         if (!do_login)
3080                 return;
3081
3082         if (fcport->login_retry == 0) {
3083                 fcport->login_retry = vha->hw->login_retry_count;
3084                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3085
3086                 ql_dbg(ql_dbg_disc, vha, 0x2067,
3087                     "Port login retry "
3088                     "%02x%02x%02x%02x%02x%02x%02x%02x, "
3089                     "id = 0x%04x retry cnt=%d.\n",
3090                     fcport->port_name[0], fcport->port_name[1],
3091                     fcport->port_name[2], fcport->port_name[3],
3092                     fcport->port_name[4], fcport->port_name[5],
3093                     fcport->port_name[6], fcport->port_name[7],
3094                     fcport->loop_id, fcport->login_retry);
3095         }
3096 }
3097
3098 /*
3099  * qla2x00_mark_all_devices_lost
3100  *      Updates fcport state when device goes offline.
3101  *
3102  * Input:
3103  *      ha = adapter block pointer.
3104  *      fcport = port structure pointer.
3105  *
3106  * Return:
3107  *      None.
3108  *
3109  * Context:
3110  */
3111 void
3112 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3113 {
3114         fc_port_t *fcport;
3115
3116         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3117                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3118                         continue;
3119
3120                 /*
3121                  * No point in marking the device as lost, if the device is
3122                  * already DEAD.
3123                  */
3124                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3125                         continue;
3126                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3127                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3128                         if (defer)
3129                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3130                         else if (vha->vp_idx == fcport->vha->vp_idx)
3131                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3132                 }
3133         }
3134 }
3135
3136 /*
3137 * qla2x00_mem_alloc
3138 *      Allocates adapter memory.
3139 *
3140 * Returns:
3141 *      0  = success.
3142 *      !0  = failure.
3143 */
3144 static int
3145 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3146         struct req_que **req, struct rsp_que **rsp)
3147 {
3148         char    name[16];
3149
3150         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3151                 &ha->init_cb_dma, GFP_KERNEL);
3152         if (!ha->init_cb)
3153                 goto fail;
3154
3155         if (qlt_mem_alloc(ha) < 0)
3156                 goto fail_free_init_cb;
3157
3158         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3159                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3160         if (!ha->gid_list)
3161                 goto fail_free_tgt_mem;
3162
3163         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3164         if (!ha->srb_mempool)
3165                 goto fail_free_gid_list;
3166
3167         if (IS_QLA82XX(ha)) {
3168                 /* Allocate cache for CT6 Ctx. */
3169                 if (!ctx_cachep) {
3170                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3171                                 sizeof(struct ct6_dsd), 0,
3172                                 SLAB_HWCACHE_ALIGN, NULL);
3173                         if (!ctx_cachep)
3174                                 goto fail_free_gid_list;
3175                 }
3176                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3177                         ctx_cachep);
3178                 if (!ha->ctx_mempool)
3179                         goto fail_free_srb_mempool;
3180                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3181                     "ctx_cachep=%p ctx_mempool=%p.\n",
3182                     ctx_cachep, ha->ctx_mempool);
3183         }
3184
3185         /* Get memory for cached NVRAM */
3186         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3187         if (!ha->nvram)
3188                 goto fail_free_ctx_mempool;
3189
3190         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3191                 ha->pdev->device);
3192         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3193                 DMA_POOL_SIZE, 8, 0);
3194         if (!ha->s_dma_pool)
3195                 goto fail_free_nvram;
3196
3197         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3198             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3199             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
3200
3201         if (IS_QLA82XX(ha) || ql2xenabledif) {
3202                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3203                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
3204                 if (!ha->dl_dma_pool) {
3205                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
3206                             "Failed to allocate memory for dl_dma_pool.\n");
3207                         goto fail_s_dma_pool;
3208                 }
3209
3210                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3211                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
3212                 if (!ha->fcp_cmnd_dma_pool) {
3213                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
3214                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3215                         goto fail_dl_dma_pool;
3216                 }
3217                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
3218                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3219                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3220         }
3221
3222         /* Allocate memory for SNS commands */
3223         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3224         /* Get consistent memory allocated for SNS commands */
3225                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3226                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3227                 if (!ha->sns_cmd)
3228                         goto fail_dma_pool;
3229                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3230                     "sns_cmd: %p.\n", ha->sns_cmd);
3231         } else {
3232         /* Get consistent memory allocated for MS IOCB */
3233                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3234                         &ha->ms_iocb_dma);
3235                 if (!ha->ms_iocb)
3236                         goto fail_dma_pool;
3237         /* Get consistent memory allocated for CT SNS commands */
3238                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3239                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
3240                 if (!ha->ct_sns)
3241                         goto fail_free_ms_iocb;
3242                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
3243                     "ms_iocb=%p ct_sns=%p.\n",
3244                     ha->ms_iocb, ha->ct_sns);
3245         }
3246
3247         /* Allocate memory for request ring */
3248         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
3249         if (!*req) {
3250                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
3251                     "Failed to allocate memory for req.\n");
3252                 goto fail_req;
3253         }
3254         (*req)->length = req_len;
3255         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
3256                 ((*req)->length + 1) * sizeof(request_t),
3257                 &(*req)->dma, GFP_KERNEL);
3258         if (!(*req)->ring) {
3259                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
3260                     "Failed to allocate memory for req_ring.\n");
3261                 goto fail_req_ring;
3262         }
3263         /* Allocate memory for response ring */
3264         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
3265         if (!*rsp) {
3266                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
3267                     "Failed to allocate memory for rsp.\n");
3268                 goto fail_rsp;
3269         }
3270         (*rsp)->hw = ha;
3271         (*rsp)->length = rsp_len;
3272         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
3273                 ((*rsp)->length + 1) * sizeof(response_t),
3274                 &(*rsp)->dma, GFP_KERNEL);
3275         if (!(*rsp)->ring) {
3276                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
3277                     "Failed to allocate memory for rsp_ring.\n");
3278                 goto fail_rsp_ring;
3279         }
3280         (*req)->rsp = *rsp;
3281         (*rsp)->req = *req;
3282         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
3283             "req=%p req->length=%d req->ring=%p rsp=%p "
3284             "rsp->length=%d rsp->ring=%p.\n",
3285             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
3286             (*rsp)->ring);
3287         /* Allocate memory for NVRAM data for vports */
3288         if (ha->nvram_npiv_size) {
3289                 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
3290                     ha->nvram_npiv_size, GFP_KERNEL);
3291                 if (!ha->npiv_info) {
3292                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
3293                             "Failed to allocate memory for npiv_info.\n");
3294                         goto fail_npiv_info;
3295                 }
3296         } else
3297                 ha->npiv_info = NULL;
3298
3299         /* Get consistent memory allocated for EX-INIT-CB. */
3300         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha)) {
3301                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3302                     &ha->ex_init_cb_dma);
3303                 if (!ha->ex_init_cb)
3304                         goto fail_ex_init_cb;
3305                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
3306                     "ex_init_cb=%p.\n", ha->ex_init_cb);
3307         }
3308
3309         INIT_LIST_HEAD(&ha->gbl_dsd_list);
3310
3311         /* Get consistent memory allocated for Async Port-Database. */
3312         if (!IS_FWI2_CAPABLE(ha)) {
3313                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3314                         &ha->async_pd_dma);
3315                 if (!ha->async_pd)
3316                         goto fail_async_pd;
3317                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
3318                     "async_pd=%p.\n", ha->async_pd);
3319         }
3320
3321         INIT_LIST_HEAD(&ha->vp_list);
3322
3323         /* Allocate memory for our loop_id bitmap */
3324         ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long),
3325             GFP_KERNEL);
3326         if (!ha->loop_id_map)
3327                 goto fail_async_pd;
3328         else {
3329                 qla2x00_set_reserved_loop_ids(ha);
3330                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
3331                     "loop_id_map=%p. \n", ha->loop_id_map);
3332         }
3333
3334         return 1;
3335
3336 fail_async_pd:
3337         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
3338 fail_ex_init_cb:
3339         kfree(ha->npiv_info);
3340 fail_npiv_info:
3341         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
3342                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
3343         (*rsp)->ring = NULL;
3344         (*rsp)->dma = 0;
3345 fail_rsp_ring:
3346         kfree(*rsp);
3347 fail_rsp:
3348         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
3349                 sizeof(request_t), (*req)->ring, (*req)->dma);
3350         (*req)->ring = NULL;
3351         (*req)->dma = 0;
3352 fail_req_ring:
3353         kfree(*req);
3354 fail_req:
3355         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3356                 ha->ct_sns, ha->ct_sns_dma);
3357         ha->ct_sns = NULL;
3358         ha->ct_sns_dma = 0;
3359 fail_free_ms_iocb:
3360         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3361         ha->ms_iocb = NULL;
3362         ha->ms_iocb_dma = 0;
3363 fail_dma_pool:
3364         if (IS_QLA82XX(ha) || ql2xenabledif) {
3365                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3366                 ha->fcp_cmnd_dma_pool = NULL;
3367         }
3368 fail_dl_dma_pool:
3369         if (IS_QLA82XX(ha) || ql2xenabledif) {
3370                 dma_pool_destroy(ha->dl_dma_pool);
3371                 ha->dl_dma_pool = NULL;
3372         }
3373 fail_s_dma_pool:
3374         dma_pool_destroy(ha->s_dma_pool);
3375         ha->s_dma_pool = NULL;
3376 fail_free_nvram:
3377         kfree(ha->nvram);
3378         ha->nvram = NULL;
3379 fail_free_ctx_mempool:
3380         mempool_destroy(ha->ctx_mempool);
3381         ha->ctx_mempool = NULL;
3382 fail_free_srb_mempool:
3383         mempool_destroy(ha->srb_mempool);
3384         ha->srb_mempool = NULL;
3385 fail_free_gid_list:
3386         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3387         ha->gid_list,
3388         ha->gid_list_dma);
3389         ha->gid_list = NULL;
3390         ha->gid_list_dma = 0;
3391 fail_free_tgt_mem:
3392         qlt_mem_free(ha);
3393 fail_free_init_cb:
3394         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
3395         ha->init_cb_dma);
3396         ha->init_cb = NULL;
3397         ha->init_cb_dma = 0;
3398 fail:
3399         ql_log(ql_log_fatal, NULL, 0x0030,
3400             "Memory allocation failure.\n");
3401         return -ENOMEM;
3402 }
3403
3404 /*
3405 * qla2x00_free_fw_dump
3406 *       Frees fw dump stuff.
3407 *
3408 * Input:
3409 *       ha = adapter block pointer.
3410 */
3411 static void
3412 qla2x00_free_fw_dump(struct qla_hw_data *ha)
3413 {
3414         if (ha->fce)
3415                 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
3416                     ha->fce_dma);
3417
3418         if (ha->fw_dump) {
3419                 if (ha->eft)
3420                         dma_free_coherent(&ha->pdev->dev,
3421                             ntohl(ha->fw_dump->eft_size), ha->eft, ha->eft_dma);
3422                 vfree(ha->fw_dump);
3423         }
3424         ha->fce = NULL;
3425         ha->fce_dma = 0;
3426         ha->eft = NULL;
3427         ha->eft_dma = 0;
3428         ha->fw_dump = NULL;
3429         ha->fw_dumped = 0;
3430         ha->fw_dump_reading = 0;
3431 }
3432
3433 /*
3434 * qla2x00_mem_free
3435 *      Frees all adapter allocated memory.
3436 *
3437 * Input:
3438 *      ha = adapter block pointer.
3439 */
3440 static void
3441 qla2x00_mem_free(struct qla_hw_data *ha)
3442 {
3443         qla2x00_free_fw_dump(ha);
3444
3445         if (ha->mctp_dump)
3446                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
3447                     ha->mctp_dump_dma);
3448
3449         if (ha->srb_mempool)
3450                 mempool_destroy(ha->srb_mempool);
3451
3452         if (ha->dcbx_tlv)
3453                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
3454                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
3455
3456         if (ha->xgmac_data)
3457                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
3458                     ha->xgmac_data, ha->xgmac_data_dma);
3459
3460         if (ha->sns_cmd)
3461                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
3462                 ha->sns_cmd, ha->sns_cmd_dma);
3463
3464         if (ha->ct_sns)
3465                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3466                 ha->ct_sns, ha->ct_sns_dma);
3467
3468         if (ha->sfp_data)
3469                 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
3470
3471         if (ha->ms_iocb)
3472                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3473
3474         if (ha->ex_init_cb)
3475                 dma_pool_free(ha->s_dma_pool,
3476                         ha->ex_init_cb, ha->ex_init_cb_dma);
3477
3478         if (ha->async_pd)
3479                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
3480
3481         if (ha->s_dma_pool)
3482                 dma_pool_destroy(ha->s_dma_pool);
3483
3484         if (ha->gid_list)
3485                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3486                 ha->gid_list, ha->gid_list_dma);
3487
3488         if (IS_QLA82XX(ha)) {
3489                 if (!list_empty(&ha->gbl_dsd_list)) {
3490                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
3491
3492                         /* clean up allocated prev pool */
3493                         list_for_each_entry_safe(dsd_ptr,
3494                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
3495                                 dma_pool_free(ha->dl_dma_pool,
3496                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
3497                                 list_del(&dsd_ptr->list);
3498                                 kfree(dsd_ptr);
3499                         }
3500                 }
3501         }
3502
3503         if (ha->dl_dma_pool)
3504                 dma_pool_destroy(ha->dl_dma_pool);
3505
3506         if (ha->fcp_cmnd_dma_pool)
3507                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3508
3509         if (ha->ctx_mempool)
3510                 mempool_destroy(ha->ctx_mempool);
3511
3512         qlt_mem_free(ha);
3513
3514         if (ha->init_cb)
3515                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
3516                         ha->init_cb, ha->init_cb_dma);
3517         vfree(ha->optrom_buffer);
3518         kfree(ha->nvram);
3519         kfree(ha->npiv_info);
3520         kfree(ha->swl);
3521         kfree(ha->loop_id_map);
3522
3523         ha->srb_mempool = NULL;
3524         ha->ctx_mempool = NULL;
3525         ha->sns_cmd = NULL;
3526         ha->sns_cmd_dma = 0;
3527         ha->ct_sns = NULL;
3528         ha->ct_sns_dma = 0;
3529         ha->ms_iocb = NULL;
3530         ha->ms_iocb_dma = 0;
3531         ha->init_cb = NULL;
3532         ha->init_cb_dma = 0;
3533         ha->ex_init_cb = NULL;
3534         ha->ex_init_cb_dma = 0;
3535         ha->async_pd = NULL;
3536         ha->async_pd_dma = 0;
3537
3538         ha->s_dma_pool = NULL;
3539         ha->dl_dma_pool = NULL;
3540         ha->fcp_cmnd_dma_pool = NULL;
3541
3542         ha->gid_list = NULL;
3543         ha->gid_list_dma = 0;
3544
3545         ha->tgt.atio_ring = NULL;
3546         ha->tgt.atio_dma = 0;
3547         ha->tgt.tgt_vp_map = NULL;
3548 }
3549
3550 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
3551                                                 struct qla_hw_data *ha)
3552 {
3553         struct Scsi_Host *host;
3554         struct scsi_qla_host *vha = NULL;
3555
3556         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
3557         if (host == NULL) {
3558                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
3559                     "Failed to allocate host from the scsi layer, aborting.\n");
3560                 goto fail;
3561         }
3562
3563         /* Clear our data area */
3564         vha = shost_priv(host);
3565         memset(vha, 0, sizeof(scsi_qla_host_t));
3566
3567         vha->host = host;
3568         vha->host_no = host->host_no;
3569         vha->hw = ha;
3570
3571         INIT_LIST_HEAD(&vha->vp_fcports);
3572         INIT_LIST_HEAD(&vha->work_list);
3573         INIT_LIST_HEAD(&vha->list);
3574
3575         spin_lock_init(&vha->work_lock);
3576
3577         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
3578         ql_dbg(ql_dbg_init, vha, 0x0041,
3579             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
3580             vha->host, vha->hw, vha,
3581             dev_name(&(ha->pdev->dev)));
3582
3583         return vha;
3584
3585 fail:
3586         return vha;
3587 }
3588
3589 static struct qla_work_evt *
3590 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
3591 {
3592         struct qla_work_evt *e;
3593         uint8_t bail;
3594
3595         QLA_VHA_MARK_BUSY(vha, bail);
3596         if (bail)
3597                 return NULL;
3598
3599         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
3600         if (!e) {
3601                 QLA_VHA_MARK_NOT_BUSY(vha);
3602                 return NULL;
3603         }
3604
3605         INIT_LIST_HEAD(&e->list);
3606         e->type = type;
3607         e->flags = QLA_EVT_FLAG_FREE;
3608         return e;
3609 }
3610
3611 static int
3612 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
3613 {
3614         unsigned long flags;
3615
3616         spin_lock_irqsave(&vha->work_lock, flags);
3617         list_add_tail(&e->list, &vha->work_list);
3618         spin_unlock_irqrestore(&vha->work_lock, flags);
3619         qla2xxx_wake_dpc(vha);
3620
3621         return QLA_SUCCESS;
3622 }
3623
3624 int
3625 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
3626     u32 data)
3627 {
3628         struct qla_work_evt *e;
3629
3630         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
3631         if (!e)
3632                 return QLA_FUNCTION_FAILED;
3633
3634         e->u.aen.code = code;
3635         e->u.aen.data = data;
3636         return qla2x00_post_work(vha, e);
3637 }
3638
3639 int
3640 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
3641 {
3642         struct qla_work_evt *e;
3643
3644         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
3645         if (!e)
3646                 return QLA_FUNCTION_FAILED;
3647
3648         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
3649         return qla2x00_post_work(vha, e);
3650 }
3651
3652 #define qla2x00_post_async_work(name, type)     \
3653 int qla2x00_post_async_##name##_work(           \
3654     struct scsi_qla_host *vha,                  \
3655     fc_port_t *fcport, uint16_t *data)          \
3656 {                                               \
3657         struct qla_work_evt *e;                 \
3658                                                 \
3659         e = qla2x00_alloc_work(vha, type);      \
3660         if (!e)                                 \
3661                 return QLA_FUNCTION_FAILED;     \
3662                                                 \
3663         e->u.logio.fcport = fcport;             \
3664         if (data) {                             \
3665                 e->u.logio.data[0] = data[0];   \
3666                 e->u.logio.data[1] = data[1];   \
3667         }                                       \
3668         return qla2x00_post_work(vha, e);       \
3669 }
3670
3671 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
3672 qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
3673 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
3674 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
3675 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
3676 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
3677
3678 int
3679 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
3680 {
3681         struct qla_work_evt *e;
3682
3683         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
3684         if (!e)
3685                 return QLA_FUNCTION_FAILED;
3686
3687         e->u.uevent.code = code;
3688         return qla2x00_post_work(vha, e);
3689 }
3690
3691 static void
3692 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
3693 {
3694         char event_string[40];
3695         char *envp[] = { event_string, NULL };
3696
3697         switch (code) {
3698         case QLA_UEVENT_CODE_FW_DUMP:
3699                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
3700                     vha->host_no);
3701                 break;
3702         default:
3703                 /* do nothing */
3704                 break;
3705         }
3706         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
3707 }
3708
3709 void
3710 qla2x00_do_work(struct scsi_qla_host *vha)
3711 {
3712         struct qla_work_evt *e, *tmp;
3713         unsigned long flags;
3714         LIST_HEAD(work);
3715
3716         spin_lock_irqsave(&vha->work_lock, flags);
3717         list_splice_init(&vha->work_list, &work);
3718         spin_unlock_irqrestore(&vha->work_lock, flags);
3719
3720         list_for_each_entry_safe(e, tmp, &work, list) {
3721                 list_del_init(&e->list);
3722
3723                 switch (e->type) {
3724                 case QLA_EVT_AEN:
3725                         fc_host_post_event(vha->host, fc_get_event_number(),
3726                             e->u.aen.code, e->u.aen.data);
3727                         break;
3728                 case QLA_EVT_IDC_ACK:
3729                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
3730                         break;
3731                 case QLA_EVT_ASYNC_LOGIN:
3732                         qla2x00_async_login(vha, e->u.logio.fcport,
3733                             e->u.logio.data);
3734                         break;
3735                 case QLA_EVT_ASYNC_LOGIN_DONE:
3736                         qla2x00_async_login_done(vha, e->u.logio.fcport,
3737                             e->u.logio.data);
3738                         break;
3739                 case QLA_EVT_ASYNC_LOGOUT:
3740                         qla2x00_async_logout(vha, e->u.logio.fcport);
3741                         break;
3742                 case QLA_EVT_ASYNC_LOGOUT_DONE:
3743                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
3744                             e->u.logio.data);
3745                         break;
3746                 case QLA_EVT_ASYNC_ADISC:
3747                         qla2x00_async_adisc(vha, e->u.logio.fcport,
3748                             e->u.logio.data);
3749                         break;
3750                 case QLA_EVT_ASYNC_ADISC_DONE:
3751                         qla2x00_async_adisc_done(vha, e->u.logio.fcport,
3752                             e->u.logio.data);
3753                         break;
3754                 case QLA_EVT_UEVENT:
3755                         qla2x00_uevent_emit(vha, e->u.uevent.code);
3756                         break;
3757                 }
3758                 if (e->flags & QLA_EVT_FLAG_FREE)
3759                         kfree(e);
3760
3761                 /* For each work completed decrement vha ref count */
3762                 QLA_VHA_MARK_NOT_BUSY(vha);
3763         }
3764 }
3765
3766 /* Relogins all the fcports of a vport
3767  * Context: dpc thread
3768  */
3769 void qla2x00_relogin(struct scsi_qla_host *vha)
3770 {
3771         fc_port_t       *fcport;
3772         int status;
3773         uint16_t        next_loopid = 0;
3774         struct qla_hw_data *ha = vha->hw;
3775         uint16_t data[2];
3776
3777         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3778         /*
3779          * If the port is not ONLINE then try to login
3780          * to it if we haven't run out of retries.
3781          */
3782                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
3783                     fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
3784                         fcport->login_retry--;
3785                         if (fcport->flags & FCF_FABRIC_DEVICE) {
3786                                 if (fcport->flags & FCF_FCP2_DEVICE)
3787                                         ha->isp_ops->fabric_logout(vha,
3788                                                         fcport->loop_id,
3789                                                         fcport->d_id.b.domain,
3790                                                         fcport->d_id.b.area,
3791                                                         fcport->d_id.b.al_pa);
3792
3793                                 if (fcport->loop_id == FC_NO_LOOP_ID) {
3794                                         fcport->loop_id = next_loopid =
3795                                             ha->min_external_loopid;
3796                                         status = qla2x00_find_new_loop_id(
3797                                             vha, fcport);
3798                                         if (status != QLA_SUCCESS) {
3799                                                 /* Ran out of IDs to use */
3800                                                 break;
3801                                         }
3802                                 }
3803
3804                                 if (IS_ALOGIO_CAPABLE(ha)) {
3805                                         fcport->flags |= FCF_ASYNC_SENT;
3806                                         data[0] = 0;
3807                                         data[1] = QLA_LOGIO_LOGIN_RETRIED;
3808                                         status = qla2x00_post_async_login_work(
3809                                             vha, fcport, data);
3810                                         if (status == QLA_SUCCESS)
3811                                                 continue;
3812                                         /* Attempt a retry. */
3813                                         status = 1;
3814                                 } else {
3815                                         status = qla2x00_fabric_login(vha,
3816                                             fcport, &next_loopid);
3817                                         if (status ==  QLA_SUCCESS) {
3818                                                 int status2;
3819                                                 uint8_t opts;
3820
3821                                                 opts = 0;
3822                                                 if (fcport->flags &
3823                                                     FCF_FCP2_DEVICE)
3824                                                         opts |= BIT_1;
3825                                                 status2 =
3826                                                     qla2x00_get_port_database(
3827                                                         vha, fcport, opts);
3828                                                 if (status2 != QLA_SUCCESS)
3829                                                         status = 1;
3830                                         }
3831                                 }
3832                         } else
3833                                 status = qla2x00_local_device_login(vha,
3834                                                                 fcport);
3835
3836                         if (status == QLA_SUCCESS) {
3837                                 fcport->old_loop_id = fcport->loop_id;
3838
3839                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
3840                                     "Port login OK: logged in ID 0x%x.\n",
3841                                     fcport->loop_id);
3842
3843                                 qla2x00_update_fcport(vha, fcport);
3844
3845                         } else if (status == 1) {
3846                                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3847                                 /* retry the login again */
3848                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
3849                                     "Retrying %d login again loop_id 0x%x.\n",
3850                                     fcport->login_retry, fcport->loop_id);
3851                         } else {
3852                                 fcport->login_retry = 0;
3853                         }
3854
3855                         if (fcport->login_retry == 0 && status != QLA_SUCCESS)
3856                                 qla2x00_clear_loop_id(fcport);
3857                 }
3858                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
3859                         break;
3860         }
3861 }
3862
3863 /* Schedule work on any of the dpc-workqueues */
3864 void
3865 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
3866 {
3867         struct qla_hw_data *ha = base_vha->hw;
3868
3869         switch (work_code) {
3870         case MBA_IDC_AEN: /* 0x8200 */
3871                 if (ha->dpc_lp_wq)
3872                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
3873                 break;
3874
3875         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
3876                 if (!ha->flags.nic_core_reset_hdlr_active) {
3877                         if (ha->dpc_hp_wq)
3878                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
3879                 } else
3880                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
3881                             "NIC Core reset is already active. Skip "
3882                             "scheduling it again.\n");
3883                 break;
3884         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
3885                 if (ha->dpc_hp_wq)
3886                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
3887                 break;
3888         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
3889                 if (ha->dpc_hp_wq)
3890                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
3891                 break;
3892         default:
3893                 ql_log(ql_log_warn, base_vha, 0xb05f,
3894                     "Unknow work-code=0x%x.\n", work_code);
3895         }
3896
3897         return;
3898 }
3899
3900 /* Work: Perform NIC Core Unrecoverable state handling */
3901 void
3902 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
3903 {
3904         struct qla_hw_data *ha =
3905                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
3906         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
3907         uint32_t dev_state = 0;
3908
3909         qla83xx_idc_lock(base_vha, 0);
3910         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
3911         qla83xx_reset_ownership(base_vha);
3912         if (ha->flags.nic_core_reset_owner) {
3913                 ha->flags.nic_core_reset_owner = 0;
3914                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
3915                     QLA8XXX_DEV_FAILED);
3916                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
3917                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
3918         }
3919         qla83xx_idc_unlock(base_vha, 0);
3920 }
3921
3922 /* Work: Execute IDC state handler */
3923 void
3924 qla83xx_idc_state_handler_work(struct work_struct *work)
3925 {
3926         struct qla_hw_data *ha =
3927                 container_of(work, struct qla_hw_data, idc_state_handler);
3928         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
3929         uint32_t dev_state = 0;
3930
3931         qla83xx_idc_lock(base_vha, 0);
3932         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
3933         if (dev_state == QLA8XXX_DEV_FAILED ||
3934                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
3935                 qla83xx_idc_state_handler(base_vha);
3936         qla83xx_idc_unlock(base_vha, 0);
3937 }
3938
3939 static int
3940 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
3941 {
3942         int rval = QLA_SUCCESS;
3943         unsigned long heart_beat_wait = jiffies + (1 * HZ);
3944         uint32_t heart_beat_counter1, heart_beat_counter2;
3945
3946         do {
3947                 if (time_after(jiffies, heart_beat_wait)) {
3948                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
3949                             "Nic Core f/w is not alive.\n");
3950                         rval = QLA_FUNCTION_FAILED;
3951                         break;
3952                 }
3953
3954                 qla83xx_idc_lock(base_vha, 0);
3955                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
3956                     &heart_beat_counter1);
3957                 qla83xx_idc_unlock(base_vha, 0);
3958                 msleep(100);
3959                 qla83xx_idc_lock(base_vha, 0);
3960                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
3961                     &heart_beat_counter2);
3962                 qla83xx_idc_unlock(base_vha, 0);
3963         } while (heart_beat_counter1 == heart_beat_counter2);
3964
3965         return rval;
3966 }
3967
3968 /* Work: Perform NIC Core Reset handling */
3969 void
3970 qla83xx_nic_core_reset_work(struct work_struct *work)
3971 {
3972         struct qla_hw_data *ha =
3973                 container_of(work, struct qla_hw_data, nic_core_reset);
3974         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
3975         uint32_t dev_state = 0;
3976
3977         if (IS_QLA2031(ha)) {
3978                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
3979                         ql_log(ql_log_warn, base_vha, 0xb081,
3980                             "Failed to dump mctp\n");
3981                 return;
3982         }
3983
3984         if (!ha->flags.nic_core_reset_hdlr_active) {
3985                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
3986                         qla83xx_idc_lock(base_vha, 0);
3987                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
3988                             &dev_state);
3989                         qla83xx_idc_unlock(base_vha, 0);
3990                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
3991                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
3992                                     "Nic Core f/w is alive.\n");
3993                                 return;
3994                         }
3995                 }
3996
3997                 ha->flags.nic_core_reset_hdlr_active = 1;
3998                 if (qla83xx_nic_core_reset(base_vha)) {
3999                         /* NIC Core reset failed. */
4000                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
4001                             "NIC Core reset failed.\n");
4002                 }
4003                 ha->flags.nic_core_reset_hdlr_active = 0;
4004         }
4005 }
4006
4007 /* Work: Handle 8200 IDC aens */
4008 void
4009 qla83xx_service_idc_aen(struct work_struct *work)
4010 {
4011         struct qla_hw_data *ha =
4012                 container_of(work, struct qla_hw_data, idc_aen);
4013         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4014         uint32_t dev_state, idc_control;
4015
4016         qla83xx_idc_lock(base_vha, 0);
4017         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4018         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
4019         qla83xx_idc_unlock(base_vha, 0);
4020         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
4021                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
4022                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
4023                             "Application requested NIC Core Reset.\n");
4024                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4025                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
4026                     QLA_SUCCESS) {
4027                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
4028                             "Other protocol driver requested NIC Core Reset.\n");
4029                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4030                 }
4031         } else if (dev_state == QLA8XXX_DEV_FAILED ||
4032                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
4033                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4034         }
4035 }
4036
4037 static void
4038 qla83xx_wait_logic(void)
4039 {
4040         int i;
4041
4042         /* Yield CPU */
4043         if (!in_interrupt()) {
4044                 /*
4045                  * Wait about 200ms before retrying again.
4046                  * This controls the number of retries for single
4047                  * lock operation.
4048                  */
4049                 msleep(100);
4050                 schedule();
4051         } else {
4052                 for (i = 0; i < 20; i++)
4053                         cpu_relax(); /* This a nop instr on i386 */
4054         }
4055 }
4056
4057 static int
4058 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
4059 {
4060         int rval;
4061         uint32_t data;
4062         uint32_t idc_lck_rcvry_stage_mask = 0x3;
4063         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
4064         struct qla_hw_data *ha = base_vha->hw;
4065
4066         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
4067         if (rval)
4068                 return rval;
4069
4070         if ((data & idc_lck_rcvry_stage_mask) > 0) {
4071                 return QLA_SUCCESS;
4072         } else {
4073                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
4074                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4075                     data);
4076                 if (rval)
4077                         return rval;
4078
4079                 msleep(200);
4080
4081                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4082                     &data);
4083                 if (rval)
4084                         return rval;
4085
4086                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
4087                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
4088                                         ~(idc_lck_rcvry_stage_mask));
4089                         rval = qla83xx_wr_reg(base_vha,
4090                             QLA83XX_IDC_LOCK_RECOVERY, data);
4091                         if (rval)
4092                                 return rval;
4093
4094                         /* Forcefully perform IDC UnLock */
4095                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
4096                             &data);
4097                         if (rval)
4098                                 return rval;
4099                         /* Clear lock-id by setting 0xff */
4100                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4101                             0xff);
4102                         if (rval)
4103                                 return rval;
4104                         /* Clear lock-recovery by setting 0x0 */
4105                         rval = qla83xx_wr_reg(base_vha,
4106                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
4107                         if (rval)
4108                                 return rval;
4109                 } else
4110                         return QLA_SUCCESS;
4111         }
4112
4113         return rval;
4114 }
4115
4116 static int
4117 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
4118 {
4119         int rval = QLA_SUCCESS;
4120         uint32_t o_drv_lockid, n_drv_lockid;
4121         unsigned long lock_recovery_timeout;
4122
4123         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
4124 retry_lockid:
4125         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
4126         if (rval)
4127                 goto exit;
4128
4129         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
4130         if (time_after_eq(jiffies, lock_recovery_timeout)) {
4131                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
4132                         return QLA_SUCCESS;
4133                 else
4134                         return QLA_FUNCTION_FAILED;
4135         }
4136
4137         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
4138         if (rval)
4139                 goto exit;
4140
4141         if (o_drv_lockid == n_drv_lockid) {
4142                 qla83xx_wait_logic();
4143                 goto retry_lockid;
4144         } else
4145                 return QLA_SUCCESS;
4146
4147 exit:
4148         return rval;
4149 }
4150
4151 void
4152 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4153 {
4154         uint16_t options = (requester_id << 15) | BIT_6;
4155         uint32_t data;
4156         struct qla_hw_data *ha = base_vha->hw;
4157
4158         /* IDC-lock implementation using driver-lock/lock-id remote registers */
4159 retry_lock:
4160         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
4161             == QLA_SUCCESS) {
4162                 if (data) {
4163                         /* Setting lock-id to our function-number */
4164                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4165                             ha->portnum);
4166                 } else {
4167                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
4168                             "Failed to acquire IDC lock. retrying...\n");
4169
4170                         /* Retry/Perform IDC-Lock recovery */
4171                         if (qla83xx_idc_lock_recovery(base_vha)
4172                             == QLA_SUCCESS) {
4173                                 qla83xx_wait_logic();
4174                                 goto retry_lock;
4175                         } else
4176                                 ql_log(ql_log_warn, base_vha, 0xb075,
4177                                     "IDC Lock recovery FAILED.\n");
4178                 }
4179
4180         }
4181
4182         return;
4183
4184         /* XXX: IDC-lock implementation using access-control mbx */
4185 retry_lock2:
4186         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4187                 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
4188                     "Failed to acquire IDC lock. retrying...\n");
4189                 /* Retry/Perform IDC-Lock recovery */
4190                 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
4191                         qla83xx_wait_logic();
4192                         goto retry_lock2;
4193                 } else
4194                         ql_log(ql_log_warn, base_vha, 0xb076,
4195                             "IDC Lock recovery FAILED.\n");
4196         }
4197
4198         return;
4199 }
4200
4201 void
4202 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4203 {
4204         uint16_t options = (requester_id << 15) | BIT_7, retry;
4205         uint32_t data;
4206         struct qla_hw_data *ha = base_vha->hw;
4207
4208         /* IDC-unlock implementation using driver-unlock/lock-id
4209          * remote registers
4210          */
4211         retry = 0;
4212 retry_unlock:
4213         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
4214             == QLA_SUCCESS) {
4215                 if (data == ha->portnum) {
4216                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
4217                         /* Clearing lock-id by setting 0xff */
4218                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
4219                 } else if (retry < 10) {
4220                         /* SV: XXX: IDC unlock retrying needed here? */
4221
4222                         /* Retry for IDC-unlock */
4223                         qla83xx_wait_logic();
4224                         retry++;
4225                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
4226                             "Failed to release IDC lock, retyring=%d\n", retry);
4227                         goto retry_unlock;
4228                 }
4229         } else if (retry < 10) {
4230                 /* Retry for IDC-unlock */
4231                 qla83xx_wait_logic();
4232                 retry++;
4233                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
4234                     "Failed to read drv-lockid, retyring=%d\n", retry);
4235                 goto retry_unlock;
4236         }
4237
4238         return;
4239
4240         /* XXX: IDC-unlock implementation using access-control mbx */
4241         retry = 0;
4242 retry_unlock2:
4243         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4244                 if (retry < 10) {
4245                         /* Retry for IDC-unlock */
4246                         qla83xx_wait_logic();
4247                         retry++;
4248                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
4249                             "Failed to release IDC lock, retyring=%d\n", retry);
4250                         goto retry_unlock2;
4251                 }
4252         }
4253
4254         return;
4255 }
4256
4257 int
4258 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4259 {
4260         int rval = QLA_SUCCESS;
4261         struct qla_hw_data *ha = vha->hw;
4262         uint32_t drv_presence;
4263
4264         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4265         if (rval == QLA_SUCCESS) {
4266                 drv_presence |= (1 << ha->portnum);
4267                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4268                     drv_presence);
4269         }
4270
4271         return rval;
4272 }
4273
4274 int
4275 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4276 {
4277         int rval = QLA_SUCCESS;
4278
4279         qla83xx_idc_lock(vha, 0);
4280         rval = __qla83xx_set_drv_presence(vha);
4281         qla83xx_idc_unlock(vha, 0);
4282
4283         return rval;
4284 }
4285
4286 int
4287 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4288 {
4289         int rval = QLA_SUCCESS;
4290         struct qla_hw_data *ha = vha->hw;
4291         uint32_t drv_presence;
4292
4293         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4294         if (rval == QLA_SUCCESS) {
4295                 drv_presence &= ~(1 << ha->portnum);
4296                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4297                     drv_presence);
4298         }
4299
4300         return rval;
4301 }
4302
4303 int
4304 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4305 {
4306         int rval = QLA_SUCCESS;
4307
4308         qla83xx_idc_lock(vha, 0);
4309         rval = __qla83xx_clear_drv_presence(vha);
4310         qla83xx_idc_unlock(vha, 0);
4311
4312         return rval;
4313 }
4314
4315 static void
4316 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
4317 {
4318         struct qla_hw_data *ha = vha->hw;
4319         uint32_t drv_ack, drv_presence;
4320         unsigned long ack_timeout;
4321
4322         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
4323         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
4324         while (1) {
4325                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
4326                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4327                 if ((drv_ack & drv_presence) == drv_presence)
4328                         break;
4329
4330                 if (time_after_eq(jiffies, ack_timeout)) {
4331                         ql_log(ql_log_warn, vha, 0xb067,
4332                             "RESET ACK TIMEOUT! drv_presence=0x%x "
4333                             "drv_ack=0x%x\n", drv_presence, drv_ack);
4334                         /*
4335                          * The function(s) which did not ack in time are forced
4336                          * to withdraw any further participation in the IDC
4337                          * reset.
4338                          */
4339                         if (drv_ack != drv_presence)
4340                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4341                                     drv_ack);
4342                         break;
4343                 }
4344
4345                 qla83xx_idc_unlock(vha, 0);
4346                 msleep(1000);
4347                 qla83xx_idc_lock(vha, 0);
4348         }
4349
4350         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
4351         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
4352 }
4353
4354 static int
4355 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
4356 {
4357         int rval = QLA_SUCCESS;
4358         uint32_t idc_control;
4359
4360         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
4361         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
4362
4363         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
4364         __qla83xx_get_idc_control(vha, &idc_control);
4365         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
4366         __qla83xx_set_idc_control(vha, 0);
4367
4368         qla83xx_idc_unlock(vha, 0);
4369         rval = qla83xx_restart_nic_firmware(vha);
4370         qla83xx_idc_lock(vha, 0);
4371
4372         if (rval != QLA_SUCCESS) {
4373                 ql_log(ql_log_fatal, vha, 0xb06a,
4374                     "Failed to restart NIC f/w.\n");
4375                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
4376                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
4377         } else {
4378                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
4379                     "Success in restarting nic f/w.\n");
4380                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
4381                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
4382         }
4383
4384         return rval;
4385 }
4386
4387 /* Assumes idc_lock always held on entry */
4388 int
4389 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
4390 {
4391         struct qla_hw_data *ha = base_vha->hw;
4392         int rval = QLA_SUCCESS;
4393         unsigned long dev_init_timeout;
4394         uint32_t dev_state;
4395
4396         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
4397         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
4398
4399         while (1) {
4400
4401                 if (time_after_eq(jiffies, dev_init_timeout)) {
4402                         ql_log(ql_log_warn, base_vha, 0xb06e,
4403                             "Initialization TIMEOUT!\n");
4404                         /* Init timeout. Disable further NIC Core
4405                          * communication.
4406                          */
4407                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4408                                 QLA8XXX_DEV_FAILED);
4409                         ql_log(ql_log_info, base_vha, 0xb06f,
4410                             "HW State: FAILED.\n");
4411                 }
4412
4413                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4414                 switch (dev_state) {
4415                 case QLA8XXX_DEV_READY:
4416                         if (ha->flags.nic_core_reset_owner)
4417                                 qla83xx_idc_audit(base_vha,
4418                                     IDC_AUDIT_COMPLETION);
4419                         ha->flags.nic_core_reset_owner = 0;
4420                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
4421                             "Reset_owner reset by 0x%x.\n",
4422                             ha->portnum);
4423                         goto exit;
4424                 case QLA8XXX_DEV_COLD:
4425                         if (ha->flags.nic_core_reset_owner)
4426                                 rval = qla83xx_device_bootstrap(base_vha);
4427                         else {
4428                         /* Wait for AEN to change device-state */
4429                                 qla83xx_idc_unlock(base_vha, 0);
4430                                 msleep(1000);
4431                                 qla83xx_idc_lock(base_vha, 0);
4432                         }
4433                         break;
4434                 case QLA8XXX_DEV_INITIALIZING:
4435                         /* Wait for AEN to change device-state */
4436                         qla83xx_idc_unlock(base_vha, 0);
4437                         msleep(1000);
4438                         qla83xx_idc_lock(base_vha, 0);
4439                         break;
4440                 case QLA8XXX_DEV_NEED_RESET:
4441                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
4442                                 qla83xx_need_reset_handler(base_vha);
4443                         else {
4444                                 /* Wait for AEN to change device-state */
4445                                 qla83xx_idc_unlock(base_vha, 0);
4446                                 msleep(1000);
4447                                 qla83xx_idc_lock(base_vha, 0);
4448                         }
4449                         /* reset timeout value after need reset handler */
4450                         dev_init_timeout = jiffies +
4451                             (ha->fcoe_dev_init_timeout * HZ);
4452                         break;
4453                 case QLA8XXX_DEV_NEED_QUIESCENT:
4454                         /* XXX: DEBUG for now */
4455                         qla83xx_idc_unlock(base_vha, 0);
4456                         msleep(1000);
4457                         qla83xx_idc_lock(base_vha, 0);
4458                         break;
4459                 case QLA8XXX_DEV_QUIESCENT:
4460                         /* XXX: DEBUG for now */
4461                         if (ha->flags.quiesce_owner)
4462                                 goto exit;
4463
4464                         qla83xx_idc_unlock(base_vha, 0);
4465                         msleep(1000);
4466                         qla83xx_idc_lock(base_vha, 0);
4467                         dev_init_timeout = jiffies +
4468                             (ha->fcoe_dev_init_timeout * HZ);
4469                         break;
4470                 case QLA8XXX_DEV_FAILED:
4471                         if (ha->flags.nic_core_reset_owner)
4472                                 qla83xx_idc_audit(base_vha,
4473                                     IDC_AUDIT_COMPLETION);
4474                         ha->flags.nic_core_reset_owner = 0;
4475                         __qla83xx_clear_drv_presence(base_vha);
4476                         qla83xx_idc_unlock(base_vha, 0);
4477                         qla8xxx_dev_failed_handler(base_vha);
4478                         rval = QLA_FUNCTION_FAILED;
4479                         qla83xx_idc_lock(base_vha, 0);
4480                         goto exit;
4481                 case QLA8XXX_BAD_VALUE:
4482                         qla83xx_idc_unlock(base_vha, 0);
4483                         msleep(1000);
4484                         qla83xx_idc_lock(base_vha, 0);
4485                         break;
4486                 default:
4487                         ql_log(ql_log_warn, base_vha, 0xb071,
4488                             "Unknow Device State: %x.\n", dev_state);
4489                         qla83xx_idc_unlock(base_vha, 0);
4490                         qla8xxx_dev_failed_handler(base_vha);
4491                         rval = QLA_FUNCTION_FAILED;
4492                         qla83xx_idc_lock(base_vha, 0);
4493                         goto exit;
4494                 }
4495         }
4496
4497 exit:
4498         return rval;
4499 }
4500
4501 /**************************************************************************
4502 * qla2x00_do_dpc
4503 *   This kernel thread is a task that is schedule by the interrupt handler
4504 *   to perform the background processing for interrupts.
4505 *
4506 * Notes:
4507 * This task always run in the context of a kernel thread.  It
4508 * is kick-off by the driver's detect code and starts up
4509 * up one per adapter. It immediately goes to sleep and waits for
4510 * some fibre event.  When either the interrupt handler or
4511 * the timer routine detects a event it will one of the task
4512 * bits then wake us up.
4513 **************************************************************************/
4514 static int
4515 qla2x00_do_dpc(void *data)
4516 {
4517         int             rval;
4518         scsi_qla_host_t *base_vha;
4519         struct qla_hw_data *ha;
4520
4521         ha = (struct qla_hw_data *)data;
4522         base_vha = pci_get_drvdata(ha->pdev);
4523
4524         set_user_nice(current, -20);
4525
4526         set_current_state(TASK_INTERRUPTIBLE);
4527         while (!kthread_should_stop()) {
4528                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
4529                     "DPC handler sleeping.\n");
4530
4531                 schedule();
4532                 __set_current_state(TASK_RUNNING);
4533
4534                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
4535                         goto end_loop;
4536
4537                 if (ha->flags.eeh_busy) {
4538                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
4539                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
4540                         goto end_loop;
4541                 }
4542
4543                 ha->dpc_active = 1;
4544
4545                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
4546                     "DPC handler waking up, dpc_flags=0x%lx.\n",
4547                     base_vha->dpc_flags);
4548
4549                 qla2x00_do_work(base_vha);
4550
4551                 if (IS_QLA82XX(ha)) {
4552                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
4553                                 &base_vha->dpc_flags)) {
4554                                 qla82xx_idc_lock(ha);
4555                                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
4556                                         QLA8XXX_DEV_FAILED);
4557                                 qla82xx_idc_unlock(ha);
4558                                 ql_log(ql_log_info, base_vha, 0x4004,
4559                                     "HW State: FAILED.\n");
4560                                 qla82xx_device_state_handler(base_vha);
4561                                 continue;
4562                         }
4563
4564                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
4565                                 &base_vha->dpc_flags)) {
4566
4567                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
4568                                     "FCoE context reset scheduled.\n");
4569                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4570                                         &base_vha->dpc_flags))) {
4571                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
4572                                                 /* FCoE-ctx reset failed.
4573                                                  * Escalate to chip-reset
4574                                                  */
4575                                                 set_bit(ISP_ABORT_NEEDED,
4576                                                         &base_vha->dpc_flags);
4577                                         }
4578                                         clear_bit(ABORT_ISP_ACTIVE,
4579                                                 &base_vha->dpc_flags);
4580                                 }
4581
4582                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
4583                                     "FCoE context reset end.\n");
4584                         }
4585                 }
4586
4587                 if (test_and_clear_bit(ISP_ABORT_NEEDED,
4588                                                 &base_vha->dpc_flags)) {
4589
4590                         ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
4591                             "ISP abort scheduled.\n");
4592                         if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4593                             &base_vha->dpc_flags))) {
4594
4595                                 if (ha->isp_ops->abort_isp(base_vha)) {
4596                                         /* failed. retry later */
4597                                         set_bit(ISP_ABORT_NEEDED,
4598                                             &base_vha->dpc_flags);
4599                                 }
4600                                 clear_bit(ABORT_ISP_ACTIVE,
4601                                                 &base_vha->dpc_flags);
4602                         }
4603
4604                         ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
4605                             "ISP abort end.\n");
4606                 }
4607
4608                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
4609                     &base_vha->dpc_flags)) {
4610                         qla2x00_update_fcports(base_vha);
4611                 }
4612
4613                 if (test_bit(SCR_PENDING, &base_vha->dpc_flags)) {
4614                         int ret;
4615                         ret = qla2x00_send_change_request(base_vha, 0x3, 0);
4616                         if (ret != QLA_SUCCESS)
4617                                 ql_log(ql_log_warn, base_vha, 0x121,
4618                                     "Failed to enable receiving of RSCN "
4619                                     "requests: 0x%x.\n", ret);
4620                         clear_bit(SCR_PENDING, &base_vha->dpc_flags);
4621                 }
4622
4623                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
4624                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
4625                             "Quiescence mode scheduled.\n");
4626                         if (IS_QLA82XX(ha)) {
4627                                 qla82xx_device_state_handler(base_vha);
4628                                 clear_bit(ISP_QUIESCE_NEEDED,
4629                                     &base_vha->dpc_flags);
4630                                 if (!ha->flags.quiesce_owner) {
4631                                         qla2x00_perform_loop_resync(base_vha);
4632
4633                                         qla82xx_idc_lock(ha);
4634                                         qla82xx_clear_qsnt_ready(base_vha);
4635                                         qla82xx_idc_unlock(ha);
4636                                 }
4637                         } else {
4638                                 clear_bit(ISP_QUIESCE_NEEDED,
4639                                     &base_vha->dpc_flags);
4640                                 qla2x00_quiesce_io(base_vha);
4641                         }
4642                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
4643                             "Quiescence mode end.\n");
4644                 }
4645
4646                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
4647                                                         &base_vha->dpc_flags) &&
4648                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
4649
4650                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
4651                             "Reset marker scheduled.\n");
4652                         qla2x00_rst_aen(base_vha);
4653                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
4654                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
4655                             "Reset marker end.\n");
4656                 }
4657
4658                 /* Retry each device up to login retry count */
4659                 if ((test_and_clear_bit(RELOGIN_NEEDED,
4660                                                 &base_vha->dpc_flags)) &&
4661                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
4662                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
4663
4664                         ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
4665                             "Relogin scheduled.\n");
4666                         qla2x00_relogin(base_vha);
4667                         ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
4668                             "Relogin end.\n");
4669                 }
4670
4671                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
4672                                                         &base_vha->dpc_flags)) {
4673
4674                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
4675                             "Loop resync scheduled.\n");
4676
4677                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
4678                             &base_vha->dpc_flags))) {
4679
4680                                 rval = qla2x00_loop_resync(base_vha);
4681
4682                                 clear_bit(LOOP_RESYNC_ACTIVE,
4683                                                 &base_vha->dpc_flags);
4684                         }
4685
4686                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
4687                             "Loop resync end.\n");
4688                 }
4689
4690                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
4691                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
4692                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
4693                         qla2xxx_flash_npiv_conf(base_vha);
4694                 }
4695
4696                 if (test_and_clear_bit(HOST_RAMP_DOWN_QUEUE_DEPTH,
4697                     &base_vha->dpc_flags)) {
4698                         /* Prevents simultaneous ramp up and down */
4699                         clear_bit(HOST_RAMP_UP_QUEUE_DEPTH,
4700                             &base_vha->dpc_flags);
4701                         qla2x00_host_ramp_down_queuedepth(base_vha);
4702                 }
4703
4704                 if (test_and_clear_bit(HOST_RAMP_UP_QUEUE_DEPTH,
4705                     &base_vha->dpc_flags))
4706                         qla2x00_host_ramp_up_queuedepth(base_vha);
4707
4708                 if (!ha->interrupts_on)
4709                         ha->isp_ops->enable_intrs(ha);
4710
4711                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
4712                                         &base_vha->dpc_flags))
4713                         ha->isp_ops->beacon_blink(base_vha);
4714
4715                 qla2x00_do_dpc_all_vps(base_vha);
4716
4717                 ha->dpc_active = 0;
4718 end_loop:
4719                 set_current_state(TASK_INTERRUPTIBLE);
4720         } /* End of while(1) */
4721         __set_current_state(TASK_RUNNING);
4722
4723         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
4724             "DPC handler exiting.\n");
4725
4726         /*
4727          * Make sure that nobody tries to wake us up again.
4728          */
4729         ha->dpc_active = 0;
4730
4731         /* Cleanup any residual CTX SRBs. */
4732         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
4733
4734         return 0;
4735 }
4736
4737 void
4738 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
4739 {
4740         struct qla_hw_data *ha = vha->hw;
4741         struct task_struct *t = ha->dpc_thread;
4742
4743         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
4744                 wake_up_process(t);
4745 }
4746
4747 /*
4748 *  qla2x00_rst_aen
4749 *      Processes asynchronous reset.
4750 *
4751 * Input:
4752 *      ha  = adapter block pointer.
4753 */
4754 static void
4755 qla2x00_rst_aen(scsi_qla_host_t *vha)
4756 {
4757         if (vha->flags.online && !vha->flags.reset_active &&
4758             !atomic_read(&vha->loop_down_timer) &&
4759             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
4760                 do {
4761                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
4762
4763                         /*
4764                          * Issue marker command only when we are going to start
4765                          * the I/O.
4766                          */
4767                         vha->marker_needed = 1;
4768                 } while (!atomic_read(&vha->loop_down_timer) &&
4769                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
4770         }
4771 }
4772
4773 /**************************************************************************
4774 *   qla2x00_timer
4775 *
4776 * Description:
4777 *   One second timer
4778 *
4779 * Context: Interrupt
4780 ***************************************************************************/
4781 void
4782 qla2x00_timer(scsi_qla_host_t *vha)
4783 {
4784         unsigned long   cpu_flags = 0;
4785         int             start_dpc = 0;
4786         int             index;
4787         srb_t           *sp;
4788         uint16_t        w;
4789         struct qla_hw_data *ha = vha->hw;
4790         struct req_que *req;
4791
4792         if (ha->flags.eeh_busy) {
4793                 ql_dbg(ql_dbg_timer, vha, 0x6000,
4794                     "EEH = %d, restarting timer.\n",
4795                     ha->flags.eeh_busy);
4796                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
4797                 return;
4798         }
4799
4800         /* Hardware read to raise pending EEH errors during mailbox waits. */
4801         if (!pci_channel_offline(ha->pdev))
4802                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
4803
4804         /* Make sure qla82xx_watchdog is run only for physical port */
4805         if (!vha->vp_idx && IS_QLA82XX(ha)) {
4806                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
4807                         start_dpc++;
4808                 qla82xx_watchdog(vha);
4809         }
4810
4811         /* Loop down handler. */
4812         if (atomic_read(&vha->loop_down_timer) > 0 &&
4813             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
4814             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
4815                 && vha->flags.online) {
4816
4817                 if (atomic_read(&vha->loop_down_timer) ==
4818                     vha->loop_down_abort_time) {
4819
4820                         ql_log(ql_log_info, vha, 0x6008,
4821                             "Loop down - aborting the queues before time expires.\n");
4822
4823                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
4824                                 atomic_set(&vha->loop_state, LOOP_DEAD);
4825
4826                         /*
4827                          * Schedule an ISP abort to return any FCP2-device
4828                          * commands.
4829                          */
4830                         /* NPIV - scan physical port only */
4831                         if (!vha->vp_idx) {
4832                                 spin_lock_irqsave(&ha->hardware_lock,
4833                                     cpu_flags);
4834                                 req = ha->req_q_map[0];
4835                                 for (index = 1;
4836                                     index < req->num_outstanding_cmds;
4837                                     index++) {
4838                                         fc_port_t *sfcp;
4839
4840                                         sp = req->outstanding_cmds[index];
4841                                         if (!sp)
4842                                                 continue;
4843                                         if (sp->type != SRB_SCSI_CMD)
4844                                                 continue;
4845                                         sfcp = sp->fcport;
4846                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
4847                                                 continue;
4848
4849                                         if (IS_QLA82XX(ha))
4850                                                 set_bit(FCOE_CTX_RESET_NEEDED,
4851                                                         &vha->dpc_flags);
4852                                         else
4853                                                 set_bit(ISP_ABORT_NEEDED,
4854                                                         &vha->dpc_flags);
4855                                         break;
4856                                 }
4857                                 spin_unlock_irqrestore(&ha->hardware_lock,
4858                                                                 cpu_flags);
4859                         }
4860                         start_dpc++;
4861                 }
4862
4863                 /* if the loop has been down for 4 minutes, reinit adapter */
4864                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
4865                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
4866                                 ql_log(ql_log_warn, vha, 0x6009,
4867                                     "Loop down - aborting ISP.\n");
4868
4869                                 if (IS_QLA82XX(ha))
4870                                         set_bit(FCOE_CTX_RESET_NEEDED,
4871                                                 &vha->dpc_flags);
4872                                 else
4873                                         set_bit(ISP_ABORT_NEEDED,
4874                                                 &vha->dpc_flags);
4875                         }
4876                 }
4877                 ql_dbg(ql_dbg_timer, vha, 0x600a,
4878                     "Loop down - seconds remaining %d.\n",
4879                     atomic_read(&vha->loop_down_timer));
4880         }
4881
4882         /* Check if beacon LED needs to be blinked for physical host only */
4883         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
4884                 /* There is no beacon_blink function for ISP82xx */
4885                 if (!IS_QLA82XX(ha)) {
4886                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
4887                         start_dpc++;
4888                 }
4889         }
4890
4891         /* Process any deferred work. */
4892         if (!list_empty(&vha->work_list))
4893                 start_dpc++;
4894
4895         /* Schedule the DPC routine if needed */
4896         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
4897             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
4898             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
4899             start_dpc ||
4900             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
4901             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
4902             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
4903             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
4904             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
4905             test_bit(RELOGIN_NEEDED, &vha->dpc_flags) ||
4906             test_bit(HOST_RAMP_DOWN_QUEUE_DEPTH, &vha->dpc_flags) ||
4907             test_bit(HOST_RAMP_UP_QUEUE_DEPTH, &vha->dpc_flags))) {
4908                 ql_dbg(ql_dbg_timer, vha, 0x600b,
4909                     "isp_abort_needed=%d loop_resync_needed=%d "
4910                     "fcport_update_needed=%d start_dpc=%d "
4911                     "reset_marker_needed=%d",
4912                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
4913                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
4914                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
4915                     start_dpc,
4916                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
4917                 ql_dbg(ql_dbg_timer, vha, 0x600c,
4918                     "beacon_blink_needed=%d isp_unrecoverable=%d "
4919                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
4920                     "relogin_needed=%d, host_ramp_down_needed=%d "
4921                     "host_ramp_up_needed=%d.\n",
4922                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
4923                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
4924                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
4925                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
4926                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags),
4927                     test_bit(HOST_RAMP_UP_QUEUE_DEPTH, &vha->dpc_flags),
4928                     test_bit(HOST_RAMP_DOWN_QUEUE_DEPTH, &vha->dpc_flags));
4929                 qla2xxx_wake_dpc(vha);
4930         }
4931
4932         qla2x00_restart_timer(vha, WATCH_INTERVAL);
4933 }
4934
4935 /* Firmware interface routines. */
4936
4937 #define FW_BLOBS        10
4938 #define FW_ISP21XX      0
4939 #define FW_ISP22XX      1
4940 #define FW_ISP2300      2
4941 #define FW_ISP2322      3
4942 #define FW_ISP24XX      4
4943 #define FW_ISP25XX      5
4944 #define FW_ISP81XX      6
4945 #define FW_ISP82XX      7
4946 #define FW_ISP2031      8
4947 #define FW_ISP8031      9
4948
4949 #define FW_FILE_ISP21XX "ql2100_fw.bin"
4950 #define FW_FILE_ISP22XX "ql2200_fw.bin"
4951 #define FW_FILE_ISP2300 "ql2300_fw.bin"
4952 #define FW_FILE_ISP2322 "ql2322_fw.bin"
4953 #define FW_FILE_ISP24XX "ql2400_fw.bin"
4954 #define FW_FILE_ISP25XX "ql2500_fw.bin"
4955 #define FW_FILE_ISP81XX "ql8100_fw.bin"
4956 #define FW_FILE_ISP82XX "ql8200_fw.bin"
4957 #define FW_FILE_ISP2031 "ql2600_fw.bin"
4958 #define FW_FILE_ISP8031 "ql8300_fw.bin"
4959
4960 static DEFINE_MUTEX(qla_fw_lock);
4961
4962 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
4963         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
4964         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
4965         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
4966         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
4967         { .name = FW_FILE_ISP24XX, },
4968         { .name = FW_FILE_ISP25XX, },
4969         { .name = FW_FILE_ISP81XX, },
4970         { .name = FW_FILE_ISP82XX, },
4971         { .name = FW_FILE_ISP2031, },
4972         { .name = FW_FILE_ISP8031, },
4973 };
4974
4975 struct fw_blob *
4976 qla2x00_request_firmware(scsi_qla_host_t *vha)
4977 {
4978         struct qla_hw_data *ha = vha->hw;
4979         struct fw_blob *blob;
4980
4981         if (IS_QLA2100(ha)) {
4982                 blob = &qla_fw_blobs[FW_ISP21XX];
4983         } else if (IS_QLA2200(ha)) {
4984                 blob = &qla_fw_blobs[FW_ISP22XX];
4985         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
4986                 blob = &qla_fw_blobs[FW_ISP2300];
4987         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
4988                 blob = &qla_fw_blobs[FW_ISP2322];
4989         } else if (IS_QLA24XX_TYPE(ha)) {
4990                 blob = &qla_fw_blobs[FW_ISP24XX];
4991         } else if (IS_QLA25XX(ha)) {
4992                 blob = &qla_fw_blobs[FW_ISP25XX];
4993         } else if (IS_QLA81XX(ha)) {
4994                 blob = &qla_fw_blobs[FW_ISP81XX];
4995         } else if (IS_QLA82XX(ha)) {
4996                 blob = &qla_fw_blobs[FW_ISP82XX];
4997         } else if (IS_QLA2031(ha)) {
4998                 blob = &qla_fw_blobs[FW_ISP2031];
4999         } else if (IS_QLA8031(ha)) {
5000                 blob = &qla_fw_blobs[FW_ISP8031];
5001         } else {
5002                 return NULL;
5003         }
5004
5005         mutex_lock(&qla_fw_lock);
5006         if (blob->fw)
5007                 goto out;
5008
5009         if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
5010                 ql_log(ql_log_warn, vha, 0x0063,
5011                     "Failed to load firmware image (%s).\n", blob->name);
5012                 blob->fw = NULL;
5013                 blob = NULL;
5014                 goto out;
5015         }
5016
5017 out:
5018         mutex_unlock(&qla_fw_lock);
5019         return blob;
5020 }
5021
5022 static void
5023 qla2x00_release_firmware(void)
5024 {
5025         int idx;
5026
5027         mutex_lock(&qla_fw_lock);
5028         for (idx = 0; idx < FW_BLOBS; idx++)
5029                 release_firmware(qla_fw_blobs[idx].fw);
5030         mutex_unlock(&qla_fw_lock);
5031 }
5032
5033 static pci_ers_result_t
5034 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5035 {
5036         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
5037         struct qla_hw_data *ha = vha->hw;
5038
5039         ql_dbg(ql_dbg_aer, vha, 0x9000,
5040             "PCI error detected, state %x.\n", state);
5041
5042         switch (state) {
5043         case pci_channel_io_normal:
5044                 ha->flags.eeh_busy = 0;
5045                 return PCI_ERS_RESULT_CAN_RECOVER;
5046         case pci_channel_io_frozen:
5047                 ha->flags.eeh_busy = 1;
5048                 /* For ISP82XX complete any pending mailbox cmd */
5049                 if (IS_QLA82XX(ha)) {
5050                         ha->flags.isp82xx_fw_hung = 1;
5051                         ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
5052                         qla82xx_clear_pending_mbx(vha);
5053                 }
5054                 qla2x00_free_irqs(vha);
5055                 pci_disable_device(pdev);
5056                 /* Return back all IOs */
5057                 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
5058                 return PCI_ERS_RESULT_NEED_RESET;
5059         case pci_channel_io_perm_failure:
5060                 ha->flags.pci_channel_io_perm_failure = 1;
5061                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
5062                 return PCI_ERS_RESULT_DISCONNECT;
5063         }
5064         return PCI_ERS_RESULT_NEED_RESET;
5065 }
5066
5067 static pci_ers_result_t
5068 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
5069 {
5070         int risc_paused = 0;
5071         uint32_t stat;
5072         unsigned long flags;
5073         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5074         struct qla_hw_data *ha = base_vha->hw;
5075         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
5076         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
5077
5078         if (IS_QLA82XX(ha))
5079                 return PCI_ERS_RESULT_RECOVERED;
5080
5081         spin_lock_irqsave(&ha->hardware_lock, flags);
5082         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
5083                 stat = RD_REG_DWORD(&reg->hccr);
5084                 if (stat & HCCR_RISC_PAUSE)
5085                         risc_paused = 1;
5086         } else if (IS_QLA23XX(ha)) {
5087                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
5088                 if (stat & HSR_RISC_PAUSED)
5089                         risc_paused = 1;
5090         } else if (IS_FWI2_CAPABLE(ha)) {
5091                 stat = RD_REG_DWORD(&reg24->host_status);
5092                 if (stat & HSRX_RISC_PAUSED)
5093                         risc_paused = 1;
5094         }
5095         spin_unlock_irqrestore(&ha->hardware_lock, flags);
5096
5097         if (risc_paused) {
5098                 ql_log(ql_log_info, base_vha, 0x9003,
5099                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
5100                 ha->isp_ops->fw_dump(base_vha, 0);
5101
5102                 return PCI_ERS_RESULT_NEED_RESET;
5103         } else
5104                 return PCI_ERS_RESULT_RECOVERED;
5105 }
5106
5107 static uint32_t
5108 qla82xx_error_recovery(scsi_qla_host_t *base_vha)
5109 {
5110         uint32_t rval = QLA_FUNCTION_FAILED;
5111         uint32_t drv_active = 0;
5112         struct qla_hw_data *ha = base_vha->hw;
5113         int fn;
5114         struct pci_dev *other_pdev = NULL;
5115
5116         ql_dbg(ql_dbg_aer, base_vha, 0x9006,
5117             "Entered %s.\n", __func__);
5118
5119         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5120
5121         if (base_vha->flags.online) {
5122                 /* Abort all outstanding commands,
5123                  * so as to be requeued later */
5124                 qla2x00_abort_isp_cleanup(base_vha);
5125         }
5126
5127
5128         fn = PCI_FUNC(ha->pdev->devfn);
5129         while (fn > 0) {
5130                 fn--;
5131                 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
5132                     "Finding pci device at function = 0x%x.\n", fn);
5133                 other_pdev =
5134                     pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
5135                     ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
5136                     fn));
5137
5138                 if (!other_pdev)
5139                         continue;
5140                 if (atomic_read(&other_pdev->enable_cnt)) {
5141                         ql_dbg(ql_dbg_aer, base_vha, 0x9008,
5142                             "Found PCI func available and enable at 0x%x.\n",
5143                             fn);
5144                         pci_dev_put(other_pdev);
5145                         break;
5146                 }
5147                 pci_dev_put(other_pdev);
5148         }
5149
5150         if (!fn) {
5151                 /* Reset owner */
5152                 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
5153                     "This devfn is reset owner = 0x%x.\n",
5154                     ha->pdev->devfn);
5155                 qla82xx_idc_lock(ha);
5156
5157                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5158                     QLA8XXX_DEV_INITIALIZING);
5159
5160                 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
5161                     QLA82XX_IDC_VERSION);
5162
5163                 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
5164                 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
5165                     "drv_active = 0x%x.\n", drv_active);
5166
5167                 qla82xx_idc_unlock(ha);
5168                 /* Reset if device is not already reset
5169                  * drv_active would be 0 if a reset has already been done
5170                  */
5171                 if (drv_active)
5172                         rval = qla82xx_start_firmware(base_vha);
5173                 else
5174                         rval = QLA_SUCCESS;
5175                 qla82xx_idc_lock(ha);
5176
5177                 if (rval != QLA_SUCCESS) {
5178                         ql_log(ql_log_info, base_vha, 0x900b,
5179                             "HW State: FAILED.\n");
5180                         qla82xx_clear_drv_active(ha);
5181                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5182                             QLA8XXX_DEV_FAILED);
5183                 } else {
5184                         ql_log(ql_log_info, base_vha, 0x900c,
5185                             "HW State: READY.\n");
5186                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5187                             QLA8XXX_DEV_READY);
5188                         qla82xx_idc_unlock(ha);
5189                         ha->flags.isp82xx_fw_hung = 0;
5190                         rval = qla82xx_restart_isp(base_vha);
5191                         qla82xx_idc_lock(ha);
5192                         /* Clear driver state register */
5193                         qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
5194                         qla82xx_set_drv_active(base_vha);
5195                 }
5196                 qla82xx_idc_unlock(ha);
5197         } else {
5198                 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
5199                     "This devfn is not reset owner = 0x%x.\n",
5200                     ha->pdev->devfn);
5201                 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
5202                     QLA8XXX_DEV_READY)) {
5203                         ha->flags.isp82xx_fw_hung = 0;
5204                         rval = qla82xx_restart_isp(base_vha);
5205                         qla82xx_idc_lock(ha);
5206                         qla82xx_set_drv_active(base_vha);
5207                         qla82xx_idc_unlock(ha);
5208                 }
5209         }
5210         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5211
5212         return rval;
5213 }
5214
5215 static pci_ers_result_t
5216 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
5217 {
5218         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
5219         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5220         struct qla_hw_data *ha = base_vha->hw;
5221         struct rsp_que *rsp;
5222         int rc, retries = 10;
5223
5224         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
5225             "Slot Reset.\n");
5226
5227         /* Workaround: qla2xxx driver which access hardware earlier
5228          * needs error state to be pci_channel_io_online.
5229          * Otherwise mailbox command timesout.
5230          */
5231         pdev->error_state = pci_channel_io_normal;
5232
5233         pci_restore_state(pdev);
5234
5235         /* pci_restore_state() clears the saved_state flag of the device
5236          * save restored state which resets saved_state flag
5237          */
5238         pci_save_state(pdev);
5239
5240         if (ha->mem_only)
5241                 rc = pci_enable_device_mem(pdev);
5242         else
5243                 rc = pci_enable_device(pdev);
5244
5245         if (rc) {
5246                 ql_log(ql_log_warn, base_vha, 0x9005,
5247                     "Can't re-enable PCI device after reset.\n");
5248                 goto exit_slot_reset;
5249         }
5250
5251         rsp = ha->rsp_q_map[0];
5252         if (qla2x00_request_irqs(ha, rsp))
5253                 goto exit_slot_reset;
5254
5255         if (ha->isp_ops->pci_config(base_vha))
5256                 goto exit_slot_reset;
5257
5258         if (IS_QLA82XX(ha)) {
5259                 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
5260                         ret = PCI_ERS_RESULT_RECOVERED;
5261                         goto exit_slot_reset;
5262                 } else
5263                         goto exit_slot_reset;
5264         }
5265
5266         while (ha->flags.mbox_busy && retries--)
5267                 msleep(1000);
5268
5269         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5270         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
5271                 ret =  PCI_ERS_RESULT_RECOVERED;
5272         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5273
5274
5275 exit_slot_reset:
5276         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
5277             "slot_reset return %x.\n", ret);
5278
5279         return ret;
5280 }
5281
5282 static void
5283 qla2xxx_pci_resume(struct pci_dev *pdev)
5284 {
5285         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5286         struct qla_hw_data *ha = base_vha->hw;
5287         int ret;
5288
5289         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
5290             "pci_resume.\n");
5291
5292         ret = qla2x00_wait_for_hba_online(base_vha);
5293         if (ret != QLA_SUCCESS) {
5294                 ql_log(ql_log_fatal, base_vha, 0x9002,
5295                     "The device failed to resume I/O from slot/link_reset.\n");
5296         }
5297
5298         pci_cleanup_aer_uncorrect_error_status(pdev);
5299
5300         ha->flags.eeh_busy = 0;
5301 }
5302
5303 static const struct pci_error_handlers qla2xxx_err_handler = {
5304         .error_detected = qla2xxx_pci_error_detected,
5305         .mmio_enabled = qla2xxx_pci_mmio_enabled,
5306         .slot_reset = qla2xxx_pci_slot_reset,
5307         .resume = qla2xxx_pci_resume,
5308 };
5309
5310 static struct pci_device_id qla2xxx_pci_tbl[] = {
5311         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
5312         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
5313         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
5314         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
5315         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
5316         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
5317         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
5318         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
5319         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
5320         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
5321         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
5322         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
5323         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
5324         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
5325         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
5326         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
5327         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
5328         { 0 },
5329 };
5330 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
5331
5332 static struct pci_driver qla2xxx_pci_driver = {
5333         .name           = QLA2XXX_DRIVER_NAME,
5334         .driver         = {
5335                 .owner          = THIS_MODULE,
5336         },
5337         .id_table       = qla2xxx_pci_tbl,
5338         .probe          = qla2x00_probe_one,
5339         .remove         = qla2x00_remove_one,
5340         .shutdown       = qla2x00_shutdown,
5341         .err_handler    = &qla2xxx_err_handler,
5342 };
5343
5344 static struct file_operations apidev_fops = {
5345         .owner = THIS_MODULE,
5346         .llseek = noop_llseek,
5347 };
5348
5349 /**
5350  * qla2x00_module_init - Module initialization.
5351  **/
5352 static int __init
5353 qla2x00_module_init(void)
5354 {
5355         int ret = 0;
5356
5357         /* Allocate cache for SRBs. */
5358         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
5359             SLAB_HWCACHE_ALIGN, NULL);
5360         if (srb_cachep == NULL) {
5361                 ql_log(ql_log_fatal, NULL, 0x0001,
5362                     "Unable to allocate SRB cache...Failing load!.\n");
5363                 return -ENOMEM;
5364         }
5365
5366         /* Initialize target kmem_cache and mem_pools */
5367         ret = qlt_init();
5368         if (ret < 0) {
5369                 kmem_cache_destroy(srb_cachep);
5370                 return ret;
5371         } else if (ret > 0) {
5372                 /*
5373                  * If initiator mode is explictly disabled by qlt_init(),
5374                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
5375                  * performing scsi_scan_target() during LOOP UP event.
5376                  */
5377                 qla2xxx_transport_functions.disable_target_scan = 1;
5378                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
5379         }
5380
5381         /* Derive version string. */
5382         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
5383         if (ql2xextended_error_logging)
5384                 strcat(qla2x00_version_str, "-debug");
5385
5386         qla2xxx_transport_template =
5387             fc_attach_transport(&qla2xxx_transport_functions);
5388         if (!qla2xxx_transport_template) {
5389                 kmem_cache_destroy(srb_cachep);
5390                 ql_log(ql_log_fatal, NULL, 0x0002,
5391                     "fc_attach_transport failed...Failing load!.\n");
5392                 qlt_exit();
5393                 return -ENODEV;
5394         }
5395
5396         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
5397         if (apidev_major < 0) {
5398                 ql_log(ql_log_fatal, NULL, 0x0003,
5399                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
5400         }
5401
5402         qla2xxx_transport_vport_template =
5403             fc_attach_transport(&qla2xxx_transport_vport_functions);
5404         if (!qla2xxx_transport_vport_template) {
5405                 kmem_cache_destroy(srb_cachep);
5406                 qlt_exit();
5407                 fc_release_transport(qla2xxx_transport_template);
5408                 ql_log(ql_log_fatal, NULL, 0x0004,
5409                     "fc_attach_transport vport failed...Failing load!.\n");
5410                 return -ENODEV;
5411         }
5412         ql_log(ql_log_info, NULL, 0x0005,
5413             "QLogic Fibre Channel HBA Driver: %s.\n",
5414             qla2x00_version_str);
5415         ret = pci_register_driver(&qla2xxx_pci_driver);
5416         if (ret) {
5417                 kmem_cache_destroy(srb_cachep);
5418                 qlt_exit();
5419                 fc_release_transport(qla2xxx_transport_template);
5420                 fc_release_transport(qla2xxx_transport_vport_template);
5421                 ql_log(ql_log_fatal, NULL, 0x0006,
5422                     "pci_register_driver failed...ret=%d Failing load!.\n",
5423                     ret);
5424         }
5425         return ret;
5426 }
5427
5428 /**
5429  * qla2x00_module_exit - Module cleanup.
5430  **/
5431 static void __exit
5432 qla2x00_module_exit(void)
5433 {
5434         unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
5435         pci_unregister_driver(&qla2xxx_pci_driver);
5436         qla2x00_release_firmware();
5437         kmem_cache_destroy(srb_cachep);
5438         qlt_exit();
5439         if (ctx_cachep)
5440                 kmem_cache_destroy(ctx_cachep);
5441         fc_release_transport(qla2xxx_transport_template);
5442         fc_release_transport(qla2xxx_transport_vport_template);
5443 }
5444
5445 module_init(qla2x00_module_init);
5446 module_exit(qla2x00_module_exit);
5447
5448 MODULE_AUTHOR("QLogic Corporation");
5449 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
5450 MODULE_LICENSE("GPL");
5451 MODULE_VERSION(QLA2XXX_VERSION);
5452 MODULE_FIRMWARE(FW_FILE_ISP21XX);
5453 MODULE_FIRMWARE(FW_FILE_ISP22XX);
5454 MODULE_FIRMWARE(FW_FILE_ISP2300);
5455 MODULE_FIRMWARE(FW_FILE_ISP2322);
5456 MODULE_FIRMWARE(FW_FILE_ISP24XX);
5457 MODULE_FIRMWARE(FW_FILE_ISP25XX);