drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2013 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <scsi/scsi_tcq.h>
  17 #include <scsi/scsicam.h>
  18 #include <scsi/scsi_transport.h>
  19 #include <scsi/scsi_transport_fc.h>
  20
  21 #include "qla_target.h"
  22
  23 /*
  24  * Driver version
  25  */
  26 char qla2x00_version_str[40];
  27
  28 static int apidev_major;
  29
  30 /*
  31  * SRB allocation cache
  32  */
  33 static struct kmem_cache *srb_cachep;
  34
  35 /*
  36  * CT6 CTX allocation cache
  37  */
  38 static struct kmem_cache *ctx_cachep;
  39 /*
  40  * error level for logging
  41  */
  42 int ql_errlev = ql_log_all;
  43
  44 static int ql2xenableclass2;
  45 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  46 MODULE_PARM_DESC(ql2xenableclass2,
  47                 "Specify if Class 2 operations are supported from the very "
  48                 "beginning. Default is 0 - class 2 not supported.");
  49
  50
  51 int ql2xlogintimeout = 20;
  52 module_param(ql2xlogintimeout, int, S_IRUGO);
  53 MODULE_PARM_DESC(ql2xlogintimeout,
  54                 "Login timeout value in seconds.");
  55
  56 int qlport_down_retry;
  57 module_param(qlport_down_retry, int, S_IRUGO);
  58 MODULE_PARM_DESC(qlport_down_retry,
  59                 "Maximum number of command retries to a port that returns "
  60                 "a PORT-DOWN status.");
  61
  62 int ql2xplogiabsentdevice;
  63 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  64 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  65                 "Option to enable PLOGI to devices that are not present after "
  66                 "a Fabric scan.  This is needed for several broken switches. "
  67                 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  68
  69 int ql2xloginretrycount = 0;
  70 module_param(ql2xloginretrycount, int, S_IRUGO);
  71 MODULE_PARM_DESC(ql2xloginretrycount,
  72                 "Specify an alternate value for the NVRAM login retry count.");
  73
  74 int ql2xallocfwdump = 1;
  75 module_param(ql2xallocfwdump, int, S_IRUGO);
  76 MODULE_PARM_DESC(ql2xallocfwdump,
  77                 "Option to enable allocation of memory for a firmware dump "
  78                 "during HBA initialization.  Memory allocation requirements "
  79                 "vary by ISP type.  Default is 1 - allocate memory.");
  80
  81 int ql2xextended_error_logging;
  82 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  83 MODULE_PARM_DESC(ql2xextended_error_logging,
  84                 "Option to enable extended error logging,\n"
  85                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  86                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  87                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  88                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  89                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  90                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  91                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  92                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  93                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
  94                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
  95                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
  96                 "\t\t0x1e400000 - Preferred value for capturing essential "
  97                 "debug information (equivalent to old "
  98                 "ql2xextended_error_logging=1).\n"
  99                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 100
 101 int ql2xshiftctondsd = 6;
 102 module_param(ql2xshiftctondsd, int, S_IRUGO);
 103 MODULE_PARM_DESC(ql2xshiftctondsd,
 104                 "Set to control shifting of command type processing "
 105                 "based on total number of SG elements.");
 106
 107 int ql2xfdmienable=1;
 108 module_param(ql2xfdmienable, int, S_IRUGO);
 109 MODULE_PARM_DESC(ql2xfdmienable,
 110                 "Enables FDMI registrations. "
 111                 "0 - no FDMI. Default is 1 - perform FDMI.");
 112
 113 #define MAX_Q_DEPTH     32
 114 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 115 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 116 MODULE_PARM_DESC(ql2xmaxqdepth,
 117                 "Maximum queue depth to set for each LUN. "
 118                 "Default is 32.");
 119
 120 int ql2xenabledif = 2;
 121 module_param(ql2xenabledif, int, S_IRUGO);
 122 MODULE_PARM_DESC(ql2xenabledif,
 123                 " Enable T10-CRC-DIF "
 124                 " Default is 0 - No DIF Support. 1 - Enable it"
 125                 ", 2 - Enable DIF for all types, except Type 0.");
 126
 127 int ql2xenablehba_err_chk = 2;
 128 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 129 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 130                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 131                 " Default is 1.\n"
 132                 "  0 -- Error isolation disabled\n"
 133                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 134                 "  2 -- Error isolation enabled for all Types\n");
 135
 136 int ql2xiidmaenable=1;
 137 module_param(ql2xiidmaenable, int, S_IRUGO);
 138 MODULE_PARM_DESC(ql2xiidmaenable,
 139                 "Enables iIDMA settings "
 140                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 141
 142 int ql2xmaxqueues = 1;
 143 module_param(ql2xmaxqueues, int, S_IRUGO);
 144 MODULE_PARM_DESC(ql2xmaxqueues,
 145                 "Enables MQ settings "
 146                 "Default is 1 for single queue. Set it to number "
 147                 "of queues in MQ mode.");
 148
 149 int ql2xmultique_tag;
 150 module_param(ql2xmultique_tag, int, S_IRUGO);
 151 MODULE_PARM_DESC(ql2xmultique_tag,
 152                 "Enables CPU affinity settings for the driver "
 153                 "Default is 0 for no affinity of request and response IO. "
 154                 "Set it to 1 to turn on the cpu affinity.");
 155
 156 int ql2xfwloadbin;
 157 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 158 MODULE_PARM_DESC(ql2xfwloadbin,
 159                 "Option to specify location from which to load ISP firmware:.\n"
 160                 " 2 -- load firmware via the request_firmware() (hotplug).\n"
 161                 "      interface.\n"
 162                 " 1 -- load firmware from flash.\n"
 163                 " 0 -- use default semantics.\n");
 164
 165 int ql2xetsenable;
 166 module_param(ql2xetsenable, int, S_IRUGO);
 167 MODULE_PARM_DESC(ql2xetsenable,
 168                 "Enables firmware ETS burst."
 169                 "Default is 0 - skip ETS enablement.");
 170
 171 int ql2xdbwr = 1;
 172 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 173 MODULE_PARM_DESC(ql2xdbwr,
 174                 "Option to specify scheme for request queue posting.\n"
 175                 " 0 -- Regular doorbell.\n"
 176                 " 1 -- CAMRAM doorbell (faster).\n");
 177
 178 int ql2xtargetreset = 1;
 179 module_param(ql2xtargetreset, int, S_IRUGO);
 180 MODULE_PARM_DESC(ql2xtargetreset,
 181                  "Enable target reset."
 182                  "Default is 1 - use hw defaults.");
 183
 184 int ql2xgffidenable;
 185 module_param(ql2xgffidenable, int, S_IRUGO);
 186 MODULE_PARM_DESC(ql2xgffidenable,
 187                 "Enables GFF_ID checks of port type. "
 188                 "Default is 0 - Do not use GFF_ID information.");
 189
 190 int ql2xasynctmfenable;
 191 module_param(ql2xasynctmfenable, int, S_IRUGO);
 192 MODULE_PARM_DESC(ql2xasynctmfenable,
 193                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 194                 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
 195
 196 int ql2xdontresethba;
 197 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 198 MODULE_PARM_DESC(ql2xdontresethba,
 199                 "Option to specify reset behaviour.\n"
 200                 " 0 (Default) -- Reset on failure.\n"
 201                 " 1 -- Do not reset on failure.\n");
 202
 203 uint ql2xmaxlun = MAX_LUNS;
 204 module_param(ql2xmaxlun, uint, S_IRUGO);
 205 MODULE_PARM_DESC(ql2xmaxlun,
 206                 "Defines the maximum LU number to register with the SCSI "
 207                 "midlayer. Default is 65535.");
 208
 209 int ql2xmdcapmask = 0x1F;
 210 module_param(ql2xmdcapmask, int, S_IRUGO);
 211 MODULE_PARM_DESC(ql2xmdcapmask,
 212                 "Set the Minidump driver capture mask level. "
 213                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 214
 215 int ql2xmdenable = 1;
 216 module_param(ql2xmdenable, int, S_IRUGO);
 217 MODULE_PARM_DESC(ql2xmdenable,
 218                 "Enable/disable MiniDump. "
 219                 "0 - MiniDump disabled. "
 220                 "1 (Default) - MiniDump enabled.");
 221
 222 /*
 223  * SCSI host template entry points
 224  */
 225 static int qla2xxx_slave_configure(struct scsi_device * device);
 226 static int qla2xxx_slave_alloc(struct scsi_device *);
 227 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
 228 static void qla2xxx_scan_start(struct Scsi_Host *);
 229 static void qla2xxx_slave_destroy(struct scsi_device *);
 230 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 231 static int qla2xxx_eh_abort(struct scsi_cmnd *);
 232 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
 233 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
 234 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
 235 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
 236
 237 static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
 238 static int qla2x00_change_queue_type(struct scsi_device *, int);
 239 static void qla2x00_free_device(scsi_qla_host_t *);
 240
 241 struct scsi_host_template qla2xxx_driver_template = {
 242         .module                 = THIS_MODULE,
 243         .name                   = QLA2XXX_DRIVER_NAME,
 244         .queuecommand           = qla2xxx_queuecommand,
 245
 246         .eh_abort_handler       = qla2xxx_eh_abort,
 247         .eh_device_reset_handler = qla2xxx_eh_device_reset,
 248         .eh_target_reset_handler = qla2xxx_eh_target_reset,
 249         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
 250         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
 251
 252         .slave_configure        = qla2xxx_slave_configure,
 253
 254         .slave_alloc            = qla2xxx_slave_alloc,
 255         .slave_destroy          = qla2xxx_slave_destroy,
 256         .scan_finished          = qla2xxx_scan_finished,
 257         .scan_start             = qla2xxx_scan_start,
 258         .change_queue_depth     = qla2x00_change_queue_depth,
 259         .change_queue_type      = qla2x00_change_queue_type,
 260         .this_id                = -1,
 261         .cmd_per_lun            = 3,
 262         .use_clustering         = ENABLE_CLUSTERING,
 263         .sg_tablesize           = SG_ALL,
 264
 265         .max_sectors            = 0xFFFF,
 266         .shost_attrs            = qla2x00_host_attrs,
 267
 268         .supported_mode         = MODE_INITIATOR,
 269 };
 270
 271 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 272 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 273
 274 /* TODO Convert to inlines
 275  *
 276  * Timer routines
 277  */
 278
 279 __inline__ void
 280 qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
 281 {
 282         init_timer(&vha->timer);
 283         vha->timer.expires = jiffies + interval * HZ;
 284         vha->timer.data = (unsigned long)vha;
 285         vha->timer.function = (void (*)(unsigned long))func;
 286         add_timer(&vha->timer);
 287         vha->timer_active = 1;
 288 }
 289
 290 static inline void
 291 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 292 {
 293         /* Currently used for 82XX only. */
 294         if (vha->device_flags & DFLG_DEV_FAILED) {
 295                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 296                     "Device in a failed state, returning.\n");
 297                 return;
 298         }
 299
 300         mod_timer(&vha->timer, jiffies + interval * HZ);
 301 }
 302
 303 static __inline__ void
 304 qla2x00_stop_timer(scsi_qla_host_t *vha)
 305 {
 306         del_timer_sync(&vha->timer);
 307         vha->timer_active = 0;
 308 }
 309
 310 static int qla2x00_do_dpc(void *data);
 311
 312 static void qla2x00_rst_aen(scsi_qla_host_t *);
 313
 314 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 315         struct req_que **, struct rsp_que **);
 316 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 317 static void qla2x00_mem_free(struct qla_hw_data *);
 318
 319 /* -------------------------------------------------------------------------- */
 320 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 321                                 struct rsp_que *rsp)
 322 {
 323         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 324         ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
 325                                 GFP_KERNEL);
 326         if (!ha->req_q_map) {
 327                 ql_log(ql_log_fatal, vha, 0x003b,
 328                     "Unable to allocate memory for request queue ptrs.\n");
 329                 goto fail_req_map;
 330         }
 331
 332         ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
 333                                 GFP_KERNEL);
 334         if (!ha->rsp_q_map) {
 335                 ql_log(ql_log_fatal, vha, 0x003c,
 336                     "Unable to allocate memory for response queue ptrs.\n");
 337                 goto fail_rsp_map;
 338         }
 339         /*
 340          * Make sure we record at least the request and response queue zero in
 341          * case we need to free them if part of the probe fails.
 342          */
 343         ha->rsp_q_map[0] = rsp;
 344         ha->req_q_map[0] = req;
 345         set_bit(0, ha->rsp_qid_map);
 346         set_bit(0, ha->req_qid_map);
 347         return 1;
 348
 349 fail_rsp_map:
 350         kfree(ha->req_q_map);
 351         ha->req_q_map = NULL;
 352 fail_req_map:
 353         return -ENOMEM;
 354 }
 355
 356 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 357 {
 358         if (IS_QLAFX00(ha)) {
 359                 if (req && req->ring_fx00)
 360                         dma_free_coherent(&ha->pdev->dev,
 361                             (req->length_fx00 + 1) * sizeof(request_t),
 362                             req->ring_fx00, req->dma_fx00);
 363         } else if (req && req->ring)
 364                 dma_free_coherent(&ha->pdev->dev,
 365                 (req->length + 1) * sizeof(request_t),
 366                 req->ring, req->dma);
 367
 368         if (req)
 369                 kfree(req->outstanding_cmds);
 370
 371         kfree(req);
 372         req = NULL;
 373 }
 374
 375 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 376 {
 377         if (IS_QLAFX00(ha)) {
 378                 if (rsp && rsp->ring)
 379                         dma_free_coherent(&ha->pdev->dev,
 380                             (rsp->length_fx00 + 1) * sizeof(request_t),
 381                             rsp->ring_fx00, rsp->dma_fx00);
 382         } else if (rsp && rsp->ring) {
 383                 dma_free_coherent(&ha->pdev->dev,
 384                 (rsp->length + 1) * sizeof(response_t),
 385                 rsp->ring, rsp->dma);
 386         }
 387         kfree(rsp);
 388         rsp = NULL;
 389 }
 390
 391 static void qla2x00_free_queues(struct qla_hw_data *ha)
 392 {
 393         struct req_que *req;
 394         struct rsp_que *rsp;
 395         int cnt;
 396
 397         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 398                 req = ha->req_q_map[cnt];
 399                 qla2x00_free_req_que(ha, req);
 400         }
 401         kfree(ha->req_q_map);
 402         ha->req_q_map = NULL;
 403
 404         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 405                 rsp = ha->rsp_q_map[cnt];
 406                 qla2x00_free_rsp_que(ha, rsp);
 407         }
 408         kfree(ha->rsp_q_map);
 409         ha->rsp_q_map = NULL;
 410 }
 411
 412 static int qla25xx_setup_mode(struct scsi_qla_host *vha)
 413 {
 414         uint16_t options = 0;
 415         int ques, req, ret;
 416         struct qla_hw_data *ha = vha->hw;
 417
 418         if (!(ha->fw_attributes & BIT_6)) {
 419                 ql_log(ql_log_warn, vha, 0x00d8,
 420                     "Firmware is not multi-queue capable.\n");
 421                 goto fail;
 422         }
 423         if (ql2xmultique_tag) {
 424                 /* create a request queue for IO */
 425                 options |= BIT_7;
 426                 req = qla25xx_create_req_que(ha, options, 0, 0, -1,
 427                         QLA_DEFAULT_QUE_QOS);
 428                 if (!req) {
 429                         ql_log(ql_log_warn, vha, 0x00e0,
 430                             "Failed to create request queue.\n");
 431                         goto fail;
 432                 }
 433                 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1);
 434                 vha->req = ha->req_q_map[req];
 435                 options |= BIT_1;
 436                 for (ques = 1; ques < ha->max_rsp_queues; ques++) {
 437                         ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
 438                         if (!ret) {
 439                                 ql_log(ql_log_warn, vha, 0x00e8,
 440                                     "Failed to create response queue.\n");
 441                                 goto fail2;
 442                         }
 443                 }
 444                 ha->flags.cpu_affinity_enabled = 1;
 445                 ql_dbg(ql_dbg_multiq, vha, 0xc007,
 446                     "CPU affinity mode enalbed, "
 447                     "no. of response queues:%d no. of request queues:%d.\n",
 448                     ha->max_rsp_queues, ha->max_req_queues);
 449                 ql_dbg(ql_dbg_init, vha, 0x00e9,
 450                     "CPU affinity mode enalbed, "
 451                     "no. of response queues:%d no. of request queues:%d.\n",
 452                     ha->max_rsp_queues, ha->max_req_queues);
 453         }
 454         return 0;
 455 fail2:
 456         qla25xx_delete_queues(vha);
 457         destroy_workqueue(ha->wq);
 458         ha->wq = NULL;
 459         vha->req = ha->req_q_map[0];
 460 fail:
 461         ha->mqenable = 0;
 462         kfree(ha->req_q_map);
 463         kfree(ha->rsp_q_map);
 464         ha->max_req_queues = ha->max_rsp_queues = 1;
 465         return 1;
 466 }
 467
 468 static char *
 469 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
 470 {
 471         struct qla_hw_data *ha = vha->hw;
 472         static char *pci_bus_modes[] = {
 473                 "33", "66", "100", "133",
 474         };
 475         uint16_t pci_bus;
 476
 477         strcpy(str, "PCI");
 478         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 479         if (pci_bus) {
 480                 strcat(str, "-X (");
 481                 strcat(str, pci_bus_modes[pci_bus]);
 482         } else {
 483                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 484                 strcat(str, " (");
 485                 strcat(str, pci_bus_modes[pci_bus]);
 486         }
 487         strcat(str, " MHz)");
 488
 489         return (str);
 490 }
 491
 492 static char *
 493 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
 494 {
 495         static char *pci_bus_modes[] = { "33", "66", "100", "133", };
 496         struct qla_hw_data *ha = vha->hw;
 497         uint32_t pci_bus;
 498
 499         if (pci_is_pcie(ha->pdev)) {
 500                 char lwstr[6];
 501                 uint32_t lstat, lspeed, lwidth;
 502
 503                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 504                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
 505                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
 506
 507                 strcpy(str, "PCIe (");
 508                 switch (lspeed) {
 509                 case 1:
 510                         strcat(str, "2.5GT/s ");
 511                         break;
 512                 case 2:
 513                         strcat(str, "5.0GT/s ");
 514                         break;
 515                 case 3:
 516                         strcat(str, "8.0GT/s ");
 517                         break;
 518                 default:
 519                         strcat(str, "<unknown> ");
 520                         break;
 521                 }
 522                 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
 523                 strcat(str, lwstr);
 524
 525                 return str;
 526         }
 527
 528         strcpy(str, "PCI");
 529         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 530         if (pci_bus == 0 || pci_bus == 8) {
 531                 strcat(str, " (");
 532                 strcat(str, pci_bus_modes[pci_bus >> 3]);
 533         } else {
 534                 strcat(str, "-X ");
 535                 if (pci_bus & BIT_2)
 536                         strcat(str, "Mode 2");
 537                 else
 538                         strcat(str, "Mode 1");
 539                 strcat(str, " (");
 540                 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
 541         }
 542         strcat(str, " MHz)");
 543
 544         return str;
 545 }
 546
 547 static char *
 548 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
 549 {
 550         char un_str[10];
 551         struct qla_hw_data *ha = vha->hw;
 552
 553         sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
 554             ha->fw_minor_version,
 555             ha->fw_subminor_version);
 556
 557         if (ha->fw_attributes & BIT_9) {
 558                 strcat(str, "FLX");
 559                 return (str);
 560         }
 561
 562         switch (ha->fw_attributes & 0xFF) {
 563         case 0x7:
 564                 strcat(str, "EF");
 565                 break;
 566         case 0x17:
 567                 strcat(str, "TP");
 568                 break;
 569         case 0x37:
 570                 strcat(str, "IP");
 571                 break;
 572         case 0x77:
 573                 strcat(str, "VI");
 574                 break;
 575         default:
 576                 sprintf(un_str, "(%x)", ha->fw_attributes);
 577                 strcat(str, un_str);
 578                 break;
 579         }
 580         if (ha->fw_attributes & 0x100)
 581                 strcat(str, "X");
 582
 583         return (str);
 584 }
 585
 586 static char *
 587 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
 588 {
 589         struct qla_hw_data *ha = vha->hw;
 590
 591         sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
 592             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 593         return str;
 594 }
 595
 596 void
 597 qla2x00_sp_free_dma(void *vha, void *ptr)
 598 {
 599         srb_t *sp = (srb_t *)ptr;
 600         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 601         struct qla_hw_data *ha = sp->fcport->vha->hw;
 602         void *ctx = GET_CMD_CTX_SP(sp);
 603
 604         if (sp->flags & SRB_DMA_VALID) {
 605                 scsi_dma_unmap(cmd);
 606                 sp->flags &= ~SRB_DMA_VALID;
 607         }
 608
 609         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 610                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 611                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 612                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 613         }
 614
 615         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 616                 /* List assured to be having elements */
 617                 qla2x00_clean_dsd_pool(ha, sp);
 618                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 619         }
 620
 621         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 622                 dma_pool_free(ha->dl_dma_pool, ctx,
 623                     ((struct crc_context *)ctx)->crc_ctx_dma);
 624                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 625         }
 626
 627         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 628                 struct ct6_dsd *ctx1 = (struct ct6_dsd *)ctx;
 629
 630                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 631                         ctx1->fcp_cmnd_dma);
 632                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 633                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 634                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 635                 mempool_free(ctx1, ha->ctx_mempool);
 636                 ctx1 = NULL;
 637         }
 638
 639         CMD_SP(cmd) = NULL;
 640         qla2x00_rel_sp(sp->fcport->vha, sp);
 641 }
 642
 643 static void
 644 qla2x00_sp_compl(void *data, void *ptr, int res)
 645 {
 646         struct qla_hw_data *ha = (struct qla_hw_data *)data;
 647         srb_t *sp = (srb_t *)ptr;
 648         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 649
 650         cmd->result = res;
 651
 652         if (atomic_read(&sp->ref_count) == 0) {
 653                 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3015,
 654                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 655                     sp, GET_CMD_SP(sp));
 656                 if (ql2xextended_error_logging & ql_dbg_io)
 657                         BUG();
 658                 return;
 659         }
 660         if (!atomic_dec_and_test(&sp->ref_count))
 661                 return;
 662
 663         qla2x00_sp_free_dma(ha, sp);
 664         cmd->scsi_done(cmd);
 665 }
 666
 667 /* If we are SP1 here, we need to still take and release the host_lock as SP1
 668  * does not have the changes necessary to avoid taking host->host_lock.
 669  */
 670 static int
 671 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 672 {
 673         scsi_qla_host_t *vha = shost_priv(host);
 674         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 675         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 676         struct qla_hw_data *ha = vha->hw;
 677         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 678         srb_t *sp;
 679         int rval;
 680
 681         if (ha->flags.eeh_busy) {
 682                 if (ha->flags.pci_channel_io_perm_failure) {
 683                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 684                             "PCI Channel IO permanent failure, exiting "
 685                             "cmd=%p.\n", cmd);
 686                         cmd->result = DID_NO_CONNECT << 16;
 687                 } else {
 688                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 689                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 690                         cmd->result = DID_REQUEUE << 16;
 691                 }
 692                 goto qc24_fail_command;
 693         }
 694
 695         rval = fc_remote_port_chkready(rport);
 696         if (rval) {
 697                 cmd->result = rval;
 698                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 699                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 700                     cmd, rval);
 701                 goto qc24_fail_command;
 702         }
 703
 704         if (!vha->flags.difdix_supported &&
 705                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 706                         ql_dbg(ql_dbg_io, vha, 0x3004,
 707                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 708                             cmd);
 709                         cmd->result = DID_NO_CONNECT << 16;
 710                         goto qc24_fail_command;
 711         }
 712
 713         if (!fcport) {
 714                 cmd->result = DID_NO_CONNECT << 16;
 715                 goto qc24_fail_command;
 716         }
 717
 718         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 719                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 720                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 721                         ql_dbg(ql_dbg_io, vha, 0x3005,
 722                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 723                             atomic_read(&fcport->state),
 724                             atomic_read(&base_vha->loop_state));
 725                         cmd->result = DID_NO_CONNECT << 16;
 726                         goto qc24_fail_command;
 727                 }
 728                 goto qc24_target_busy;
 729         }
 730
 731         sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
 732         if (!sp)
 733                 goto qc24_host_busy;
 734
 735         sp->u.scmd.cmd = cmd;
 736         sp->type = SRB_SCSI_CMD;
 737         atomic_set(&sp->ref_count, 1);
 738         CMD_SP(cmd) = (void *)sp;
 739         sp->free = qla2x00_sp_free_dma;
 740         sp->done = qla2x00_sp_compl;
 741
 742         rval = ha->isp_ops->start_scsi(sp);
 743         if (rval != QLA_SUCCESS) {
 744                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 745                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 746                 goto qc24_host_busy_free_sp;
 747         }
 748
 749         return 0;
 750
 751 qc24_host_busy_free_sp:
 752         qla2x00_sp_free_dma(ha, sp);
 753
 754 qc24_host_busy:
 755         return SCSI_MLQUEUE_HOST_BUSY;
 756
 757 qc24_target_busy:
 758         return SCSI_MLQUEUE_TARGET_BUSY;
 759
 760 qc24_fail_command:
 761         cmd->scsi_done(cmd);
 762
 763         return 0;
 764 }
 765
 766 /*
 767  * qla2x00_eh_wait_on_command
 768  *    Waits for the command to be returned by the Firmware for some
 769  *    max time.
 770  *
 771  * Input:
 772  *    cmd = Scsi Command to wait on.
 773  *
 774  * Return:
 775  *    Not Found : 0
 776  *    Found : 1
 777  */
 778 static int
 779 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
 780 {
 781 #define ABORT_POLLING_PERIOD    1000
 782 #define ABORT_WAIT_ITER         ((10 * 1000) / (ABORT_POLLING_PERIOD))
 783         unsigned long wait_iter = ABORT_WAIT_ITER;
 784         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 785         struct qla_hw_data *ha = vha->hw;
 786         int ret = QLA_SUCCESS;
 787
 788         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
 789                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
 790                     "Return:eh_wait.\n");
 791                 return ret;
 792         }
 793
 794         while (CMD_SP(cmd) && wait_iter--) {
 795                 msleep(ABORT_POLLING_PERIOD);
 796         }
 797         if (CMD_SP(cmd))
 798                 ret = QLA_FUNCTION_FAILED;
 799
 800         return ret;
 801 }
 802
 803 /*
 804  * qla2x00_wait_for_hba_online
 805  *    Wait till the HBA is online after going through
 806  *    <= MAX_RETRIES_OF_ISP_ABORT  or
 807  *    finally HBA is disabled ie marked offline
 808  *
 809  * Input:
 810  *     ha - pointer to host adapter structure
 811  *
 812  * Note:
 813  *    Does context switching-Release SPIN_LOCK
 814  *    (if any) before calling this routine.
 815  *
 816  * Return:
 817  *    Success (Adapter is online) : 0
 818  *    Failed  (Adapter is offline/disabled) : 1
 819  */
 820 int
 821 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
 822 {
 823         int             return_status;
 824         unsigned long   wait_online;
 825         struct qla_hw_data *ha = vha->hw;
 826         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 827
 828         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 829         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 830             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 831             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 832             ha->dpc_active) && time_before(jiffies, wait_online)) {
 833
 834                 msleep(1000);
 835         }
 836         if (base_vha->flags.online)
 837                 return_status = QLA_SUCCESS;
 838         else
 839                 return_status = QLA_FUNCTION_FAILED;
 840
 841         return (return_status);
 842 }
 843
 844 /*
 845  * qla2x00_wait_for_reset_ready
 846  *    Wait till the HBA is online after going through
 847  *    <= MAX_RETRIES_OF_ISP_ABORT  or
 848  *    finally HBA is disabled ie marked offline or flash
 849  *    operations are in progress.
 850  *
 851  * Input:
 852  *     ha - pointer to host adapter structure
 853  *
 854  * Note:
 855  *    Does context switching-Release SPIN_LOCK
 856  *    (if any) before calling this routine.
 857  *
 858  * Return:
 859  *    Success (Adapter is online/no flash ops) : 0
 860  *    Failed  (Adapter is offline/disabled/flash ops in progress) : 1
 861  */
 862 static int
 863 qla2x00_wait_for_reset_ready(scsi_qla_host_t *vha)
 864 {
 865         int             return_status;
 866         unsigned long   wait_online;
 867         struct qla_hw_data *ha = vha->hw;
 868         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 869
 870         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 871         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 872             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 873             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 874             ha->optrom_state != QLA_SWAITING ||
 875             ha->dpc_active) && time_before(jiffies, wait_online))
 876                 msleep(1000);
 877
 878         if (base_vha->flags.online &&  ha->optrom_state == QLA_SWAITING)
 879                 return_status = QLA_SUCCESS;
 880         else
 881                 return_status = QLA_FUNCTION_FAILED;
 882
 883         ql_dbg(ql_dbg_taskm, vha, 0x8019,
 884             "%s return status=%d.\n", __func__, return_status);
 885
 886         return return_status;
 887 }
 888
 889 int
 890 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
 891 {
 892         int             return_status;
 893         unsigned long   wait_reset;
 894         struct qla_hw_data *ha = vha->hw;
 895         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 896
 897         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 898         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 899             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 900             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 901             ha->dpc_active) && time_before(jiffies, wait_reset)) {
 902
 903                 msleep(1000);
 904
 905                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
 906                     ha->flags.chip_reset_done)
 907                         break;
 908         }
 909         if (ha->flags.chip_reset_done)
 910                 return_status = QLA_SUCCESS;
 911         else
 912                 return_status = QLA_FUNCTION_FAILED;
 913
 914         return return_status;
 915 }
 916
 917 static void
 918 sp_get(struct srb *sp)
 919 {
 920         atomic_inc(&sp->ref_count);
 921 }
 922
 923 /**************************************************************************
 924 * qla2xxx_eh_abort
 925 *
 926 * Description:
 927 *    The abort function will abort the specified command.
 928 *
 929 * Input:
 930 *    cmd = Linux SCSI command packet to be aborted.
 931 *
 932 * Returns:
 933 *    Either SUCCESS or FAILED.
 934 *
 935 * Note:
 936 *    Only return FAILED if command not returned by firmware.
 937 **************************************************************************/
 938 static int
 939 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
 940 {
 941         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 942         srb_t *sp;
 943         int ret;
 944         unsigned int id, lun;
 945         unsigned long flags;
 946         int wait = 0;
 947         struct qla_hw_data *ha = vha->hw;
 948
 949         if (!CMD_SP(cmd))
 950                 return SUCCESS;
 951
 952         ret = fc_block_scsi_eh(cmd);
 953         if (ret != 0)
 954                 return ret;
 955         ret = SUCCESS;
 956
 957         id = cmd->device->id;
 958         lun = cmd->device->lun;
 959
 960         spin_lock_irqsave(&ha->hardware_lock, flags);
 961         sp = (srb_t *) CMD_SP(cmd);
 962         if (!sp) {
 963                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 964                 return SUCCESS;
 965         }
 966
 967         ql_dbg(ql_dbg_taskm, vha, 0x8002,
 968             "Aborting from RISC nexus=%ld:%d:%d sp=%p cmd=%p\n",
 969             vha->host_no, id, lun, sp, cmd);
 970
 971         /* Get a reference to the sp and drop the lock.*/
 972         sp_get(sp);
 973
 974         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 975         if (ha->isp_ops->abort_command(sp)) {
 976                 ret = FAILED;
 977                 ql_dbg(ql_dbg_taskm, vha, 0x8003,
 978                     "Abort command mbx failed cmd=%p.\n", cmd);
 979         } else {
 980                 ql_dbg(ql_dbg_taskm, vha, 0x8004,
 981                     "Abort command mbx success cmd=%p.\n", cmd);
 982                 wait = 1;
 983         }
 984
 985         spin_lock_irqsave(&ha->hardware_lock, flags);
 986         sp->done(ha, sp, 0);
 987         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 988
 989         /* Did the command return during mailbox execution? */
 990         if (ret == FAILED && !CMD_SP(cmd))
 991                 ret = SUCCESS;
 992
 993         /* Wait for the command to be returned. */
 994         if (wait) {
 995                 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
 996                         ql_log(ql_log_warn, vha, 0x8006,
 997                             "Abort handler timed out cmd=%p.\n", cmd);
 998                         ret = FAILED;
 999                 }
1000         }
1001
1002         ql_log(ql_log_info, vha, 0x801c,
1003             "Abort command issued nexus=%ld:%d:%d --  %d %x.\n",
1004             vha->host_no, id, lun, wait, ret);
1005
1006         return ret;
1007 }
1008
1009 int
1010 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1011         unsigned int l, enum nexus_wait_type type)
1012 {
1013         int cnt, match, status;
1014         unsigned long flags;
1015         struct qla_hw_data *ha = vha->hw;
1016         struct req_que *req;
1017         srb_t *sp;
1018         struct scsi_cmnd *cmd;
1019
1020         status = QLA_SUCCESS;
1021
1022         spin_lock_irqsave(&ha->hardware_lock, flags);
1023         req = vha->req;
1024         for (cnt = 1; status == QLA_SUCCESS &&
1025                 cnt < req->num_outstanding_cmds; cnt++) {
1026                 sp = req->outstanding_cmds[cnt];
1027                 if (!sp)
1028                         continue;
1029                 if (sp->type != SRB_SCSI_CMD)
1030                         continue;
1031                 if (vha->vp_idx != sp->fcport->vha->vp_idx)
1032                         continue;
1033                 match = 0;
1034                 cmd = GET_CMD_SP(sp);
1035                 switch (type) {
1036                 case WAIT_HOST:
1037                         match = 1;
1038                         break;
1039                 case WAIT_TARGET:
1040                         match = cmd->device->id == t;
1041                         break;
1042                 case WAIT_LUN:
1043                         match = (cmd->device->id == t &&
1044                                 cmd->device->lun == l);
1045                         break;
1046                 }
1047                 if (!match)
1048                         continue;
1049
1050                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1051                 status = qla2x00_eh_wait_on_command(cmd);
1052                 spin_lock_irqsave(&ha->hardware_lock, flags);
1053         }
1054         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1055
1056         return status;
1057 }
1058
1059 static char *reset_errors[] = {
1060         "HBA not online",
1061         "HBA not ready",
1062         "Task management failed",
1063         "Waiting for command completions",
1064 };
1065
1066 static int
1067 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1068     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int))
1069 {
1070         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1071         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1072         int err;
1073
1074         if (!fcport) {
1075                 return FAILED;
1076         }
1077
1078         err = fc_block_scsi_eh(cmd);
1079         if (err != 0)
1080                 return err;
1081
1082         ql_log(ql_log_info, vha, 0x8009,
1083             "%s RESET ISSUED nexus=%ld:%d:%d cmd=%p.\n", name, vha->host_no,
1084             cmd->device->id, cmd->device->lun, cmd);
1085
1086         err = 0;
1087         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1088                 ql_log(ql_log_warn, vha, 0x800a,
1089                     "Wait for hba online failed for cmd=%p.\n", cmd);
1090                 goto eh_reset_failed;
1091         }
1092         err = 2;
1093         if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1094                 != QLA_SUCCESS) {
1095                 ql_log(ql_log_warn, vha, 0x800c,
1096                     "do_reset failed for cmd=%p.\n", cmd);
1097                 goto eh_reset_failed;
1098         }
1099         err = 3;
1100         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1101             cmd->device->lun, type) != QLA_SUCCESS) {
1102                 ql_log(ql_log_warn, vha, 0x800d,
1103                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1104                 goto eh_reset_failed;
1105         }
1106
1107         ql_log(ql_log_info, vha, 0x800e,
1108             "%s RESET SUCCEEDED nexus:%ld:%d:%d cmd=%p.\n", name,
1109             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1110
1111         return SUCCESS;
1112
1113 eh_reset_failed:
1114         ql_log(ql_log_info, vha, 0x800f,
1115             "%s RESET FAILED: %s nexus=%ld:%d:%d cmd=%p.\n", name,
1116             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1117             cmd);
1118         return FAILED;
1119 }
1120
1121 static int
1122 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1123 {
1124         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1125         struct qla_hw_data *ha = vha->hw;
1126
1127         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1128             ha->isp_ops->lun_reset);
1129 }
1130
1131 static int
1132 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1133 {
1134         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1135         struct qla_hw_data *ha = vha->hw;
1136
1137         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1138             ha->isp_ops->target_reset);
1139 }
1140
1141 /**************************************************************************
1142 * qla2xxx_eh_bus_reset
1143 *
1144 * Description:
1145 *    The bus reset function will reset the bus and abort any executing
1146 *    commands.
1147 *
1148 * Input:
1149 *    cmd = Linux SCSI command packet of the command that cause the
1150 *          bus reset.
1151 *
1152 * Returns:
1153 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1154 *
1155 **************************************************************************/
1156 static int
1157 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1158 {
1159         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1160         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1161         int ret = FAILED;
1162         unsigned int id, lun;
1163
1164         id = cmd->device->id;
1165         lun = cmd->device->lun;
1166
1167         if (!fcport) {
1168                 return ret;
1169         }
1170
1171         ret = fc_block_scsi_eh(cmd);
1172         if (ret != 0)
1173                 return ret;
1174         ret = FAILED;
1175
1176         ql_log(ql_log_info, vha, 0x8012,
1177             "BUS RESET ISSUED nexus=%ld:%d:%d.\n", vha->host_no, id, lun);
1178
1179         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1180                 ql_log(ql_log_fatal, vha, 0x8013,
1181                     "Wait for hba online failed board disabled.\n");
1182                 goto eh_bus_reset_done;
1183         }
1184
1185         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1186                 ret = SUCCESS;
1187
1188         if (ret == FAILED)
1189                 goto eh_bus_reset_done;
1190
1191         /* Flush outstanding commands. */
1192         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1193             QLA_SUCCESS) {
1194                 ql_log(ql_log_warn, vha, 0x8014,
1195                     "Wait for pending commands failed.\n");
1196                 ret = FAILED;
1197         }
1198
1199 eh_bus_reset_done:
1200         ql_log(ql_log_warn, vha, 0x802b,
1201             "BUS RESET %s nexus=%ld:%d:%d.\n",
1202             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1203
1204         return ret;
1205 }
1206
1207 /**************************************************************************
1208 * qla2xxx_eh_host_reset
1209 *
1210 * Description:
1211 *    The reset function will reset the Adapter.
1212 *
1213 * Input:
1214 *      cmd = Linux SCSI command packet of the command that cause the
1215 *            adapter reset.
1216 *
1217 * Returns:
1218 *      Either SUCCESS or FAILED.
1219 *
1220 * Note:
1221 **************************************************************************/
1222 static int
1223 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1224 {
1225         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1226         struct qla_hw_data *ha = vha->hw;
1227         int ret = FAILED;
1228         unsigned int id, lun;
1229         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1230
1231         id = cmd->device->id;
1232         lun = cmd->device->lun;
1233
1234         ql_log(ql_log_info, vha, 0x8018,
1235             "ADAPTER RESET ISSUED nexus=%ld:%d:%d.\n", vha->host_no, id, lun);
1236
1237         if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS)
1238                 goto eh_host_reset_lock;
1239
1240         if (vha != base_vha) {
1241                 if (qla2x00_vp_abort_isp(vha))
1242                         goto eh_host_reset_lock;
1243         } else {
1244                 if (IS_P3P_TYPE(vha->hw)) {
1245                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1246                                 /* Ctx reset success */
1247                                 ret = SUCCESS;
1248                                 goto eh_host_reset_lock;
1249                         }
1250                         /* fall thru if ctx reset failed */
1251                 }
1252                 if (ha->wq)
1253                         flush_workqueue(ha->wq);
1254
1255                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1256                 if (ha->isp_ops->abort_isp(base_vha)) {
1257                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1258                         /* failed. schedule dpc to try */
1259                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1260
1261                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1262                                 ql_log(ql_log_warn, vha, 0x802a,
1263                                     "wait for hba online failed.\n");
1264                                 goto eh_host_reset_lock;
1265                         }
1266                 }
1267                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1268         }
1269
1270         /* Waiting for command to be returned to OS.*/
1271         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1272                 QLA_SUCCESS)
1273                 ret = SUCCESS;
1274
1275 eh_host_reset_lock:
1276         ql_log(ql_log_info, vha, 0x8017,
1277             "ADAPTER RESET %s nexus=%ld:%d:%d.\n",
1278             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1279
1280         return ret;
1281 }
1282
1283 /*
1284 * qla2x00_loop_reset
1285 *      Issue loop reset.
1286 *
1287 * Input:
1288 *      ha = adapter block pointer.
1289 *
1290 * Returns:
1291 *      0 = success
1292 */
1293 int
1294 qla2x00_loop_reset(scsi_qla_host_t *vha)
1295 {
1296         int ret;
1297         struct fc_port *fcport;
1298         struct qla_hw_data *ha = vha->hw;
1299
1300         if (IS_QLAFX00(ha)) {
1301                 return qlafx00_loop_reset(vha);
1302         }
1303
1304         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1305                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1306                         if (fcport->port_type != FCT_TARGET)
1307                                 continue;
1308
1309                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1310                         if (ret != QLA_SUCCESS) {
1311                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1312                                     "Bus Reset failed: Reset=%d "
1313                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1314                         }
1315                 }
1316         }
1317
1318
1319         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1320                 atomic_set(&vha->loop_state, LOOP_DOWN);
1321                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1322                 qla2x00_mark_all_devices_lost(vha, 0);
1323                 ret = qla2x00_full_login_lip(vha);
1324                 if (ret != QLA_SUCCESS) {
1325                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1326                             "full_login_lip=%d.\n", ret);
1327                 }
1328         }
1329
1330         if (ha->flags.enable_lip_reset) {
1331                 ret = qla2x00_lip_reset(vha);
1332                 if (ret != QLA_SUCCESS)
1333                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1334                             "lip_reset failed (%d).\n", ret);
1335         }
1336
1337         /* Issue marker command only when we are going to start the I/O */
1338         vha->marker_needed = 1;
1339
1340         return QLA_SUCCESS;
1341 }
1342
1343 void
1344 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1345 {
1346         int que, cnt;
1347         unsigned long flags;
1348         srb_t *sp;
1349         struct qla_hw_data *ha = vha->hw;
1350         struct req_que *req;
1351
1352         spin_lock_irqsave(&ha->hardware_lock, flags);
1353         for (que = 0; que < ha->max_req_queues; que++) {
1354                 req = ha->req_q_map[que];
1355                 if (!req)
1356                         continue;
1357                 if (!req->outstanding_cmds)
1358                         continue;
1359                 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1360                         sp = req->outstanding_cmds[cnt];
1361                         if (sp) {
1362                                 req->outstanding_cmds[cnt] = NULL;
1363                                 sp->done(vha, sp, res);
1364                         }
1365                 }
1366         }
1367         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1368 }
1369
1370 static int
1371 qla2xxx_slave_alloc(struct scsi_device *sdev)
1372 {
1373         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1374
1375         if (!rport || fc_remote_port_chkready(rport))
1376                 return -ENXIO;
1377
1378         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1379
1380         return 0;
1381 }
1382
1383 static int
1384 qla2xxx_slave_configure(struct scsi_device *sdev)
1385 {
1386         scsi_qla_host_t *vha = shost_priv(sdev->host);
1387         struct req_que *req = vha->req;
1388
1389         if (IS_T10_PI_CAPABLE(vha->hw))
1390                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1391
1392         if (sdev->tagged_supported)
1393                 scsi_activate_tcq(sdev, req->max_q_depth);
1394         else
1395                 scsi_deactivate_tcq(sdev, req->max_q_depth);
1396         return 0;
1397 }
1398
1399 static void
1400 qla2xxx_slave_destroy(struct scsi_device *sdev)
1401 {
1402         sdev->hostdata = NULL;
1403 }
1404
1405 static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
1406 {
1407         fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
1408
1409         if (!scsi_track_queue_full(sdev, qdepth))
1410                 return;
1411
1412         ql_dbg(ql_dbg_io, fcport->vha, 0x3029,
1413             "Queue depth adjusted-down to %d for nexus=%ld:%d:%d.\n",
1414             sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun);
1415 }
1416
1417 static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
1418 {
1419         fc_port_t *fcport = sdev->hostdata;
1420         struct scsi_qla_host *vha = fcport->vha;
1421         struct req_que *req = NULL;
1422
1423         req = vha->req;
1424         if (!req)
1425                 return;
1426
1427         if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
1428                 return;
1429
1430         if (sdev->ordered_tags)
1431                 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
1432         else
1433                 scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
1434
1435         ql_dbg(ql_dbg_io, vha, 0x302a,
1436             "Queue depth adjusted-up to %d for nexus=%ld:%d:%d.\n",
1437             sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun);
1438 }
1439
1440 static int
1441 qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
1442 {
1443         switch (reason) {
1444         case SCSI_QDEPTH_DEFAULT:
1445                 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
1446                 break;
1447         case SCSI_QDEPTH_QFULL:
1448                 qla2x00_handle_queue_full(sdev, qdepth);
1449                 break;
1450         case SCSI_QDEPTH_RAMP_UP:
1451                 qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
1452                 break;
1453         default:
1454                 return -EOPNOTSUPP;
1455         }
1456
1457         return sdev->queue_depth;
1458 }
1459
1460 static int
1461 qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
1462 {
1463         if (sdev->tagged_supported) {
1464                 scsi_set_tag_type(sdev, tag_type);
1465                 if (tag_type)
1466                         scsi_activate_tcq(sdev, sdev->queue_depth);
1467                 else
1468                         scsi_deactivate_tcq(sdev, sdev->queue_depth);
1469         } else
1470                 tag_type = 0;
1471
1472         return tag_type;
1473 }
1474
1475 /**
1476  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1477  * @ha: HA context
1478  *
1479  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1480  * supported addressing method.
1481  */
1482 static void
1483 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1484 {
1485         /* Assume a 32bit DMA mask. */
1486         ha->flags.enable_64bit_addressing = 0;
1487
1488         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1489                 /* Any upper-dword bits set? */
1490                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1491                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1492                         /* Ok, a 64bit DMA mask is applicable. */
1493                         ha->flags.enable_64bit_addressing = 1;
1494                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1495                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1496                         return;
1497                 }
1498         }
1499
1500         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1501         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1502 }
1503
1504 static void
1505 qla2x00_enable_intrs(struct qla_hw_data *ha)
1506 {
1507         unsigned long flags = 0;
1508         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1509
1510         spin_lock_irqsave(&ha->hardware_lock, flags);
1511         ha->interrupts_on = 1;
1512         /* enable risc and host interrupts */
1513         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1514         RD_REG_WORD(&reg->ictrl);
1515         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1516
1517 }
1518
1519 static void
1520 qla2x00_disable_intrs(struct qla_hw_data *ha)
1521 {
1522         unsigned long flags = 0;
1523         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1524
1525         spin_lock_irqsave(&ha->hardware_lock, flags);
1526         ha->interrupts_on = 0;
1527         /* disable risc and host interrupts */
1528         WRT_REG_WORD(&reg->ictrl, 0);
1529         RD_REG_WORD(&reg->ictrl);
1530         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1531 }
1532
1533 static void
1534 qla24xx_enable_intrs(struct qla_hw_data *ha)
1535 {
1536         unsigned long flags = 0;
1537         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1538
1539         spin_lock_irqsave(&ha->hardware_lock, flags);
1540         ha->interrupts_on = 1;
1541         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1542         RD_REG_DWORD(&reg->ictrl);
1543         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1544 }
1545
1546 static void
1547 qla24xx_disable_intrs(struct qla_hw_data *ha)
1548 {
1549         unsigned long flags = 0;
1550         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1551
1552         if (IS_NOPOLLING_TYPE(ha))
1553                 return;
1554         spin_lock_irqsave(&ha->hardware_lock, flags);
1555         ha->interrupts_on = 0;
1556         WRT_REG_DWORD(&reg->ictrl, 0);
1557         RD_REG_DWORD(&reg->ictrl);
1558         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1559 }
1560
1561 static int
1562 qla2x00_iospace_config(struct qla_hw_data *ha)
1563 {
1564         resource_size_t pio;
1565         uint16_t msix;
1566         int cpus;
1567
1568         if (pci_request_selected_regions(ha->pdev, ha->bars,
1569             QLA2XXX_DRIVER_NAME)) {
1570                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1571                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1572                     pci_name(ha->pdev));
1573                 goto iospace_error_exit;
1574         }
1575         if (!(ha->bars & 1))
1576                 goto skip_pio;
1577
1578         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1579         pio = pci_resource_start(ha->pdev, 0);
1580         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1581                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1582                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1583                             "Invalid pci I/O region size (%s).\n",
1584                             pci_name(ha->pdev));
1585                         pio = 0;
1586                 }
1587         } else {
1588                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1589                     "Region #0 no a PIO resource (%s).\n",
1590                     pci_name(ha->pdev));
1591                 pio = 0;
1592         }
1593         ha->pio_address = pio;
1594         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1595             "PIO address=%llu.\n",
1596             (unsigned long long)ha->pio_address);
1597
1598 skip_pio:
1599         /* Use MMIO operations for all accesses. */
1600         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1601                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1602                     "Region #1 not an MMIO resource (%s), aborting.\n",
1603                     pci_name(ha->pdev));
1604                 goto iospace_error_exit;
1605         }
1606         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1607                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1608                     "Invalid PCI mem region size (%s), aborting.\n",
1609                     pci_name(ha->pdev));
1610                 goto iospace_error_exit;
1611         }
1612
1613         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1614         if (!ha->iobase) {
1615                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1616                     "Cannot remap MMIO (%s), aborting.\n",
1617                     pci_name(ha->pdev));
1618                 goto iospace_error_exit;
1619         }
1620
1621         /* Determine queue resources */
1622         ha->max_req_queues = ha->max_rsp_queues = 1;
1623         if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
1624                 (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
1625                 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1626                 goto mqiobase_exit;
1627
1628         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1629                         pci_resource_len(ha->pdev, 3));
1630         if (ha->mqiobase) {
1631                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1632                     "MQIO Base=%p.\n", ha->mqiobase);
1633                 /* Read MSIX vector size of the board */
1634                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1635                 ha->msix_count = msix;
1636                 /* Max queues are bounded by available msix vectors */
1637                 /* queue 0 uses two msix vectors */
1638                 if (ql2xmultique_tag) {
1639                         cpus = num_online_cpus();
1640                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1641                                 (cpus + 1) : (ha->msix_count - 1);
1642                         ha->max_req_queues = 2;
1643                 } else if (ql2xmaxqueues > 1) {
1644                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1645                             QLA_MQ_SIZE : ql2xmaxqueues;
1646                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc008,
1647                             "QoS mode set, max no of request queues:%d.\n",
1648                             ha->max_req_queues);
1649                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0019,
1650                             "QoS mode set, max no of request queues:%d.\n",
1651                             ha->max_req_queues);
1652                 }
1653                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1654                     "MSI-X vector count: %d.\n", msix);
1655         } else
1656                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
1657                     "BAR 3 not enabled.\n");
1658
1659 mqiobase_exit:
1660         ha->msix_count = ha->max_rsp_queues + 1;
1661         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
1662             "MSIX Count:%d.\n", ha->msix_count);
1663         return (0);
1664
1665 iospace_error_exit:
1666         return (-ENOMEM);
1667 }
1668
1669
1670 static int
1671 qla83xx_iospace_config(struct qla_hw_data *ha)
1672 {
1673         uint16_t msix;
1674         int cpus;
1675
1676         if (pci_request_selected_regions(ha->pdev, ha->bars,
1677             QLA2XXX_DRIVER_NAME)) {
1678                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
1679                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1680                     pci_name(ha->pdev));
1681
1682                 goto iospace_error_exit;
1683         }
1684
1685         /* Use MMIO operations for all accesses. */
1686         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
1687                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
1688                     "Invalid pci I/O region size (%s).\n",
1689                     pci_name(ha->pdev));
1690                 goto iospace_error_exit;
1691         }
1692         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1693                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
1694                     "Invalid PCI mem region size (%s), aborting\n",
1695                         pci_name(ha->pdev));
1696                 goto iospace_error_exit;
1697         }
1698
1699         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
1700         if (!ha->iobase) {
1701                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
1702                     "Cannot remap MMIO (%s), aborting.\n",
1703                     pci_name(ha->pdev));
1704                 goto iospace_error_exit;
1705         }
1706
1707         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
1708         /* 83XX 26XX always use MQ type access for queues
1709          * - mbar 2, a.k.a region 4 */
1710         ha->max_req_queues = ha->max_rsp_queues = 1;
1711         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
1712                         pci_resource_len(ha->pdev, 4));
1713
1714         if (!ha->mqiobase) {
1715                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
1716                     "BAR2/region4 not enabled\n");
1717                 goto mqiobase_exit;
1718         }
1719
1720         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
1721                         pci_resource_len(ha->pdev, 2));
1722         if (ha->msixbase) {
1723                 /* Read MSIX vector size of the board */
1724                 pci_read_config_word(ha->pdev,
1725                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
1726                 ha->msix_count = msix;
1727                 /* Max queues are bounded by available msix vectors */
1728                 /* queue 0 uses two msix vectors */
1729                 if (ql2xmultique_tag) {
1730                         cpus = num_online_cpus();
1731                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1732                                 (cpus + 1) : (ha->msix_count - 1);
1733                         ha->max_req_queues = 2;
1734                 } else if (ql2xmaxqueues > 1) {
1735                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1736                                                 QLA_MQ_SIZE : ql2xmaxqueues;
1737                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc00c,
1738                             "QoS mode set, max no of request queues:%d.\n",
1739                             ha->max_req_queues);
1740                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
1741                             "QoS mode set, max no of request queues:%d.\n",
1742                             ha->max_req_queues);
1743                 }
1744                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
1745                     "MSI-X vector count: %d.\n", msix);
1746         } else
1747                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
1748                     "BAR 1 not enabled.\n");
1749
1750 mqiobase_exit:
1751         ha->msix_count = ha->max_rsp_queues + 1;
1752
1753         qlt_83xx_iospace_config(ha);
1754
1755         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
1756             "MSIX Count:%d.\n", ha->msix_count);
1757         return 0;
1758
1759 iospace_error_exit:
1760         return -ENOMEM;
1761 }
1762
1763 static struct isp_operations qla2100_isp_ops = {
1764         .pci_config             = qla2100_pci_config,
1765         .reset_chip             = qla2x00_reset_chip,
1766         .chip_diag              = qla2x00_chip_diag,
1767         .config_rings           = qla2x00_config_rings,
1768         .reset_adapter          = qla2x00_reset_adapter,
1769         .nvram_config           = qla2x00_nvram_config,
1770         .update_fw_options      = qla2x00_update_fw_options,
1771         .load_risc              = qla2x00_load_risc,
1772         .pci_info_str           = qla2x00_pci_info_str,
1773         .fw_version_str         = qla2x00_fw_version_str,
1774         .intr_handler           = qla2100_intr_handler,
1775         .enable_intrs           = qla2x00_enable_intrs,
1776         .disable_intrs          = qla2x00_disable_intrs,
1777         .abort_command          = qla2x00_abort_command,
1778         .target_reset           = qla2x00_abort_target,
1779         .lun_reset              = qla2x00_lun_reset,
1780         .fabric_login           = qla2x00_login_fabric,
1781         .fabric_logout          = qla2x00_fabric_logout,
1782         .calc_req_entries       = qla2x00_calc_iocbs_32,
1783         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1784         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1785         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1786         .read_nvram             = qla2x00_read_nvram_data,
1787         .write_nvram            = qla2x00_write_nvram_data,
1788         .fw_dump                = qla2100_fw_dump,
1789         .beacon_on              = NULL,
1790         .beacon_off             = NULL,
1791         .beacon_blink           = NULL,
1792         .read_optrom            = qla2x00_read_optrom_data,
1793         .write_optrom           = qla2x00_write_optrom_data,
1794         .get_flash_version      = qla2x00_get_flash_version,
1795         .start_scsi             = qla2x00_start_scsi,
1796         .abort_isp              = qla2x00_abort_isp,
1797         .iospace_config         = qla2x00_iospace_config,
1798         .initialize_adapter     = qla2x00_initialize_adapter,
1799 };
1800
1801 static struct isp_operations qla2300_isp_ops = {
1802         .pci_config             = qla2300_pci_config,
1803         .reset_chip             = qla2x00_reset_chip,
1804         .chip_diag              = qla2x00_chip_diag,
1805         .config_rings           = qla2x00_config_rings,
1806         .reset_adapter          = qla2x00_reset_adapter,
1807         .nvram_config           = qla2x00_nvram_config,
1808         .update_fw_options      = qla2x00_update_fw_options,
1809         .load_risc              = qla2x00_load_risc,
1810         .pci_info_str           = qla2x00_pci_info_str,
1811         .fw_version_str         = qla2x00_fw_version_str,
1812         .intr_handler           = qla2300_intr_handler,
1813         .enable_intrs           = qla2x00_enable_intrs,
1814         .disable_intrs          = qla2x00_disable_intrs,
1815         .abort_command          = qla2x00_abort_command,
1816         .target_reset           = qla2x00_abort_target,
1817         .lun_reset              = qla2x00_lun_reset,
1818         .fabric_login           = qla2x00_login_fabric,
1819         .fabric_logout          = qla2x00_fabric_logout,
1820         .calc_req_entries       = qla2x00_calc_iocbs_32,
1821         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1822         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1823         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1824         .read_nvram             = qla2x00_read_nvram_data,
1825         .write_nvram            = qla2x00_write_nvram_data,
1826         .fw_dump                = qla2300_fw_dump,
1827         .beacon_on              = qla2x00_beacon_on,
1828         .beacon_off             = qla2x00_beacon_off,
1829         .beacon_blink           = qla2x00_beacon_blink,
1830         .read_optrom            = qla2x00_read_optrom_data,
1831         .write_optrom           = qla2x00_write_optrom_data,
1832         .get_flash_version      = qla2x00_get_flash_version,
1833         .start_scsi             = qla2x00_start_scsi,
1834         .abort_isp              = qla2x00_abort_isp,
1835         .iospace_config         = qla2x00_iospace_config,
1836         .initialize_adapter     = qla2x00_initialize_adapter,
1837 };
1838
1839 static struct isp_operations qla24xx_isp_ops = {
1840         .pci_config             = qla24xx_pci_config,
1841         .reset_chip             = qla24xx_reset_chip,
1842         .chip_diag              = qla24xx_chip_diag,
1843         .config_rings           = qla24xx_config_rings,
1844         .reset_adapter          = qla24xx_reset_adapter,
1845         .nvram_config           = qla24xx_nvram_config,
1846         .update_fw_options      = qla24xx_update_fw_options,
1847         .load_risc              = qla24xx_load_risc,
1848         .pci_info_str           = qla24xx_pci_info_str,
1849         .fw_version_str         = qla24xx_fw_version_str,
1850         .intr_handler           = qla24xx_intr_handler,
1851         .enable_intrs           = qla24xx_enable_intrs,
1852         .disable_intrs          = qla24xx_disable_intrs,
1853         .abort_command          = qla24xx_abort_command,
1854         .target_reset           = qla24xx_abort_target,
1855         .lun_reset              = qla24xx_lun_reset,
1856         .fabric_login           = qla24xx_login_fabric,
1857         .fabric_logout          = qla24xx_fabric_logout,
1858         .calc_req_entries       = NULL,
1859         .build_iocbs            = NULL,
1860         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1861         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1862         .read_nvram             = qla24xx_read_nvram_data,
1863         .write_nvram            = qla24xx_write_nvram_data,
1864         .fw_dump                = qla24xx_fw_dump,
1865         .beacon_on              = qla24xx_beacon_on,
1866         .beacon_off             = qla24xx_beacon_off,
1867         .beacon_blink           = qla24xx_beacon_blink,
1868         .read_optrom            = qla24xx_read_optrom_data,
1869         .write_optrom           = qla24xx_write_optrom_data,
1870         .get_flash_version      = qla24xx_get_flash_version,
1871         .start_scsi             = qla24xx_start_scsi,
1872         .abort_isp              = qla2x00_abort_isp,
1873         .iospace_config         = qla2x00_iospace_config,
1874         .initialize_adapter     = qla2x00_initialize_adapter,
1875 };
1876
1877 static struct isp_operations qla25xx_isp_ops = {
1878         .pci_config             = qla25xx_pci_config,
1879         .reset_chip             = qla24xx_reset_chip,
1880         .chip_diag              = qla24xx_chip_diag,
1881         .config_rings           = qla24xx_config_rings,
1882         .reset_adapter          = qla24xx_reset_adapter,
1883         .nvram_config           = qla24xx_nvram_config,
1884         .update_fw_options      = qla24xx_update_fw_options,
1885         .load_risc              = qla24xx_load_risc,
1886         .pci_info_str           = qla24xx_pci_info_str,
1887         .fw_version_str         = qla24xx_fw_version_str,
1888         .intr_handler           = qla24xx_intr_handler,
1889         .enable_intrs           = qla24xx_enable_intrs,
1890         .disable_intrs          = qla24xx_disable_intrs,
1891         .abort_command          = qla24xx_abort_command,
1892         .target_reset           = qla24xx_abort_target,
1893         .lun_reset              = qla24xx_lun_reset,
1894         .fabric_login           = qla24xx_login_fabric,
1895         .fabric_logout          = qla24xx_fabric_logout,
1896         .calc_req_entries       = NULL,
1897         .build_iocbs            = NULL,
1898         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1899         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1900         .read_nvram             = qla25xx_read_nvram_data,
1901         .write_nvram            = qla25xx_write_nvram_data,
1902         .fw_dump                = qla25xx_fw_dump,
1903         .beacon_on              = qla24xx_beacon_on,
1904         .beacon_off             = qla24xx_beacon_off,
1905         .beacon_blink           = qla24xx_beacon_blink,
1906         .read_optrom            = qla25xx_read_optrom_data,
1907         .write_optrom           = qla24xx_write_optrom_data,
1908         .get_flash_version      = qla24xx_get_flash_version,
1909         .start_scsi             = qla24xx_dif_start_scsi,
1910         .abort_isp              = qla2x00_abort_isp,
1911         .iospace_config         = qla2x00_iospace_config,
1912         .initialize_adapter     = qla2x00_initialize_adapter,
1913 };
1914
1915 static struct isp_operations qla81xx_isp_ops = {
1916         .pci_config             = qla25xx_pci_config,
1917         .reset_chip             = qla24xx_reset_chip,
1918         .chip_diag              = qla24xx_chip_diag,
1919         .config_rings           = qla24xx_config_rings,
1920         .reset_adapter          = qla24xx_reset_adapter,
1921         .nvram_config           = qla81xx_nvram_config,
1922         .update_fw_options      = qla81xx_update_fw_options,
1923         .load_risc              = qla81xx_load_risc,
1924         .pci_info_str           = qla24xx_pci_info_str,
1925         .fw_version_str         = qla24xx_fw_version_str,
1926         .intr_handler           = qla24xx_intr_handler,
1927         .enable_intrs           = qla24xx_enable_intrs,
1928         .disable_intrs          = qla24xx_disable_intrs,
1929         .abort_command          = qla24xx_abort_command,
1930         .target_reset           = qla24xx_abort_target,
1931         .lun_reset              = qla24xx_lun_reset,
1932         .fabric_login           = qla24xx_login_fabric,
1933         .fabric_logout          = qla24xx_fabric_logout,
1934         .calc_req_entries       = NULL,
1935         .build_iocbs            = NULL,
1936         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1937         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1938         .read_nvram             = NULL,
1939         .write_nvram            = NULL,
1940         .fw_dump                = qla81xx_fw_dump,
1941         .beacon_on              = qla24xx_beacon_on,
1942         .beacon_off             = qla24xx_beacon_off,
1943         .beacon_blink           = qla83xx_beacon_blink,
1944         .read_optrom            = qla25xx_read_optrom_data,
1945         .write_optrom           = qla24xx_write_optrom_data,
1946         .get_flash_version      = qla24xx_get_flash_version,
1947         .start_scsi             = qla24xx_dif_start_scsi,
1948         .abort_isp              = qla2x00_abort_isp,
1949         .iospace_config         = qla2x00_iospace_config,
1950         .initialize_adapter     = qla2x00_initialize_adapter,
1951 };
1952
1953 static struct isp_operations qla82xx_isp_ops = {
1954         .pci_config             = qla82xx_pci_config,
1955         .reset_chip             = qla82xx_reset_chip,
1956         .chip_diag              = qla24xx_chip_diag,
1957         .config_rings           = qla82xx_config_rings,
1958         .reset_adapter          = qla24xx_reset_adapter,
1959         .nvram_config           = qla81xx_nvram_config,
1960         .update_fw_options      = qla24xx_update_fw_options,
1961         .load_risc              = qla82xx_load_risc,
1962         .pci_info_str           = qla24xx_pci_info_str,
1963         .fw_version_str         = qla24xx_fw_version_str,
1964         .intr_handler           = qla82xx_intr_handler,
1965         .enable_intrs           = qla82xx_enable_intrs,
1966         .disable_intrs          = qla82xx_disable_intrs,
1967         .abort_command          = qla24xx_abort_command,
1968         .target_reset           = qla24xx_abort_target,
1969         .lun_reset              = qla24xx_lun_reset,
1970         .fabric_login           = qla24xx_login_fabric,
1971         .fabric_logout          = qla24xx_fabric_logout,
1972         .calc_req_entries       = NULL,
1973         .build_iocbs            = NULL,
1974         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1975         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1976         .read_nvram             = qla24xx_read_nvram_data,
1977         .write_nvram            = qla24xx_write_nvram_data,
1978         .fw_dump                = qla24xx_fw_dump,
1979         .beacon_on              = qla82xx_beacon_on,
1980         .beacon_off             = qla82xx_beacon_off,
1981         .beacon_blink           = NULL,
1982         .read_optrom            = qla82xx_read_optrom_data,
1983         .write_optrom           = qla82xx_write_optrom_data,
1984         .get_flash_version      = qla82xx_get_flash_version,
1985         .start_scsi             = qla82xx_start_scsi,
1986         .abort_isp              = qla82xx_abort_isp,
1987         .iospace_config         = qla82xx_iospace_config,
1988         .initialize_adapter     = qla2x00_initialize_adapter,
1989 };
1990
1991 static struct isp_operations qla8044_isp_ops = {
1992         .pci_config             = qla82xx_pci_config,
1993         .reset_chip             = qla82xx_reset_chip,
1994         .chip_diag              = qla24xx_chip_diag,
1995         .config_rings           = qla82xx_config_rings,
1996         .reset_adapter          = qla24xx_reset_adapter,
1997         .nvram_config           = qla81xx_nvram_config,
1998         .update_fw_options      = qla24xx_update_fw_options,
1999         .load_risc              = qla82xx_load_risc,
2000         .pci_info_str           = qla24xx_pci_info_str,
2001         .fw_version_str         = qla24xx_fw_version_str,
2002         .intr_handler           = qla8044_intr_handler,
2003         .enable_intrs           = qla82xx_enable_intrs,
2004         .disable_intrs          = qla82xx_disable_intrs,
2005         .abort_command          = qla24xx_abort_command,
2006         .target_reset           = qla24xx_abort_target,
2007         .lun_reset              = qla24xx_lun_reset,
2008         .fabric_login           = qla24xx_login_fabric,
2009         .fabric_logout          = qla24xx_fabric_logout,
2010         .calc_req_entries       = NULL,
2011         .build_iocbs            = NULL,
2012         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2013         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2014         .read_nvram             = NULL,
2015         .write_nvram            = NULL,
2016         .fw_dump                = qla24xx_fw_dump,
2017         .beacon_on              = qla82xx_beacon_on,
2018         .beacon_off             = qla82xx_beacon_off,
2019         .beacon_blink           = NULL,
2020         .read_optrom            = qla82xx_read_optrom_data,
2021         .write_optrom           = qla8044_write_optrom_data,
2022         .get_flash_version      = qla82xx_get_flash_version,
2023         .start_scsi             = qla82xx_start_scsi,
2024         .abort_isp              = qla8044_abort_isp,
2025         .iospace_config         = qla82xx_iospace_config,
2026         .initialize_adapter     = qla2x00_initialize_adapter,
2027 };
2028
2029 static struct isp_operations qla83xx_isp_ops = {
2030         .pci_config             = qla25xx_pci_config,
2031         .reset_chip             = qla24xx_reset_chip,
2032         .chip_diag              = qla24xx_chip_diag,
2033         .config_rings           = qla24xx_config_rings,
2034         .reset_adapter          = qla24xx_reset_adapter,
2035         .nvram_config           = qla81xx_nvram_config,
2036         .update_fw_options      = qla81xx_update_fw_options,
2037         .load_risc              = qla81xx_load_risc,
2038         .pci_info_str           = qla24xx_pci_info_str,
2039         .fw_version_str         = qla24xx_fw_version_str,
2040         .intr_handler           = qla24xx_intr_handler,
2041         .enable_intrs           = qla24xx_enable_intrs,
2042         .disable_intrs          = qla24xx_disable_intrs,
2043         .abort_command          = qla24xx_abort_command,
2044         .target_reset           = qla24xx_abort_target,
2045         .lun_reset              = qla24xx_lun_reset,
2046         .fabric_login           = qla24xx_login_fabric,
2047         .fabric_logout          = qla24xx_fabric_logout,
2048         .calc_req_entries       = NULL,
2049         .build_iocbs            = NULL,
2050         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2051         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2052         .read_nvram             = NULL,
2053         .write_nvram            = NULL,
2054         .fw_dump                = qla83xx_fw_dump,
2055         .beacon_on              = qla24xx_beacon_on,
2056         .beacon_off             = qla24xx_beacon_off,
2057         .beacon_blink           = qla83xx_beacon_blink,
2058         .read_optrom            = qla25xx_read_optrom_data,
2059         .write_optrom           = qla24xx_write_optrom_data,
2060         .get_flash_version      = qla24xx_get_flash_version,
2061         .start_scsi             = qla24xx_dif_start_scsi,
2062         .abort_isp              = qla2x00_abort_isp,
2063         .iospace_config         = qla83xx_iospace_config,
2064         .initialize_adapter     = qla2x00_initialize_adapter,
2065 };
2066
2067 static struct isp_operations qlafx00_isp_ops = {
2068         .pci_config             = qlafx00_pci_config,
2069         .reset_chip             = qlafx00_soft_reset,
2070         .chip_diag              = qlafx00_chip_diag,
2071         .config_rings           = qlafx00_config_rings,
2072         .reset_adapter          = qlafx00_soft_reset,
2073         .nvram_config           = NULL,
2074         .update_fw_options      = NULL,
2075         .load_risc              = NULL,
2076         .pci_info_str           = qlafx00_pci_info_str,
2077         .fw_version_str         = qlafx00_fw_version_str,
2078         .intr_handler           = qlafx00_intr_handler,
2079         .enable_intrs           = qlafx00_enable_intrs,
2080         .disable_intrs          = qlafx00_disable_intrs,
2081         .abort_command          = qlafx00_abort_command,
2082         .target_reset           = qlafx00_abort_target,
2083         .lun_reset              = qlafx00_lun_reset,
2084         .fabric_login           = NULL,
2085         .fabric_logout          = NULL,
2086         .calc_req_entries       = NULL,
2087         .build_iocbs            = NULL,
2088         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2089         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2090         .read_nvram             = qla24xx_read_nvram_data,
2091         .write_nvram            = qla24xx_write_nvram_data,
2092         .fw_dump                = NULL,
2093         .beacon_on              = qla24xx_beacon_on,
2094         .beacon_off             = qla24xx_beacon_off,
2095         .beacon_blink           = NULL,
2096         .read_optrom            = qla24xx_read_optrom_data,
2097         .write_optrom           = qla24xx_write_optrom_data,
2098         .get_flash_version      = qla24xx_get_flash_version,
2099         .start_scsi             = qlafx00_start_scsi,
2100         .abort_isp              = qlafx00_abort_isp,
2101         .iospace_config         = qlafx00_iospace_config,
2102         .initialize_adapter     = qlafx00_initialize_adapter,
2103 };
2104
2105 static inline void
2106 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2107 {
2108         ha->device_type = DT_EXTENDED_IDS;
2109         switch (ha->pdev->device) {
2110         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2111                 ha->device_type |= DT_ISP2100;
2112                 ha->device_type &= ~DT_EXTENDED_IDS;
2113                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2114                 break;
2115         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2116                 ha->device_type |= DT_ISP2200;
2117                 ha->device_type &= ~DT_EXTENDED_IDS;
2118                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2119                 break;
2120         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2121                 ha->device_type |= DT_ISP2300;
2122                 ha->device_type |= DT_ZIO_SUPPORTED;
2123                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2124                 break;
2125         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2126                 ha->device_type |= DT_ISP2312;
2127                 ha->device_type |= DT_ZIO_SUPPORTED;
2128                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2129                 break;
2130         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2131                 ha->device_type |= DT_ISP2322;
2132                 ha->device_type |= DT_ZIO_SUPPORTED;
2133                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2134                     ha->pdev->subsystem_device == 0x0170)
2135                         ha->device_type |= DT_OEM_001;
2136                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2137                 break;
2138         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2139                 ha->device_type |= DT_ISP6312;
2140                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2141                 break;
2142         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2143                 ha->device_type |= DT_ISP6322;
2144                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2145                 break;
2146         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2147                 ha->device_type |= DT_ISP2422;
2148                 ha->device_type |= DT_ZIO_SUPPORTED;
2149                 ha->device_type |= DT_FWI2;
2150                 ha->device_type |= DT_IIDMA;
2151                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2152                 break;
2153         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2154                 ha->device_type |= DT_ISP2432;
2155                 ha->device_type |= DT_ZIO_SUPPORTED;
2156                 ha->device_type |= DT_FWI2;
2157                 ha->device_type |= DT_IIDMA;
2158                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2159                 break;
2160         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2161                 ha->device_type |= DT_ISP8432;
2162                 ha->device_type |= DT_ZIO_SUPPORTED;
2163                 ha->device_type |= DT_FWI2;
2164                 ha->device_type |= DT_IIDMA;
2165                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2166                 break;
2167         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2168                 ha->device_type |= DT_ISP5422;
2169                 ha->device_type |= DT_FWI2;
2170                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2171                 break;
2172         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2173                 ha->device_type |= DT_ISP5432;
2174                 ha->device_type |= DT_FWI2;
2175                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2176                 break;
2177         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2178                 ha->device_type |= DT_ISP2532;
2179                 ha->device_type |= DT_ZIO_SUPPORTED;
2180                 ha->device_type |= DT_FWI2;
2181                 ha->device_type |= DT_IIDMA;
2182                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2183                 break;
2184         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2185                 ha->device_type |= DT_ISP8001;
2186                 ha->device_type |= DT_ZIO_SUPPORTED;
2187                 ha->device_type |= DT_FWI2;
2188                 ha->device_type |= DT_IIDMA;
2189                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2190                 break;
2191         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2192                 ha->device_type |= DT_ISP8021;
2193                 ha->device_type |= DT_ZIO_SUPPORTED;
2194                 ha->device_type |= DT_FWI2;
2195                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2196                 /* Initialize 82XX ISP flags */
2197                 qla82xx_init_flags(ha);
2198                 break;
2199          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2200                 ha->device_type |= DT_ISP8044;
2201                 ha->device_type |= DT_ZIO_SUPPORTED;
2202                 ha->device_type |= DT_FWI2;
2203                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2204                 /* Initialize 82XX ISP flags */
2205                 qla82xx_init_flags(ha);
2206                 break;
2207         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2208                 ha->device_type |= DT_ISP2031;
2209                 ha->device_type |= DT_ZIO_SUPPORTED;
2210                 ha->device_type |= DT_FWI2;
2211                 ha->device_type |= DT_IIDMA;
2212                 ha->device_type |= DT_T10_PI;
2213                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2214                 break;
2215         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2216                 ha->device_type |= DT_ISP8031;
2217                 ha->device_type |= DT_ZIO_SUPPORTED;
2218                 ha->device_type |= DT_FWI2;
2219                 ha->device_type |= DT_IIDMA;
2220                 ha->device_type |= DT_T10_PI;
2221                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2222                 break;
2223         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2224                 ha->device_type |= DT_ISPFX00;
2225                 break;
2226         }
2227
2228         if (IS_QLA82XX(ha))
2229                 ha->port_no = !(ha->portnum & 1);
2230         else
2231                 /* Get adapter physical port no from interrupt pin register. */
2232                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2233
2234         if (ha->port_no & 1)
2235                 ha->flags.port0 = 1;
2236         else
2237                 ha->flags.port0 = 0;
2238         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2239             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2240             ha->device_type, ha->flags.port0, ha->fw_srisc_address);
2241 }
2242
2243 static void
2244 qla2xxx_scan_start(struct Scsi_Host *shost)
2245 {
2246         scsi_qla_host_t *vha = shost_priv(shost);
2247
2248         if (vha->hw->flags.running_gold_fw)
2249                 return;
2250
2251         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2252         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2253         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2254         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2255 }
2256
2257 static int
2258 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2259 {
2260         scsi_qla_host_t *vha = shost_priv(shost);
2261
2262         if (!vha->host)
2263                 return 1;
2264         if (time > vha->hw->loop_reset_delay * HZ)
2265                 return 1;
2266
2267         return atomic_read(&vha->loop_state) == LOOP_READY;
2268 }
2269
2270 /*
2271  * PCI driver interface
2272  */
2273 static int
2274 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2275 {
2276         int     ret = -ENODEV;
2277         struct Scsi_Host *host;
2278         scsi_qla_host_t *base_vha = NULL;
2279         struct qla_hw_data *ha;
2280         char pci_info[30];
2281         char fw_str[30], wq_name[30];
2282         struct scsi_host_template *sht;
2283         int bars, mem_only = 0;
2284         uint16_t req_length = 0, rsp_length = 0;
2285         struct req_que *req = NULL;
2286         struct rsp_que *rsp = NULL;
2287         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2288         sht = &qla2xxx_driver_template;
2289         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2290             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2291             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2292             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2293             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2294             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2295             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2296             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2297             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2298             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2299             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2300             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044) {
2301                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2302                 mem_only = 1;
2303                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2304                     "Mem only adapter.\n");
2305         }
2306         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2307             "Bars=%d.\n", bars);
2308
2309         if (mem_only) {
2310                 if (pci_enable_device_mem(pdev))
2311                         goto probe_out;
2312         } else {
2313                 if (pci_enable_device(pdev))
2314                         goto probe_out;
2315         }
2316
2317         /* This may fail but that's ok */
2318         pci_enable_pcie_error_reporting(pdev);
2319
2320         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2321         if (!ha) {
2322                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2323                     "Unable to allocate memory for ha.\n");
2324                 goto probe_out;
2325         }
2326         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2327             "Memory allocated for ha=%p.\n", ha);
2328         ha->pdev = pdev;
2329         ha->tgt.enable_class_2 = ql2xenableclass2;
2330
2331         /* Clear our data area */
2332         ha->bars = bars;
2333         ha->mem_only = mem_only;
2334         spin_lock_init(&ha->hardware_lock);
2335         spin_lock_init(&ha->vport_slock);
2336         mutex_init(&ha->selflogin_lock);
2337         mutex_init(&ha->optrom_mutex);
2338
2339         /* Set ISP-type information. */
2340         qla2x00_set_isp_flags(ha);
2341
2342         /* Set EEH reset type to fundamental if required by hba */
2343         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2344             IS_QLA83XX(ha))
2345                 pdev->needs_freset = 1;
2346
2347         ha->prev_topology = 0;
2348         ha->init_cb_size = sizeof(init_cb_t);
2349         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2350         ha->optrom_size = OPTROM_SIZE_2300;
2351
2352         /* Assign ISP specific operations. */
2353         if (IS_QLA2100(ha)) {
2354                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2355                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2356                 req_length = REQUEST_ENTRY_CNT_2100;
2357                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2358                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2359                 ha->gid_list_info_size = 4;
2360                 ha->flash_conf_off = ~0;
2361                 ha->flash_data_off = ~0;
2362                 ha->nvram_conf_off = ~0;
2363                 ha->nvram_data_off = ~0;
2364                 ha->isp_ops = &qla2100_isp_ops;
2365         } else if (IS_QLA2200(ha)) {
2366                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2367                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2368                 req_length = REQUEST_ENTRY_CNT_2200;
2369                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2370                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2371                 ha->gid_list_info_size = 4;
2372                 ha->flash_conf_off = ~0;
2373                 ha->flash_data_off = ~0;
2374                 ha->nvram_conf_off = ~0;
2375                 ha->nvram_data_off = ~0;
2376                 ha->isp_ops = &qla2100_isp_ops;
2377         } else if (IS_QLA23XX(ha)) {
2378                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2379                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2380                 req_length = REQUEST_ENTRY_CNT_2200;
2381                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2382                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2383                 ha->gid_list_info_size = 6;
2384                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2385                         ha->optrom_size = OPTROM_SIZE_2322;
2386                 ha->flash_conf_off = ~0;
2387                 ha->flash_data_off = ~0;
2388                 ha->nvram_conf_off = ~0;
2389                 ha->nvram_data_off = ~0;
2390                 ha->isp_ops = &qla2300_isp_ops;
2391         } else if (IS_QLA24XX_TYPE(ha)) {
2392                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2393                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2394                 req_length = REQUEST_ENTRY_CNT_24XX;
2395                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2396                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2397                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2398                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2399                 ha->gid_list_info_size = 8;
2400                 ha->optrom_size = OPTROM_SIZE_24XX;
2401                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2402                 ha->isp_ops = &qla24xx_isp_ops;
2403                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2404                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2405                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2406                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2407         } else if (IS_QLA25XX(ha)) {
2408                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2409                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2410                 req_length = REQUEST_ENTRY_CNT_24XX;
2411                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2412                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2413                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2414                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2415                 ha->gid_list_info_size = 8;
2416                 ha->optrom_size = OPTROM_SIZE_25XX;
2417                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2418                 ha->isp_ops = &qla25xx_isp_ops;
2419                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2420                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2421                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2422                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2423         } else if (IS_QLA81XX(ha)) {
2424                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2425                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2426                 req_length = REQUEST_ENTRY_CNT_24XX;
2427                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2428                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2429                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2430                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2431                 ha->gid_list_info_size = 8;
2432                 ha->optrom_size = OPTROM_SIZE_81XX;
2433                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2434                 ha->isp_ops = &qla81xx_isp_ops;
2435                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2436                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2437                 ha->nvram_conf_off = ~0;
2438                 ha->nvram_data_off = ~0;
2439         } else if (IS_QLA82XX(ha)) {
2440                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2441                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2442                 req_length = REQUEST_ENTRY_CNT_82XX;
2443                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2444                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2445                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2446                 ha->gid_list_info_size = 8;
2447                 ha->optrom_size = OPTROM_SIZE_82XX;
2448                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2449                 ha->isp_ops = &qla82xx_isp_ops;
2450                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2451                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2452                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2453                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2454         } else if (IS_QLA8044(ha)) {
2455                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2456                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2457                 req_length = REQUEST_ENTRY_CNT_82XX;
2458                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2459                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2460                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2461                 ha->gid_list_info_size = 8;
2462                 ha->optrom_size = OPTROM_SIZE_83XX;
2463                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2464                 ha->isp_ops = &qla8044_isp_ops;
2465                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2466                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2467                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2468                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2469         } else if (IS_QLA83XX(ha)) {
2470                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2471                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2472                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2473                 req_length = REQUEST_ENTRY_CNT_24XX;
2474                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2475                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2476                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2477                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2478                 ha->gid_list_info_size = 8;
2479                 ha->optrom_size = OPTROM_SIZE_83XX;
2480                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2481                 ha->isp_ops = &qla83xx_isp_ops;
2482                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2483                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2484                 ha->nvram_conf_off = ~0;
2485                 ha->nvram_data_off = ~0;
2486         }  else if (IS_QLAFX00(ha)) {
2487                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
2488                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
2489                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
2490                 req_length = REQUEST_ENTRY_CNT_FX00;
2491                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
2492                 ha->init_cb_size = sizeof(struct init_cb_fx);
2493                 ha->isp_ops = &qlafx00_isp_ops;
2494                 ha->port_down_retry_count = 30; /* default value */
2495                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
2496                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2497                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
2498                 ha->mr.fw_hbt_en = 1;
2499                 ha->mr.host_info_resend = false;
2500                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
2501         }
2502
2503         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2504             "mbx_count=%d, req_length=%d, "
2505             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2506             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2507             "max_fibre_devices=%d.\n",
2508             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2509             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2510             ha->nvram_npiv_size, ha->max_fibre_devices);
2511         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2512             "isp_ops=%p, flash_conf_off=%d, "
2513             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2514             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2515             ha->nvram_conf_off, ha->nvram_data_off);
2516
2517         /* Configure PCI I/O space */
2518         ret = ha->isp_ops->iospace_config(ha);
2519         if (ret)
2520                 goto iospace_config_failed;
2521
2522         ql_log_pci(ql_log_info, pdev, 0x001d,
2523             "Found an ISP%04X irq %d iobase 0x%p.\n",
2524             pdev->device, pdev->irq, ha->iobase);
2525         mutex_init(&ha->vport_lock);
2526         init_completion(&ha->mbx_cmd_comp);
2527         complete(&ha->mbx_cmd_comp);
2528         init_completion(&ha->mbx_intr_comp);
2529         init_completion(&ha->dcbx_comp);
2530         init_completion(&ha->lb_portup_comp);
2531
2532         set_bit(0, (unsigned long *) ha->vp_idx_map);
2533
2534         qla2x00_config_dma_addressing(ha);
2535         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
2536             "64 Bit addressing is %s.\n",
2537             ha->flags.enable_64bit_addressing ? "enable" :
2538             "disable");
2539         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2540         if (!ret) {
2541                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
2542                     "Failed to allocate memory for adapter, aborting.\n");
2543
2544                 goto probe_hw_failed;
2545         }
2546
2547         req->max_q_depth = MAX_Q_DEPTH;
2548         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2549                 req->max_q_depth = ql2xmaxqdepth;
2550
2551
2552         base_vha = qla2x00_create_host(sht, ha);
2553         if (!base_vha) {
2554                 ret = -ENOMEM;
2555                 qla2x00_mem_free(ha);
2556                 qla2x00_free_req_que(ha, req);
2557                 qla2x00_free_rsp_que(ha, rsp);
2558                 goto probe_hw_failed;
2559         }
2560
2561         pci_set_drvdata(pdev, base_vha);
2562
2563         host = base_vha->host;
2564         base_vha->req = req;
2565         if (IS_QLAFX00(ha))
2566                 host->can_queue = QLAFX00_MAX_CANQUEUE;
2567         else
2568                 host->can_queue = req->length + 128;
2569         if (IS_QLA2XXX_MIDTYPE(ha))
2570                 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
2571         else
2572                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2573                                                 base_vha->vp_idx;
2574
2575         /* Setup fcport template structure. */
2576         ha->mr.fcport.vha = base_vha;
2577         ha->mr.fcport.port_type = FCT_UNKNOWN;
2578         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
2579         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
2580         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
2581         ha->mr.fcport.scan_state = 1;
2582
2583         /* Set the SG table size based on ISP type */
2584         if (!IS_FWI2_CAPABLE(ha)) {
2585                 if (IS_QLA2100(ha))
2586                         host->sg_tablesize = 32;
2587         } else {
2588                 if (!IS_QLA82XX(ha))
2589                         host->sg_tablesize = QLA_SG_ALL;
2590         }
2591         ql_dbg(ql_dbg_init, base_vha, 0x0032,
2592             "can_queue=%d, req=%p, "
2593             "mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
2594             host->can_queue, base_vha->req,
2595             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
2596         host->max_id = ha->max_fibre_devices;
2597         host->cmd_per_lun = 3;
2598         host->unique_id = host->host_no;
2599         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
2600                 host->max_cmd_len = 32;
2601         else
2602                 host->max_cmd_len = MAX_CMDSZ;
2603         host->max_channel = MAX_BUSES - 1;
2604         host->max_lun = ql2xmaxlun;
2605         host->transportt = qla2xxx_transport_template;
2606         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
2607
2608         ql_dbg(ql_dbg_init, base_vha, 0x0033,
2609             "max_id=%d this_id=%d "
2610             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
2611             "max_lun=%d transportt=%p, vendor_id=%llu.\n", host->max_id,
2612             host->this_id, host->cmd_per_lun, host->unique_id,
2613             host->max_cmd_len, host->max_channel, host->max_lun,
2614             host->transportt, sht->vendor_id);
2615
2616 que_init:
2617         /* Alloc arrays of request and response ring ptrs */
2618         if (!qla2x00_alloc_queues(ha, req, rsp)) {
2619                 ql_log(ql_log_fatal, base_vha, 0x003d,
2620                     "Failed to allocate memory for queue pointers..."
2621                     "aborting.\n");
2622                 goto probe_init_failed;
2623         }
2624
2625         qlt_probe_one_stage1(base_vha, ha);
2626
2627         /* Set up the irqs */
2628         ret = qla2x00_request_irqs(ha, rsp);
2629         if (ret)
2630                 goto probe_init_failed;
2631
2632         pci_save_state(pdev);
2633
2634         /* Assign back pointers */
2635         rsp->req = req;
2636         req->rsp = rsp;
2637
2638         if (IS_QLAFX00(ha)) {
2639                 ha->rsp_q_map[0] = rsp;
2640                 ha->req_q_map[0] = req;
2641                 set_bit(0, ha->req_qid_map);
2642                 set_bit(0, ha->rsp_qid_map);
2643         }
2644
2645         /* FWI2-capable only. */
2646         req->req_q_in = &ha->iobase->isp24.req_q_in;
2647         req->req_q_out = &ha->iobase->isp24.req_q_out;
2648         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2649         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
2650         if (ha->mqenable || IS_QLA83XX(ha)) {
2651                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2652                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2653                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2654                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
2655         }
2656
2657         if (IS_QLAFX00(ha)) {
2658                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
2659                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
2660                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
2661                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
2662         }
2663
2664         if (IS_P3P_TYPE(ha)) {
2665                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2666                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2667                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2668         }
2669
2670         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
2671             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2672             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2673         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
2674             "req->req_q_in=%p req->req_q_out=%p "
2675             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2676             req->req_q_in, req->req_q_out,
2677             rsp->rsp_q_in, rsp->rsp_q_out);
2678         ql_dbg(ql_dbg_init, base_vha, 0x003e,
2679             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2680             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2681         ql_dbg(ql_dbg_init, base_vha, 0x003f,
2682             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2683             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
2684
2685         if (ha->isp_ops->initialize_adapter(base_vha)) {
2686                 ql_log(ql_log_fatal, base_vha, 0x00d6,
2687                     "Failed to initialize adapter - Adapter flags %x.\n",
2688                     base_vha->device_flags);
2689
2690                 if (IS_QLA82XX(ha)) {
2691                         qla82xx_idc_lock(ha);
2692                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2693                                 QLA8XXX_DEV_FAILED);
2694                         qla82xx_idc_unlock(ha);
2695                         ql_log(ql_log_fatal, base_vha, 0x00d7,
2696                             "HW State: FAILED.\n");
2697                 } else if (IS_QLA8044(ha)) {
2698                         qla8044_idc_lock(ha);
2699                         qla8044_wr_direct(base_vha,
2700                                 QLA8044_CRB_DEV_STATE_INDEX,
2701                                 QLA8XXX_DEV_FAILED);
2702                         qla8044_idc_unlock(ha);
2703                         ql_log(ql_log_fatal, base_vha, 0x0150,
2704                             "HW State: FAILED.\n");
2705                 }
2706
2707                 ret = -ENODEV;
2708                 goto probe_failed;
2709         }
2710
2711         if (ha->mqenable) {
2712                 if (qla25xx_setup_mode(base_vha)) {
2713                         ql_log(ql_log_warn, base_vha, 0x00ec,
2714                             "Failed to create queues, falling back to single queue mode.\n");
2715                         goto que_init;
2716                 }
2717         }
2718
2719         if (ha->flags.running_gold_fw)
2720                 goto skip_dpc;
2721
2722         /*
2723          * Startup the kernel thread for this host adapter
2724          */
2725         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
2726             "%s_dpc", base_vha->host_str);
2727         if (IS_ERR(ha->dpc_thread)) {
2728                 ql_log(ql_log_fatal, base_vha, 0x00ed,
2729                     "Failed to start DPC thread.\n");
2730                 ret = PTR_ERR(ha->dpc_thread);
2731                 goto probe_failed;
2732         }
2733         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
2734             "DPC thread started successfully.\n");
2735
2736         /*
2737          * If we're not coming up in initiator mode, we might sit for
2738          * a while without waking up the dpc thread, which leads to a
2739          * stuck process warning.  So just kick the dpc once here and
2740          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
2741          */
2742         qla2xxx_wake_dpc(base_vha);
2743
2744         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
2745
2746         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
2747                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
2748                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
2749                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
2750
2751                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
2752                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
2753                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
2754                 INIT_WORK(&ha->idc_state_handler,
2755                     qla83xx_idc_state_handler_work);
2756                 INIT_WORK(&ha->nic_core_unrecoverable,
2757                     qla83xx_nic_core_unrecoverable_work);
2758         }
2759
2760 skip_dpc:
2761         list_add_tail(&base_vha->list, &ha->vp_list);
2762         base_vha->host->irq = ha->pdev->irq;
2763
2764         /* Initialized the timer */
2765         qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
2766         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
2767             "Started qla2x00_timer with "
2768             "interval=%d.\n", WATCH_INTERVAL);
2769         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
2770             "Detected hba at address=%p.\n",
2771             ha);
2772
2773         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
2774                 if (ha->fw_attributes & BIT_4) {
2775                         int prot = 0, guard;
2776                         base_vha->flags.difdix_supported = 1;
2777                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
2778                             "Registering for DIF/DIX type 1 and 3 protection.\n");
2779                         if (ql2xenabledif == 1)
2780                                 prot = SHOST_DIX_TYPE0_PROTECTION;
2781                         scsi_host_set_prot(host,
2782                             prot | SHOST_DIF_TYPE1_PROTECTION
2783                             | SHOST_DIF_TYPE2_PROTECTION
2784                             | SHOST_DIF_TYPE3_PROTECTION
2785                             | SHOST_DIX_TYPE1_PROTECTION
2786                             | SHOST_DIX_TYPE2_PROTECTION
2787                             | SHOST_DIX_TYPE3_PROTECTION);
2788
2789                         guard = SHOST_DIX_GUARD_CRC;
2790
2791                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
2792                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
2793                                 guard |= SHOST_DIX_GUARD_IP;
2794
2795                         scsi_host_set_guard(host, guard);
2796                 } else
2797                         base_vha->flags.difdix_supported = 0;
2798         }
2799
2800         ha->isp_ops->enable_intrs(ha);
2801
2802         if (IS_QLAFX00(ha)) {
2803                 ret = qlafx00_fx_disc(base_vha,
2804                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
2805                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
2806                     QLA_SG_ALL : 128;
2807         }
2808
2809         ret = scsi_add_host(host, &pdev->dev);
2810         if (ret)
2811                 goto probe_failed;
2812
2813         base_vha->flags.init_done = 1;
2814         base_vha->flags.online = 1;
2815
2816         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
2817             "Init done and hba is online.\n");
2818
2819         if (qla_ini_mode_enabled(base_vha))
2820                 scsi_scan_host(host);
2821         else
2822                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
2823                         "skipping scsi_scan_host() for non-initiator port\n");
2824
2825         qla2x00_alloc_sysfs_attr(base_vha);
2826
2827         if (IS_QLAFX00(ha)) {
2828                 ret = qlafx00_fx_disc(base_vha,
2829                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
2830
2831                 /* Register system information */
2832                 ret =  qlafx00_fx_disc(base_vha,
2833                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
2834         }
2835
2836         qla2x00_init_host_attr(base_vha);
2837
2838         qla2x00_dfs_setup(base_vha);
2839
2840         ql_log(ql_log_info, base_vha, 0x00fb,
2841             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
2842         ql_log(ql_log_info, base_vha, 0x00fc,
2843             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
2844             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
2845             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
2846             base_vha->host_no,
2847             ha->isp_ops->fw_version_str(base_vha, fw_str));
2848
2849         qlt_add_target(ha, base_vha);
2850
2851         return 0;
2852
2853 probe_init_failed:
2854         qla2x00_free_req_que(ha, req);
2855         ha->req_q_map[0] = NULL;
2856         clear_bit(0, ha->req_qid_map);
2857         qla2x00_free_rsp_que(ha, rsp);
2858         ha->rsp_q_map[0] = NULL;
2859         clear_bit(0, ha->rsp_qid_map);
2860         ha->max_req_queues = ha->max_rsp_queues = 0;
2861
2862 probe_failed:
2863         if (base_vha->timer_active)
2864                 qla2x00_stop_timer(base_vha);
2865         base_vha->flags.online = 0;
2866         if (ha->dpc_thread) {
2867                 struct task_struct *t = ha->dpc_thread;
2868
2869                 ha->dpc_thread = NULL;
2870                 kthread_stop(t);
2871         }
2872
2873         qla2x00_free_device(base_vha);
2874
2875         scsi_host_put(base_vha->host);
2876
2877 probe_hw_failed:
2878         if (IS_QLA82XX(ha)) {
2879                 qla82xx_idc_lock(ha);
2880                 qla82xx_clear_drv_active(ha);
2881                 qla82xx_idc_unlock(ha);
2882         }
2883         if (IS_QLA8044(ha)) {
2884                 qla8044_idc_lock(ha);
2885                 qla8044_clear_drv_active(ha);
2886                 qla8044_idc_unlock(ha);
2887         }
2888 iospace_config_failed:
2889         if (IS_P3P_TYPE(ha)) {
2890                 if (!ha->nx_pcibase)
2891                         iounmap((device_reg_t __iomem *)ha->nx_pcibase);
2892                 if (!ql2xdbwr)
2893                         iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
2894         } else {
2895                 if (ha->iobase)
2896                         iounmap(ha->iobase);
2897                 if (ha->cregbase)
2898                         iounmap(ha->cregbase);
2899         }
2900         pci_release_selected_regions(ha->pdev, ha->bars);
2901         kfree(ha);
2902         ha = NULL;
2903
2904 probe_out:
2905         pci_disable_device(pdev);
2906         return ret;
2907 }
2908
2909 static void
2910 qla2x00_shutdown(struct pci_dev *pdev)
2911 {
2912         scsi_qla_host_t *vha;
2913         struct qla_hw_data  *ha;
2914
2915         if (!atomic_read(&pdev->enable_cnt))
2916                 return;
2917
2918         vha = pci_get_drvdata(pdev);
2919         ha = vha->hw;
2920
2921         /* Notify ISPFX00 firmware */
2922         if (IS_QLAFX00(ha))
2923                 qlafx00_driver_shutdown(vha, 20);
2924
2925         /* Turn-off FCE trace */
2926         if (ha->flags.fce_enabled) {
2927                 qla2x00_disable_fce_trace(vha, NULL, NULL);
2928                 ha->flags.fce_enabled = 0;
2929         }
2930
2931         /* Turn-off EFT trace */
2932         if (ha->eft)
2933                 qla2x00_disable_eft_trace(vha);
2934
2935         /* Stop currently executing firmware. */
2936         qla2x00_try_to_stop_firmware(vha);
2937
2938         /* Turn adapter off line */
2939         vha->flags.online = 0;
2940
2941         /* turn-off interrupts on the card */
2942         if (ha->interrupts_on) {
2943                 vha->flags.init_done = 0;
2944                 ha->isp_ops->disable_intrs(ha);
2945         }
2946
2947         qla2x00_free_irqs(vha);
2948
2949         qla2x00_free_fw_dump(ha);
2950 }
2951
2952 /* Deletes all the virtual ports for a given ha */
2953 static void
2954 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
2955 {
2956         struct Scsi_Host *scsi_host;
2957         scsi_qla_host_t *vha;
2958         unsigned long flags;
2959
2960         mutex_lock(&ha->vport_lock);
2961         while (ha->cur_vport_count) {
2962                 spin_lock_irqsave(&ha->vport_slock, flags);
2963
2964                 BUG_ON(base_vha->list.next == &ha->vp_list);
2965                 /* This assumes first entry in ha->vp_list is always base vha */
2966                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
2967                 scsi_host = scsi_host_get(vha->host);
2968
2969                 spin_unlock_irqrestore(&ha->vport_slock, flags);
2970                 mutex_unlock(&ha->vport_lock);
2971
2972                 fc_vport_terminate(vha->fc_vport);
2973                 scsi_host_put(vha->host);
2974
2975                 mutex_lock(&ha->vport_lock);
2976         }
2977         mutex_unlock(&ha->vport_lock);
2978 }
2979
2980 /* Stops all deferred work threads */
2981 static void
2982 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
2983 {
2984         /* Flush the work queue and remove it */
2985         if (ha->wq) {
2986                 flush_workqueue(ha->wq);
2987                 destroy_workqueue(ha->wq);
2988                 ha->wq = NULL;
2989         }
2990
2991         /* Cancel all work and destroy DPC workqueues */
2992         if (ha->dpc_lp_wq) {
2993                 cancel_work_sync(&ha->idc_aen);
2994                 destroy_workqueue(ha->dpc_lp_wq);
2995                 ha->dpc_lp_wq = NULL;
2996         }
2997
2998         if (ha->dpc_hp_wq) {
2999                 cancel_work_sync(&ha->nic_core_reset);
3000                 cancel_work_sync(&ha->idc_state_handler);
3001                 cancel_work_sync(&ha->nic_core_unrecoverable);
3002                 destroy_workqueue(ha->dpc_hp_wq);
3003                 ha->dpc_hp_wq = NULL;
3004         }
3005
3006         /* Kill the kernel thread for this host */
3007         if (ha->dpc_thread) {
3008                 struct task_struct *t = ha->dpc_thread;
3009
3010                 /*
3011                  * qla2xxx_wake_dpc checks for ->dpc_thread
3012                  * so we need to zero it out.
3013                  */
3014                 ha->dpc_thread = NULL;
3015                 kthread_stop(t);
3016         }
3017 }
3018
3019 static void
3020 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3021 {
3022         if (IS_QLA82XX(ha)) {
3023
3024                 iounmap((device_reg_t __iomem *)ha->nx_pcibase);
3025                 if (!ql2xdbwr)
3026                         iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
3027         } else {
3028                 if (ha->iobase)
3029                         iounmap(ha->iobase);
3030
3031                 if (ha->cregbase)
3032                         iounmap(ha->cregbase);
3033
3034                 if (ha->mqiobase)
3035                         iounmap(ha->mqiobase);
3036
3037                 if (IS_QLA83XX(ha) && ha->msixbase)
3038                         iounmap(ha->msixbase);
3039         }
3040 }
3041
3042 static void
3043 qla2x00_clear_drv_active(scsi_qla_host_t *vha)
3044 {
3045         struct qla_hw_data *ha = vha->hw;
3046
3047         if (IS_QLA8044(ha)) {
3048                 qla8044_idc_lock(ha);
3049                 qla8044_clear_drv_active(ha);
3050                 qla8044_idc_unlock(ha);
3051         } else if (IS_QLA82XX(ha)) {
3052                 qla82xx_idc_lock(ha);
3053                 qla82xx_clear_drv_active(ha);
3054                 qla82xx_idc_unlock(ha);
3055         }
3056 }
3057
3058 static void
3059 qla2x00_remove_one(struct pci_dev *pdev)
3060 {
3061         scsi_qla_host_t *base_vha;
3062         struct qla_hw_data  *ha;
3063
3064         /*
3065          * If the PCI device is disabled that means that probe failed and any
3066          * resources should be have cleaned up on probe exit.
3067          */
3068         if (!atomic_read(&pdev->enable_cnt))
3069                 return;
3070
3071         base_vha = pci_get_drvdata(pdev);
3072         ha = base_vha->hw;
3073
3074         set_bit(UNLOADING, &base_vha->dpc_flags);
3075
3076         if (IS_QLAFX00(ha))
3077                 qlafx00_driver_shutdown(base_vha, 20);
3078
3079         qla2x00_delete_all_vps(ha, base_vha);
3080
3081         if (IS_QLA8031(ha)) {
3082                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3083                     "Clearing fcoe driver presence.\n");
3084                 if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3085                         ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3086                             "Error while clearing DRV-Presence.\n");
3087         }
3088
3089         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3090
3091         qla2x00_dfs_remove(base_vha);
3092
3093         qla84xx_put_chip(base_vha);
3094
3095         /* Disable timer */
3096         if (base_vha->timer_active)
3097                 qla2x00_stop_timer(base_vha);
3098
3099         base_vha->flags.online = 0;
3100
3101         qla2x00_destroy_deferred_work(ha);
3102
3103         qlt_remove_target(ha, base_vha);
3104
3105         qla2x00_free_sysfs_attr(base_vha, true);
3106
3107         fc_remove_host(base_vha->host);
3108
3109         scsi_remove_host(base_vha->host);
3110
3111         qla2x00_free_device(base_vha);
3112
3113         scsi_host_put(base_vha->host);
3114
3115         qla2x00_clear_drv_active(base_vha);
3116
3117         qla2x00_unmap_iobases(ha);
3118
3119         pci_release_selected_regions(ha->pdev, ha->bars);
3120         kfree(ha);
3121         ha = NULL;
3122
3123         pci_disable_pcie_error_reporting(pdev);
3124
3125         pci_disable_device(pdev);
3126 }
3127
3128 static void
3129 qla2x00_free_device(scsi_qla_host_t *vha)
3130 {
3131         struct qla_hw_data *ha = vha->hw;
3132
3133         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3134
3135         /* Disable timer */
3136         if (vha->timer_active)
3137                 qla2x00_stop_timer(vha);
3138
3139         qla25xx_delete_queues(vha);
3140
3141         if (ha->flags.fce_enabled)
3142                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3143
3144         if (ha->eft)
3145                 qla2x00_disable_eft_trace(vha);
3146
3147         /* Stop currently executing firmware. */
3148         qla2x00_try_to_stop_firmware(vha);
3149
3150         vha->flags.online = 0;
3151
3152         /* turn-off interrupts on the card */
3153         if (ha->interrupts_on) {
3154                 vha->flags.init_done = 0;
3155                 ha->isp_ops->disable_intrs(ha);
3156         }
3157
3158         qla2x00_free_irqs(vha);
3159
3160         qla2x00_free_fcports(vha);
3161
3162         qla2x00_mem_free(ha);
3163
3164         qla82xx_md_free(vha);
3165
3166         qla2x00_free_queues(ha);
3167 }
3168
3169 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3170 {
3171         fc_port_t *fcport, *tfcport;
3172
3173         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
3174                 list_del(&fcport->list);
3175                 qla2x00_clear_loop_id(fcport);
3176                 kfree(fcport);
3177                 fcport = NULL;
3178         }
3179 }
3180
3181 static inline void
3182 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3183     int defer)
3184 {
3185         struct fc_rport *rport;
3186         scsi_qla_host_t *base_vha;
3187         unsigned long flags;
3188
3189         if (!fcport->rport)
3190                 return;
3191
3192         rport = fcport->rport;
3193         if (defer) {
3194                 base_vha = pci_get_drvdata(vha->hw->pdev);
3195                 spin_lock_irqsave(vha->host->host_lock, flags);
3196                 fcport->drport = rport;
3197                 spin_unlock_irqrestore(vha->host->host_lock, flags);
3198                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3199                 qla2xxx_wake_dpc(base_vha);
3200         } else {
3201                 fc_remote_port_delete(rport);
3202                 qlt_fc_port_deleted(vha, fcport);
3203         }
3204 }
3205
3206 /*
3207  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3208  *
3209  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3210  *
3211  * Return: None.
3212  *
3213  * Context:
3214  */
3215 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3216     int do_login, int defer)
3217 {
3218         if (IS_QLAFX00(vha->hw)) {
3219                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3220                 qla2x00_schedule_rport_del(vha, fcport, defer);
3221                 return;
3222         }
3223
3224         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3225             vha->vp_idx == fcport->vha->vp_idx) {
3226                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3227                 qla2x00_schedule_rport_del(vha, fcport, defer);
3228         }
3229         /*
3230          * We may need to retry the login, so don't change the state of the
3231          * port but do the retries.
3232          */
3233         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3234                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3235
3236         if (!do_login)
3237                 return;
3238
3239         if (fcport->login_retry == 0) {
3240                 fcport->login_retry = vha->hw->login_retry_count;
3241                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3242
3243                 ql_dbg(ql_dbg_disc, vha, 0x2067,
3244                     "Port login retry %8phN, id = 0x%04x retry cnt=%d.\n",
3245                     fcport->port_name, fcport->loop_id, fcport->login_retry);
3246         }
3247 }
3248
3249 /*
3250  * qla2x00_mark_all_devices_lost
3251  *      Updates fcport state when device goes offline.
3252  *
3253  * Input:
3254  *      ha = adapter block pointer.
3255  *      fcport = port structure pointer.
3256  *
3257  * Return:
3258  *      None.
3259  *
3260  * Context:
3261  */
3262 void
3263 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3264 {
3265         fc_port_t *fcport;
3266
3267         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3268                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3269                         continue;
3270
3271                 /*
3272                  * No point in marking the device as lost, if the device is
3273                  * already DEAD.
3274                  */
3275                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3276                         continue;
3277                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3278                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3279                         if (defer)
3280                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3281                         else if (vha->vp_idx == fcport->vha->vp_idx)
3282                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3283                 }
3284         }
3285 }
3286
3287 /*
3288 * qla2x00_mem_alloc
3289 *      Allocates adapter memory.
3290 *
3291 * Returns:
3292 *      0  = success.
3293 *      !0  = failure.
3294 */
3295 static int
3296 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3297         struct req_que **req, struct rsp_que **rsp)
3298 {
3299         char    name[16];
3300
3301         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3302                 &ha->init_cb_dma, GFP_KERNEL);
3303         if (!ha->init_cb)
3304                 goto fail;
3305
3306         if (qlt_mem_alloc(ha) < 0)
3307                 goto fail_free_init_cb;
3308
3309         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3310                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3311         if (!ha->gid_list)
3312                 goto fail_free_tgt_mem;
3313
3314         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3315         if (!ha->srb_mempool)
3316                 goto fail_free_gid_list;
3317
3318         if (IS_P3P_TYPE(ha)) {
3319                 /* Allocate cache for CT6 Ctx. */
3320                 if (!ctx_cachep) {
3321                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3322                                 sizeof(struct ct6_dsd), 0,
3323                                 SLAB_HWCACHE_ALIGN, NULL);
3324                         if (!ctx_cachep)
3325                                 goto fail_free_gid_list;
3326                 }
3327                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3328                         ctx_cachep);
3329                 if (!ha->ctx_mempool)
3330                         goto fail_free_srb_mempool;
3331                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3332                     "ctx_cachep=%p ctx_mempool=%p.\n",
3333                     ctx_cachep, ha->ctx_mempool);
3334         }
3335
3336         /* Get memory for cached NVRAM */
3337         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3338         if (!ha->nvram)
3339                 goto fail_free_ctx_mempool;
3340
3341         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3342                 ha->pdev->device);
3343         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3344                 DMA_POOL_SIZE, 8, 0);
3345         if (!ha->s_dma_pool)
3346                 goto fail_free_nvram;
3347
3348         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3349             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3350             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
3351
3352         if (IS_P3P_TYPE(ha) || ql2xenabledif) {
3353                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3354                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
3355                 if (!ha->dl_dma_pool) {
3356                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
3357                             "Failed to allocate memory for dl_dma_pool.\n");
3358                         goto fail_s_dma_pool;
3359                 }
3360
3361                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3362                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
3363                 if (!ha->fcp_cmnd_dma_pool) {
3364                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
3365                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3366                         goto fail_dl_dma_pool;
3367                 }
3368                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
3369                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3370                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3371         }
3372
3373         /* Allocate memory for SNS commands */
3374         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3375         /* Get consistent memory allocated for SNS commands */
3376                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3377                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3378                 if (!ha->sns_cmd)
3379                         goto fail_dma_pool;
3380                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3381                     "sns_cmd: %p.\n", ha->sns_cmd);
3382         } else {
3383         /* Get consistent memory allocated for MS IOCB */
3384                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3385                         &ha->ms_iocb_dma);
3386                 if (!ha->ms_iocb)
3387                         goto fail_dma_pool;
3388         /* Get consistent memory allocated for CT SNS commands */
3389                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3390                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
3391                 if (!ha->ct_sns)
3392                         goto fail_free_ms_iocb;
3393                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
3394                     "ms_iocb=%p ct_sns=%p.\n",
3395                     ha->ms_iocb, ha->ct_sns);
3396         }
3397
3398         /* Allocate memory for request ring */
3399         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
3400         if (!*req) {
3401                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
3402                     "Failed to allocate memory for req.\n");
3403                 goto fail_req;
3404         }
3405         (*req)->length = req_len;
3406         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
3407                 ((*req)->length + 1) * sizeof(request_t),
3408                 &(*req)->dma, GFP_KERNEL);
3409         if (!(*req)->ring) {
3410                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
3411                     "Failed to allocate memory for req_ring.\n");
3412                 goto fail_req_ring;
3413         }
3414         /* Allocate memory for response ring */
3415         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
3416         if (!*rsp) {
3417                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
3418                     "Failed to allocate memory for rsp.\n");
3419                 goto fail_rsp;
3420         }
3421         (*rsp)->hw = ha;
3422         (*rsp)->length = rsp_len;
3423         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
3424                 ((*rsp)->length + 1) * sizeof(response_t),
3425                 &(*rsp)->dma, GFP_KERNEL);
3426         if (!(*rsp)->ring) {
3427                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
3428                     "Failed to allocate memory for rsp_ring.\n");
3429                 goto fail_rsp_ring;
3430         }
3431         (*req)->rsp = *rsp;
3432         (*rsp)->req = *req;
3433         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
3434             "req=%p req->length=%d req->ring=%p rsp=%p "
3435             "rsp->length=%d rsp->ring=%p.\n",
3436             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
3437             (*rsp)->ring);
3438         /* Allocate memory for NVRAM data for vports */
3439         if (ha->nvram_npiv_size) {
3440                 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
3441                     ha->nvram_npiv_size, GFP_KERNEL);
3442                 if (!ha->npiv_info) {
3443                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
3444                             "Failed to allocate memory for npiv_info.\n");
3445                         goto fail_npiv_info;
3446                 }
3447         } else
3448                 ha->npiv_info = NULL;
3449
3450         /* Get consistent memory allocated for EX-INIT-CB. */
3451         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha)) {
3452                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3453                     &ha->ex_init_cb_dma);
3454                 if (!ha->ex_init_cb)
3455                         goto fail_ex_init_cb;
3456                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
3457                     "ex_init_cb=%p.\n", ha->ex_init_cb);
3458         }
3459
3460         INIT_LIST_HEAD(&ha->gbl_dsd_list);
3461
3462         /* Get consistent memory allocated for Async Port-Database. */
3463         if (!IS_FWI2_CAPABLE(ha)) {
3464                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3465                         &ha->async_pd_dma);
3466                 if (!ha->async_pd)
3467                         goto fail_async_pd;
3468                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
3469                     "async_pd=%p.\n", ha->async_pd);
3470         }
3471
3472         INIT_LIST_HEAD(&ha->vp_list);
3473
3474         /* Allocate memory for our loop_id bitmap */
3475         ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long),
3476             GFP_KERNEL);
3477         if (!ha->loop_id_map)
3478                 goto fail_async_pd;
3479         else {
3480                 qla2x00_set_reserved_loop_ids(ha);
3481                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
3482                     "loop_id_map=%p. \n", ha->loop_id_map);
3483         }
3484
3485         return 1;
3486
3487 fail_async_pd:
3488         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
3489 fail_ex_init_cb:
3490         kfree(ha->npiv_info);
3491 fail_npiv_info:
3492         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
3493                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
3494         (*rsp)->ring = NULL;
3495         (*rsp)->dma = 0;
3496 fail_rsp_ring:
3497         kfree(*rsp);
3498 fail_rsp:
3499         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
3500                 sizeof(request_t), (*req)->ring, (*req)->dma);
3501         (*req)->ring = NULL;
3502         (*req)->dma = 0;
3503 fail_req_ring:
3504         kfree(*req);
3505 fail_req:
3506         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3507                 ha->ct_sns, ha->ct_sns_dma);
3508         ha->ct_sns = NULL;
3509         ha->ct_sns_dma = 0;
3510 fail_free_ms_iocb:
3511         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3512         ha->ms_iocb = NULL;
3513         ha->ms_iocb_dma = 0;
3514 fail_dma_pool:
3515         if (IS_QLA82XX(ha) || ql2xenabledif) {
3516                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3517                 ha->fcp_cmnd_dma_pool = NULL;
3518         }
3519 fail_dl_dma_pool:
3520         if (IS_QLA82XX(ha) || ql2xenabledif) {
3521                 dma_pool_destroy(ha->dl_dma_pool);
3522                 ha->dl_dma_pool = NULL;
3523         }
3524 fail_s_dma_pool:
3525         dma_pool_destroy(ha->s_dma_pool);
3526         ha->s_dma_pool = NULL;
3527 fail_free_nvram:
3528         kfree(ha->nvram);
3529         ha->nvram = NULL;
3530 fail_free_ctx_mempool:
3531         mempool_destroy(ha->ctx_mempool);
3532         ha->ctx_mempool = NULL;
3533 fail_free_srb_mempool:
3534         mempool_destroy(ha->srb_mempool);
3535         ha->srb_mempool = NULL;
3536 fail_free_gid_list:
3537         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3538         ha->gid_list,
3539         ha->gid_list_dma);
3540         ha->gid_list = NULL;
3541         ha->gid_list_dma = 0;
3542 fail_free_tgt_mem:
3543         qlt_mem_free(ha);
3544 fail_free_init_cb:
3545         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
3546         ha->init_cb_dma);
3547         ha->init_cb = NULL;
3548         ha->init_cb_dma = 0;
3549 fail:
3550         ql_log(ql_log_fatal, NULL, 0x0030,
3551             "Memory allocation failure.\n");
3552         return -ENOMEM;
3553 }
3554
3555 /*
3556 * qla2x00_free_fw_dump
3557 *       Frees fw dump stuff.
3558 *
3559 * Input:
3560 *       ha = adapter block pointer
3561 */
3562 static void
3563 qla2x00_free_fw_dump(struct qla_hw_data *ha)
3564 {
3565         if (ha->fce)
3566                 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
3567                     ha->fce_dma);
3568
3569         if (ha->fw_dump) {
3570                 if (ha->eft)
3571                         dma_free_coherent(&ha->pdev->dev,
3572                             ntohl(ha->fw_dump->eft_size), ha->eft, ha->eft_dma);
3573                 vfree(ha->fw_dump);
3574         }
3575         ha->fce = NULL;
3576         ha->fce_dma = 0;
3577         ha->eft = NULL;
3578         ha->eft_dma = 0;
3579         ha->fw_dump = NULL;
3580         ha->fw_dumped = 0;
3581         ha->fw_dump_reading = 0;
3582 }
3583
3584 /*
3585 * qla2x00_mem_free
3586 *      Frees all adapter allocated memory.
3587 *
3588 * Input:
3589 *      ha = adapter block pointer.
3590 */
3591 static void
3592 qla2x00_mem_free(struct qla_hw_data *ha)
3593 {
3594         qla2x00_free_fw_dump(ha);
3595
3596         if (ha->mctp_dump)
3597                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
3598                     ha->mctp_dump_dma);
3599
3600         if (ha->srb_mempool)
3601                 mempool_destroy(ha->srb_mempool);
3602
3603         if (ha->dcbx_tlv)
3604                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
3605                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
3606
3607         if (ha->xgmac_data)
3608                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
3609                     ha->xgmac_data, ha->xgmac_data_dma);
3610
3611         if (ha->sns_cmd)
3612                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
3613                 ha->sns_cmd, ha->sns_cmd_dma);
3614
3615         if (ha->ct_sns)
3616                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3617                 ha->ct_sns, ha->ct_sns_dma);
3618
3619         if (ha->sfp_data)
3620                 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
3621
3622         if (ha->ms_iocb)
3623                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3624
3625         if (ha->ex_init_cb)
3626                 dma_pool_free(ha->s_dma_pool,
3627                         ha->ex_init_cb, ha->ex_init_cb_dma);
3628
3629         if (ha->async_pd)
3630                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
3631
3632         if (ha->s_dma_pool)
3633                 dma_pool_destroy(ha->s_dma_pool);
3634
3635         if (ha->gid_list)
3636                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3637                 ha->gid_list, ha->gid_list_dma);
3638
3639         if (IS_QLA82XX(ha)) {
3640                 if (!list_empty(&ha->gbl_dsd_list)) {
3641                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
3642
3643                         /* clean up allocated prev pool */
3644                         list_for_each_entry_safe(dsd_ptr,
3645                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
3646                                 dma_pool_free(ha->dl_dma_pool,
3647                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
3648                                 list_del(&dsd_ptr->list);
3649                                 kfree(dsd_ptr);
3650                         }
3651                 }
3652         }
3653
3654         if (ha->dl_dma_pool)
3655                 dma_pool_destroy(ha->dl_dma_pool);
3656
3657         if (ha->fcp_cmnd_dma_pool)
3658                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3659
3660         if (ha->ctx_mempool)
3661                 mempool_destroy(ha->ctx_mempool);
3662
3663         qlt_mem_free(ha);
3664
3665         if (ha->init_cb)
3666                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
3667                         ha->init_cb, ha->init_cb_dma);
3668         vfree(ha->optrom_buffer);
3669         kfree(ha->nvram);
3670         kfree(ha->npiv_info);
3671         kfree(ha->swl);
3672         kfree(ha->loop_id_map);
3673
3674         ha->srb_mempool = NULL;
3675         ha->ctx_mempool = NULL;
3676         ha->sns_cmd = NULL;
3677         ha->sns_cmd_dma = 0;
3678         ha->ct_sns = NULL;
3679         ha->ct_sns_dma = 0;
3680         ha->ms_iocb = NULL;
3681         ha->ms_iocb_dma = 0;
3682         ha->init_cb = NULL;
3683         ha->init_cb_dma = 0;
3684         ha->ex_init_cb = NULL;
3685         ha->ex_init_cb_dma = 0;
3686         ha->async_pd = NULL;
3687         ha->async_pd_dma = 0;
3688
3689         ha->s_dma_pool = NULL;
3690         ha->dl_dma_pool = NULL;
3691         ha->fcp_cmnd_dma_pool = NULL;
3692
3693         ha->gid_list = NULL;
3694         ha->gid_list_dma = 0;
3695
3696         ha->tgt.atio_ring = NULL;
3697         ha->tgt.atio_dma = 0;
3698         ha->tgt.tgt_vp_map = NULL;
3699 }
3700
3701 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
3702                                                 struct qla_hw_data *ha)
3703 {
3704         struct Scsi_Host *host;
3705         struct scsi_qla_host *vha = NULL;
3706
3707         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
3708         if (host == NULL) {
3709                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
3710                     "Failed to allocate host from the scsi layer, aborting.\n");
3711                 goto fail;
3712         }
3713
3714         /* Clear our data area */
3715         vha = shost_priv(host);
3716         memset(vha, 0, sizeof(scsi_qla_host_t));
3717
3718         vha->host = host;
3719         vha->host_no = host->host_no;
3720         vha->hw = ha;
3721
3722         INIT_LIST_HEAD(&vha->vp_fcports);
3723         INIT_LIST_HEAD(&vha->work_list);
3724         INIT_LIST_HEAD(&vha->list);
3725
3726         spin_lock_init(&vha->work_lock);
3727
3728         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
3729         ql_dbg(ql_dbg_init, vha, 0x0041,
3730             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
3731             vha->host, vha->hw, vha,
3732             dev_name(&(ha->pdev->dev)));
3733
3734         return vha;
3735
3736 fail:
3737         return vha;
3738 }
3739
3740 static struct qla_work_evt *
3741 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
3742 {
3743         struct qla_work_evt *e;
3744         uint8_t bail;
3745
3746         QLA_VHA_MARK_BUSY(vha, bail);
3747         if (bail)
3748                 return NULL;
3749
3750         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
3751         if (!e) {
3752                 QLA_VHA_MARK_NOT_BUSY(vha);
3753                 return NULL;
3754         }
3755
3756         INIT_LIST_HEAD(&e->list);
3757         e->type = type;
3758         e->flags = QLA_EVT_FLAG_FREE;
3759         return e;
3760 }
3761
3762 static int
3763 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
3764 {
3765         unsigned long flags;
3766
3767         spin_lock_irqsave(&vha->work_lock, flags);
3768         list_add_tail(&e->list, &vha->work_list);
3769         spin_unlock_irqrestore(&vha->work_lock, flags);
3770         qla2xxx_wake_dpc(vha);
3771
3772         return QLA_SUCCESS;
3773 }
3774
3775 int
3776 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
3777     u32 data)
3778 {
3779         struct qla_work_evt *e;
3780
3781         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
3782         if (!e)
3783                 return QLA_FUNCTION_FAILED;
3784
3785         e->u.aen.code = code;
3786         e->u.aen.data = data;
3787         return qla2x00_post_work(vha, e);
3788 }
3789
3790 int
3791 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
3792 {
3793         struct qla_work_evt *e;
3794
3795         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
3796         if (!e)
3797                 return QLA_FUNCTION_FAILED;
3798
3799         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
3800         return qla2x00_post_work(vha, e);
3801 }
3802
3803 #define qla2x00_post_async_work(name, type)     \
3804 int qla2x00_post_async_##name##_work(           \
3805     struct scsi_qla_host *vha,                  \
3806     fc_port_t *fcport, uint16_t *data)          \
3807 {                                               \
3808         struct qla_work_evt *e;                 \
3809                                                 \
3810         e = qla2x00_alloc_work(vha, type);      \
3811         if (!e)                                 \
3812                 return QLA_FUNCTION_FAILED;     \
3813                                                 \
3814         e->u.logio.fcport = fcport;             \
3815         if (data) {                             \
3816                 e->u.logio.data[0] = data[0];   \
3817                 e->u.logio.data[1] = data[1];   \
3818         }                                       \
3819         return qla2x00_post_work(vha, e);       \
3820 }
3821
3822 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
3823 qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
3824 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
3825 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
3826 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
3827 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
3828
3829 int
3830 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
3831 {
3832         struct qla_work_evt *e;
3833
3834         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
3835         if (!e)
3836                 return QLA_FUNCTION_FAILED;
3837
3838         e->u.uevent.code = code;
3839         return qla2x00_post_work(vha, e);
3840 }
3841
3842 static void
3843 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
3844 {
3845         char event_string[40];
3846         char *envp[] = { event_string, NULL };
3847
3848         switch (code) {
3849         case QLA_UEVENT_CODE_FW_DUMP:
3850                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
3851                     vha->host_no);
3852                 break;
3853         default:
3854                 /* do nothing */
3855                 break;
3856         }
3857         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
3858 }
3859
3860 int
3861 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
3862                         uint32_t *data, int cnt)
3863 {
3864         struct qla_work_evt *e;
3865
3866         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
3867         if (!e)
3868                 return QLA_FUNCTION_FAILED;
3869
3870         e->u.aenfx.evtcode = evtcode;
3871         e->u.aenfx.count = cnt;
3872         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
3873         return qla2x00_post_work(vha, e);
3874 }
3875
3876 void
3877 qla2x00_do_work(struct scsi_qla_host *vha)
3878 {
3879         struct qla_work_evt *e, *tmp;
3880         unsigned long flags;
3881         LIST_HEAD(work);
3882
3883         spin_lock_irqsave(&vha->work_lock, flags);
3884         list_splice_init(&vha->work_list, &work);
3885         spin_unlock_irqrestore(&vha->work_lock, flags);
3886
3887         list_for_each_entry_safe(e, tmp, &work, list) {
3888                 list_del_init(&e->list);
3889
3890                 switch (e->type) {
3891                 case QLA_EVT_AEN:
3892                         fc_host_post_event(vha->host, fc_get_event_number(),
3893                             e->u.aen.code, e->u.aen.data);
3894                         break;
3895                 case QLA_EVT_IDC_ACK:
3896                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
3897                         break;
3898                 case QLA_EVT_ASYNC_LOGIN:
3899                         qla2x00_async_login(vha, e->u.logio.fcport,
3900                             e->u.logio.data);
3901                         break;
3902                 case QLA_EVT_ASYNC_LOGIN_DONE:
3903                         qla2x00_async_login_done(vha, e->u.logio.fcport,
3904                             e->u.logio.data);
3905                         break;
3906                 case QLA_EVT_ASYNC_LOGOUT:
3907                         qla2x00_async_logout(vha, e->u.logio.fcport);
3908                         break;
3909                 case QLA_EVT_ASYNC_LOGOUT_DONE:
3910                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
3911                             e->u.logio.data);
3912                         break;
3913                 case QLA_EVT_ASYNC_ADISC:
3914                         qla2x00_async_adisc(vha, e->u.logio.fcport,
3915                             e->u.logio.data);
3916                         break;
3917                 case QLA_EVT_ASYNC_ADISC_DONE:
3918                         qla2x00_async_adisc_done(vha, e->u.logio.fcport,
3919                             e->u.logio.data);
3920                         break;
3921                 case QLA_EVT_UEVENT:
3922                         qla2x00_uevent_emit(vha, e->u.uevent.code);
3923                         break;
3924                 case QLA_EVT_AENFX:
3925                         qlafx00_process_aen(vha, e);
3926                         break;
3927                 }
3928                 if (e->flags & QLA_EVT_FLAG_FREE)
3929                         kfree(e);
3930
3931                 /* For each work completed decrement vha ref count */
3932                 QLA_VHA_MARK_NOT_BUSY(vha);
3933         }
3934 }
3935
3936 /* Relogins all the fcports of a vport
3937  * Context: dpc thread
3938  */
3939 void qla2x00_relogin(struct scsi_qla_host *vha)
3940 {
3941         fc_port_t       *fcport;
3942         int status;
3943         uint16_t        next_loopid = 0;
3944         struct qla_hw_data *ha = vha->hw;
3945         uint16_t data[2];
3946
3947         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3948         /*
3949          * If the port is not ONLINE then try to login
3950          * to it if we haven't run out of retries.
3951          */
3952                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
3953                     fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
3954                         fcport->login_retry--;
3955                         if (fcport->flags & FCF_FABRIC_DEVICE) {
3956                                 if (fcport->flags & FCF_FCP2_DEVICE)
3957                                         ha->isp_ops->fabric_logout(vha,
3958                                                         fcport->loop_id,
3959                                                         fcport->d_id.b.domain,
3960                                                         fcport->d_id.b.area,
3961                                                         fcport->d_id.b.al_pa);
3962
3963                                 if (fcport->loop_id == FC_NO_LOOP_ID) {
3964                                         fcport->loop_id = next_loopid =
3965                                             ha->min_external_loopid;
3966                                         status = qla2x00_find_new_loop_id(
3967                                             vha, fcport);
3968                                         if (status != QLA_SUCCESS) {
3969                                                 /* Ran out of IDs to use */
3970                                                 break;
3971                                         }
3972                                 }
3973
3974                                 if (IS_ALOGIO_CAPABLE(ha)) {
3975                                         fcport->flags |= FCF_ASYNC_SENT;
3976                                         data[0] = 0;
3977                                         data[1] = QLA_LOGIO_LOGIN_RETRIED;
3978                                         status = qla2x00_post_async_login_work(
3979                                             vha, fcport, data);
3980                                         if (status == QLA_SUCCESS)
3981                                                 continue;
3982                                         /* Attempt a retry. */
3983                                         status = 1;
3984                                 } else {
3985                                         status = qla2x00_fabric_login(vha,
3986                                             fcport, &next_loopid);
3987                                         if (status ==  QLA_SUCCESS) {
3988                                                 int status2;
3989                                                 uint8_t opts;
3990
3991                                                 opts = 0;
3992                                                 if (fcport->flags &
3993                                                     FCF_FCP2_DEVICE)
3994                                                         opts |= BIT_1;
3995                                                 status2 =
3996                                                     qla2x00_get_port_database(
3997                                                         vha, fcport, opts);
3998                                                 if (status2 != QLA_SUCCESS)
3999                                                         status = 1;
4000                                         }
4001                                 }
4002                         } else
4003                                 status = qla2x00_local_device_login(vha,
4004                                                                 fcport);
4005
4006                         if (status == QLA_SUCCESS) {
4007                                 fcport->old_loop_id = fcport->loop_id;
4008
4009                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
4010                                     "Port login OK: logged in ID 0x%x.\n",
4011                                     fcport->loop_id);
4012
4013                                 qla2x00_update_fcport(vha, fcport);
4014
4015                         } else if (status == 1) {
4016                                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4017                                 /* retry the login again */
4018                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
4019                                     "Retrying %d login again loop_id 0x%x.\n",
4020                                     fcport->login_retry, fcport->loop_id);
4021                         } else {
4022                                 fcport->login_retry = 0;
4023                         }
4024
4025                         if (fcport->login_retry == 0 && status != QLA_SUCCESS)
4026                                 qla2x00_clear_loop_id(fcport);
4027                 }
4028                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
4029                         break;
4030         }
4031 }
4032
4033 /* Schedule work on any of the dpc-workqueues */
4034 void
4035 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
4036 {
4037         struct qla_hw_data *ha = base_vha->hw;
4038
4039         switch (work_code) {
4040         case MBA_IDC_AEN: /* 0x8200 */
4041                 if (ha->dpc_lp_wq)
4042                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
4043                 break;
4044
4045         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
4046                 if (!ha->flags.nic_core_reset_hdlr_active) {
4047                         if (ha->dpc_hp_wq)
4048                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
4049                 } else
4050                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
4051                             "NIC Core reset is already active. Skip "
4052                             "scheduling it again.\n");
4053                 break;
4054         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
4055                 if (ha->dpc_hp_wq)
4056                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
4057                 break;
4058         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
4059                 if (ha->dpc_hp_wq)
4060                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
4061                 break;
4062         default:
4063                 ql_log(ql_log_warn, base_vha, 0xb05f,
4064                     "Unknow work-code=0x%x.\n", work_code);
4065         }
4066
4067         return;
4068 }
4069
4070 /* Work: Perform NIC Core Unrecoverable state handling */
4071 void
4072 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
4073 {
4074         struct qla_hw_data *ha =
4075                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
4076         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4077         uint32_t dev_state = 0;
4078
4079         qla83xx_idc_lock(base_vha, 0);
4080         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4081         qla83xx_reset_ownership(base_vha);
4082         if (ha->flags.nic_core_reset_owner) {
4083                 ha->flags.nic_core_reset_owner = 0;
4084                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4085                     QLA8XXX_DEV_FAILED);
4086                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
4087                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4088         }
4089         qla83xx_idc_unlock(base_vha, 0);
4090 }
4091
4092 /* Work: Execute IDC state handler */
4093 void
4094 qla83xx_idc_state_handler_work(struct work_struct *work)
4095 {
4096         struct qla_hw_data *ha =
4097                 container_of(work, struct qla_hw_data, idc_state_handler);
4098         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4099         uint32_t dev_state = 0;
4100
4101         qla83xx_idc_lock(base_vha, 0);
4102         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4103         if (dev_state == QLA8XXX_DEV_FAILED ||
4104                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
4105                 qla83xx_idc_state_handler(base_vha);
4106         qla83xx_idc_unlock(base_vha, 0);
4107 }
4108
4109 static int
4110 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
4111 {
4112         int rval = QLA_SUCCESS;
4113         unsigned long heart_beat_wait = jiffies + (1 * HZ);
4114         uint32_t heart_beat_counter1, heart_beat_counter2;
4115
4116         do {
4117                 if (time_after(jiffies, heart_beat_wait)) {
4118                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
4119                             "Nic Core f/w is not alive.\n");
4120                         rval = QLA_FUNCTION_FAILED;
4121                         break;
4122                 }
4123
4124                 qla83xx_idc_lock(base_vha, 0);
4125                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4126                     &heart_beat_counter1);
4127                 qla83xx_idc_unlock(base_vha, 0);
4128                 msleep(100);
4129                 qla83xx_idc_lock(base_vha, 0);
4130                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4131                     &heart_beat_counter2);
4132                 qla83xx_idc_unlock(base_vha, 0);
4133         } while (heart_beat_counter1 == heart_beat_counter2);
4134
4135         return rval;
4136 }
4137
4138 /* Work: Perform NIC Core Reset handling */
4139 void
4140 qla83xx_nic_core_reset_work(struct work_struct *work)
4141 {
4142         struct qla_hw_data *ha =
4143                 container_of(work, struct qla_hw_data, nic_core_reset);
4144         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4145         uint32_t dev_state = 0;
4146
4147         if (IS_QLA2031(ha)) {
4148                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
4149                         ql_log(ql_log_warn, base_vha, 0xb081,
4150                             "Failed to dump mctp\n");
4151                 return;
4152         }
4153
4154         if (!ha->flags.nic_core_reset_hdlr_active) {
4155                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
4156                         qla83xx_idc_lock(base_vha, 0);
4157                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4158                             &dev_state);
4159                         qla83xx_idc_unlock(base_vha, 0);
4160                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
4161                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
4162                                     "Nic Core f/w is alive.\n");
4163                                 return;
4164                         }
4165                 }
4166
4167                 ha->flags.nic_core_reset_hdlr_active = 1;
4168                 if (qla83xx_nic_core_reset(base_vha)) {
4169                         /* NIC Core reset failed. */
4170                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
4171                             "NIC Core reset failed.\n");
4172                 }
4173                 ha->flags.nic_core_reset_hdlr_active = 0;
4174         }
4175 }
4176
4177 /* Work: Handle 8200 IDC aens */
4178 void
4179 qla83xx_service_idc_aen(struct work_struct *work)
4180 {
4181         struct qla_hw_data *ha =
4182                 container_of(work, struct qla_hw_data, idc_aen);
4183         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4184         uint32_t dev_state, idc_control;
4185
4186         qla83xx_idc_lock(base_vha, 0);
4187         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4188         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
4189         qla83xx_idc_unlock(base_vha, 0);
4190         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
4191                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
4192                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
4193                             "Application requested NIC Core Reset.\n");
4194                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4195                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
4196                     QLA_SUCCESS) {
4197                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
4198                             "Other protocol driver requested NIC Core Reset.\n");
4199                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4200                 }
4201         } else if (dev_state == QLA8XXX_DEV_FAILED ||
4202                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
4203                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4204         }
4205 }
4206
4207 static void
4208 qla83xx_wait_logic(void)
4209 {
4210         int i;
4211
4212         /* Yield CPU */
4213         if (!in_interrupt()) {
4214                 /*
4215                  * Wait about 200ms before retrying again.
4216                  * This controls the number of retries for single
4217                  * lock operation.
4218                  */
4219                 msleep(100);
4220                 schedule();
4221         } else {
4222                 for (i = 0; i < 20; i++)
4223                         cpu_relax(); /* This a nop instr on i386 */
4224         }
4225 }
4226
4227 static int
4228 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
4229 {
4230         int rval;
4231         uint32_t data;
4232         uint32_t idc_lck_rcvry_stage_mask = 0x3;
4233         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
4234         struct qla_hw_data *ha = base_vha->hw;
4235         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
4236             "Trying force recovery of the IDC lock.\n");
4237
4238         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
4239         if (rval)
4240                 return rval;
4241
4242         if ((data & idc_lck_rcvry_stage_mask) > 0) {
4243                 return QLA_SUCCESS;
4244         } else {
4245                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
4246                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4247                     data);
4248                 if (rval)
4249                         return rval;
4250
4251                 msleep(200);
4252
4253                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4254                     &data);
4255                 if (rval)
4256                         return rval;
4257
4258                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
4259                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
4260                                         ~(idc_lck_rcvry_stage_mask));
4261                         rval = qla83xx_wr_reg(base_vha,
4262                             QLA83XX_IDC_LOCK_RECOVERY, data);
4263                         if (rval)
4264                                 return rval;
4265
4266                         /* Forcefully perform IDC UnLock */
4267                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
4268                             &data);
4269                         if (rval)
4270                                 return rval;
4271                         /* Clear lock-id by setting 0xff */
4272                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4273                             0xff);
4274                         if (rval)
4275                                 return rval;
4276                         /* Clear lock-recovery by setting 0x0 */
4277                         rval = qla83xx_wr_reg(base_vha,
4278                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
4279                         if (rval)
4280                                 return rval;
4281                 } else
4282                         return QLA_SUCCESS;
4283         }
4284
4285         return rval;
4286 }
4287
4288 static int
4289 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
4290 {
4291         int rval = QLA_SUCCESS;
4292         uint32_t o_drv_lockid, n_drv_lockid;
4293         unsigned long lock_recovery_timeout;
4294
4295         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
4296 retry_lockid:
4297         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
4298         if (rval)
4299                 goto exit;
4300
4301         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
4302         if (time_after_eq(jiffies, lock_recovery_timeout)) {
4303                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
4304                         return QLA_SUCCESS;
4305                 else
4306                         return QLA_FUNCTION_FAILED;
4307         }
4308
4309         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
4310         if (rval)
4311                 goto exit;
4312
4313         if (o_drv_lockid == n_drv_lockid) {
4314                 qla83xx_wait_logic();
4315                 goto retry_lockid;
4316         } else
4317                 return QLA_SUCCESS;
4318
4319 exit:
4320         return rval;
4321 }
4322
4323 void
4324 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4325 {
4326         uint16_t options = (requester_id << 15) | BIT_6;
4327         uint32_t data;
4328         uint32_t lock_owner;
4329         struct qla_hw_data *ha = base_vha->hw;
4330
4331         /* IDC-lock implementation using driver-lock/lock-id remote registers */
4332 retry_lock:
4333         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
4334             == QLA_SUCCESS) {
4335                 if (data) {
4336                         /* Setting lock-id to our function-number */
4337                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4338                             ha->portnum);
4339                 } else {
4340                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4341                             &lock_owner);
4342                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
4343                             "Failed to acquire IDC lock, acquired by %d, "
4344                             "retrying...\n", lock_owner);
4345
4346                         /* Retry/Perform IDC-Lock recovery */
4347                         if (qla83xx_idc_lock_recovery(base_vha)
4348                             == QLA_SUCCESS) {
4349                                 qla83xx_wait_logic();
4350                                 goto retry_lock;
4351                         } else
4352                                 ql_log(ql_log_warn, base_vha, 0xb075,
4353                                     "IDC Lock recovery FAILED.\n");
4354                 }
4355
4356         }
4357
4358         return;
4359
4360         /* XXX: IDC-lock implementation using access-control mbx */
4361 retry_lock2:
4362         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4363                 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
4364                     "Failed to acquire IDC lock. retrying...\n");
4365                 /* Retry/Perform IDC-Lock recovery */
4366                 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
4367                         qla83xx_wait_logic();
4368                         goto retry_lock2;
4369                 } else
4370                         ql_log(ql_log_warn, base_vha, 0xb076,
4371                             "IDC Lock recovery FAILED.\n");
4372         }
4373
4374         return;
4375 }
4376
4377 void
4378 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4379 {
4380         uint16_t options = (requester_id << 15) | BIT_7, retry;
4381         uint32_t data;
4382         struct qla_hw_data *ha = base_vha->hw;
4383
4384         /* IDC-unlock implementation using driver-unlock/lock-id
4385          * remote registers
4386          */
4387         retry = 0;
4388 retry_unlock:
4389         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
4390             == QLA_SUCCESS) {
4391                 if (data == ha->portnum) {
4392                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
4393                         /* Clearing lock-id by setting 0xff */
4394                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
4395                 } else if (retry < 10) {
4396                         /* SV: XXX: IDC unlock retrying needed here? */
4397
4398                         /* Retry for IDC-unlock */
4399                         qla83xx_wait_logic();
4400                         retry++;
4401                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
4402                             "Failed to release IDC lock, retyring=%d\n", retry);
4403                         goto retry_unlock;
4404                 }
4405         } else if (retry < 10) {
4406                 /* Retry for IDC-unlock */
4407                 qla83xx_wait_logic();
4408                 retry++;
4409                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
4410                     "Failed to read drv-lockid, retyring=%d\n", retry);
4411                 goto retry_unlock;
4412         }
4413
4414         return;
4415
4416         /* XXX: IDC-unlock implementation using access-control mbx */
4417         retry = 0;
4418 retry_unlock2:
4419         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4420                 if (retry < 10) {
4421                         /* Retry for IDC-unlock */
4422                         qla83xx_wait_logic();
4423                         retry++;
4424                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
4425                             "Failed to release IDC lock, retyring=%d\n", retry);
4426                         goto retry_unlock2;
4427                 }
4428         }
4429
4430         return;
4431 }
4432
4433 int
4434 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4435 {
4436         int rval = QLA_SUCCESS;
4437         struct qla_hw_data *ha = vha->hw;
4438         uint32_t drv_presence;
4439
4440         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4441         if (rval == QLA_SUCCESS) {
4442                 drv_presence |= (1 << ha->portnum);
4443                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4444                     drv_presence);
4445         }
4446
4447         return rval;
4448 }
4449
4450 int
4451 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4452 {
4453         int rval = QLA_SUCCESS;
4454
4455         qla83xx_idc_lock(vha, 0);
4456         rval = __qla83xx_set_drv_presence(vha);
4457         qla83xx_idc_unlock(vha, 0);
4458
4459         return rval;
4460 }
4461
4462 int
4463 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4464 {
4465         int rval = QLA_SUCCESS;
4466         struct qla_hw_data *ha = vha->hw;
4467         uint32_t drv_presence;
4468
4469         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4470         if (rval == QLA_SUCCESS) {
4471                 drv_presence &= ~(1 << ha->portnum);
4472                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4473                     drv_presence);
4474         }
4475
4476         return rval;
4477 }
4478
4479 int
4480 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4481 {
4482         int rval = QLA_SUCCESS;
4483
4484         qla83xx_idc_lock(vha, 0);
4485         rval = __qla83xx_clear_drv_presence(vha);
4486         qla83xx_idc_unlock(vha, 0);
4487
4488         return rval;
4489 }
4490
4491 static void
4492 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
4493 {
4494         struct qla_hw_data *ha = vha->hw;
4495         uint32_t drv_ack, drv_presence;
4496         unsigned long ack_timeout;
4497
4498         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
4499         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
4500         while (1) {
4501                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
4502                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4503                 if ((drv_ack & drv_presence) == drv_presence)
4504                         break;
4505
4506                 if (time_after_eq(jiffies, ack_timeout)) {
4507                         ql_log(ql_log_warn, vha, 0xb067,
4508                             "RESET ACK TIMEOUT! drv_presence=0x%x "
4509                             "drv_ack=0x%x\n", drv_presence, drv_ack);
4510                         /*
4511                          * The function(s) which did not ack in time are forced
4512                          * to withdraw any further participation in the IDC
4513                          * reset.
4514                          */
4515                         if (drv_ack != drv_presence)
4516                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4517                                     drv_ack);
4518                         break;
4519                 }
4520
4521                 qla83xx_idc_unlock(vha, 0);
4522                 msleep(1000);
4523                 qla83xx_idc_lock(vha, 0);
4524         }
4525
4526         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
4527         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
4528 }
4529
4530 static int
4531 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
4532 {
4533         int rval = QLA_SUCCESS;
4534         uint32_t idc_control;
4535
4536         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
4537         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
4538
4539         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
4540         __qla83xx_get_idc_control(vha, &idc_control);
4541         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
4542         __qla83xx_set_idc_control(vha, 0);
4543
4544         qla83xx_idc_unlock(vha, 0);
4545         rval = qla83xx_restart_nic_firmware(vha);
4546         qla83xx_idc_lock(vha, 0);
4547
4548         if (rval != QLA_SUCCESS) {
4549                 ql_log(ql_log_fatal, vha, 0xb06a,
4550                     "Failed to restart NIC f/w.\n");
4551                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
4552                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
4553         } else {
4554                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
4555                     "Success in restarting nic f/w.\n");
4556                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
4557                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
4558         }
4559
4560         return rval;
4561 }
4562
4563 /* Assumes idc_lock always held on entry */
4564 int
4565 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
4566 {
4567         struct qla_hw_data *ha = base_vha->hw;
4568         int rval = QLA_SUCCESS;
4569         unsigned long dev_init_timeout;
4570         uint32_t dev_state;
4571
4572         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
4573         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
4574
4575         while (1) {
4576
4577                 if (time_after_eq(jiffies, dev_init_timeout)) {
4578                         ql_log(ql_log_warn, base_vha, 0xb06e,
4579                             "Initialization TIMEOUT!\n");
4580                         /* Init timeout. Disable further NIC Core
4581                          * communication.
4582                          */
4583                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4584                                 QLA8XXX_DEV_FAILED);
4585                         ql_log(ql_log_info, base_vha, 0xb06f,
4586                             "HW State: FAILED.\n");
4587                 }
4588
4589                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4590                 switch (dev_state) {
4591                 case QLA8XXX_DEV_READY:
4592                         if (ha->flags.nic_core_reset_owner)
4593                                 qla83xx_idc_audit(base_vha,
4594                                     IDC_AUDIT_COMPLETION);
4595                         ha->flags.nic_core_reset_owner = 0;
4596                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
4597                             "Reset_owner reset by 0x%x.\n",
4598                             ha->portnum);
4599                         goto exit;
4600                 case QLA8XXX_DEV_COLD:
4601                         if (ha->flags.nic_core_reset_owner)
4602                                 rval = qla83xx_device_bootstrap(base_vha);
4603                         else {
4604                         /* Wait for AEN to change device-state */
4605                                 qla83xx_idc_unlock(base_vha, 0);
4606                                 msleep(1000);
4607                                 qla83xx_idc_lock(base_vha, 0);
4608                         }
4609                         break;
4610                 case QLA8XXX_DEV_INITIALIZING:
4611                         /* Wait for AEN to change device-state */
4612                         qla83xx_idc_unlock(base_vha, 0);
4613                         msleep(1000);
4614                         qla83xx_idc_lock(base_vha, 0);
4615                         break;
4616                 case QLA8XXX_DEV_NEED_RESET:
4617                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
4618                                 qla83xx_need_reset_handler(base_vha);
4619                         else {
4620                                 /* Wait for AEN to change device-state */
4621                                 qla83xx_idc_unlock(base_vha, 0);
4622                                 msleep(1000);
4623                                 qla83xx_idc_lock(base_vha, 0);
4624                         }
4625                         /* reset timeout value after need reset handler */
4626                         dev_init_timeout = jiffies +
4627                             (ha->fcoe_dev_init_timeout * HZ);
4628                         break;
4629                 case QLA8XXX_DEV_NEED_QUIESCENT:
4630                         /* XXX: DEBUG for now */
4631                         qla83xx_idc_unlock(base_vha, 0);
4632                         msleep(1000);
4633                         qla83xx_idc_lock(base_vha, 0);
4634                         break;
4635                 case QLA8XXX_DEV_QUIESCENT:
4636                         /* XXX: DEBUG for now */
4637                         if (ha->flags.quiesce_owner)
4638                                 goto exit;
4639
4640                         qla83xx_idc_unlock(base_vha, 0);
4641                         msleep(1000);
4642                         qla83xx_idc_lock(base_vha, 0);
4643                         dev_init_timeout = jiffies +
4644                             (ha->fcoe_dev_init_timeout * HZ);
4645                         break;
4646                 case QLA8XXX_DEV_FAILED:
4647                         if (ha->flags.nic_core_reset_owner)
4648                                 qla83xx_idc_audit(base_vha,
4649                                     IDC_AUDIT_COMPLETION);
4650                         ha->flags.nic_core_reset_owner = 0;
4651                         __qla83xx_clear_drv_presence(base_vha);
4652                         qla83xx_idc_unlock(base_vha, 0);
4653                         qla8xxx_dev_failed_handler(base_vha);
4654                         rval = QLA_FUNCTION_FAILED;
4655                         qla83xx_idc_lock(base_vha, 0);
4656                         goto exit;
4657                 case QLA8XXX_BAD_VALUE:
4658                         qla83xx_idc_unlock(base_vha, 0);
4659                         msleep(1000);
4660                         qla83xx_idc_lock(base_vha, 0);
4661                         break;
4662                 default:
4663                         ql_log(ql_log_warn, base_vha, 0xb071,
4664                             "Unknow Device State: %x.\n", dev_state);
4665                         qla83xx_idc_unlock(base_vha, 0);
4666                         qla8xxx_dev_failed_handler(base_vha);
4667                         rval = QLA_FUNCTION_FAILED;
4668                         qla83xx_idc_lock(base_vha, 0);
4669                         goto exit;
4670                 }
4671         }
4672
4673 exit:
4674         return rval;
4675 }
4676
4677 void
4678 qla2x00_disable_board_on_pci_error(struct work_struct *work)
4679 {
4680         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
4681             board_disable);
4682         struct pci_dev *pdev = ha->pdev;
4683         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4684
4685         ql_log(ql_log_warn, base_vha, 0x015b,
4686             "Disabling adapter.\n");
4687
4688         set_bit(UNLOADING, &base_vha->dpc_flags);
4689
4690         qla2x00_delete_all_vps(ha, base_vha);
4691
4692         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
4693
4694         qla2x00_dfs_remove(base_vha);
4695
4696         qla84xx_put_chip(base_vha);
4697
4698         if (base_vha->timer_active)
4699                 qla2x00_stop_timer(base_vha);
4700
4701         base_vha->flags.online = 0;
4702
4703         qla2x00_destroy_deferred_work(ha);
4704
4705         /*
4706          * Do not try to stop beacon blink as it will issue a mailbox
4707          * command.
4708          */
4709         qla2x00_free_sysfs_attr(base_vha, false);
4710
4711         fc_remove_host(base_vha->host);
4712
4713         scsi_remove_host(base_vha->host);
4714
4715         base_vha->flags.init_done = 0;
4716         qla25xx_delete_queues(base_vha);
4717         qla2x00_free_irqs(base_vha);
4718         qla2x00_free_fcports(base_vha);
4719         qla2x00_mem_free(ha);
4720         qla82xx_md_free(base_vha);
4721         qla2x00_free_queues(ha);
4722
4723         scsi_host_put(base_vha->host);
4724
4725         qla2x00_unmap_iobases(ha);
4726
4727         pci_release_selected_regions(ha->pdev, ha->bars);
4728         kfree(ha);
4729         ha = NULL;
4730
4731         pci_disable_pcie_error_reporting(pdev);
4732         pci_disable_device(pdev);
4733         pci_set_drvdata(pdev, NULL);
4734
4735 }
4736
4737 /**************************************************************************
4738 * qla2x00_do_dpc
4739 *   This kernel thread is a task that is schedule by the interrupt handler
4740 *   to perform the background processing for interrupts.
4741 *
4742 * Notes:
4743 * This task always run in the context of a kernel thread.  It
4744 * is kick-off by the driver's detect code and starts up
4745 * up one per adapter. It immediately goes to sleep and waits for
4746 * some fibre event.  When either the interrupt handler or
4747 * the timer routine detects a event it will one of the task
4748 * bits then wake us up.
4749 **************************************************************************/
4750 static int
4751 qla2x00_do_dpc(void *data)
4752 {
4753         int             rval;
4754         scsi_qla_host_t *base_vha;
4755         struct qla_hw_data *ha;
4756
4757         ha = (struct qla_hw_data *)data;
4758         base_vha = pci_get_drvdata(ha->pdev);
4759
4760         set_user_nice(current, -20);
4761
4762         set_current_state(TASK_INTERRUPTIBLE);
4763         while (!kthread_should_stop()) {
4764                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
4765                     "DPC handler sleeping.\n");
4766
4767                 schedule();
4768                 __set_current_state(TASK_RUNNING);
4769
4770                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
4771                         goto end_loop;
4772
4773                 if (ha->flags.eeh_busy) {
4774                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
4775                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
4776                         goto end_loop;
4777                 }
4778
4779                 ha->dpc_active = 1;
4780
4781                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
4782                     "DPC handler waking up, dpc_flags=0x%lx.\n",
4783                     base_vha->dpc_flags);
4784
4785                 qla2x00_do_work(base_vha);
4786
4787                 if (IS_P3P_TYPE(ha)) {
4788                         if (IS_QLA8044(ha)) {
4789                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
4790                                         &base_vha->dpc_flags)) {
4791                                         qla8044_idc_lock(ha);
4792                                         qla8044_wr_direct(base_vha,
4793                                                 QLA8044_CRB_DEV_STATE_INDEX,
4794                                                 QLA8XXX_DEV_FAILED);
4795                                         qla8044_idc_unlock(ha);
4796                                         ql_log(ql_log_info, base_vha, 0x4004,
4797                                                 "HW State: FAILED.\n");
4798                                         qla8044_device_state_handler(base_vha);
4799                                         continue;
4800                                 }
4801
4802                         } else {
4803                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
4804                                         &base_vha->dpc_flags)) {
4805                                         qla82xx_idc_lock(ha);
4806                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
4807                                                 QLA8XXX_DEV_FAILED);
4808                                         qla82xx_idc_unlock(ha);
4809                                         ql_log(ql_log_info, base_vha, 0x0151,
4810                                                 "HW State: FAILED.\n");
4811                                         qla82xx_device_state_handler(base_vha);
4812                                         continue;
4813                                 }
4814                         }
4815
4816                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
4817                                 &base_vha->dpc_flags)) {
4818
4819                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
4820                                     "FCoE context reset scheduled.\n");
4821                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4822                                         &base_vha->dpc_flags))) {
4823                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
4824                                                 /* FCoE-ctx reset failed.
4825                                                  * Escalate to chip-reset
4826                                                  */
4827                                                 set_bit(ISP_ABORT_NEEDED,
4828                                                         &base_vha->dpc_flags);
4829                                         }
4830                                         clear_bit(ABORT_ISP_ACTIVE,
4831                                                 &base_vha->dpc_flags);
4832                                 }
4833
4834                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
4835                                     "FCoE context reset end.\n");
4836                         }
4837                 } else if (IS_QLAFX00(ha)) {
4838                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
4839                                 &base_vha->dpc_flags)) {
4840                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
4841                                     "Firmware Reset Recovery\n");
4842                                 if (qlafx00_reset_initialize(base_vha)) {
4843                                         /* Failed. Abort isp later. */
4844                                         if (!test_bit(UNLOADING,
4845                                             &base_vha->dpc_flags))
4846                                                 set_bit(ISP_UNRECOVERABLE,
4847                                                     &base_vha->dpc_flags);
4848                                                 ql_dbg(ql_dbg_dpc, base_vha,
4849                                                     0x4021,
4850                                                     "Reset Recovery Failed\n");
4851                                 }
4852                         }
4853
4854                         if (test_and_clear_bit(FX00_TARGET_SCAN,
4855                                 &base_vha->dpc_flags)) {
4856                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
4857                                     "ISPFx00 Target Scan scheduled\n");
4858                                 if (qlafx00_rescan_isp(base_vha)) {
4859                                         if (!test_bit(UNLOADING,
4860                                             &base_vha->dpc_flags))
4861                                                 set_bit(ISP_UNRECOVERABLE,
4862                                                     &base_vha->dpc_flags);
4863                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
4864                                             "ISPFx00 Target Scan Failed\n");
4865                                 }
4866                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
4867                                     "ISPFx00 Target Scan End\n");
4868                         }
4869                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
4870                                 &base_vha->dpc_flags)) {
4871                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
4872                                     "ISPFx00 Host Info resend scheduled\n");
4873                                 qlafx00_fx_disc(base_vha,
4874                                     &base_vha->hw->mr.fcport,
4875                                     FXDISC_REG_HOST_INFO);
4876                         }
4877                 }
4878
4879                 if (test_and_clear_bit(ISP_ABORT_NEEDED,
4880                                                 &base_vha->dpc_flags)) {
4881
4882                         ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
4883                             "ISP abort scheduled.\n");
4884                         if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4885                             &base_vha->dpc_flags))) {
4886
4887                                 if (ha->isp_ops->abort_isp(base_vha)) {
4888                                         /* failed. retry later */
4889                                         set_bit(ISP_ABORT_NEEDED,
4890                                             &base_vha->dpc_flags);
4891                                 }
4892                                 clear_bit(ABORT_ISP_ACTIVE,
4893                                                 &base_vha->dpc_flags);
4894                         }
4895
4896                         ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
4897                             "ISP abort end.\n");
4898                 }
4899
4900                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
4901                     &base_vha->dpc_flags)) {
4902                         qla2x00_update_fcports(base_vha);
4903                 }
4904
4905                 if (test_bit(SCR_PENDING, &base_vha->dpc_flags)) {
4906                         int ret;
4907                         ret = qla2x00_send_change_request(base_vha, 0x3, 0);
4908                         if (ret != QLA_SUCCESS)
4909                                 ql_log(ql_log_warn, base_vha, 0x121,
4910                                     "Failed to enable receiving of RSCN "
4911                                     "requests: 0x%x.\n", ret);
4912                         clear_bit(SCR_PENDING, &base_vha->dpc_flags);
4913                 }
4914
4915                 if (IS_QLAFX00(ha))
4916                         goto loop_resync_check;
4917
4918                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
4919                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
4920                             "Quiescence mode scheduled.\n");
4921                         if (IS_P3P_TYPE(ha)) {
4922                                 if (IS_QLA82XX(ha))
4923                                         qla82xx_device_state_handler(base_vha);
4924                                 if (IS_QLA8044(ha))
4925                                         qla8044_device_state_handler(base_vha);
4926                                 clear_bit(ISP_QUIESCE_NEEDED,
4927                                     &base_vha->dpc_flags);
4928                                 if (!ha->flags.quiesce_owner) {
4929                                         qla2x00_perform_loop_resync(base_vha);
4930                                         if (IS_QLA82XX(ha)) {
4931                                                 qla82xx_idc_lock(ha);
4932                                                 qla82xx_clear_qsnt_ready(
4933                                                     base_vha);
4934                                                 qla82xx_idc_unlock(ha);
4935                                         } else if (IS_QLA8044(ha)) {
4936                                                 qla8044_idc_lock(ha);
4937                                                 qla8044_clear_qsnt_ready(
4938                                                     base_vha);
4939                                                 qla8044_idc_unlock(ha);
4940                                         }
4941                                 }
4942                         } else {
4943                                 clear_bit(ISP_QUIESCE_NEEDED,
4944                                     &base_vha->dpc_flags);
4945                                 qla2x00_quiesce_io(base_vha);
4946                         }
4947                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
4948                             "Quiescence mode end.\n");
4949                 }
4950
4951                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
4952                                 &base_vha->dpc_flags) &&
4953                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
4954
4955                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
4956                             "Reset marker scheduled.\n");
4957                         qla2x00_rst_aen(base_vha);
4958                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
4959                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
4960                             "Reset marker end.\n");
4961                 }
4962
4963                 /* Retry each device up to login retry count */
4964                 if ((test_and_clear_bit(RELOGIN_NEEDED,
4965                                                 &base_vha->dpc_flags)) &&
4966                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
4967                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
4968
4969                         ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
4970                             "Relogin scheduled.\n");
4971                         qla2x00_relogin(base_vha);
4972                         ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
4973                             "Relogin end.\n");
4974                 }
4975 loop_resync_check:
4976                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
4977                     &base_vha->dpc_flags)) {
4978
4979                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
4980                             "Loop resync scheduled.\n");
4981
4982                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
4983                             &base_vha->dpc_flags))) {
4984
4985                                 rval = qla2x00_loop_resync(base_vha);
4986
4987                                 clear_bit(LOOP_RESYNC_ACTIVE,
4988                                                 &base_vha->dpc_flags);
4989                         }
4990
4991                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
4992                             "Loop resync end.\n");
4993                 }
4994
4995                 if (IS_QLAFX00(ha))
4996                         goto intr_on_check;
4997
4998                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
4999                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
5000                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
5001                         qla2xxx_flash_npiv_conf(base_vha);
5002                 }
5003
5004 intr_on_check:
5005                 if (!ha->interrupts_on)
5006                         ha->isp_ops->enable_intrs(ha);
5007
5008                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
5009                                         &base_vha->dpc_flags))
5010                         ha->isp_ops->beacon_blink(base_vha);
5011
5012                 if (!IS_QLAFX00(ha))
5013                         qla2x00_do_dpc_all_vps(base_vha);
5014
5015                 ha->dpc_active = 0;
5016 end_loop:
5017                 set_current_state(TASK_INTERRUPTIBLE);
5018         } /* End of while(1) */
5019         __set_current_state(TASK_RUNNING);
5020
5021         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
5022             "DPC handler exiting.\n");
5023
5024         /*
5025          * Make sure that nobody tries to wake us up again.
5026          */
5027         ha->dpc_active = 0;
5028
5029         /* Cleanup any residual CTX SRBs. */
5030         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5031
5032         return 0;
5033 }
5034
5035 void
5036 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
5037 {
5038         struct qla_hw_data *ha = vha->hw;
5039         struct task_struct *t = ha->dpc_thread;
5040
5041         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
5042                 wake_up_process(t);
5043 }
5044
5045 /*
5046 *  qla2x00_rst_aen
5047 *      Processes asynchronous reset.
5048 *
5049 * Input:
5050 *      ha  = adapter block pointer.
5051 */
5052 static void
5053 qla2x00_rst_aen(scsi_qla_host_t *vha)
5054 {
5055         if (vha->flags.online && !vha->flags.reset_active &&
5056             !atomic_read(&vha->loop_down_timer) &&
5057             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
5058                 do {
5059                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5060
5061                         /*
5062                          * Issue marker command only when we are going to start
5063                          * the I/O.
5064                          */
5065                         vha->marker_needed = 1;
5066                 } while (!atomic_read(&vha->loop_down_timer) &&
5067                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
5068         }
5069 }
5070
5071 /**************************************************************************
5072 *   qla2x00_timer
5073 *
5074 * Description:
5075 *   One second timer
5076 *
5077 * Context: Interrupt
5078 ***************************************************************************/
5079 void
5080 qla2x00_timer(scsi_qla_host_t *vha)
5081 {
5082         unsigned long   cpu_flags = 0;
5083         int             start_dpc = 0;
5084         int             index;
5085         srb_t           *sp;
5086         uint16_t        w;
5087         struct qla_hw_data *ha = vha->hw;
5088         struct req_que *req;
5089
5090         if (ha->flags.eeh_busy) {
5091                 ql_dbg(ql_dbg_timer, vha, 0x6000,
5092                     "EEH = %d, restarting timer.\n",
5093                     ha->flags.eeh_busy);
5094                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
5095                 return;
5096         }
5097
5098         /*
5099          * Hardware read to raise pending EEH errors during mailbox waits. If
5100          * the read returns -1 then disable the board.
5101          */
5102         if (!pci_channel_offline(ha->pdev)) {
5103                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
5104                 if (w == 0xffff)
5105                         /*
5106                          * Schedule this on the default system workqueue so that
5107                          * all the adapter workqueues and the DPC thread can be
5108                          * shutdown cleanly.
5109                          */
5110                         schedule_work(&ha->board_disable);
5111         }
5112
5113         /* Make sure qla82xx_watchdog is run only for physical port */
5114         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
5115                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
5116                         start_dpc++;
5117                 if (IS_QLA82XX(ha))
5118                         qla82xx_watchdog(vha);
5119                 else if (IS_QLA8044(ha))
5120                         qla8044_watchdog(vha);
5121         }
5122
5123         if (!vha->vp_idx && IS_QLAFX00(ha))
5124                 qlafx00_timer_routine(vha);
5125
5126         /* Loop down handler. */
5127         if (atomic_read(&vha->loop_down_timer) > 0 &&
5128             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
5129             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
5130                 && vha->flags.online) {
5131
5132                 if (atomic_read(&vha->loop_down_timer) ==
5133                     vha->loop_down_abort_time) {
5134
5135                         ql_log(ql_log_info, vha, 0x6008,
5136                             "Loop down - aborting the queues before time expires.\n");
5137
5138                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
5139                                 atomic_set(&vha->loop_state, LOOP_DEAD);
5140
5141                         /*
5142                          * Schedule an ISP abort to return any FCP2-device
5143                          * commands.
5144                          */
5145                         /* NPIV - scan physical port only */
5146                         if (!vha->vp_idx) {
5147                                 spin_lock_irqsave(&ha->hardware_lock,
5148                                     cpu_flags);
5149                                 req = ha->req_q_map[0];
5150                                 for (index = 1;
5151                                     index < req->num_outstanding_cmds;
5152                                     index++) {
5153                                         fc_port_t *sfcp;
5154
5155                                         sp = req->outstanding_cmds[index];
5156                                         if (!sp)
5157                                                 continue;
5158                                         if (sp->type != SRB_SCSI_CMD)
5159                                                 continue;
5160                                         sfcp = sp->fcport;
5161                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
5162                                                 continue;
5163
5164                                         if (IS_QLA82XX(ha))
5165                                                 set_bit(FCOE_CTX_RESET_NEEDED,
5166                                                         &vha->dpc_flags);
5167                                         else
5168                                                 set_bit(ISP_ABORT_NEEDED,
5169                                                         &vha->dpc_flags);
5170                                         break;
5171                                 }
5172                                 spin_unlock_irqrestore(&ha->hardware_lock,
5173                                                                 cpu_flags);
5174                         }
5175                         start_dpc++;
5176                 }
5177
5178                 /* if the loop has been down for 4 minutes, reinit adapter */
5179                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
5180                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
5181                                 ql_log(ql_log_warn, vha, 0x6009,
5182                                     "Loop down - aborting ISP.\n");
5183
5184                                 if (IS_QLA82XX(ha))
5185                                         set_bit(FCOE_CTX_RESET_NEEDED,
5186                                                 &vha->dpc_flags);
5187                                 else
5188                                         set_bit(ISP_ABORT_NEEDED,
5189                                                 &vha->dpc_flags);
5190                         }
5191                 }
5192                 ql_dbg(ql_dbg_timer, vha, 0x600a,
5193                     "Loop down - seconds remaining %d.\n",
5194                     atomic_read(&vha->loop_down_timer));
5195         }
5196         /* Check if beacon LED needs to be blinked for physical host only */
5197         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
5198                 /* There is no beacon_blink function for ISP82xx */
5199                 if (!IS_P3P_TYPE(ha)) {
5200                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
5201                         start_dpc++;
5202                 }
5203         }
5204
5205         /* Process any deferred work. */
5206         if (!list_empty(&vha->work_list))
5207                 start_dpc++;
5208
5209         /* Schedule the DPC routine if needed */
5210         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
5211             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
5212             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
5213             start_dpc ||
5214             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
5215             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
5216             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
5217             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
5218             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
5219             test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
5220                 ql_dbg(ql_dbg_timer, vha, 0x600b,
5221                     "isp_abort_needed=%d loop_resync_needed=%d "
5222                     "fcport_update_needed=%d start_dpc=%d "
5223                     "reset_marker_needed=%d",
5224                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
5225                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
5226                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
5227                     start_dpc,
5228                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
5229                 ql_dbg(ql_dbg_timer, vha, 0x600c,
5230                     "beacon_blink_needed=%d isp_unrecoverable=%d "
5231                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
5232                     "relogin_needed=%d.\n",
5233                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
5234                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
5235                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
5236                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
5237                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
5238                 qla2xxx_wake_dpc(vha);
5239         }
5240
5241         qla2x00_restart_timer(vha, WATCH_INTERVAL);
5242 }
5243
5244 /* Firmware interface routines. */
5245
5246 #define FW_BLOBS        10
5247 #define FW_ISP21XX      0
5248 #define FW_ISP22XX      1
5249 #define FW_ISP2300      2
5250 #define FW_ISP2322      3
5251 #define FW_ISP24XX      4
5252 #define FW_ISP25XX      5
5253 #define FW_ISP81XX      6
5254 #define FW_ISP82XX      7
5255 #define FW_ISP2031      8
5256 #define FW_ISP8031      9
5257
5258 #define FW_FILE_ISP21XX "ql2100_fw.bin"
5259 #define FW_FILE_ISP22XX "ql2200_fw.bin"
5260 #define FW_FILE_ISP2300 "ql2300_fw.bin"
5261 #define FW_FILE_ISP2322 "ql2322_fw.bin"
5262 #define FW_FILE_ISP24XX "ql2400_fw.bin"
5263 #define FW_FILE_ISP25XX "ql2500_fw.bin"
5264 #define FW_FILE_ISP81XX "ql8100_fw.bin"
5265 #define FW_FILE_ISP82XX "ql8200_fw.bin"
5266 #define FW_FILE_ISP2031 "ql2600_fw.bin"
5267 #define FW_FILE_ISP8031 "ql8300_fw.bin"
5268
5269 static DEFINE_MUTEX(qla_fw_lock);
5270
5271 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
5272         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
5273         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
5274         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
5275         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
5276         { .name = FW_FILE_ISP24XX, },
5277         { .name = FW_FILE_ISP25XX, },
5278         { .name = FW_FILE_ISP81XX, },
5279         { .name = FW_FILE_ISP82XX, },
5280         { .name = FW_FILE_ISP2031, },
5281         { .name = FW_FILE_ISP8031, },
5282 };
5283
5284 struct fw_blob *
5285 qla2x00_request_firmware(scsi_qla_host_t *vha)
5286 {
5287         struct qla_hw_data *ha = vha->hw;
5288         struct fw_blob *blob;
5289
5290         if (IS_QLA2100(ha)) {
5291                 blob = &qla_fw_blobs[FW_ISP21XX];
5292         } else if (IS_QLA2200(ha)) {
5293                 blob = &qla_fw_blobs[FW_ISP22XX];
5294         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
5295                 blob = &qla_fw_blobs[FW_ISP2300];
5296         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
5297                 blob = &qla_fw_blobs[FW_ISP2322];
5298         } else if (IS_QLA24XX_TYPE(ha)) {
5299                 blob = &qla_fw_blobs[FW_ISP24XX];
5300         } else if (IS_QLA25XX(ha)) {
5301                 blob = &qla_fw_blobs[FW_ISP25XX];
5302         } else if (IS_QLA81XX(ha)) {
5303                 blob = &qla_fw_blobs[FW_ISP81XX];
5304         } else if (IS_QLA82XX(ha)) {
5305                 blob = &qla_fw_blobs[FW_ISP82XX];
5306         } else if (IS_QLA2031(ha)) {
5307                 blob = &qla_fw_blobs[FW_ISP2031];
5308         } else if (IS_QLA8031(ha)) {
5309                 blob = &qla_fw_blobs[FW_ISP8031];
5310         } else {
5311                 return NULL;
5312         }
5313
5314         mutex_lock(&qla_fw_lock);
5315         if (blob->fw)
5316                 goto out;
5317
5318         if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
5319                 ql_log(ql_log_warn, vha, 0x0063,
5320                     "Failed to load firmware image (%s).\n", blob->name);
5321                 blob->fw = NULL;
5322                 blob = NULL;
5323                 goto out;
5324         }
5325
5326 out:
5327         mutex_unlock(&qla_fw_lock);
5328         return blob;
5329 }
5330
5331 static void
5332 qla2x00_release_firmware(void)
5333 {
5334         int idx;
5335
5336         mutex_lock(&qla_fw_lock);
5337         for (idx = 0; idx < FW_BLOBS; idx++)
5338                 release_firmware(qla_fw_blobs[idx].fw);
5339         mutex_unlock(&qla_fw_lock);
5340 }
5341
5342 static pci_ers_result_t
5343 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5344 {
5345         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
5346         struct qla_hw_data *ha = vha->hw;
5347
5348         ql_dbg(ql_dbg_aer, vha, 0x9000,
5349             "PCI error detected, state %x.\n", state);
5350
5351         switch (state) {
5352         case pci_channel_io_normal:
5353                 ha->flags.eeh_busy = 0;
5354                 return PCI_ERS_RESULT_CAN_RECOVER;
5355         case pci_channel_io_frozen:
5356                 ha->flags.eeh_busy = 1;
5357                 /* For ISP82XX complete any pending mailbox cmd */
5358                 if (IS_QLA82XX(ha)) {
5359                         ha->flags.isp82xx_fw_hung = 1;
5360                         ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
5361                         qla82xx_clear_pending_mbx(vha);
5362                 }
5363                 qla2x00_free_irqs(vha);
5364                 pci_disable_device(pdev);
5365                 /* Return back all IOs */
5366                 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
5367                 return PCI_ERS_RESULT_NEED_RESET;
5368         case pci_channel_io_perm_failure:
5369                 ha->flags.pci_channel_io_perm_failure = 1;
5370                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
5371                 return PCI_ERS_RESULT_DISCONNECT;
5372         }
5373         return PCI_ERS_RESULT_NEED_RESET;
5374 }
5375
5376 static pci_ers_result_t
5377 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
5378 {
5379         int risc_paused = 0;
5380         uint32_t stat;
5381         unsigned long flags;
5382         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5383         struct qla_hw_data *ha = base_vha->hw;
5384         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
5385         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
5386
5387         if (IS_QLA82XX(ha))
5388                 return PCI_ERS_RESULT_RECOVERED;
5389
5390         spin_lock_irqsave(&ha->hardware_lock, flags);
5391         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
5392                 stat = RD_REG_DWORD(&reg->hccr);
5393                 if (stat & HCCR_RISC_PAUSE)
5394                         risc_paused = 1;
5395         } else if (IS_QLA23XX(ha)) {
5396                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
5397                 if (stat & HSR_RISC_PAUSED)
5398                         risc_paused = 1;
5399         } else if (IS_FWI2_CAPABLE(ha)) {
5400                 stat = RD_REG_DWORD(&reg24->host_status);
5401                 if (stat & HSRX_RISC_PAUSED)
5402                         risc_paused = 1;
5403         }
5404         spin_unlock_irqrestore(&ha->hardware_lock, flags);
5405
5406         if (risc_paused) {
5407                 ql_log(ql_log_info, base_vha, 0x9003,
5408                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
5409                 ha->isp_ops->fw_dump(base_vha, 0);
5410
5411                 return PCI_ERS_RESULT_NEED_RESET;
5412         } else
5413                 return PCI_ERS_RESULT_RECOVERED;
5414 }
5415
5416 static uint32_t
5417 qla82xx_error_recovery(scsi_qla_host_t *base_vha)
5418 {
5419         uint32_t rval = QLA_FUNCTION_FAILED;
5420         uint32_t drv_active = 0;
5421         struct qla_hw_data *ha = base_vha->hw;
5422         int fn;
5423         struct pci_dev *other_pdev = NULL;
5424
5425         ql_dbg(ql_dbg_aer, base_vha, 0x9006,
5426             "Entered %s.\n", __func__);
5427
5428         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5429
5430         if (base_vha->flags.online) {
5431                 /* Abort all outstanding commands,
5432                  * so as to be requeued later */
5433                 qla2x00_abort_isp_cleanup(base_vha);
5434         }
5435
5436
5437         fn = PCI_FUNC(ha->pdev->devfn);
5438         while (fn > 0) {
5439                 fn--;
5440                 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
5441                     "Finding pci device at function = 0x%x.\n", fn);
5442                 other_pdev =
5443                     pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
5444                     ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
5445                     fn));
5446
5447                 if (!other_pdev)
5448                         continue;
5449                 if (atomic_read(&other_pdev->enable_cnt)) {
5450                         ql_dbg(ql_dbg_aer, base_vha, 0x9008,
5451                             "Found PCI func available and enable at 0x%x.\n",
5452                             fn);
5453                         pci_dev_put(other_pdev);
5454                         break;
5455                 }
5456                 pci_dev_put(other_pdev);
5457         }
5458
5459         if (!fn) {
5460                 /* Reset owner */
5461                 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
5462                     "This devfn is reset owner = 0x%x.\n",
5463                     ha->pdev->devfn);
5464                 qla82xx_idc_lock(ha);
5465
5466                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5467                     QLA8XXX_DEV_INITIALIZING);
5468
5469                 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
5470                     QLA82XX_IDC_VERSION);
5471
5472                 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
5473                 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
5474                     "drv_active = 0x%x.\n", drv_active);
5475
5476                 qla82xx_idc_unlock(ha);
5477                 /* Reset if device is not already reset
5478                  * drv_active would be 0 if a reset has already been done
5479                  */
5480                 if (drv_active)
5481                         rval = qla82xx_start_firmware(base_vha);
5482                 else
5483                         rval = QLA_SUCCESS;
5484                 qla82xx_idc_lock(ha);
5485
5486                 if (rval != QLA_SUCCESS) {
5487                         ql_log(ql_log_info, base_vha, 0x900b,
5488                             "HW State: FAILED.\n");
5489                         qla82xx_clear_drv_active(ha);
5490                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5491                             QLA8XXX_DEV_FAILED);
5492                 } else {
5493                         ql_log(ql_log_info, base_vha, 0x900c,
5494                             "HW State: READY.\n");
5495                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5496                             QLA8XXX_DEV_READY);
5497                         qla82xx_idc_unlock(ha);
5498                         ha->flags.isp82xx_fw_hung = 0;
5499                         rval = qla82xx_restart_isp(base_vha);
5500                         qla82xx_idc_lock(ha);
5501                         /* Clear driver state register */
5502                         qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
5503                         qla82xx_set_drv_active(base_vha);
5504                 }
5505                 qla82xx_idc_unlock(ha);
5506         } else {
5507                 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
5508                     "This devfn is not reset owner = 0x%x.\n",
5509                     ha->pdev->devfn);
5510                 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
5511                     QLA8XXX_DEV_READY)) {
5512                         ha->flags.isp82xx_fw_hung = 0;
5513                         rval = qla82xx_restart_isp(base_vha);
5514                         qla82xx_idc_lock(ha);
5515                         qla82xx_set_drv_active(base_vha);
5516                         qla82xx_idc_unlock(ha);
5517                 }
5518         }
5519         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5520
5521         return rval;
5522 }
5523
5524 static pci_ers_result_t
5525 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
5526 {
5527         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
5528         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5529         struct qla_hw_data *ha = base_vha->hw;
5530         struct rsp_que *rsp;
5531         int rc, retries = 10;
5532
5533         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
5534             "Slot Reset.\n");
5535
5536         /* Workaround: qla2xxx driver which access hardware earlier
5537          * needs error state to be pci_channel_io_online.
5538          * Otherwise mailbox command timesout.
5539          */
5540         pdev->error_state = pci_channel_io_normal;
5541
5542         pci_restore_state(pdev);
5543
5544         /* pci_restore_state() clears the saved_state flag of the device
5545          * save restored state which resets saved_state flag
5546          */
5547         pci_save_state(pdev);
5548
5549         if (ha->mem_only)
5550                 rc = pci_enable_device_mem(pdev);
5551         else
5552                 rc = pci_enable_device(pdev);
5553
5554         if (rc) {
5555                 ql_log(ql_log_warn, base_vha, 0x9005,
5556                     "Can't re-enable PCI device after reset.\n");
5557                 goto exit_slot_reset;
5558         }
5559
5560         rsp = ha->rsp_q_map[0];
5561         if (qla2x00_request_irqs(ha, rsp))
5562                 goto exit_slot_reset;
5563
5564         if (ha->isp_ops->pci_config(base_vha))
5565                 goto exit_slot_reset;
5566
5567         if (IS_QLA82XX(ha)) {
5568                 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
5569                         ret = PCI_ERS_RESULT_RECOVERED;
5570                         goto exit_slot_reset;
5571                 } else
5572                         goto exit_slot_reset;
5573         }
5574
5575         while (ha->flags.mbox_busy && retries--)
5576                 msleep(1000);
5577
5578         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5579         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
5580                 ret =  PCI_ERS_RESULT_RECOVERED;
5581         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5582
5583
5584 exit_slot_reset:
5585         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
5586             "slot_reset return %x.\n", ret);
5587
5588         return ret;
5589 }
5590
5591 static void
5592 qla2xxx_pci_resume(struct pci_dev *pdev)
5593 {
5594         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5595         struct qla_hw_data *ha = base_vha->hw;
5596         int ret;
5597
5598         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
5599             "pci_resume.\n");
5600
5601         ret = qla2x00_wait_for_hba_online(base_vha);
5602         if (ret != QLA_SUCCESS) {
5603                 ql_log(ql_log_fatal, base_vha, 0x9002,
5604                     "The device failed to resume I/O from slot/link_reset.\n");
5605         }
5606
5607         pci_cleanup_aer_uncorrect_error_status(pdev);
5608
5609         ha->flags.eeh_busy = 0;
5610 }
5611
5612 static const struct pci_error_handlers qla2xxx_err_handler = {
5613         .error_detected = qla2xxx_pci_error_detected,
5614         .mmio_enabled = qla2xxx_pci_mmio_enabled,
5615         .slot_reset = qla2xxx_pci_slot_reset,
5616         .resume = qla2xxx_pci_resume,
5617 };
5618
5619 static struct pci_device_id qla2xxx_pci_tbl[] = {
5620         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
5621         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
5622         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
5623         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
5624         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
5625         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
5626         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
5627         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
5628         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
5629         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
5630         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
5631         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
5632         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
5633         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
5634         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
5635         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
5636         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
5637         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
5638         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
5639         { 0 },
5640 };
5641 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
5642
5643 static struct pci_driver qla2xxx_pci_driver = {
5644         .name           = QLA2XXX_DRIVER_NAME,
5645         .driver         = {
5646                 .owner          = THIS_MODULE,
5647         },
5648         .id_table       = qla2xxx_pci_tbl,
5649         .probe          = qla2x00_probe_one,
5650         .remove         = qla2x00_remove_one,
5651         .shutdown       = qla2x00_shutdown,
5652         .err_handler    = &qla2xxx_err_handler,
5653 };
5654
5655 static const struct file_operations apidev_fops = {
5656         .owner = THIS_MODULE,
5657         .llseek = noop_llseek,
5658 };
5659
5660 /**
5661  * qla2x00_module_init - Module initialization.
5662  **/
5663 static int __init
5664 qla2x00_module_init(void)
5665 {
5666         int ret = 0;
5667
5668         /* Allocate cache for SRBs. */
5669         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
5670             SLAB_HWCACHE_ALIGN, NULL);
5671         if (srb_cachep == NULL) {
5672                 ql_log(ql_log_fatal, NULL, 0x0001,
5673                     "Unable to allocate SRB cache...Failing load!.\n");
5674                 return -ENOMEM;
5675         }
5676
5677         /* Initialize target kmem_cache and mem_pools */
5678         ret = qlt_init();
5679         if (ret < 0) {
5680                 kmem_cache_destroy(srb_cachep);
5681                 return ret;
5682         } else if (ret > 0) {
5683                 /*
5684                  * If initiator mode is explictly disabled by qlt_init(),
5685                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
5686                  * performing scsi_scan_target() during LOOP UP event.
5687                  */
5688                 qla2xxx_transport_functions.disable_target_scan = 1;
5689                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
5690         }
5691
5692         /* Derive version string. */
5693         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
5694         if (ql2xextended_error_logging)
5695                 strcat(qla2x00_version_str, "-debug");
5696
5697         qla2xxx_transport_template =
5698             fc_attach_transport(&qla2xxx_transport_functions);
5699         if (!qla2xxx_transport_template) {
5700                 kmem_cache_destroy(srb_cachep);
5701                 ql_log(ql_log_fatal, NULL, 0x0002,
5702                     "fc_attach_transport failed...Failing load!.\n");
5703                 qlt_exit();
5704                 return -ENODEV;
5705         }
5706
5707         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
5708         if (apidev_major < 0) {
5709                 ql_log(ql_log_fatal, NULL, 0x0003,
5710                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
5711         }
5712
5713         qla2xxx_transport_vport_template =
5714             fc_attach_transport(&qla2xxx_transport_vport_functions);
5715         if (!qla2xxx_transport_vport_template) {
5716                 kmem_cache_destroy(srb_cachep);
5717                 qlt_exit();
5718                 fc_release_transport(qla2xxx_transport_template);
5719                 ql_log(ql_log_fatal, NULL, 0x0004,
5720                     "fc_attach_transport vport failed...Failing load!.\n");
5721                 return -ENODEV;
5722         }
5723         ql_log(ql_log_info, NULL, 0x0005,
5724             "QLogic Fibre Channel HBA Driver: %s.\n",
5725             qla2x00_version_str);
5726         ret = pci_register_driver(&qla2xxx_pci_driver);
5727         if (ret) {
5728                 kmem_cache_destroy(srb_cachep);
5729                 qlt_exit();
5730                 fc_release_transport(qla2xxx_transport_template);
5731                 fc_release_transport(qla2xxx_transport_vport_template);
5732                 ql_log(ql_log_fatal, NULL, 0x0006,
5733                     "pci_register_driver failed...ret=%d Failing load!.\n",
5734                     ret);
5735         }
5736         return ret;
5737 }
5738
5739 /**
5740  * qla2x00_module_exit - Module cleanup.
5741  **/
5742 static void __exit
5743 qla2x00_module_exit(void)
5744 {
5745         unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
5746         pci_unregister_driver(&qla2xxx_pci_driver);
5747         qla2x00_release_firmware();
5748         kmem_cache_destroy(srb_cachep);
5749         qlt_exit();
5750         if (ctx_cachep)
5751                 kmem_cache_destroy(ctx_cachep);
5752         fc_release_transport(qla2xxx_transport_template);
5753         fc_release_transport(qla2xxx_transport_vport_template);
5754 }
5755
5756 module_init(qla2x00_module_init);
5757 module_exit(qla2x00_module_exit);
5758
5759 MODULE_AUTHOR("QLogic Corporation");
5760 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
5761 MODULE_LICENSE("GPL");
5762 MODULE_VERSION(QLA2XXX_VERSION);
5763 MODULE_FIRMWARE(FW_FILE_ISP21XX);
5764 MODULE_FIRMWARE(FW_FILE_ISP22XX);
5765 MODULE_FIRMWARE(FW_FILE_ISP2300);
5766 MODULE_FIRMWARE(FW_FILE_ISP2322);
5767 MODULE_FIRMWARE(FW_FILE_ISP24XX);
5768 MODULE_FIRMWARE(FW_FILE_ISP25XX);