drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2013 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <scsi/scsi_tcq.h>
  17 #include <scsi/scsicam.h>
  18 #include <scsi/scsi_transport.h>
  19 #include <scsi/scsi_transport_fc.h>
  20
  21 #include "qla_target.h"
  22
  23 /*
  24  * Driver version
  25  */
  26 char qla2x00_version_str[40];
  27
  28 static int apidev_major;
  29
  30 /*
  31  * SRB allocation cache
  32  */
  33 static struct kmem_cache *srb_cachep;
  34
  35 /*
  36  * CT6 CTX allocation cache
  37  */
  38 static struct kmem_cache *ctx_cachep;
  39 /*
  40  * error level for logging
  41  */
  42 int ql_errlev = ql_log_all;
  43
  44 static int ql2xenableclass2;
  45 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  46 MODULE_PARM_DESC(ql2xenableclass2,
  47                 "Specify if Class 2 operations are supported from the very "
  48                 "beginning. Default is 0 - class 2 not supported.");
  49
  50
  51 int ql2xlogintimeout = 20;
  52 module_param(ql2xlogintimeout, int, S_IRUGO);
  53 MODULE_PARM_DESC(ql2xlogintimeout,
  54                 "Login timeout value in seconds.");
  55
  56 int qlport_down_retry;
  57 module_param(qlport_down_retry, int, S_IRUGO);
  58 MODULE_PARM_DESC(qlport_down_retry,
  59                 "Maximum number of command retries to a port that returns "
  60                 "a PORT-DOWN status.");
  61
  62 int ql2xplogiabsentdevice;
  63 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  64 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  65                 "Option to enable PLOGI to devices that are not present after "
  66                 "a Fabric scan.  This is needed for several broken switches. "
  67                 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  68
  69 int ql2xloginretrycount = 0;
  70 module_param(ql2xloginretrycount, int, S_IRUGO);
  71 MODULE_PARM_DESC(ql2xloginretrycount,
  72                 "Specify an alternate value for the NVRAM login retry count.");
  73
  74 int ql2xallocfwdump = 1;
  75 module_param(ql2xallocfwdump, int, S_IRUGO);
  76 MODULE_PARM_DESC(ql2xallocfwdump,
  77                 "Option to enable allocation of memory for a firmware dump "
  78                 "during HBA initialization.  Memory allocation requirements "
  79                 "vary by ISP type.  Default is 1 - allocate memory.");
  80
  81 int ql2xextended_error_logging;
  82 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  83 MODULE_PARM_DESC(ql2xextended_error_logging,
  84                 "Option to enable extended error logging,\n"
  85                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  86                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  87                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  88                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  89                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  90                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  91                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  92                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  93                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
  94                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
  95                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
  96                 "\t\t0x1e400000 - Preferred value for capturing essential "
  97                 "debug information (equivalent to old "
  98                 "ql2xextended_error_logging=1).\n"
  99                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 100
 101 int ql2xshiftctondsd = 6;
 102 module_param(ql2xshiftctondsd, int, S_IRUGO);
 103 MODULE_PARM_DESC(ql2xshiftctondsd,
 104                 "Set to control shifting of command type processing "
 105                 "based on total number of SG elements.");
 106
 107 int ql2xfdmienable=1;
 108 module_param(ql2xfdmienable, int, S_IRUGO);
 109 MODULE_PARM_DESC(ql2xfdmienable,
 110                 "Enables FDMI registrations. "
 111                 "0 - no FDMI. Default is 1 - perform FDMI.");
 112
 113 #define MAX_Q_DEPTH     32
 114 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 115 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 116 MODULE_PARM_DESC(ql2xmaxqdepth,
 117                 "Maximum queue depth to set for each LUN. "
 118                 "Default is 32.");
 119
 120 int ql2xenabledif = 2;
 121 module_param(ql2xenabledif, int, S_IRUGO);
 122 MODULE_PARM_DESC(ql2xenabledif,
 123                 " Enable T10-CRC-DIF:\n"
 124                 " Default is 2.\n"
 125                 "  0 -- No DIF Support\n"
 126                 "  1 -- Enable DIF for all types\n"
 127                 "  2 -- Enable DIF for all types, except Type 0.\n");
 128
 129 int ql2xenablehba_err_chk = 2;
 130 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 131 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 132                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 133                 " Default is 2.\n"
 134                 "  0 -- Error isolation disabled\n"
 135                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 136                 "  2 -- Error isolation enabled for all Types\n");
 137
 138 int ql2xiidmaenable=1;
 139 module_param(ql2xiidmaenable, int, S_IRUGO);
 140 MODULE_PARM_DESC(ql2xiidmaenable,
 141                 "Enables iIDMA settings "
 142                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 143
 144 int ql2xmaxqueues = 1;
 145 module_param(ql2xmaxqueues, int, S_IRUGO);
 146 MODULE_PARM_DESC(ql2xmaxqueues,
 147                 "Enables MQ settings "
 148                 "Default is 1 for single queue. Set it to number "
 149                 "of queues in MQ mode.");
 150
 151 int ql2xmultique_tag;
 152 module_param(ql2xmultique_tag, int, S_IRUGO);
 153 MODULE_PARM_DESC(ql2xmultique_tag,
 154                 "Enables CPU affinity settings for the driver "
 155                 "Default is 0 for no affinity of request and response IO. "
 156                 "Set it to 1 to turn on the cpu affinity.");
 157
 158 int ql2xfwloadbin;
 159 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 160 MODULE_PARM_DESC(ql2xfwloadbin,
 161                 "Option to specify location from which to load ISP firmware:.\n"
 162                 " 2 -- load firmware via the request_firmware() (hotplug).\n"
 163                 "      interface.\n"
 164                 " 1 -- load firmware from flash.\n"
 165                 " 0 -- use default semantics.\n");
 166
 167 int ql2xetsenable;
 168 module_param(ql2xetsenable, int, S_IRUGO);
 169 MODULE_PARM_DESC(ql2xetsenable,
 170                 "Enables firmware ETS burst."
 171                 "Default is 0 - skip ETS enablement.");
 172
 173 int ql2xdbwr = 1;
 174 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 175 MODULE_PARM_DESC(ql2xdbwr,
 176                 "Option to specify scheme for request queue posting.\n"
 177                 " 0 -- Regular doorbell.\n"
 178                 " 1 -- CAMRAM doorbell (faster).\n");
 179
 180 int ql2xtargetreset = 1;
 181 module_param(ql2xtargetreset, int, S_IRUGO);
 182 MODULE_PARM_DESC(ql2xtargetreset,
 183                  "Enable target reset."
 184                  "Default is 1 - use hw defaults.");
 185
 186 int ql2xgffidenable;
 187 module_param(ql2xgffidenable, int, S_IRUGO);
 188 MODULE_PARM_DESC(ql2xgffidenable,
 189                 "Enables GFF_ID checks of port type. "
 190                 "Default is 0 - Do not use GFF_ID information.");
 191
 192 int ql2xasynctmfenable;
 193 module_param(ql2xasynctmfenable, int, S_IRUGO);
 194 MODULE_PARM_DESC(ql2xasynctmfenable,
 195                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 196                 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
 197
 198 int ql2xdontresethba;
 199 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 200 MODULE_PARM_DESC(ql2xdontresethba,
 201                 "Option to specify reset behaviour.\n"
 202                 " 0 (Default) -- Reset on failure.\n"
 203                 " 1 -- Do not reset on failure.\n");
 204
 205 uint ql2xmaxlun = MAX_LUNS;
 206 module_param(ql2xmaxlun, uint, S_IRUGO);
 207 MODULE_PARM_DESC(ql2xmaxlun,
 208                 "Defines the maximum LU number to register with the SCSI "
 209                 "midlayer. Default is 65535.");
 210
 211 int ql2xmdcapmask = 0x1F;
 212 module_param(ql2xmdcapmask, int, S_IRUGO);
 213 MODULE_PARM_DESC(ql2xmdcapmask,
 214                 "Set the Minidump driver capture mask level. "
 215                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 216
 217 int ql2xmdenable = 1;
 218 module_param(ql2xmdenable, int, S_IRUGO);
 219 MODULE_PARM_DESC(ql2xmdenable,
 220                 "Enable/disable MiniDump. "
 221                 "0 - MiniDump disabled. "
 222                 "1 (Default) - MiniDump enabled.");
 223
 224 /*
 225  * SCSI host template entry points
 226  */
 227 static int qla2xxx_slave_configure(struct scsi_device * device);
 228 static int qla2xxx_slave_alloc(struct scsi_device *);
 229 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
 230 static void qla2xxx_scan_start(struct Scsi_Host *);
 231 static void qla2xxx_slave_destroy(struct scsi_device *);
 232 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 233 static int qla2xxx_eh_abort(struct scsi_cmnd *);
 234 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
 235 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
 236 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
 237 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
 238
 239 static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
 240 static int qla2x00_change_queue_type(struct scsi_device *, int);
 241 static void qla2x00_free_device(scsi_qla_host_t *);
 242
 243 struct scsi_host_template qla2xxx_driver_template = {
 244         .module                 = THIS_MODULE,
 245         .name                   = QLA2XXX_DRIVER_NAME,
 246         .queuecommand           = qla2xxx_queuecommand,
 247
 248         .eh_abort_handler       = qla2xxx_eh_abort,
 249         .eh_device_reset_handler = qla2xxx_eh_device_reset,
 250         .eh_target_reset_handler = qla2xxx_eh_target_reset,
 251         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
 252         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
 253
 254         .slave_configure        = qla2xxx_slave_configure,
 255
 256         .slave_alloc            = qla2xxx_slave_alloc,
 257         .slave_destroy          = qla2xxx_slave_destroy,
 258         .scan_finished          = qla2xxx_scan_finished,
 259         .scan_start             = qla2xxx_scan_start,
 260         .change_queue_depth     = qla2x00_change_queue_depth,
 261         .change_queue_type      = qla2x00_change_queue_type,
 262         .this_id                = -1,
 263         .cmd_per_lun            = 3,
 264         .use_clustering         = ENABLE_CLUSTERING,
 265         .sg_tablesize           = SG_ALL,
 266
 267         .max_sectors            = 0xFFFF,
 268         .shost_attrs            = qla2x00_host_attrs,
 269
 270         .supported_mode         = MODE_INITIATOR,
 271 };
 272
 273 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 274 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 275
 276 /* TODO Convert to inlines
 277  *
 278  * Timer routines
 279  */
 280
 281 __inline__ void
 282 qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
 283 {
 284         init_timer(&vha->timer);
 285         vha->timer.expires = jiffies + interval * HZ;
 286         vha->timer.data = (unsigned long)vha;
 287         vha->timer.function = (void (*)(unsigned long))func;
 288         add_timer(&vha->timer);
 289         vha->timer_active = 1;
 290 }
 291
 292 static inline void
 293 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 294 {
 295         /* Currently used for 82XX only. */
 296         if (vha->device_flags & DFLG_DEV_FAILED) {
 297                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 298                     "Device in a failed state, returning.\n");
 299                 return;
 300         }
 301
 302         mod_timer(&vha->timer, jiffies + interval * HZ);
 303 }
 304
 305 static __inline__ void
 306 qla2x00_stop_timer(scsi_qla_host_t *vha)
 307 {
 308         del_timer_sync(&vha->timer);
 309         vha->timer_active = 0;
 310 }
 311
 312 static int qla2x00_do_dpc(void *data);
 313
 314 static void qla2x00_rst_aen(scsi_qla_host_t *);
 315
 316 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 317         struct req_que **, struct rsp_que **);
 318 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 319 static void qla2x00_mem_free(struct qla_hw_data *);
 320
 321 /* -------------------------------------------------------------------------- */
 322 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 323                                 struct rsp_que *rsp)
 324 {
 325         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 326         ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
 327                                 GFP_KERNEL);
 328         if (!ha->req_q_map) {
 329                 ql_log(ql_log_fatal, vha, 0x003b,
 330                     "Unable to allocate memory for request queue ptrs.\n");
 331                 goto fail_req_map;
 332         }
 333
 334         ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
 335                                 GFP_KERNEL);
 336         if (!ha->rsp_q_map) {
 337                 ql_log(ql_log_fatal, vha, 0x003c,
 338                     "Unable to allocate memory for response queue ptrs.\n");
 339                 goto fail_rsp_map;
 340         }
 341         /*
 342          * Make sure we record at least the request and response queue zero in
 343          * case we need to free them if part of the probe fails.
 344          */
 345         ha->rsp_q_map[0] = rsp;
 346         ha->req_q_map[0] = req;
 347         set_bit(0, ha->rsp_qid_map);
 348         set_bit(0, ha->req_qid_map);
 349         return 1;
 350
 351 fail_rsp_map:
 352         kfree(ha->req_q_map);
 353         ha->req_q_map = NULL;
 354 fail_req_map:
 355         return -ENOMEM;
 356 }
 357
 358 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 359 {
 360         if (IS_QLAFX00(ha)) {
 361                 if (req && req->ring_fx00)
 362                         dma_free_coherent(&ha->pdev->dev,
 363                             (req->length_fx00 + 1) * sizeof(request_t),
 364                             req->ring_fx00, req->dma_fx00);
 365         } else if (req && req->ring)
 366                 dma_free_coherent(&ha->pdev->dev,
 367                 (req->length + 1) * sizeof(request_t),
 368                 req->ring, req->dma);
 369
 370         if (req)
 371                 kfree(req->outstanding_cmds);
 372
 373         kfree(req);
 374         req = NULL;
 375 }
 376
 377 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 378 {
 379         if (IS_QLAFX00(ha)) {
 380                 if (rsp && rsp->ring)
 381                         dma_free_coherent(&ha->pdev->dev,
 382                             (rsp->length_fx00 + 1) * sizeof(request_t),
 383                             rsp->ring_fx00, rsp->dma_fx00);
 384         } else if (rsp && rsp->ring) {
 385                 dma_free_coherent(&ha->pdev->dev,
 386                 (rsp->length + 1) * sizeof(response_t),
 387                 rsp->ring, rsp->dma);
 388         }
 389         kfree(rsp);
 390         rsp = NULL;
 391 }
 392
 393 static void qla2x00_free_queues(struct qla_hw_data *ha)
 394 {
 395         struct req_que *req;
 396         struct rsp_que *rsp;
 397         int cnt;
 398
 399         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 400                 req = ha->req_q_map[cnt];
 401                 qla2x00_free_req_que(ha, req);
 402         }
 403         kfree(ha->req_q_map);
 404         ha->req_q_map = NULL;
 405
 406         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 407                 rsp = ha->rsp_q_map[cnt];
 408                 qla2x00_free_rsp_que(ha, rsp);
 409         }
 410         kfree(ha->rsp_q_map);
 411         ha->rsp_q_map = NULL;
 412 }
 413
 414 static int qla25xx_setup_mode(struct scsi_qla_host *vha)
 415 {
 416         uint16_t options = 0;
 417         int ques, req, ret;
 418         struct qla_hw_data *ha = vha->hw;
 419
 420         if (!(ha->fw_attributes & BIT_6)) {
 421                 ql_log(ql_log_warn, vha, 0x00d8,
 422                     "Firmware is not multi-queue capable.\n");
 423                 goto fail;
 424         }
 425         if (ql2xmultique_tag) {
 426                 /* create a request queue for IO */
 427                 options |= BIT_7;
 428                 req = qla25xx_create_req_que(ha, options, 0, 0, -1,
 429                         QLA_DEFAULT_QUE_QOS);
 430                 if (!req) {
 431                         ql_log(ql_log_warn, vha, 0x00e0,
 432                             "Failed to create request queue.\n");
 433                         goto fail;
 434                 }
 435                 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1);
 436                 vha->req = ha->req_q_map[req];
 437                 options |= BIT_1;
 438                 for (ques = 1; ques < ha->max_rsp_queues; ques++) {
 439                         ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
 440                         if (!ret) {
 441                                 ql_log(ql_log_warn, vha, 0x00e8,
 442                                     "Failed to create response queue.\n");
 443                                 goto fail2;
 444                         }
 445                 }
 446                 ha->flags.cpu_affinity_enabled = 1;
 447                 ql_dbg(ql_dbg_multiq, vha, 0xc007,
 448                     "CPU affinity mode enalbed, "
 449                     "no. of response queues:%d no. of request queues:%d.\n",
 450                     ha->max_rsp_queues, ha->max_req_queues);
 451                 ql_dbg(ql_dbg_init, vha, 0x00e9,
 452                     "CPU affinity mode enalbed, "
 453                     "no. of response queues:%d no. of request queues:%d.\n",
 454                     ha->max_rsp_queues, ha->max_req_queues);
 455         }
 456         return 0;
 457 fail2:
 458         qla25xx_delete_queues(vha);
 459         destroy_workqueue(ha->wq);
 460         ha->wq = NULL;
 461         vha->req = ha->req_q_map[0];
 462 fail:
 463         ha->mqenable = 0;
 464         kfree(ha->req_q_map);
 465         kfree(ha->rsp_q_map);
 466         ha->max_req_queues = ha->max_rsp_queues = 1;
 467         return 1;
 468 }
 469
 470 static char *
 471 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
 472 {
 473         struct qla_hw_data *ha = vha->hw;
 474         static char *pci_bus_modes[] = {
 475                 "33", "66", "100", "133",
 476         };
 477         uint16_t pci_bus;
 478
 479         strcpy(str, "PCI");
 480         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 481         if (pci_bus) {
 482                 strcat(str, "-X (");
 483                 strcat(str, pci_bus_modes[pci_bus]);
 484         } else {
 485                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 486                 strcat(str, " (");
 487                 strcat(str, pci_bus_modes[pci_bus]);
 488         }
 489         strcat(str, " MHz)");
 490
 491         return (str);
 492 }
 493
 494 static char *
 495 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
 496 {
 497         static char *pci_bus_modes[] = { "33", "66", "100", "133", };
 498         struct qla_hw_data *ha = vha->hw;
 499         uint32_t pci_bus;
 500
 501         if (pci_is_pcie(ha->pdev)) {
 502                 char lwstr[6];
 503                 uint32_t lstat, lspeed, lwidth;
 504
 505                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 506                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
 507                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
 508
 509                 strcpy(str, "PCIe (");
 510                 switch (lspeed) {
 511                 case 1:
 512                         strcat(str, "2.5GT/s ");
 513                         break;
 514                 case 2:
 515                         strcat(str, "5.0GT/s ");
 516                         break;
 517                 case 3:
 518                         strcat(str, "8.0GT/s ");
 519                         break;
 520                 default:
 521                         strcat(str, "<unknown> ");
 522                         break;
 523                 }
 524                 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
 525                 strcat(str, lwstr);
 526
 527                 return str;
 528         }
 529
 530         strcpy(str, "PCI");
 531         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 532         if (pci_bus == 0 || pci_bus == 8) {
 533                 strcat(str, " (");
 534                 strcat(str, pci_bus_modes[pci_bus >> 3]);
 535         } else {
 536                 strcat(str, "-X ");
 537                 if (pci_bus & BIT_2)
 538                         strcat(str, "Mode 2");
 539                 else
 540                         strcat(str, "Mode 1");
 541                 strcat(str, " (");
 542                 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
 543         }
 544         strcat(str, " MHz)");
 545
 546         return str;
 547 }
 548
 549 static char *
 550 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
 551 {
 552         char un_str[10];
 553         struct qla_hw_data *ha = vha->hw;
 554
 555         sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
 556             ha->fw_minor_version,
 557             ha->fw_subminor_version);
 558
 559         if (ha->fw_attributes & BIT_9) {
 560                 strcat(str, "FLX");
 561                 return (str);
 562         }
 563
 564         switch (ha->fw_attributes & 0xFF) {
 565         case 0x7:
 566                 strcat(str, "EF");
 567                 break;
 568         case 0x17:
 569                 strcat(str, "TP");
 570                 break;
 571         case 0x37:
 572                 strcat(str, "IP");
 573                 break;
 574         case 0x77:
 575                 strcat(str, "VI");
 576                 break;
 577         default:
 578                 sprintf(un_str, "(%x)", ha->fw_attributes);
 579                 strcat(str, un_str);
 580                 break;
 581         }
 582         if (ha->fw_attributes & 0x100)
 583                 strcat(str, "X");
 584
 585         return (str);
 586 }
 587
 588 static char *
 589 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
 590 {
 591         struct qla_hw_data *ha = vha->hw;
 592
 593         sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
 594             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 595         return str;
 596 }
 597
 598 void
 599 qla2x00_sp_free_dma(void *vha, void *ptr)
 600 {
 601         srb_t *sp = (srb_t *)ptr;
 602         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 603         struct qla_hw_data *ha = sp->fcport->vha->hw;
 604         void *ctx = GET_CMD_CTX_SP(sp);
 605
 606         if (sp->flags & SRB_DMA_VALID) {
 607                 scsi_dma_unmap(cmd);
 608                 sp->flags &= ~SRB_DMA_VALID;
 609         }
 610
 611         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 612                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 613                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 614                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 615         }
 616
 617         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 618                 /* List assured to be having elements */
 619                 qla2x00_clean_dsd_pool(ha, sp);
 620                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 621         }
 622
 623         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 624                 dma_pool_free(ha->dl_dma_pool, ctx,
 625                     ((struct crc_context *)ctx)->crc_ctx_dma);
 626                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 627         }
 628
 629         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 630                 struct ct6_dsd *ctx1 = (struct ct6_dsd *)ctx;
 631
 632                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 633                         ctx1->fcp_cmnd_dma);
 634                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 635                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 636                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 637                 mempool_free(ctx1, ha->ctx_mempool);
 638                 ctx1 = NULL;
 639         }
 640
 641         CMD_SP(cmd) = NULL;
 642         qla2x00_rel_sp(sp->fcport->vha, sp);
 643 }
 644
 645 static void
 646 qla2x00_sp_compl(void *data, void *ptr, int res)
 647 {
 648         struct qla_hw_data *ha = (struct qla_hw_data *)data;
 649         srb_t *sp = (srb_t *)ptr;
 650         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 651
 652         cmd->result = res;
 653
 654         if (atomic_read(&sp->ref_count) == 0) {
 655                 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3015,
 656                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 657                     sp, GET_CMD_SP(sp));
 658                 if (ql2xextended_error_logging & ql_dbg_io)
 659                         BUG();
 660                 return;
 661         }
 662         if (!atomic_dec_and_test(&sp->ref_count))
 663                 return;
 664
 665         qla2x00_sp_free_dma(ha, sp);
 666         cmd->scsi_done(cmd);
 667 }
 668
 669 /* If we are SP1 here, we need to still take and release the host_lock as SP1
 670  * does not have the changes necessary to avoid taking host->host_lock.
 671  */
 672 static int
 673 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 674 {
 675         scsi_qla_host_t *vha = shost_priv(host);
 676         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 677         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 678         struct qla_hw_data *ha = vha->hw;
 679         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 680         srb_t *sp;
 681         int rval;
 682
 683         if (ha->flags.eeh_busy) {
 684                 if (ha->flags.pci_channel_io_perm_failure) {
 685                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 686                             "PCI Channel IO permanent failure, exiting "
 687                             "cmd=%p.\n", cmd);
 688                         cmd->result = DID_NO_CONNECT << 16;
 689                 } else {
 690                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 691                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 692                         cmd->result = DID_REQUEUE << 16;
 693                 }
 694                 goto qc24_fail_command;
 695         }
 696
 697         rval = fc_remote_port_chkready(rport);
 698         if (rval) {
 699                 cmd->result = rval;
 700                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 701                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 702                     cmd, rval);
 703                 goto qc24_fail_command;
 704         }
 705
 706         if (!vha->flags.difdix_supported &&
 707                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 708                         ql_dbg(ql_dbg_io, vha, 0x3004,
 709                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 710                             cmd);
 711                         cmd->result = DID_NO_CONNECT << 16;
 712                         goto qc24_fail_command;
 713         }
 714
 715         if (!fcport) {
 716                 cmd->result = DID_NO_CONNECT << 16;
 717                 goto qc24_fail_command;
 718         }
 719
 720         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 721                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 722                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 723                         ql_dbg(ql_dbg_io, vha, 0x3005,
 724                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 725                             atomic_read(&fcport->state),
 726                             atomic_read(&base_vha->loop_state));
 727                         cmd->result = DID_NO_CONNECT << 16;
 728                         goto qc24_fail_command;
 729                 }
 730                 goto qc24_target_busy;
 731         }
 732
 733         sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
 734         if (!sp)
 735                 goto qc24_host_busy;
 736
 737         sp->u.scmd.cmd = cmd;
 738         sp->type = SRB_SCSI_CMD;
 739         atomic_set(&sp->ref_count, 1);
 740         CMD_SP(cmd) = (void *)sp;
 741         sp->free = qla2x00_sp_free_dma;
 742         sp->done = qla2x00_sp_compl;
 743
 744         rval = ha->isp_ops->start_scsi(sp);
 745         if (rval != QLA_SUCCESS) {
 746                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 747                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 748                 goto qc24_host_busy_free_sp;
 749         }
 750
 751         return 0;
 752
 753 qc24_host_busy_free_sp:
 754         qla2x00_sp_free_dma(ha, sp);
 755
 756 qc24_host_busy:
 757         return SCSI_MLQUEUE_HOST_BUSY;
 758
 759 qc24_target_busy:
 760         return SCSI_MLQUEUE_TARGET_BUSY;
 761
 762 qc24_fail_command:
 763         cmd->scsi_done(cmd);
 764
 765         return 0;
 766 }
 767
 768 /*
 769  * qla2x00_eh_wait_on_command
 770  *    Waits for the command to be returned by the Firmware for some
 771  *    max time.
 772  *
 773  * Input:
 774  *    cmd = Scsi Command to wait on.
 775  *
 776  * Return:
 777  *    Not Found : 0
 778  *    Found : 1
 779  */
 780 static int
 781 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
 782 {
 783 #define ABORT_POLLING_PERIOD    1000
 784 #define ABORT_WAIT_ITER         ((10 * 1000) / (ABORT_POLLING_PERIOD))
 785         unsigned long wait_iter = ABORT_WAIT_ITER;
 786         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 787         struct qla_hw_data *ha = vha->hw;
 788         int ret = QLA_SUCCESS;
 789
 790         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
 791                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
 792                     "Return:eh_wait.\n");
 793                 return ret;
 794         }
 795
 796         while (CMD_SP(cmd) && wait_iter--) {
 797                 msleep(ABORT_POLLING_PERIOD);
 798         }
 799         if (CMD_SP(cmd))
 800                 ret = QLA_FUNCTION_FAILED;
 801
 802         return ret;
 803 }
 804
 805 /*
 806  * qla2x00_wait_for_hba_online
 807  *    Wait till the HBA is online after going through
 808  *    <= MAX_RETRIES_OF_ISP_ABORT  or
 809  *    finally HBA is disabled ie marked offline
 810  *
 811  * Input:
 812  *     ha - pointer to host adapter structure
 813  *
 814  * Note:
 815  *    Does context switching-Release SPIN_LOCK
 816  *    (if any) before calling this routine.
 817  *
 818  * Return:
 819  *    Success (Adapter is online) : 0
 820  *    Failed  (Adapter is offline/disabled) : 1
 821  */
 822 int
 823 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
 824 {
 825         int             return_status;
 826         unsigned long   wait_online;
 827         struct qla_hw_data *ha = vha->hw;
 828         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 829
 830         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 831         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 832             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 833             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 834             ha->dpc_active) && time_before(jiffies, wait_online)) {
 835
 836                 msleep(1000);
 837         }
 838         if (base_vha->flags.online)
 839                 return_status = QLA_SUCCESS;
 840         else
 841                 return_status = QLA_FUNCTION_FAILED;
 842
 843         return (return_status);
 844 }
 845
 846 /*
 847  * qla2x00_wait_for_reset_ready
 848  *    Wait till the HBA is online after going through
 849  *    <= MAX_RETRIES_OF_ISP_ABORT  or
 850  *    finally HBA is disabled ie marked offline or flash
 851  *    operations are in progress.
 852  *
 853  * Input:
 854  *     ha - pointer to host adapter structure
 855  *
 856  * Note:
 857  *    Does context switching-Release SPIN_LOCK
 858  *    (if any) before calling this routine.
 859  *
 860  * Return:
 861  *    Success (Adapter is online/no flash ops) : 0
 862  *    Failed  (Adapter is offline/disabled/flash ops in progress) : 1
 863  */
 864 static int
 865 qla2x00_wait_for_reset_ready(scsi_qla_host_t *vha)
 866 {
 867         int             return_status;
 868         unsigned long   wait_online;
 869         struct qla_hw_data *ha = vha->hw;
 870         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 871
 872         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 873         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 874             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 875             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 876             ha->optrom_state != QLA_SWAITING ||
 877             ha->dpc_active) && time_before(jiffies, wait_online))
 878                 msleep(1000);
 879
 880         if (base_vha->flags.online &&  ha->optrom_state == QLA_SWAITING)
 881                 return_status = QLA_SUCCESS;
 882         else
 883                 return_status = QLA_FUNCTION_FAILED;
 884
 885         ql_dbg(ql_dbg_taskm, vha, 0x8019,
 886             "%s return status=%d.\n", __func__, return_status);
 887
 888         return return_status;
 889 }
 890
 891 int
 892 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
 893 {
 894         int             return_status;
 895         unsigned long   wait_reset;
 896         struct qla_hw_data *ha = vha->hw;
 897         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 898
 899         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 900         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 901             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 902             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 903             ha->dpc_active) && time_before(jiffies, wait_reset)) {
 904
 905                 msleep(1000);
 906
 907                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
 908                     ha->flags.chip_reset_done)
 909                         break;
 910         }
 911         if (ha->flags.chip_reset_done)
 912                 return_status = QLA_SUCCESS;
 913         else
 914                 return_status = QLA_FUNCTION_FAILED;
 915
 916         return return_status;
 917 }
 918
 919 static void
 920 sp_get(struct srb *sp)
 921 {
 922         atomic_inc(&sp->ref_count);
 923 }
 924
 925 /**************************************************************************
 926 * qla2xxx_eh_abort
 927 *
 928 * Description:
 929 *    The abort function will abort the specified command.
 930 *
 931 * Input:
 932 *    cmd = Linux SCSI command packet to be aborted.
 933 *
 934 * Returns:
 935 *    Either SUCCESS or FAILED.
 936 *
 937 * Note:
 938 *    Only return FAILED if command not returned by firmware.
 939 **************************************************************************/
 940 static int
 941 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
 942 {
 943         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 944         srb_t *sp;
 945         int ret;
 946         unsigned int id, lun;
 947         unsigned long flags;
 948         int wait = 0;
 949         struct qla_hw_data *ha = vha->hw;
 950
 951         if (!CMD_SP(cmd))
 952                 return SUCCESS;
 953
 954         ret = fc_block_scsi_eh(cmd);
 955         if (ret != 0)
 956                 return ret;
 957         ret = SUCCESS;
 958
 959         id = cmd->device->id;
 960         lun = cmd->device->lun;
 961
 962         spin_lock_irqsave(&ha->hardware_lock, flags);
 963         sp = (srb_t *) CMD_SP(cmd);
 964         if (!sp) {
 965                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 966                 return SUCCESS;
 967         }
 968
 969         ql_dbg(ql_dbg_taskm, vha, 0x8002,
 970             "Aborting from RISC nexus=%ld:%d:%d sp=%p cmd=%p\n",
 971             vha->host_no, id, lun, sp, cmd);
 972
 973         /* Get a reference to the sp and drop the lock.*/
 974         sp_get(sp);
 975
 976         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 977         if (ha->isp_ops->abort_command(sp)) {
 978                 ret = FAILED;
 979                 ql_dbg(ql_dbg_taskm, vha, 0x8003,
 980                     "Abort command mbx failed cmd=%p.\n", cmd);
 981         } else {
 982                 ql_dbg(ql_dbg_taskm, vha, 0x8004,
 983                     "Abort command mbx success cmd=%p.\n", cmd);
 984                 wait = 1;
 985         }
 986
 987         spin_lock_irqsave(&ha->hardware_lock, flags);
 988         sp->done(ha, sp, 0);
 989         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 990
 991         /* Did the command return during mailbox execution? */
 992         if (ret == FAILED && !CMD_SP(cmd))
 993                 ret = SUCCESS;
 994
 995         /* Wait for the command to be returned. */
 996         if (wait) {
 997                 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
 998                         ql_log(ql_log_warn, vha, 0x8006,
 999                             "Abort handler timed out cmd=%p.\n", cmd);
1000                         ret = FAILED;
1001                 }
1002         }
1003
1004         ql_log(ql_log_info, vha, 0x801c,
1005             "Abort command issued nexus=%ld:%d:%d --  %d %x.\n",
1006             vha->host_no, id, lun, wait, ret);
1007
1008         return ret;
1009 }
1010
1011 int
1012 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1013         unsigned int l, enum nexus_wait_type type)
1014 {
1015         int cnt, match, status;
1016         unsigned long flags;
1017         struct qla_hw_data *ha = vha->hw;
1018         struct req_que *req;
1019         srb_t *sp;
1020         struct scsi_cmnd *cmd;
1021
1022         status = QLA_SUCCESS;
1023
1024         spin_lock_irqsave(&ha->hardware_lock, flags);
1025         req = vha->req;
1026         for (cnt = 1; status == QLA_SUCCESS &&
1027                 cnt < req->num_outstanding_cmds; cnt++) {
1028                 sp = req->outstanding_cmds[cnt];
1029                 if (!sp)
1030                         continue;
1031                 if (sp->type != SRB_SCSI_CMD)
1032                         continue;
1033                 if (vha->vp_idx != sp->fcport->vha->vp_idx)
1034                         continue;
1035                 match = 0;
1036                 cmd = GET_CMD_SP(sp);
1037                 switch (type) {
1038                 case WAIT_HOST:
1039                         match = 1;
1040                         break;
1041                 case WAIT_TARGET:
1042                         match = cmd->device->id == t;
1043                         break;
1044                 case WAIT_LUN:
1045                         match = (cmd->device->id == t &&
1046                                 cmd->device->lun == l);
1047                         break;
1048                 }
1049                 if (!match)
1050                         continue;
1051
1052                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1053                 status = qla2x00_eh_wait_on_command(cmd);
1054                 spin_lock_irqsave(&ha->hardware_lock, flags);
1055         }
1056         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1057
1058         return status;
1059 }
1060
1061 static char *reset_errors[] = {
1062         "HBA not online",
1063         "HBA not ready",
1064         "Task management failed",
1065         "Waiting for command completions",
1066 };
1067
1068 static int
1069 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1070     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int))
1071 {
1072         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1073         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1074         int err;
1075
1076         if (!fcport) {
1077                 return FAILED;
1078         }
1079
1080         err = fc_block_scsi_eh(cmd);
1081         if (err != 0)
1082                 return err;
1083
1084         ql_log(ql_log_info, vha, 0x8009,
1085             "%s RESET ISSUED nexus=%ld:%d:%d cmd=%p.\n", name, vha->host_no,
1086             cmd->device->id, cmd->device->lun, cmd);
1087
1088         err = 0;
1089         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1090                 ql_log(ql_log_warn, vha, 0x800a,
1091                     "Wait for hba online failed for cmd=%p.\n", cmd);
1092                 goto eh_reset_failed;
1093         }
1094         err = 2;
1095         if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1096                 != QLA_SUCCESS) {
1097                 ql_log(ql_log_warn, vha, 0x800c,
1098                     "do_reset failed for cmd=%p.\n", cmd);
1099                 goto eh_reset_failed;
1100         }
1101         err = 3;
1102         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1103             cmd->device->lun, type) != QLA_SUCCESS) {
1104                 ql_log(ql_log_warn, vha, 0x800d,
1105                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1106                 goto eh_reset_failed;
1107         }
1108
1109         ql_log(ql_log_info, vha, 0x800e,
1110             "%s RESET SUCCEEDED nexus:%ld:%d:%d cmd=%p.\n", name,
1111             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1112
1113         return SUCCESS;
1114
1115 eh_reset_failed:
1116         ql_log(ql_log_info, vha, 0x800f,
1117             "%s RESET FAILED: %s nexus=%ld:%d:%d cmd=%p.\n", name,
1118             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1119             cmd);
1120         return FAILED;
1121 }
1122
1123 static int
1124 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1125 {
1126         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1127         struct qla_hw_data *ha = vha->hw;
1128
1129         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1130             ha->isp_ops->lun_reset);
1131 }
1132
1133 static int
1134 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1135 {
1136         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1137         struct qla_hw_data *ha = vha->hw;
1138
1139         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1140             ha->isp_ops->target_reset);
1141 }
1142
1143 /**************************************************************************
1144 * qla2xxx_eh_bus_reset
1145 *
1146 * Description:
1147 *    The bus reset function will reset the bus and abort any executing
1148 *    commands.
1149 *
1150 * Input:
1151 *    cmd = Linux SCSI command packet of the command that cause the
1152 *          bus reset.
1153 *
1154 * Returns:
1155 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1156 *
1157 **************************************************************************/
1158 static int
1159 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1160 {
1161         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1162         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1163         int ret = FAILED;
1164         unsigned int id, lun;
1165
1166         id = cmd->device->id;
1167         lun = cmd->device->lun;
1168
1169         if (!fcport) {
1170                 return ret;
1171         }
1172
1173         ret = fc_block_scsi_eh(cmd);
1174         if (ret != 0)
1175                 return ret;
1176         ret = FAILED;
1177
1178         ql_log(ql_log_info, vha, 0x8012,
1179             "BUS RESET ISSUED nexus=%ld:%d:%d.\n", vha->host_no, id, lun);
1180
1181         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1182                 ql_log(ql_log_fatal, vha, 0x8013,
1183                     "Wait for hba online failed board disabled.\n");
1184                 goto eh_bus_reset_done;
1185         }
1186
1187         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1188                 ret = SUCCESS;
1189
1190         if (ret == FAILED)
1191                 goto eh_bus_reset_done;
1192
1193         /* Flush outstanding commands. */
1194         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1195             QLA_SUCCESS) {
1196                 ql_log(ql_log_warn, vha, 0x8014,
1197                     "Wait for pending commands failed.\n");
1198                 ret = FAILED;
1199         }
1200
1201 eh_bus_reset_done:
1202         ql_log(ql_log_warn, vha, 0x802b,
1203             "BUS RESET %s nexus=%ld:%d:%d.\n",
1204             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1205
1206         return ret;
1207 }
1208
1209 /**************************************************************************
1210 * qla2xxx_eh_host_reset
1211 *
1212 * Description:
1213 *    The reset function will reset the Adapter.
1214 *
1215 * Input:
1216 *      cmd = Linux SCSI command packet of the command that cause the
1217 *            adapter reset.
1218 *
1219 * Returns:
1220 *      Either SUCCESS or FAILED.
1221 *
1222 * Note:
1223 **************************************************************************/
1224 static int
1225 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1226 {
1227         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1228         struct qla_hw_data *ha = vha->hw;
1229         int ret = FAILED;
1230         unsigned int id, lun;
1231         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1232
1233         id = cmd->device->id;
1234         lun = cmd->device->lun;
1235
1236         ql_log(ql_log_info, vha, 0x8018,
1237             "ADAPTER RESET ISSUED nexus=%ld:%d:%d.\n", vha->host_no, id, lun);
1238
1239         if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS)
1240                 goto eh_host_reset_lock;
1241
1242         if (vha != base_vha) {
1243                 if (qla2x00_vp_abort_isp(vha))
1244                         goto eh_host_reset_lock;
1245         } else {
1246                 if (IS_P3P_TYPE(vha->hw)) {
1247                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1248                                 /* Ctx reset success */
1249                                 ret = SUCCESS;
1250                                 goto eh_host_reset_lock;
1251                         }
1252                         /* fall thru if ctx reset failed */
1253                 }
1254                 if (ha->wq)
1255                         flush_workqueue(ha->wq);
1256
1257                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1258                 if (ha->isp_ops->abort_isp(base_vha)) {
1259                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1260                         /* failed. schedule dpc to try */
1261                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1262
1263                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1264                                 ql_log(ql_log_warn, vha, 0x802a,
1265                                     "wait for hba online failed.\n");
1266                                 goto eh_host_reset_lock;
1267                         }
1268                 }
1269                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1270         }
1271
1272         /* Waiting for command to be returned to OS.*/
1273         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1274                 QLA_SUCCESS)
1275                 ret = SUCCESS;
1276
1277 eh_host_reset_lock:
1278         ql_log(ql_log_info, vha, 0x8017,
1279             "ADAPTER RESET %s nexus=%ld:%d:%d.\n",
1280             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1281
1282         return ret;
1283 }
1284
1285 /*
1286 * qla2x00_loop_reset
1287 *      Issue loop reset.
1288 *
1289 * Input:
1290 *      ha = adapter block pointer.
1291 *
1292 * Returns:
1293 *      0 = success
1294 */
1295 int
1296 qla2x00_loop_reset(scsi_qla_host_t *vha)
1297 {
1298         int ret;
1299         struct fc_port *fcport;
1300         struct qla_hw_data *ha = vha->hw;
1301
1302         if (IS_QLAFX00(ha)) {
1303                 return qlafx00_loop_reset(vha);
1304         }
1305
1306         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1307                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1308                         if (fcport->port_type != FCT_TARGET)
1309                                 continue;
1310
1311                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1312                         if (ret != QLA_SUCCESS) {
1313                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1314                                     "Bus Reset failed: Reset=%d "
1315                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1316                         }
1317                 }
1318         }
1319
1320
1321         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1322                 atomic_set(&vha->loop_state, LOOP_DOWN);
1323                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1324                 qla2x00_mark_all_devices_lost(vha, 0);
1325                 ret = qla2x00_full_login_lip(vha);
1326                 if (ret != QLA_SUCCESS) {
1327                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1328                             "full_login_lip=%d.\n", ret);
1329                 }
1330         }
1331
1332         if (ha->flags.enable_lip_reset) {
1333                 ret = qla2x00_lip_reset(vha);
1334                 if (ret != QLA_SUCCESS)
1335                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1336                             "lip_reset failed (%d).\n", ret);
1337         }
1338
1339         /* Issue marker command only when we are going to start the I/O */
1340         vha->marker_needed = 1;
1341
1342         return QLA_SUCCESS;
1343 }
1344
1345 void
1346 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1347 {
1348         int que, cnt;
1349         unsigned long flags;
1350         srb_t *sp;
1351         struct qla_hw_data *ha = vha->hw;
1352         struct req_que *req;
1353
1354         spin_lock_irqsave(&ha->hardware_lock, flags);
1355         for (que = 0; que < ha->max_req_queues; que++) {
1356                 req = ha->req_q_map[que];
1357                 if (!req)
1358                         continue;
1359                 if (!req->outstanding_cmds)
1360                         continue;
1361                 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1362                         sp = req->outstanding_cmds[cnt];
1363                         if (sp) {
1364                                 req->outstanding_cmds[cnt] = NULL;
1365                                 sp->done(vha, sp, res);
1366                         }
1367                 }
1368         }
1369         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1370 }
1371
1372 static int
1373 qla2xxx_slave_alloc(struct scsi_device *sdev)
1374 {
1375         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1376
1377         if (!rport || fc_remote_port_chkready(rport))
1378                 return -ENXIO;
1379
1380         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1381
1382         return 0;
1383 }
1384
1385 static int
1386 qla2xxx_slave_configure(struct scsi_device *sdev)
1387 {
1388         scsi_qla_host_t *vha = shost_priv(sdev->host);
1389         struct req_que *req = vha->req;
1390
1391         if (IS_T10_PI_CAPABLE(vha->hw))
1392                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1393
1394         if (sdev->tagged_supported)
1395                 scsi_activate_tcq(sdev, req->max_q_depth);
1396         else
1397                 scsi_deactivate_tcq(sdev, req->max_q_depth);
1398         return 0;
1399 }
1400
1401 static void
1402 qla2xxx_slave_destroy(struct scsi_device *sdev)
1403 {
1404         sdev->hostdata = NULL;
1405 }
1406
1407 static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
1408 {
1409         fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
1410
1411         if (!scsi_track_queue_full(sdev, qdepth))
1412                 return;
1413
1414         ql_dbg(ql_dbg_io, fcport->vha, 0x3029,
1415             "Queue depth adjusted-down to %d for nexus=%ld:%d:%d.\n",
1416             sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun);
1417 }
1418
1419 static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
1420 {
1421         fc_port_t *fcport = sdev->hostdata;
1422         struct scsi_qla_host *vha = fcport->vha;
1423         struct req_que *req = NULL;
1424
1425         req = vha->req;
1426         if (!req)
1427                 return;
1428
1429         if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
1430                 return;
1431
1432         if (sdev->ordered_tags)
1433                 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
1434         else
1435                 scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
1436
1437         ql_dbg(ql_dbg_io, vha, 0x302a,
1438             "Queue depth adjusted-up to %d for nexus=%ld:%d:%d.\n",
1439             sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun);
1440 }
1441
1442 static int
1443 qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
1444 {
1445         switch (reason) {
1446         case SCSI_QDEPTH_DEFAULT:
1447                 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
1448                 break;
1449         case SCSI_QDEPTH_QFULL:
1450                 qla2x00_handle_queue_full(sdev, qdepth);
1451                 break;
1452         case SCSI_QDEPTH_RAMP_UP:
1453                 qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
1454                 break;
1455         default:
1456                 return -EOPNOTSUPP;
1457         }
1458
1459         return sdev->queue_depth;
1460 }
1461
1462 static int
1463 qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
1464 {
1465         if (sdev->tagged_supported) {
1466                 scsi_set_tag_type(sdev, tag_type);
1467                 if (tag_type)
1468                         scsi_activate_tcq(sdev, sdev->queue_depth);
1469                 else
1470                         scsi_deactivate_tcq(sdev, sdev->queue_depth);
1471         } else
1472                 tag_type = 0;
1473
1474         return tag_type;
1475 }
1476
1477 /**
1478  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1479  * @ha: HA context
1480  *
1481  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1482  * supported addressing method.
1483  */
1484 static void
1485 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1486 {
1487         /* Assume a 32bit DMA mask. */
1488         ha->flags.enable_64bit_addressing = 0;
1489
1490         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1491                 /* Any upper-dword bits set? */
1492                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1493                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1494                         /* Ok, a 64bit DMA mask is applicable. */
1495                         ha->flags.enable_64bit_addressing = 1;
1496                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1497                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1498                         return;
1499                 }
1500         }
1501
1502         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1503         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1504 }
1505
1506 static void
1507 qla2x00_enable_intrs(struct qla_hw_data *ha)
1508 {
1509         unsigned long flags = 0;
1510         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1511
1512         spin_lock_irqsave(&ha->hardware_lock, flags);
1513         ha->interrupts_on = 1;
1514         /* enable risc and host interrupts */
1515         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1516         RD_REG_WORD(&reg->ictrl);
1517         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1518
1519 }
1520
1521 static void
1522 qla2x00_disable_intrs(struct qla_hw_data *ha)
1523 {
1524         unsigned long flags = 0;
1525         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1526
1527         spin_lock_irqsave(&ha->hardware_lock, flags);
1528         ha->interrupts_on = 0;
1529         /* disable risc and host interrupts */
1530         WRT_REG_WORD(&reg->ictrl, 0);
1531         RD_REG_WORD(&reg->ictrl);
1532         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1533 }
1534
1535 static void
1536 qla24xx_enable_intrs(struct qla_hw_data *ha)
1537 {
1538         unsigned long flags = 0;
1539         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1540
1541         spin_lock_irqsave(&ha->hardware_lock, flags);
1542         ha->interrupts_on = 1;
1543         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1544         RD_REG_DWORD(&reg->ictrl);
1545         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1546 }
1547
1548 static void
1549 qla24xx_disable_intrs(struct qla_hw_data *ha)
1550 {
1551         unsigned long flags = 0;
1552         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1553
1554         if (IS_NOPOLLING_TYPE(ha))
1555                 return;
1556         spin_lock_irqsave(&ha->hardware_lock, flags);
1557         ha->interrupts_on = 0;
1558         WRT_REG_DWORD(&reg->ictrl, 0);
1559         RD_REG_DWORD(&reg->ictrl);
1560         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1561 }
1562
1563 static int
1564 qla2x00_iospace_config(struct qla_hw_data *ha)
1565 {
1566         resource_size_t pio;
1567         uint16_t msix;
1568         int cpus;
1569
1570         if (pci_request_selected_regions(ha->pdev, ha->bars,
1571             QLA2XXX_DRIVER_NAME)) {
1572                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1573                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1574                     pci_name(ha->pdev));
1575                 goto iospace_error_exit;
1576         }
1577         if (!(ha->bars & 1))
1578                 goto skip_pio;
1579
1580         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1581         pio = pci_resource_start(ha->pdev, 0);
1582         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1583                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1584                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1585                             "Invalid pci I/O region size (%s).\n",
1586                             pci_name(ha->pdev));
1587                         pio = 0;
1588                 }
1589         } else {
1590                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1591                     "Region #0 no a PIO resource (%s).\n",
1592                     pci_name(ha->pdev));
1593                 pio = 0;
1594         }
1595         ha->pio_address = pio;
1596         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1597             "PIO address=%llu.\n",
1598             (unsigned long long)ha->pio_address);
1599
1600 skip_pio:
1601         /* Use MMIO operations for all accesses. */
1602         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1603                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1604                     "Region #1 not an MMIO resource (%s), aborting.\n",
1605                     pci_name(ha->pdev));
1606                 goto iospace_error_exit;
1607         }
1608         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1609                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1610                     "Invalid PCI mem region size (%s), aborting.\n",
1611                     pci_name(ha->pdev));
1612                 goto iospace_error_exit;
1613         }
1614
1615         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1616         if (!ha->iobase) {
1617                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1618                     "Cannot remap MMIO (%s), aborting.\n",
1619                     pci_name(ha->pdev));
1620                 goto iospace_error_exit;
1621         }
1622
1623         /* Determine queue resources */
1624         ha->max_req_queues = ha->max_rsp_queues = 1;
1625         if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
1626                 (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
1627                 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1628                 goto mqiobase_exit;
1629
1630         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1631                         pci_resource_len(ha->pdev, 3));
1632         if (ha->mqiobase) {
1633                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1634                     "MQIO Base=%p.\n", ha->mqiobase);
1635                 /* Read MSIX vector size of the board */
1636                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1637                 ha->msix_count = msix;
1638                 /* Max queues are bounded by available msix vectors */
1639                 /* queue 0 uses two msix vectors */
1640                 if (ql2xmultique_tag) {
1641                         cpus = num_online_cpus();
1642                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1643                                 (cpus + 1) : (ha->msix_count - 1);
1644                         ha->max_req_queues = 2;
1645                 } else if (ql2xmaxqueues > 1) {
1646                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1647                             QLA_MQ_SIZE : ql2xmaxqueues;
1648                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc008,
1649                             "QoS mode set, max no of request queues:%d.\n",
1650                             ha->max_req_queues);
1651                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0019,
1652                             "QoS mode set, max no of request queues:%d.\n",
1653                             ha->max_req_queues);
1654                 }
1655                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1656                     "MSI-X vector count: %d.\n", msix);
1657         } else
1658                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
1659                     "BAR 3 not enabled.\n");
1660
1661 mqiobase_exit:
1662         ha->msix_count = ha->max_rsp_queues + 1;
1663         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
1664             "MSIX Count:%d.\n", ha->msix_count);
1665         return (0);
1666
1667 iospace_error_exit:
1668         return (-ENOMEM);
1669 }
1670
1671
1672 static int
1673 qla83xx_iospace_config(struct qla_hw_data *ha)
1674 {
1675         uint16_t msix;
1676         int cpus;
1677
1678         if (pci_request_selected_regions(ha->pdev, ha->bars,
1679             QLA2XXX_DRIVER_NAME)) {
1680                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
1681                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1682                     pci_name(ha->pdev));
1683
1684                 goto iospace_error_exit;
1685         }
1686
1687         /* Use MMIO operations for all accesses. */
1688         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
1689                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
1690                     "Invalid pci I/O region size (%s).\n",
1691                     pci_name(ha->pdev));
1692                 goto iospace_error_exit;
1693         }
1694         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1695                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
1696                     "Invalid PCI mem region size (%s), aborting\n",
1697                         pci_name(ha->pdev));
1698                 goto iospace_error_exit;
1699         }
1700
1701         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
1702         if (!ha->iobase) {
1703                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
1704                     "Cannot remap MMIO (%s), aborting.\n",
1705                     pci_name(ha->pdev));
1706                 goto iospace_error_exit;
1707         }
1708
1709         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
1710         /* 83XX 26XX always use MQ type access for queues
1711          * - mbar 2, a.k.a region 4 */
1712         ha->max_req_queues = ha->max_rsp_queues = 1;
1713         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
1714                         pci_resource_len(ha->pdev, 4));
1715
1716         if (!ha->mqiobase) {
1717                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
1718                     "BAR2/region4 not enabled\n");
1719                 goto mqiobase_exit;
1720         }
1721
1722         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
1723                         pci_resource_len(ha->pdev, 2));
1724         if (ha->msixbase) {
1725                 /* Read MSIX vector size of the board */
1726                 pci_read_config_word(ha->pdev,
1727                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
1728                 ha->msix_count = msix;
1729                 /* Max queues are bounded by available msix vectors */
1730                 /* queue 0 uses two msix vectors */
1731                 if (ql2xmultique_tag) {
1732                         cpus = num_online_cpus();
1733                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1734                                 (cpus + 1) : (ha->msix_count - 1);
1735                         ha->max_req_queues = 2;
1736                 } else if (ql2xmaxqueues > 1) {
1737                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1738                                                 QLA_MQ_SIZE : ql2xmaxqueues;
1739                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc00c,
1740                             "QoS mode set, max no of request queues:%d.\n",
1741                             ha->max_req_queues);
1742                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
1743                             "QoS mode set, max no of request queues:%d.\n",
1744                             ha->max_req_queues);
1745                 }
1746                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
1747                     "MSI-X vector count: %d.\n", msix);
1748         } else
1749                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
1750                     "BAR 1 not enabled.\n");
1751
1752 mqiobase_exit:
1753         ha->msix_count = ha->max_rsp_queues + 1;
1754
1755         qlt_83xx_iospace_config(ha);
1756
1757         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
1758             "MSIX Count:%d.\n", ha->msix_count);
1759         return 0;
1760
1761 iospace_error_exit:
1762         return -ENOMEM;
1763 }
1764
1765 static struct isp_operations qla2100_isp_ops = {
1766         .pci_config             = qla2100_pci_config,
1767         .reset_chip             = qla2x00_reset_chip,
1768         .chip_diag              = qla2x00_chip_diag,
1769         .config_rings           = qla2x00_config_rings,
1770         .reset_adapter          = qla2x00_reset_adapter,
1771         .nvram_config           = qla2x00_nvram_config,
1772         .update_fw_options      = qla2x00_update_fw_options,
1773         .load_risc              = qla2x00_load_risc,
1774         .pci_info_str           = qla2x00_pci_info_str,
1775         .fw_version_str         = qla2x00_fw_version_str,
1776         .intr_handler           = qla2100_intr_handler,
1777         .enable_intrs           = qla2x00_enable_intrs,
1778         .disable_intrs          = qla2x00_disable_intrs,
1779         .abort_command          = qla2x00_abort_command,
1780         .target_reset           = qla2x00_abort_target,
1781         .lun_reset              = qla2x00_lun_reset,
1782         .fabric_login           = qla2x00_login_fabric,
1783         .fabric_logout          = qla2x00_fabric_logout,
1784         .calc_req_entries       = qla2x00_calc_iocbs_32,
1785         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1786         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1787         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1788         .read_nvram             = qla2x00_read_nvram_data,
1789         .write_nvram            = qla2x00_write_nvram_data,
1790         .fw_dump                = qla2100_fw_dump,
1791         .beacon_on              = NULL,
1792         .beacon_off             = NULL,
1793         .beacon_blink           = NULL,
1794         .read_optrom            = qla2x00_read_optrom_data,
1795         .write_optrom           = qla2x00_write_optrom_data,
1796         .get_flash_version      = qla2x00_get_flash_version,
1797         .start_scsi             = qla2x00_start_scsi,
1798         .abort_isp              = qla2x00_abort_isp,
1799         .iospace_config         = qla2x00_iospace_config,
1800         .initialize_adapter     = qla2x00_initialize_adapter,
1801 };
1802
1803 static struct isp_operations qla2300_isp_ops = {
1804         .pci_config             = qla2300_pci_config,
1805         .reset_chip             = qla2x00_reset_chip,
1806         .chip_diag              = qla2x00_chip_diag,
1807         .config_rings           = qla2x00_config_rings,
1808         .reset_adapter          = qla2x00_reset_adapter,
1809         .nvram_config           = qla2x00_nvram_config,
1810         .update_fw_options      = qla2x00_update_fw_options,
1811         .load_risc              = qla2x00_load_risc,
1812         .pci_info_str           = qla2x00_pci_info_str,
1813         .fw_version_str         = qla2x00_fw_version_str,
1814         .intr_handler           = qla2300_intr_handler,
1815         .enable_intrs           = qla2x00_enable_intrs,
1816         .disable_intrs          = qla2x00_disable_intrs,
1817         .abort_command          = qla2x00_abort_command,
1818         .target_reset           = qla2x00_abort_target,
1819         .lun_reset              = qla2x00_lun_reset,
1820         .fabric_login           = qla2x00_login_fabric,
1821         .fabric_logout          = qla2x00_fabric_logout,
1822         .calc_req_entries       = qla2x00_calc_iocbs_32,
1823         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1824         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1825         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1826         .read_nvram             = qla2x00_read_nvram_data,
1827         .write_nvram            = qla2x00_write_nvram_data,
1828         .fw_dump                = qla2300_fw_dump,
1829         .beacon_on              = qla2x00_beacon_on,
1830         .beacon_off             = qla2x00_beacon_off,
1831         .beacon_blink           = qla2x00_beacon_blink,
1832         .read_optrom            = qla2x00_read_optrom_data,
1833         .write_optrom           = qla2x00_write_optrom_data,
1834         .get_flash_version      = qla2x00_get_flash_version,
1835         .start_scsi             = qla2x00_start_scsi,
1836         .abort_isp              = qla2x00_abort_isp,
1837         .iospace_config         = qla2x00_iospace_config,
1838         .initialize_adapter     = qla2x00_initialize_adapter,
1839 };
1840
1841 static struct isp_operations qla24xx_isp_ops = {
1842         .pci_config             = qla24xx_pci_config,
1843         .reset_chip             = qla24xx_reset_chip,
1844         .chip_diag              = qla24xx_chip_diag,
1845         .config_rings           = qla24xx_config_rings,
1846         .reset_adapter          = qla24xx_reset_adapter,
1847         .nvram_config           = qla24xx_nvram_config,
1848         .update_fw_options      = qla24xx_update_fw_options,
1849         .load_risc              = qla24xx_load_risc,
1850         .pci_info_str           = qla24xx_pci_info_str,
1851         .fw_version_str         = qla24xx_fw_version_str,
1852         .intr_handler           = qla24xx_intr_handler,
1853         .enable_intrs           = qla24xx_enable_intrs,
1854         .disable_intrs          = qla24xx_disable_intrs,
1855         .abort_command          = qla24xx_abort_command,
1856         .target_reset           = qla24xx_abort_target,
1857         .lun_reset              = qla24xx_lun_reset,
1858         .fabric_login           = qla24xx_login_fabric,
1859         .fabric_logout          = qla24xx_fabric_logout,
1860         .calc_req_entries       = NULL,
1861         .build_iocbs            = NULL,
1862         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1863         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1864         .read_nvram             = qla24xx_read_nvram_data,
1865         .write_nvram            = qla24xx_write_nvram_data,
1866         .fw_dump                = qla24xx_fw_dump,
1867         .beacon_on              = qla24xx_beacon_on,
1868         .beacon_off             = qla24xx_beacon_off,
1869         .beacon_blink           = qla24xx_beacon_blink,
1870         .read_optrom            = qla24xx_read_optrom_data,
1871         .write_optrom           = qla24xx_write_optrom_data,
1872         .get_flash_version      = qla24xx_get_flash_version,
1873         .start_scsi             = qla24xx_start_scsi,
1874         .abort_isp              = qla2x00_abort_isp,
1875         .iospace_config         = qla2x00_iospace_config,
1876         .initialize_adapter     = qla2x00_initialize_adapter,
1877 };
1878
1879 static struct isp_operations qla25xx_isp_ops = {
1880         .pci_config             = qla25xx_pci_config,
1881         .reset_chip             = qla24xx_reset_chip,
1882         .chip_diag              = qla24xx_chip_diag,
1883         .config_rings           = qla24xx_config_rings,
1884         .reset_adapter          = qla24xx_reset_adapter,
1885         .nvram_config           = qla24xx_nvram_config,
1886         .update_fw_options      = qla24xx_update_fw_options,
1887         .load_risc              = qla24xx_load_risc,
1888         .pci_info_str           = qla24xx_pci_info_str,
1889         .fw_version_str         = qla24xx_fw_version_str,
1890         .intr_handler           = qla24xx_intr_handler,
1891         .enable_intrs           = qla24xx_enable_intrs,
1892         .disable_intrs          = qla24xx_disable_intrs,
1893         .abort_command          = qla24xx_abort_command,
1894         .target_reset           = qla24xx_abort_target,
1895         .lun_reset              = qla24xx_lun_reset,
1896         .fabric_login           = qla24xx_login_fabric,
1897         .fabric_logout          = qla24xx_fabric_logout,
1898         .calc_req_entries       = NULL,
1899         .build_iocbs            = NULL,
1900         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1901         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1902         .read_nvram             = qla25xx_read_nvram_data,
1903         .write_nvram            = qla25xx_write_nvram_data,
1904         .fw_dump                = qla25xx_fw_dump,
1905         .beacon_on              = qla24xx_beacon_on,
1906         .beacon_off             = qla24xx_beacon_off,
1907         .beacon_blink           = qla24xx_beacon_blink,
1908         .read_optrom            = qla25xx_read_optrom_data,
1909         .write_optrom           = qla24xx_write_optrom_data,
1910         .get_flash_version      = qla24xx_get_flash_version,
1911         .start_scsi             = qla24xx_dif_start_scsi,
1912         .abort_isp              = qla2x00_abort_isp,
1913         .iospace_config         = qla2x00_iospace_config,
1914         .initialize_adapter     = qla2x00_initialize_adapter,
1915 };
1916
1917 static struct isp_operations qla81xx_isp_ops = {
1918         .pci_config             = qla25xx_pci_config,
1919         .reset_chip             = qla24xx_reset_chip,
1920         .chip_diag              = qla24xx_chip_diag,
1921         .config_rings           = qla24xx_config_rings,
1922         .reset_adapter          = qla24xx_reset_adapter,
1923         .nvram_config           = qla81xx_nvram_config,
1924         .update_fw_options      = qla81xx_update_fw_options,
1925         .load_risc              = qla81xx_load_risc,
1926         .pci_info_str           = qla24xx_pci_info_str,
1927         .fw_version_str         = qla24xx_fw_version_str,
1928         .intr_handler           = qla24xx_intr_handler,
1929         .enable_intrs           = qla24xx_enable_intrs,
1930         .disable_intrs          = qla24xx_disable_intrs,
1931         .abort_command          = qla24xx_abort_command,
1932         .target_reset           = qla24xx_abort_target,
1933         .lun_reset              = qla24xx_lun_reset,
1934         .fabric_login           = qla24xx_login_fabric,
1935         .fabric_logout          = qla24xx_fabric_logout,
1936         .calc_req_entries       = NULL,
1937         .build_iocbs            = NULL,
1938         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1939         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1940         .read_nvram             = NULL,
1941         .write_nvram            = NULL,
1942         .fw_dump                = qla81xx_fw_dump,
1943         .beacon_on              = qla24xx_beacon_on,
1944         .beacon_off             = qla24xx_beacon_off,
1945         .beacon_blink           = qla83xx_beacon_blink,
1946         .read_optrom            = qla25xx_read_optrom_data,
1947         .write_optrom           = qla24xx_write_optrom_data,
1948         .get_flash_version      = qla24xx_get_flash_version,
1949         .start_scsi             = qla24xx_dif_start_scsi,
1950         .abort_isp              = qla2x00_abort_isp,
1951         .iospace_config         = qla2x00_iospace_config,
1952         .initialize_adapter     = qla2x00_initialize_adapter,
1953 };
1954
1955 static struct isp_operations qla82xx_isp_ops = {
1956         .pci_config             = qla82xx_pci_config,
1957         .reset_chip             = qla82xx_reset_chip,
1958         .chip_diag              = qla24xx_chip_diag,
1959         .config_rings           = qla82xx_config_rings,
1960         .reset_adapter          = qla24xx_reset_adapter,
1961         .nvram_config           = qla81xx_nvram_config,
1962         .update_fw_options      = qla24xx_update_fw_options,
1963         .load_risc              = qla82xx_load_risc,
1964         .pci_info_str           = qla24xx_pci_info_str,
1965         .fw_version_str         = qla24xx_fw_version_str,
1966         .intr_handler           = qla82xx_intr_handler,
1967         .enable_intrs           = qla82xx_enable_intrs,
1968         .disable_intrs          = qla82xx_disable_intrs,
1969         .abort_command          = qla24xx_abort_command,
1970         .target_reset           = qla24xx_abort_target,
1971         .lun_reset              = qla24xx_lun_reset,
1972         .fabric_login           = qla24xx_login_fabric,
1973         .fabric_logout          = qla24xx_fabric_logout,
1974         .calc_req_entries       = NULL,
1975         .build_iocbs            = NULL,
1976         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1977         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1978         .read_nvram             = qla24xx_read_nvram_data,
1979         .write_nvram            = qla24xx_write_nvram_data,
1980         .fw_dump                = qla82xx_fw_dump,
1981         .beacon_on              = qla82xx_beacon_on,
1982         .beacon_off             = qla82xx_beacon_off,
1983         .beacon_blink           = NULL,
1984         .read_optrom            = qla82xx_read_optrom_data,
1985         .write_optrom           = qla82xx_write_optrom_data,
1986         .get_flash_version      = qla82xx_get_flash_version,
1987         .start_scsi             = qla82xx_start_scsi,
1988         .abort_isp              = qla82xx_abort_isp,
1989         .iospace_config         = qla82xx_iospace_config,
1990         .initialize_adapter     = qla2x00_initialize_adapter,
1991 };
1992
1993 static struct isp_operations qla8044_isp_ops = {
1994         .pci_config             = qla82xx_pci_config,
1995         .reset_chip             = qla82xx_reset_chip,
1996         .chip_diag              = qla24xx_chip_diag,
1997         .config_rings           = qla82xx_config_rings,
1998         .reset_adapter          = qla24xx_reset_adapter,
1999         .nvram_config           = qla81xx_nvram_config,
2000         .update_fw_options      = qla24xx_update_fw_options,
2001         .load_risc              = qla82xx_load_risc,
2002         .pci_info_str           = qla24xx_pci_info_str,
2003         .fw_version_str         = qla24xx_fw_version_str,
2004         .intr_handler           = qla8044_intr_handler,
2005         .enable_intrs           = qla82xx_enable_intrs,
2006         .disable_intrs          = qla82xx_disable_intrs,
2007         .abort_command          = qla24xx_abort_command,
2008         .target_reset           = qla24xx_abort_target,
2009         .lun_reset              = qla24xx_lun_reset,
2010         .fabric_login           = qla24xx_login_fabric,
2011         .fabric_logout          = qla24xx_fabric_logout,
2012         .calc_req_entries       = NULL,
2013         .build_iocbs            = NULL,
2014         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2015         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2016         .read_nvram             = NULL,
2017         .write_nvram            = NULL,
2018         .fw_dump                = qla8044_fw_dump,
2019         .beacon_on              = qla82xx_beacon_on,
2020         .beacon_off             = qla82xx_beacon_off,
2021         .beacon_blink           = NULL,
2022         .read_optrom            = qla8044_read_optrom_data,
2023         .write_optrom           = qla8044_write_optrom_data,
2024         .get_flash_version      = qla82xx_get_flash_version,
2025         .start_scsi             = qla82xx_start_scsi,
2026         .abort_isp              = qla8044_abort_isp,
2027         .iospace_config         = qla82xx_iospace_config,
2028         .initialize_adapter     = qla2x00_initialize_adapter,
2029 };
2030
2031 static struct isp_operations qla83xx_isp_ops = {
2032         .pci_config             = qla25xx_pci_config,
2033         .reset_chip             = qla24xx_reset_chip,
2034         .chip_diag              = qla24xx_chip_diag,
2035         .config_rings           = qla24xx_config_rings,
2036         .reset_adapter          = qla24xx_reset_adapter,
2037         .nvram_config           = qla81xx_nvram_config,
2038         .update_fw_options      = qla81xx_update_fw_options,
2039         .load_risc              = qla81xx_load_risc,
2040         .pci_info_str           = qla24xx_pci_info_str,
2041         .fw_version_str         = qla24xx_fw_version_str,
2042         .intr_handler           = qla24xx_intr_handler,
2043         .enable_intrs           = qla24xx_enable_intrs,
2044         .disable_intrs          = qla24xx_disable_intrs,
2045         .abort_command          = qla24xx_abort_command,
2046         .target_reset           = qla24xx_abort_target,
2047         .lun_reset              = qla24xx_lun_reset,
2048         .fabric_login           = qla24xx_login_fabric,
2049         .fabric_logout          = qla24xx_fabric_logout,
2050         .calc_req_entries       = NULL,
2051         .build_iocbs            = NULL,
2052         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2053         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2054         .read_nvram             = NULL,
2055         .write_nvram            = NULL,
2056         .fw_dump                = qla83xx_fw_dump,
2057         .beacon_on              = qla24xx_beacon_on,
2058         .beacon_off             = qla24xx_beacon_off,
2059         .beacon_blink           = qla83xx_beacon_blink,
2060         .read_optrom            = qla25xx_read_optrom_data,
2061         .write_optrom           = qla24xx_write_optrom_data,
2062         .get_flash_version      = qla24xx_get_flash_version,
2063         .start_scsi             = qla24xx_dif_start_scsi,
2064         .abort_isp              = qla2x00_abort_isp,
2065         .iospace_config         = qla83xx_iospace_config,
2066         .initialize_adapter     = qla2x00_initialize_adapter,
2067 };
2068
2069 static struct isp_operations qlafx00_isp_ops = {
2070         .pci_config             = qlafx00_pci_config,
2071         .reset_chip             = qlafx00_soft_reset,
2072         .chip_diag              = qlafx00_chip_diag,
2073         .config_rings           = qlafx00_config_rings,
2074         .reset_adapter          = qlafx00_soft_reset,
2075         .nvram_config           = NULL,
2076         .update_fw_options      = NULL,
2077         .load_risc              = NULL,
2078         .pci_info_str           = qlafx00_pci_info_str,
2079         .fw_version_str         = qlafx00_fw_version_str,
2080         .intr_handler           = qlafx00_intr_handler,
2081         .enable_intrs           = qlafx00_enable_intrs,
2082         .disable_intrs          = qlafx00_disable_intrs,
2083         .abort_command          = qla24xx_async_abort_command,
2084         .target_reset           = qlafx00_abort_target,
2085         .lun_reset              = qlafx00_lun_reset,
2086         .fabric_login           = NULL,
2087         .fabric_logout          = NULL,
2088         .calc_req_entries       = NULL,
2089         .build_iocbs            = NULL,
2090         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2091         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2092         .read_nvram             = qla24xx_read_nvram_data,
2093         .write_nvram            = qla24xx_write_nvram_data,
2094         .fw_dump                = NULL,
2095         .beacon_on              = qla24xx_beacon_on,
2096         .beacon_off             = qla24xx_beacon_off,
2097         .beacon_blink           = NULL,
2098         .read_optrom            = qla24xx_read_optrom_data,
2099         .write_optrom           = qla24xx_write_optrom_data,
2100         .get_flash_version      = qla24xx_get_flash_version,
2101         .start_scsi             = qlafx00_start_scsi,
2102         .abort_isp              = qlafx00_abort_isp,
2103         .iospace_config         = qlafx00_iospace_config,
2104         .initialize_adapter     = qlafx00_initialize_adapter,
2105 };
2106
2107 static struct isp_operations qla27xx_isp_ops = {
2108         .pci_config             = qla25xx_pci_config,
2109         .reset_chip             = qla24xx_reset_chip,
2110         .chip_diag              = qla24xx_chip_diag,
2111         .config_rings           = qla24xx_config_rings,
2112         .reset_adapter          = qla24xx_reset_adapter,
2113         .nvram_config           = qla81xx_nvram_config,
2114         .update_fw_options      = qla81xx_update_fw_options,
2115         .load_risc              = qla81xx_load_risc,
2116         .pci_info_str           = qla24xx_pci_info_str,
2117         .fw_version_str         = qla24xx_fw_version_str,
2118         .intr_handler           = qla24xx_intr_handler,
2119         .enable_intrs           = qla24xx_enable_intrs,
2120         .disable_intrs          = qla24xx_disable_intrs,
2121         .abort_command          = qla24xx_abort_command,
2122         .target_reset           = qla24xx_abort_target,
2123         .lun_reset              = qla24xx_lun_reset,
2124         .fabric_login           = qla24xx_login_fabric,
2125         .fabric_logout          = qla24xx_fabric_logout,
2126         .calc_req_entries       = NULL,
2127         .build_iocbs            = NULL,
2128         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2129         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2130         .read_nvram             = NULL,
2131         .write_nvram            = NULL,
2132         .fw_dump                = qla27xx_fwdump,
2133         .beacon_on              = qla24xx_beacon_on,
2134         .beacon_off             = qla24xx_beacon_off,
2135         .beacon_blink           = qla83xx_beacon_blink,
2136         .read_optrom            = qla25xx_read_optrom_data,
2137         .write_optrom           = qla24xx_write_optrom_data,
2138         .get_flash_version      = qla24xx_get_flash_version,
2139         .start_scsi             = qla24xx_dif_start_scsi,
2140         .abort_isp              = qla2x00_abort_isp,
2141         .iospace_config         = qla83xx_iospace_config,
2142         .initialize_adapter     = qla2x00_initialize_adapter,
2143 };
2144
2145 static inline void
2146 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2147 {
2148         ha->device_type = DT_EXTENDED_IDS;
2149         switch (ha->pdev->device) {
2150         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2151                 ha->device_type |= DT_ISP2100;
2152                 ha->device_type &= ~DT_EXTENDED_IDS;
2153                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2154                 break;
2155         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2156                 ha->device_type |= DT_ISP2200;
2157                 ha->device_type &= ~DT_EXTENDED_IDS;
2158                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2159                 break;
2160         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2161                 ha->device_type |= DT_ISP2300;
2162                 ha->device_type |= DT_ZIO_SUPPORTED;
2163                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2164                 break;
2165         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2166                 ha->device_type |= DT_ISP2312;
2167                 ha->device_type |= DT_ZIO_SUPPORTED;
2168                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2169                 break;
2170         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2171                 ha->device_type |= DT_ISP2322;
2172                 ha->device_type |= DT_ZIO_SUPPORTED;
2173                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2174                     ha->pdev->subsystem_device == 0x0170)
2175                         ha->device_type |= DT_OEM_001;
2176                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2177                 break;
2178         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2179                 ha->device_type |= DT_ISP6312;
2180                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2181                 break;
2182         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2183                 ha->device_type |= DT_ISP6322;
2184                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2185                 break;
2186         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2187                 ha->device_type |= DT_ISP2422;
2188                 ha->device_type |= DT_ZIO_SUPPORTED;
2189                 ha->device_type |= DT_FWI2;
2190                 ha->device_type |= DT_IIDMA;
2191                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2192                 break;
2193         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2194                 ha->device_type |= DT_ISP2432;
2195                 ha->device_type |= DT_ZIO_SUPPORTED;
2196                 ha->device_type |= DT_FWI2;
2197                 ha->device_type |= DT_IIDMA;
2198                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2199                 break;
2200         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2201                 ha->device_type |= DT_ISP8432;
2202                 ha->device_type |= DT_ZIO_SUPPORTED;
2203                 ha->device_type |= DT_FWI2;
2204                 ha->device_type |= DT_IIDMA;
2205                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2206                 break;
2207         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2208                 ha->device_type |= DT_ISP5422;
2209                 ha->device_type |= DT_FWI2;
2210                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2211                 break;
2212         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2213                 ha->device_type |= DT_ISP5432;
2214                 ha->device_type |= DT_FWI2;
2215                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2216                 break;
2217         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2218                 ha->device_type |= DT_ISP2532;
2219                 ha->device_type |= DT_ZIO_SUPPORTED;
2220                 ha->device_type |= DT_FWI2;
2221                 ha->device_type |= DT_IIDMA;
2222                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2223                 break;
2224         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2225                 ha->device_type |= DT_ISP8001;
2226                 ha->device_type |= DT_ZIO_SUPPORTED;
2227                 ha->device_type |= DT_FWI2;
2228                 ha->device_type |= DT_IIDMA;
2229                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2230                 break;
2231         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2232                 ha->device_type |= DT_ISP8021;
2233                 ha->device_type |= DT_ZIO_SUPPORTED;
2234                 ha->device_type |= DT_FWI2;
2235                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2236                 /* Initialize 82XX ISP flags */
2237                 qla82xx_init_flags(ha);
2238                 break;
2239          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2240                 ha->device_type |= DT_ISP8044;
2241                 ha->device_type |= DT_ZIO_SUPPORTED;
2242                 ha->device_type |= DT_FWI2;
2243                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2244                 /* Initialize 82XX ISP flags */
2245                 qla82xx_init_flags(ha);
2246                 break;
2247         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2248                 ha->device_type |= DT_ISP2031;
2249                 ha->device_type |= DT_ZIO_SUPPORTED;
2250                 ha->device_type |= DT_FWI2;
2251                 ha->device_type |= DT_IIDMA;
2252                 ha->device_type |= DT_T10_PI;
2253                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2254                 break;
2255         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2256                 ha->device_type |= DT_ISP8031;
2257                 ha->device_type |= DT_ZIO_SUPPORTED;
2258                 ha->device_type |= DT_FWI2;
2259                 ha->device_type |= DT_IIDMA;
2260                 ha->device_type |= DT_T10_PI;
2261                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2262                 break;
2263         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2264                 ha->device_type |= DT_ISPFX00;
2265                 break;
2266         case PCI_DEVICE_ID_QLOGIC_ISP2071:
2267                 ha->device_type |= DT_ISP2071;
2268                 ha->device_type |= DT_ZIO_SUPPORTED;
2269                 ha->device_type |= DT_FWI2;
2270                 ha->device_type |= DT_IIDMA;
2271                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2272                 break;
2273         case PCI_DEVICE_ID_QLOGIC_ISP2271:
2274                 ha->device_type |= DT_ISP2271;
2275                 ha->device_type |= DT_ZIO_SUPPORTED;
2276                 ha->device_type |= DT_FWI2;
2277                 ha->device_type |= DT_IIDMA;
2278                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2279                 break;
2280         }
2281
2282         if (IS_QLA82XX(ha))
2283                 ha->port_no = ha->portnum & 1;
2284         else {
2285                 /* Get adapter physical port no from interrupt pin register. */
2286                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2287                 if (IS_QLA27XX(ha))
2288                         ha->port_no--;
2289                 else
2290                         ha->port_no = !(ha->port_no & 1);
2291         }
2292
2293         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2294             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2295             ha->device_type, ha->port_no, ha->fw_srisc_address);
2296 }
2297
2298 static void
2299 qla2xxx_scan_start(struct Scsi_Host *shost)
2300 {
2301         scsi_qla_host_t *vha = shost_priv(shost);
2302
2303         if (vha->hw->flags.running_gold_fw)
2304                 return;
2305
2306         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2307         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2308         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2309         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2310 }
2311
2312 static int
2313 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2314 {
2315         scsi_qla_host_t *vha = shost_priv(shost);
2316
2317         if (!vha->host)
2318                 return 1;
2319         if (time > vha->hw->loop_reset_delay * HZ)
2320                 return 1;
2321
2322         return atomic_read(&vha->loop_state) == LOOP_READY;
2323 }
2324
2325 /*
2326  * PCI driver interface
2327  */
2328 static int
2329 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2330 {
2331         int     ret = -ENODEV;
2332         struct Scsi_Host *host;
2333         scsi_qla_host_t *base_vha = NULL;
2334         struct qla_hw_data *ha;
2335         char pci_info[30];
2336         char fw_str[30], wq_name[30];
2337         struct scsi_host_template *sht;
2338         int bars, mem_only = 0;
2339         uint16_t req_length = 0, rsp_length = 0;
2340         struct req_que *req = NULL;
2341         struct rsp_que *rsp = NULL;
2342         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2343         sht = &qla2xxx_driver_template;
2344         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2345             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2346             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2347             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2348             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2349             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2350             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2351             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2352             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2353             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2354             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2355             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2356             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2357             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271) {
2358                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2359                 mem_only = 1;
2360                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2361                     "Mem only adapter.\n");
2362         }
2363         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2364             "Bars=%d.\n", bars);
2365
2366         if (mem_only) {
2367                 if (pci_enable_device_mem(pdev))
2368                         goto probe_out;
2369         } else {
2370                 if (pci_enable_device(pdev))
2371                         goto probe_out;
2372         }
2373
2374         /* This may fail but that's ok */
2375         pci_enable_pcie_error_reporting(pdev);
2376
2377         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2378         if (!ha) {
2379                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2380                     "Unable to allocate memory for ha.\n");
2381                 goto probe_out;
2382         }
2383         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2384             "Memory allocated for ha=%p.\n", ha);
2385         ha->pdev = pdev;
2386         ha->tgt.enable_class_2 = ql2xenableclass2;
2387
2388         /* Clear our data area */
2389         ha->bars = bars;
2390         ha->mem_only = mem_only;
2391         spin_lock_init(&ha->hardware_lock);
2392         spin_lock_init(&ha->vport_slock);
2393         mutex_init(&ha->selflogin_lock);
2394         mutex_init(&ha->optrom_mutex);
2395
2396         /* Set ISP-type information. */
2397         qla2x00_set_isp_flags(ha);
2398
2399         /* Set EEH reset type to fundamental if required by hba */
2400         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2401             IS_QLA83XX(ha) || IS_QLA27XX(ha))
2402                 pdev->needs_freset = 1;
2403
2404         ha->prev_topology = 0;
2405         ha->init_cb_size = sizeof(init_cb_t);
2406         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2407         ha->optrom_size = OPTROM_SIZE_2300;
2408
2409         /* Assign ISP specific operations. */
2410         if (IS_QLA2100(ha)) {
2411                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2412                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2413                 req_length = REQUEST_ENTRY_CNT_2100;
2414                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2415                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2416                 ha->gid_list_info_size = 4;
2417                 ha->flash_conf_off = ~0;
2418                 ha->flash_data_off = ~0;
2419                 ha->nvram_conf_off = ~0;
2420                 ha->nvram_data_off = ~0;
2421                 ha->isp_ops = &qla2100_isp_ops;
2422         } else if (IS_QLA2200(ha)) {
2423                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2424                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2425                 req_length = REQUEST_ENTRY_CNT_2200;
2426                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2427                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2428                 ha->gid_list_info_size = 4;
2429                 ha->flash_conf_off = ~0;
2430                 ha->flash_data_off = ~0;
2431                 ha->nvram_conf_off = ~0;
2432                 ha->nvram_data_off = ~0;
2433                 ha->isp_ops = &qla2100_isp_ops;
2434         } else if (IS_QLA23XX(ha)) {
2435                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2436                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2437                 req_length = REQUEST_ENTRY_CNT_2200;
2438                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2439                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2440                 ha->gid_list_info_size = 6;
2441                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2442                         ha->optrom_size = OPTROM_SIZE_2322;
2443                 ha->flash_conf_off = ~0;
2444                 ha->flash_data_off = ~0;
2445                 ha->nvram_conf_off = ~0;
2446                 ha->nvram_data_off = ~0;
2447                 ha->isp_ops = &qla2300_isp_ops;
2448         } else if (IS_QLA24XX_TYPE(ha)) {
2449                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2450                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2451                 req_length = REQUEST_ENTRY_CNT_24XX;
2452                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2453                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2454                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2455                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2456                 ha->gid_list_info_size = 8;
2457                 ha->optrom_size = OPTROM_SIZE_24XX;
2458                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2459                 ha->isp_ops = &qla24xx_isp_ops;
2460                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2461                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2462                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2463                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2464         } else if (IS_QLA25XX(ha)) {
2465                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2466                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2467                 req_length = REQUEST_ENTRY_CNT_24XX;
2468                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2469                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2470                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2471                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2472                 ha->gid_list_info_size = 8;
2473                 ha->optrom_size = OPTROM_SIZE_25XX;
2474                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2475                 ha->isp_ops = &qla25xx_isp_ops;
2476                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2477                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2478                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2479                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2480         } else if (IS_QLA81XX(ha)) {
2481                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2482                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2483                 req_length = REQUEST_ENTRY_CNT_24XX;
2484                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2485                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2486                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2487                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2488                 ha->gid_list_info_size = 8;
2489                 ha->optrom_size = OPTROM_SIZE_81XX;
2490                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2491                 ha->isp_ops = &qla81xx_isp_ops;
2492                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2493                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2494                 ha->nvram_conf_off = ~0;
2495                 ha->nvram_data_off = ~0;
2496         } else if (IS_QLA82XX(ha)) {
2497                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2498                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2499                 req_length = REQUEST_ENTRY_CNT_82XX;
2500                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2501                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2502                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2503                 ha->gid_list_info_size = 8;
2504                 ha->optrom_size = OPTROM_SIZE_82XX;
2505                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2506                 ha->isp_ops = &qla82xx_isp_ops;
2507                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2508                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2509                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2510                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2511         } else if (IS_QLA8044(ha)) {
2512                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2513                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2514                 req_length = REQUEST_ENTRY_CNT_82XX;
2515                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2516                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2517                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2518                 ha->gid_list_info_size = 8;
2519                 ha->optrom_size = OPTROM_SIZE_83XX;
2520                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2521                 ha->isp_ops = &qla8044_isp_ops;
2522                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2523                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2524                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2525                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2526         } else if (IS_QLA83XX(ha)) {
2527                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2528                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2529                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2530                 req_length = REQUEST_ENTRY_CNT_24XX;
2531                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2532                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2533                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2534                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2535                 ha->gid_list_info_size = 8;
2536                 ha->optrom_size = OPTROM_SIZE_83XX;
2537                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2538                 ha->isp_ops = &qla83xx_isp_ops;
2539                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2540                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2541                 ha->nvram_conf_off = ~0;
2542                 ha->nvram_data_off = ~0;
2543         }  else if (IS_QLAFX00(ha)) {
2544                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
2545                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
2546                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
2547                 req_length = REQUEST_ENTRY_CNT_FX00;
2548                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
2549                 ha->isp_ops = &qlafx00_isp_ops;
2550                 ha->port_down_retry_count = 30; /* default value */
2551                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
2552                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2553                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
2554                 ha->mr.fw_hbt_en = 1;
2555                 ha->mr.host_info_resend = false;
2556                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
2557         } else if (IS_QLA27XX(ha)) {
2558                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2559                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2560                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2561                 req_length = REQUEST_ENTRY_CNT_24XX;
2562                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2563                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2564                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2565                 ha->gid_list_info_size = 8;
2566                 ha->optrom_size = OPTROM_SIZE_83XX;
2567                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2568                 ha->isp_ops = &qla27xx_isp_ops;
2569                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2570                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2571                 ha->nvram_conf_off = ~0;
2572                 ha->nvram_data_off = ~0;
2573         }
2574
2575         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2576             "mbx_count=%d, req_length=%d, "
2577             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2578             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2579             "max_fibre_devices=%d.\n",
2580             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2581             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2582             ha->nvram_npiv_size, ha->max_fibre_devices);
2583         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2584             "isp_ops=%p, flash_conf_off=%d, "
2585             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2586             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2587             ha->nvram_conf_off, ha->nvram_data_off);
2588
2589         /* Configure PCI I/O space */
2590         ret = ha->isp_ops->iospace_config(ha);
2591         if (ret)
2592                 goto iospace_config_failed;
2593
2594         ql_log_pci(ql_log_info, pdev, 0x001d,
2595             "Found an ISP%04X irq %d iobase 0x%p.\n",
2596             pdev->device, pdev->irq, ha->iobase);
2597         mutex_init(&ha->vport_lock);
2598         init_completion(&ha->mbx_cmd_comp);
2599         complete(&ha->mbx_cmd_comp);
2600         init_completion(&ha->mbx_intr_comp);
2601         init_completion(&ha->dcbx_comp);
2602         init_completion(&ha->lb_portup_comp);
2603
2604         set_bit(0, (unsigned long *) ha->vp_idx_map);
2605
2606         qla2x00_config_dma_addressing(ha);
2607         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
2608             "64 Bit addressing is %s.\n",
2609             ha->flags.enable_64bit_addressing ? "enable" :
2610             "disable");
2611         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2612         if (ret) {
2613                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
2614                     "Failed to allocate memory for adapter, aborting.\n");
2615
2616                 goto probe_hw_failed;
2617         }
2618
2619         req->max_q_depth = MAX_Q_DEPTH;
2620         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2621                 req->max_q_depth = ql2xmaxqdepth;
2622
2623
2624         base_vha = qla2x00_create_host(sht, ha);
2625         if (!base_vha) {
2626                 ret = -ENOMEM;
2627                 qla2x00_mem_free(ha);
2628                 qla2x00_free_req_que(ha, req);
2629                 qla2x00_free_rsp_que(ha, rsp);
2630                 goto probe_hw_failed;
2631         }
2632
2633         pci_set_drvdata(pdev, base_vha);
2634
2635         host = base_vha->host;
2636         base_vha->req = req;
2637         if (IS_QLA2XXX_MIDTYPE(ha))
2638                 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
2639         else
2640                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2641                                                 base_vha->vp_idx;
2642
2643         /* Setup fcport template structure. */
2644         ha->mr.fcport.vha = base_vha;
2645         ha->mr.fcport.port_type = FCT_UNKNOWN;
2646         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
2647         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
2648         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
2649         ha->mr.fcport.scan_state = 1;
2650
2651         /* Set the SG table size based on ISP type */
2652         if (!IS_FWI2_CAPABLE(ha)) {
2653                 if (IS_QLA2100(ha))
2654                         host->sg_tablesize = 32;
2655         } else {
2656                 if (!IS_QLA82XX(ha))
2657                         host->sg_tablesize = QLA_SG_ALL;
2658         }
2659         host->max_id = ha->max_fibre_devices;
2660         host->cmd_per_lun = 3;
2661         host->unique_id = host->host_no;
2662         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
2663                 host->max_cmd_len = 32;
2664         else
2665                 host->max_cmd_len = MAX_CMDSZ;
2666         host->max_channel = MAX_BUSES - 1;
2667         host->max_lun = ql2xmaxlun;
2668         host->transportt = qla2xxx_transport_template;
2669         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
2670
2671         ql_dbg(ql_dbg_init, base_vha, 0x0033,
2672             "max_id=%d this_id=%d "
2673             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
2674             "max_lun=%d transportt=%p, vendor_id=%llu.\n", host->max_id,
2675             host->this_id, host->cmd_per_lun, host->unique_id,
2676             host->max_cmd_len, host->max_channel, host->max_lun,
2677             host->transportt, sht->vendor_id);
2678
2679 que_init:
2680         /* Alloc arrays of request and response ring ptrs */
2681         if (!qla2x00_alloc_queues(ha, req, rsp)) {
2682                 ql_log(ql_log_fatal, base_vha, 0x003d,
2683                     "Failed to allocate memory for queue pointers..."
2684                     "aborting.\n");
2685                 goto probe_init_failed;
2686         }
2687
2688         qlt_probe_one_stage1(base_vha, ha);
2689
2690         /* Set up the irqs */
2691         ret = qla2x00_request_irqs(ha, rsp);
2692         if (ret)
2693                 goto probe_init_failed;
2694
2695         pci_save_state(pdev);
2696
2697         /* Assign back pointers */
2698         rsp->req = req;
2699         req->rsp = rsp;
2700
2701         if (IS_QLAFX00(ha)) {
2702                 ha->rsp_q_map[0] = rsp;
2703                 ha->req_q_map[0] = req;
2704                 set_bit(0, ha->req_qid_map);
2705                 set_bit(0, ha->rsp_qid_map);
2706         }
2707
2708         /* FWI2-capable only. */
2709         req->req_q_in = &ha->iobase->isp24.req_q_in;
2710         req->req_q_out = &ha->iobase->isp24.req_q_out;
2711         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2712         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
2713         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
2714                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2715                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2716                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2717                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
2718         }
2719
2720         if (IS_QLAFX00(ha)) {
2721                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
2722                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
2723                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
2724                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
2725         }
2726
2727         if (IS_P3P_TYPE(ha)) {
2728                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2729                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2730                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2731         }
2732
2733         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
2734             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2735             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2736         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
2737             "req->req_q_in=%p req->req_q_out=%p "
2738             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2739             req->req_q_in, req->req_q_out,
2740             rsp->rsp_q_in, rsp->rsp_q_out);
2741         ql_dbg(ql_dbg_init, base_vha, 0x003e,
2742             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2743             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2744         ql_dbg(ql_dbg_init, base_vha, 0x003f,
2745             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2746             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
2747
2748         if (ha->isp_ops->initialize_adapter(base_vha)) {
2749                 ql_log(ql_log_fatal, base_vha, 0x00d6,
2750                     "Failed to initialize adapter - Adapter flags %x.\n",
2751                     base_vha->device_flags);
2752
2753                 if (IS_QLA82XX(ha)) {
2754                         qla82xx_idc_lock(ha);
2755                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2756                                 QLA8XXX_DEV_FAILED);
2757                         qla82xx_idc_unlock(ha);
2758                         ql_log(ql_log_fatal, base_vha, 0x00d7,
2759                             "HW State: FAILED.\n");
2760                 } else if (IS_QLA8044(ha)) {
2761                         qla8044_idc_lock(ha);
2762                         qla8044_wr_direct(base_vha,
2763                                 QLA8044_CRB_DEV_STATE_INDEX,
2764                                 QLA8XXX_DEV_FAILED);
2765                         qla8044_idc_unlock(ha);
2766                         ql_log(ql_log_fatal, base_vha, 0x0150,
2767                             "HW State: FAILED.\n");
2768                 }
2769
2770                 ret = -ENODEV;
2771                 goto probe_failed;
2772         }
2773
2774         if (IS_QLAFX00(ha))
2775                 host->can_queue = QLAFX00_MAX_CANQUEUE;
2776         else
2777                 host->can_queue = req->num_outstanding_cmds - 10;
2778
2779         ql_dbg(ql_dbg_init, base_vha, 0x0032,
2780             "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
2781             host->can_queue, base_vha->req,
2782             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
2783
2784         if (ha->mqenable) {
2785                 if (qla25xx_setup_mode(base_vha)) {
2786                         ql_log(ql_log_warn, base_vha, 0x00ec,
2787                             "Failed to create queues, falling back to single queue mode.\n");
2788                         goto que_init;
2789                 }
2790         }
2791
2792         if (ha->flags.running_gold_fw)
2793                 goto skip_dpc;
2794
2795         /*
2796          * Startup the kernel thread for this host adapter
2797          */
2798         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
2799             "%s_dpc", base_vha->host_str);
2800         if (IS_ERR(ha->dpc_thread)) {
2801                 ql_log(ql_log_fatal, base_vha, 0x00ed,
2802                     "Failed to start DPC thread.\n");
2803                 ret = PTR_ERR(ha->dpc_thread);
2804                 goto probe_failed;
2805         }
2806         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
2807             "DPC thread started successfully.\n");
2808
2809         /*
2810          * If we're not coming up in initiator mode, we might sit for
2811          * a while without waking up the dpc thread, which leads to a
2812          * stuck process warning.  So just kick the dpc once here and
2813          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
2814          */
2815         qla2xxx_wake_dpc(base_vha);
2816
2817         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
2818
2819         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
2820                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
2821                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
2822                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
2823
2824                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
2825                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
2826                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
2827                 INIT_WORK(&ha->idc_state_handler,
2828                     qla83xx_idc_state_handler_work);
2829                 INIT_WORK(&ha->nic_core_unrecoverable,
2830                     qla83xx_nic_core_unrecoverable_work);
2831         }
2832
2833 skip_dpc:
2834         list_add_tail(&base_vha->list, &ha->vp_list);
2835         base_vha->host->irq = ha->pdev->irq;
2836
2837         /* Initialized the timer */
2838         qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
2839         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
2840             "Started qla2x00_timer with "
2841             "interval=%d.\n", WATCH_INTERVAL);
2842         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
2843             "Detected hba at address=%p.\n",
2844             ha);
2845
2846         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
2847                 if (ha->fw_attributes & BIT_4) {
2848                         int prot = 0, guard;
2849                         base_vha->flags.difdix_supported = 1;
2850                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
2851                             "Registering for DIF/DIX type 1 and 3 protection.\n");
2852                         if (ql2xenabledif == 1)
2853                                 prot = SHOST_DIX_TYPE0_PROTECTION;
2854                         scsi_host_set_prot(host,
2855                             prot | SHOST_DIF_TYPE1_PROTECTION
2856                             | SHOST_DIF_TYPE2_PROTECTION
2857                             | SHOST_DIF_TYPE3_PROTECTION
2858                             | SHOST_DIX_TYPE1_PROTECTION
2859                             | SHOST_DIX_TYPE2_PROTECTION
2860                             | SHOST_DIX_TYPE3_PROTECTION);
2861
2862                         guard = SHOST_DIX_GUARD_CRC;
2863
2864                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
2865                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
2866                                 guard |= SHOST_DIX_GUARD_IP;
2867
2868                         scsi_host_set_guard(host, guard);
2869                 } else
2870                         base_vha->flags.difdix_supported = 0;
2871         }
2872
2873         ha->isp_ops->enable_intrs(ha);
2874
2875         if (IS_QLAFX00(ha)) {
2876                 ret = qlafx00_fx_disc(base_vha,
2877                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
2878                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
2879                     QLA_SG_ALL : 128;
2880         }
2881
2882         ret = scsi_add_host(host, &pdev->dev);
2883         if (ret)
2884                 goto probe_failed;
2885
2886         base_vha->flags.init_done = 1;
2887         base_vha->flags.online = 1;
2888         ha->prev_minidump_failed = 0;
2889
2890         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
2891             "Init done and hba is online.\n");
2892
2893         if (qla_ini_mode_enabled(base_vha))
2894                 scsi_scan_host(host);
2895         else
2896                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
2897                         "skipping scsi_scan_host() for non-initiator port\n");
2898
2899         qla2x00_alloc_sysfs_attr(base_vha);
2900
2901         if (IS_QLAFX00(ha)) {
2902                 ret = qlafx00_fx_disc(base_vha,
2903                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
2904
2905                 /* Register system information */
2906                 ret =  qlafx00_fx_disc(base_vha,
2907                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
2908         }
2909
2910         qla2x00_init_host_attr(base_vha);
2911
2912         qla2x00_dfs_setup(base_vha);
2913
2914         ql_log(ql_log_info, base_vha, 0x00fb,
2915             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
2916         ql_log(ql_log_info, base_vha, 0x00fc,
2917             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
2918             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
2919             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
2920             base_vha->host_no,
2921             ha->isp_ops->fw_version_str(base_vha, fw_str));
2922
2923         qlt_add_target(ha, base_vha);
2924
2925         return 0;
2926
2927 probe_init_failed:
2928         qla2x00_free_req_que(ha, req);
2929         ha->req_q_map[0] = NULL;
2930         clear_bit(0, ha->req_qid_map);
2931         qla2x00_free_rsp_que(ha, rsp);
2932         ha->rsp_q_map[0] = NULL;
2933         clear_bit(0, ha->rsp_qid_map);
2934         ha->max_req_queues = ha->max_rsp_queues = 0;
2935
2936 probe_failed:
2937         if (base_vha->timer_active)
2938                 qla2x00_stop_timer(base_vha);
2939         base_vha->flags.online = 0;
2940         if (ha->dpc_thread) {
2941                 struct task_struct *t = ha->dpc_thread;
2942
2943                 ha->dpc_thread = NULL;
2944                 kthread_stop(t);
2945         }
2946
2947         qla2x00_free_device(base_vha);
2948
2949         scsi_host_put(base_vha->host);
2950
2951 probe_hw_failed:
2952         if (IS_QLA82XX(ha)) {
2953                 qla82xx_idc_lock(ha);
2954                 qla82xx_clear_drv_active(ha);
2955                 qla82xx_idc_unlock(ha);
2956         }
2957         if (IS_QLA8044(ha)) {
2958                 qla8044_idc_lock(ha);
2959                 qla8044_clear_drv_active(ha);
2960                 qla8044_idc_unlock(ha);
2961         }
2962 iospace_config_failed:
2963         if (IS_P3P_TYPE(ha)) {
2964                 if (!ha->nx_pcibase)
2965                         iounmap((device_reg_t *)ha->nx_pcibase);
2966                 if (!ql2xdbwr)
2967                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
2968         } else {
2969                 if (ha->iobase)
2970                         iounmap(ha->iobase);
2971                 if (ha->cregbase)
2972                         iounmap(ha->cregbase);
2973         }
2974         pci_release_selected_regions(ha->pdev, ha->bars);
2975         kfree(ha);
2976         ha = NULL;
2977
2978 probe_out:
2979         pci_disable_device(pdev);
2980         return ret;
2981 }
2982
2983 static void
2984 qla2x00_shutdown(struct pci_dev *pdev)
2985 {
2986         scsi_qla_host_t *vha;
2987         struct qla_hw_data  *ha;
2988
2989         if (!atomic_read(&pdev->enable_cnt))
2990                 return;
2991
2992         vha = pci_get_drvdata(pdev);
2993         ha = vha->hw;
2994
2995         /* Notify ISPFX00 firmware */
2996         if (IS_QLAFX00(ha))
2997                 qlafx00_driver_shutdown(vha, 20);
2998
2999         /* Turn-off FCE trace */
3000         if (ha->flags.fce_enabled) {
3001                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3002                 ha->flags.fce_enabled = 0;
3003         }
3004
3005         /* Turn-off EFT trace */
3006         if (ha->eft)
3007                 qla2x00_disable_eft_trace(vha);
3008
3009         /* Stop currently executing firmware. */
3010         qla2x00_try_to_stop_firmware(vha);
3011
3012         /* Turn adapter off line */
3013         vha->flags.online = 0;
3014
3015         /* turn-off interrupts on the card */
3016         if (ha->interrupts_on) {
3017                 vha->flags.init_done = 0;
3018                 ha->isp_ops->disable_intrs(ha);
3019         }
3020
3021         qla2x00_free_irqs(vha);
3022
3023         qla2x00_free_fw_dump(ha);
3024 }
3025
3026 /* Deletes all the virtual ports for a given ha */
3027 static void
3028 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
3029 {
3030         struct Scsi_Host *scsi_host;
3031         scsi_qla_host_t *vha;
3032         unsigned long flags;
3033
3034         mutex_lock(&ha->vport_lock);
3035         while (ha->cur_vport_count) {
3036                 spin_lock_irqsave(&ha->vport_slock, flags);
3037
3038                 BUG_ON(base_vha->list.next == &ha->vp_list);
3039                 /* This assumes first entry in ha->vp_list is always base vha */
3040                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3041                 scsi_host = scsi_host_get(vha->host);
3042
3043                 spin_unlock_irqrestore(&ha->vport_slock, flags);
3044                 mutex_unlock(&ha->vport_lock);
3045
3046                 fc_vport_terminate(vha->fc_vport);
3047                 scsi_host_put(vha->host);
3048
3049                 mutex_lock(&ha->vport_lock);
3050         }
3051         mutex_unlock(&ha->vport_lock);
3052 }
3053
3054 /* Stops all deferred work threads */
3055 static void
3056 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3057 {
3058         /* Flush the work queue and remove it */
3059         if (ha->wq) {
3060                 flush_workqueue(ha->wq);
3061                 destroy_workqueue(ha->wq);
3062                 ha->wq = NULL;
3063         }
3064
3065         /* Cancel all work and destroy DPC workqueues */
3066         if (ha->dpc_lp_wq) {
3067                 cancel_work_sync(&ha->idc_aen);
3068                 destroy_workqueue(ha->dpc_lp_wq);
3069                 ha->dpc_lp_wq = NULL;
3070         }
3071
3072         if (ha->dpc_hp_wq) {
3073                 cancel_work_sync(&ha->nic_core_reset);
3074                 cancel_work_sync(&ha->idc_state_handler);
3075                 cancel_work_sync(&ha->nic_core_unrecoverable);
3076                 destroy_workqueue(ha->dpc_hp_wq);
3077                 ha->dpc_hp_wq = NULL;
3078         }
3079
3080         /* Kill the kernel thread for this host */
3081         if (ha->dpc_thread) {
3082                 struct task_struct *t = ha->dpc_thread;
3083
3084                 /*
3085                  * qla2xxx_wake_dpc checks for ->dpc_thread
3086                  * so we need to zero it out.
3087                  */
3088                 ha->dpc_thread = NULL;
3089                 kthread_stop(t);
3090         }
3091 }
3092
3093 static void
3094 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3095 {
3096         if (IS_QLA82XX(ha)) {
3097
3098                 iounmap((device_reg_t *)ha->nx_pcibase);
3099                 if (!ql2xdbwr)
3100                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3101         } else {
3102                 if (ha->iobase)
3103                         iounmap(ha->iobase);
3104
3105                 if (ha->cregbase)
3106                         iounmap(ha->cregbase);
3107
3108                 if (ha->mqiobase)
3109                         iounmap(ha->mqiobase);
3110
3111                 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && ha->msixbase)
3112                         iounmap(ha->msixbase);
3113         }
3114 }
3115
3116 static void
3117 qla2x00_clear_drv_active(scsi_qla_host_t *vha)
3118 {
3119         struct qla_hw_data *ha = vha->hw;
3120
3121         if (IS_QLA8044(ha)) {
3122                 qla8044_idc_lock(ha);
3123                 qla8044_clear_drv_active(ha);
3124                 qla8044_idc_unlock(ha);
3125         } else if (IS_QLA82XX(ha)) {
3126                 qla82xx_idc_lock(ha);
3127                 qla82xx_clear_drv_active(ha);
3128                 qla82xx_idc_unlock(ha);
3129         }
3130 }
3131
3132 static void
3133 qla2x00_remove_one(struct pci_dev *pdev)
3134 {
3135         scsi_qla_host_t *base_vha;
3136         struct qla_hw_data  *ha;
3137
3138         /*
3139          * If the PCI device is disabled that means that probe failed and any
3140          * resources should be have cleaned up on probe exit.
3141          */
3142         if (!atomic_read(&pdev->enable_cnt))
3143                 return;
3144
3145         base_vha = pci_get_drvdata(pdev);
3146         ha = base_vha->hw;
3147
3148         set_bit(UNLOADING, &base_vha->dpc_flags);
3149
3150         if (IS_QLAFX00(ha))
3151                 qlafx00_driver_shutdown(base_vha, 20);
3152
3153         qla2x00_delete_all_vps(ha, base_vha);
3154
3155         if (IS_QLA8031(ha)) {
3156                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3157                     "Clearing fcoe driver presence.\n");
3158                 if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3159                         ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3160                             "Error while clearing DRV-Presence.\n");
3161         }
3162
3163         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3164
3165         qla2x00_dfs_remove(base_vha);
3166
3167         qla84xx_put_chip(base_vha);
3168
3169         /* Disable timer */
3170         if (base_vha->timer_active)
3171                 qla2x00_stop_timer(base_vha);
3172
3173         base_vha->flags.online = 0;
3174
3175         qla2x00_destroy_deferred_work(ha);
3176
3177         qlt_remove_target(ha, base_vha);
3178
3179         qla2x00_free_sysfs_attr(base_vha, true);
3180
3181         fc_remove_host(base_vha->host);
3182
3183         scsi_remove_host(base_vha->host);
3184
3185         qla2x00_free_device(base_vha);
3186
3187         scsi_host_put(base_vha->host);
3188
3189         qla2x00_clear_drv_active(base_vha);
3190
3191         qla2x00_unmap_iobases(ha);
3192
3193         pci_release_selected_regions(ha->pdev, ha->bars);
3194         kfree(ha);
3195         ha = NULL;
3196
3197         pci_disable_pcie_error_reporting(pdev);
3198
3199         pci_disable_device(pdev);
3200 }
3201
3202 static void
3203 qla2x00_free_device(scsi_qla_host_t *vha)
3204 {
3205         struct qla_hw_data *ha = vha->hw;
3206
3207         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3208
3209         /* Disable timer */
3210         if (vha->timer_active)
3211                 qla2x00_stop_timer(vha);
3212
3213         qla25xx_delete_queues(vha);
3214
3215         if (ha->flags.fce_enabled)
3216                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3217
3218         if (ha->eft)
3219                 qla2x00_disable_eft_trace(vha);
3220
3221         /* Stop currently executing firmware. */
3222         qla2x00_try_to_stop_firmware(vha);
3223
3224         vha->flags.online = 0;
3225
3226         /* turn-off interrupts on the card */
3227         if (ha->interrupts_on) {
3228                 vha->flags.init_done = 0;
3229                 ha->isp_ops->disable_intrs(ha);
3230         }
3231
3232         qla2x00_free_irqs(vha);
3233
3234         qla2x00_free_fcports(vha);
3235
3236         qla2x00_mem_free(ha);
3237
3238         qla82xx_md_free(vha);
3239
3240         qla2x00_free_queues(ha);
3241 }
3242
3243 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3244 {
3245         fc_port_t *fcport, *tfcport;
3246
3247         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
3248                 list_del(&fcport->list);
3249                 qla2x00_clear_loop_id(fcport);
3250                 kfree(fcport);
3251                 fcport = NULL;
3252         }
3253 }
3254
3255 static inline void
3256 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3257     int defer)
3258 {
3259         struct fc_rport *rport;
3260         scsi_qla_host_t *base_vha;
3261         unsigned long flags;
3262
3263         if (!fcport->rport)
3264                 return;
3265
3266         rport = fcport->rport;
3267         if (defer) {
3268                 base_vha = pci_get_drvdata(vha->hw->pdev);
3269                 spin_lock_irqsave(vha->host->host_lock, flags);
3270                 fcport->drport = rport;
3271                 spin_unlock_irqrestore(vha->host->host_lock, flags);
3272                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3273                 qla2xxx_wake_dpc(base_vha);
3274         } else {
3275                 fc_remote_port_delete(rport);
3276                 qlt_fc_port_deleted(vha, fcport);
3277         }
3278 }
3279
3280 /*
3281  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3282  *
3283  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3284  *
3285  * Return: None.
3286  *
3287  * Context:
3288  */
3289 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3290     int do_login, int defer)
3291 {
3292         if (IS_QLAFX00(vha->hw)) {
3293                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3294                 qla2x00_schedule_rport_del(vha, fcport, defer);
3295                 return;
3296         }
3297
3298         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3299             vha->vp_idx == fcport->vha->vp_idx) {
3300                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3301                 qla2x00_schedule_rport_del(vha, fcport, defer);
3302         }
3303         /*
3304          * We may need to retry the login, so don't change the state of the
3305          * port but do the retries.
3306          */
3307         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3308                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3309
3310         if (!do_login)
3311                 return;
3312
3313         if (fcport->login_retry == 0) {
3314                 fcport->login_retry = vha->hw->login_retry_count;
3315                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3316
3317                 ql_dbg(ql_dbg_disc, vha, 0x2067,
3318                     "Port login retry %8phN, id = 0x%04x retry cnt=%d.\n",
3319                     fcport->port_name, fcport->loop_id, fcport->login_retry);
3320         }
3321 }
3322
3323 /*
3324  * qla2x00_mark_all_devices_lost
3325  *      Updates fcport state when device goes offline.
3326  *
3327  * Input:
3328  *      ha = adapter block pointer.
3329  *      fcport = port structure pointer.
3330  *
3331  * Return:
3332  *      None.
3333  *
3334  * Context:
3335  */
3336 void
3337 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3338 {
3339         fc_port_t *fcport;
3340
3341         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3342                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3343                         continue;
3344
3345                 /*
3346                  * No point in marking the device as lost, if the device is
3347                  * already DEAD.
3348                  */
3349                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3350                         continue;
3351                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3352                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3353                         if (defer)
3354                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3355                         else if (vha->vp_idx == fcport->vha->vp_idx)
3356                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3357                 }
3358         }
3359 }
3360
3361 /*
3362 * qla2x00_mem_alloc
3363 *      Allocates adapter memory.
3364 *
3365 * Returns:
3366 *      0  = success.
3367 *      !0  = failure.
3368 */
3369 static int
3370 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3371         struct req_que **req, struct rsp_que **rsp)
3372 {
3373         char    name[16];
3374
3375         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3376                 &ha->init_cb_dma, GFP_KERNEL);
3377         if (!ha->init_cb)
3378                 goto fail;
3379
3380         if (qlt_mem_alloc(ha) < 0)
3381                 goto fail_free_init_cb;
3382
3383         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3384                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3385         if (!ha->gid_list)
3386                 goto fail_free_tgt_mem;
3387
3388         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3389         if (!ha->srb_mempool)
3390                 goto fail_free_gid_list;
3391
3392         if (IS_P3P_TYPE(ha)) {
3393                 /* Allocate cache for CT6 Ctx. */
3394                 if (!ctx_cachep) {
3395                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3396                                 sizeof(struct ct6_dsd), 0,
3397                                 SLAB_HWCACHE_ALIGN, NULL);
3398                         if (!ctx_cachep)
3399                                 goto fail_free_gid_list;
3400                 }
3401                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3402                         ctx_cachep);
3403                 if (!ha->ctx_mempool)
3404                         goto fail_free_srb_mempool;
3405                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3406                     "ctx_cachep=%p ctx_mempool=%p.\n",
3407                     ctx_cachep, ha->ctx_mempool);
3408         }
3409
3410         /* Get memory for cached NVRAM */
3411         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3412         if (!ha->nvram)
3413                 goto fail_free_ctx_mempool;
3414
3415         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3416                 ha->pdev->device);
3417         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3418                 DMA_POOL_SIZE, 8, 0);
3419         if (!ha->s_dma_pool)
3420                 goto fail_free_nvram;
3421
3422         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3423             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3424             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
3425
3426         if (IS_P3P_TYPE(ha) || ql2xenabledif) {
3427                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3428                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
3429                 if (!ha->dl_dma_pool) {
3430                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
3431                             "Failed to allocate memory for dl_dma_pool.\n");
3432                         goto fail_s_dma_pool;
3433                 }
3434
3435                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3436                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
3437                 if (!ha->fcp_cmnd_dma_pool) {
3438                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
3439                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3440                         goto fail_dl_dma_pool;
3441                 }
3442                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
3443                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3444                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3445         }
3446
3447         /* Allocate memory for SNS commands */
3448         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3449         /* Get consistent memory allocated for SNS commands */
3450                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3451                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3452                 if (!ha->sns_cmd)
3453                         goto fail_dma_pool;
3454                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3455                     "sns_cmd: %p.\n", ha->sns_cmd);
3456         } else {
3457         /* Get consistent memory allocated for MS IOCB */
3458                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3459                         &ha->ms_iocb_dma);
3460                 if (!ha->ms_iocb)
3461                         goto fail_dma_pool;
3462         /* Get consistent memory allocated for CT SNS commands */
3463                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3464                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
3465                 if (!ha->ct_sns)
3466                         goto fail_free_ms_iocb;
3467                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
3468                     "ms_iocb=%p ct_sns=%p.\n",
3469                     ha->ms_iocb, ha->ct_sns);
3470         }
3471
3472         /* Allocate memory for request ring */
3473         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
3474         if (!*req) {
3475                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
3476                     "Failed to allocate memory for req.\n");
3477                 goto fail_req;
3478         }
3479         (*req)->length = req_len;
3480         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
3481                 ((*req)->length + 1) * sizeof(request_t),
3482                 &(*req)->dma, GFP_KERNEL);
3483         if (!(*req)->ring) {
3484                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
3485                     "Failed to allocate memory for req_ring.\n");
3486                 goto fail_req_ring;
3487         }
3488         /* Allocate memory for response ring */
3489         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
3490         if (!*rsp) {
3491                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
3492                     "Failed to allocate memory for rsp.\n");
3493                 goto fail_rsp;
3494         }
3495         (*rsp)->hw = ha;
3496         (*rsp)->length = rsp_len;
3497         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
3498                 ((*rsp)->length + 1) * sizeof(response_t),
3499                 &(*rsp)->dma, GFP_KERNEL);
3500         if (!(*rsp)->ring) {
3501                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
3502                     "Failed to allocate memory for rsp_ring.\n");
3503                 goto fail_rsp_ring;
3504         }
3505         (*req)->rsp = *rsp;
3506         (*rsp)->req = *req;
3507         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
3508             "req=%p req->length=%d req->ring=%p rsp=%p "
3509             "rsp->length=%d rsp->ring=%p.\n",
3510             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
3511             (*rsp)->ring);
3512         /* Allocate memory for NVRAM data for vports */
3513         if (ha->nvram_npiv_size) {
3514                 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
3515                     ha->nvram_npiv_size, GFP_KERNEL);
3516                 if (!ha->npiv_info) {
3517                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
3518                             "Failed to allocate memory for npiv_info.\n");
3519                         goto fail_npiv_info;
3520                 }
3521         } else
3522                 ha->npiv_info = NULL;
3523
3524         /* Get consistent memory allocated for EX-INIT-CB. */
3525         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
3526                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3527                     &ha->ex_init_cb_dma);
3528                 if (!ha->ex_init_cb)
3529                         goto fail_ex_init_cb;
3530                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
3531                     "ex_init_cb=%p.\n", ha->ex_init_cb);
3532         }
3533
3534         INIT_LIST_HEAD(&ha->gbl_dsd_list);
3535
3536         /* Get consistent memory allocated for Async Port-Database. */
3537         if (!IS_FWI2_CAPABLE(ha)) {
3538                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3539                         &ha->async_pd_dma);
3540                 if (!ha->async_pd)
3541                         goto fail_async_pd;
3542                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
3543                     "async_pd=%p.\n", ha->async_pd);
3544         }
3545
3546         INIT_LIST_HEAD(&ha->vp_list);
3547
3548         /* Allocate memory for our loop_id bitmap */
3549         ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long),
3550             GFP_KERNEL);
3551         if (!ha->loop_id_map)
3552                 goto fail_async_pd;
3553         else {
3554                 qla2x00_set_reserved_loop_ids(ha);
3555                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
3556                     "loop_id_map=%p.\n", ha->loop_id_map);
3557         }
3558
3559         return 0;
3560
3561 fail_async_pd:
3562         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
3563 fail_ex_init_cb:
3564         kfree(ha->npiv_info);
3565 fail_npiv_info:
3566         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
3567                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
3568         (*rsp)->ring = NULL;
3569         (*rsp)->dma = 0;
3570 fail_rsp_ring:
3571         kfree(*rsp);
3572 fail_rsp:
3573         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
3574                 sizeof(request_t), (*req)->ring, (*req)->dma);
3575         (*req)->ring = NULL;
3576         (*req)->dma = 0;
3577 fail_req_ring:
3578         kfree(*req);
3579 fail_req:
3580         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3581                 ha->ct_sns, ha->ct_sns_dma);
3582         ha->ct_sns = NULL;
3583         ha->ct_sns_dma = 0;
3584 fail_free_ms_iocb:
3585         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3586         ha->ms_iocb = NULL;
3587         ha->ms_iocb_dma = 0;
3588 fail_dma_pool:
3589         if (IS_QLA82XX(ha) || ql2xenabledif) {
3590                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3591                 ha->fcp_cmnd_dma_pool = NULL;
3592         }
3593 fail_dl_dma_pool:
3594         if (IS_QLA82XX(ha) || ql2xenabledif) {
3595                 dma_pool_destroy(ha->dl_dma_pool);
3596                 ha->dl_dma_pool = NULL;
3597         }
3598 fail_s_dma_pool:
3599         dma_pool_destroy(ha->s_dma_pool);
3600         ha->s_dma_pool = NULL;
3601 fail_free_nvram:
3602         kfree(ha->nvram);
3603         ha->nvram = NULL;
3604 fail_free_ctx_mempool:
3605         mempool_destroy(ha->ctx_mempool);
3606         ha->ctx_mempool = NULL;
3607 fail_free_srb_mempool:
3608         mempool_destroy(ha->srb_mempool);
3609         ha->srb_mempool = NULL;
3610 fail_free_gid_list:
3611         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3612         ha->gid_list,
3613         ha->gid_list_dma);
3614         ha->gid_list = NULL;
3615         ha->gid_list_dma = 0;
3616 fail_free_tgt_mem:
3617         qlt_mem_free(ha);
3618 fail_free_init_cb:
3619         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
3620         ha->init_cb_dma);
3621         ha->init_cb = NULL;
3622         ha->init_cb_dma = 0;
3623 fail:
3624         ql_log(ql_log_fatal, NULL, 0x0030,
3625             "Memory allocation failure.\n");
3626         return -ENOMEM;
3627 }
3628
3629 /*
3630 * qla2x00_free_fw_dump
3631 *       Frees fw dump stuff.
3632 *
3633 * Input:
3634 *       ha = adapter block pointer
3635 */
3636 static void
3637 qla2x00_free_fw_dump(struct qla_hw_data *ha)
3638 {
3639         if (ha->fce)
3640                 dma_free_coherent(&ha->pdev->dev,
3641                     FCE_SIZE, ha->fce, ha->fce_dma);
3642
3643         if (ha->eft)
3644                 dma_free_coherent(&ha->pdev->dev,
3645                     EFT_SIZE, ha->eft, ha->eft_dma);
3646
3647         if (ha->fw_dump)
3648                 vfree(ha->fw_dump);
3649         if (ha->fw_dump_template)
3650                 vfree(ha->fw_dump_template);
3651
3652         ha->fce = NULL;
3653         ha->fce_dma = 0;
3654         ha->eft = NULL;
3655         ha->eft_dma = 0;
3656         ha->fw_dumped = 0;
3657         ha->fw_dump_reading = 0;
3658         ha->fw_dump = NULL;
3659         ha->fw_dump_len = 0;
3660         ha->fw_dump_template = NULL;
3661         ha->fw_dump_template_len = 0;
3662 }
3663
3664 /*
3665 * qla2x00_mem_free
3666 *      Frees all adapter allocated memory.
3667 *
3668 * Input:
3669 *      ha = adapter block pointer.
3670 */
3671 static void
3672 qla2x00_mem_free(struct qla_hw_data *ha)
3673 {
3674         qla2x00_free_fw_dump(ha);
3675
3676         if (ha->mctp_dump)
3677                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
3678                     ha->mctp_dump_dma);
3679
3680         if (ha->srb_mempool)
3681                 mempool_destroy(ha->srb_mempool);
3682
3683         if (ha->dcbx_tlv)
3684                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
3685                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
3686
3687         if (ha->xgmac_data)
3688                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
3689                     ha->xgmac_data, ha->xgmac_data_dma);
3690
3691         if (ha->sns_cmd)
3692                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
3693                 ha->sns_cmd, ha->sns_cmd_dma);
3694
3695         if (ha->ct_sns)
3696                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3697                 ha->ct_sns, ha->ct_sns_dma);
3698
3699         if (ha->sfp_data)
3700                 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
3701
3702         if (ha->ms_iocb)
3703                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3704
3705         if (ha->ex_init_cb)
3706                 dma_pool_free(ha->s_dma_pool,
3707                         ha->ex_init_cb, ha->ex_init_cb_dma);
3708
3709         if (ha->async_pd)
3710                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
3711
3712         if (ha->s_dma_pool)
3713                 dma_pool_destroy(ha->s_dma_pool);
3714
3715         if (ha->gid_list)
3716                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3717                 ha->gid_list, ha->gid_list_dma);
3718
3719         if (IS_QLA82XX(ha)) {
3720                 if (!list_empty(&ha->gbl_dsd_list)) {
3721                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
3722
3723                         /* clean up allocated prev pool */
3724                         list_for_each_entry_safe(dsd_ptr,
3725                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
3726                                 dma_pool_free(ha->dl_dma_pool,
3727                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
3728                                 list_del(&dsd_ptr->list);
3729                                 kfree(dsd_ptr);
3730                         }
3731                 }
3732         }
3733
3734         if (ha->dl_dma_pool)
3735                 dma_pool_destroy(ha->dl_dma_pool);
3736
3737         if (ha->fcp_cmnd_dma_pool)
3738                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3739
3740         if (ha->ctx_mempool)
3741                 mempool_destroy(ha->ctx_mempool);
3742
3743         qlt_mem_free(ha);
3744
3745         if (ha->init_cb)
3746                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
3747                         ha->init_cb, ha->init_cb_dma);
3748         vfree(ha->optrom_buffer);
3749         kfree(ha->nvram);
3750         kfree(ha->npiv_info);
3751         kfree(ha->swl);
3752         kfree(ha->loop_id_map);
3753
3754         ha->srb_mempool = NULL;
3755         ha->ctx_mempool = NULL;
3756         ha->sns_cmd = NULL;
3757         ha->sns_cmd_dma = 0;
3758         ha->ct_sns = NULL;
3759         ha->ct_sns_dma = 0;
3760         ha->ms_iocb = NULL;
3761         ha->ms_iocb_dma = 0;
3762         ha->init_cb = NULL;
3763         ha->init_cb_dma = 0;
3764         ha->ex_init_cb = NULL;
3765         ha->ex_init_cb_dma = 0;
3766         ha->async_pd = NULL;
3767         ha->async_pd_dma = 0;
3768
3769         ha->s_dma_pool = NULL;
3770         ha->dl_dma_pool = NULL;
3771         ha->fcp_cmnd_dma_pool = NULL;
3772
3773         ha->gid_list = NULL;
3774         ha->gid_list_dma = 0;
3775
3776         ha->tgt.atio_ring = NULL;
3777         ha->tgt.atio_dma = 0;
3778         ha->tgt.tgt_vp_map = NULL;
3779 }
3780
3781 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
3782                                                 struct qla_hw_data *ha)
3783 {
3784         struct Scsi_Host *host;
3785         struct scsi_qla_host *vha = NULL;
3786
3787         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
3788         if (host == NULL) {
3789                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
3790                     "Failed to allocate host from the scsi layer, aborting.\n");
3791                 goto fail;
3792         }
3793
3794         /* Clear our data area */
3795         vha = shost_priv(host);
3796         memset(vha, 0, sizeof(scsi_qla_host_t));
3797
3798         vha->host = host;
3799         vha->host_no = host->host_no;
3800         vha->hw = ha;
3801
3802         INIT_LIST_HEAD(&vha->vp_fcports);
3803         INIT_LIST_HEAD(&vha->work_list);
3804         INIT_LIST_HEAD(&vha->list);
3805
3806         spin_lock_init(&vha->work_lock);
3807
3808         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
3809         ql_dbg(ql_dbg_init, vha, 0x0041,
3810             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
3811             vha->host, vha->hw, vha,
3812             dev_name(&(ha->pdev->dev)));
3813
3814         return vha;
3815
3816 fail:
3817         return vha;
3818 }
3819
3820 static struct qla_work_evt *
3821 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
3822 {
3823         struct qla_work_evt *e;
3824         uint8_t bail;
3825
3826         QLA_VHA_MARK_BUSY(vha, bail);
3827         if (bail)
3828                 return NULL;
3829
3830         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
3831         if (!e) {
3832                 QLA_VHA_MARK_NOT_BUSY(vha);
3833                 return NULL;
3834         }
3835
3836         INIT_LIST_HEAD(&e->list);
3837         e->type = type;
3838         e->flags = QLA_EVT_FLAG_FREE;
3839         return e;
3840 }
3841
3842 static int
3843 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
3844 {
3845         unsigned long flags;
3846
3847         spin_lock_irqsave(&vha->work_lock, flags);
3848         list_add_tail(&e->list, &vha->work_list);
3849         spin_unlock_irqrestore(&vha->work_lock, flags);
3850         qla2xxx_wake_dpc(vha);
3851
3852         return QLA_SUCCESS;
3853 }
3854
3855 int
3856 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
3857     u32 data)
3858 {
3859         struct qla_work_evt *e;
3860
3861         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
3862         if (!e)
3863                 return QLA_FUNCTION_FAILED;
3864
3865         e->u.aen.code = code;
3866         e->u.aen.data = data;
3867         return qla2x00_post_work(vha, e);
3868 }
3869
3870 int
3871 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
3872 {
3873         struct qla_work_evt *e;
3874
3875         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
3876         if (!e)
3877                 return QLA_FUNCTION_FAILED;
3878
3879         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
3880         return qla2x00_post_work(vha, e);
3881 }
3882
3883 #define qla2x00_post_async_work(name, type)     \
3884 int qla2x00_post_async_##name##_work(           \
3885     struct scsi_qla_host *vha,                  \
3886     fc_port_t *fcport, uint16_t *data)          \
3887 {                                               \
3888         struct qla_work_evt *e;                 \
3889                                                 \
3890         e = qla2x00_alloc_work(vha, type);      \
3891         if (!e)                                 \
3892                 return QLA_FUNCTION_FAILED;     \
3893                                                 \
3894         e->u.logio.fcport = fcport;             \
3895         if (data) {                             \
3896                 e->u.logio.data[0] = data[0];   \
3897                 e->u.logio.data[1] = data[1];   \
3898         }                                       \
3899         return qla2x00_post_work(vha, e);       \
3900 }
3901
3902 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
3903 qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
3904 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
3905 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
3906 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
3907 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
3908
3909 int
3910 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
3911 {
3912         struct qla_work_evt *e;
3913
3914         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
3915         if (!e)
3916                 return QLA_FUNCTION_FAILED;
3917
3918         e->u.uevent.code = code;
3919         return qla2x00_post_work(vha, e);
3920 }
3921
3922 static void
3923 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
3924 {
3925         char event_string[40];
3926         char *envp[] = { event_string, NULL };
3927
3928         switch (code) {
3929         case QLA_UEVENT_CODE_FW_DUMP:
3930                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
3931                     vha->host_no);
3932                 break;
3933         default:
3934                 /* do nothing */
3935                 break;
3936         }
3937         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
3938 }
3939
3940 int
3941 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
3942                         uint32_t *data, int cnt)
3943 {
3944         struct qla_work_evt *e;
3945
3946         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
3947         if (!e)
3948                 return QLA_FUNCTION_FAILED;
3949
3950         e->u.aenfx.evtcode = evtcode;
3951         e->u.aenfx.count = cnt;
3952         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
3953         return qla2x00_post_work(vha, e);
3954 }
3955
3956 void
3957 qla2x00_do_work(struct scsi_qla_host *vha)
3958 {
3959         struct qla_work_evt *e, *tmp;
3960         unsigned long flags;
3961         LIST_HEAD(work);
3962
3963         spin_lock_irqsave(&vha->work_lock, flags);
3964         list_splice_init(&vha->work_list, &work);
3965         spin_unlock_irqrestore(&vha->work_lock, flags);
3966
3967         list_for_each_entry_safe(e, tmp, &work, list) {
3968                 list_del_init(&e->list);
3969
3970                 switch (e->type) {
3971                 case QLA_EVT_AEN:
3972                         fc_host_post_event(vha->host, fc_get_event_number(),
3973                             e->u.aen.code, e->u.aen.data);
3974                         break;
3975                 case QLA_EVT_IDC_ACK:
3976                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
3977                         break;
3978                 case QLA_EVT_ASYNC_LOGIN:
3979                         qla2x00_async_login(vha, e->u.logio.fcport,
3980                             e->u.logio.data);
3981                         break;
3982                 case QLA_EVT_ASYNC_LOGIN_DONE:
3983                         qla2x00_async_login_done(vha, e->u.logio.fcport,
3984                             e->u.logio.data);
3985                         break;
3986                 case QLA_EVT_ASYNC_LOGOUT:
3987                         qla2x00_async_logout(vha, e->u.logio.fcport);
3988                         break;
3989                 case QLA_EVT_ASYNC_LOGOUT_DONE:
3990                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
3991                             e->u.logio.data);
3992                         break;
3993                 case QLA_EVT_ASYNC_ADISC:
3994                         qla2x00_async_adisc(vha, e->u.logio.fcport,
3995                             e->u.logio.data);
3996                         break;
3997                 case QLA_EVT_ASYNC_ADISC_DONE:
3998                         qla2x00_async_adisc_done(vha, e->u.logio.fcport,
3999                             e->u.logio.data);
4000                         break;
4001                 case QLA_EVT_UEVENT:
4002                         qla2x00_uevent_emit(vha, e->u.uevent.code);
4003                         break;
4004                 case QLA_EVT_AENFX:
4005                         qlafx00_process_aen(vha, e);
4006                         break;
4007                 }
4008                 if (e->flags & QLA_EVT_FLAG_FREE)
4009                         kfree(e);
4010
4011                 /* For each work completed decrement vha ref count */
4012                 QLA_VHA_MARK_NOT_BUSY(vha);
4013         }
4014 }
4015
4016 /* Relogins all the fcports of a vport
4017  * Context: dpc thread
4018  */
4019 void qla2x00_relogin(struct scsi_qla_host *vha)
4020 {
4021         fc_port_t       *fcport;
4022         int status;
4023         uint16_t        next_loopid = 0;
4024         struct qla_hw_data *ha = vha->hw;
4025         uint16_t data[2];
4026
4027         list_for_each_entry(fcport, &vha->vp_fcports, list) {
4028         /*
4029          * If the port is not ONLINE then try to login
4030          * to it if we haven't run out of retries.
4031          */
4032                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
4033                     fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
4034                         fcport->login_retry--;
4035                         if (fcport->flags & FCF_FABRIC_DEVICE) {
4036                                 if (fcport->flags & FCF_FCP2_DEVICE)
4037                                         ha->isp_ops->fabric_logout(vha,
4038                                                         fcport->loop_id,
4039                                                         fcport->d_id.b.domain,
4040                                                         fcport->d_id.b.area,
4041                                                         fcport->d_id.b.al_pa);
4042
4043                                 if (fcport->loop_id == FC_NO_LOOP_ID) {
4044                                         fcport->loop_id = next_loopid =
4045                                             ha->min_external_loopid;
4046                                         status = qla2x00_find_new_loop_id(
4047                                             vha, fcport);
4048                                         if (status != QLA_SUCCESS) {
4049                                                 /* Ran out of IDs to use */
4050                                                 break;
4051                                         }
4052                                 }
4053
4054                                 if (IS_ALOGIO_CAPABLE(ha)) {
4055                                         fcport->flags |= FCF_ASYNC_SENT;
4056                                         data[0] = 0;
4057                                         data[1] = QLA_LOGIO_LOGIN_RETRIED;
4058                                         status = qla2x00_post_async_login_work(
4059                                             vha, fcport, data);
4060                                         if (status == QLA_SUCCESS)
4061                                                 continue;
4062                                         /* Attempt a retry. */
4063                                         status = 1;
4064                                 } else {
4065                                         status = qla2x00_fabric_login(vha,
4066                                             fcport, &next_loopid);
4067                                         if (status ==  QLA_SUCCESS) {
4068                                                 int status2;
4069                                                 uint8_t opts;
4070
4071                                                 opts = 0;
4072                                                 if (fcport->flags &
4073                                                     FCF_FCP2_DEVICE)
4074                                                         opts |= BIT_1;
4075                                                 status2 =
4076                                                     qla2x00_get_port_database(
4077                                                         vha, fcport, opts);
4078                                                 if (status2 != QLA_SUCCESS)
4079                                                         status = 1;
4080                                         }
4081                                 }
4082                         } else
4083                                 status = qla2x00_local_device_login(vha,
4084                                                                 fcport);
4085
4086                         if (status == QLA_SUCCESS) {
4087                                 fcport->old_loop_id = fcport->loop_id;
4088
4089                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
4090                                     "Port login OK: logged in ID 0x%x.\n",
4091                                     fcport->loop_id);
4092
4093                                 qla2x00_update_fcport(vha, fcport);
4094
4095                         } else if (status == 1) {
4096                                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4097                                 /* retry the login again */
4098                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
4099                                     "Retrying %d login again loop_id 0x%x.\n",
4100                                     fcport->login_retry, fcport->loop_id);
4101                         } else {
4102                                 fcport->login_retry = 0;
4103                         }
4104
4105                         if (fcport->login_retry == 0 && status != QLA_SUCCESS)
4106                                 qla2x00_clear_loop_id(fcport);
4107                 }
4108                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
4109                         break;
4110         }
4111 }
4112
4113 /* Schedule work on any of the dpc-workqueues */
4114 void
4115 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
4116 {
4117         struct qla_hw_data *ha = base_vha->hw;
4118
4119         switch (work_code) {
4120         case MBA_IDC_AEN: /* 0x8200 */
4121                 if (ha->dpc_lp_wq)
4122                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
4123                 break;
4124
4125         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
4126                 if (!ha->flags.nic_core_reset_hdlr_active) {
4127                         if (ha->dpc_hp_wq)
4128                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
4129                 } else
4130                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
4131                             "NIC Core reset is already active. Skip "
4132                             "scheduling it again.\n");
4133                 break;
4134         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
4135                 if (ha->dpc_hp_wq)
4136                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
4137                 break;
4138         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
4139                 if (ha->dpc_hp_wq)
4140                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
4141                 break;
4142         default:
4143                 ql_log(ql_log_warn, base_vha, 0xb05f,
4144                     "Unknow work-code=0x%x.\n", work_code);
4145         }
4146
4147         return;
4148 }
4149
4150 /* Work: Perform NIC Core Unrecoverable state handling */
4151 void
4152 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
4153 {
4154         struct qla_hw_data *ha =
4155                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
4156         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4157         uint32_t dev_state = 0;
4158
4159         qla83xx_idc_lock(base_vha, 0);
4160         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4161         qla83xx_reset_ownership(base_vha);
4162         if (ha->flags.nic_core_reset_owner) {
4163                 ha->flags.nic_core_reset_owner = 0;
4164                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4165                     QLA8XXX_DEV_FAILED);
4166                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
4167                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4168         }
4169         qla83xx_idc_unlock(base_vha, 0);
4170 }
4171
4172 /* Work: Execute IDC state handler */
4173 void
4174 qla83xx_idc_state_handler_work(struct work_struct *work)
4175 {
4176         struct qla_hw_data *ha =
4177                 container_of(work, struct qla_hw_data, idc_state_handler);
4178         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4179         uint32_t dev_state = 0;
4180
4181         qla83xx_idc_lock(base_vha, 0);
4182         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4183         if (dev_state == QLA8XXX_DEV_FAILED ||
4184                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
4185                 qla83xx_idc_state_handler(base_vha);
4186         qla83xx_idc_unlock(base_vha, 0);
4187 }
4188
4189 static int
4190 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
4191 {
4192         int rval = QLA_SUCCESS;
4193         unsigned long heart_beat_wait = jiffies + (1 * HZ);
4194         uint32_t heart_beat_counter1, heart_beat_counter2;
4195
4196         do {
4197                 if (time_after(jiffies, heart_beat_wait)) {
4198                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
4199                             "Nic Core f/w is not alive.\n");
4200                         rval = QLA_FUNCTION_FAILED;
4201                         break;
4202                 }
4203
4204                 qla83xx_idc_lock(base_vha, 0);
4205                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4206                     &heart_beat_counter1);
4207                 qla83xx_idc_unlock(base_vha, 0);
4208                 msleep(100);
4209                 qla83xx_idc_lock(base_vha, 0);
4210                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4211                     &heart_beat_counter2);
4212                 qla83xx_idc_unlock(base_vha, 0);
4213         } while (heart_beat_counter1 == heart_beat_counter2);
4214
4215         return rval;
4216 }
4217
4218 /* Work: Perform NIC Core Reset handling */
4219 void
4220 qla83xx_nic_core_reset_work(struct work_struct *work)
4221 {
4222         struct qla_hw_data *ha =
4223                 container_of(work, struct qla_hw_data, nic_core_reset);
4224         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4225         uint32_t dev_state = 0;
4226
4227         if (IS_QLA2031(ha)) {
4228                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
4229                         ql_log(ql_log_warn, base_vha, 0xb081,
4230                             "Failed to dump mctp\n");
4231                 return;
4232         }
4233
4234         if (!ha->flags.nic_core_reset_hdlr_active) {
4235                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
4236                         qla83xx_idc_lock(base_vha, 0);
4237                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4238                             &dev_state);
4239                         qla83xx_idc_unlock(base_vha, 0);
4240                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
4241                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
4242                                     "Nic Core f/w is alive.\n");
4243                                 return;
4244                         }
4245                 }
4246
4247                 ha->flags.nic_core_reset_hdlr_active = 1;
4248                 if (qla83xx_nic_core_reset(base_vha)) {
4249                         /* NIC Core reset failed. */
4250                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
4251                             "NIC Core reset failed.\n");
4252                 }
4253                 ha->flags.nic_core_reset_hdlr_active = 0;
4254         }
4255 }
4256
4257 /* Work: Handle 8200 IDC aens */
4258 void
4259 qla83xx_service_idc_aen(struct work_struct *work)
4260 {
4261         struct qla_hw_data *ha =
4262                 container_of(work, struct qla_hw_data, idc_aen);
4263         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4264         uint32_t dev_state, idc_control;
4265
4266         qla83xx_idc_lock(base_vha, 0);
4267         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4268         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
4269         qla83xx_idc_unlock(base_vha, 0);
4270         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
4271                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
4272                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
4273                             "Application requested NIC Core Reset.\n");
4274                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4275                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
4276                     QLA_SUCCESS) {
4277                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
4278                             "Other protocol driver requested NIC Core Reset.\n");
4279                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4280                 }
4281         } else if (dev_state == QLA8XXX_DEV_FAILED ||
4282                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
4283                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4284         }
4285 }
4286
4287 static void
4288 qla83xx_wait_logic(void)
4289 {
4290         int i;
4291
4292         /* Yield CPU */
4293         if (!in_interrupt()) {
4294                 /*
4295                  * Wait about 200ms before retrying again.
4296                  * This controls the number of retries for single
4297                  * lock operation.
4298                  */
4299                 msleep(100);
4300                 schedule();
4301         } else {
4302                 for (i = 0; i < 20; i++)
4303                         cpu_relax(); /* This a nop instr on i386 */
4304         }
4305 }
4306
4307 static int
4308 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
4309 {
4310         int rval;
4311         uint32_t data;
4312         uint32_t idc_lck_rcvry_stage_mask = 0x3;
4313         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
4314         struct qla_hw_data *ha = base_vha->hw;
4315         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
4316             "Trying force recovery of the IDC lock.\n");
4317
4318         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
4319         if (rval)
4320                 return rval;
4321
4322         if ((data & idc_lck_rcvry_stage_mask) > 0) {
4323                 return QLA_SUCCESS;
4324         } else {
4325                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
4326                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4327                     data);
4328                 if (rval)
4329                         return rval;
4330
4331                 msleep(200);
4332
4333                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4334                     &data);
4335                 if (rval)
4336                         return rval;
4337
4338                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
4339                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
4340                                         ~(idc_lck_rcvry_stage_mask));
4341                         rval = qla83xx_wr_reg(base_vha,
4342                             QLA83XX_IDC_LOCK_RECOVERY, data);
4343                         if (rval)
4344                                 return rval;
4345
4346                         /* Forcefully perform IDC UnLock */
4347                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
4348                             &data);
4349                         if (rval)
4350                                 return rval;
4351                         /* Clear lock-id by setting 0xff */
4352                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4353                             0xff);
4354                         if (rval)
4355                                 return rval;
4356                         /* Clear lock-recovery by setting 0x0 */
4357                         rval = qla83xx_wr_reg(base_vha,
4358                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
4359                         if (rval)
4360                                 return rval;
4361                 } else
4362                         return QLA_SUCCESS;
4363         }
4364
4365         return rval;
4366 }
4367
4368 static int
4369 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
4370 {
4371         int rval = QLA_SUCCESS;
4372         uint32_t o_drv_lockid, n_drv_lockid;
4373         unsigned long lock_recovery_timeout;
4374
4375         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
4376 retry_lockid:
4377         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
4378         if (rval)
4379                 goto exit;
4380
4381         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
4382         if (time_after_eq(jiffies, lock_recovery_timeout)) {
4383                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
4384                         return QLA_SUCCESS;
4385                 else
4386                         return QLA_FUNCTION_FAILED;
4387         }
4388
4389         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
4390         if (rval)
4391                 goto exit;
4392
4393         if (o_drv_lockid == n_drv_lockid) {
4394                 qla83xx_wait_logic();
4395                 goto retry_lockid;
4396         } else
4397                 return QLA_SUCCESS;
4398
4399 exit:
4400         return rval;
4401 }
4402
4403 void
4404 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4405 {
4406         uint16_t options = (requester_id << 15) | BIT_6;
4407         uint32_t data;
4408         uint32_t lock_owner;
4409         struct qla_hw_data *ha = base_vha->hw;
4410
4411         /* IDC-lock implementation using driver-lock/lock-id remote registers */
4412 retry_lock:
4413         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
4414             == QLA_SUCCESS) {
4415                 if (data) {
4416                         /* Setting lock-id to our function-number */
4417                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4418                             ha->portnum);
4419                 } else {
4420                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4421                             &lock_owner);
4422                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
4423                             "Failed to acquire IDC lock, acquired by %d, "
4424                             "retrying...\n", lock_owner);
4425
4426                         /* Retry/Perform IDC-Lock recovery */
4427                         if (qla83xx_idc_lock_recovery(base_vha)
4428                             == QLA_SUCCESS) {
4429                                 qla83xx_wait_logic();
4430                                 goto retry_lock;
4431                         } else
4432                                 ql_log(ql_log_warn, base_vha, 0xb075,
4433                                     "IDC Lock recovery FAILED.\n");
4434                 }
4435
4436         }
4437
4438         return;
4439
4440         /* XXX: IDC-lock implementation using access-control mbx */
4441 retry_lock2:
4442         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4443                 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
4444                     "Failed to acquire IDC lock. retrying...\n");
4445                 /* Retry/Perform IDC-Lock recovery */
4446                 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
4447                         qla83xx_wait_logic();
4448                         goto retry_lock2;
4449                 } else
4450                         ql_log(ql_log_warn, base_vha, 0xb076,
4451                             "IDC Lock recovery FAILED.\n");
4452         }
4453
4454         return;
4455 }
4456
4457 void
4458 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4459 {
4460         uint16_t options = (requester_id << 15) | BIT_7, retry;
4461         uint32_t data;
4462         struct qla_hw_data *ha = base_vha->hw;
4463
4464         /* IDC-unlock implementation using driver-unlock/lock-id
4465          * remote registers
4466          */
4467         retry = 0;
4468 retry_unlock:
4469         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
4470             == QLA_SUCCESS) {
4471                 if (data == ha->portnum) {
4472                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
4473                         /* Clearing lock-id by setting 0xff */
4474                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
4475                 } else if (retry < 10) {
4476                         /* SV: XXX: IDC unlock retrying needed here? */
4477
4478                         /* Retry for IDC-unlock */
4479                         qla83xx_wait_logic();
4480                         retry++;
4481                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
4482                             "Failed to release IDC lock, retyring=%d\n", retry);
4483                         goto retry_unlock;
4484                 }
4485         } else if (retry < 10) {
4486                 /* Retry for IDC-unlock */
4487                 qla83xx_wait_logic();
4488                 retry++;
4489                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
4490                     "Failed to read drv-lockid, retyring=%d\n", retry);
4491                 goto retry_unlock;
4492         }
4493
4494         return;
4495
4496         /* XXX: IDC-unlock implementation using access-control mbx */
4497         retry = 0;
4498 retry_unlock2:
4499         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4500                 if (retry < 10) {
4501                         /* Retry for IDC-unlock */
4502                         qla83xx_wait_logic();
4503                         retry++;
4504                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
4505                             "Failed to release IDC lock, retyring=%d\n", retry);
4506                         goto retry_unlock2;
4507                 }
4508         }
4509
4510         return;
4511 }
4512
4513 int
4514 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4515 {
4516         int rval = QLA_SUCCESS;
4517         struct qla_hw_data *ha = vha->hw;
4518         uint32_t drv_presence;
4519
4520         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4521         if (rval == QLA_SUCCESS) {
4522                 drv_presence |= (1 << ha->portnum);
4523                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4524                     drv_presence);
4525         }
4526
4527         return rval;
4528 }
4529
4530 int
4531 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4532 {
4533         int rval = QLA_SUCCESS;
4534
4535         qla83xx_idc_lock(vha, 0);
4536         rval = __qla83xx_set_drv_presence(vha);
4537         qla83xx_idc_unlock(vha, 0);
4538
4539         return rval;
4540 }
4541
4542 int
4543 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4544 {
4545         int rval = QLA_SUCCESS;
4546         struct qla_hw_data *ha = vha->hw;
4547         uint32_t drv_presence;
4548
4549         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4550         if (rval == QLA_SUCCESS) {
4551                 drv_presence &= ~(1 << ha->portnum);
4552                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4553                     drv_presence);
4554         }
4555
4556         return rval;
4557 }
4558
4559 int
4560 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4561 {
4562         int rval = QLA_SUCCESS;
4563
4564         qla83xx_idc_lock(vha, 0);
4565         rval = __qla83xx_clear_drv_presence(vha);
4566         qla83xx_idc_unlock(vha, 0);
4567
4568         return rval;
4569 }
4570
4571 static void
4572 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
4573 {
4574         struct qla_hw_data *ha = vha->hw;
4575         uint32_t drv_ack, drv_presence;
4576         unsigned long ack_timeout;
4577
4578         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
4579         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
4580         while (1) {
4581                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
4582                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4583                 if ((drv_ack & drv_presence) == drv_presence)
4584                         break;
4585
4586                 if (time_after_eq(jiffies, ack_timeout)) {
4587                         ql_log(ql_log_warn, vha, 0xb067,
4588                             "RESET ACK TIMEOUT! drv_presence=0x%x "
4589                             "drv_ack=0x%x\n", drv_presence, drv_ack);
4590                         /*
4591                          * The function(s) which did not ack in time are forced
4592                          * to withdraw any further participation in the IDC
4593                          * reset.
4594                          */
4595                         if (drv_ack != drv_presence)
4596                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4597                                     drv_ack);
4598                         break;
4599                 }
4600
4601                 qla83xx_idc_unlock(vha, 0);
4602                 msleep(1000);
4603                 qla83xx_idc_lock(vha, 0);
4604         }
4605
4606         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
4607         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
4608 }
4609
4610 static int
4611 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
4612 {
4613         int rval = QLA_SUCCESS;
4614         uint32_t idc_control;
4615
4616         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
4617         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
4618
4619         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
4620         __qla83xx_get_idc_control(vha, &idc_control);
4621         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
4622         __qla83xx_set_idc_control(vha, 0);
4623
4624         qla83xx_idc_unlock(vha, 0);
4625         rval = qla83xx_restart_nic_firmware(vha);
4626         qla83xx_idc_lock(vha, 0);
4627
4628         if (rval != QLA_SUCCESS) {
4629                 ql_log(ql_log_fatal, vha, 0xb06a,
4630                     "Failed to restart NIC f/w.\n");
4631                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
4632                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
4633         } else {
4634                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
4635                     "Success in restarting nic f/w.\n");
4636                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
4637                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
4638         }
4639
4640         return rval;
4641 }
4642
4643 /* Assumes idc_lock always held on entry */
4644 int
4645 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
4646 {
4647         struct qla_hw_data *ha = base_vha->hw;
4648         int rval = QLA_SUCCESS;
4649         unsigned long dev_init_timeout;
4650         uint32_t dev_state;
4651
4652         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
4653         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
4654
4655         while (1) {
4656
4657                 if (time_after_eq(jiffies, dev_init_timeout)) {
4658                         ql_log(ql_log_warn, base_vha, 0xb06e,
4659                             "Initialization TIMEOUT!\n");
4660                         /* Init timeout. Disable further NIC Core
4661                          * communication.
4662                          */
4663                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4664                                 QLA8XXX_DEV_FAILED);
4665                         ql_log(ql_log_info, base_vha, 0xb06f,
4666                             "HW State: FAILED.\n");
4667                 }
4668
4669                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4670                 switch (dev_state) {
4671                 case QLA8XXX_DEV_READY:
4672                         if (ha->flags.nic_core_reset_owner)
4673                                 qla83xx_idc_audit(base_vha,
4674                                     IDC_AUDIT_COMPLETION);
4675                         ha->flags.nic_core_reset_owner = 0;
4676                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
4677                             "Reset_owner reset by 0x%x.\n",
4678                             ha->portnum);
4679                         goto exit;
4680                 case QLA8XXX_DEV_COLD:
4681                         if (ha->flags.nic_core_reset_owner)
4682                                 rval = qla83xx_device_bootstrap(base_vha);
4683                         else {
4684                         /* Wait for AEN to change device-state */
4685                                 qla83xx_idc_unlock(base_vha, 0);
4686                                 msleep(1000);
4687                                 qla83xx_idc_lock(base_vha, 0);
4688                         }
4689                         break;
4690                 case QLA8XXX_DEV_INITIALIZING:
4691                         /* Wait for AEN to change device-state */
4692                         qla83xx_idc_unlock(base_vha, 0);
4693                         msleep(1000);
4694                         qla83xx_idc_lock(base_vha, 0);
4695                         break;
4696                 case QLA8XXX_DEV_NEED_RESET:
4697                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
4698                                 qla83xx_need_reset_handler(base_vha);
4699                         else {
4700                                 /* Wait for AEN to change device-state */
4701                                 qla83xx_idc_unlock(base_vha, 0);
4702                                 msleep(1000);
4703                                 qla83xx_idc_lock(base_vha, 0);
4704                         }
4705                         /* reset timeout value after need reset handler */
4706                         dev_init_timeout = jiffies +
4707                             (ha->fcoe_dev_init_timeout * HZ);
4708                         break;
4709                 case QLA8XXX_DEV_NEED_QUIESCENT:
4710                         /* XXX: DEBUG for now */
4711                         qla83xx_idc_unlock(base_vha, 0);
4712                         msleep(1000);
4713                         qla83xx_idc_lock(base_vha, 0);
4714                         break;
4715                 case QLA8XXX_DEV_QUIESCENT:
4716                         /* XXX: DEBUG for now */
4717                         if (ha->flags.quiesce_owner)
4718                                 goto exit;
4719
4720                         qla83xx_idc_unlock(base_vha, 0);
4721                         msleep(1000);
4722                         qla83xx_idc_lock(base_vha, 0);
4723                         dev_init_timeout = jiffies +
4724                             (ha->fcoe_dev_init_timeout * HZ);
4725                         break;
4726                 case QLA8XXX_DEV_FAILED:
4727                         if (ha->flags.nic_core_reset_owner)
4728                                 qla83xx_idc_audit(base_vha,
4729                                     IDC_AUDIT_COMPLETION);
4730                         ha->flags.nic_core_reset_owner = 0;
4731                         __qla83xx_clear_drv_presence(base_vha);
4732                         qla83xx_idc_unlock(base_vha, 0);
4733                         qla8xxx_dev_failed_handler(base_vha);
4734                         rval = QLA_FUNCTION_FAILED;
4735                         qla83xx_idc_lock(base_vha, 0);
4736                         goto exit;
4737                 case QLA8XXX_BAD_VALUE:
4738                         qla83xx_idc_unlock(base_vha, 0);
4739                         msleep(1000);
4740                         qla83xx_idc_lock(base_vha, 0);
4741                         break;
4742                 default:
4743                         ql_log(ql_log_warn, base_vha, 0xb071,
4744                             "Unknow Device State: %x.\n", dev_state);
4745                         qla83xx_idc_unlock(base_vha, 0);
4746                         qla8xxx_dev_failed_handler(base_vha);
4747                         rval = QLA_FUNCTION_FAILED;
4748                         qla83xx_idc_lock(base_vha, 0);
4749                         goto exit;
4750                 }
4751         }
4752
4753 exit:
4754         return rval;
4755 }
4756
4757 void
4758 qla2x00_disable_board_on_pci_error(struct work_struct *work)
4759 {
4760         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
4761             board_disable);
4762         struct pci_dev *pdev = ha->pdev;
4763         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4764
4765         ql_log(ql_log_warn, base_vha, 0x015b,
4766             "Disabling adapter.\n");
4767
4768         set_bit(UNLOADING, &base_vha->dpc_flags);
4769
4770         qla2x00_delete_all_vps(ha, base_vha);
4771
4772         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
4773
4774         qla2x00_dfs_remove(base_vha);
4775
4776         qla84xx_put_chip(base_vha);
4777
4778         if (base_vha->timer_active)
4779                 qla2x00_stop_timer(base_vha);
4780
4781         base_vha->flags.online = 0;
4782
4783         qla2x00_destroy_deferred_work(ha);
4784
4785         /*
4786          * Do not try to stop beacon blink as it will issue a mailbox
4787          * command.
4788          */
4789         qla2x00_free_sysfs_attr(base_vha, false);
4790
4791         fc_remove_host(base_vha->host);
4792
4793         scsi_remove_host(base_vha->host);
4794
4795         base_vha->flags.init_done = 0;
4796         qla25xx_delete_queues(base_vha);
4797         qla2x00_free_irqs(base_vha);
4798         qla2x00_free_fcports(base_vha);
4799         qla2x00_mem_free(ha);
4800         qla82xx_md_free(base_vha);
4801         qla2x00_free_queues(ha);
4802
4803         scsi_host_put(base_vha->host);
4804
4805         qla2x00_unmap_iobases(ha);
4806
4807         pci_release_selected_regions(ha->pdev, ha->bars);
4808         kfree(ha);
4809         ha = NULL;
4810
4811         pci_disable_pcie_error_reporting(pdev);
4812         pci_disable_device(pdev);
4813         pci_set_drvdata(pdev, NULL);
4814
4815 }
4816
4817 /**************************************************************************
4818 * qla2x00_do_dpc
4819 *   This kernel thread is a task that is schedule by the interrupt handler
4820 *   to perform the background processing for interrupts.
4821 *
4822 * Notes:
4823 * This task always run in the context of a kernel thread.  It
4824 * is kick-off by the driver's detect code and starts up
4825 * up one per adapter. It immediately goes to sleep and waits for
4826 * some fibre event.  When either the interrupt handler or
4827 * the timer routine detects a event it will one of the task
4828 * bits then wake us up.
4829 **************************************************************************/
4830 static int
4831 qla2x00_do_dpc(void *data)
4832 {
4833         int             rval;
4834         scsi_qla_host_t *base_vha;
4835         struct qla_hw_data *ha;
4836
4837         ha = (struct qla_hw_data *)data;
4838         base_vha = pci_get_drvdata(ha->pdev);
4839
4840         set_user_nice(current, -20);
4841
4842         set_current_state(TASK_INTERRUPTIBLE);
4843         while (!kthread_should_stop()) {
4844                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
4845                     "DPC handler sleeping.\n");
4846
4847                 schedule();
4848                 __set_current_state(TASK_RUNNING);
4849
4850                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
4851                         goto end_loop;
4852
4853                 if (ha->flags.eeh_busy) {
4854                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
4855                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
4856                         goto end_loop;
4857                 }
4858
4859                 ha->dpc_active = 1;
4860
4861                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
4862                     "DPC handler waking up, dpc_flags=0x%lx.\n",
4863                     base_vha->dpc_flags);
4864
4865                 qla2x00_do_work(base_vha);
4866
4867                 if (IS_P3P_TYPE(ha)) {
4868                         if (IS_QLA8044(ha)) {
4869                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
4870                                         &base_vha->dpc_flags)) {
4871                                         qla8044_idc_lock(ha);
4872                                         qla8044_wr_direct(base_vha,
4873                                                 QLA8044_CRB_DEV_STATE_INDEX,
4874                                                 QLA8XXX_DEV_FAILED);
4875                                         qla8044_idc_unlock(ha);
4876                                         ql_log(ql_log_info, base_vha, 0x4004,
4877                                                 "HW State: FAILED.\n");
4878                                         qla8044_device_state_handler(base_vha);
4879                                         continue;
4880                                 }
4881
4882                         } else {
4883                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
4884                                         &base_vha->dpc_flags)) {
4885                                         qla82xx_idc_lock(ha);
4886                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
4887                                                 QLA8XXX_DEV_FAILED);
4888                                         qla82xx_idc_unlock(ha);
4889                                         ql_log(ql_log_info, base_vha, 0x0151,
4890                                                 "HW State: FAILED.\n");
4891                                         qla82xx_device_state_handler(base_vha);
4892                                         continue;
4893                                 }
4894                         }
4895
4896                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
4897                                 &base_vha->dpc_flags)) {
4898
4899                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
4900                                     "FCoE context reset scheduled.\n");
4901                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4902                                         &base_vha->dpc_flags))) {
4903                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
4904                                                 /* FCoE-ctx reset failed.
4905                                                  * Escalate to chip-reset
4906                                                  */
4907                                                 set_bit(ISP_ABORT_NEEDED,
4908                                                         &base_vha->dpc_flags);
4909                                         }
4910                                         clear_bit(ABORT_ISP_ACTIVE,
4911                                                 &base_vha->dpc_flags);
4912                                 }
4913
4914                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
4915                                     "FCoE context reset end.\n");
4916                         }
4917                 } else if (IS_QLAFX00(ha)) {
4918                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
4919                                 &base_vha->dpc_flags)) {
4920                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
4921                                     "Firmware Reset Recovery\n");
4922                                 if (qlafx00_reset_initialize(base_vha)) {
4923                                         /* Failed. Abort isp later. */
4924                                         if (!test_bit(UNLOADING,
4925                                             &base_vha->dpc_flags))
4926                                                 set_bit(ISP_UNRECOVERABLE,
4927                                                     &base_vha->dpc_flags);
4928                                                 ql_dbg(ql_dbg_dpc, base_vha,
4929                                                     0x4021,
4930                                                     "Reset Recovery Failed\n");
4931                                 }
4932                         }
4933
4934                         if (test_and_clear_bit(FX00_TARGET_SCAN,
4935                                 &base_vha->dpc_flags)) {
4936                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
4937                                     "ISPFx00 Target Scan scheduled\n");
4938                                 if (qlafx00_rescan_isp(base_vha)) {
4939                                         if (!test_bit(UNLOADING,
4940                                             &base_vha->dpc_flags))
4941                                                 set_bit(ISP_UNRECOVERABLE,
4942                                                     &base_vha->dpc_flags);
4943                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
4944                                             "ISPFx00 Target Scan Failed\n");
4945                                 }
4946                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
4947                                     "ISPFx00 Target Scan End\n");
4948                         }
4949                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
4950                                 &base_vha->dpc_flags)) {
4951                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
4952                                     "ISPFx00 Host Info resend scheduled\n");
4953                                 qlafx00_fx_disc(base_vha,
4954                                     &base_vha->hw->mr.fcport,
4955                                     FXDISC_REG_HOST_INFO);
4956                         }
4957                 }
4958
4959                 if (test_and_clear_bit(ISP_ABORT_NEEDED,
4960                                                 &base_vha->dpc_flags)) {
4961
4962                         ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
4963                             "ISP abort scheduled.\n");
4964                         if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4965                             &base_vha->dpc_flags))) {
4966
4967                                 if (ha->isp_ops->abort_isp(base_vha)) {
4968                                         /* failed. retry later */
4969                                         set_bit(ISP_ABORT_NEEDED,
4970                                             &base_vha->dpc_flags);
4971                                 }
4972                                 clear_bit(ABORT_ISP_ACTIVE,
4973                                                 &base_vha->dpc_flags);
4974                         }
4975
4976                         ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
4977                             "ISP abort end.\n");
4978                 }
4979
4980                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
4981                     &base_vha->dpc_flags)) {
4982                         qla2x00_update_fcports(base_vha);
4983                 }
4984
4985                 if (test_bit(SCR_PENDING, &base_vha->dpc_flags)) {
4986                         int ret;
4987                         ret = qla2x00_send_change_request(base_vha, 0x3, 0);
4988                         if (ret != QLA_SUCCESS)
4989                                 ql_log(ql_log_warn, base_vha, 0x121,
4990                                     "Failed to enable receiving of RSCN "
4991                                     "requests: 0x%x.\n", ret);
4992                         clear_bit(SCR_PENDING, &base_vha->dpc_flags);
4993                 }
4994
4995                 if (IS_QLAFX00(ha))
4996                         goto loop_resync_check;
4997
4998                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
4999                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
5000                             "Quiescence mode scheduled.\n");
5001                         if (IS_P3P_TYPE(ha)) {
5002                                 if (IS_QLA82XX(ha))
5003                                         qla82xx_device_state_handler(base_vha);
5004                                 if (IS_QLA8044(ha))
5005                                         qla8044_device_state_handler(base_vha);
5006                                 clear_bit(ISP_QUIESCE_NEEDED,
5007                                     &base_vha->dpc_flags);
5008                                 if (!ha->flags.quiesce_owner) {
5009                                         qla2x00_perform_loop_resync(base_vha);
5010                                         if (IS_QLA82XX(ha)) {
5011                                                 qla82xx_idc_lock(ha);
5012                                                 qla82xx_clear_qsnt_ready(
5013                                                     base_vha);
5014                                                 qla82xx_idc_unlock(ha);
5015                                         } else if (IS_QLA8044(ha)) {
5016                                                 qla8044_idc_lock(ha);
5017                                                 qla8044_clear_qsnt_ready(
5018                                                     base_vha);
5019                                                 qla8044_idc_unlock(ha);
5020                                         }
5021                                 }
5022                         } else {
5023                                 clear_bit(ISP_QUIESCE_NEEDED,
5024                                     &base_vha->dpc_flags);
5025                                 qla2x00_quiesce_io(base_vha);
5026                         }
5027                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
5028                             "Quiescence mode end.\n");
5029                 }
5030
5031                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
5032                                 &base_vha->dpc_flags) &&
5033                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
5034
5035                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
5036                             "Reset marker scheduled.\n");
5037                         qla2x00_rst_aen(base_vha);
5038                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
5039                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
5040                             "Reset marker end.\n");
5041                 }
5042
5043                 /* Retry each device up to login retry count */
5044                 if ((test_and_clear_bit(RELOGIN_NEEDED,
5045                                                 &base_vha->dpc_flags)) &&
5046                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
5047                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
5048
5049                         ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
5050                             "Relogin scheduled.\n");
5051                         qla2x00_relogin(base_vha);
5052                         ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
5053                             "Relogin end.\n");
5054                 }
5055 loop_resync_check:
5056                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
5057                     &base_vha->dpc_flags)) {
5058
5059                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
5060                             "Loop resync scheduled.\n");
5061
5062                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
5063                             &base_vha->dpc_flags))) {
5064
5065                                 rval = qla2x00_loop_resync(base_vha);
5066
5067                                 clear_bit(LOOP_RESYNC_ACTIVE,
5068                                                 &base_vha->dpc_flags);
5069                         }
5070
5071                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
5072                             "Loop resync end.\n");
5073                 }
5074
5075                 if (IS_QLAFX00(ha))
5076                         goto intr_on_check;
5077
5078                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
5079                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
5080                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
5081                         qla2xxx_flash_npiv_conf(base_vha);
5082                 }
5083
5084 intr_on_check:
5085                 if (!ha->interrupts_on)
5086                         ha->isp_ops->enable_intrs(ha);
5087
5088                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
5089                                         &base_vha->dpc_flags))
5090                         ha->isp_ops->beacon_blink(base_vha);
5091
5092                 if (!IS_QLAFX00(ha))
5093                         qla2x00_do_dpc_all_vps(base_vha);
5094
5095                 ha->dpc_active = 0;
5096 end_loop:
5097                 set_current_state(TASK_INTERRUPTIBLE);
5098         } /* End of while(1) */
5099         __set_current_state(TASK_RUNNING);
5100
5101         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
5102             "DPC handler exiting.\n");
5103
5104         /*
5105          * Make sure that nobody tries to wake us up again.
5106          */
5107         ha->dpc_active = 0;
5108
5109         /* Cleanup any residual CTX SRBs. */
5110         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5111
5112         return 0;
5113 }
5114
5115 void
5116 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
5117 {
5118         struct qla_hw_data *ha = vha->hw;
5119         struct task_struct *t = ha->dpc_thread;
5120
5121         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
5122                 wake_up_process(t);
5123 }
5124
5125 /*
5126 *  qla2x00_rst_aen
5127 *      Processes asynchronous reset.
5128 *
5129 * Input:
5130 *      ha  = adapter block pointer.
5131 */
5132 static void
5133 qla2x00_rst_aen(scsi_qla_host_t *vha)
5134 {
5135         if (vha->flags.online && !vha->flags.reset_active &&
5136             !atomic_read(&vha->loop_down_timer) &&
5137             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
5138                 do {
5139                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5140
5141                         /*
5142                          * Issue marker command only when we are going to start
5143                          * the I/O.
5144                          */
5145                         vha->marker_needed = 1;
5146                 } while (!atomic_read(&vha->loop_down_timer) &&
5147                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
5148         }
5149 }
5150
5151 /**************************************************************************
5152 *   qla2x00_timer
5153 *
5154 * Description:
5155 *   One second timer
5156 *
5157 * Context: Interrupt
5158 ***************************************************************************/
5159 void
5160 qla2x00_timer(scsi_qla_host_t *vha)
5161 {
5162         unsigned long   cpu_flags = 0;
5163         int             start_dpc = 0;
5164         int             index;
5165         srb_t           *sp;
5166         uint16_t        w;
5167         struct qla_hw_data *ha = vha->hw;
5168         struct req_que *req;
5169
5170         if (ha->flags.eeh_busy) {
5171                 ql_dbg(ql_dbg_timer, vha, 0x6000,
5172                     "EEH = %d, restarting timer.\n",
5173                     ha->flags.eeh_busy);
5174                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
5175                 return;
5176         }
5177
5178         /*
5179          * Hardware read to raise pending EEH errors during mailbox waits. If
5180          * the read returns -1 then disable the board.
5181          */
5182         if (!pci_channel_offline(ha->pdev)) {
5183                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
5184                 if (w == 0xffff)
5185                         /*
5186                          * Schedule this on the default system workqueue so that
5187                          * all the adapter workqueues and the DPC thread can be
5188                          * shutdown cleanly.
5189                          */
5190                         schedule_work(&ha->board_disable);
5191         }
5192
5193         /* Make sure qla82xx_watchdog is run only for physical port */
5194         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
5195                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
5196                         start_dpc++;
5197                 if (IS_QLA82XX(ha))
5198                         qla82xx_watchdog(vha);
5199                 else if (IS_QLA8044(ha))
5200                         qla8044_watchdog(vha);
5201         }
5202
5203         if (!vha->vp_idx && IS_QLAFX00(ha))
5204                 qlafx00_timer_routine(vha);
5205
5206         /* Loop down handler. */
5207         if (atomic_read(&vha->loop_down_timer) > 0 &&
5208             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
5209             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
5210                 && vha->flags.online) {
5211
5212                 if (atomic_read(&vha->loop_down_timer) ==
5213                     vha->loop_down_abort_time) {
5214
5215                         ql_log(ql_log_info, vha, 0x6008,
5216                             "Loop down - aborting the queues before time expires.\n");
5217
5218                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
5219                                 atomic_set(&vha->loop_state, LOOP_DEAD);
5220
5221                         /*
5222                          * Schedule an ISP abort to return any FCP2-device
5223                          * commands.
5224                          */
5225                         /* NPIV - scan physical port only */
5226                         if (!vha->vp_idx) {
5227                                 spin_lock_irqsave(&ha->hardware_lock,
5228                                     cpu_flags);
5229                                 req = ha->req_q_map[0];
5230                                 for (index = 1;
5231                                     index < req->num_outstanding_cmds;
5232                                     index++) {
5233                                         fc_port_t *sfcp;
5234
5235                                         sp = req->outstanding_cmds[index];
5236                                         if (!sp)
5237                                                 continue;
5238                                         if (sp->type != SRB_SCSI_CMD)
5239                                                 continue;
5240                                         sfcp = sp->fcport;
5241                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
5242                                                 continue;
5243
5244                                         if (IS_QLA82XX(ha))
5245                                                 set_bit(FCOE_CTX_RESET_NEEDED,
5246                                                         &vha->dpc_flags);
5247                                         else
5248                                                 set_bit(ISP_ABORT_NEEDED,
5249                                                         &vha->dpc_flags);
5250                                         break;
5251                                 }
5252                                 spin_unlock_irqrestore(&ha->hardware_lock,
5253                                                                 cpu_flags);
5254                         }
5255                         start_dpc++;
5256                 }
5257
5258                 /* if the loop has been down for 4 minutes, reinit adapter */
5259                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
5260                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
5261                                 ql_log(ql_log_warn, vha, 0x6009,
5262                                     "Loop down - aborting ISP.\n");
5263
5264                                 if (IS_QLA82XX(ha))
5265                                         set_bit(FCOE_CTX_RESET_NEEDED,
5266                                                 &vha->dpc_flags);
5267                                 else
5268                                         set_bit(ISP_ABORT_NEEDED,
5269                                                 &vha->dpc_flags);
5270                         }
5271                 }
5272                 ql_dbg(ql_dbg_timer, vha, 0x600a,
5273                     "Loop down - seconds remaining %d.\n",
5274                     atomic_read(&vha->loop_down_timer));
5275         }
5276         /* Check if beacon LED needs to be blinked for physical host only */
5277         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
5278                 /* There is no beacon_blink function for ISP82xx */
5279                 if (!IS_P3P_TYPE(ha)) {
5280                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
5281                         start_dpc++;
5282                 }
5283         }
5284
5285         /* Process any deferred work. */
5286         if (!list_empty(&vha->work_list))
5287                 start_dpc++;
5288
5289         /* Schedule the DPC routine if needed */
5290         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
5291             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
5292             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
5293             start_dpc ||
5294             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
5295             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
5296             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
5297             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
5298             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
5299             test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
5300                 ql_dbg(ql_dbg_timer, vha, 0x600b,
5301                     "isp_abort_needed=%d loop_resync_needed=%d "
5302                     "fcport_update_needed=%d start_dpc=%d "
5303                     "reset_marker_needed=%d",
5304                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
5305                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
5306                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
5307                     start_dpc,
5308                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
5309                 ql_dbg(ql_dbg_timer, vha, 0x600c,
5310                     "beacon_blink_needed=%d isp_unrecoverable=%d "
5311                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
5312                     "relogin_needed=%d.\n",
5313                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
5314                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
5315                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
5316                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
5317                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
5318                 qla2xxx_wake_dpc(vha);
5319         }
5320
5321         qla2x00_restart_timer(vha, WATCH_INTERVAL);
5322 }
5323
5324 /* Firmware interface routines. */
5325
5326 #define FW_BLOBS        11
5327 #define FW_ISP21XX      0
5328 #define FW_ISP22XX      1
5329 #define FW_ISP2300      2
5330 #define FW_ISP2322      3
5331 #define FW_ISP24XX      4
5332 #define FW_ISP25XX      5
5333 #define FW_ISP81XX      6
5334 #define FW_ISP82XX      7
5335 #define FW_ISP2031      8
5336 #define FW_ISP8031      9
5337 #define FW_ISP27XX      10
5338
5339 #define FW_FILE_ISP21XX "ql2100_fw.bin"
5340 #define FW_FILE_ISP22XX "ql2200_fw.bin"
5341 #define FW_FILE_ISP2300 "ql2300_fw.bin"
5342 #define FW_FILE_ISP2322 "ql2322_fw.bin"
5343 #define FW_FILE_ISP24XX "ql2400_fw.bin"
5344 #define FW_FILE_ISP25XX "ql2500_fw.bin"
5345 #define FW_FILE_ISP81XX "ql8100_fw.bin"
5346 #define FW_FILE_ISP82XX "ql8200_fw.bin"
5347 #define FW_FILE_ISP2031 "ql2600_fw.bin"
5348 #define FW_FILE_ISP8031 "ql8300_fw.bin"
5349 #define FW_FILE_ISP27XX "ql2700_fw.bin"
5350
5351
5352 static DEFINE_MUTEX(qla_fw_lock);
5353
5354 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
5355         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
5356         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
5357         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
5358         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
5359         { .name = FW_FILE_ISP24XX, },
5360         { .name = FW_FILE_ISP25XX, },
5361         { .name = FW_FILE_ISP81XX, },
5362         { .name = FW_FILE_ISP82XX, },
5363         { .name = FW_FILE_ISP2031, },
5364         { .name = FW_FILE_ISP8031, },
5365         { .name = FW_FILE_ISP27XX, },
5366 };
5367
5368 struct fw_blob *
5369 qla2x00_request_firmware(scsi_qla_host_t *vha)
5370 {
5371         struct qla_hw_data *ha = vha->hw;
5372         struct fw_blob *blob;
5373
5374         if (IS_QLA2100(ha)) {
5375                 blob = &qla_fw_blobs[FW_ISP21XX];
5376         } else if (IS_QLA2200(ha)) {
5377                 blob = &qla_fw_blobs[FW_ISP22XX];
5378         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
5379                 blob = &qla_fw_blobs[FW_ISP2300];
5380         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
5381                 blob = &qla_fw_blobs[FW_ISP2322];
5382         } else if (IS_QLA24XX_TYPE(ha)) {
5383                 blob = &qla_fw_blobs[FW_ISP24XX];
5384         } else if (IS_QLA25XX(ha)) {
5385                 blob = &qla_fw_blobs[FW_ISP25XX];
5386         } else if (IS_QLA81XX(ha)) {
5387                 blob = &qla_fw_blobs[FW_ISP81XX];
5388         } else if (IS_QLA82XX(ha)) {
5389                 blob = &qla_fw_blobs[FW_ISP82XX];
5390         } else if (IS_QLA2031(ha)) {
5391                 blob = &qla_fw_blobs[FW_ISP2031];
5392         } else if (IS_QLA8031(ha)) {
5393                 blob = &qla_fw_blobs[FW_ISP8031];
5394         } else if (IS_QLA27XX(ha)) {
5395                 blob = &qla_fw_blobs[FW_ISP27XX];
5396         } else {
5397                 return NULL;
5398         }
5399
5400         mutex_lock(&qla_fw_lock);
5401         if (blob->fw)
5402                 goto out;
5403
5404         if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
5405                 ql_log(ql_log_warn, vha, 0x0063,
5406                     "Failed to load firmware image (%s).\n", blob->name);
5407                 blob->fw = NULL;
5408                 blob = NULL;
5409                 goto out;
5410         }
5411
5412 out:
5413         mutex_unlock(&qla_fw_lock);
5414         return blob;
5415 }
5416
5417 static void
5418 qla2x00_release_firmware(void)
5419 {
5420         int idx;
5421
5422         mutex_lock(&qla_fw_lock);
5423         for (idx = 0; idx < FW_BLOBS; idx++)
5424                 release_firmware(qla_fw_blobs[idx].fw);
5425         mutex_unlock(&qla_fw_lock);
5426 }
5427
5428 static pci_ers_result_t
5429 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5430 {
5431         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
5432         struct qla_hw_data *ha = vha->hw;
5433
5434         ql_dbg(ql_dbg_aer, vha, 0x9000,
5435             "PCI error detected, state %x.\n", state);
5436
5437         switch (state) {
5438         case pci_channel_io_normal:
5439                 ha->flags.eeh_busy = 0;
5440                 return PCI_ERS_RESULT_CAN_RECOVER;
5441         case pci_channel_io_frozen:
5442                 ha->flags.eeh_busy = 1;
5443                 /* For ISP82XX complete any pending mailbox cmd */
5444                 if (IS_QLA82XX(ha)) {
5445                         ha->flags.isp82xx_fw_hung = 1;
5446                         ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
5447                         qla82xx_clear_pending_mbx(vha);
5448                 }
5449                 qla2x00_free_irqs(vha);
5450                 pci_disable_device(pdev);
5451                 /* Return back all IOs */
5452                 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
5453                 return PCI_ERS_RESULT_NEED_RESET;
5454         case pci_channel_io_perm_failure:
5455                 ha->flags.pci_channel_io_perm_failure = 1;
5456                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
5457                 return PCI_ERS_RESULT_DISCONNECT;
5458         }
5459         return PCI_ERS_RESULT_NEED_RESET;
5460 }
5461
5462 static pci_ers_result_t
5463 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
5464 {
5465         int risc_paused = 0;
5466         uint32_t stat;
5467         unsigned long flags;
5468         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5469         struct qla_hw_data *ha = base_vha->hw;
5470         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
5471         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
5472
5473         if (IS_QLA82XX(ha))
5474                 return PCI_ERS_RESULT_RECOVERED;
5475
5476         spin_lock_irqsave(&ha->hardware_lock, flags);
5477         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
5478                 stat = RD_REG_DWORD(&reg->hccr);
5479                 if (stat & HCCR_RISC_PAUSE)
5480                         risc_paused = 1;
5481         } else if (IS_QLA23XX(ha)) {
5482                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
5483                 if (stat & HSR_RISC_PAUSED)
5484                         risc_paused = 1;
5485         } else if (IS_FWI2_CAPABLE(ha)) {
5486                 stat = RD_REG_DWORD(&reg24->host_status);
5487                 if (stat & HSRX_RISC_PAUSED)
5488                         risc_paused = 1;
5489         }
5490         spin_unlock_irqrestore(&ha->hardware_lock, flags);
5491
5492         if (risc_paused) {
5493                 ql_log(ql_log_info, base_vha, 0x9003,
5494                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
5495                 ha->isp_ops->fw_dump(base_vha, 0);
5496
5497                 return PCI_ERS_RESULT_NEED_RESET;
5498         } else
5499                 return PCI_ERS_RESULT_RECOVERED;
5500 }
5501
5502 static uint32_t
5503 qla82xx_error_recovery(scsi_qla_host_t *base_vha)
5504 {
5505         uint32_t rval = QLA_FUNCTION_FAILED;
5506         uint32_t drv_active = 0;
5507         struct qla_hw_data *ha = base_vha->hw;
5508         int fn;
5509         struct pci_dev *other_pdev = NULL;
5510
5511         ql_dbg(ql_dbg_aer, base_vha, 0x9006,
5512             "Entered %s.\n", __func__);
5513
5514         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5515
5516         if (base_vha->flags.online) {
5517                 /* Abort all outstanding commands,
5518                  * so as to be requeued later */
5519                 qla2x00_abort_isp_cleanup(base_vha);
5520         }
5521
5522
5523         fn = PCI_FUNC(ha->pdev->devfn);
5524         while (fn > 0) {
5525                 fn--;
5526                 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
5527                     "Finding pci device at function = 0x%x.\n", fn);
5528                 other_pdev =
5529                     pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
5530                     ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
5531                     fn));
5532
5533                 if (!other_pdev)
5534                         continue;
5535                 if (atomic_read(&other_pdev->enable_cnt)) {
5536                         ql_dbg(ql_dbg_aer, base_vha, 0x9008,
5537                             "Found PCI func available and enable at 0x%x.\n",
5538                             fn);
5539                         pci_dev_put(other_pdev);
5540                         break;
5541                 }
5542                 pci_dev_put(other_pdev);
5543         }
5544
5545         if (!fn) {
5546                 /* Reset owner */
5547                 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
5548                     "This devfn is reset owner = 0x%x.\n",
5549                     ha->pdev->devfn);
5550                 qla82xx_idc_lock(ha);
5551
5552                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5553                     QLA8XXX_DEV_INITIALIZING);
5554
5555                 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
5556                     QLA82XX_IDC_VERSION);
5557
5558                 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
5559                 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
5560                     "drv_active = 0x%x.\n", drv_active);
5561
5562                 qla82xx_idc_unlock(ha);
5563                 /* Reset if device is not already reset
5564                  * drv_active would be 0 if a reset has already been done
5565                  */
5566                 if (drv_active)
5567                         rval = qla82xx_start_firmware(base_vha);
5568                 else
5569                         rval = QLA_SUCCESS;
5570                 qla82xx_idc_lock(ha);
5571
5572                 if (rval != QLA_SUCCESS) {
5573                         ql_log(ql_log_info, base_vha, 0x900b,
5574                             "HW State: FAILED.\n");
5575                         qla82xx_clear_drv_active(ha);
5576                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5577                             QLA8XXX_DEV_FAILED);
5578                 } else {
5579                         ql_log(ql_log_info, base_vha, 0x900c,
5580                             "HW State: READY.\n");
5581                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5582                             QLA8XXX_DEV_READY);
5583                         qla82xx_idc_unlock(ha);
5584                         ha->flags.isp82xx_fw_hung = 0;
5585                         rval = qla82xx_restart_isp(base_vha);
5586                         qla82xx_idc_lock(ha);
5587                         /* Clear driver state register */
5588                         qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
5589                         qla82xx_set_drv_active(base_vha);
5590                 }
5591                 qla82xx_idc_unlock(ha);
5592         } else {
5593                 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
5594                     "This devfn is not reset owner = 0x%x.\n",
5595                     ha->pdev->devfn);
5596                 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
5597                     QLA8XXX_DEV_READY)) {
5598                         ha->flags.isp82xx_fw_hung = 0;
5599                         rval = qla82xx_restart_isp(base_vha);
5600                         qla82xx_idc_lock(ha);
5601                         qla82xx_set_drv_active(base_vha);
5602                         qla82xx_idc_unlock(ha);
5603                 }
5604         }
5605         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5606
5607         return rval;
5608 }
5609
5610 static pci_ers_result_t
5611 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
5612 {
5613         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
5614         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5615         struct qla_hw_data *ha = base_vha->hw;
5616         struct rsp_que *rsp;
5617         int rc, retries = 10;
5618
5619         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
5620             "Slot Reset.\n");
5621
5622         /* Workaround: qla2xxx driver which access hardware earlier
5623          * needs error state to be pci_channel_io_online.
5624          * Otherwise mailbox command timesout.
5625          */
5626         pdev->error_state = pci_channel_io_normal;
5627
5628         pci_restore_state(pdev);
5629
5630         /* pci_restore_state() clears the saved_state flag of the device
5631          * save restored state which resets saved_state flag
5632          */
5633         pci_save_state(pdev);
5634
5635         if (ha->mem_only)
5636                 rc = pci_enable_device_mem(pdev);
5637         else
5638                 rc = pci_enable_device(pdev);
5639
5640         if (rc) {
5641                 ql_log(ql_log_warn, base_vha, 0x9005,
5642                     "Can't re-enable PCI device after reset.\n");
5643                 goto exit_slot_reset;
5644         }
5645
5646         rsp = ha->rsp_q_map[0];
5647         if (qla2x00_request_irqs(ha, rsp))
5648                 goto exit_slot_reset;
5649
5650         if (ha->isp_ops->pci_config(base_vha))
5651                 goto exit_slot_reset;
5652
5653         if (IS_QLA82XX(ha)) {
5654                 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
5655                         ret = PCI_ERS_RESULT_RECOVERED;
5656                         goto exit_slot_reset;
5657                 } else
5658                         goto exit_slot_reset;
5659         }
5660
5661         while (ha->flags.mbox_busy && retries--)
5662                 msleep(1000);
5663
5664         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5665         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
5666                 ret =  PCI_ERS_RESULT_RECOVERED;
5667         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5668
5669
5670 exit_slot_reset:
5671         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
5672             "slot_reset return %x.\n", ret);
5673
5674         return ret;
5675 }
5676
5677 static void
5678 qla2xxx_pci_resume(struct pci_dev *pdev)
5679 {
5680         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5681         struct qla_hw_data *ha = base_vha->hw;
5682         int ret;
5683
5684         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
5685             "pci_resume.\n");
5686
5687         ret = qla2x00_wait_for_hba_online(base_vha);
5688         if (ret != QLA_SUCCESS) {
5689                 ql_log(ql_log_fatal, base_vha, 0x9002,
5690                     "The device failed to resume I/O from slot/link_reset.\n");
5691         }
5692
5693         pci_cleanup_aer_uncorrect_error_status(pdev);
5694
5695         ha->flags.eeh_busy = 0;
5696 }
5697
5698 static const struct pci_error_handlers qla2xxx_err_handler = {
5699         .error_detected = qla2xxx_pci_error_detected,
5700         .mmio_enabled = qla2xxx_pci_mmio_enabled,
5701         .slot_reset = qla2xxx_pci_slot_reset,
5702         .resume = qla2xxx_pci_resume,
5703 };
5704
5705 static struct pci_device_id qla2xxx_pci_tbl[] = {
5706         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
5707         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
5708         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
5709         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
5710         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
5711         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
5712         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
5713         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
5714         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
5715         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
5716         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
5717         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
5718         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
5719         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
5720         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
5721         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
5722         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
5723         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
5724         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
5725         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
5726         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
5727         { 0 },
5728 };
5729 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
5730
5731 static struct pci_driver qla2xxx_pci_driver = {
5732         .name           = QLA2XXX_DRIVER_NAME,
5733         .driver         = {
5734                 .owner          = THIS_MODULE,
5735         },
5736         .id_table       = qla2xxx_pci_tbl,
5737         .probe          = qla2x00_probe_one,
5738         .remove         = qla2x00_remove_one,
5739         .shutdown       = qla2x00_shutdown,
5740         .err_handler    = &qla2xxx_err_handler,
5741 };
5742
5743 static const struct file_operations apidev_fops = {
5744         .owner = THIS_MODULE,
5745         .llseek = noop_llseek,
5746 };
5747
5748 /**
5749  * qla2x00_module_init - Module initialization.
5750  **/
5751 static int __init
5752 qla2x00_module_init(void)
5753 {
5754         int ret = 0;
5755
5756         /* Allocate cache for SRBs. */
5757         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
5758             SLAB_HWCACHE_ALIGN, NULL);
5759         if (srb_cachep == NULL) {
5760                 ql_log(ql_log_fatal, NULL, 0x0001,
5761                     "Unable to allocate SRB cache...Failing load!.\n");
5762                 return -ENOMEM;
5763         }
5764
5765         /* Initialize target kmem_cache and mem_pools */
5766         ret = qlt_init();
5767         if (ret < 0) {
5768                 kmem_cache_destroy(srb_cachep);
5769                 return ret;
5770         } else if (ret > 0) {
5771                 /*
5772                  * If initiator mode is explictly disabled by qlt_init(),
5773                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
5774                  * performing scsi_scan_target() during LOOP UP event.
5775                  */
5776                 qla2xxx_transport_functions.disable_target_scan = 1;
5777                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
5778         }
5779
5780         /* Derive version string. */
5781         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
5782         if (ql2xextended_error_logging)
5783                 strcat(qla2x00_version_str, "-debug");
5784
5785         qla2xxx_transport_template =
5786             fc_attach_transport(&qla2xxx_transport_functions);
5787         if (!qla2xxx_transport_template) {
5788                 kmem_cache_destroy(srb_cachep);
5789                 ql_log(ql_log_fatal, NULL, 0x0002,
5790                     "fc_attach_transport failed...Failing load!.\n");
5791                 qlt_exit();
5792                 return -ENODEV;
5793         }
5794
5795         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
5796         if (apidev_major < 0) {
5797                 ql_log(ql_log_fatal, NULL, 0x0003,
5798                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
5799         }
5800
5801         qla2xxx_transport_vport_template =
5802             fc_attach_transport(&qla2xxx_transport_vport_functions);
5803         if (!qla2xxx_transport_vport_template) {
5804                 kmem_cache_destroy(srb_cachep);
5805                 qlt_exit();
5806                 fc_release_transport(qla2xxx_transport_template);
5807                 ql_log(ql_log_fatal, NULL, 0x0004,
5808                     "fc_attach_transport vport failed...Failing load!.\n");
5809                 return -ENODEV;
5810         }
5811         ql_log(ql_log_info, NULL, 0x0005,
5812             "QLogic Fibre Channel HBA Driver: %s.\n",
5813             qla2x00_version_str);
5814         ret = pci_register_driver(&qla2xxx_pci_driver);
5815         if (ret) {
5816                 kmem_cache_destroy(srb_cachep);
5817                 qlt_exit();
5818                 fc_release_transport(qla2xxx_transport_template);
5819                 fc_release_transport(qla2xxx_transport_vport_template);
5820                 ql_log(ql_log_fatal, NULL, 0x0006,
5821                     "pci_register_driver failed...ret=%d Failing load!.\n",
5822                     ret);
5823         }
5824         return ret;
5825 }
5826
5827 /**
5828  * qla2x00_module_exit - Module cleanup.
5829  **/
5830 static void __exit
5831 qla2x00_module_exit(void)
5832 {
5833         unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
5834         pci_unregister_driver(&qla2xxx_pci_driver);
5835         qla2x00_release_firmware();
5836         kmem_cache_destroy(srb_cachep);
5837         qlt_exit();
5838         if (ctx_cachep)
5839                 kmem_cache_destroy(ctx_cachep);
5840         fc_release_transport(qla2xxx_transport_template);
5841         fc_release_transport(qla2xxx_transport_vport_template);
5842 }
5843
5844 module_init(qla2x00_module_init);
5845 module_exit(qla2x00_module_exit);
5846
5847 MODULE_AUTHOR("QLogic Corporation");
5848 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
5849 MODULE_LICENSE("GPL");
5850 MODULE_VERSION(QLA2XXX_VERSION);
5851 MODULE_FIRMWARE(FW_FILE_ISP21XX);
5852 MODULE_FIRMWARE(FW_FILE_ISP22XX);
5853 MODULE_FIRMWARE(FW_FILE_ISP2300);
5854 MODULE_FIRMWARE(FW_FILE_ISP2322);
5855 MODULE_FIRMWARE(FW_FILE_ISP24XX);
5856 MODULE_FIRMWARE(FW_FILE_ISP25XX);