drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <scsi/scsi_tcq.h>
  17 #include <scsi/scsicam.h>
  18 #include <scsi/scsi_transport.h>
  19 #include <scsi/scsi_transport_fc.h>
  20
  21 #include "qla_target.h"
  22
  23 /*
  24  * Driver version
  25  */
  26 char qla2x00_version_str[40];
  27
  28 static int apidev_major;
  29
  30 /*
  31  * SRB allocation cache
  32  */
  33 static struct kmem_cache *srb_cachep;
  34
  35 /*
  36  * CT6 CTX allocation cache
  37  */
  38 static struct kmem_cache *ctx_cachep;
  39 /*
  40  * error level for logging
  41  */
  42 int ql_errlev = ql_log_all;
  43
  44 static int ql2xenableclass2;
  45 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  46 MODULE_PARM_DESC(ql2xenableclass2,
  47                 "Specify if Class 2 operations are supported from the very "
  48                 "beginning. Default is 0 - class 2 not supported.");
  49
  50
  51 int ql2xlogintimeout = 20;
  52 module_param(ql2xlogintimeout, int, S_IRUGO);
  53 MODULE_PARM_DESC(ql2xlogintimeout,
  54                 "Login timeout value in seconds.");
  55
  56 int qlport_down_retry;
  57 module_param(qlport_down_retry, int, S_IRUGO);
  58 MODULE_PARM_DESC(qlport_down_retry,
  59                 "Maximum number of command retries to a port that returns "
  60                 "a PORT-DOWN status.");
  61
  62 int ql2xplogiabsentdevice;
  63 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  64 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  65                 "Option to enable PLOGI to devices that are not present after "
  66                 "a Fabric scan.  This is needed for several broken switches. "
  67                 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  68
  69 int ql2xloginretrycount = 0;
  70 module_param(ql2xloginretrycount, int, S_IRUGO);
  71 MODULE_PARM_DESC(ql2xloginretrycount,
  72                 "Specify an alternate value for the NVRAM login retry count.");
  73
  74 int ql2xallocfwdump = 1;
  75 module_param(ql2xallocfwdump, int, S_IRUGO);
  76 MODULE_PARM_DESC(ql2xallocfwdump,
  77                 "Option to enable allocation of memory for a firmware dump "
  78                 "during HBA initialization.  Memory allocation requirements "
  79                 "vary by ISP type.  Default is 1 - allocate memory.");
  80
  81 int ql2xextended_error_logging;
  82 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  83 MODULE_PARM_DESC(ql2xextended_error_logging,
  84                 "Option to enable extended error logging,\n"
  85                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  86                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  87                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  88                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  89                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  90                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  91                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  92                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  93                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
  94                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
  95                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
  96                 "\t\t0x1e400000 - Preferred value for capturing essential "
  97                 "debug information (equivalent to old "
  98                 "ql2xextended_error_logging=1).\n"
  99                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 100
 101 int ql2xshiftctondsd = 6;
 102 module_param(ql2xshiftctondsd, int, S_IRUGO);
 103 MODULE_PARM_DESC(ql2xshiftctondsd,
 104                 "Set to control shifting of command type processing "
 105                 "based on total number of SG elements.");
 106
 107 int ql2xfdmienable=1;
 108 module_param(ql2xfdmienable, int, S_IRUGO);
 109 MODULE_PARM_DESC(ql2xfdmienable,
 110                 "Enables FDMI registrations. "
 111                 "0 - no FDMI. Default is 1 - perform FDMI.");
 112
 113 #define MAX_Q_DEPTH     32
 114 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 115 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 116 MODULE_PARM_DESC(ql2xmaxqdepth,
 117                 "Maximum queue depth to set for each LUN. "
 118                 "Default is 32.");
 119
 120 int ql2xenabledif = 2;
 121 module_param(ql2xenabledif, int, S_IRUGO);
 122 MODULE_PARM_DESC(ql2xenabledif,
 123                 " Enable T10-CRC-DIF:\n"
 124                 " Default is 2.\n"
 125                 "  0 -- No DIF Support\n"
 126                 "  1 -- Enable DIF for all types\n"
 127                 "  2 -- Enable DIF for all types, except Type 0.\n");
 128
 129 int ql2xenablehba_err_chk = 2;
 130 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 131 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 132                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 133                 " Default is 2.\n"
 134                 "  0 -- Error isolation disabled\n"
 135                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 136                 "  2 -- Error isolation enabled for all Types\n");
 137
 138 int ql2xiidmaenable=1;
 139 module_param(ql2xiidmaenable, int, S_IRUGO);
 140 MODULE_PARM_DESC(ql2xiidmaenable,
 141                 "Enables iIDMA settings "
 142                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 143
 144 int ql2xmaxqueues = 1;
 145 module_param(ql2xmaxqueues, int, S_IRUGO);
 146 MODULE_PARM_DESC(ql2xmaxqueues,
 147                 "Enables MQ settings "
 148                 "Default is 1 for single queue. Set it to number "
 149                 "of queues in MQ mode.");
 150
 151 int ql2xmultique_tag;
 152 module_param(ql2xmultique_tag, int, S_IRUGO);
 153 MODULE_PARM_DESC(ql2xmultique_tag,
 154                 "Enables CPU affinity settings for the driver "
 155                 "Default is 0 for no affinity of request and response IO. "
 156                 "Set it to 1 to turn on the cpu affinity.");
 157
 158 int ql2xfwloadbin;
 159 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 160 MODULE_PARM_DESC(ql2xfwloadbin,
 161                 "Option to specify location from which to load ISP firmware:.\n"
 162                 " 2 -- load firmware via the request_firmware() (hotplug).\n"
 163                 "      interface.\n"
 164                 " 1 -- load firmware from flash.\n"
 165                 " 0 -- use default semantics.\n");
 166
 167 int ql2xetsenable;
 168 module_param(ql2xetsenable, int, S_IRUGO);
 169 MODULE_PARM_DESC(ql2xetsenable,
 170                 "Enables firmware ETS burst."
 171                 "Default is 0 - skip ETS enablement.");
 172
 173 int ql2xdbwr = 1;
 174 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 175 MODULE_PARM_DESC(ql2xdbwr,
 176                 "Option to specify scheme for request queue posting.\n"
 177                 " 0 -- Regular doorbell.\n"
 178                 " 1 -- CAMRAM doorbell (faster).\n");
 179
 180 int ql2xtargetreset = 1;
 181 module_param(ql2xtargetreset, int, S_IRUGO);
 182 MODULE_PARM_DESC(ql2xtargetreset,
 183                  "Enable target reset."
 184                  "Default is 1 - use hw defaults.");
 185
 186 int ql2xgffidenable;
 187 module_param(ql2xgffidenable, int, S_IRUGO);
 188 MODULE_PARM_DESC(ql2xgffidenable,
 189                 "Enables GFF_ID checks of port type. "
 190                 "Default is 0 - Do not use GFF_ID information.");
 191
 192 int ql2xasynctmfenable;
 193 module_param(ql2xasynctmfenable, int, S_IRUGO);
 194 MODULE_PARM_DESC(ql2xasynctmfenable,
 195                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 196                 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
 197
 198 int ql2xdontresethba;
 199 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 200 MODULE_PARM_DESC(ql2xdontresethba,
 201                 "Option to specify reset behaviour.\n"
 202                 " 0 (Default) -- Reset on failure.\n"
 203                 " 1 -- Do not reset on failure.\n");
 204
 205 uint ql2xmaxlun = MAX_LUNS;
 206 module_param(ql2xmaxlun, uint, S_IRUGO);
 207 MODULE_PARM_DESC(ql2xmaxlun,
 208                 "Defines the maximum LU number to register with the SCSI "
 209                 "midlayer. Default is 65535.");
 210
 211 int ql2xmdcapmask = 0x1F;
 212 module_param(ql2xmdcapmask, int, S_IRUGO);
 213 MODULE_PARM_DESC(ql2xmdcapmask,
 214                 "Set the Minidump driver capture mask level. "
 215                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 216
 217 int ql2xmdenable = 1;
 218 module_param(ql2xmdenable, int, S_IRUGO);
 219 MODULE_PARM_DESC(ql2xmdenable,
 220                 "Enable/disable MiniDump. "
 221                 "0 - MiniDump disabled. "
 222                 "1 (Default) - MiniDump enabled.");
 223
 224 /*
 225  * SCSI host template entry points
 226  */
 227 static int qla2xxx_slave_configure(struct scsi_device * device);
 228 static int qla2xxx_slave_alloc(struct scsi_device *);
 229 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
 230 static void qla2xxx_scan_start(struct Scsi_Host *);
 231 static void qla2xxx_slave_destroy(struct scsi_device *);
 232 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 233 static int qla2xxx_eh_abort(struct scsi_cmnd *);
 234 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
 235 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
 236 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
 237 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
 238
 239 static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
 240 static int qla2x00_change_queue_type(struct scsi_device *, int);
 241 static void qla2x00_free_device(scsi_qla_host_t *);
 242
 243 struct scsi_host_template qla2xxx_driver_template = {
 244         .module                 = THIS_MODULE,
 245         .name                   = QLA2XXX_DRIVER_NAME,
 246         .queuecommand           = qla2xxx_queuecommand,
 247
 248         .eh_abort_handler       = qla2xxx_eh_abort,
 249         .eh_device_reset_handler = qla2xxx_eh_device_reset,
 250         .eh_target_reset_handler = qla2xxx_eh_target_reset,
 251         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
 252         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
 253
 254         .slave_configure        = qla2xxx_slave_configure,
 255
 256         .slave_alloc            = qla2xxx_slave_alloc,
 257         .slave_destroy          = qla2xxx_slave_destroy,
 258         .scan_finished          = qla2xxx_scan_finished,
 259         .scan_start             = qla2xxx_scan_start,
 260         .change_queue_depth     = qla2x00_change_queue_depth,
 261         .change_queue_type      = qla2x00_change_queue_type,
 262         .this_id                = -1,
 263         .cmd_per_lun            = 3,
 264         .use_clustering         = ENABLE_CLUSTERING,
 265         .sg_tablesize           = SG_ALL,
 266
 267         .max_sectors            = 0xFFFF,
 268         .shost_attrs            = qla2x00_host_attrs,
 269
 270         .supported_mode         = MODE_INITIATOR,
 271 };
 272
 273 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 274 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 275
 276 /* TODO Convert to inlines
 277  *
 278  * Timer routines
 279  */
 280
 281 __inline__ void
 282 qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
 283 {
 284         init_timer(&vha->timer);
 285         vha->timer.expires = jiffies + interval * HZ;
 286         vha->timer.data = (unsigned long)vha;
 287         vha->timer.function = (void (*)(unsigned long))func;
 288         add_timer(&vha->timer);
 289         vha->timer_active = 1;
 290 }
 291
 292 static inline void
 293 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 294 {
 295         /* Currently used for 82XX only. */
 296         if (vha->device_flags & DFLG_DEV_FAILED) {
 297                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 298                     "Device in a failed state, returning.\n");
 299                 return;
 300         }
 301
 302         mod_timer(&vha->timer, jiffies + interval * HZ);
 303 }
 304
 305 static __inline__ void
 306 qla2x00_stop_timer(scsi_qla_host_t *vha)
 307 {
 308         del_timer_sync(&vha->timer);
 309         vha->timer_active = 0;
 310 }
 311
 312 static int qla2x00_do_dpc(void *data);
 313
 314 static void qla2x00_rst_aen(scsi_qla_host_t *);
 315
 316 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 317         struct req_que **, struct rsp_que **);
 318 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 319 static void qla2x00_mem_free(struct qla_hw_data *);
 320
 321 /* -------------------------------------------------------------------------- */
 322 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 323                                 struct rsp_que *rsp)
 324 {
 325         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 326         ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
 327                                 GFP_KERNEL);
 328         if (!ha->req_q_map) {
 329                 ql_log(ql_log_fatal, vha, 0x003b,
 330                     "Unable to allocate memory for request queue ptrs.\n");
 331                 goto fail_req_map;
 332         }
 333
 334         ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
 335                                 GFP_KERNEL);
 336         if (!ha->rsp_q_map) {
 337                 ql_log(ql_log_fatal, vha, 0x003c,
 338                     "Unable to allocate memory for response queue ptrs.\n");
 339                 goto fail_rsp_map;
 340         }
 341         /*
 342          * Make sure we record at least the request and response queue zero in
 343          * case we need to free them if part of the probe fails.
 344          */
 345         ha->rsp_q_map[0] = rsp;
 346         ha->req_q_map[0] = req;
 347         set_bit(0, ha->rsp_qid_map);
 348         set_bit(0, ha->req_qid_map);
 349         return 1;
 350
 351 fail_rsp_map:
 352         kfree(ha->req_q_map);
 353         ha->req_q_map = NULL;
 354 fail_req_map:
 355         return -ENOMEM;
 356 }
 357
 358 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 359 {
 360         if (IS_QLAFX00(ha)) {
 361                 if (req && req->ring_fx00)
 362                         dma_free_coherent(&ha->pdev->dev,
 363                             (req->length_fx00 + 1) * sizeof(request_t),
 364                             req->ring_fx00, req->dma_fx00);
 365         } else if (req && req->ring)
 366                 dma_free_coherent(&ha->pdev->dev,
 367                 (req->length + 1) * sizeof(request_t),
 368                 req->ring, req->dma);
 369
 370         if (req)
 371                 kfree(req->outstanding_cmds);
 372
 373         kfree(req);
 374         req = NULL;
 375 }
 376
 377 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 378 {
 379         if (IS_QLAFX00(ha)) {
 380                 if (rsp && rsp->ring)
 381                         dma_free_coherent(&ha->pdev->dev,
 382                             (rsp->length_fx00 + 1) * sizeof(request_t),
 383                             rsp->ring_fx00, rsp->dma_fx00);
 384         } else if (rsp && rsp->ring) {
 385                 dma_free_coherent(&ha->pdev->dev,
 386                 (rsp->length + 1) * sizeof(response_t),
 387                 rsp->ring, rsp->dma);
 388         }
 389         kfree(rsp);
 390         rsp = NULL;
 391 }
 392
 393 static void qla2x00_free_queues(struct qla_hw_data *ha)
 394 {
 395         struct req_que *req;
 396         struct rsp_que *rsp;
 397         int cnt;
 398
 399         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 400                 req = ha->req_q_map[cnt];
 401                 qla2x00_free_req_que(ha, req);
 402         }
 403         kfree(ha->req_q_map);
 404         ha->req_q_map = NULL;
 405
 406         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 407                 rsp = ha->rsp_q_map[cnt];
 408                 qla2x00_free_rsp_que(ha, rsp);
 409         }
 410         kfree(ha->rsp_q_map);
 411         ha->rsp_q_map = NULL;
 412 }
 413
 414 static int qla25xx_setup_mode(struct scsi_qla_host *vha)
 415 {
 416         uint16_t options = 0;
 417         int ques, req, ret;
 418         struct qla_hw_data *ha = vha->hw;
 419
 420         if (!(ha->fw_attributes & BIT_6)) {
 421                 ql_log(ql_log_warn, vha, 0x00d8,
 422                     "Firmware is not multi-queue capable.\n");
 423                 goto fail;
 424         }
 425         if (ql2xmultique_tag) {
 426                 /* create a request queue for IO */
 427                 options |= BIT_7;
 428                 req = qla25xx_create_req_que(ha, options, 0, 0, -1,
 429                         QLA_DEFAULT_QUE_QOS);
 430                 if (!req) {
 431                         ql_log(ql_log_warn, vha, 0x00e0,
 432                             "Failed to create request queue.\n");
 433                         goto fail;
 434                 }
 435                 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1);
 436                 vha->req = ha->req_q_map[req];
 437                 options |= BIT_1;
 438                 for (ques = 1; ques < ha->max_rsp_queues; ques++) {
 439                         ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
 440                         if (!ret) {
 441                                 ql_log(ql_log_warn, vha, 0x00e8,
 442                                     "Failed to create response queue.\n");
 443                                 goto fail2;
 444                         }
 445                 }
 446                 ha->flags.cpu_affinity_enabled = 1;
 447                 ql_dbg(ql_dbg_multiq, vha, 0xc007,
 448                     "CPU affinity mode enalbed, "
 449                     "no. of response queues:%d no. of request queues:%d.\n",
 450                     ha->max_rsp_queues, ha->max_req_queues);
 451                 ql_dbg(ql_dbg_init, vha, 0x00e9,
 452                     "CPU affinity mode enalbed, "
 453                     "no. of response queues:%d no. of request queues:%d.\n",
 454                     ha->max_rsp_queues, ha->max_req_queues);
 455         }
 456         return 0;
 457 fail2:
 458         qla25xx_delete_queues(vha);
 459         destroy_workqueue(ha->wq);
 460         ha->wq = NULL;
 461         vha->req = ha->req_q_map[0];
 462 fail:
 463         ha->mqenable = 0;
 464         kfree(ha->req_q_map);
 465         kfree(ha->rsp_q_map);
 466         ha->max_req_queues = ha->max_rsp_queues = 1;
 467         return 1;
 468 }
 469
 470 static char *
 471 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
 472 {
 473         struct qla_hw_data *ha = vha->hw;
 474         static char *pci_bus_modes[] = {
 475                 "33", "66", "100", "133",
 476         };
 477         uint16_t pci_bus;
 478
 479         strcpy(str, "PCI");
 480         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 481         if (pci_bus) {
 482                 strcat(str, "-X (");
 483                 strcat(str, pci_bus_modes[pci_bus]);
 484         } else {
 485                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 486                 strcat(str, " (");
 487                 strcat(str, pci_bus_modes[pci_bus]);
 488         }
 489         strcat(str, " MHz)");
 490
 491         return (str);
 492 }
 493
 494 static char *
 495 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
 496 {
 497         static char *pci_bus_modes[] = { "33", "66", "100", "133", };
 498         struct qla_hw_data *ha = vha->hw;
 499         uint32_t pci_bus;
 500
 501         if (pci_is_pcie(ha->pdev)) {
 502                 char lwstr[6];
 503                 uint32_t lstat, lspeed, lwidth;
 504
 505                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 506                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
 507                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
 508
 509                 strcpy(str, "PCIe (");
 510                 switch (lspeed) {
 511                 case 1:
 512                         strcat(str, "2.5GT/s ");
 513                         break;
 514                 case 2:
 515                         strcat(str, "5.0GT/s ");
 516                         break;
 517                 case 3:
 518                         strcat(str, "8.0GT/s ");
 519                         break;
 520                 default:
 521                         strcat(str, "<unknown> ");
 522                         break;
 523                 }
 524                 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
 525                 strcat(str, lwstr);
 526
 527                 return str;
 528         }
 529
 530         strcpy(str, "PCI");
 531         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 532         if (pci_bus == 0 || pci_bus == 8) {
 533                 strcat(str, " (");
 534                 strcat(str, pci_bus_modes[pci_bus >> 3]);
 535         } else {
 536                 strcat(str, "-X ");
 537                 if (pci_bus & BIT_2)
 538                         strcat(str, "Mode 2");
 539                 else
 540                         strcat(str, "Mode 1");
 541                 strcat(str, " (");
 542                 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
 543         }
 544         strcat(str, " MHz)");
 545
 546         return str;
 547 }
 548
 549 static char *
 550 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
 551 {
 552         char un_str[10];
 553         struct qla_hw_data *ha = vha->hw;
 554
 555         sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
 556             ha->fw_minor_version,
 557             ha->fw_subminor_version);
 558
 559         if (ha->fw_attributes & BIT_9) {
 560                 strcat(str, "FLX");
 561                 return (str);
 562         }
 563
 564         switch (ha->fw_attributes & 0xFF) {
 565         case 0x7:
 566                 strcat(str, "EF");
 567                 break;
 568         case 0x17:
 569                 strcat(str, "TP");
 570                 break;
 571         case 0x37:
 572                 strcat(str, "IP");
 573                 break;
 574         case 0x77:
 575                 strcat(str, "VI");
 576                 break;
 577         default:
 578                 sprintf(un_str, "(%x)", ha->fw_attributes);
 579                 strcat(str, un_str);
 580                 break;
 581         }
 582         if (ha->fw_attributes & 0x100)
 583                 strcat(str, "X");
 584
 585         return (str);
 586 }
 587
 588 static char *
 589 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
 590 {
 591         struct qla_hw_data *ha = vha->hw;
 592
 593         sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
 594             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 595         return str;
 596 }
 597
 598 void
 599 qla2x00_sp_free_dma(void *vha, void *ptr)
 600 {
 601         srb_t *sp = (srb_t *)ptr;
 602         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 603         struct qla_hw_data *ha = sp->fcport->vha->hw;
 604         void *ctx = GET_CMD_CTX_SP(sp);
 605
 606         if (sp->flags & SRB_DMA_VALID) {
 607                 scsi_dma_unmap(cmd);
 608                 sp->flags &= ~SRB_DMA_VALID;
 609         }
 610
 611         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 612                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 613                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 614                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 615         }
 616
 617         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 618                 /* List assured to be having elements */
 619                 qla2x00_clean_dsd_pool(ha, sp, NULL);
 620                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 621         }
 622
 623         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 624                 dma_pool_free(ha->dl_dma_pool, ctx,
 625                     ((struct crc_context *)ctx)->crc_ctx_dma);
 626                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 627         }
 628
 629         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 630                 struct ct6_dsd *ctx1 = (struct ct6_dsd *)ctx;
 631
 632                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 633                         ctx1->fcp_cmnd_dma);
 634                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 635                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 636                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 637                 mempool_free(ctx1, ha->ctx_mempool);
 638                 ctx1 = NULL;
 639         }
 640
 641         CMD_SP(cmd) = NULL;
 642         qla2x00_rel_sp(sp->fcport->vha, sp);
 643 }
 644
 645 static void
 646 qla2x00_sp_compl(void *data, void *ptr, int res)
 647 {
 648         struct qla_hw_data *ha = (struct qla_hw_data *)data;
 649         srb_t *sp = (srb_t *)ptr;
 650         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 651
 652         cmd->result = res;
 653
 654         if (atomic_read(&sp->ref_count) == 0) {
 655                 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3015,
 656                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 657                     sp, GET_CMD_SP(sp));
 658                 if (ql2xextended_error_logging & ql_dbg_io)
 659                         BUG();
 660                 return;
 661         }
 662         if (!atomic_dec_and_test(&sp->ref_count))
 663                 return;
 664
 665         qla2x00_sp_free_dma(ha, sp);
 666         cmd->scsi_done(cmd);
 667 }
 668
 669 /* If we are SP1 here, we need to still take and release the host_lock as SP1
 670  * does not have the changes necessary to avoid taking host->host_lock.
 671  */
 672 static int
 673 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 674 {
 675         scsi_qla_host_t *vha = shost_priv(host);
 676         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 677         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 678         struct qla_hw_data *ha = vha->hw;
 679         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 680         srb_t *sp;
 681         int rval;
 682
 683         if (ha->flags.eeh_busy) {
 684                 if (ha->flags.pci_channel_io_perm_failure) {
 685                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 686                             "PCI Channel IO permanent failure, exiting "
 687                             "cmd=%p.\n", cmd);
 688                         cmd->result = DID_NO_CONNECT << 16;
 689                 } else {
 690                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 691                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 692                         cmd->result = DID_REQUEUE << 16;
 693                 }
 694                 goto qc24_fail_command;
 695         }
 696
 697         rval = fc_remote_port_chkready(rport);
 698         if (rval) {
 699                 cmd->result = rval;
 700                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 701                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 702                     cmd, rval);
 703                 goto qc24_fail_command;
 704         }
 705
 706         if (!vha->flags.difdix_supported &&
 707                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 708                         ql_dbg(ql_dbg_io, vha, 0x3004,
 709                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 710                             cmd);
 711                         cmd->result = DID_NO_CONNECT << 16;
 712                         goto qc24_fail_command;
 713         }
 714
 715         if (!fcport) {
 716                 cmd->result = DID_NO_CONNECT << 16;
 717                 goto qc24_fail_command;
 718         }
 719
 720         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 721                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 722                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 723                         ql_dbg(ql_dbg_io, vha, 0x3005,
 724                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 725                             atomic_read(&fcport->state),
 726                             atomic_read(&base_vha->loop_state));
 727                         cmd->result = DID_NO_CONNECT << 16;
 728                         goto qc24_fail_command;
 729                 }
 730                 goto qc24_target_busy;
 731         }
 732
 733         sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
 734         if (!sp)
 735                 goto qc24_host_busy;
 736
 737         sp->u.scmd.cmd = cmd;
 738         sp->type = SRB_SCSI_CMD;
 739         atomic_set(&sp->ref_count, 1);
 740         CMD_SP(cmd) = (void *)sp;
 741         sp->free = qla2x00_sp_free_dma;
 742         sp->done = qla2x00_sp_compl;
 743
 744         rval = ha->isp_ops->start_scsi(sp);
 745         if (rval != QLA_SUCCESS) {
 746                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 747                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 748                 goto qc24_host_busy_free_sp;
 749         }
 750
 751         return 0;
 752
 753 qc24_host_busy_free_sp:
 754         qla2x00_sp_free_dma(ha, sp);
 755
 756 qc24_host_busy:
 757         return SCSI_MLQUEUE_HOST_BUSY;
 758
 759 qc24_target_busy:
 760         return SCSI_MLQUEUE_TARGET_BUSY;
 761
 762 qc24_fail_command:
 763         cmd->scsi_done(cmd);
 764
 765         return 0;
 766 }
 767
 768 /*
 769  * qla2x00_eh_wait_on_command
 770  *    Waits for the command to be returned by the Firmware for some
 771  *    max time.
 772  *
 773  * Input:
 774  *    cmd = Scsi Command to wait on.
 775  *
 776  * Return:
 777  *    Not Found : 0
 778  *    Found : 1
 779  */
 780 static int
 781 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
 782 {
 783 #define ABORT_POLLING_PERIOD    1000
 784 #define ABORT_WAIT_ITER         ((2 * 1000) / (ABORT_POLLING_PERIOD))
 785         unsigned long wait_iter = ABORT_WAIT_ITER;
 786         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 787         struct qla_hw_data *ha = vha->hw;
 788         int ret = QLA_SUCCESS;
 789
 790         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
 791                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
 792                     "Return:eh_wait.\n");
 793                 return ret;
 794         }
 795
 796         while (CMD_SP(cmd) && wait_iter--) {
 797                 msleep(ABORT_POLLING_PERIOD);
 798         }
 799         if (CMD_SP(cmd))
 800                 ret = QLA_FUNCTION_FAILED;
 801
 802         return ret;
 803 }
 804
 805 /*
 806  * qla2x00_wait_for_hba_online
 807  *    Wait till the HBA is online after going through
 808  *    <= MAX_RETRIES_OF_ISP_ABORT  or
 809  *    finally HBA is disabled ie marked offline
 810  *
 811  * Input:
 812  *     ha - pointer to host adapter structure
 813  *
 814  * Note:
 815  *    Does context switching-Release SPIN_LOCK
 816  *    (if any) before calling this routine.
 817  *
 818  * Return:
 819  *    Success (Adapter is online) : 0
 820  *    Failed  (Adapter is offline/disabled) : 1
 821  */
 822 int
 823 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
 824 {
 825         int             return_status;
 826         unsigned long   wait_online;
 827         struct qla_hw_data *ha = vha->hw;
 828         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 829
 830         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 831         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 832             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 833             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 834             ha->dpc_active) && time_before(jiffies, wait_online)) {
 835
 836                 msleep(1000);
 837         }
 838         if (base_vha->flags.online)
 839                 return_status = QLA_SUCCESS;
 840         else
 841                 return_status = QLA_FUNCTION_FAILED;
 842
 843         return (return_status);
 844 }
 845
 846 /*
 847  * qla2x00_wait_for_hba_ready
 848  * Wait till the HBA is ready before doing driver unload
 849  *
 850  * Input:
 851  *     ha - pointer to host adapter structure
 852  *
 853  * Note:
 854  *    Does context switching-Release SPIN_LOCK
 855  *    (if any) before calling this routine.
 856  *
 857  */
 858 static void
 859 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
 860 {
 861         struct qla_hw_data *ha = vha->hw;
 862
 863         while ((!(vha->flags.online) || ha->dpc_active ||
 864             ha->flags.mbox_busy))
 865                 msleep(1000);
 866 }
 867
 868 /*
 869  * qla2x00_wait_for_reset_ready
 870  *    Wait till the HBA is online after going through
 871  *    <= MAX_RETRIES_OF_ISP_ABORT  or
 872  *    finally HBA is disabled ie marked offline or flash
 873  *    operations are in progress.
 874  *
 875  * Input:
 876  *     ha - pointer to host adapter structure
 877  *
 878  * Note:
 879  *    Does context switching-Release SPIN_LOCK
 880  *    (if any) before calling this routine.
 881  *
 882  * Return:
 883  *    Success (Adapter is online/no flash ops) : 0
 884  *    Failed  (Adapter is offline/disabled/flash ops in progress) : 1
 885  */
 886 static int
 887 qla2x00_wait_for_reset_ready(scsi_qla_host_t *vha)
 888 {
 889         int             return_status;
 890         unsigned long   wait_online;
 891         struct qla_hw_data *ha = vha->hw;
 892         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 893
 894         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 895         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 896             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 897             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 898             ha->optrom_state != QLA_SWAITING ||
 899             ha->dpc_active) && time_before(jiffies, wait_online))
 900                 msleep(1000);
 901
 902         if (base_vha->flags.online &&  ha->optrom_state == QLA_SWAITING)
 903                 return_status = QLA_SUCCESS;
 904         else
 905                 return_status = QLA_FUNCTION_FAILED;
 906
 907         ql_dbg(ql_dbg_taskm, vha, 0x8019,
 908             "%s return status=%d.\n", __func__, return_status);
 909
 910         return return_status;
 911 }
 912
 913 int
 914 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
 915 {
 916         int             return_status;
 917         unsigned long   wait_reset;
 918         struct qla_hw_data *ha = vha->hw;
 919         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 920
 921         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 922         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 923             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 924             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 925             ha->dpc_active) && time_before(jiffies, wait_reset)) {
 926
 927                 msleep(1000);
 928
 929                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
 930                     ha->flags.chip_reset_done)
 931                         break;
 932         }
 933         if (ha->flags.chip_reset_done)
 934                 return_status = QLA_SUCCESS;
 935         else
 936                 return_status = QLA_FUNCTION_FAILED;
 937
 938         return return_status;
 939 }
 940
 941 static void
 942 sp_get(struct srb *sp)
 943 {
 944         atomic_inc(&sp->ref_count);
 945 }
 946
 947 /**************************************************************************
 948 * qla2xxx_eh_abort
 949 *
 950 * Description:
 951 *    The abort function will abort the specified command.
 952 *
 953 * Input:
 954 *    cmd = Linux SCSI command packet to be aborted.
 955 *
 956 * Returns:
 957 *    Either SUCCESS or FAILED.
 958 *
 959 * Note:
 960 *    Only return FAILED if command not returned by firmware.
 961 **************************************************************************/
 962 static int
 963 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
 964 {
 965         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 966         srb_t *sp;
 967         int ret;
 968         unsigned int id, lun;
 969         unsigned long flags;
 970         int rval, wait = 0;
 971         struct qla_hw_data *ha = vha->hw;
 972
 973         if (!CMD_SP(cmd))
 974                 return SUCCESS;
 975
 976         ret = fc_block_scsi_eh(cmd);
 977         if (ret != 0)
 978                 return ret;
 979         ret = SUCCESS;
 980
 981         id = cmd->device->id;
 982         lun = cmd->device->lun;
 983
 984         spin_lock_irqsave(&ha->hardware_lock, flags);
 985         sp = (srb_t *) CMD_SP(cmd);
 986         if (!sp) {
 987                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 988                 return SUCCESS;
 989         }
 990
 991         ql_dbg(ql_dbg_taskm, vha, 0x8002,
 992             "Aborting from RISC nexus=%ld:%d:%d sp=%p cmd=%p\n",
 993             vha->host_no, id, lun, sp, cmd);
 994
 995         /* Get a reference to the sp and drop the lock.*/
 996         sp_get(sp);
 997
 998         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 999         rval = ha->isp_ops->abort_command(sp);
1000         if (rval) {
1001                 if (rval == QLA_FUNCTION_PARAMETER_ERROR) {
1002                         /*
1003                          * Decrement the ref_count since we can't find the
1004                          * command
1005                          */
1006                         atomic_dec(&sp->ref_count);
1007                         ret = SUCCESS;
1008                 } else
1009                         ret = FAILED;
1010
1011                 ql_dbg(ql_dbg_taskm, vha, 0x8003,
1012                     "Abort command mbx failed cmd=%p, rval=%x.\n", cmd, rval);
1013         } else {
1014                 ql_dbg(ql_dbg_taskm, vha, 0x8004,
1015                     "Abort command mbx success cmd=%p.\n", cmd);
1016                 wait = 1;
1017         }
1018
1019         spin_lock_irqsave(&ha->hardware_lock, flags);
1020         /*
1021          * Clear the slot in the oustanding_cmds array if we can't find the
1022          * command to reclaim the resources.
1023          */
1024         if (rval == QLA_FUNCTION_PARAMETER_ERROR)
1025                 vha->req->outstanding_cmds[sp->handle] = NULL;
1026         sp->done(ha, sp, 0);
1027         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1028
1029         /* Did the command return during mailbox execution? */
1030         if (ret == FAILED && !CMD_SP(cmd))
1031                 ret = SUCCESS;
1032
1033         /* Wait for the command to be returned. */
1034         if (wait) {
1035                 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
1036                         ql_log(ql_log_warn, vha, 0x8006,
1037                             "Abort handler timed out cmd=%p.\n", cmd);
1038                         ret = FAILED;
1039                 }
1040         }
1041
1042         ql_log(ql_log_info, vha, 0x801c,
1043             "Abort command issued nexus=%ld:%d:%d --  %d %x.\n",
1044             vha->host_no, id, lun, wait, ret);
1045
1046         return ret;
1047 }
1048
1049 int
1050 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1051         unsigned int l, enum nexus_wait_type type)
1052 {
1053         int cnt, match, status;
1054         unsigned long flags;
1055         struct qla_hw_data *ha = vha->hw;
1056         struct req_que *req;
1057         srb_t *sp;
1058         struct scsi_cmnd *cmd;
1059
1060         status = QLA_SUCCESS;
1061
1062         spin_lock_irqsave(&ha->hardware_lock, flags);
1063         req = vha->req;
1064         for (cnt = 1; status == QLA_SUCCESS &&
1065                 cnt < req->num_outstanding_cmds; cnt++) {
1066                 sp = req->outstanding_cmds[cnt];
1067                 if (!sp)
1068                         continue;
1069                 if (sp->type != SRB_SCSI_CMD)
1070                         continue;
1071                 if (vha->vp_idx != sp->fcport->vha->vp_idx)
1072                         continue;
1073                 match = 0;
1074                 cmd = GET_CMD_SP(sp);
1075                 switch (type) {
1076                 case WAIT_HOST:
1077                         match = 1;
1078                         break;
1079                 case WAIT_TARGET:
1080                         match = cmd->device->id == t;
1081                         break;
1082                 case WAIT_LUN:
1083                         match = (cmd->device->id == t &&
1084                                 cmd->device->lun == l);
1085                         break;
1086                 }
1087                 if (!match)
1088                         continue;
1089
1090                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1091                 status = qla2x00_eh_wait_on_command(cmd);
1092                 spin_lock_irqsave(&ha->hardware_lock, flags);
1093         }
1094         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1095
1096         return status;
1097 }
1098
1099 static char *reset_errors[] = {
1100         "HBA not online",
1101         "HBA not ready",
1102         "Task management failed",
1103         "Waiting for command completions",
1104 };
1105
1106 static int
1107 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1108     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int))
1109 {
1110         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1111         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1112         int err;
1113
1114         if (!fcport) {
1115                 return FAILED;
1116         }
1117
1118         err = fc_block_scsi_eh(cmd);
1119         if (err != 0)
1120                 return err;
1121
1122         ql_log(ql_log_info, vha, 0x8009,
1123             "%s RESET ISSUED nexus=%ld:%d:%d cmd=%p.\n", name, vha->host_no,
1124             cmd->device->id, cmd->device->lun, cmd);
1125
1126         err = 0;
1127         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1128                 ql_log(ql_log_warn, vha, 0x800a,
1129                     "Wait for hba online failed for cmd=%p.\n", cmd);
1130                 goto eh_reset_failed;
1131         }
1132         err = 2;
1133         if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1134                 != QLA_SUCCESS) {
1135                 ql_log(ql_log_warn, vha, 0x800c,
1136                     "do_reset failed for cmd=%p.\n", cmd);
1137                 goto eh_reset_failed;
1138         }
1139         err = 3;
1140         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1141             cmd->device->lun, type) != QLA_SUCCESS) {
1142                 ql_log(ql_log_warn, vha, 0x800d,
1143                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1144                 goto eh_reset_failed;
1145         }
1146
1147         ql_log(ql_log_info, vha, 0x800e,
1148             "%s RESET SUCCEEDED nexus:%ld:%d:%d cmd=%p.\n", name,
1149             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1150
1151         return SUCCESS;
1152
1153 eh_reset_failed:
1154         ql_log(ql_log_info, vha, 0x800f,
1155             "%s RESET FAILED: %s nexus=%ld:%d:%d cmd=%p.\n", name,
1156             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1157             cmd);
1158         return FAILED;
1159 }
1160
1161 static int
1162 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1163 {
1164         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1165         struct qla_hw_data *ha = vha->hw;
1166
1167         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1168             ha->isp_ops->lun_reset);
1169 }
1170
1171 static int
1172 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1173 {
1174         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1175         struct qla_hw_data *ha = vha->hw;
1176
1177         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1178             ha->isp_ops->target_reset);
1179 }
1180
1181 /**************************************************************************
1182 * qla2xxx_eh_bus_reset
1183 *
1184 * Description:
1185 *    The bus reset function will reset the bus and abort any executing
1186 *    commands.
1187 *
1188 * Input:
1189 *    cmd = Linux SCSI command packet of the command that cause the
1190 *          bus reset.
1191 *
1192 * Returns:
1193 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1194 *
1195 **************************************************************************/
1196 static int
1197 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1198 {
1199         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1200         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1201         int ret = FAILED;
1202         unsigned int id, lun;
1203
1204         id = cmd->device->id;
1205         lun = cmd->device->lun;
1206
1207         if (!fcport) {
1208                 return ret;
1209         }
1210
1211         ret = fc_block_scsi_eh(cmd);
1212         if (ret != 0)
1213                 return ret;
1214         ret = FAILED;
1215
1216         ql_log(ql_log_info, vha, 0x8012,
1217             "BUS RESET ISSUED nexus=%ld:%d:%d.\n", vha->host_no, id, lun);
1218
1219         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1220                 ql_log(ql_log_fatal, vha, 0x8013,
1221                     "Wait for hba online failed board disabled.\n");
1222                 goto eh_bus_reset_done;
1223         }
1224
1225         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1226                 ret = SUCCESS;
1227
1228         if (ret == FAILED)
1229                 goto eh_bus_reset_done;
1230
1231         /* Flush outstanding commands. */
1232         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1233             QLA_SUCCESS) {
1234                 ql_log(ql_log_warn, vha, 0x8014,
1235                     "Wait for pending commands failed.\n");
1236                 ret = FAILED;
1237         }
1238
1239 eh_bus_reset_done:
1240         ql_log(ql_log_warn, vha, 0x802b,
1241             "BUS RESET %s nexus=%ld:%d:%d.\n",
1242             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1243
1244         return ret;
1245 }
1246
1247 /**************************************************************************
1248 * qla2xxx_eh_host_reset
1249 *
1250 * Description:
1251 *    The reset function will reset the Adapter.
1252 *
1253 * Input:
1254 *      cmd = Linux SCSI command packet of the command that cause the
1255 *            adapter reset.
1256 *
1257 * Returns:
1258 *      Either SUCCESS or FAILED.
1259 *
1260 * Note:
1261 **************************************************************************/
1262 static int
1263 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1264 {
1265         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1266         struct qla_hw_data *ha = vha->hw;
1267         int ret = FAILED;
1268         unsigned int id, lun;
1269         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1270
1271         id = cmd->device->id;
1272         lun = cmd->device->lun;
1273
1274         ql_log(ql_log_info, vha, 0x8018,
1275             "ADAPTER RESET ISSUED nexus=%ld:%d:%d.\n", vha->host_no, id, lun);
1276
1277         if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS)
1278                 goto eh_host_reset_lock;
1279
1280         if (vha != base_vha) {
1281                 if (qla2x00_vp_abort_isp(vha))
1282                         goto eh_host_reset_lock;
1283         } else {
1284                 if (IS_P3P_TYPE(vha->hw)) {
1285                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1286                                 /* Ctx reset success */
1287                                 ret = SUCCESS;
1288                                 goto eh_host_reset_lock;
1289                         }
1290                         /* fall thru if ctx reset failed */
1291                 }
1292                 if (ha->wq)
1293                         flush_workqueue(ha->wq);
1294
1295                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1296                 if (ha->isp_ops->abort_isp(base_vha)) {
1297                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1298                         /* failed. schedule dpc to try */
1299                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1300
1301                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1302                                 ql_log(ql_log_warn, vha, 0x802a,
1303                                     "wait for hba online failed.\n");
1304                                 goto eh_host_reset_lock;
1305                         }
1306                 }
1307                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1308         }
1309
1310         /* Waiting for command to be returned to OS.*/
1311         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1312                 QLA_SUCCESS)
1313                 ret = SUCCESS;
1314
1315 eh_host_reset_lock:
1316         ql_log(ql_log_info, vha, 0x8017,
1317             "ADAPTER RESET %s nexus=%ld:%d:%d.\n",
1318             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1319
1320         return ret;
1321 }
1322
1323 /*
1324 * qla2x00_loop_reset
1325 *      Issue loop reset.
1326 *
1327 * Input:
1328 *      ha = adapter block pointer.
1329 *
1330 * Returns:
1331 *      0 = success
1332 */
1333 int
1334 qla2x00_loop_reset(scsi_qla_host_t *vha)
1335 {
1336         int ret;
1337         struct fc_port *fcport;
1338         struct qla_hw_data *ha = vha->hw;
1339
1340         if (IS_QLAFX00(ha)) {
1341                 return qlafx00_loop_reset(vha);
1342         }
1343
1344         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1345                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1346                         if (fcport->port_type != FCT_TARGET)
1347                                 continue;
1348
1349                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1350                         if (ret != QLA_SUCCESS) {
1351                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1352                                     "Bus Reset failed: Reset=%d "
1353                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1354                         }
1355                 }
1356         }
1357
1358
1359         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1360                 atomic_set(&vha->loop_state, LOOP_DOWN);
1361                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1362                 qla2x00_mark_all_devices_lost(vha, 0);
1363                 ret = qla2x00_full_login_lip(vha);
1364                 if (ret != QLA_SUCCESS) {
1365                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1366                             "full_login_lip=%d.\n", ret);
1367                 }
1368         }
1369
1370         if (ha->flags.enable_lip_reset) {
1371                 ret = qla2x00_lip_reset(vha);
1372                 if (ret != QLA_SUCCESS)
1373                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1374                             "lip_reset failed (%d).\n", ret);
1375         }
1376
1377         /* Issue marker command only when we are going to start the I/O */
1378         vha->marker_needed = 1;
1379
1380         return QLA_SUCCESS;
1381 }
1382
1383 void
1384 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1385 {
1386         int que, cnt;
1387         unsigned long flags;
1388         srb_t *sp;
1389         struct qla_hw_data *ha = vha->hw;
1390         struct req_que *req;
1391
1392         spin_lock_irqsave(&ha->hardware_lock, flags);
1393         for (que = 0; que < ha->max_req_queues; que++) {
1394                 req = ha->req_q_map[que];
1395                 if (!req)
1396                         continue;
1397                 if (!req->outstanding_cmds)
1398                         continue;
1399                 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1400                         sp = req->outstanding_cmds[cnt];
1401                         if (sp) {
1402                                 req->outstanding_cmds[cnt] = NULL;
1403                                 sp->done(vha, sp, res);
1404                         }
1405                 }
1406         }
1407         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1408 }
1409
1410 static int
1411 qla2xxx_slave_alloc(struct scsi_device *sdev)
1412 {
1413         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1414
1415         if (!rport || fc_remote_port_chkready(rport))
1416                 return -ENXIO;
1417
1418         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1419
1420         return 0;
1421 }
1422
1423 static int
1424 qla2xxx_slave_configure(struct scsi_device *sdev)
1425 {
1426         scsi_qla_host_t *vha = shost_priv(sdev->host);
1427         struct req_que *req = vha->req;
1428
1429         if (IS_T10_PI_CAPABLE(vha->hw))
1430                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1431
1432         if (sdev->tagged_supported)
1433                 scsi_activate_tcq(sdev, req->max_q_depth);
1434         else
1435                 scsi_deactivate_tcq(sdev, req->max_q_depth);
1436         return 0;
1437 }
1438
1439 static void
1440 qla2xxx_slave_destroy(struct scsi_device *sdev)
1441 {
1442         sdev->hostdata = NULL;
1443 }
1444
1445 static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
1446 {
1447         fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
1448
1449         if (!scsi_track_queue_full(sdev, qdepth))
1450                 return;
1451
1452         ql_dbg(ql_dbg_io, fcport->vha, 0x3029,
1453             "Queue depth adjusted-down to %d for nexus=%ld:%d:%d.\n",
1454             sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun);
1455 }
1456
1457 static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
1458 {
1459         fc_port_t *fcport = sdev->hostdata;
1460         struct scsi_qla_host *vha = fcport->vha;
1461         struct req_que *req = NULL;
1462
1463         req = vha->req;
1464         if (!req)
1465                 return;
1466
1467         if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
1468                 return;
1469
1470         if (sdev->ordered_tags)
1471                 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
1472         else
1473                 scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
1474
1475         ql_dbg(ql_dbg_io, vha, 0x302a,
1476             "Queue depth adjusted-up to %d for nexus=%ld:%d:%d.\n",
1477             sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun);
1478 }
1479
1480 static int
1481 qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
1482 {
1483         switch (reason) {
1484         case SCSI_QDEPTH_DEFAULT:
1485                 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
1486                 break;
1487         case SCSI_QDEPTH_QFULL:
1488                 qla2x00_handle_queue_full(sdev, qdepth);
1489                 break;
1490         case SCSI_QDEPTH_RAMP_UP:
1491                 qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
1492                 break;
1493         default:
1494                 return -EOPNOTSUPP;
1495         }
1496
1497         return sdev->queue_depth;
1498 }
1499
1500 static int
1501 qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
1502 {
1503         if (sdev->tagged_supported) {
1504                 scsi_set_tag_type(sdev, tag_type);
1505                 if (tag_type)
1506                         scsi_activate_tcq(sdev, sdev->queue_depth);
1507                 else
1508                         scsi_deactivate_tcq(sdev, sdev->queue_depth);
1509         } else
1510                 tag_type = 0;
1511
1512         return tag_type;
1513 }
1514
1515 /**
1516  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1517  * @ha: HA context
1518  *
1519  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1520  * supported addressing method.
1521  */
1522 static void
1523 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1524 {
1525         /* Assume a 32bit DMA mask. */
1526         ha->flags.enable_64bit_addressing = 0;
1527
1528         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1529                 /* Any upper-dword bits set? */
1530                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1531                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1532                         /* Ok, a 64bit DMA mask is applicable. */
1533                         ha->flags.enable_64bit_addressing = 1;
1534                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1535                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1536                         return;
1537                 }
1538         }
1539
1540         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1541         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1542 }
1543
1544 static void
1545 qla2x00_enable_intrs(struct qla_hw_data *ha)
1546 {
1547         unsigned long flags = 0;
1548         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1549
1550         spin_lock_irqsave(&ha->hardware_lock, flags);
1551         ha->interrupts_on = 1;
1552         /* enable risc and host interrupts */
1553         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1554         RD_REG_WORD(&reg->ictrl);
1555         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1556
1557 }
1558
1559 static void
1560 qla2x00_disable_intrs(struct qla_hw_data *ha)
1561 {
1562         unsigned long flags = 0;
1563         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1564
1565         spin_lock_irqsave(&ha->hardware_lock, flags);
1566         ha->interrupts_on = 0;
1567         /* disable risc and host interrupts */
1568         WRT_REG_WORD(&reg->ictrl, 0);
1569         RD_REG_WORD(&reg->ictrl);
1570         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1571 }
1572
1573 static void
1574 qla24xx_enable_intrs(struct qla_hw_data *ha)
1575 {
1576         unsigned long flags = 0;
1577         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1578
1579         spin_lock_irqsave(&ha->hardware_lock, flags);
1580         ha->interrupts_on = 1;
1581         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1582         RD_REG_DWORD(&reg->ictrl);
1583         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1584 }
1585
1586 static void
1587 qla24xx_disable_intrs(struct qla_hw_data *ha)
1588 {
1589         unsigned long flags = 0;
1590         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1591
1592         if (IS_NOPOLLING_TYPE(ha))
1593                 return;
1594         spin_lock_irqsave(&ha->hardware_lock, flags);
1595         ha->interrupts_on = 0;
1596         WRT_REG_DWORD(&reg->ictrl, 0);
1597         RD_REG_DWORD(&reg->ictrl);
1598         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1599 }
1600
1601 static int
1602 qla2x00_iospace_config(struct qla_hw_data *ha)
1603 {
1604         resource_size_t pio;
1605         uint16_t msix;
1606         int cpus;
1607
1608         if (pci_request_selected_regions(ha->pdev, ha->bars,
1609             QLA2XXX_DRIVER_NAME)) {
1610                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1611                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1612                     pci_name(ha->pdev));
1613                 goto iospace_error_exit;
1614         }
1615         if (!(ha->bars & 1))
1616                 goto skip_pio;
1617
1618         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1619         pio = pci_resource_start(ha->pdev, 0);
1620         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1621                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1622                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1623                             "Invalid pci I/O region size (%s).\n",
1624                             pci_name(ha->pdev));
1625                         pio = 0;
1626                 }
1627         } else {
1628                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1629                     "Region #0 no a PIO resource (%s).\n",
1630                     pci_name(ha->pdev));
1631                 pio = 0;
1632         }
1633         ha->pio_address = pio;
1634         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1635             "PIO address=%llu.\n",
1636             (unsigned long long)ha->pio_address);
1637
1638 skip_pio:
1639         /* Use MMIO operations for all accesses. */
1640         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1641                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1642                     "Region #1 not an MMIO resource (%s), aborting.\n",
1643                     pci_name(ha->pdev));
1644                 goto iospace_error_exit;
1645         }
1646         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1647                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1648                     "Invalid PCI mem region size (%s), aborting.\n",
1649                     pci_name(ha->pdev));
1650                 goto iospace_error_exit;
1651         }
1652
1653         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1654         if (!ha->iobase) {
1655                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1656                     "Cannot remap MMIO (%s), aborting.\n",
1657                     pci_name(ha->pdev));
1658                 goto iospace_error_exit;
1659         }
1660
1661         /* Determine queue resources */
1662         ha->max_req_queues = ha->max_rsp_queues = 1;
1663         if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
1664                 (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
1665                 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1666                 goto mqiobase_exit;
1667
1668         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1669                         pci_resource_len(ha->pdev, 3));
1670         if (ha->mqiobase) {
1671                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1672                     "MQIO Base=%p.\n", ha->mqiobase);
1673                 /* Read MSIX vector size of the board */
1674                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1675                 ha->msix_count = msix;
1676                 /* Max queues are bounded by available msix vectors */
1677                 /* queue 0 uses two msix vectors */
1678                 if (ql2xmultique_tag) {
1679                         cpus = num_online_cpus();
1680                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1681                                 (cpus + 1) : (ha->msix_count - 1);
1682                         ha->max_req_queues = 2;
1683                 } else if (ql2xmaxqueues > 1) {
1684                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1685                             QLA_MQ_SIZE : ql2xmaxqueues;
1686                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc008,
1687                             "QoS mode set, max no of request queues:%d.\n",
1688                             ha->max_req_queues);
1689                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0019,
1690                             "QoS mode set, max no of request queues:%d.\n",
1691                             ha->max_req_queues);
1692                 }
1693                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1694                     "MSI-X vector count: %d.\n", msix);
1695         } else
1696                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
1697                     "BAR 3 not enabled.\n");
1698
1699 mqiobase_exit:
1700         ha->msix_count = ha->max_rsp_queues + 1;
1701         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
1702             "MSIX Count:%d.\n", ha->msix_count);
1703         return (0);
1704
1705 iospace_error_exit:
1706         return (-ENOMEM);
1707 }
1708
1709
1710 static int
1711 qla83xx_iospace_config(struct qla_hw_data *ha)
1712 {
1713         uint16_t msix;
1714         int cpus;
1715
1716         if (pci_request_selected_regions(ha->pdev, ha->bars,
1717             QLA2XXX_DRIVER_NAME)) {
1718                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
1719                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1720                     pci_name(ha->pdev));
1721
1722                 goto iospace_error_exit;
1723         }
1724
1725         /* Use MMIO operations for all accesses. */
1726         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
1727                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
1728                     "Invalid pci I/O region size (%s).\n",
1729                     pci_name(ha->pdev));
1730                 goto iospace_error_exit;
1731         }
1732         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1733                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
1734                     "Invalid PCI mem region size (%s), aborting\n",
1735                         pci_name(ha->pdev));
1736                 goto iospace_error_exit;
1737         }
1738
1739         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
1740         if (!ha->iobase) {
1741                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
1742                     "Cannot remap MMIO (%s), aborting.\n",
1743                     pci_name(ha->pdev));
1744                 goto iospace_error_exit;
1745         }
1746
1747         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
1748         /* 83XX 26XX always use MQ type access for queues
1749          * - mbar 2, a.k.a region 4 */
1750         ha->max_req_queues = ha->max_rsp_queues = 1;
1751         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
1752                         pci_resource_len(ha->pdev, 4));
1753
1754         if (!ha->mqiobase) {
1755                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
1756                     "BAR2/region4 not enabled\n");
1757                 goto mqiobase_exit;
1758         }
1759
1760         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
1761                         pci_resource_len(ha->pdev, 2));
1762         if (ha->msixbase) {
1763                 /* Read MSIX vector size of the board */
1764                 pci_read_config_word(ha->pdev,
1765                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
1766                 ha->msix_count = msix;
1767                 /* Max queues are bounded by available msix vectors */
1768                 /* queue 0 uses two msix vectors */
1769                 if (ql2xmultique_tag) {
1770                         cpus = num_online_cpus();
1771                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1772                                 (cpus + 1) : (ha->msix_count - 1);
1773                         ha->max_req_queues = 2;
1774                 } else if (ql2xmaxqueues > 1) {
1775                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1776                                                 QLA_MQ_SIZE : ql2xmaxqueues;
1777                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc00c,
1778                             "QoS mode set, max no of request queues:%d.\n",
1779                             ha->max_req_queues);
1780                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
1781                             "QoS mode set, max no of request queues:%d.\n",
1782                             ha->max_req_queues);
1783                 }
1784                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
1785                     "MSI-X vector count: %d.\n", msix);
1786         } else
1787                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
1788                     "BAR 1 not enabled.\n");
1789
1790 mqiobase_exit:
1791         ha->msix_count = ha->max_rsp_queues + 1;
1792
1793         qlt_83xx_iospace_config(ha);
1794
1795         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
1796             "MSIX Count:%d.\n", ha->msix_count);
1797         return 0;
1798
1799 iospace_error_exit:
1800         return -ENOMEM;
1801 }
1802
1803 static struct isp_operations qla2100_isp_ops = {
1804         .pci_config             = qla2100_pci_config,
1805         .reset_chip             = qla2x00_reset_chip,
1806         .chip_diag              = qla2x00_chip_diag,
1807         .config_rings           = qla2x00_config_rings,
1808         .reset_adapter          = qla2x00_reset_adapter,
1809         .nvram_config           = qla2x00_nvram_config,
1810         .update_fw_options      = qla2x00_update_fw_options,
1811         .load_risc              = qla2x00_load_risc,
1812         .pci_info_str           = qla2x00_pci_info_str,
1813         .fw_version_str         = qla2x00_fw_version_str,
1814         .intr_handler           = qla2100_intr_handler,
1815         .enable_intrs           = qla2x00_enable_intrs,
1816         .disable_intrs          = qla2x00_disable_intrs,
1817         .abort_command          = qla2x00_abort_command,
1818         .target_reset           = qla2x00_abort_target,
1819         .lun_reset              = qla2x00_lun_reset,
1820         .fabric_login           = qla2x00_login_fabric,
1821         .fabric_logout          = qla2x00_fabric_logout,
1822         .calc_req_entries       = qla2x00_calc_iocbs_32,
1823         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1824         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1825         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1826         .read_nvram             = qla2x00_read_nvram_data,
1827         .write_nvram            = qla2x00_write_nvram_data,
1828         .fw_dump                = qla2100_fw_dump,
1829         .beacon_on              = NULL,
1830         .beacon_off             = NULL,
1831         .beacon_blink           = NULL,
1832         .read_optrom            = qla2x00_read_optrom_data,
1833         .write_optrom           = qla2x00_write_optrom_data,
1834         .get_flash_version      = qla2x00_get_flash_version,
1835         .start_scsi             = qla2x00_start_scsi,
1836         .abort_isp              = qla2x00_abort_isp,
1837         .iospace_config         = qla2x00_iospace_config,
1838         .initialize_adapter     = qla2x00_initialize_adapter,
1839 };
1840
1841 static struct isp_operations qla2300_isp_ops = {
1842         .pci_config             = qla2300_pci_config,
1843         .reset_chip             = qla2x00_reset_chip,
1844         .chip_diag              = qla2x00_chip_diag,
1845         .config_rings           = qla2x00_config_rings,
1846         .reset_adapter          = qla2x00_reset_adapter,
1847         .nvram_config           = qla2x00_nvram_config,
1848         .update_fw_options      = qla2x00_update_fw_options,
1849         .load_risc              = qla2x00_load_risc,
1850         .pci_info_str           = qla2x00_pci_info_str,
1851         .fw_version_str         = qla2x00_fw_version_str,
1852         .intr_handler           = qla2300_intr_handler,
1853         .enable_intrs           = qla2x00_enable_intrs,
1854         .disable_intrs          = qla2x00_disable_intrs,
1855         .abort_command          = qla2x00_abort_command,
1856         .target_reset           = qla2x00_abort_target,
1857         .lun_reset              = qla2x00_lun_reset,
1858         .fabric_login           = qla2x00_login_fabric,
1859         .fabric_logout          = qla2x00_fabric_logout,
1860         .calc_req_entries       = qla2x00_calc_iocbs_32,
1861         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1862         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1863         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1864         .read_nvram             = qla2x00_read_nvram_data,
1865         .write_nvram            = qla2x00_write_nvram_data,
1866         .fw_dump                = qla2300_fw_dump,
1867         .beacon_on              = qla2x00_beacon_on,
1868         .beacon_off             = qla2x00_beacon_off,
1869         .beacon_blink           = qla2x00_beacon_blink,
1870         .read_optrom            = qla2x00_read_optrom_data,
1871         .write_optrom           = qla2x00_write_optrom_data,
1872         .get_flash_version      = qla2x00_get_flash_version,
1873         .start_scsi             = qla2x00_start_scsi,
1874         .abort_isp              = qla2x00_abort_isp,
1875         .iospace_config         = qla2x00_iospace_config,
1876         .initialize_adapter     = qla2x00_initialize_adapter,
1877 };
1878
1879 static struct isp_operations qla24xx_isp_ops = {
1880         .pci_config             = qla24xx_pci_config,
1881         .reset_chip             = qla24xx_reset_chip,
1882         .chip_diag              = qla24xx_chip_diag,
1883         .config_rings           = qla24xx_config_rings,
1884         .reset_adapter          = qla24xx_reset_adapter,
1885         .nvram_config           = qla24xx_nvram_config,
1886         .update_fw_options      = qla24xx_update_fw_options,
1887         .load_risc              = qla24xx_load_risc,
1888         .pci_info_str           = qla24xx_pci_info_str,
1889         .fw_version_str         = qla24xx_fw_version_str,
1890         .intr_handler           = qla24xx_intr_handler,
1891         .enable_intrs           = qla24xx_enable_intrs,
1892         .disable_intrs          = qla24xx_disable_intrs,
1893         .abort_command          = qla24xx_abort_command,
1894         .target_reset           = qla24xx_abort_target,
1895         .lun_reset              = qla24xx_lun_reset,
1896         .fabric_login           = qla24xx_login_fabric,
1897         .fabric_logout          = qla24xx_fabric_logout,
1898         .calc_req_entries       = NULL,
1899         .build_iocbs            = NULL,
1900         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1901         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1902         .read_nvram             = qla24xx_read_nvram_data,
1903         .write_nvram            = qla24xx_write_nvram_data,
1904         .fw_dump                = qla24xx_fw_dump,
1905         .beacon_on              = qla24xx_beacon_on,
1906         .beacon_off             = qla24xx_beacon_off,
1907         .beacon_blink           = qla24xx_beacon_blink,
1908         .read_optrom            = qla24xx_read_optrom_data,
1909         .write_optrom           = qla24xx_write_optrom_data,
1910         .get_flash_version      = qla24xx_get_flash_version,
1911         .start_scsi             = qla24xx_start_scsi,
1912         .abort_isp              = qla2x00_abort_isp,
1913         .iospace_config         = qla2x00_iospace_config,
1914         .initialize_adapter     = qla2x00_initialize_adapter,
1915 };
1916
1917 static struct isp_operations qla25xx_isp_ops = {
1918         .pci_config             = qla25xx_pci_config,
1919         .reset_chip             = qla24xx_reset_chip,
1920         .chip_diag              = qla24xx_chip_diag,
1921         .config_rings           = qla24xx_config_rings,
1922         .reset_adapter          = qla24xx_reset_adapter,
1923         .nvram_config           = qla24xx_nvram_config,
1924         .update_fw_options      = qla24xx_update_fw_options,
1925         .load_risc              = qla24xx_load_risc,
1926         .pci_info_str           = qla24xx_pci_info_str,
1927         .fw_version_str         = qla24xx_fw_version_str,
1928         .intr_handler           = qla24xx_intr_handler,
1929         .enable_intrs           = qla24xx_enable_intrs,
1930         .disable_intrs          = qla24xx_disable_intrs,
1931         .abort_command          = qla24xx_abort_command,
1932         .target_reset           = qla24xx_abort_target,
1933         .lun_reset              = qla24xx_lun_reset,
1934         .fabric_login           = qla24xx_login_fabric,
1935         .fabric_logout          = qla24xx_fabric_logout,
1936         .calc_req_entries       = NULL,
1937         .build_iocbs            = NULL,
1938         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1939         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1940         .read_nvram             = qla25xx_read_nvram_data,
1941         .write_nvram            = qla25xx_write_nvram_data,
1942         .fw_dump                = qla25xx_fw_dump,
1943         .beacon_on              = qla24xx_beacon_on,
1944         .beacon_off             = qla24xx_beacon_off,
1945         .beacon_blink           = qla24xx_beacon_blink,
1946         .read_optrom            = qla25xx_read_optrom_data,
1947         .write_optrom           = qla24xx_write_optrom_data,
1948         .get_flash_version      = qla24xx_get_flash_version,
1949         .start_scsi             = qla24xx_dif_start_scsi,
1950         .abort_isp              = qla2x00_abort_isp,
1951         .iospace_config         = qla2x00_iospace_config,
1952         .initialize_adapter     = qla2x00_initialize_adapter,
1953 };
1954
1955 static struct isp_operations qla81xx_isp_ops = {
1956         .pci_config             = qla25xx_pci_config,
1957         .reset_chip             = qla24xx_reset_chip,
1958         .chip_diag              = qla24xx_chip_diag,
1959         .config_rings           = qla24xx_config_rings,
1960         .reset_adapter          = qla24xx_reset_adapter,
1961         .nvram_config           = qla81xx_nvram_config,
1962         .update_fw_options      = qla81xx_update_fw_options,
1963         .load_risc              = qla81xx_load_risc,
1964         .pci_info_str           = qla24xx_pci_info_str,
1965         .fw_version_str         = qla24xx_fw_version_str,
1966         .intr_handler           = qla24xx_intr_handler,
1967         .enable_intrs           = qla24xx_enable_intrs,
1968         .disable_intrs          = qla24xx_disable_intrs,
1969         .abort_command          = qla24xx_abort_command,
1970         .target_reset           = qla24xx_abort_target,
1971         .lun_reset              = qla24xx_lun_reset,
1972         .fabric_login           = qla24xx_login_fabric,
1973         .fabric_logout          = qla24xx_fabric_logout,
1974         .calc_req_entries       = NULL,
1975         .build_iocbs            = NULL,
1976         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1977         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1978         .read_nvram             = NULL,
1979         .write_nvram            = NULL,
1980         .fw_dump                = qla81xx_fw_dump,
1981         .beacon_on              = qla24xx_beacon_on,
1982         .beacon_off             = qla24xx_beacon_off,
1983         .beacon_blink           = qla83xx_beacon_blink,
1984         .read_optrom            = qla25xx_read_optrom_data,
1985         .write_optrom           = qla24xx_write_optrom_data,
1986         .get_flash_version      = qla24xx_get_flash_version,
1987         .start_scsi             = qla24xx_dif_start_scsi,
1988         .abort_isp              = qla2x00_abort_isp,
1989         .iospace_config         = qla2x00_iospace_config,
1990         .initialize_adapter     = qla2x00_initialize_adapter,
1991 };
1992
1993 static struct isp_operations qla82xx_isp_ops = {
1994         .pci_config             = qla82xx_pci_config,
1995         .reset_chip             = qla82xx_reset_chip,
1996         .chip_diag              = qla24xx_chip_diag,
1997         .config_rings           = qla82xx_config_rings,
1998         .reset_adapter          = qla24xx_reset_adapter,
1999         .nvram_config           = qla81xx_nvram_config,
2000         .update_fw_options      = qla24xx_update_fw_options,
2001         .load_risc              = qla82xx_load_risc,
2002         .pci_info_str           = qla24xx_pci_info_str,
2003         .fw_version_str         = qla24xx_fw_version_str,
2004         .intr_handler           = qla82xx_intr_handler,
2005         .enable_intrs           = qla82xx_enable_intrs,
2006         .disable_intrs          = qla82xx_disable_intrs,
2007         .abort_command          = qla24xx_abort_command,
2008         .target_reset           = qla24xx_abort_target,
2009         .lun_reset              = qla24xx_lun_reset,
2010         .fabric_login           = qla24xx_login_fabric,
2011         .fabric_logout          = qla24xx_fabric_logout,
2012         .calc_req_entries       = NULL,
2013         .build_iocbs            = NULL,
2014         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2015         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2016         .read_nvram             = qla24xx_read_nvram_data,
2017         .write_nvram            = qla24xx_write_nvram_data,
2018         .fw_dump                = qla82xx_fw_dump,
2019         .beacon_on              = qla82xx_beacon_on,
2020         .beacon_off             = qla82xx_beacon_off,
2021         .beacon_blink           = NULL,
2022         .read_optrom            = qla82xx_read_optrom_data,
2023         .write_optrom           = qla82xx_write_optrom_data,
2024         .get_flash_version      = qla82xx_get_flash_version,
2025         .start_scsi             = qla82xx_start_scsi,
2026         .abort_isp              = qla82xx_abort_isp,
2027         .iospace_config         = qla82xx_iospace_config,
2028         .initialize_adapter     = qla2x00_initialize_adapter,
2029 };
2030
2031 static struct isp_operations qla8044_isp_ops = {
2032         .pci_config             = qla82xx_pci_config,
2033         .reset_chip             = qla82xx_reset_chip,
2034         .chip_diag              = qla24xx_chip_diag,
2035         .config_rings           = qla82xx_config_rings,
2036         .reset_adapter          = qla24xx_reset_adapter,
2037         .nvram_config           = qla81xx_nvram_config,
2038         .update_fw_options      = qla24xx_update_fw_options,
2039         .load_risc              = qla82xx_load_risc,
2040         .pci_info_str           = qla24xx_pci_info_str,
2041         .fw_version_str         = qla24xx_fw_version_str,
2042         .intr_handler           = qla8044_intr_handler,
2043         .enable_intrs           = qla82xx_enable_intrs,
2044         .disable_intrs          = qla82xx_disable_intrs,
2045         .abort_command          = qla24xx_abort_command,
2046         .target_reset           = qla24xx_abort_target,
2047         .lun_reset              = qla24xx_lun_reset,
2048         .fabric_login           = qla24xx_login_fabric,
2049         .fabric_logout          = qla24xx_fabric_logout,
2050         .calc_req_entries       = NULL,
2051         .build_iocbs            = NULL,
2052         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2053         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2054         .read_nvram             = NULL,
2055         .write_nvram            = NULL,
2056         .fw_dump                = qla8044_fw_dump,
2057         .beacon_on              = qla82xx_beacon_on,
2058         .beacon_off             = qla82xx_beacon_off,
2059         .beacon_blink           = NULL,
2060         .read_optrom            = qla8044_read_optrom_data,
2061         .write_optrom           = qla8044_write_optrom_data,
2062         .get_flash_version      = qla82xx_get_flash_version,
2063         .start_scsi             = qla82xx_start_scsi,
2064         .abort_isp              = qla8044_abort_isp,
2065         .iospace_config         = qla82xx_iospace_config,
2066         .initialize_adapter     = qla2x00_initialize_adapter,
2067 };
2068
2069 static struct isp_operations qla83xx_isp_ops = {
2070         .pci_config             = qla25xx_pci_config,
2071         .reset_chip             = qla24xx_reset_chip,
2072         .chip_diag              = qla24xx_chip_diag,
2073         .config_rings           = qla24xx_config_rings,
2074         .reset_adapter          = qla24xx_reset_adapter,
2075         .nvram_config           = qla81xx_nvram_config,
2076         .update_fw_options      = qla81xx_update_fw_options,
2077         .load_risc              = qla81xx_load_risc,
2078         .pci_info_str           = qla24xx_pci_info_str,
2079         .fw_version_str         = qla24xx_fw_version_str,
2080         .intr_handler           = qla24xx_intr_handler,
2081         .enable_intrs           = qla24xx_enable_intrs,
2082         .disable_intrs          = qla24xx_disable_intrs,
2083         .abort_command          = qla24xx_abort_command,
2084         .target_reset           = qla24xx_abort_target,
2085         .lun_reset              = qla24xx_lun_reset,
2086         .fabric_login           = qla24xx_login_fabric,
2087         .fabric_logout          = qla24xx_fabric_logout,
2088         .calc_req_entries       = NULL,
2089         .build_iocbs            = NULL,
2090         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2091         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2092         .read_nvram             = NULL,
2093         .write_nvram            = NULL,
2094         .fw_dump                = qla83xx_fw_dump,
2095         .beacon_on              = qla24xx_beacon_on,
2096         .beacon_off             = qla24xx_beacon_off,
2097         .beacon_blink           = qla83xx_beacon_blink,
2098         .read_optrom            = qla25xx_read_optrom_data,
2099         .write_optrom           = qla24xx_write_optrom_data,
2100         .get_flash_version      = qla24xx_get_flash_version,
2101         .start_scsi             = qla24xx_dif_start_scsi,
2102         .abort_isp              = qla2x00_abort_isp,
2103         .iospace_config         = qla83xx_iospace_config,
2104         .initialize_adapter     = qla2x00_initialize_adapter,
2105 };
2106
2107 static struct isp_operations qlafx00_isp_ops = {
2108         .pci_config             = qlafx00_pci_config,
2109         .reset_chip             = qlafx00_soft_reset,
2110         .chip_diag              = qlafx00_chip_diag,
2111         .config_rings           = qlafx00_config_rings,
2112         .reset_adapter          = qlafx00_soft_reset,
2113         .nvram_config           = NULL,
2114         .update_fw_options      = NULL,
2115         .load_risc              = NULL,
2116         .pci_info_str           = qlafx00_pci_info_str,
2117         .fw_version_str         = qlafx00_fw_version_str,
2118         .intr_handler           = qlafx00_intr_handler,
2119         .enable_intrs           = qlafx00_enable_intrs,
2120         .disable_intrs          = qlafx00_disable_intrs,
2121         .abort_command          = qla24xx_async_abort_command,
2122         .target_reset           = qlafx00_abort_target,
2123         .lun_reset              = qlafx00_lun_reset,
2124         .fabric_login           = NULL,
2125         .fabric_logout          = NULL,
2126         .calc_req_entries       = NULL,
2127         .build_iocbs            = NULL,
2128         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2129         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2130         .read_nvram             = qla24xx_read_nvram_data,
2131         .write_nvram            = qla24xx_write_nvram_data,
2132         .fw_dump                = NULL,
2133         .beacon_on              = qla24xx_beacon_on,
2134         .beacon_off             = qla24xx_beacon_off,
2135         .beacon_blink           = NULL,
2136         .read_optrom            = qla24xx_read_optrom_data,
2137         .write_optrom           = qla24xx_write_optrom_data,
2138         .get_flash_version      = qla24xx_get_flash_version,
2139         .start_scsi             = qlafx00_start_scsi,
2140         .abort_isp              = qlafx00_abort_isp,
2141         .iospace_config         = qlafx00_iospace_config,
2142         .initialize_adapter     = qlafx00_initialize_adapter,
2143 };
2144
2145 static struct isp_operations qla27xx_isp_ops = {
2146         .pci_config             = qla25xx_pci_config,
2147         .reset_chip             = qla24xx_reset_chip,
2148         .chip_diag              = qla24xx_chip_diag,
2149         .config_rings           = qla24xx_config_rings,
2150         .reset_adapter          = qla24xx_reset_adapter,
2151         .nvram_config           = qla81xx_nvram_config,
2152         .update_fw_options      = qla81xx_update_fw_options,
2153         .load_risc              = qla81xx_load_risc,
2154         .pci_info_str           = qla24xx_pci_info_str,
2155         .fw_version_str         = qla24xx_fw_version_str,
2156         .intr_handler           = qla24xx_intr_handler,
2157         .enable_intrs           = qla24xx_enable_intrs,
2158         .disable_intrs          = qla24xx_disable_intrs,
2159         .abort_command          = qla24xx_abort_command,
2160         .target_reset           = qla24xx_abort_target,
2161         .lun_reset              = qla24xx_lun_reset,
2162         .fabric_login           = qla24xx_login_fabric,
2163         .fabric_logout          = qla24xx_fabric_logout,
2164         .calc_req_entries       = NULL,
2165         .build_iocbs            = NULL,
2166         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2167         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2168         .read_nvram             = NULL,
2169         .write_nvram            = NULL,
2170         .fw_dump                = qla27xx_fwdump,
2171         .beacon_on              = qla24xx_beacon_on,
2172         .beacon_off             = qla24xx_beacon_off,
2173         .beacon_blink           = qla83xx_beacon_blink,
2174         .read_optrom            = qla25xx_read_optrom_data,
2175         .write_optrom           = qla24xx_write_optrom_data,
2176         .get_flash_version      = qla24xx_get_flash_version,
2177         .start_scsi             = qla24xx_dif_start_scsi,
2178         .abort_isp              = qla2x00_abort_isp,
2179         .iospace_config         = qla83xx_iospace_config,
2180         .initialize_adapter     = qla2x00_initialize_adapter,
2181 };
2182
2183 static inline void
2184 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2185 {
2186         ha->device_type = DT_EXTENDED_IDS;
2187         switch (ha->pdev->device) {
2188         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2189                 ha->device_type |= DT_ISP2100;
2190                 ha->device_type &= ~DT_EXTENDED_IDS;
2191                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2192                 break;
2193         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2194                 ha->device_type |= DT_ISP2200;
2195                 ha->device_type &= ~DT_EXTENDED_IDS;
2196                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2197                 break;
2198         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2199                 ha->device_type |= DT_ISP2300;
2200                 ha->device_type |= DT_ZIO_SUPPORTED;
2201                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2202                 break;
2203         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2204                 ha->device_type |= DT_ISP2312;
2205                 ha->device_type |= DT_ZIO_SUPPORTED;
2206                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2207                 break;
2208         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2209                 ha->device_type |= DT_ISP2322;
2210                 ha->device_type |= DT_ZIO_SUPPORTED;
2211                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2212                     ha->pdev->subsystem_device == 0x0170)
2213                         ha->device_type |= DT_OEM_001;
2214                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2215                 break;
2216         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2217                 ha->device_type |= DT_ISP6312;
2218                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2219                 break;
2220         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2221                 ha->device_type |= DT_ISP6322;
2222                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2223                 break;
2224         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2225                 ha->device_type |= DT_ISP2422;
2226                 ha->device_type |= DT_ZIO_SUPPORTED;
2227                 ha->device_type |= DT_FWI2;
2228                 ha->device_type |= DT_IIDMA;
2229                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2230                 break;
2231         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2232                 ha->device_type |= DT_ISP2432;
2233                 ha->device_type |= DT_ZIO_SUPPORTED;
2234                 ha->device_type |= DT_FWI2;
2235                 ha->device_type |= DT_IIDMA;
2236                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2237                 break;
2238         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2239                 ha->device_type |= DT_ISP8432;
2240                 ha->device_type |= DT_ZIO_SUPPORTED;
2241                 ha->device_type |= DT_FWI2;
2242                 ha->device_type |= DT_IIDMA;
2243                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2244                 break;
2245         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2246                 ha->device_type |= DT_ISP5422;
2247                 ha->device_type |= DT_FWI2;
2248                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2249                 break;
2250         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2251                 ha->device_type |= DT_ISP5432;
2252                 ha->device_type |= DT_FWI2;
2253                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2254                 break;
2255         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2256                 ha->device_type |= DT_ISP2532;
2257                 ha->device_type |= DT_ZIO_SUPPORTED;
2258                 ha->device_type |= DT_FWI2;
2259                 ha->device_type |= DT_IIDMA;
2260                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2261                 break;
2262         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2263                 ha->device_type |= DT_ISP8001;
2264                 ha->device_type |= DT_ZIO_SUPPORTED;
2265                 ha->device_type |= DT_FWI2;
2266                 ha->device_type |= DT_IIDMA;
2267                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2268                 break;
2269         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2270                 ha->device_type |= DT_ISP8021;
2271                 ha->device_type |= DT_ZIO_SUPPORTED;
2272                 ha->device_type |= DT_FWI2;
2273                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2274                 /* Initialize 82XX ISP flags */
2275                 qla82xx_init_flags(ha);
2276                 break;
2277          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2278                 ha->device_type |= DT_ISP8044;
2279                 ha->device_type |= DT_ZIO_SUPPORTED;
2280                 ha->device_type |= DT_FWI2;
2281                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2282                 /* Initialize 82XX ISP flags */
2283                 qla82xx_init_flags(ha);
2284                 break;
2285         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2286                 ha->device_type |= DT_ISP2031;
2287                 ha->device_type |= DT_ZIO_SUPPORTED;
2288                 ha->device_type |= DT_FWI2;
2289                 ha->device_type |= DT_IIDMA;
2290                 ha->device_type |= DT_T10_PI;
2291                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2292                 break;
2293         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2294                 ha->device_type |= DT_ISP8031;
2295                 ha->device_type |= DT_ZIO_SUPPORTED;
2296                 ha->device_type |= DT_FWI2;
2297                 ha->device_type |= DT_IIDMA;
2298                 ha->device_type |= DT_T10_PI;
2299                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2300                 break;
2301         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2302                 ha->device_type |= DT_ISPFX00;
2303                 break;
2304         case PCI_DEVICE_ID_QLOGIC_ISP2071:
2305                 ha->device_type |= DT_ISP2071;
2306                 ha->device_type |= DT_ZIO_SUPPORTED;
2307                 ha->device_type |= DT_FWI2;
2308                 ha->device_type |= DT_IIDMA;
2309                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2310                 break;
2311         case PCI_DEVICE_ID_QLOGIC_ISP2271:
2312                 ha->device_type |= DT_ISP2271;
2313                 ha->device_type |= DT_ZIO_SUPPORTED;
2314                 ha->device_type |= DT_FWI2;
2315                 ha->device_type |= DT_IIDMA;
2316                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2317                 break;
2318         }
2319
2320         if (IS_QLA82XX(ha))
2321                 ha->port_no = ha->portnum & 1;
2322         else {
2323                 /* Get adapter physical port no from interrupt pin register. */
2324                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2325                 if (IS_QLA27XX(ha))
2326                         ha->port_no--;
2327                 else
2328                         ha->port_no = !(ha->port_no & 1);
2329         }
2330
2331         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2332             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2333             ha->device_type, ha->port_no, ha->fw_srisc_address);
2334 }
2335
2336 static void
2337 qla2xxx_scan_start(struct Scsi_Host *shost)
2338 {
2339         scsi_qla_host_t *vha = shost_priv(shost);
2340
2341         if (vha->hw->flags.running_gold_fw)
2342                 return;
2343
2344         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2345         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2346         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2347         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2348 }
2349
2350 static int
2351 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2352 {
2353         scsi_qla_host_t *vha = shost_priv(shost);
2354
2355         if (!vha->host)
2356                 return 1;
2357         if (time > vha->hw->loop_reset_delay * HZ)
2358                 return 1;
2359
2360         return atomic_read(&vha->loop_state) == LOOP_READY;
2361 }
2362
2363 /*
2364  * PCI driver interface
2365  */
2366 static int
2367 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2368 {
2369         int     ret = -ENODEV;
2370         struct Scsi_Host *host;
2371         scsi_qla_host_t *base_vha = NULL;
2372         struct qla_hw_data *ha;
2373         char pci_info[30];
2374         char fw_str[30], wq_name[30];
2375         struct scsi_host_template *sht;
2376         int bars, mem_only = 0;
2377         uint16_t req_length = 0, rsp_length = 0;
2378         struct req_que *req = NULL;
2379         struct rsp_que *rsp = NULL;
2380         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2381         sht = &qla2xxx_driver_template;
2382         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2383             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2384             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2385             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2386             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2387             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2388             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2389             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2390             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2391             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2392             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2393             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2394             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2395             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271) {
2396                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2397                 mem_only = 1;
2398                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2399                     "Mem only adapter.\n");
2400         }
2401         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2402             "Bars=%d.\n", bars);
2403
2404         if (mem_only) {
2405                 if (pci_enable_device_mem(pdev))
2406                         goto probe_out;
2407         } else {
2408                 if (pci_enable_device(pdev))
2409                         goto probe_out;
2410         }
2411
2412         /* This may fail but that's ok */
2413         pci_enable_pcie_error_reporting(pdev);
2414
2415         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2416         if (!ha) {
2417                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2418                     "Unable to allocate memory for ha.\n");
2419                 goto probe_out;
2420         }
2421         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2422             "Memory allocated for ha=%p.\n", ha);
2423         ha->pdev = pdev;
2424         ha->tgt.enable_class_2 = ql2xenableclass2;
2425
2426         /* Clear our data area */
2427         ha->bars = bars;
2428         ha->mem_only = mem_only;
2429         spin_lock_init(&ha->hardware_lock);
2430         spin_lock_init(&ha->vport_slock);
2431         mutex_init(&ha->selflogin_lock);
2432         mutex_init(&ha->optrom_mutex);
2433
2434         /* Set ISP-type information. */
2435         qla2x00_set_isp_flags(ha);
2436
2437         /* Set EEH reset type to fundamental if required by hba */
2438         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2439             IS_QLA83XX(ha) || IS_QLA27XX(ha))
2440                 pdev->needs_freset = 1;
2441
2442         ha->prev_topology = 0;
2443         ha->init_cb_size = sizeof(init_cb_t);
2444         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2445         ha->optrom_size = OPTROM_SIZE_2300;
2446
2447         /* Assign ISP specific operations. */
2448         if (IS_QLA2100(ha)) {
2449                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2450                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2451                 req_length = REQUEST_ENTRY_CNT_2100;
2452                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2453                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2454                 ha->gid_list_info_size = 4;
2455                 ha->flash_conf_off = ~0;
2456                 ha->flash_data_off = ~0;
2457                 ha->nvram_conf_off = ~0;
2458                 ha->nvram_data_off = ~0;
2459                 ha->isp_ops = &qla2100_isp_ops;
2460         } else if (IS_QLA2200(ha)) {
2461                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2462                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2463                 req_length = REQUEST_ENTRY_CNT_2200;
2464                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2465                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2466                 ha->gid_list_info_size = 4;
2467                 ha->flash_conf_off = ~0;
2468                 ha->flash_data_off = ~0;
2469                 ha->nvram_conf_off = ~0;
2470                 ha->nvram_data_off = ~0;
2471                 ha->isp_ops = &qla2100_isp_ops;
2472         } else if (IS_QLA23XX(ha)) {
2473                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2474                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2475                 req_length = REQUEST_ENTRY_CNT_2200;
2476                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2477                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2478                 ha->gid_list_info_size = 6;
2479                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2480                         ha->optrom_size = OPTROM_SIZE_2322;
2481                 ha->flash_conf_off = ~0;
2482                 ha->flash_data_off = ~0;
2483                 ha->nvram_conf_off = ~0;
2484                 ha->nvram_data_off = ~0;
2485                 ha->isp_ops = &qla2300_isp_ops;
2486         } else if (IS_QLA24XX_TYPE(ha)) {
2487                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2488                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2489                 req_length = REQUEST_ENTRY_CNT_24XX;
2490                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2491                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2492                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2493                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2494                 ha->gid_list_info_size = 8;
2495                 ha->optrom_size = OPTROM_SIZE_24XX;
2496                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2497                 ha->isp_ops = &qla24xx_isp_ops;
2498                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2499                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2500                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2501                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2502         } else if (IS_QLA25XX(ha)) {
2503                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2504                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2505                 req_length = REQUEST_ENTRY_CNT_24XX;
2506                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2507                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2508                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2509                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2510                 ha->gid_list_info_size = 8;
2511                 ha->optrom_size = OPTROM_SIZE_25XX;
2512                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2513                 ha->isp_ops = &qla25xx_isp_ops;
2514                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2515                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2516                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2517                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2518         } else if (IS_QLA81XX(ha)) {
2519                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2520                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2521                 req_length = REQUEST_ENTRY_CNT_24XX;
2522                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2523                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2524                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2525                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2526                 ha->gid_list_info_size = 8;
2527                 ha->optrom_size = OPTROM_SIZE_81XX;
2528                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2529                 ha->isp_ops = &qla81xx_isp_ops;
2530                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2531                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2532                 ha->nvram_conf_off = ~0;
2533                 ha->nvram_data_off = ~0;
2534         } else if (IS_QLA82XX(ha)) {
2535                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2536                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2537                 req_length = REQUEST_ENTRY_CNT_82XX;
2538                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2539                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2540                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2541                 ha->gid_list_info_size = 8;
2542                 ha->optrom_size = OPTROM_SIZE_82XX;
2543                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2544                 ha->isp_ops = &qla82xx_isp_ops;
2545                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2546                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2547                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2548                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2549         } else if (IS_QLA8044(ha)) {
2550                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2551                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2552                 req_length = REQUEST_ENTRY_CNT_82XX;
2553                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2554                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2555                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2556                 ha->gid_list_info_size = 8;
2557                 ha->optrom_size = OPTROM_SIZE_83XX;
2558                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2559                 ha->isp_ops = &qla8044_isp_ops;
2560                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2561                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2562                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2563                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2564         } else if (IS_QLA83XX(ha)) {
2565                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2566                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2567                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2568                 req_length = REQUEST_ENTRY_CNT_24XX;
2569                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2570                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2571                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2572                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2573                 ha->gid_list_info_size = 8;
2574                 ha->optrom_size = OPTROM_SIZE_83XX;
2575                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2576                 ha->isp_ops = &qla83xx_isp_ops;
2577                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2578                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2579                 ha->nvram_conf_off = ~0;
2580                 ha->nvram_data_off = ~0;
2581         }  else if (IS_QLAFX00(ha)) {
2582                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
2583                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
2584                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
2585                 req_length = REQUEST_ENTRY_CNT_FX00;
2586                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
2587                 ha->isp_ops = &qlafx00_isp_ops;
2588                 ha->port_down_retry_count = 30; /* default value */
2589                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
2590                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2591                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
2592                 ha->mr.fw_hbt_en = 1;
2593                 ha->mr.host_info_resend = false;
2594                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
2595         } else if (IS_QLA27XX(ha)) {
2596                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2597                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2598                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2599                 req_length = REQUEST_ENTRY_CNT_24XX;
2600                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2601                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2602                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2603                 ha->gid_list_info_size = 8;
2604                 ha->optrom_size = OPTROM_SIZE_83XX;
2605                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2606                 ha->isp_ops = &qla27xx_isp_ops;
2607                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2608                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2609                 ha->nvram_conf_off = ~0;
2610                 ha->nvram_data_off = ~0;
2611         }
2612
2613         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2614             "mbx_count=%d, req_length=%d, "
2615             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2616             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2617             "max_fibre_devices=%d.\n",
2618             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2619             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2620             ha->nvram_npiv_size, ha->max_fibre_devices);
2621         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2622             "isp_ops=%p, flash_conf_off=%d, "
2623             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2624             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2625             ha->nvram_conf_off, ha->nvram_data_off);
2626
2627         /* Configure PCI I/O space */
2628         ret = ha->isp_ops->iospace_config(ha);
2629         if (ret)
2630                 goto iospace_config_failed;
2631
2632         ql_log_pci(ql_log_info, pdev, 0x001d,
2633             "Found an ISP%04X irq %d iobase 0x%p.\n",
2634             pdev->device, pdev->irq, ha->iobase);
2635         mutex_init(&ha->vport_lock);
2636         init_completion(&ha->mbx_cmd_comp);
2637         complete(&ha->mbx_cmd_comp);
2638         init_completion(&ha->mbx_intr_comp);
2639         init_completion(&ha->dcbx_comp);
2640         init_completion(&ha->lb_portup_comp);
2641
2642         set_bit(0, (unsigned long *) ha->vp_idx_map);
2643
2644         qla2x00_config_dma_addressing(ha);
2645         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
2646             "64 Bit addressing is %s.\n",
2647             ha->flags.enable_64bit_addressing ? "enable" :
2648             "disable");
2649         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2650         if (ret) {
2651                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
2652                     "Failed to allocate memory for adapter, aborting.\n");
2653
2654                 goto probe_hw_failed;
2655         }
2656
2657         req->max_q_depth = MAX_Q_DEPTH;
2658         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2659                 req->max_q_depth = ql2xmaxqdepth;
2660
2661
2662         base_vha = qla2x00_create_host(sht, ha);
2663         if (!base_vha) {
2664                 ret = -ENOMEM;
2665                 qla2x00_mem_free(ha);
2666                 qla2x00_free_req_que(ha, req);
2667                 qla2x00_free_rsp_que(ha, rsp);
2668                 goto probe_hw_failed;
2669         }
2670
2671         pci_set_drvdata(pdev, base_vha);
2672
2673         host = base_vha->host;
2674         base_vha->req = req;
2675         if (IS_QLA2XXX_MIDTYPE(ha))
2676                 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
2677         else
2678                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2679                                                 base_vha->vp_idx;
2680
2681         /* Setup fcport template structure. */
2682         ha->mr.fcport.vha = base_vha;
2683         ha->mr.fcport.port_type = FCT_UNKNOWN;
2684         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
2685         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
2686         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
2687         ha->mr.fcport.scan_state = 1;
2688
2689         /* Set the SG table size based on ISP type */
2690         if (!IS_FWI2_CAPABLE(ha)) {
2691                 if (IS_QLA2100(ha))
2692                         host->sg_tablesize = 32;
2693         } else {
2694                 if (!IS_QLA82XX(ha))
2695                         host->sg_tablesize = QLA_SG_ALL;
2696         }
2697         host->max_id = ha->max_fibre_devices;
2698         host->cmd_per_lun = 3;
2699         host->unique_id = host->host_no;
2700         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
2701                 host->max_cmd_len = 32;
2702         else
2703                 host->max_cmd_len = MAX_CMDSZ;
2704         host->max_channel = MAX_BUSES - 1;
2705         host->max_lun = ql2xmaxlun;
2706         host->transportt = qla2xxx_transport_template;
2707         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
2708
2709         ql_dbg(ql_dbg_init, base_vha, 0x0033,
2710             "max_id=%d this_id=%d "
2711             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
2712             "max_lun=%d transportt=%p, vendor_id=%llu.\n", host->max_id,
2713             host->this_id, host->cmd_per_lun, host->unique_id,
2714             host->max_cmd_len, host->max_channel, host->max_lun,
2715             host->transportt, sht->vendor_id);
2716
2717 que_init:
2718         /* Alloc arrays of request and response ring ptrs */
2719         if (!qla2x00_alloc_queues(ha, req, rsp)) {
2720                 ql_log(ql_log_fatal, base_vha, 0x003d,
2721                     "Failed to allocate memory for queue pointers..."
2722                     "aborting.\n");
2723                 goto probe_init_failed;
2724         }
2725
2726         qlt_probe_one_stage1(base_vha, ha);
2727
2728         /* Set up the irqs */
2729         ret = qla2x00_request_irqs(ha, rsp);
2730         if (ret)
2731                 goto probe_init_failed;
2732
2733         pci_save_state(pdev);
2734
2735         /* Assign back pointers */
2736         rsp->req = req;
2737         req->rsp = rsp;
2738
2739         if (IS_QLAFX00(ha)) {
2740                 ha->rsp_q_map[0] = rsp;
2741                 ha->req_q_map[0] = req;
2742                 set_bit(0, ha->req_qid_map);
2743                 set_bit(0, ha->rsp_qid_map);
2744         }
2745
2746         /* FWI2-capable only. */
2747         req->req_q_in = &ha->iobase->isp24.req_q_in;
2748         req->req_q_out = &ha->iobase->isp24.req_q_out;
2749         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2750         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
2751         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
2752                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2753                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2754                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2755                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
2756         }
2757
2758         if (IS_QLAFX00(ha)) {
2759                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
2760                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
2761                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
2762                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
2763         }
2764
2765         if (IS_P3P_TYPE(ha)) {
2766                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2767                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2768                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2769         }
2770
2771         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
2772             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2773             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2774         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
2775             "req->req_q_in=%p req->req_q_out=%p "
2776             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2777             req->req_q_in, req->req_q_out,
2778             rsp->rsp_q_in, rsp->rsp_q_out);
2779         ql_dbg(ql_dbg_init, base_vha, 0x003e,
2780             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2781             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2782         ql_dbg(ql_dbg_init, base_vha, 0x003f,
2783             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2784             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
2785
2786         if (ha->isp_ops->initialize_adapter(base_vha)) {
2787                 ql_log(ql_log_fatal, base_vha, 0x00d6,
2788                     "Failed to initialize adapter - Adapter flags %x.\n",
2789                     base_vha->device_flags);
2790
2791                 if (IS_QLA82XX(ha)) {
2792                         qla82xx_idc_lock(ha);
2793                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2794                                 QLA8XXX_DEV_FAILED);
2795                         qla82xx_idc_unlock(ha);
2796                         ql_log(ql_log_fatal, base_vha, 0x00d7,
2797                             "HW State: FAILED.\n");
2798                 } else if (IS_QLA8044(ha)) {
2799                         qla8044_idc_lock(ha);
2800                         qla8044_wr_direct(base_vha,
2801                                 QLA8044_CRB_DEV_STATE_INDEX,
2802                                 QLA8XXX_DEV_FAILED);
2803                         qla8044_idc_unlock(ha);
2804                         ql_log(ql_log_fatal, base_vha, 0x0150,
2805                             "HW State: FAILED.\n");
2806                 }
2807
2808                 ret = -ENODEV;
2809                 goto probe_failed;
2810         }
2811
2812         if (IS_QLAFX00(ha))
2813                 host->can_queue = QLAFX00_MAX_CANQUEUE;
2814         else
2815                 host->can_queue = req->num_outstanding_cmds - 10;
2816
2817         ql_dbg(ql_dbg_init, base_vha, 0x0032,
2818             "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
2819             host->can_queue, base_vha->req,
2820             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
2821
2822         if (ha->mqenable) {
2823                 if (qla25xx_setup_mode(base_vha)) {
2824                         ql_log(ql_log_warn, base_vha, 0x00ec,
2825                             "Failed to create queues, falling back to single queue mode.\n");
2826                         goto que_init;
2827                 }
2828         }
2829
2830         if (ha->flags.running_gold_fw)
2831                 goto skip_dpc;
2832
2833         /*
2834          * Startup the kernel thread for this host adapter
2835          */
2836         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
2837             "%s_dpc", base_vha->host_str);
2838         if (IS_ERR(ha->dpc_thread)) {
2839                 ql_log(ql_log_fatal, base_vha, 0x00ed,
2840                     "Failed to start DPC thread.\n");
2841                 ret = PTR_ERR(ha->dpc_thread);
2842                 goto probe_failed;
2843         }
2844         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
2845             "DPC thread started successfully.\n");
2846
2847         /*
2848          * If we're not coming up in initiator mode, we might sit for
2849          * a while without waking up the dpc thread, which leads to a
2850          * stuck process warning.  So just kick the dpc once here and
2851          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
2852          */
2853         qla2xxx_wake_dpc(base_vha);
2854
2855         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
2856
2857         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
2858                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
2859                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
2860                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
2861
2862                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
2863                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
2864                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
2865                 INIT_WORK(&ha->idc_state_handler,
2866                     qla83xx_idc_state_handler_work);
2867                 INIT_WORK(&ha->nic_core_unrecoverable,
2868                     qla83xx_nic_core_unrecoverable_work);
2869         }
2870
2871 skip_dpc:
2872         list_add_tail(&base_vha->list, &ha->vp_list);
2873         base_vha->host->irq = ha->pdev->irq;
2874
2875         /* Initialized the timer */
2876         qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
2877         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
2878             "Started qla2x00_timer with "
2879             "interval=%d.\n", WATCH_INTERVAL);
2880         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
2881             "Detected hba at address=%p.\n",
2882             ha);
2883
2884         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
2885                 if (ha->fw_attributes & BIT_4) {
2886                         int prot = 0, guard;
2887                         base_vha->flags.difdix_supported = 1;
2888                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
2889                             "Registering for DIF/DIX type 1 and 3 protection.\n");
2890                         if (ql2xenabledif == 1)
2891                                 prot = SHOST_DIX_TYPE0_PROTECTION;
2892                         scsi_host_set_prot(host,
2893                             prot | SHOST_DIF_TYPE1_PROTECTION
2894                             | SHOST_DIF_TYPE2_PROTECTION
2895                             | SHOST_DIF_TYPE3_PROTECTION
2896                             | SHOST_DIX_TYPE1_PROTECTION
2897                             | SHOST_DIX_TYPE2_PROTECTION
2898                             | SHOST_DIX_TYPE3_PROTECTION);
2899
2900                         guard = SHOST_DIX_GUARD_CRC;
2901
2902                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
2903                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
2904                                 guard |= SHOST_DIX_GUARD_IP;
2905
2906                         scsi_host_set_guard(host, guard);
2907                 } else
2908                         base_vha->flags.difdix_supported = 0;
2909         }
2910
2911         ha->isp_ops->enable_intrs(ha);
2912
2913         if (IS_QLAFX00(ha)) {
2914                 ret = qlafx00_fx_disc(base_vha,
2915                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
2916                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
2917                     QLA_SG_ALL : 128;
2918         }
2919
2920         ret = scsi_add_host(host, &pdev->dev);
2921         if (ret)
2922                 goto probe_failed;
2923
2924         base_vha->flags.init_done = 1;
2925         base_vha->flags.online = 1;
2926         ha->prev_minidump_failed = 0;
2927
2928         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
2929             "Init done and hba is online.\n");
2930
2931         if (qla_ini_mode_enabled(base_vha))
2932                 scsi_scan_host(host);
2933         else
2934                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
2935                         "skipping scsi_scan_host() for non-initiator port\n");
2936
2937         qla2x00_alloc_sysfs_attr(base_vha);
2938
2939         if (IS_QLAFX00(ha)) {
2940                 ret = qlafx00_fx_disc(base_vha,
2941                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
2942
2943                 /* Register system information */
2944                 ret =  qlafx00_fx_disc(base_vha,
2945                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
2946         }
2947
2948         qla2x00_init_host_attr(base_vha);
2949
2950         qla2x00_dfs_setup(base_vha);
2951
2952         ql_log(ql_log_info, base_vha, 0x00fb,
2953             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
2954         ql_log(ql_log_info, base_vha, 0x00fc,
2955             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
2956             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
2957             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
2958             base_vha->host_no,
2959             ha->isp_ops->fw_version_str(base_vha, fw_str));
2960
2961         qlt_add_target(ha, base_vha);
2962
2963         return 0;
2964
2965 probe_init_failed:
2966         qla2x00_free_req_que(ha, req);
2967         ha->req_q_map[0] = NULL;
2968         clear_bit(0, ha->req_qid_map);
2969         qla2x00_free_rsp_que(ha, rsp);
2970         ha->rsp_q_map[0] = NULL;
2971         clear_bit(0, ha->rsp_qid_map);
2972         ha->max_req_queues = ha->max_rsp_queues = 0;
2973
2974 probe_failed:
2975         if (base_vha->timer_active)
2976                 qla2x00_stop_timer(base_vha);
2977         base_vha->flags.online = 0;
2978         if (ha->dpc_thread) {
2979                 struct task_struct *t = ha->dpc_thread;
2980
2981                 ha->dpc_thread = NULL;
2982                 kthread_stop(t);
2983         }
2984
2985         qla2x00_free_device(base_vha);
2986
2987         scsi_host_put(base_vha->host);
2988
2989 probe_hw_failed:
2990         if (IS_QLA82XX(ha)) {
2991                 qla82xx_idc_lock(ha);
2992                 qla82xx_clear_drv_active(ha);
2993                 qla82xx_idc_unlock(ha);
2994         }
2995         if (IS_QLA8044(ha)) {
2996                 qla8044_idc_lock(ha);
2997                 qla8044_clear_drv_active(ha);
2998                 qla8044_idc_unlock(ha);
2999         }
3000 iospace_config_failed:
3001         if (IS_P3P_TYPE(ha)) {
3002                 if (!ha->nx_pcibase)
3003                         iounmap((device_reg_t *)ha->nx_pcibase);
3004                 if (!ql2xdbwr)
3005                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3006         } else {
3007                 if (ha->iobase)
3008                         iounmap(ha->iobase);
3009                 if (ha->cregbase)
3010                         iounmap(ha->cregbase);
3011         }
3012         pci_release_selected_regions(ha->pdev, ha->bars);
3013         kfree(ha);
3014         ha = NULL;
3015
3016 probe_out:
3017         pci_disable_device(pdev);
3018         return ret;
3019 }
3020
3021 static void
3022 qla2x00_shutdown(struct pci_dev *pdev)
3023 {
3024         scsi_qla_host_t *vha;
3025         struct qla_hw_data  *ha;
3026
3027         if (!atomic_read(&pdev->enable_cnt))
3028                 return;
3029
3030         vha = pci_get_drvdata(pdev);
3031         ha = vha->hw;
3032
3033         /* Notify ISPFX00 firmware */
3034         if (IS_QLAFX00(ha))
3035                 qlafx00_driver_shutdown(vha, 20);
3036
3037         /* Turn-off FCE trace */
3038         if (ha->flags.fce_enabled) {
3039                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3040                 ha->flags.fce_enabled = 0;
3041         }
3042
3043         /* Turn-off EFT trace */
3044         if (ha->eft)
3045                 qla2x00_disable_eft_trace(vha);
3046
3047         /* Stop currently executing firmware. */
3048         qla2x00_try_to_stop_firmware(vha);
3049
3050         /* Turn adapter off line */
3051         vha->flags.online = 0;
3052
3053         /* turn-off interrupts on the card */
3054         if (ha->interrupts_on) {
3055                 vha->flags.init_done = 0;
3056                 ha->isp_ops->disable_intrs(ha);
3057         }
3058
3059         qla2x00_free_irqs(vha);
3060
3061         qla2x00_free_fw_dump(ha);
3062 }
3063
3064 /* Deletes all the virtual ports for a given ha */
3065 static void
3066 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
3067 {
3068         struct Scsi_Host *scsi_host;
3069         scsi_qla_host_t *vha;
3070         unsigned long flags;
3071
3072         mutex_lock(&ha->vport_lock);
3073         while (ha->cur_vport_count) {
3074                 spin_lock_irqsave(&ha->vport_slock, flags);
3075
3076                 BUG_ON(base_vha->list.next == &ha->vp_list);
3077                 /* This assumes first entry in ha->vp_list is always base vha */
3078                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3079                 scsi_host = scsi_host_get(vha->host);
3080
3081                 spin_unlock_irqrestore(&ha->vport_slock, flags);
3082                 mutex_unlock(&ha->vport_lock);
3083
3084                 fc_vport_terminate(vha->fc_vport);
3085                 scsi_host_put(vha->host);
3086
3087                 mutex_lock(&ha->vport_lock);
3088         }
3089         mutex_unlock(&ha->vport_lock);
3090 }
3091
3092 /* Stops all deferred work threads */
3093 static void
3094 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3095 {
3096         /* Flush the work queue and remove it */
3097         if (ha->wq) {
3098                 flush_workqueue(ha->wq);
3099                 destroy_workqueue(ha->wq);
3100                 ha->wq = NULL;
3101         }
3102
3103         /* Cancel all work and destroy DPC workqueues */
3104         if (ha->dpc_lp_wq) {
3105                 cancel_work_sync(&ha->idc_aen);
3106                 destroy_workqueue(ha->dpc_lp_wq);
3107                 ha->dpc_lp_wq = NULL;
3108         }
3109
3110         if (ha->dpc_hp_wq) {
3111                 cancel_work_sync(&ha->nic_core_reset);
3112                 cancel_work_sync(&ha->idc_state_handler);
3113                 cancel_work_sync(&ha->nic_core_unrecoverable);
3114                 destroy_workqueue(ha->dpc_hp_wq);
3115                 ha->dpc_hp_wq = NULL;
3116         }
3117
3118         /* Kill the kernel thread for this host */
3119         if (ha->dpc_thread) {
3120                 struct task_struct *t = ha->dpc_thread;
3121
3122                 /*
3123                  * qla2xxx_wake_dpc checks for ->dpc_thread
3124                  * so we need to zero it out.
3125                  */
3126                 ha->dpc_thread = NULL;
3127                 kthread_stop(t);
3128         }
3129 }
3130
3131 static void
3132 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3133 {
3134         if (IS_QLA82XX(ha)) {
3135
3136                 iounmap((device_reg_t *)ha->nx_pcibase);
3137                 if (!ql2xdbwr)
3138                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3139         } else {
3140                 if (ha->iobase)
3141                         iounmap(ha->iobase);
3142
3143                 if (ha->cregbase)
3144                         iounmap(ha->cregbase);
3145
3146                 if (ha->mqiobase)
3147                         iounmap(ha->mqiobase);
3148
3149                 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && ha->msixbase)
3150                         iounmap(ha->msixbase);
3151         }
3152 }
3153
3154 static void
3155 qla2x00_clear_drv_active(scsi_qla_host_t *vha)
3156 {
3157         struct qla_hw_data *ha = vha->hw;
3158
3159         if (IS_QLA8044(ha)) {
3160                 qla8044_idc_lock(ha);
3161                 qla8044_clear_drv_active(ha);
3162                 qla8044_idc_unlock(ha);
3163         } else if (IS_QLA82XX(ha)) {
3164                 qla82xx_idc_lock(ha);
3165                 qla82xx_clear_drv_active(ha);
3166                 qla82xx_idc_unlock(ha);
3167         }
3168 }
3169
3170 static void
3171 qla2x00_remove_one(struct pci_dev *pdev)
3172 {
3173         scsi_qla_host_t *base_vha;
3174         struct qla_hw_data  *ha;
3175
3176         /*
3177          * If the PCI device is disabled that means that probe failed and any
3178          * resources should be have cleaned up on probe exit.
3179          */
3180         if (!atomic_read(&pdev->enable_cnt))
3181                 return;
3182
3183         base_vha = pci_get_drvdata(pdev);
3184         ha = base_vha->hw;
3185
3186         qla2x00_wait_for_hba_ready(base_vha);
3187
3188         set_bit(UNLOADING, &base_vha->dpc_flags);
3189
3190         if (IS_QLAFX00(ha))
3191                 qlafx00_driver_shutdown(base_vha, 20);
3192
3193         qla2x00_delete_all_vps(ha, base_vha);
3194
3195         if (IS_QLA8031(ha)) {
3196                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3197                     "Clearing fcoe driver presence.\n");
3198                 if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3199                         ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3200                             "Error while clearing DRV-Presence.\n");
3201         }
3202
3203         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3204
3205         qla2x00_dfs_remove(base_vha);
3206
3207         qla84xx_put_chip(base_vha);
3208
3209         /* Disable timer */
3210         if (base_vha->timer_active)
3211                 qla2x00_stop_timer(base_vha);
3212
3213         base_vha->flags.online = 0;
3214
3215         qla2x00_destroy_deferred_work(ha);
3216
3217         qlt_remove_target(ha, base_vha);
3218
3219         qla2x00_free_sysfs_attr(base_vha, true);
3220
3221         fc_remove_host(base_vha->host);
3222
3223         scsi_remove_host(base_vha->host);
3224
3225         qla2x00_free_device(base_vha);
3226
3227         scsi_host_put(base_vha->host);
3228
3229         qla2x00_clear_drv_active(base_vha);
3230
3231         qla2x00_unmap_iobases(ha);
3232
3233         pci_release_selected_regions(ha->pdev, ha->bars);
3234         kfree(ha);
3235         ha = NULL;
3236
3237         pci_disable_pcie_error_reporting(pdev);
3238
3239         pci_disable_device(pdev);
3240 }
3241
3242 static void
3243 qla2x00_free_device(scsi_qla_host_t *vha)
3244 {
3245         struct qla_hw_data *ha = vha->hw;
3246
3247         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3248
3249         /* Disable timer */
3250         if (vha->timer_active)
3251                 qla2x00_stop_timer(vha);
3252
3253         qla25xx_delete_queues(vha);
3254
3255         if (ha->flags.fce_enabled)
3256                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3257
3258         if (ha->eft)
3259                 qla2x00_disable_eft_trace(vha);
3260
3261         /* Stop currently executing firmware. */
3262         qla2x00_try_to_stop_firmware(vha);
3263
3264         vha->flags.online = 0;
3265
3266         /* turn-off interrupts on the card */
3267         if (ha->interrupts_on) {
3268                 vha->flags.init_done = 0;
3269                 ha->isp_ops->disable_intrs(ha);
3270         }
3271
3272         qla2x00_free_irqs(vha);
3273
3274         qla2x00_free_fcports(vha);
3275
3276         qla2x00_mem_free(ha);
3277
3278         qla82xx_md_free(vha);
3279
3280         qla2x00_free_queues(ha);
3281 }
3282
3283 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3284 {
3285         fc_port_t *fcport, *tfcport;
3286
3287         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
3288                 list_del(&fcport->list);
3289                 qla2x00_clear_loop_id(fcport);
3290                 kfree(fcport);
3291                 fcport = NULL;
3292         }
3293 }
3294
3295 static inline void
3296 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3297     int defer)
3298 {
3299         struct fc_rport *rport;
3300         scsi_qla_host_t *base_vha;
3301         unsigned long flags;
3302
3303         if (!fcport->rport)
3304                 return;
3305
3306         rport = fcport->rport;
3307         if (defer) {
3308                 base_vha = pci_get_drvdata(vha->hw->pdev);
3309                 spin_lock_irqsave(vha->host->host_lock, flags);
3310                 fcport->drport = rport;
3311                 spin_unlock_irqrestore(vha->host->host_lock, flags);
3312                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3313                 qla2xxx_wake_dpc(base_vha);
3314         } else {
3315                 fc_remote_port_delete(rport);
3316                 qlt_fc_port_deleted(vha, fcport);
3317         }
3318 }
3319
3320 /*
3321  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3322  *
3323  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3324  *
3325  * Return: None.
3326  *
3327  * Context:
3328  */
3329 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3330     int do_login, int defer)
3331 {
3332         if (IS_QLAFX00(vha->hw)) {
3333                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3334                 qla2x00_schedule_rport_del(vha, fcport, defer);
3335                 return;
3336         }
3337
3338         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3339             vha->vp_idx == fcport->vha->vp_idx) {
3340                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3341                 qla2x00_schedule_rport_del(vha, fcport, defer);
3342         }
3343         /*
3344          * We may need to retry the login, so don't change the state of the
3345          * port but do the retries.
3346          */
3347         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3348                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3349
3350         if (!do_login)
3351                 return;
3352
3353         if (fcport->login_retry == 0) {
3354                 fcport->login_retry = vha->hw->login_retry_count;
3355                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3356
3357                 ql_dbg(ql_dbg_disc, vha, 0x2067,
3358                     "Port login retry %8phN, id = 0x%04x retry cnt=%d.\n",
3359                     fcport->port_name, fcport->loop_id, fcport->login_retry);
3360         }
3361 }
3362
3363 /*
3364  * qla2x00_mark_all_devices_lost
3365  *      Updates fcport state when device goes offline.
3366  *
3367  * Input:
3368  *      ha = adapter block pointer.
3369  *      fcport = port structure pointer.
3370  *
3371  * Return:
3372  *      None.
3373  *
3374  * Context:
3375  */
3376 void
3377 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3378 {
3379         fc_port_t *fcport;
3380
3381         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3382                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3383                         continue;
3384
3385                 /*
3386                  * No point in marking the device as lost, if the device is
3387                  * already DEAD.
3388                  */
3389                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3390                         continue;
3391                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3392                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3393                         if (defer)
3394                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3395                         else if (vha->vp_idx == fcport->vha->vp_idx)
3396                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3397                 }
3398         }
3399 }
3400
3401 /*
3402 * qla2x00_mem_alloc
3403 *      Allocates adapter memory.
3404 *
3405 * Returns:
3406 *      0  = success.
3407 *      !0  = failure.
3408 */
3409 static int
3410 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3411         struct req_que **req, struct rsp_que **rsp)
3412 {
3413         char    name[16];
3414
3415         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3416                 &ha->init_cb_dma, GFP_KERNEL);
3417         if (!ha->init_cb)
3418                 goto fail;
3419
3420         if (qlt_mem_alloc(ha) < 0)
3421                 goto fail_free_init_cb;
3422
3423         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3424                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3425         if (!ha->gid_list)
3426                 goto fail_free_tgt_mem;
3427
3428         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3429         if (!ha->srb_mempool)
3430                 goto fail_free_gid_list;
3431
3432         if (IS_P3P_TYPE(ha)) {
3433                 /* Allocate cache for CT6 Ctx. */
3434                 if (!ctx_cachep) {
3435                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3436                                 sizeof(struct ct6_dsd), 0,
3437                                 SLAB_HWCACHE_ALIGN, NULL);
3438                         if (!ctx_cachep)
3439                                 goto fail_free_gid_list;
3440                 }
3441                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3442                         ctx_cachep);
3443                 if (!ha->ctx_mempool)
3444                         goto fail_free_srb_mempool;
3445                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3446                     "ctx_cachep=%p ctx_mempool=%p.\n",
3447                     ctx_cachep, ha->ctx_mempool);
3448         }
3449
3450         /* Get memory for cached NVRAM */
3451         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3452         if (!ha->nvram)
3453                 goto fail_free_ctx_mempool;
3454
3455         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3456                 ha->pdev->device);
3457         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3458                 DMA_POOL_SIZE, 8, 0);
3459         if (!ha->s_dma_pool)
3460                 goto fail_free_nvram;
3461
3462         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3463             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3464             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
3465
3466         if (IS_P3P_TYPE(ha) || ql2xenabledif) {
3467                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3468                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
3469                 if (!ha->dl_dma_pool) {
3470                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
3471                             "Failed to allocate memory for dl_dma_pool.\n");
3472                         goto fail_s_dma_pool;
3473                 }
3474
3475                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3476                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
3477                 if (!ha->fcp_cmnd_dma_pool) {
3478                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
3479                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3480                         goto fail_dl_dma_pool;
3481                 }
3482                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
3483                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3484                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3485         }
3486
3487         /* Allocate memory for SNS commands */
3488         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3489         /* Get consistent memory allocated for SNS commands */
3490                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3491                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3492                 if (!ha->sns_cmd)
3493                         goto fail_dma_pool;
3494                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3495                     "sns_cmd: %p.\n", ha->sns_cmd);
3496         } else {
3497         /* Get consistent memory allocated for MS IOCB */
3498                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3499                         &ha->ms_iocb_dma);
3500                 if (!ha->ms_iocb)
3501                         goto fail_dma_pool;
3502         /* Get consistent memory allocated for CT SNS commands */
3503                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3504                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
3505                 if (!ha->ct_sns)
3506                         goto fail_free_ms_iocb;
3507                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
3508                     "ms_iocb=%p ct_sns=%p.\n",
3509                     ha->ms_iocb, ha->ct_sns);
3510         }
3511
3512         /* Allocate memory for request ring */
3513         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
3514         if (!*req) {
3515                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
3516                     "Failed to allocate memory for req.\n");
3517                 goto fail_req;
3518         }
3519         (*req)->length = req_len;
3520         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
3521                 ((*req)->length + 1) * sizeof(request_t),
3522                 &(*req)->dma, GFP_KERNEL);
3523         if (!(*req)->ring) {
3524                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
3525                     "Failed to allocate memory for req_ring.\n");
3526                 goto fail_req_ring;
3527         }
3528         /* Allocate memory for response ring */
3529         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
3530         if (!*rsp) {
3531                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
3532                     "Failed to allocate memory for rsp.\n");
3533                 goto fail_rsp;
3534         }
3535         (*rsp)->hw = ha;
3536         (*rsp)->length = rsp_len;
3537         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
3538                 ((*rsp)->length + 1) * sizeof(response_t),
3539                 &(*rsp)->dma, GFP_KERNEL);
3540         if (!(*rsp)->ring) {
3541                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
3542                     "Failed to allocate memory for rsp_ring.\n");
3543                 goto fail_rsp_ring;
3544         }
3545         (*req)->rsp = *rsp;
3546         (*rsp)->req = *req;
3547         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
3548             "req=%p req->length=%d req->ring=%p rsp=%p "
3549             "rsp->length=%d rsp->ring=%p.\n",
3550             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
3551             (*rsp)->ring);
3552         /* Allocate memory for NVRAM data for vports */
3553         if (ha->nvram_npiv_size) {
3554                 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
3555                     ha->nvram_npiv_size, GFP_KERNEL);
3556                 if (!ha->npiv_info) {
3557                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
3558                             "Failed to allocate memory for npiv_info.\n");
3559                         goto fail_npiv_info;
3560                 }
3561         } else
3562                 ha->npiv_info = NULL;
3563
3564         /* Get consistent memory allocated for EX-INIT-CB. */
3565         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
3566                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3567                     &ha->ex_init_cb_dma);
3568                 if (!ha->ex_init_cb)
3569                         goto fail_ex_init_cb;
3570                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
3571                     "ex_init_cb=%p.\n", ha->ex_init_cb);
3572         }
3573
3574         INIT_LIST_HEAD(&ha->gbl_dsd_list);
3575
3576         /* Get consistent memory allocated for Async Port-Database. */
3577         if (!IS_FWI2_CAPABLE(ha)) {
3578                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3579                         &ha->async_pd_dma);
3580                 if (!ha->async_pd)
3581                         goto fail_async_pd;
3582                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
3583                     "async_pd=%p.\n", ha->async_pd);
3584         }
3585
3586         INIT_LIST_HEAD(&ha->vp_list);
3587
3588         /* Allocate memory for our loop_id bitmap */
3589         ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long),
3590             GFP_KERNEL);
3591         if (!ha->loop_id_map)
3592                 goto fail_async_pd;
3593         else {
3594                 qla2x00_set_reserved_loop_ids(ha);
3595                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
3596                     "loop_id_map=%p.\n", ha->loop_id_map);
3597         }
3598
3599         return 0;
3600
3601 fail_async_pd:
3602         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
3603 fail_ex_init_cb:
3604         kfree(ha->npiv_info);
3605 fail_npiv_info:
3606         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
3607                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
3608         (*rsp)->ring = NULL;
3609         (*rsp)->dma = 0;
3610 fail_rsp_ring:
3611         kfree(*rsp);
3612 fail_rsp:
3613         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
3614                 sizeof(request_t), (*req)->ring, (*req)->dma);
3615         (*req)->ring = NULL;
3616         (*req)->dma = 0;
3617 fail_req_ring:
3618         kfree(*req);
3619 fail_req:
3620         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3621                 ha->ct_sns, ha->ct_sns_dma);
3622         ha->ct_sns = NULL;
3623         ha->ct_sns_dma = 0;
3624 fail_free_ms_iocb:
3625         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3626         ha->ms_iocb = NULL;
3627         ha->ms_iocb_dma = 0;
3628 fail_dma_pool:
3629         if (IS_QLA82XX(ha) || ql2xenabledif) {
3630                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3631                 ha->fcp_cmnd_dma_pool = NULL;
3632         }
3633 fail_dl_dma_pool:
3634         if (IS_QLA82XX(ha) || ql2xenabledif) {
3635                 dma_pool_destroy(ha->dl_dma_pool);
3636                 ha->dl_dma_pool = NULL;
3637         }
3638 fail_s_dma_pool:
3639         dma_pool_destroy(ha->s_dma_pool);
3640         ha->s_dma_pool = NULL;
3641 fail_free_nvram:
3642         kfree(ha->nvram);
3643         ha->nvram = NULL;
3644 fail_free_ctx_mempool:
3645         mempool_destroy(ha->ctx_mempool);
3646         ha->ctx_mempool = NULL;
3647 fail_free_srb_mempool:
3648         mempool_destroy(ha->srb_mempool);
3649         ha->srb_mempool = NULL;
3650 fail_free_gid_list:
3651         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3652         ha->gid_list,
3653         ha->gid_list_dma);
3654         ha->gid_list = NULL;
3655         ha->gid_list_dma = 0;
3656 fail_free_tgt_mem:
3657         qlt_mem_free(ha);
3658 fail_free_init_cb:
3659         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
3660         ha->init_cb_dma);
3661         ha->init_cb = NULL;
3662         ha->init_cb_dma = 0;
3663 fail:
3664         ql_log(ql_log_fatal, NULL, 0x0030,
3665             "Memory allocation failure.\n");
3666         return -ENOMEM;
3667 }
3668
3669 /*
3670 * qla2x00_free_fw_dump
3671 *       Frees fw dump stuff.
3672 *
3673 * Input:
3674 *       ha = adapter block pointer
3675 */
3676 static void
3677 qla2x00_free_fw_dump(struct qla_hw_data *ha)
3678 {
3679         if (ha->fce)
3680                 dma_free_coherent(&ha->pdev->dev,
3681                     FCE_SIZE, ha->fce, ha->fce_dma);
3682
3683         if (ha->eft)
3684                 dma_free_coherent(&ha->pdev->dev,
3685                     EFT_SIZE, ha->eft, ha->eft_dma);
3686
3687         if (ha->fw_dump)
3688                 vfree(ha->fw_dump);
3689         if (ha->fw_dump_template)
3690                 vfree(ha->fw_dump_template);
3691
3692         ha->fce = NULL;
3693         ha->fce_dma = 0;
3694         ha->eft = NULL;
3695         ha->eft_dma = 0;
3696         ha->fw_dumped = 0;
3697         ha->fw_dump_cap_flags = 0;
3698         ha->fw_dump_reading = 0;
3699         ha->fw_dump = NULL;
3700         ha->fw_dump_len = 0;
3701         ha->fw_dump_template = NULL;
3702         ha->fw_dump_template_len = 0;
3703 }
3704
3705 /*
3706 * qla2x00_mem_free
3707 *      Frees all adapter allocated memory.
3708 *
3709 * Input:
3710 *      ha = adapter block pointer.
3711 */
3712 static void
3713 qla2x00_mem_free(struct qla_hw_data *ha)
3714 {
3715         qla2x00_free_fw_dump(ha);
3716
3717         if (ha->mctp_dump)
3718                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
3719                     ha->mctp_dump_dma);
3720
3721         if (ha->srb_mempool)
3722                 mempool_destroy(ha->srb_mempool);
3723
3724         if (ha->dcbx_tlv)
3725                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
3726                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
3727
3728         if (ha->xgmac_data)
3729                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
3730                     ha->xgmac_data, ha->xgmac_data_dma);
3731
3732         if (ha->sns_cmd)
3733                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
3734                 ha->sns_cmd, ha->sns_cmd_dma);
3735
3736         if (ha->ct_sns)
3737                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3738                 ha->ct_sns, ha->ct_sns_dma);
3739
3740         if (ha->sfp_data)
3741                 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
3742
3743         if (ha->ms_iocb)
3744                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3745
3746         if (ha->ex_init_cb)
3747                 dma_pool_free(ha->s_dma_pool,
3748                         ha->ex_init_cb, ha->ex_init_cb_dma);
3749
3750         if (ha->async_pd)
3751                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
3752
3753         if (ha->s_dma_pool)
3754                 dma_pool_destroy(ha->s_dma_pool);
3755
3756         if (ha->gid_list)
3757                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3758                 ha->gid_list, ha->gid_list_dma);
3759
3760         if (IS_QLA82XX(ha)) {
3761                 if (!list_empty(&ha->gbl_dsd_list)) {
3762                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
3763
3764                         /* clean up allocated prev pool */
3765                         list_for_each_entry_safe(dsd_ptr,
3766                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
3767                                 dma_pool_free(ha->dl_dma_pool,
3768                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
3769                                 list_del(&dsd_ptr->list);
3770                                 kfree(dsd_ptr);
3771                         }
3772                 }
3773         }
3774
3775         if (ha->dl_dma_pool)
3776                 dma_pool_destroy(ha->dl_dma_pool);
3777
3778         if (ha->fcp_cmnd_dma_pool)
3779                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3780
3781         if (ha->ctx_mempool)
3782                 mempool_destroy(ha->ctx_mempool);
3783
3784         qlt_mem_free(ha);
3785
3786         if (ha->init_cb)
3787                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
3788                         ha->init_cb, ha->init_cb_dma);
3789         vfree(ha->optrom_buffer);
3790         kfree(ha->nvram);
3791         kfree(ha->npiv_info);
3792         kfree(ha->swl);
3793         kfree(ha->loop_id_map);
3794
3795         ha->srb_mempool = NULL;
3796         ha->ctx_mempool = NULL;
3797         ha->sns_cmd = NULL;
3798         ha->sns_cmd_dma = 0;
3799         ha->ct_sns = NULL;
3800         ha->ct_sns_dma = 0;
3801         ha->ms_iocb = NULL;
3802         ha->ms_iocb_dma = 0;
3803         ha->init_cb = NULL;
3804         ha->init_cb_dma = 0;
3805         ha->ex_init_cb = NULL;
3806         ha->ex_init_cb_dma = 0;
3807         ha->async_pd = NULL;
3808         ha->async_pd_dma = 0;
3809
3810         ha->s_dma_pool = NULL;
3811         ha->dl_dma_pool = NULL;
3812         ha->fcp_cmnd_dma_pool = NULL;
3813
3814         ha->gid_list = NULL;
3815         ha->gid_list_dma = 0;
3816
3817         ha->tgt.atio_ring = NULL;
3818         ha->tgt.atio_dma = 0;
3819         ha->tgt.tgt_vp_map = NULL;
3820 }
3821
3822 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
3823                                                 struct qla_hw_data *ha)
3824 {
3825         struct Scsi_Host *host;
3826         struct scsi_qla_host *vha = NULL;
3827
3828         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
3829         if (host == NULL) {
3830                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
3831                     "Failed to allocate host from the scsi layer, aborting.\n");
3832                 goto fail;
3833         }
3834
3835         /* Clear our data area */
3836         vha = shost_priv(host);
3837         memset(vha, 0, sizeof(scsi_qla_host_t));
3838
3839         vha->host = host;
3840         vha->host_no = host->host_no;
3841         vha->hw = ha;
3842
3843         INIT_LIST_HEAD(&vha->vp_fcports);
3844         INIT_LIST_HEAD(&vha->work_list);
3845         INIT_LIST_HEAD(&vha->list);
3846
3847         spin_lock_init(&vha->work_lock);
3848
3849         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
3850         ql_dbg(ql_dbg_init, vha, 0x0041,
3851             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
3852             vha->host, vha->hw, vha,
3853             dev_name(&(ha->pdev->dev)));
3854
3855         return vha;
3856
3857 fail:
3858         return vha;
3859 }
3860
3861 static struct qla_work_evt *
3862 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
3863 {
3864         struct qla_work_evt *e;
3865         uint8_t bail;
3866
3867         QLA_VHA_MARK_BUSY(vha, bail);
3868         if (bail)
3869                 return NULL;
3870
3871         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
3872         if (!e) {
3873                 QLA_VHA_MARK_NOT_BUSY(vha);
3874                 return NULL;
3875         }
3876
3877         INIT_LIST_HEAD(&e->list);
3878         e->type = type;
3879         e->flags = QLA_EVT_FLAG_FREE;
3880         return e;
3881 }
3882
3883 static int
3884 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
3885 {
3886         unsigned long flags;
3887
3888         spin_lock_irqsave(&vha->work_lock, flags);
3889         list_add_tail(&e->list, &vha->work_list);
3890         spin_unlock_irqrestore(&vha->work_lock, flags);
3891         qla2xxx_wake_dpc(vha);
3892
3893         return QLA_SUCCESS;
3894 }
3895
3896 int
3897 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
3898     u32 data)
3899 {
3900         struct qla_work_evt *e;
3901
3902         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
3903         if (!e)
3904                 return QLA_FUNCTION_FAILED;
3905
3906         e->u.aen.code = code;
3907         e->u.aen.data = data;
3908         return qla2x00_post_work(vha, e);
3909 }
3910
3911 int
3912 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
3913 {
3914         struct qla_work_evt *e;
3915
3916         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
3917         if (!e)
3918                 return QLA_FUNCTION_FAILED;
3919
3920         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
3921         return qla2x00_post_work(vha, e);
3922 }
3923
3924 #define qla2x00_post_async_work(name, type)     \
3925 int qla2x00_post_async_##name##_work(           \
3926     struct scsi_qla_host *vha,                  \
3927     fc_port_t *fcport, uint16_t *data)          \
3928 {                                               \
3929         struct qla_work_evt *e;                 \
3930                                                 \
3931         e = qla2x00_alloc_work(vha, type);      \
3932         if (!e)                                 \
3933                 return QLA_FUNCTION_FAILED;     \
3934                                                 \
3935         e->u.logio.fcport = fcport;             \
3936         if (data) {                             \
3937                 e->u.logio.data[0] = data[0];   \
3938                 e->u.logio.data[1] = data[1];   \
3939         }                                       \
3940         return qla2x00_post_work(vha, e);       \
3941 }
3942
3943 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
3944 qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
3945 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
3946 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
3947 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
3948 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
3949
3950 int
3951 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
3952 {
3953         struct qla_work_evt *e;
3954
3955         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
3956         if (!e)
3957                 return QLA_FUNCTION_FAILED;
3958
3959         e->u.uevent.code = code;
3960         return qla2x00_post_work(vha, e);
3961 }
3962
3963 static void
3964 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
3965 {
3966         char event_string[40];
3967         char *envp[] = { event_string, NULL };
3968
3969         switch (code) {
3970         case QLA_UEVENT_CODE_FW_DUMP:
3971                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
3972                     vha->host_no);
3973                 break;
3974         default:
3975                 /* do nothing */
3976                 break;
3977         }
3978         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
3979 }
3980
3981 int
3982 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
3983                         uint32_t *data, int cnt)
3984 {
3985         struct qla_work_evt *e;
3986
3987         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
3988         if (!e)
3989                 return QLA_FUNCTION_FAILED;
3990
3991         e->u.aenfx.evtcode = evtcode;
3992         e->u.aenfx.count = cnt;
3993         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
3994         return qla2x00_post_work(vha, e);
3995 }
3996
3997 void
3998 qla2x00_do_work(struct scsi_qla_host *vha)
3999 {
4000         struct qla_work_evt *e, *tmp;
4001         unsigned long flags;
4002         LIST_HEAD(work);
4003
4004         spin_lock_irqsave(&vha->work_lock, flags);
4005         list_splice_init(&vha->work_list, &work);
4006         spin_unlock_irqrestore(&vha->work_lock, flags);
4007
4008         list_for_each_entry_safe(e, tmp, &work, list) {
4009                 list_del_init(&e->list);
4010
4011                 switch (e->type) {
4012                 case QLA_EVT_AEN:
4013                         fc_host_post_event(vha->host, fc_get_event_number(),
4014                             e->u.aen.code, e->u.aen.data);
4015                         break;
4016                 case QLA_EVT_IDC_ACK:
4017                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
4018                         break;
4019                 case QLA_EVT_ASYNC_LOGIN:
4020                         qla2x00_async_login(vha, e->u.logio.fcport,
4021                             e->u.logio.data);
4022                         break;
4023                 case QLA_EVT_ASYNC_LOGIN_DONE:
4024                         qla2x00_async_login_done(vha, e->u.logio.fcport,
4025                             e->u.logio.data);
4026                         break;
4027                 case QLA_EVT_ASYNC_LOGOUT:
4028                         qla2x00_async_logout(vha, e->u.logio.fcport);
4029                         break;
4030                 case QLA_EVT_ASYNC_LOGOUT_DONE:
4031                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
4032                             e->u.logio.data);
4033                         break;
4034                 case QLA_EVT_ASYNC_ADISC:
4035                         qla2x00_async_adisc(vha, e->u.logio.fcport,
4036                             e->u.logio.data);
4037                         break;
4038                 case QLA_EVT_ASYNC_ADISC_DONE:
4039                         qla2x00_async_adisc_done(vha, e->u.logio.fcport,
4040                             e->u.logio.data);
4041                         break;
4042                 case QLA_EVT_UEVENT:
4043                         qla2x00_uevent_emit(vha, e->u.uevent.code);
4044                         break;
4045                 case QLA_EVT_AENFX:
4046                         qlafx00_process_aen(vha, e);
4047                         break;
4048                 }
4049                 if (e->flags & QLA_EVT_FLAG_FREE)
4050                         kfree(e);
4051
4052                 /* For each work completed decrement vha ref count */
4053                 QLA_VHA_MARK_NOT_BUSY(vha);
4054         }
4055 }
4056
4057 /* Relogins all the fcports of a vport
4058  * Context: dpc thread
4059  */
4060 void qla2x00_relogin(struct scsi_qla_host *vha)
4061 {
4062         fc_port_t       *fcport;
4063         int status;
4064         uint16_t        next_loopid = 0;
4065         struct qla_hw_data *ha = vha->hw;
4066         uint16_t data[2];
4067
4068         list_for_each_entry(fcport, &vha->vp_fcports, list) {
4069         /*
4070          * If the port is not ONLINE then try to login
4071          * to it if we haven't run out of retries.
4072          */
4073                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
4074                     fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
4075                         fcport->login_retry--;
4076                         if (fcport->flags & FCF_FABRIC_DEVICE) {
4077                                 if (fcport->flags & FCF_FCP2_DEVICE)
4078                                         ha->isp_ops->fabric_logout(vha,
4079                                                         fcport->loop_id,
4080                                                         fcport->d_id.b.domain,
4081                                                         fcport->d_id.b.area,
4082                                                         fcport->d_id.b.al_pa);
4083
4084                                 if (fcport->loop_id == FC_NO_LOOP_ID) {
4085                                         fcport->loop_id = next_loopid =
4086                                             ha->min_external_loopid;
4087                                         status = qla2x00_find_new_loop_id(
4088                                             vha, fcport);
4089                                         if (status != QLA_SUCCESS) {
4090                                                 /* Ran out of IDs to use */
4091                                                 break;
4092                                         }
4093                                 }
4094
4095                                 if (IS_ALOGIO_CAPABLE(ha)) {
4096                                         fcport->flags |= FCF_ASYNC_SENT;
4097                                         data[0] = 0;
4098                                         data[1] = QLA_LOGIO_LOGIN_RETRIED;
4099                                         status = qla2x00_post_async_login_work(
4100                                             vha, fcport, data);
4101                                         if (status == QLA_SUCCESS)
4102                                                 continue;
4103                                         /* Attempt a retry. */
4104                                         status = 1;
4105                                 } else {
4106                                         status = qla2x00_fabric_login(vha,
4107                                             fcport, &next_loopid);
4108                                         if (status ==  QLA_SUCCESS) {
4109                                                 int status2;
4110                                                 uint8_t opts;
4111
4112                                                 opts = 0;
4113                                                 if (fcport->flags &
4114                                                     FCF_FCP2_DEVICE)
4115                                                         opts |= BIT_1;
4116                                                 status2 =
4117                                                     qla2x00_get_port_database(
4118                                                         vha, fcport, opts);
4119                                                 if (status2 != QLA_SUCCESS)
4120                                                         status = 1;
4121                                         }
4122                                 }
4123                         } else
4124                                 status = qla2x00_local_device_login(vha,
4125                                                                 fcport);
4126
4127                         if (status == QLA_SUCCESS) {
4128                                 fcport->old_loop_id = fcport->loop_id;
4129
4130                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
4131                                     "Port login OK: logged in ID 0x%x.\n",
4132                                     fcport->loop_id);
4133
4134                                 qla2x00_update_fcport(vha, fcport);
4135
4136                         } else if (status == 1) {
4137                                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4138                                 /* retry the login again */
4139                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
4140                                     "Retrying %d login again loop_id 0x%x.\n",
4141                                     fcport->login_retry, fcport->loop_id);
4142                         } else {
4143                                 fcport->login_retry = 0;
4144                         }
4145
4146                         if (fcport->login_retry == 0 && status != QLA_SUCCESS)
4147                                 qla2x00_clear_loop_id(fcport);
4148                 }
4149                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
4150                         break;
4151         }
4152 }
4153
4154 /* Schedule work on any of the dpc-workqueues */
4155 void
4156 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
4157 {
4158         struct qla_hw_data *ha = base_vha->hw;
4159
4160         switch (work_code) {
4161         case MBA_IDC_AEN: /* 0x8200 */
4162                 if (ha->dpc_lp_wq)
4163                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
4164                 break;
4165
4166         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
4167                 if (!ha->flags.nic_core_reset_hdlr_active) {
4168                         if (ha->dpc_hp_wq)
4169                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
4170                 } else
4171                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
4172                             "NIC Core reset is already active. Skip "
4173                             "scheduling it again.\n");
4174                 break;
4175         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
4176                 if (ha->dpc_hp_wq)
4177                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
4178                 break;
4179         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
4180                 if (ha->dpc_hp_wq)
4181                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
4182                 break;
4183         default:
4184                 ql_log(ql_log_warn, base_vha, 0xb05f,
4185                     "Unknow work-code=0x%x.\n", work_code);
4186         }
4187
4188         return;
4189 }
4190
4191 /* Work: Perform NIC Core Unrecoverable state handling */
4192 void
4193 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
4194 {
4195         struct qla_hw_data *ha =
4196                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
4197         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4198         uint32_t dev_state = 0;
4199
4200         qla83xx_idc_lock(base_vha, 0);
4201         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4202         qla83xx_reset_ownership(base_vha);
4203         if (ha->flags.nic_core_reset_owner) {
4204                 ha->flags.nic_core_reset_owner = 0;
4205                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4206                     QLA8XXX_DEV_FAILED);
4207                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
4208                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4209         }
4210         qla83xx_idc_unlock(base_vha, 0);
4211 }
4212
4213 /* Work: Execute IDC state handler */
4214 void
4215 qla83xx_idc_state_handler_work(struct work_struct *work)
4216 {
4217         struct qla_hw_data *ha =
4218                 container_of(work, struct qla_hw_data, idc_state_handler);
4219         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4220         uint32_t dev_state = 0;
4221
4222         qla83xx_idc_lock(base_vha, 0);
4223         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4224         if (dev_state == QLA8XXX_DEV_FAILED ||
4225                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
4226                 qla83xx_idc_state_handler(base_vha);
4227         qla83xx_idc_unlock(base_vha, 0);
4228 }
4229
4230 static int
4231 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
4232 {
4233         int rval = QLA_SUCCESS;
4234         unsigned long heart_beat_wait = jiffies + (1 * HZ);
4235         uint32_t heart_beat_counter1, heart_beat_counter2;
4236
4237         do {
4238                 if (time_after(jiffies, heart_beat_wait)) {
4239                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
4240                             "Nic Core f/w is not alive.\n");
4241                         rval = QLA_FUNCTION_FAILED;
4242                         break;
4243                 }
4244
4245                 qla83xx_idc_lock(base_vha, 0);
4246                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4247                     &heart_beat_counter1);
4248                 qla83xx_idc_unlock(base_vha, 0);
4249                 msleep(100);
4250                 qla83xx_idc_lock(base_vha, 0);
4251                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4252                     &heart_beat_counter2);
4253                 qla83xx_idc_unlock(base_vha, 0);
4254         } while (heart_beat_counter1 == heart_beat_counter2);
4255
4256         return rval;
4257 }
4258
4259 /* Work: Perform NIC Core Reset handling */
4260 void
4261 qla83xx_nic_core_reset_work(struct work_struct *work)
4262 {
4263         struct qla_hw_data *ha =
4264                 container_of(work, struct qla_hw_data, nic_core_reset);
4265         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4266         uint32_t dev_state = 0;
4267
4268         if (IS_QLA2031(ha)) {
4269                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
4270                         ql_log(ql_log_warn, base_vha, 0xb081,
4271                             "Failed to dump mctp\n");
4272                 return;
4273         }
4274
4275         if (!ha->flags.nic_core_reset_hdlr_active) {
4276                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
4277                         qla83xx_idc_lock(base_vha, 0);
4278                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4279                             &dev_state);
4280                         qla83xx_idc_unlock(base_vha, 0);
4281                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
4282                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
4283                                     "Nic Core f/w is alive.\n");
4284                                 return;
4285                         }
4286                 }
4287
4288                 ha->flags.nic_core_reset_hdlr_active = 1;
4289                 if (qla83xx_nic_core_reset(base_vha)) {
4290                         /* NIC Core reset failed. */
4291                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
4292                             "NIC Core reset failed.\n");
4293                 }
4294                 ha->flags.nic_core_reset_hdlr_active = 0;
4295         }
4296 }
4297
4298 /* Work: Handle 8200 IDC aens */
4299 void
4300 qla83xx_service_idc_aen(struct work_struct *work)
4301 {
4302         struct qla_hw_data *ha =
4303                 container_of(work, struct qla_hw_data, idc_aen);
4304         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4305         uint32_t dev_state, idc_control;
4306
4307         qla83xx_idc_lock(base_vha, 0);
4308         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4309         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
4310         qla83xx_idc_unlock(base_vha, 0);
4311         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
4312                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
4313                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
4314                             "Application requested NIC Core Reset.\n");
4315                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4316                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
4317                     QLA_SUCCESS) {
4318                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
4319                             "Other protocol driver requested NIC Core Reset.\n");
4320                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4321                 }
4322         } else if (dev_state == QLA8XXX_DEV_FAILED ||
4323                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
4324                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4325         }
4326 }
4327
4328 static void
4329 qla83xx_wait_logic(void)
4330 {
4331         int i;
4332
4333         /* Yield CPU */
4334         if (!in_interrupt()) {
4335                 /*
4336                  * Wait about 200ms before retrying again.
4337                  * This controls the number of retries for single
4338                  * lock operation.
4339                  */
4340                 msleep(100);
4341                 schedule();
4342         } else {
4343                 for (i = 0; i < 20; i++)
4344                         cpu_relax(); /* This a nop instr on i386 */
4345         }
4346 }
4347
4348 static int
4349 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
4350 {
4351         int rval;
4352         uint32_t data;
4353         uint32_t idc_lck_rcvry_stage_mask = 0x3;
4354         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
4355         struct qla_hw_data *ha = base_vha->hw;
4356         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
4357             "Trying force recovery of the IDC lock.\n");
4358
4359         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
4360         if (rval)
4361                 return rval;
4362
4363         if ((data & idc_lck_rcvry_stage_mask) > 0) {
4364                 return QLA_SUCCESS;
4365         } else {
4366                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
4367                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4368                     data);
4369                 if (rval)
4370                         return rval;
4371
4372                 msleep(200);
4373
4374                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4375                     &data);
4376                 if (rval)
4377                         return rval;
4378
4379                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
4380                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
4381                                         ~(idc_lck_rcvry_stage_mask));
4382                         rval = qla83xx_wr_reg(base_vha,
4383                             QLA83XX_IDC_LOCK_RECOVERY, data);
4384                         if (rval)
4385                                 return rval;
4386
4387                         /* Forcefully perform IDC UnLock */
4388                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
4389                             &data);
4390                         if (rval)
4391                                 return rval;
4392                         /* Clear lock-id by setting 0xff */
4393                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4394                             0xff);
4395                         if (rval)
4396                                 return rval;
4397                         /* Clear lock-recovery by setting 0x0 */
4398                         rval = qla83xx_wr_reg(base_vha,
4399                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
4400                         if (rval)
4401                                 return rval;
4402                 } else
4403                         return QLA_SUCCESS;
4404         }
4405
4406         return rval;
4407 }
4408
4409 static int
4410 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
4411 {
4412         int rval = QLA_SUCCESS;
4413         uint32_t o_drv_lockid, n_drv_lockid;
4414         unsigned long lock_recovery_timeout;
4415
4416         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
4417 retry_lockid:
4418         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
4419         if (rval)
4420                 goto exit;
4421
4422         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
4423         if (time_after_eq(jiffies, lock_recovery_timeout)) {
4424                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
4425                         return QLA_SUCCESS;
4426                 else
4427                         return QLA_FUNCTION_FAILED;
4428         }
4429
4430         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
4431         if (rval)
4432                 goto exit;
4433
4434         if (o_drv_lockid == n_drv_lockid) {
4435                 qla83xx_wait_logic();
4436                 goto retry_lockid;
4437         } else
4438                 return QLA_SUCCESS;
4439
4440 exit:
4441         return rval;
4442 }
4443
4444 void
4445 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4446 {
4447         uint16_t options = (requester_id << 15) | BIT_6;
4448         uint32_t data;
4449         uint32_t lock_owner;
4450         struct qla_hw_data *ha = base_vha->hw;
4451
4452         /* IDC-lock implementation using driver-lock/lock-id remote registers */
4453 retry_lock:
4454         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
4455             == QLA_SUCCESS) {
4456                 if (data) {
4457                         /* Setting lock-id to our function-number */
4458                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4459                             ha->portnum);
4460                 } else {
4461                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4462                             &lock_owner);
4463                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
4464                             "Failed to acquire IDC lock, acquired by %d, "
4465                             "retrying...\n", lock_owner);
4466
4467                         /* Retry/Perform IDC-Lock recovery */
4468                         if (qla83xx_idc_lock_recovery(base_vha)
4469                             == QLA_SUCCESS) {
4470                                 qla83xx_wait_logic();
4471                                 goto retry_lock;
4472                         } else
4473                                 ql_log(ql_log_warn, base_vha, 0xb075,
4474                                     "IDC Lock recovery FAILED.\n");
4475                 }
4476
4477         }
4478
4479         return;
4480
4481         /* XXX: IDC-lock implementation using access-control mbx */
4482 retry_lock2:
4483         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4484                 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
4485                     "Failed to acquire IDC lock. retrying...\n");
4486                 /* Retry/Perform IDC-Lock recovery */
4487                 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
4488                         qla83xx_wait_logic();
4489                         goto retry_lock2;
4490                 } else
4491                         ql_log(ql_log_warn, base_vha, 0xb076,
4492                             "IDC Lock recovery FAILED.\n");
4493         }
4494
4495         return;
4496 }
4497
4498 void
4499 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4500 {
4501         uint16_t options = (requester_id << 15) | BIT_7, retry;
4502         uint32_t data;
4503         struct qla_hw_data *ha = base_vha->hw;
4504
4505         /* IDC-unlock implementation using driver-unlock/lock-id
4506          * remote registers
4507          */
4508         retry = 0;
4509 retry_unlock:
4510         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
4511             == QLA_SUCCESS) {
4512                 if (data == ha->portnum) {
4513                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
4514                         /* Clearing lock-id by setting 0xff */
4515                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
4516                 } else if (retry < 10) {
4517                         /* SV: XXX: IDC unlock retrying needed here? */
4518
4519                         /* Retry for IDC-unlock */
4520                         qla83xx_wait_logic();
4521                         retry++;
4522                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
4523                             "Failed to release IDC lock, retyring=%d\n", retry);
4524                         goto retry_unlock;
4525                 }
4526         } else if (retry < 10) {
4527                 /* Retry for IDC-unlock */
4528                 qla83xx_wait_logic();
4529                 retry++;
4530                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
4531                     "Failed to read drv-lockid, retyring=%d\n", retry);
4532                 goto retry_unlock;
4533         }
4534
4535         return;
4536
4537         /* XXX: IDC-unlock implementation using access-control mbx */
4538         retry = 0;
4539 retry_unlock2:
4540         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4541                 if (retry < 10) {
4542                         /* Retry for IDC-unlock */
4543                         qla83xx_wait_logic();
4544                         retry++;
4545                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
4546                             "Failed to release IDC lock, retyring=%d\n", retry);
4547                         goto retry_unlock2;
4548                 }
4549         }
4550
4551         return;
4552 }
4553
4554 int
4555 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4556 {
4557         int rval = QLA_SUCCESS;
4558         struct qla_hw_data *ha = vha->hw;
4559         uint32_t drv_presence;
4560
4561         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4562         if (rval == QLA_SUCCESS) {
4563                 drv_presence |= (1 << ha->portnum);
4564                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4565                     drv_presence);
4566         }
4567
4568         return rval;
4569 }
4570
4571 int
4572 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4573 {
4574         int rval = QLA_SUCCESS;
4575
4576         qla83xx_idc_lock(vha, 0);
4577         rval = __qla83xx_set_drv_presence(vha);
4578         qla83xx_idc_unlock(vha, 0);
4579
4580         return rval;
4581 }
4582
4583 int
4584 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4585 {
4586         int rval = QLA_SUCCESS;
4587         struct qla_hw_data *ha = vha->hw;
4588         uint32_t drv_presence;
4589
4590         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4591         if (rval == QLA_SUCCESS) {
4592                 drv_presence &= ~(1 << ha->portnum);
4593                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4594                     drv_presence);
4595         }
4596
4597         return rval;
4598 }
4599
4600 int
4601 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4602 {
4603         int rval = QLA_SUCCESS;
4604
4605         qla83xx_idc_lock(vha, 0);
4606         rval = __qla83xx_clear_drv_presence(vha);
4607         qla83xx_idc_unlock(vha, 0);
4608
4609         return rval;
4610 }
4611
4612 static void
4613 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
4614 {
4615         struct qla_hw_data *ha = vha->hw;
4616         uint32_t drv_ack, drv_presence;
4617         unsigned long ack_timeout;
4618
4619         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
4620         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
4621         while (1) {
4622                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
4623                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4624                 if ((drv_ack & drv_presence) == drv_presence)
4625                         break;
4626
4627                 if (time_after_eq(jiffies, ack_timeout)) {
4628                         ql_log(ql_log_warn, vha, 0xb067,
4629                             "RESET ACK TIMEOUT! drv_presence=0x%x "
4630                             "drv_ack=0x%x\n", drv_presence, drv_ack);
4631                         /*
4632                          * The function(s) which did not ack in time are forced
4633                          * to withdraw any further participation in the IDC
4634                          * reset.
4635                          */
4636                         if (drv_ack != drv_presence)
4637                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4638                                     drv_ack);
4639                         break;
4640                 }
4641
4642                 qla83xx_idc_unlock(vha, 0);
4643                 msleep(1000);
4644                 qla83xx_idc_lock(vha, 0);
4645         }
4646
4647         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
4648         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
4649 }
4650
4651 static int
4652 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
4653 {
4654         int rval = QLA_SUCCESS;
4655         uint32_t idc_control;
4656
4657         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
4658         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
4659
4660         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
4661         __qla83xx_get_idc_control(vha, &idc_control);
4662         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
4663         __qla83xx_set_idc_control(vha, 0);
4664
4665         qla83xx_idc_unlock(vha, 0);
4666         rval = qla83xx_restart_nic_firmware(vha);
4667         qla83xx_idc_lock(vha, 0);
4668
4669         if (rval != QLA_SUCCESS) {
4670                 ql_log(ql_log_fatal, vha, 0xb06a,
4671                     "Failed to restart NIC f/w.\n");
4672                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
4673                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
4674         } else {
4675                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
4676                     "Success in restarting nic f/w.\n");
4677                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
4678                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
4679         }
4680
4681         return rval;
4682 }
4683
4684 /* Assumes idc_lock always held on entry */
4685 int
4686 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
4687 {
4688         struct qla_hw_data *ha = base_vha->hw;
4689         int rval = QLA_SUCCESS;
4690         unsigned long dev_init_timeout;
4691         uint32_t dev_state;
4692
4693         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
4694         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
4695
4696         while (1) {
4697
4698                 if (time_after_eq(jiffies, dev_init_timeout)) {
4699                         ql_log(ql_log_warn, base_vha, 0xb06e,
4700                             "Initialization TIMEOUT!\n");
4701                         /* Init timeout. Disable further NIC Core
4702                          * communication.
4703                          */
4704                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4705                                 QLA8XXX_DEV_FAILED);
4706                         ql_log(ql_log_info, base_vha, 0xb06f,
4707                             "HW State: FAILED.\n");
4708                 }
4709
4710                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4711                 switch (dev_state) {
4712                 case QLA8XXX_DEV_READY:
4713                         if (ha->flags.nic_core_reset_owner)
4714                                 qla83xx_idc_audit(base_vha,
4715                                     IDC_AUDIT_COMPLETION);
4716                         ha->flags.nic_core_reset_owner = 0;
4717                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
4718                             "Reset_owner reset by 0x%x.\n",
4719                             ha->portnum);
4720                         goto exit;
4721                 case QLA8XXX_DEV_COLD:
4722                         if (ha->flags.nic_core_reset_owner)
4723                                 rval = qla83xx_device_bootstrap(base_vha);
4724                         else {
4725                         /* Wait for AEN to change device-state */
4726                                 qla83xx_idc_unlock(base_vha, 0);
4727                                 msleep(1000);
4728                                 qla83xx_idc_lock(base_vha, 0);
4729                         }
4730                         break;
4731                 case QLA8XXX_DEV_INITIALIZING:
4732                         /* Wait for AEN to change device-state */
4733                         qla83xx_idc_unlock(base_vha, 0);
4734                         msleep(1000);
4735                         qla83xx_idc_lock(base_vha, 0);
4736                         break;
4737                 case QLA8XXX_DEV_NEED_RESET:
4738                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
4739                                 qla83xx_need_reset_handler(base_vha);
4740                         else {
4741                                 /* Wait for AEN to change device-state */
4742                                 qla83xx_idc_unlock(base_vha, 0);
4743                                 msleep(1000);
4744                                 qla83xx_idc_lock(base_vha, 0);
4745                         }
4746                         /* reset timeout value after need reset handler */
4747                         dev_init_timeout = jiffies +
4748                             (ha->fcoe_dev_init_timeout * HZ);
4749                         break;
4750                 case QLA8XXX_DEV_NEED_QUIESCENT:
4751                         /* XXX: DEBUG for now */
4752                         qla83xx_idc_unlock(base_vha, 0);
4753                         msleep(1000);
4754                         qla83xx_idc_lock(base_vha, 0);
4755                         break;
4756                 case QLA8XXX_DEV_QUIESCENT:
4757                         /* XXX: DEBUG for now */
4758                         if (ha->flags.quiesce_owner)
4759                                 goto exit;
4760
4761                         qla83xx_idc_unlock(base_vha, 0);
4762                         msleep(1000);
4763                         qla83xx_idc_lock(base_vha, 0);
4764                         dev_init_timeout = jiffies +
4765                             (ha->fcoe_dev_init_timeout * HZ);
4766                         break;
4767                 case QLA8XXX_DEV_FAILED:
4768                         if (ha->flags.nic_core_reset_owner)
4769                                 qla83xx_idc_audit(base_vha,
4770                                     IDC_AUDIT_COMPLETION);
4771                         ha->flags.nic_core_reset_owner = 0;
4772                         __qla83xx_clear_drv_presence(base_vha);
4773                         qla83xx_idc_unlock(base_vha, 0);
4774                         qla8xxx_dev_failed_handler(base_vha);
4775                         rval = QLA_FUNCTION_FAILED;
4776                         qla83xx_idc_lock(base_vha, 0);
4777                         goto exit;
4778                 case QLA8XXX_BAD_VALUE:
4779                         qla83xx_idc_unlock(base_vha, 0);
4780                         msleep(1000);
4781                         qla83xx_idc_lock(base_vha, 0);
4782                         break;
4783                 default:
4784                         ql_log(ql_log_warn, base_vha, 0xb071,
4785                             "Unknow Device State: %x.\n", dev_state);
4786                         qla83xx_idc_unlock(base_vha, 0);
4787                         qla8xxx_dev_failed_handler(base_vha);
4788                         rval = QLA_FUNCTION_FAILED;
4789                         qla83xx_idc_lock(base_vha, 0);
4790                         goto exit;
4791                 }
4792         }
4793
4794 exit:
4795         return rval;
4796 }
4797
4798 void
4799 qla2x00_disable_board_on_pci_error(struct work_struct *work)
4800 {
4801         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
4802             board_disable);
4803         struct pci_dev *pdev = ha->pdev;
4804         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4805
4806         ql_log(ql_log_warn, base_vha, 0x015b,
4807             "Disabling adapter.\n");
4808
4809         set_bit(UNLOADING, &base_vha->dpc_flags);
4810
4811         qla2x00_delete_all_vps(ha, base_vha);
4812
4813         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
4814
4815         qla2x00_dfs_remove(base_vha);
4816
4817         qla84xx_put_chip(base_vha);
4818
4819         if (base_vha->timer_active)
4820                 qla2x00_stop_timer(base_vha);
4821
4822         base_vha->flags.online = 0;
4823
4824         qla2x00_destroy_deferred_work(ha);
4825
4826         /*
4827          * Do not try to stop beacon blink as it will issue a mailbox
4828          * command.
4829          */
4830         qla2x00_free_sysfs_attr(base_vha, false);
4831
4832         fc_remove_host(base_vha->host);
4833
4834         scsi_remove_host(base_vha->host);
4835
4836         base_vha->flags.init_done = 0;
4837         qla25xx_delete_queues(base_vha);
4838         qla2x00_free_irqs(base_vha);
4839         qla2x00_free_fcports(base_vha);
4840         qla2x00_mem_free(ha);
4841         qla82xx_md_free(base_vha);
4842         qla2x00_free_queues(ha);
4843
4844         scsi_host_put(base_vha->host);
4845
4846         qla2x00_unmap_iobases(ha);
4847
4848         pci_release_selected_regions(ha->pdev, ha->bars);
4849         kfree(ha);
4850         ha = NULL;
4851
4852         pci_disable_pcie_error_reporting(pdev);
4853         pci_disable_device(pdev);
4854         pci_set_drvdata(pdev, NULL);
4855
4856 }
4857
4858 /**************************************************************************
4859 * qla2x00_do_dpc
4860 *   This kernel thread is a task that is schedule by the interrupt handler
4861 *   to perform the background processing for interrupts.
4862 *
4863 * Notes:
4864 * This task always run in the context of a kernel thread.  It
4865 * is kick-off by the driver's detect code and starts up
4866 * up one per adapter. It immediately goes to sleep and waits for
4867 * some fibre event.  When either the interrupt handler or
4868 * the timer routine detects a event it will one of the task
4869 * bits then wake us up.
4870 **************************************************************************/
4871 static int
4872 qla2x00_do_dpc(void *data)
4873 {
4874         int             rval;
4875         scsi_qla_host_t *base_vha;
4876         struct qla_hw_data *ha;
4877
4878         ha = (struct qla_hw_data *)data;
4879         base_vha = pci_get_drvdata(ha->pdev);
4880
4881         set_user_nice(current, -20);
4882
4883         set_current_state(TASK_INTERRUPTIBLE);
4884         while (!kthread_should_stop()) {
4885                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
4886                     "DPC handler sleeping.\n");
4887
4888                 schedule();
4889                 __set_current_state(TASK_RUNNING);
4890
4891                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
4892                         goto end_loop;
4893
4894                 if (ha->flags.eeh_busy) {
4895                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
4896                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
4897                         goto end_loop;
4898                 }
4899
4900                 ha->dpc_active = 1;
4901
4902                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
4903                     "DPC handler waking up, dpc_flags=0x%lx.\n",
4904                     base_vha->dpc_flags);
4905
4906                 qla2x00_do_work(base_vha);
4907
4908                 if (IS_P3P_TYPE(ha)) {
4909                         if (IS_QLA8044(ha)) {
4910                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
4911                                         &base_vha->dpc_flags)) {
4912                                         qla8044_idc_lock(ha);
4913                                         qla8044_wr_direct(base_vha,
4914                                                 QLA8044_CRB_DEV_STATE_INDEX,
4915                                                 QLA8XXX_DEV_FAILED);
4916                                         qla8044_idc_unlock(ha);
4917                                         ql_log(ql_log_info, base_vha, 0x4004,
4918                                                 "HW State: FAILED.\n");
4919                                         qla8044_device_state_handler(base_vha);
4920                                         continue;
4921                                 }
4922
4923                         } else {
4924                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
4925                                         &base_vha->dpc_flags)) {
4926                                         qla82xx_idc_lock(ha);
4927                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
4928                                                 QLA8XXX_DEV_FAILED);
4929                                         qla82xx_idc_unlock(ha);
4930                                         ql_log(ql_log_info, base_vha, 0x0151,
4931                                                 "HW State: FAILED.\n");
4932                                         qla82xx_device_state_handler(base_vha);
4933                                         continue;
4934                                 }
4935                         }
4936
4937                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
4938                                 &base_vha->dpc_flags)) {
4939
4940                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
4941                                     "FCoE context reset scheduled.\n");
4942                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4943                                         &base_vha->dpc_flags))) {
4944                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
4945                                                 /* FCoE-ctx reset failed.
4946                                                  * Escalate to chip-reset
4947                                                  */
4948                                                 set_bit(ISP_ABORT_NEEDED,
4949                                                         &base_vha->dpc_flags);
4950                                         }
4951                                         clear_bit(ABORT_ISP_ACTIVE,
4952                                                 &base_vha->dpc_flags);
4953                                 }
4954
4955                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
4956                                     "FCoE context reset end.\n");
4957                         }
4958                 } else if (IS_QLAFX00(ha)) {
4959                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
4960                                 &base_vha->dpc_flags)) {
4961                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
4962                                     "Firmware Reset Recovery\n");
4963                                 if (qlafx00_reset_initialize(base_vha)) {
4964                                         /* Failed. Abort isp later. */
4965                                         if (!test_bit(UNLOADING,
4966                                             &base_vha->dpc_flags))
4967                                                 set_bit(ISP_UNRECOVERABLE,
4968                                                     &base_vha->dpc_flags);
4969                                                 ql_dbg(ql_dbg_dpc, base_vha,
4970                                                     0x4021,
4971                                                     "Reset Recovery Failed\n");
4972                                 }
4973                         }
4974
4975                         if (test_and_clear_bit(FX00_TARGET_SCAN,
4976                                 &base_vha->dpc_flags)) {
4977                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
4978                                     "ISPFx00 Target Scan scheduled\n");
4979                                 if (qlafx00_rescan_isp(base_vha)) {
4980                                         if (!test_bit(UNLOADING,
4981                                             &base_vha->dpc_flags))
4982                                                 set_bit(ISP_UNRECOVERABLE,
4983                                                     &base_vha->dpc_flags);
4984                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
4985                                             "ISPFx00 Target Scan Failed\n");
4986                                 }
4987                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
4988                                     "ISPFx00 Target Scan End\n");
4989                         }
4990                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
4991                                 &base_vha->dpc_flags)) {
4992                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
4993                                     "ISPFx00 Host Info resend scheduled\n");
4994                                 qlafx00_fx_disc(base_vha,
4995                                     &base_vha->hw->mr.fcport,
4996                                     FXDISC_REG_HOST_INFO);
4997                         }
4998                 }
4999
5000                 if (test_and_clear_bit(ISP_ABORT_NEEDED,
5001                                                 &base_vha->dpc_flags)) {
5002
5003                         ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
5004                             "ISP abort scheduled.\n");
5005                         if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
5006                             &base_vha->dpc_flags))) {
5007
5008                                 if (ha->isp_ops->abort_isp(base_vha)) {
5009                                         /* failed. retry later */
5010                                         set_bit(ISP_ABORT_NEEDED,
5011                                             &base_vha->dpc_flags);
5012                                 }
5013                                 clear_bit(ABORT_ISP_ACTIVE,
5014                                                 &base_vha->dpc_flags);
5015                         }
5016
5017                         ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
5018                             "ISP abort end.\n");
5019                 }
5020
5021                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
5022                     &base_vha->dpc_flags)) {
5023                         qla2x00_update_fcports(base_vha);
5024                 }
5025
5026                 if (test_bit(SCR_PENDING, &base_vha->dpc_flags)) {
5027                         int ret;
5028                         ret = qla2x00_send_change_request(base_vha, 0x3, 0);
5029                         if (ret != QLA_SUCCESS)
5030                                 ql_log(ql_log_warn, base_vha, 0x121,
5031                                     "Failed to enable receiving of RSCN "
5032                                     "requests: 0x%x.\n", ret);
5033                         clear_bit(SCR_PENDING, &base_vha->dpc_flags);
5034                 }
5035
5036                 if (IS_QLAFX00(ha))
5037                         goto loop_resync_check;
5038
5039                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
5040                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
5041                             "Quiescence mode scheduled.\n");
5042                         if (IS_P3P_TYPE(ha)) {
5043                                 if (IS_QLA82XX(ha))
5044                                         qla82xx_device_state_handler(base_vha);
5045                                 if (IS_QLA8044(ha))
5046                                         qla8044_device_state_handler(base_vha);
5047                                 clear_bit(ISP_QUIESCE_NEEDED,
5048                                     &base_vha->dpc_flags);
5049                                 if (!ha->flags.quiesce_owner) {
5050                                         qla2x00_perform_loop_resync(base_vha);
5051                                         if (IS_QLA82XX(ha)) {
5052                                                 qla82xx_idc_lock(ha);
5053                                                 qla82xx_clear_qsnt_ready(
5054                                                     base_vha);
5055                                                 qla82xx_idc_unlock(ha);
5056                                         } else if (IS_QLA8044(ha)) {
5057                                                 qla8044_idc_lock(ha);
5058                                                 qla8044_clear_qsnt_ready(
5059                                                     base_vha);
5060                                                 qla8044_idc_unlock(ha);
5061                                         }
5062                                 }
5063                         } else {
5064                                 clear_bit(ISP_QUIESCE_NEEDED,
5065                                     &base_vha->dpc_flags);
5066                                 qla2x00_quiesce_io(base_vha);
5067                         }
5068                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
5069                             "Quiescence mode end.\n");
5070                 }
5071
5072                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
5073                                 &base_vha->dpc_flags) &&
5074                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
5075
5076                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
5077                             "Reset marker scheduled.\n");
5078                         qla2x00_rst_aen(base_vha);
5079                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
5080                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
5081                             "Reset marker end.\n");
5082                 }
5083
5084                 /* Retry each device up to login retry count */
5085                 if ((test_and_clear_bit(RELOGIN_NEEDED,
5086                                                 &base_vha->dpc_flags)) &&
5087                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
5088                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
5089
5090                         ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
5091                             "Relogin scheduled.\n");
5092                         qla2x00_relogin(base_vha);
5093                         ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
5094                             "Relogin end.\n");
5095                 }
5096 loop_resync_check:
5097                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
5098                     &base_vha->dpc_flags)) {
5099
5100                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
5101                             "Loop resync scheduled.\n");
5102
5103                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
5104                             &base_vha->dpc_flags))) {
5105
5106                                 rval = qla2x00_loop_resync(base_vha);
5107
5108                                 clear_bit(LOOP_RESYNC_ACTIVE,
5109                                                 &base_vha->dpc_flags);
5110                         }
5111
5112                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
5113                             "Loop resync end.\n");
5114                 }
5115
5116                 if (IS_QLAFX00(ha))
5117                         goto intr_on_check;
5118
5119                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
5120                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
5121                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
5122                         qla2xxx_flash_npiv_conf(base_vha);
5123                 }
5124
5125 intr_on_check:
5126                 if (!ha->interrupts_on)
5127                         ha->isp_ops->enable_intrs(ha);
5128
5129                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
5130                                         &base_vha->dpc_flags)) {
5131                         if (ha->beacon_blink_led == 1)
5132                                 ha->isp_ops->beacon_blink(base_vha);
5133                 }
5134
5135                 if (!IS_QLAFX00(ha))
5136                         qla2x00_do_dpc_all_vps(base_vha);
5137
5138                 ha->dpc_active = 0;
5139 end_loop:
5140                 set_current_state(TASK_INTERRUPTIBLE);
5141         } /* End of while(1) */
5142         __set_current_state(TASK_RUNNING);
5143
5144         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
5145             "DPC handler exiting.\n");
5146
5147         /*
5148          * Make sure that nobody tries to wake us up again.
5149          */
5150         ha->dpc_active = 0;
5151
5152         /* Cleanup any residual CTX SRBs. */
5153         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5154
5155         return 0;
5156 }
5157
5158 void
5159 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
5160 {
5161         struct qla_hw_data *ha = vha->hw;
5162         struct task_struct *t = ha->dpc_thread;
5163
5164         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
5165                 wake_up_process(t);
5166 }
5167
5168 /*
5169 *  qla2x00_rst_aen
5170 *      Processes asynchronous reset.
5171 *
5172 * Input:
5173 *      ha  = adapter block pointer.
5174 */
5175 static void
5176 qla2x00_rst_aen(scsi_qla_host_t *vha)
5177 {
5178         if (vha->flags.online && !vha->flags.reset_active &&
5179             !atomic_read(&vha->loop_down_timer) &&
5180             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
5181                 do {
5182                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5183
5184                         /*
5185                          * Issue marker command only when we are going to start
5186                          * the I/O.
5187                          */
5188                         vha->marker_needed = 1;
5189                 } while (!atomic_read(&vha->loop_down_timer) &&
5190                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
5191         }
5192 }
5193
5194 /**************************************************************************
5195 *   qla2x00_timer
5196 *
5197 * Description:
5198 *   One second timer
5199 *
5200 * Context: Interrupt
5201 ***************************************************************************/
5202 void
5203 qla2x00_timer(scsi_qla_host_t *vha)
5204 {
5205         unsigned long   cpu_flags = 0;
5206         int             start_dpc = 0;
5207         int             index;
5208         srb_t           *sp;
5209         uint16_t        w;
5210         struct qla_hw_data *ha = vha->hw;
5211         struct req_que *req;
5212
5213         if (ha->flags.eeh_busy) {
5214                 ql_dbg(ql_dbg_timer, vha, 0x6000,
5215                     "EEH = %d, restarting timer.\n",
5216                     ha->flags.eeh_busy);
5217                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
5218                 return;
5219         }
5220
5221         /*
5222          * Hardware read to raise pending EEH errors during mailbox waits. If
5223          * the read returns -1 then disable the board.
5224          */
5225         if (!pci_channel_offline(ha->pdev)) {
5226                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
5227                 if (w == 0xffff)
5228                         /*
5229                          * Schedule this on the default system workqueue so that
5230                          * all the adapter workqueues and the DPC thread can be
5231                          * shutdown cleanly.
5232                          */
5233                         schedule_work(&ha->board_disable);
5234         }
5235
5236         /* Make sure qla82xx_watchdog is run only for physical port */
5237         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
5238                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
5239                         start_dpc++;
5240                 if (IS_QLA82XX(ha))
5241                         qla82xx_watchdog(vha);
5242                 else if (IS_QLA8044(ha))
5243                         qla8044_watchdog(vha);
5244         }
5245
5246         if (!vha->vp_idx && IS_QLAFX00(ha))
5247                 qlafx00_timer_routine(vha);
5248
5249         /* Loop down handler. */
5250         if (atomic_read(&vha->loop_down_timer) > 0 &&
5251             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
5252             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
5253                 && vha->flags.online) {
5254
5255                 if (atomic_read(&vha->loop_down_timer) ==
5256                     vha->loop_down_abort_time) {
5257
5258                         ql_log(ql_log_info, vha, 0x6008,
5259                             "Loop down - aborting the queues before time expires.\n");
5260
5261                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
5262                                 atomic_set(&vha->loop_state, LOOP_DEAD);
5263
5264                         /*
5265                          * Schedule an ISP abort to return any FCP2-device
5266                          * commands.
5267                          */
5268                         /* NPIV - scan physical port only */
5269                         if (!vha->vp_idx) {
5270                                 spin_lock_irqsave(&ha->hardware_lock,
5271                                     cpu_flags);
5272                                 req = ha->req_q_map[0];
5273                                 for (index = 1;
5274                                     index < req->num_outstanding_cmds;
5275                                     index++) {
5276                                         fc_port_t *sfcp;
5277
5278                                         sp = req->outstanding_cmds[index];
5279                                         if (!sp)
5280                                                 continue;
5281                                         if (sp->type != SRB_SCSI_CMD)
5282                                                 continue;
5283                                         sfcp = sp->fcport;
5284                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
5285                                                 continue;
5286
5287                                         if (IS_QLA82XX(ha))
5288                                                 set_bit(FCOE_CTX_RESET_NEEDED,
5289                                                         &vha->dpc_flags);
5290                                         else
5291                                                 set_bit(ISP_ABORT_NEEDED,
5292                                                         &vha->dpc_flags);
5293                                         break;
5294                                 }
5295                                 spin_unlock_irqrestore(&ha->hardware_lock,
5296                                                                 cpu_flags);
5297                         }
5298                         start_dpc++;
5299                 }
5300
5301                 /* if the loop has been down for 4 minutes, reinit adapter */
5302                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
5303                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
5304                                 ql_log(ql_log_warn, vha, 0x6009,
5305                                     "Loop down - aborting ISP.\n");
5306
5307                                 if (IS_QLA82XX(ha))
5308                                         set_bit(FCOE_CTX_RESET_NEEDED,
5309                                                 &vha->dpc_flags);
5310                                 else
5311                                         set_bit(ISP_ABORT_NEEDED,
5312                                                 &vha->dpc_flags);
5313                         }
5314                 }
5315                 ql_dbg(ql_dbg_timer, vha, 0x600a,
5316                     "Loop down - seconds remaining %d.\n",
5317                     atomic_read(&vha->loop_down_timer));
5318         }
5319         /* Check if beacon LED needs to be blinked for physical host only */
5320         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
5321                 /* There is no beacon_blink function for ISP82xx */
5322                 if (!IS_P3P_TYPE(ha)) {
5323                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
5324                         start_dpc++;
5325                 }
5326         }
5327
5328         /* Process any deferred work. */
5329         if (!list_empty(&vha->work_list))
5330                 start_dpc++;
5331
5332         /* Schedule the DPC routine if needed */
5333         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
5334             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
5335             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
5336             start_dpc ||
5337             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
5338             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
5339             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
5340             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
5341             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
5342             test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
5343                 ql_dbg(ql_dbg_timer, vha, 0x600b,
5344                     "isp_abort_needed=%d loop_resync_needed=%d "
5345                     "fcport_update_needed=%d start_dpc=%d "
5346                     "reset_marker_needed=%d",
5347                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
5348                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
5349                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
5350                     start_dpc,
5351                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
5352                 ql_dbg(ql_dbg_timer, vha, 0x600c,
5353                     "beacon_blink_needed=%d isp_unrecoverable=%d "
5354                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
5355                     "relogin_needed=%d.\n",
5356                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
5357                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
5358                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
5359                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
5360                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
5361                 qla2xxx_wake_dpc(vha);
5362         }
5363
5364         qla2x00_restart_timer(vha, WATCH_INTERVAL);
5365 }
5366
5367 /* Firmware interface routines. */
5368
5369 #define FW_BLOBS        11
5370 #define FW_ISP21XX      0
5371 #define FW_ISP22XX      1
5372 #define FW_ISP2300      2
5373 #define FW_ISP2322      3
5374 #define FW_ISP24XX      4
5375 #define FW_ISP25XX      5
5376 #define FW_ISP81XX      6
5377 #define FW_ISP82XX      7
5378 #define FW_ISP2031      8
5379 #define FW_ISP8031      9
5380 #define FW_ISP27XX      10
5381
5382 #define FW_FILE_ISP21XX "ql2100_fw.bin"
5383 #define FW_FILE_ISP22XX "ql2200_fw.bin"
5384 #define FW_FILE_ISP2300 "ql2300_fw.bin"
5385 #define FW_FILE_ISP2322 "ql2322_fw.bin"
5386 #define FW_FILE_ISP24XX "ql2400_fw.bin"
5387 #define FW_FILE_ISP25XX "ql2500_fw.bin"
5388 #define FW_FILE_ISP81XX "ql8100_fw.bin"
5389 #define FW_FILE_ISP82XX "ql8200_fw.bin"
5390 #define FW_FILE_ISP2031 "ql2600_fw.bin"
5391 #define FW_FILE_ISP8031 "ql8300_fw.bin"
5392 #define FW_FILE_ISP27XX "ql2700_fw.bin"
5393
5394
5395 static DEFINE_MUTEX(qla_fw_lock);
5396
5397 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
5398         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
5399         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
5400         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
5401         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
5402         { .name = FW_FILE_ISP24XX, },
5403         { .name = FW_FILE_ISP25XX, },
5404         { .name = FW_FILE_ISP81XX, },
5405         { .name = FW_FILE_ISP82XX, },
5406         { .name = FW_FILE_ISP2031, },
5407         { .name = FW_FILE_ISP8031, },
5408         { .name = FW_FILE_ISP27XX, },
5409 };
5410
5411 struct fw_blob *
5412 qla2x00_request_firmware(scsi_qla_host_t *vha)
5413 {
5414         struct qla_hw_data *ha = vha->hw;
5415         struct fw_blob *blob;
5416
5417         if (IS_QLA2100(ha)) {
5418                 blob = &qla_fw_blobs[FW_ISP21XX];
5419         } else if (IS_QLA2200(ha)) {
5420                 blob = &qla_fw_blobs[FW_ISP22XX];
5421         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
5422                 blob = &qla_fw_blobs[FW_ISP2300];
5423         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
5424                 blob = &qla_fw_blobs[FW_ISP2322];
5425         } else if (IS_QLA24XX_TYPE(ha)) {
5426                 blob = &qla_fw_blobs[FW_ISP24XX];
5427         } else if (IS_QLA25XX(ha)) {
5428                 blob = &qla_fw_blobs[FW_ISP25XX];
5429         } else if (IS_QLA81XX(ha)) {
5430                 blob = &qla_fw_blobs[FW_ISP81XX];
5431         } else if (IS_QLA82XX(ha)) {
5432                 blob = &qla_fw_blobs[FW_ISP82XX];
5433         } else if (IS_QLA2031(ha)) {
5434                 blob = &qla_fw_blobs[FW_ISP2031];
5435         } else if (IS_QLA8031(ha)) {
5436                 blob = &qla_fw_blobs[FW_ISP8031];
5437         } else if (IS_QLA27XX(ha)) {
5438                 blob = &qla_fw_blobs[FW_ISP27XX];
5439         } else {
5440                 return NULL;
5441         }
5442
5443         mutex_lock(&qla_fw_lock);
5444         if (blob->fw)
5445                 goto out;
5446
5447         if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
5448                 ql_log(ql_log_warn, vha, 0x0063,
5449                     "Failed to load firmware image (%s).\n", blob->name);
5450                 blob->fw = NULL;
5451                 blob = NULL;
5452                 goto out;
5453         }
5454
5455 out:
5456         mutex_unlock(&qla_fw_lock);
5457         return blob;
5458 }
5459
5460 static void
5461 qla2x00_release_firmware(void)
5462 {
5463         int idx;
5464
5465         mutex_lock(&qla_fw_lock);
5466         for (idx = 0; idx < FW_BLOBS; idx++)
5467                 release_firmware(qla_fw_blobs[idx].fw);
5468         mutex_unlock(&qla_fw_lock);
5469 }
5470
5471 static pci_ers_result_t
5472 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5473 {
5474         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
5475         struct qla_hw_data *ha = vha->hw;
5476
5477         ql_dbg(ql_dbg_aer, vha, 0x9000,
5478             "PCI error detected, state %x.\n", state);
5479
5480         switch (state) {
5481         case pci_channel_io_normal:
5482                 ha->flags.eeh_busy = 0;
5483                 return PCI_ERS_RESULT_CAN_RECOVER;
5484         case pci_channel_io_frozen:
5485                 ha->flags.eeh_busy = 1;
5486                 /* For ISP82XX complete any pending mailbox cmd */
5487                 if (IS_QLA82XX(ha)) {
5488                         ha->flags.isp82xx_fw_hung = 1;
5489                         ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
5490                         qla82xx_clear_pending_mbx(vha);
5491                 }
5492                 qla2x00_free_irqs(vha);
5493                 pci_disable_device(pdev);
5494                 /* Return back all IOs */
5495                 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
5496                 return PCI_ERS_RESULT_NEED_RESET;
5497         case pci_channel_io_perm_failure:
5498                 ha->flags.pci_channel_io_perm_failure = 1;
5499                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
5500                 return PCI_ERS_RESULT_DISCONNECT;
5501         }
5502         return PCI_ERS_RESULT_NEED_RESET;
5503 }
5504
5505 static pci_ers_result_t
5506 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
5507 {
5508         int risc_paused = 0;
5509         uint32_t stat;
5510         unsigned long flags;
5511         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5512         struct qla_hw_data *ha = base_vha->hw;
5513         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
5514         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
5515
5516         if (IS_QLA82XX(ha))
5517                 return PCI_ERS_RESULT_RECOVERED;
5518
5519         spin_lock_irqsave(&ha->hardware_lock, flags);
5520         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
5521                 stat = RD_REG_DWORD(&reg->hccr);
5522                 if (stat & HCCR_RISC_PAUSE)
5523                         risc_paused = 1;
5524         } else if (IS_QLA23XX(ha)) {
5525                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
5526                 if (stat & HSR_RISC_PAUSED)
5527                         risc_paused = 1;
5528         } else if (IS_FWI2_CAPABLE(ha)) {
5529                 stat = RD_REG_DWORD(&reg24->host_status);
5530                 if (stat & HSRX_RISC_PAUSED)
5531                         risc_paused = 1;
5532         }
5533         spin_unlock_irqrestore(&ha->hardware_lock, flags);
5534
5535         if (risc_paused) {
5536                 ql_log(ql_log_info, base_vha, 0x9003,
5537                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
5538                 ha->isp_ops->fw_dump(base_vha, 0);
5539
5540                 return PCI_ERS_RESULT_NEED_RESET;
5541         } else
5542                 return PCI_ERS_RESULT_RECOVERED;
5543 }
5544
5545 static uint32_t
5546 qla82xx_error_recovery(scsi_qla_host_t *base_vha)
5547 {
5548         uint32_t rval = QLA_FUNCTION_FAILED;
5549         uint32_t drv_active = 0;
5550         struct qla_hw_data *ha = base_vha->hw;
5551         int fn;
5552         struct pci_dev *other_pdev = NULL;
5553
5554         ql_dbg(ql_dbg_aer, base_vha, 0x9006,
5555             "Entered %s.\n", __func__);
5556
5557         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5558
5559         if (base_vha->flags.online) {
5560                 /* Abort all outstanding commands,
5561                  * so as to be requeued later */
5562                 qla2x00_abort_isp_cleanup(base_vha);
5563         }
5564
5565
5566         fn = PCI_FUNC(ha->pdev->devfn);
5567         while (fn > 0) {
5568                 fn--;
5569                 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
5570                     "Finding pci device at function = 0x%x.\n", fn);
5571                 other_pdev =
5572                     pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
5573                     ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
5574                     fn));
5575
5576                 if (!other_pdev)
5577                         continue;
5578                 if (atomic_read(&other_pdev->enable_cnt)) {
5579                         ql_dbg(ql_dbg_aer, base_vha, 0x9008,
5580                             "Found PCI func available and enable at 0x%x.\n",
5581                             fn);
5582                         pci_dev_put(other_pdev);
5583                         break;
5584                 }
5585                 pci_dev_put(other_pdev);
5586         }
5587
5588         if (!fn) {
5589                 /* Reset owner */
5590                 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
5591                     "This devfn is reset owner = 0x%x.\n",
5592                     ha->pdev->devfn);
5593                 qla82xx_idc_lock(ha);
5594
5595                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5596                     QLA8XXX_DEV_INITIALIZING);
5597
5598                 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
5599                     QLA82XX_IDC_VERSION);
5600
5601                 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
5602                 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
5603                     "drv_active = 0x%x.\n", drv_active);
5604
5605                 qla82xx_idc_unlock(ha);
5606                 /* Reset if device is not already reset
5607                  * drv_active would be 0 if a reset has already been done
5608                  */
5609                 if (drv_active)
5610                         rval = qla82xx_start_firmware(base_vha);
5611                 else
5612                         rval = QLA_SUCCESS;
5613                 qla82xx_idc_lock(ha);
5614
5615                 if (rval != QLA_SUCCESS) {
5616                         ql_log(ql_log_info, base_vha, 0x900b,
5617                             "HW State: FAILED.\n");
5618                         qla82xx_clear_drv_active(ha);
5619                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5620                             QLA8XXX_DEV_FAILED);
5621                 } else {
5622                         ql_log(ql_log_info, base_vha, 0x900c,
5623                             "HW State: READY.\n");
5624                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5625                             QLA8XXX_DEV_READY);
5626                         qla82xx_idc_unlock(ha);
5627                         ha->flags.isp82xx_fw_hung = 0;
5628                         rval = qla82xx_restart_isp(base_vha);
5629                         qla82xx_idc_lock(ha);
5630                         /* Clear driver state register */
5631                         qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
5632                         qla82xx_set_drv_active(base_vha);
5633                 }
5634                 qla82xx_idc_unlock(ha);
5635         } else {
5636                 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
5637                     "This devfn is not reset owner = 0x%x.\n",
5638                     ha->pdev->devfn);
5639                 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
5640                     QLA8XXX_DEV_READY)) {
5641                         ha->flags.isp82xx_fw_hung = 0;
5642                         rval = qla82xx_restart_isp(base_vha);
5643                         qla82xx_idc_lock(ha);
5644                         qla82xx_set_drv_active(base_vha);
5645                         qla82xx_idc_unlock(ha);
5646                 }
5647         }
5648         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5649
5650         return rval;
5651 }
5652
5653 static pci_ers_result_t
5654 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
5655 {
5656         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
5657         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5658         struct qla_hw_data *ha = base_vha->hw;
5659         struct rsp_que *rsp;
5660         int rc, retries = 10;
5661
5662         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
5663             "Slot Reset.\n");
5664
5665         /* Workaround: qla2xxx driver which access hardware earlier
5666          * needs error state to be pci_channel_io_online.
5667          * Otherwise mailbox command timesout.
5668          */
5669         pdev->error_state = pci_channel_io_normal;
5670
5671         pci_restore_state(pdev);
5672
5673         /* pci_restore_state() clears the saved_state flag of the device
5674          * save restored state which resets saved_state flag
5675          */
5676         pci_save_state(pdev);
5677
5678         if (ha->mem_only)
5679                 rc = pci_enable_device_mem(pdev);
5680         else
5681                 rc = pci_enable_device(pdev);
5682
5683         if (rc) {
5684                 ql_log(ql_log_warn, base_vha, 0x9005,
5685                     "Can't re-enable PCI device after reset.\n");
5686                 goto exit_slot_reset;
5687         }
5688
5689         rsp = ha->rsp_q_map[0];
5690         if (qla2x00_request_irqs(ha, rsp))
5691                 goto exit_slot_reset;
5692
5693         if (ha->isp_ops->pci_config(base_vha))
5694                 goto exit_slot_reset;
5695
5696         if (IS_QLA82XX(ha)) {
5697                 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
5698                         ret = PCI_ERS_RESULT_RECOVERED;
5699                         goto exit_slot_reset;
5700                 } else
5701                         goto exit_slot_reset;
5702         }
5703
5704         while (ha->flags.mbox_busy && retries--)
5705                 msleep(1000);
5706
5707         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5708         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
5709                 ret =  PCI_ERS_RESULT_RECOVERED;
5710         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5711
5712
5713 exit_slot_reset:
5714         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
5715             "slot_reset return %x.\n", ret);
5716
5717         return ret;
5718 }
5719
5720 static void
5721 qla2xxx_pci_resume(struct pci_dev *pdev)
5722 {
5723         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5724         struct qla_hw_data *ha = base_vha->hw;
5725         int ret;
5726
5727         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
5728             "pci_resume.\n");
5729
5730         ret = qla2x00_wait_for_hba_online(base_vha);
5731         if (ret != QLA_SUCCESS) {
5732                 ql_log(ql_log_fatal, base_vha, 0x9002,
5733                     "The device failed to resume I/O from slot/link_reset.\n");
5734         }
5735
5736         pci_cleanup_aer_uncorrect_error_status(pdev);
5737
5738         ha->flags.eeh_busy = 0;
5739 }
5740
5741 static const struct pci_error_handlers qla2xxx_err_handler = {
5742         .error_detected = qla2xxx_pci_error_detected,
5743         .mmio_enabled = qla2xxx_pci_mmio_enabled,
5744         .slot_reset = qla2xxx_pci_slot_reset,
5745         .resume = qla2xxx_pci_resume,
5746 };
5747
5748 static struct pci_device_id qla2xxx_pci_tbl[] = {
5749         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
5750         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
5751         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
5752         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
5753         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
5754         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
5755         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
5756         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
5757         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
5758         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
5759         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
5760         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
5761         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
5762         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
5763         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
5764         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
5765         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
5766         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
5767         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
5768         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
5769         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
5770         { 0 },
5771 };
5772 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
5773
5774 static struct pci_driver qla2xxx_pci_driver = {
5775         .name           = QLA2XXX_DRIVER_NAME,
5776         .driver         = {
5777                 .owner          = THIS_MODULE,
5778         },
5779         .id_table       = qla2xxx_pci_tbl,
5780         .probe          = qla2x00_probe_one,
5781         .remove         = qla2x00_remove_one,
5782         .shutdown       = qla2x00_shutdown,
5783         .err_handler    = &qla2xxx_err_handler,
5784 };
5785
5786 static const struct file_operations apidev_fops = {
5787         .owner = THIS_MODULE,
5788         .llseek = noop_llseek,
5789 };
5790
5791 /**
5792  * qla2x00_module_init - Module initialization.
5793  **/
5794 static int __init
5795 qla2x00_module_init(void)
5796 {
5797         int ret = 0;
5798
5799         /* Allocate cache for SRBs. */
5800         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
5801             SLAB_HWCACHE_ALIGN, NULL);
5802         if (srb_cachep == NULL) {
5803                 ql_log(ql_log_fatal, NULL, 0x0001,
5804                     "Unable to allocate SRB cache...Failing load!.\n");
5805                 return -ENOMEM;
5806         }
5807
5808         /* Initialize target kmem_cache and mem_pools */
5809         ret = qlt_init();
5810         if (ret < 0) {
5811                 kmem_cache_destroy(srb_cachep);
5812                 return ret;
5813         } else if (ret > 0) {
5814                 /*
5815                  * If initiator mode is explictly disabled by qlt_init(),
5816                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
5817                  * performing scsi_scan_target() during LOOP UP event.
5818                  */
5819                 qla2xxx_transport_functions.disable_target_scan = 1;
5820                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
5821         }
5822
5823         /* Derive version string. */
5824         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
5825         if (ql2xextended_error_logging)
5826                 strcat(qla2x00_version_str, "-debug");
5827
5828         qla2xxx_transport_template =
5829             fc_attach_transport(&qla2xxx_transport_functions);
5830         if (!qla2xxx_transport_template) {
5831                 kmem_cache_destroy(srb_cachep);
5832                 ql_log(ql_log_fatal, NULL, 0x0002,
5833                     "fc_attach_transport failed...Failing load!.\n");
5834                 qlt_exit();
5835                 return -ENODEV;
5836         }
5837
5838         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
5839         if (apidev_major < 0) {
5840                 ql_log(ql_log_fatal, NULL, 0x0003,
5841                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
5842         }
5843
5844         qla2xxx_transport_vport_template =
5845             fc_attach_transport(&qla2xxx_transport_vport_functions);
5846         if (!qla2xxx_transport_vport_template) {
5847                 kmem_cache_destroy(srb_cachep);
5848                 qlt_exit();
5849                 fc_release_transport(qla2xxx_transport_template);
5850                 ql_log(ql_log_fatal, NULL, 0x0004,
5851                     "fc_attach_transport vport failed...Failing load!.\n");
5852                 return -ENODEV;
5853         }
5854         ql_log(ql_log_info, NULL, 0x0005,
5855             "QLogic Fibre Channel HBA Driver: %s.\n",
5856             qla2x00_version_str);
5857         ret = pci_register_driver(&qla2xxx_pci_driver);
5858         if (ret) {
5859                 kmem_cache_destroy(srb_cachep);
5860                 qlt_exit();
5861                 fc_release_transport(qla2xxx_transport_template);
5862                 fc_release_transport(qla2xxx_transport_vport_template);
5863                 ql_log(ql_log_fatal, NULL, 0x0006,
5864                     "pci_register_driver failed...ret=%d Failing load!.\n",
5865                     ret);
5866         }
5867         return ret;
5868 }
5869
5870 /**
5871  * qla2x00_module_exit - Module cleanup.
5872  **/
5873 static void __exit
5874 qla2x00_module_exit(void)
5875 {
5876         unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
5877         pci_unregister_driver(&qla2xxx_pci_driver);
5878         qla2x00_release_firmware();
5879         kmem_cache_destroy(srb_cachep);
5880         qlt_exit();
5881         if (ctx_cachep)
5882                 kmem_cache_destroy(ctx_cachep);
5883         fc_release_transport(qla2xxx_transport_template);
5884         fc_release_transport(qla2xxx_transport_vport_template);
5885 }
5886
5887 module_init(qla2x00_module_init);
5888 module_exit(qla2x00_module_exit);
5889
5890 MODULE_AUTHOR("QLogic Corporation");
5891 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
5892 MODULE_LICENSE("GPL");
5893 MODULE_VERSION(QLA2XXX_VERSION);
5894 MODULE_FIRMWARE(FW_FILE_ISP21XX);
5895 MODULE_FIRMWARE(FW_FILE_ISP22XX);
5896 MODULE_FIRMWARE(FW_FILE_ISP2300);
5897 MODULE_FIRMWARE(FW_FILE_ISP2322);
5898 MODULE_FIRMWARE(FW_FILE_ISP24XX);
5899 MODULE_FIRMWARE(FW_FILE_ISP25XX);