drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <scsi/scsi_tcq.h>
  17 #include <scsi/scsicam.h>
  18 #include <scsi/scsi_transport.h>
  19 #include <scsi/scsi_transport_fc.h>
  20
  21 #include "qla_target.h"
  22
  23 /*
  24  * Driver version
  25  */
  26 char qla2x00_version_str[40];
  27
  28 static int apidev_major;
  29
  30 /*
  31  * SRB allocation cache
  32  */
  33 static struct kmem_cache *srb_cachep;
  34
  35 /*
  36  * CT6 CTX allocation cache
  37  */
  38 static struct kmem_cache *ctx_cachep;
  39 /*
  40  * error level for logging
  41  */
  42 int ql_errlev = ql_log_all;
  43
  44 static int ql2xenableclass2;
  45 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  46 MODULE_PARM_DESC(ql2xenableclass2,
  47                 "Specify if Class 2 operations are supported from the very "
  48                 "beginning. Default is 0 - class 2 not supported.");
  49
  50
  51 int ql2xlogintimeout = 20;
  52 module_param(ql2xlogintimeout, int, S_IRUGO);
  53 MODULE_PARM_DESC(ql2xlogintimeout,
  54                 "Login timeout value in seconds.");
  55
  56 int qlport_down_retry;
  57 module_param(qlport_down_retry, int, S_IRUGO);
  58 MODULE_PARM_DESC(qlport_down_retry,
  59                 "Maximum number of command retries to a port that returns "
  60                 "a PORT-DOWN status.");
  61
  62 int ql2xplogiabsentdevice;
  63 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  64 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  65                 "Option to enable PLOGI to devices that are not present after "
  66                 "a Fabric scan.  This is needed for several broken switches. "
  67                 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  68
  69 int ql2xloginretrycount = 0;
  70 module_param(ql2xloginretrycount, int, S_IRUGO);
  71 MODULE_PARM_DESC(ql2xloginretrycount,
  72                 "Specify an alternate value for the NVRAM login retry count.");
  73
  74 int ql2xallocfwdump = 1;
  75 module_param(ql2xallocfwdump, int, S_IRUGO);
  76 MODULE_PARM_DESC(ql2xallocfwdump,
  77                 "Option to enable allocation of memory for a firmware dump "
  78                 "during HBA initialization.  Memory allocation requirements "
  79                 "vary by ISP type.  Default is 1 - allocate memory.");
  80
  81 int ql2xextended_error_logging;
  82 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  83 MODULE_PARM_DESC(ql2xextended_error_logging,
  84                 "Option to enable extended error logging,\n"
  85                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  86                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  87                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  88                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  89                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  90                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  91                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  92                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  93                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
  94                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
  95                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
  96                 "\t\t0x1e400000 - Preferred value for capturing essential "
  97                 "debug information (equivalent to old "
  98                 "ql2xextended_error_logging=1).\n"
  99                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 100
 101 int ql2xshiftctondsd = 6;
 102 module_param(ql2xshiftctondsd, int, S_IRUGO);
 103 MODULE_PARM_DESC(ql2xshiftctondsd,
 104                 "Set to control shifting of command type processing "
 105                 "based on total number of SG elements.");
 106
 107 int ql2xfdmienable=1;
 108 module_param(ql2xfdmienable, int, S_IRUGO);
 109 MODULE_PARM_DESC(ql2xfdmienable,
 110                 "Enables FDMI registrations. "
 111                 "0 - no FDMI. Default is 1 - perform FDMI.");
 112
 113 #define MAX_Q_DEPTH     32
 114 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 115 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 116 MODULE_PARM_DESC(ql2xmaxqdepth,
 117                 "Maximum queue depth to set for each LUN. "
 118                 "Default is 32.");
 119
 120 int ql2xenabledif = 2;
 121 module_param(ql2xenabledif, int, S_IRUGO);
 122 MODULE_PARM_DESC(ql2xenabledif,
 123                 " Enable T10-CRC-DIF:\n"
 124                 " Default is 2.\n"
 125                 "  0 -- No DIF Support\n"
 126                 "  1 -- Enable DIF for all types\n"
 127                 "  2 -- Enable DIF for all types, except Type 0.\n");
 128
 129 int ql2xenablehba_err_chk = 2;
 130 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 131 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 132                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 133                 " Default is 2.\n"
 134                 "  0 -- Error isolation disabled\n"
 135                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 136                 "  2 -- Error isolation enabled for all Types\n");
 137
 138 int ql2xiidmaenable=1;
 139 module_param(ql2xiidmaenable, int, S_IRUGO);
 140 MODULE_PARM_DESC(ql2xiidmaenable,
 141                 "Enables iIDMA settings "
 142                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 143
 144 int ql2xmaxqueues = 1;
 145 module_param(ql2xmaxqueues, int, S_IRUGO);
 146 MODULE_PARM_DESC(ql2xmaxqueues,
 147                 "Enables MQ settings "
 148                 "Default is 1 for single queue. Set it to number "
 149                 "of queues in MQ mode.");
 150
 151 int ql2xmultique_tag;
 152 module_param(ql2xmultique_tag, int, S_IRUGO);
 153 MODULE_PARM_DESC(ql2xmultique_tag,
 154                 "Enables CPU affinity settings for the driver "
 155                 "Default is 0 for no affinity of request and response IO. "
 156                 "Set it to 1 to turn on the cpu affinity.");
 157
 158 int ql2xfwloadbin;
 159 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 160 MODULE_PARM_DESC(ql2xfwloadbin,
 161                 "Option to specify location from which to load ISP firmware:.\n"
 162                 " 2 -- load firmware via the request_firmware() (hotplug).\n"
 163                 "      interface.\n"
 164                 " 1 -- load firmware from flash.\n"
 165                 " 0 -- use default semantics.\n");
 166
 167 int ql2xetsenable;
 168 module_param(ql2xetsenable, int, S_IRUGO);
 169 MODULE_PARM_DESC(ql2xetsenable,
 170                 "Enables firmware ETS burst."
 171                 "Default is 0 - skip ETS enablement.");
 172
 173 int ql2xdbwr = 1;
 174 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 175 MODULE_PARM_DESC(ql2xdbwr,
 176                 "Option to specify scheme for request queue posting.\n"
 177                 " 0 -- Regular doorbell.\n"
 178                 " 1 -- CAMRAM doorbell (faster).\n");
 179
 180 int ql2xtargetreset = 1;
 181 module_param(ql2xtargetreset, int, S_IRUGO);
 182 MODULE_PARM_DESC(ql2xtargetreset,
 183                  "Enable target reset."
 184                  "Default is 1 - use hw defaults.");
 185
 186 int ql2xgffidenable;
 187 module_param(ql2xgffidenable, int, S_IRUGO);
 188 MODULE_PARM_DESC(ql2xgffidenable,
 189                 "Enables GFF_ID checks of port type. "
 190                 "Default is 0 - Do not use GFF_ID information.");
 191
 192 int ql2xasynctmfenable;
 193 module_param(ql2xasynctmfenable, int, S_IRUGO);
 194 MODULE_PARM_DESC(ql2xasynctmfenable,
 195                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 196                 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
 197
 198 int ql2xdontresethba;
 199 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 200 MODULE_PARM_DESC(ql2xdontresethba,
 201                 "Option to specify reset behaviour.\n"
 202                 " 0 (Default) -- Reset on failure.\n"
 203                 " 1 -- Do not reset on failure.\n");
 204
 205 uint ql2xmaxlun = MAX_LUNS;
 206 module_param(ql2xmaxlun, uint, S_IRUGO);
 207 MODULE_PARM_DESC(ql2xmaxlun,
 208                 "Defines the maximum LU number to register with the SCSI "
 209                 "midlayer. Default is 65535.");
 210
 211 int ql2xmdcapmask = 0x1F;
 212 module_param(ql2xmdcapmask, int, S_IRUGO);
 213 MODULE_PARM_DESC(ql2xmdcapmask,
 214                 "Set the Minidump driver capture mask level. "
 215                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 216
 217 int ql2xmdenable = 1;
 218 module_param(ql2xmdenable, int, S_IRUGO);
 219 MODULE_PARM_DESC(ql2xmdenable,
 220                 "Enable/disable MiniDump. "
 221                 "0 - MiniDump disabled. "
 222                 "1 (Default) - MiniDump enabled.");
 223
 224 /*
 225  * SCSI host template entry points
 226  */
 227 static int qla2xxx_slave_configure(struct scsi_device * device);
 228 static int qla2xxx_slave_alloc(struct scsi_device *);
 229 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
 230 static void qla2xxx_scan_start(struct Scsi_Host *);
 231 static void qla2xxx_slave_destroy(struct scsi_device *);
 232 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 233 static int qla2xxx_eh_abort(struct scsi_cmnd *);
 234 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
 235 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
 236 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
 237 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
 238
 239 static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
 240 static int qla2x00_change_queue_type(struct scsi_device *, int);
 241 static void qla2x00_free_device(scsi_qla_host_t *);
 242
 243 struct scsi_host_template qla2xxx_driver_template = {
 244         .module                 = THIS_MODULE,
 245         .name                   = QLA2XXX_DRIVER_NAME,
 246         .queuecommand           = qla2xxx_queuecommand,
 247
 248         .eh_abort_handler       = qla2xxx_eh_abort,
 249         .eh_device_reset_handler = qla2xxx_eh_device_reset,
 250         .eh_target_reset_handler = qla2xxx_eh_target_reset,
 251         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
 252         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
 253
 254         .slave_configure        = qla2xxx_slave_configure,
 255
 256         .slave_alloc            = qla2xxx_slave_alloc,
 257         .slave_destroy          = qla2xxx_slave_destroy,
 258         .scan_finished          = qla2xxx_scan_finished,
 259         .scan_start             = qla2xxx_scan_start,
 260         .change_queue_depth     = qla2x00_change_queue_depth,
 261         .change_queue_type      = qla2x00_change_queue_type,
 262         .this_id                = -1,
 263         .cmd_per_lun            = 3,
 264         .use_clustering         = ENABLE_CLUSTERING,
 265         .sg_tablesize           = SG_ALL,
 266
 267         .max_sectors            = 0xFFFF,
 268         .shost_attrs            = qla2x00_host_attrs,
 269
 270         .supported_mode         = MODE_INITIATOR,
 271 };
 272
 273 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 274 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 275
 276 /* TODO Convert to inlines
 277  *
 278  * Timer routines
 279  */
 280
 281 __inline__ void
 282 qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
 283 {
 284         init_timer(&vha->timer);
 285         vha->timer.expires = jiffies + interval * HZ;
 286         vha->timer.data = (unsigned long)vha;
 287         vha->timer.function = (void (*)(unsigned long))func;
 288         add_timer(&vha->timer);
 289         vha->timer_active = 1;
 290 }
 291
 292 static inline void
 293 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 294 {
 295         /* Currently used for 82XX only. */
 296         if (vha->device_flags & DFLG_DEV_FAILED) {
 297                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 298                     "Device in a failed state, returning.\n");
 299                 return;
 300         }
 301
 302         mod_timer(&vha->timer, jiffies + interval * HZ);
 303 }
 304
 305 static __inline__ void
 306 qla2x00_stop_timer(scsi_qla_host_t *vha)
 307 {
 308         del_timer_sync(&vha->timer);
 309         vha->timer_active = 0;
 310 }
 311
 312 static int qla2x00_do_dpc(void *data);
 313
 314 static void qla2x00_rst_aen(scsi_qla_host_t *);
 315
 316 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 317         struct req_que **, struct rsp_que **);
 318 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 319 static void qla2x00_mem_free(struct qla_hw_data *);
 320
 321 /* -------------------------------------------------------------------------- */
 322 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 323                                 struct rsp_que *rsp)
 324 {
 325         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 326         ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
 327                                 GFP_KERNEL);
 328         if (!ha->req_q_map) {
 329                 ql_log(ql_log_fatal, vha, 0x003b,
 330                     "Unable to allocate memory for request queue ptrs.\n");
 331                 goto fail_req_map;
 332         }
 333
 334         ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
 335                                 GFP_KERNEL);
 336         if (!ha->rsp_q_map) {
 337                 ql_log(ql_log_fatal, vha, 0x003c,
 338                     "Unable to allocate memory for response queue ptrs.\n");
 339                 goto fail_rsp_map;
 340         }
 341         /*
 342          * Make sure we record at least the request and response queue zero in
 343          * case we need to free them if part of the probe fails.
 344          */
 345         ha->rsp_q_map[0] = rsp;
 346         ha->req_q_map[0] = req;
 347         set_bit(0, ha->rsp_qid_map);
 348         set_bit(0, ha->req_qid_map);
 349         return 1;
 350
 351 fail_rsp_map:
 352         kfree(ha->req_q_map);
 353         ha->req_q_map = NULL;
 354 fail_req_map:
 355         return -ENOMEM;
 356 }
 357
 358 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 359 {
 360         if (IS_QLAFX00(ha)) {
 361                 if (req && req->ring_fx00)
 362                         dma_free_coherent(&ha->pdev->dev,
 363                             (req->length_fx00 + 1) * sizeof(request_t),
 364                             req->ring_fx00, req->dma_fx00);
 365         } else if (req && req->ring)
 366                 dma_free_coherent(&ha->pdev->dev,
 367                 (req->length + 1) * sizeof(request_t),
 368                 req->ring, req->dma);
 369
 370         if (req)
 371                 kfree(req->outstanding_cmds);
 372
 373         kfree(req);
 374         req = NULL;
 375 }
 376
 377 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 378 {
 379         if (IS_QLAFX00(ha)) {
 380                 if (rsp && rsp->ring)
 381                         dma_free_coherent(&ha->pdev->dev,
 382                             (rsp->length_fx00 + 1) * sizeof(request_t),
 383                             rsp->ring_fx00, rsp->dma_fx00);
 384         } else if (rsp && rsp->ring) {
 385                 dma_free_coherent(&ha->pdev->dev,
 386                 (rsp->length + 1) * sizeof(response_t),
 387                 rsp->ring, rsp->dma);
 388         }
 389         kfree(rsp);
 390         rsp = NULL;
 391 }
 392
 393 static void qla2x00_free_queues(struct qla_hw_data *ha)
 394 {
 395         struct req_que *req;
 396         struct rsp_que *rsp;
 397         int cnt;
 398
 399         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 400                 req = ha->req_q_map[cnt];
 401                 qla2x00_free_req_que(ha, req);
 402         }
 403         kfree(ha->req_q_map);
 404         ha->req_q_map = NULL;
 405
 406         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 407                 rsp = ha->rsp_q_map[cnt];
 408                 qla2x00_free_rsp_que(ha, rsp);
 409         }
 410         kfree(ha->rsp_q_map);
 411         ha->rsp_q_map = NULL;
 412 }
 413
 414 static int qla25xx_setup_mode(struct scsi_qla_host *vha)
 415 {
 416         uint16_t options = 0;
 417         int ques, req, ret;
 418         struct qla_hw_data *ha = vha->hw;
 419
 420         if (!(ha->fw_attributes & BIT_6)) {
 421                 ql_log(ql_log_warn, vha, 0x00d8,
 422                     "Firmware is not multi-queue capable.\n");
 423                 goto fail;
 424         }
 425         if (ql2xmultique_tag) {
 426                 /* create a request queue for IO */
 427                 options |= BIT_7;
 428                 req = qla25xx_create_req_que(ha, options, 0, 0, -1,
 429                         QLA_DEFAULT_QUE_QOS);
 430                 if (!req) {
 431                         ql_log(ql_log_warn, vha, 0x00e0,
 432                             "Failed to create request queue.\n");
 433                         goto fail;
 434                 }
 435                 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1);
 436                 vha->req = ha->req_q_map[req];
 437                 options |= BIT_1;
 438                 for (ques = 1; ques < ha->max_rsp_queues; ques++) {
 439                         ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
 440                         if (!ret) {
 441                                 ql_log(ql_log_warn, vha, 0x00e8,
 442                                     "Failed to create response queue.\n");
 443                                 goto fail2;
 444                         }
 445                 }
 446                 ha->flags.cpu_affinity_enabled = 1;
 447                 ql_dbg(ql_dbg_multiq, vha, 0xc007,
 448                     "CPU affinity mode enalbed, "
 449                     "no. of response queues:%d no. of request queues:%d.\n",
 450                     ha->max_rsp_queues, ha->max_req_queues);
 451                 ql_dbg(ql_dbg_init, vha, 0x00e9,
 452                     "CPU affinity mode enalbed, "
 453                     "no. of response queues:%d no. of request queues:%d.\n",
 454                     ha->max_rsp_queues, ha->max_req_queues);
 455         }
 456         return 0;
 457 fail2:
 458         qla25xx_delete_queues(vha);
 459         destroy_workqueue(ha->wq);
 460         ha->wq = NULL;
 461         vha->req = ha->req_q_map[0];
 462 fail:
 463         ha->mqenable = 0;
 464         kfree(ha->req_q_map);
 465         kfree(ha->rsp_q_map);
 466         ha->max_req_queues = ha->max_rsp_queues = 1;
 467         return 1;
 468 }
 469
 470 static char *
 471 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
 472 {
 473         struct qla_hw_data *ha = vha->hw;
 474         static char *pci_bus_modes[] = {
 475                 "33", "66", "100", "133",
 476         };
 477         uint16_t pci_bus;
 478
 479         strcpy(str, "PCI");
 480         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 481         if (pci_bus) {
 482                 strcat(str, "-X (");
 483                 strcat(str, pci_bus_modes[pci_bus]);
 484         } else {
 485                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 486                 strcat(str, " (");
 487                 strcat(str, pci_bus_modes[pci_bus]);
 488         }
 489         strcat(str, " MHz)");
 490
 491         return (str);
 492 }
 493
 494 static char *
 495 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
 496 {
 497         static char *pci_bus_modes[] = { "33", "66", "100", "133", };
 498         struct qla_hw_data *ha = vha->hw;
 499         uint32_t pci_bus;
 500
 501         if (pci_is_pcie(ha->pdev)) {
 502                 char lwstr[6];
 503                 uint32_t lstat, lspeed, lwidth;
 504
 505                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 506                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
 507                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
 508
 509                 strcpy(str, "PCIe (");
 510                 switch (lspeed) {
 511                 case 1:
 512                         strcat(str, "2.5GT/s ");
 513                         break;
 514                 case 2:
 515                         strcat(str, "5.0GT/s ");
 516                         break;
 517                 case 3:
 518                         strcat(str, "8.0GT/s ");
 519                         break;
 520                 default:
 521                         strcat(str, "<unknown> ");
 522                         break;
 523                 }
 524                 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
 525                 strcat(str, lwstr);
 526
 527                 return str;
 528         }
 529
 530         strcpy(str, "PCI");
 531         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 532         if (pci_bus == 0 || pci_bus == 8) {
 533                 strcat(str, " (");
 534                 strcat(str, pci_bus_modes[pci_bus >> 3]);
 535         } else {
 536                 strcat(str, "-X ");
 537                 if (pci_bus & BIT_2)
 538                         strcat(str, "Mode 2");
 539                 else
 540                         strcat(str, "Mode 1");
 541                 strcat(str, " (");
 542                 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
 543         }
 544         strcat(str, " MHz)");
 545
 546         return str;
 547 }
 548
 549 static char *
 550 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
 551 {
 552         char un_str[10];
 553         struct qla_hw_data *ha = vha->hw;
 554
 555         sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
 556             ha->fw_minor_version,
 557             ha->fw_subminor_version);
 558
 559         if (ha->fw_attributes & BIT_9) {
 560                 strcat(str, "FLX");
 561                 return (str);
 562         }
 563
 564         switch (ha->fw_attributes & 0xFF) {
 565         case 0x7:
 566                 strcat(str, "EF");
 567                 break;
 568         case 0x17:
 569                 strcat(str, "TP");
 570                 break;
 571         case 0x37:
 572                 strcat(str, "IP");
 573                 break;
 574         case 0x77:
 575                 strcat(str, "VI");
 576                 break;
 577         default:
 578                 sprintf(un_str, "(%x)", ha->fw_attributes);
 579                 strcat(str, un_str);
 580                 break;
 581         }
 582         if (ha->fw_attributes & 0x100)
 583                 strcat(str, "X");
 584
 585         return (str);
 586 }
 587
 588 static char *
 589 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
 590 {
 591         struct qla_hw_data *ha = vha->hw;
 592
 593         sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
 594             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 595         return str;
 596 }
 597
 598 void
 599 qla2x00_sp_free_dma(void *vha, void *ptr)
 600 {
 601         srb_t *sp = (srb_t *)ptr;
 602         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 603         struct qla_hw_data *ha = sp->fcport->vha->hw;
 604         void *ctx = GET_CMD_CTX_SP(sp);
 605
 606         if (sp->flags & SRB_DMA_VALID) {
 607                 scsi_dma_unmap(cmd);
 608                 sp->flags &= ~SRB_DMA_VALID;
 609         }
 610
 611         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 612                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 613                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 614                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 615         }
 616
 617         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 618                 /* List assured to be having elements */
 619                 qla2x00_clean_dsd_pool(ha, sp);
 620                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 621         }
 622
 623         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 624                 dma_pool_free(ha->dl_dma_pool, ctx,
 625                     ((struct crc_context *)ctx)->crc_ctx_dma);
 626                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 627         }
 628
 629         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 630                 struct ct6_dsd *ctx1 = (struct ct6_dsd *)ctx;
 631
 632                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 633                         ctx1->fcp_cmnd_dma);
 634                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 635                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 636                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 637                 mempool_free(ctx1, ha->ctx_mempool);
 638                 ctx1 = NULL;
 639         }
 640
 641         CMD_SP(cmd) = NULL;
 642         qla2x00_rel_sp(sp->fcport->vha, sp);
 643 }
 644
 645 static void
 646 qla2x00_sp_compl(void *data, void *ptr, int res)
 647 {
 648         struct qla_hw_data *ha = (struct qla_hw_data *)data;
 649         srb_t *sp = (srb_t *)ptr;
 650         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 651
 652         cmd->result = res;
 653
 654         if (atomic_read(&sp->ref_count) == 0) {
 655                 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3015,
 656                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 657                     sp, GET_CMD_SP(sp));
 658                 if (ql2xextended_error_logging & ql_dbg_io)
 659                         BUG();
 660                 return;
 661         }
 662         if (!atomic_dec_and_test(&sp->ref_count))
 663                 return;
 664
 665         qla2x00_sp_free_dma(ha, sp);
 666         cmd->scsi_done(cmd);
 667 }
 668
 669 /* If we are SP1 here, we need to still take and release the host_lock as SP1
 670  * does not have the changes necessary to avoid taking host->host_lock.
 671  */
 672 static int
 673 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 674 {
 675         scsi_qla_host_t *vha = shost_priv(host);
 676         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 677         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 678         struct qla_hw_data *ha = vha->hw;
 679         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 680         srb_t *sp;
 681         int rval;
 682
 683         if (ha->flags.eeh_busy) {
 684                 if (ha->flags.pci_channel_io_perm_failure) {
 685                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 686                             "PCI Channel IO permanent failure, exiting "
 687                             "cmd=%p.\n", cmd);
 688                         cmd->result = DID_NO_CONNECT << 16;
 689                 } else {
 690                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 691                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 692                         cmd->result = DID_REQUEUE << 16;
 693                 }
 694                 goto qc24_fail_command;
 695         }
 696
 697         rval = fc_remote_port_chkready(rport);
 698         if (rval) {
 699                 cmd->result = rval;
 700                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 701                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 702                     cmd, rval);
 703                 goto qc24_fail_command;
 704         }
 705
 706         if (!vha->flags.difdix_supported &&
 707                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 708                         ql_dbg(ql_dbg_io, vha, 0x3004,
 709                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 710                             cmd);
 711                         cmd->result = DID_NO_CONNECT << 16;
 712                         goto qc24_fail_command;
 713         }
 714
 715         if (!fcport) {
 716                 cmd->result = DID_NO_CONNECT << 16;
 717                 goto qc24_fail_command;
 718         }
 719
 720         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 721                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 722                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 723                         ql_dbg(ql_dbg_io, vha, 0x3005,
 724                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 725                             atomic_read(&fcport->state),
 726                             atomic_read(&base_vha->loop_state));
 727                         cmd->result = DID_NO_CONNECT << 16;
 728                         goto qc24_fail_command;
 729                 }
 730                 goto qc24_target_busy;
 731         }
 732
 733         sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
 734         if (!sp)
 735                 goto qc24_host_busy;
 736
 737         sp->u.scmd.cmd = cmd;
 738         sp->type = SRB_SCSI_CMD;
 739         atomic_set(&sp->ref_count, 1);
 740         CMD_SP(cmd) = (void *)sp;
 741         sp->free = qla2x00_sp_free_dma;
 742         sp->done = qla2x00_sp_compl;
 743
 744         rval = ha->isp_ops->start_scsi(sp);
 745         if (rval != QLA_SUCCESS) {
 746                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 747                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 748                 goto qc24_host_busy_free_sp;
 749         }
 750
 751         return 0;
 752
 753 qc24_host_busy_free_sp:
 754         qla2x00_sp_free_dma(ha, sp);
 755
 756 qc24_host_busy:
 757         return SCSI_MLQUEUE_HOST_BUSY;
 758
 759 qc24_target_busy:
 760         return SCSI_MLQUEUE_TARGET_BUSY;
 761
 762 qc24_fail_command:
 763         cmd->scsi_done(cmd);
 764
 765         return 0;
 766 }
 767
 768 /*
 769  * qla2x00_eh_wait_on_command
 770  *    Waits for the command to be returned by the Firmware for some
 771  *    max time.
 772  *
 773  * Input:
 774  *    cmd = Scsi Command to wait on.
 775  *
 776  * Return:
 777  *    Not Found : 0
 778  *    Found : 1
 779  */
 780 static int
 781 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
 782 {
 783 #define ABORT_POLLING_PERIOD    1000
 784 #define ABORT_WAIT_ITER         ((10 * 1000) / (ABORT_POLLING_PERIOD))
 785         unsigned long wait_iter = ABORT_WAIT_ITER;
 786         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 787         struct qla_hw_data *ha = vha->hw;
 788         int ret = QLA_SUCCESS;
 789
 790         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
 791                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
 792                     "Return:eh_wait.\n");
 793                 return ret;
 794         }
 795
 796         while (CMD_SP(cmd) && wait_iter--) {
 797                 msleep(ABORT_POLLING_PERIOD);
 798         }
 799         if (CMD_SP(cmd))
 800                 ret = QLA_FUNCTION_FAILED;
 801
 802         return ret;
 803 }
 804
 805 /*
 806  * qla2x00_wait_for_hba_online
 807  *    Wait till the HBA is online after going through
 808  *    <= MAX_RETRIES_OF_ISP_ABORT  or
 809  *    finally HBA is disabled ie marked offline
 810  *
 811  * Input:
 812  *     ha - pointer to host adapter structure
 813  *
 814  * Note:
 815  *    Does context switching-Release SPIN_LOCK
 816  *    (if any) before calling this routine.
 817  *
 818  * Return:
 819  *    Success (Adapter is online) : 0
 820  *    Failed  (Adapter is offline/disabled) : 1
 821  */
 822 int
 823 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
 824 {
 825         int             return_status;
 826         unsigned long   wait_online;
 827         struct qla_hw_data *ha = vha->hw;
 828         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 829
 830         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 831         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 832             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 833             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 834             ha->dpc_active) && time_before(jiffies, wait_online)) {
 835
 836                 msleep(1000);
 837         }
 838         if (base_vha->flags.online)
 839                 return_status = QLA_SUCCESS;
 840         else
 841                 return_status = QLA_FUNCTION_FAILED;
 842
 843         return (return_status);
 844 }
 845
 846 /*
 847  * qla2x00_wait_for_reset_ready
 848  *    Wait till the HBA is online after going through
 849  *    <= MAX_RETRIES_OF_ISP_ABORT  or
 850  *    finally HBA is disabled ie marked offline or flash
 851  *    operations are in progress.
 852  *
 853  * Input:
 854  *     ha - pointer to host adapter structure
 855  *
 856  * Note:
 857  *    Does context switching-Release SPIN_LOCK
 858  *    (if any) before calling this routine.
 859  *
 860  * Return:
 861  *    Success (Adapter is online/no flash ops) : 0
 862  *    Failed  (Adapter is offline/disabled/flash ops in progress) : 1
 863  */
 864 static int
 865 qla2x00_wait_for_reset_ready(scsi_qla_host_t *vha)
 866 {
 867         int             return_status;
 868         unsigned long   wait_online;
 869         struct qla_hw_data *ha = vha->hw;
 870         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 871
 872         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 873         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 874             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 875             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 876             ha->optrom_state != QLA_SWAITING ||
 877             ha->dpc_active) && time_before(jiffies, wait_online))
 878                 msleep(1000);
 879
 880         if (base_vha->flags.online &&  ha->optrom_state == QLA_SWAITING)
 881                 return_status = QLA_SUCCESS;
 882         else
 883                 return_status = QLA_FUNCTION_FAILED;
 884
 885         ql_dbg(ql_dbg_taskm, vha, 0x8019,
 886             "%s return status=%d.\n", __func__, return_status);
 887
 888         return return_status;
 889 }
 890
 891 int
 892 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
 893 {
 894         int             return_status;
 895         unsigned long   wait_reset;
 896         struct qla_hw_data *ha = vha->hw;
 897         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
 898
 899         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
 900         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
 901             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
 902             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
 903             ha->dpc_active) && time_before(jiffies, wait_reset)) {
 904
 905                 msleep(1000);
 906
 907                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
 908                     ha->flags.chip_reset_done)
 909                         break;
 910         }
 911         if (ha->flags.chip_reset_done)
 912                 return_status = QLA_SUCCESS;
 913         else
 914                 return_status = QLA_FUNCTION_FAILED;
 915
 916         return return_status;
 917 }
 918
 919 static void
 920 sp_get(struct srb *sp)
 921 {
 922         atomic_inc(&sp->ref_count);
 923 }
 924
 925 /**************************************************************************
 926 * qla2xxx_eh_abort
 927 *
 928 * Description:
 929 *    The abort function will abort the specified command.
 930 *
 931 * Input:
 932 *    cmd = Linux SCSI command packet to be aborted.
 933 *
 934 * Returns:
 935 *    Either SUCCESS or FAILED.
 936 *
 937 * Note:
 938 *    Only return FAILED if command not returned by firmware.
 939 **************************************************************************/
 940 static int
 941 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
 942 {
 943         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 944         srb_t *sp;
 945         int ret;
 946         unsigned int id, lun;
 947         unsigned long flags;
 948         int rval, wait = 0;
 949         struct qla_hw_data *ha = vha->hw;
 950
 951         if (!CMD_SP(cmd))
 952                 return SUCCESS;
 953
 954         ret = fc_block_scsi_eh(cmd);
 955         if (ret != 0)
 956                 return ret;
 957         ret = SUCCESS;
 958
 959         id = cmd->device->id;
 960         lun = cmd->device->lun;
 961
 962         spin_lock_irqsave(&ha->hardware_lock, flags);
 963         sp = (srb_t *) CMD_SP(cmd);
 964         if (!sp) {
 965                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 966                 return SUCCESS;
 967         }
 968
 969         ql_dbg(ql_dbg_taskm, vha, 0x8002,
 970             "Aborting from RISC nexus=%ld:%d:%d sp=%p cmd=%p\n",
 971             vha->host_no, id, lun, sp, cmd);
 972
 973         /* Get a reference to the sp and drop the lock.*/
 974         sp_get(sp);
 975
 976         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 977         rval = ha->isp_ops->abort_command(sp);
 978         if (rval) {
 979                 if (rval == QLA_FUNCTION_PARAMETER_ERROR) {
 980                         /*
 981                          * Decrement the ref_count since we can't find the
 982                          * command
 983                          */
 984                         atomic_dec(&sp->ref_count);
 985                         ret = SUCCESS;
 986                 } else
 987                         ret = FAILED;
 988
 989                 ql_dbg(ql_dbg_taskm, vha, 0x8003,
 990                     "Abort command mbx failed cmd=%p, rval=%x.\n", cmd, rval);
 991         } else {
 992                 ql_dbg(ql_dbg_taskm, vha, 0x8004,
 993                     "Abort command mbx success cmd=%p.\n", cmd);
 994                 wait = 1;
 995         }
 996
 997         spin_lock_irqsave(&ha->hardware_lock, flags);
 998         /*
 999          * Clear the slot in the oustanding_cmds array if we can't find the
1000          * command to reclaim the resources.
1001          */
1002         if (rval == QLA_FUNCTION_PARAMETER_ERROR)
1003                 vha->req->outstanding_cmds[sp->handle] = NULL;
1004         sp->done(ha, sp, 0);
1005         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1006
1007         /* Did the command return during mailbox execution? */
1008         if (ret == FAILED && !CMD_SP(cmd))
1009                 ret = SUCCESS;
1010
1011         /* Wait for the command to be returned. */
1012         if (wait) {
1013                 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
1014                         ql_log(ql_log_warn, vha, 0x8006,
1015                             "Abort handler timed out cmd=%p.\n", cmd);
1016                         ret = FAILED;
1017                 }
1018         }
1019
1020         ql_log(ql_log_info, vha, 0x801c,
1021             "Abort command issued nexus=%ld:%d:%d --  %d %x.\n",
1022             vha->host_no, id, lun, wait, ret);
1023
1024         return ret;
1025 }
1026
1027 int
1028 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1029         unsigned int l, enum nexus_wait_type type)
1030 {
1031         int cnt, match, status;
1032         unsigned long flags;
1033         struct qla_hw_data *ha = vha->hw;
1034         struct req_que *req;
1035         srb_t *sp;
1036         struct scsi_cmnd *cmd;
1037
1038         status = QLA_SUCCESS;
1039
1040         spin_lock_irqsave(&ha->hardware_lock, flags);
1041         req = vha->req;
1042         for (cnt = 1; status == QLA_SUCCESS &&
1043                 cnt < req->num_outstanding_cmds; cnt++) {
1044                 sp = req->outstanding_cmds[cnt];
1045                 if (!sp)
1046                         continue;
1047                 if (sp->type != SRB_SCSI_CMD)
1048                         continue;
1049                 if (vha->vp_idx != sp->fcport->vha->vp_idx)
1050                         continue;
1051                 match = 0;
1052                 cmd = GET_CMD_SP(sp);
1053                 switch (type) {
1054                 case WAIT_HOST:
1055                         match = 1;
1056                         break;
1057                 case WAIT_TARGET:
1058                         match = cmd->device->id == t;
1059                         break;
1060                 case WAIT_LUN:
1061                         match = (cmd->device->id == t &&
1062                                 cmd->device->lun == l);
1063                         break;
1064                 }
1065                 if (!match)
1066                         continue;
1067
1068                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1069                 status = qla2x00_eh_wait_on_command(cmd);
1070                 spin_lock_irqsave(&ha->hardware_lock, flags);
1071         }
1072         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1073
1074         return status;
1075 }
1076
1077 static char *reset_errors[] = {
1078         "HBA not online",
1079         "HBA not ready",
1080         "Task management failed",
1081         "Waiting for command completions",
1082 };
1083
1084 static int
1085 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1086     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int))
1087 {
1088         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1089         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1090         int err;
1091
1092         if (!fcport) {
1093                 return FAILED;
1094         }
1095
1096         err = fc_block_scsi_eh(cmd);
1097         if (err != 0)
1098                 return err;
1099
1100         ql_log(ql_log_info, vha, 0x8009,
1101             "%s RESET ISSUED nexus=%ld:%d:%d cmd=%p.\n", name, vha->host_no,
1102             cmd->device->id, cmd->device->lun, cmd);
1103
1104         err = 0;
1105         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1106                 ql_log(ql_log_warn, vha, 0x800a,
1107                     "Wait for hba online failed for cmd=%p.\n", cmd);
1108                 goto eh_reset_failed;
1109         }
1110         err = 2;
1111         if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1112                 != QLA_SUCCESS) {
1113                 ql_log(ql_log_warn, vha, 0x800c,
1114                     "do_reset failed for cmd=%p.\n", cmd);
1115                 goto eh_reset_failed;
1116         }
1117         err = 3;
1118         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1119             cmd->device->lun, type) != QLA_SUCCESS) {
1120                 ql_log(ql_log_warn, vha, 0x800d,
1121                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1122                 goto eh_reset_failed;
1123         }
1124
1125         ql_log(ql_log_info, vha, 0x800e,
1126             "%s RESET SUCCEEDED nexus:%ld:%d:%d cmd=%p.\n", name,
1127             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1128
1129         return SUCCESS;
1130
1131 eh_reset_failed:
1132         ql_log(ql_log_info, vha, 0x800f,
1133             "%s RESET FAILED: %s nexus=%ld:%d:%d cmd=%p.\n", name,
1134             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1135             cmd);
1136         return FAILED;
1137 }
1138
1139 static int
1140 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1141 {
1142         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1143         struct qla_hw_data *ha = vha->hw;
1144
1145         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1146             ha->isp_ops->lun_reset);
1147 }
1148
1149 static int
1150 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1151 {
1152         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1153         struct qla_hw_data *ha = vha->hw;
1154
1155         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1156             ha->isp_ops->target_reset);
1157 }
1158
1159 /**************************************************************************
1160 * qla2xxx_eh_bus_reset
1161 *
1162 * Description:
1163 *    The bus reset function will reset the bus and abort any executing
1164 *    commands.
1165 *
1166 * Input:
1167 *    cmd = Linux SCSI command packet of the command that cause the
1168 *          bus reset.
1169 *
1170 * Returns:
1171 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1172 *
1173 **************************************************************************/
1174 static int
1175 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1176 {
1177         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1178         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1179         int ret = FAILED;
1180         unsigned int id, lun;
1181
1182         id = cmd->device->id;
1183         lun = cmd->device->lun;
1184
1185         if (!fcport) {
1186                 return ret;
1187         }
1188
1189         ret = fc_block_scsi_eh(cmd);
1190         if (ret != 0)
1191                 return ret;
1192         ret = FAILED;
1193
1194         ql_log(ql_log_info, vha, 0x8012,
1195             "BUS RESET ISSUED nexus=%ld:%d:%d.\n", vha->host_no, id, lun);
1196
1197         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1198                 ql_log(ql_log_fatal, vha, 0x8013,
1199                     "Wait for hba online failed board disabled.\n");
1200                 goto eh_bus_reset_done;
1201         }
1202
1203         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1204                 ret = SUCCESS;
1205
1206         if (ret == FAILED)
1207                 goto eh_bus_reset_done;
1208
1209         /* Flush outstanding commands. */
1210         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1211             QLA_SUCCESS) {
1212                 ql_log(ql_log_warn, vha, 0x8014,
1213                     "Wait for pending commands failed.\n");
1214                 ret = FAILED;
1215         }
1216
1217 eh_bus_reset_done:
1218         ql_log(ql_log_warn, vha, 0x802b,
1219             "BUS RESET %s nexus=%ld:%d:%d.\n",
1220             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1221
1222         return ret;
1223 }
1224
1225 /**************************************************************************
1226 * qla2xxx_eh_host_reset
1227 *
1228 * Description:
1229 *    The reset function will reset the Adapter.
1230 *
1231 * Input:
1232 *      cmd = Linux SCSI command packet of the command that cause the
1233 *            adapter reset.
1234 *
1235 * Returns:
1236 *      Either SUCCESS or FAILED.
1237 *
1238 * Note:
1239 **************************************************************************/
1240 static int
1241 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1242 {
1243         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1244         struct qla_hw_data *ha = vha->hw;
1245         int ret = FAILED;
1246         unsigned int id, lun;
1247         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1248
1249         id = cmd->device->id;
1250         lun = cmd->device->lun;
1251
1252         ql_log(ql_log_info, vha, 0x8018,
1253             "ADAPTER RESET ISSUED nexus=%ld:%d:%d.\n", vha->host_no, id, lun);
1254
1255         if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS)
1256                 goto eh_host_reset_lock;
1257
1258         if (vha != base_vha) {
1259                 if (qla2x00_vp_abort_isp(vha))
1260                         goto eh_host_reset_lock;
1261         } else {
1262                 if (IS_P3P_TYPE(vha->hw)) {
1263                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1264                                 /* Ctx reset success */
1265                                 ret = SUCCESS;
1266                                 goto eh_host_reset_lock;
1267                         }
1268                         /* fall thru if ctx reset failed */
1269                 }
1270                 if (ha->wq)
1271                         flush_workqueue(ha->wq);
1272
1273                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1274                 if (ha->isp_ops->abort_isp(base_vha)) {
1275                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1276                         /* failed. schedule dpc to try */
1277                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1278
1279                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1280                                 ql_log(ql_log_warn, vha, 0x802a,
1281                                     "wait for hba online failed.\n");
1282                                 goto eh_host_reset_lock;
1283                         }
1284                 }
1285                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1286         }
1287
1288         /* Waiting for command to be returned to OS.*/
1289         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1290                 QLA_SUCCESS)
1291                 ret = SUCCESS;
1292
1293 eh_host_reset_lock:
1294         ql_log(ql_log_info, vha, 0x8017,
1295             "ADAPTER RESET %s nexus=%ld:%d:%d.\n",
1296             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1297
1298         return ret;
1299 }
1300
1301 /*
1302 * qla2x00_loop_reset
1303 *      Issue loop reset.
1304 *
1305 * Input:
1306 *      ha = adapter block pointer.
1307 *
1308 * Returns:
1309 *      0 = success
1310 */
1311 int
1312 qla2x00_loop_reset(scsi_qla_host_t *vha)
1313 {
1314         int ret;
1315         struct fc_port *fcport;
1316         struct qla_hw_data *ha = vha->hw;
1317
1318         if (IS_QLAFX00(ha)) {
1319                 return qlafx00_loop_reset(vha);
1320         }
1321
1322         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1323                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1324                         if (fcport->port_type != FCT_TARGET)
1325                                 continue;
1326
1327                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1328                         if (ret != QLA_SUCCESS) {
1329                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1330                                     "Bus Reset failed: Reset=%d "
1331                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1332                         }
1333                 }
1334         }
1335
1336
1337         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1338                 atomic_set(&vha->loop_state, LOOP_DOWN);
1339                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1340                 qla2x00_mark_all_devices_lost(vha, 0);
1341                 ret = qla2x00_full_login_lip(vha);
1342                 if (ret != QLA_SUCCESS) {
1343                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1344                             "full_login_lip=%d.\n", ret);
1345                 }
1346         }
1347
1348         if (ha->flags.enable_lip_reset) {
1349                 ret = qla2x00_lip_reset(vha);
1350                 if (ret != QLA_SUCCESS)
1351                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1352                             "lip_reset failed (%d).\n", ret);
1353         }
1354
1355         /* Issue marker command only when we are going to start the I/O */
1356         vha->marker_needed = 1;
1357
1358         return QLA_SUCCESS;
1359 }
1360
1361 void
1362 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1363 {
1364         int que, cnt;
1365         unsigned long flags;
1366         srb_t *sp;
1367         struct qla_hw_data *ha = vha->hw;
1368         struct req_que *req;
1369
1370         spin_lock_irqsave(&ha->hardware_lock, flags);
1371         for (que = 0; que < ha->max_req_queues; que++) {
1372                 req = ha->req_q_map[que];
1373                 if (!req)
1374                         continue;
1375                 if (!req->outstanding_cmds)
1376                         continue;
1377                 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1378                         sp = req->outstanding_cmds[cnt];
1379                         if (sp) {
1380                                 req->outstanding_cmds[cnt] = NULL;
1381                                 sp->done(vha, sp, res);
1382                         }
1383                 }
1384         }
1385         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1386 }
1387
1388 static int
1389 qla2xxx_slave_alloc(struct scsi_device *sdev)
1390 {
1391         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1392
1393         if (!rport || fc_remote_port_chkready(rport))
1394                 return -ENXIO;
1395
1396         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1397
1398         return 0;
1399 }
1400
1401 static int
1402 qla2xxx_slave_configure(struct scsi_device *sdev)
1403 {
1404         scsi_qla_host_t *vha = shost_priv(sdev->host);
1405         struct req_que *req = vha->req;
1406
1407         if (IS_T10_PI_CAPABLE(vha->hw))
1408                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1409
1410         if (sdev->tagged_supported)
1411                 scsi_activate_tcq(sdev, req->max_q_depth);
1412         else
1413                 scsi_deactivate_tcq(sdev, req->max_q_depth);
1414         return 0;
1415 }
1416
1417 static void
1418 qla2xxx_slave_destroy(struct scsi_device *sdev)
1419 {
1420         sdev->hostdata = NULL;
1421 }
1422
1423 static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
1424 {
1425         fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
1426
1427         if (!scsi_track_queue_full(sdev, qdepth))
1428                 return;
1429
1430         ql_dbg(ql_dbg_io, fcport->vha, 0x3029,
1431             "Queue depth adjusted-down to %d for nexus=%ld:%d:%d.\n",
1432             sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun);
1433 }
1434
1435 static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
1436 {
1437         fc_port_t *fcport = sdev->hostdata;
1438         struct scsi_qla_host *vha = fcport->vha;
1439         struct req_que *req = NULL;
1440
1441         req = vha->req;
1442         if (!req)
1443                 return;
1444
1445         if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
1446                 return;
1447
1448         if (sdev->ordered_tags)
1449                 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
1450         else
1451                 scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
1452
1453         ql_dbg(ql_dbg_io, vha, 0x302a,
1454             "Queue depth adjusted-up to %d for nexus=%ld:%d:%d.\n",
1455             sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun);
1456 }
1457
1458 static int
1459 qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
1460 {
1461         switch (reason) {
1462         case SCSI_QDEPTH_DEFAULT:
1463                 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
1464                 break;
1465         case SCSI_QDEPTH_QFULL:
1466                 qla2x00_handle_queue_full(sdev, qdepth);
1467                 break;
1468         case SCSI_QDEPTH_RAMP_UP:
1469                 qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
1470                 break;
1471         default:
1472                 return -EOPNOTSUPP;
1473         }
1474
1475         return sdev->queue_depth;
1476 }
1477
1478 static int
1479 qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
1480 {
1481         if (sdev->tagged_supported) {
1482                 scsi_set_tag_type(sdev, tag_type);
1483                 if (tag_type)
1484                         scsi_activate_tcq(sdev, sdev->queue_depth);
1485                 else
1486                         scsi_deactivate_tcq(sdev, sdev->queue_depth);
1487         } else
1488                 tag_type = 0;
1489
1490         return tag_type;
1491 }
1492
1493 /**
1494  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1495  * @ha: HA context
1496  *
1497  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1498  * supported addressing method.
1499  */
1500 static void
1501 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1502 {
1503         /* Assume a 32bit DMA mask. */
1504         ha->flags.enable_64bit_addressing = 0;
1505
1506         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1507                 /* Any upper-dword bits set? */
1508                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1509                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1510                         /* Ok, a 64bit DMA mask is applicable. */
1511                         ha->flags.enable_64bit_addressing = 1;
1512                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1513                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1514                         return;
1515                 }
1516         }
1517
1518         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1519         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1520 }
1521
1522 static void
1523 qla2x00_enable_intrs(struct qla_hw_data *ha)
1524 {
1525         unsigned long flags = 0;
1526         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1527
1528         spin_lock_irqsave(&ha->hardware_lock, flags);
1529         ha->interrupts_on = 1;
1530         /* enable risc and host interrupts */
1531         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1532         RD_REG_WORD(&reg->ictrl);
1533         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1534
1535 }
1536
1537 static void
1538 qla2x00_disable_intrs(struct qla_hw_data *ha)
1539 {
1540         unsigned long flags = 0;
1541         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1542
1543         spin_lock_irqsave(&ha->hardware_lock, flags);
1544         ha->interrupts_on = 0;
1545         /* disable risc and host interrupts */
1546         WRT_REG_WORD(&reg->ictrl, 0);
1547         RD_REG_WORD(&reg->ictrl);
1548         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1549 }
1550
1551 static void
1552 qla24xx_enable_intrs(struct qla_hw_data *ha)
1553 {
1554         unsigned long flags = 0;
1555         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1556
1557         spin_lock_irqsave(&ha->hardware_lock, flags);
1558         ha->interrupts_on = 1;
1559         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1560         RD_REG_DWORD(&reg->ictrl);
1561         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1562 }
1563
1564 static void
1565 qla24xx_disable_intrs(struct qla_hw_data *ha)
1566 {
1567         unsigned long flags = 0;
1568         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1569
1570         if (IS_NOPOLLING_TYPE(ha))
1571                 return;
1572         spin_lock_irqsave(&ha->hardware_lock, flags);
1573         ha->interrupts_on = 0;
1574         WRT_REG_DWORD(&reg->ictrl, 0);
1575         RD_REG_DWORD(&reg->ictrl);
1576         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1577 }
1578
1579 static int
1580 qla2x00_iospace_config(struct qla_hw_data *ha)
1581 {
1582         resource_size_t pio;
1583         uint16_t msix;
1584         int cpus;
1585
1586         if (pci_request_selected_regions(ha->pdev, ha->bars,
1587             QLA2XXX_DRIVER_NAME)) {
1588                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1589                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1590                     pci_name(ha->pdev));
1591                 goto iospace_error_exit;
1592         }
1593         if (!(ha->bars & 1))
1594                 goto skip_pio;
1595
1596         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1597         pio = pci_resource_start(ha->pdev, 0);
1598         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1599                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1600                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1601                             "Invalid pci I/O region size (%s).\n",
1602                             pci_name(ha->pdev));
1603                         pio = 0;
1604                 }
1605         } else {
1606                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1607                     "Region #0 no a PIO resource (%s).\n",
1608                     pci_name(ha->pdev));
1609                 pio = 0;
1610         }
1611         ha->pio_address = pio;
1612         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1613             "PIO address=%llu.\n",
1614             (unsigned long long)ha->pio_address);
1615
1616 skip_pio:
1617         /* Use MMIO operations for all accesses. */
1618         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1619                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1620                     "Region #1 not an MMIO resource (%s), aborting.\n",
1621                     pci_name(ha->pdev));
1622                 goto iospace_error_exit;
1623         }
1624         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1625                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1626                     "Invalid PCI mem region size (%s), aborting.\n",
1627                     pci_name(ha->pdev));
1628                 goto iospace_error_exit;
1629         }
1630
1631         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1632         if (!ha->iobase) {
1633                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1634                     "Cannot remap MMIO (%s), aborting.\n",
1635                     pci_name(ha->pdev));
1636                 goto iospace_error_exit;
1637         }
1638
1639         /* Determine queue resources */
1640         ha->max_req_queues = ha->max_rsp_queues = 1;
1641         if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
1642                 (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
1643                 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1644                 goto mqiobase_exit;
1645
1646         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1647                         pci_resource_len(ha->pdev, 3));
1648         if (ha->mqiobase) {
1649                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1650                     "MQIO Base=%p.\n", ha->mqiobase);
1651                 /* Read MSIX vector size of the board */
1652                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1653                 ha->msix_count = msix;
1654                 /* Max queues are bounded by available msix vectors */
1655                 /* queue 0 uses two msix vectors */
1656                 if (ql2xmultique_tag) {
1657                         cpus = num_online_cpus();
1658                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1659                                 (cpus + 1) : (ha->msix_count - 1);
1660                         ha->max_req_queues = 2;
1661                 } else if (ql2xmaxqueues > 1) {
1662                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1663                             QLA_MQ_SIZE : ql2xmaxqueues;
1664                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc008,
1665                             "QoS mode set, max no of request queues:%d.\n",
1666                             ha->max_req_queues);
1667                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0019,
1668                             "QoS mode set, max no of request queues:%d.\n",
1669                             ha->max_req_queues);
1670                 }
1671                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1672                     "MSI-X vector count: %d.\n", msix);
1673         } else
1674                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
1675                     "BAR 3 not enabled.\n");
1676
1677 mqiobase_exit:
1678         ha->msix_count = ha->max_rsp_queues + 1;
1679         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
1680             "MSIX Count:%d.\n", ha->msix_count);
1681         return (0);
1682
1683 iospace_error_exit:
1684         return (-ENOMEM);
1685 }
1686
1687
1688 static int
1689 qla83xx_iospace_config(struct qla_hw_data *ha)
1690 {
1691         uint16_t msix;
1692         int cpus;
1693
1694         if (pci_request_selected_regions(ha->pdev, ha->bars,
1695             QLA2XXX_DRIVER_NAME)) {
1696                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
1697                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1698                     pci_name(ha->pdev));
1699
1700                 goto iospace_error_exit;
1701         }
1702
1703         /* Use MMIO operations for all accesses. */
1704         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
1705                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
1706                     "Invalid pci I/O region size (%s).\n",
1707                     pci_name(ha->pdev));
1708                 goto iospace_error_exit;
1709         }
1710         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1711                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
1712                     "Invalid PCI mem region size (%s), aborting\n",
1713                         pci_name(ha->pdev));
1714                 goto iospace_error_exit;
1715         }
1716
1717         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
1718         if (!ha->iobase) {
1719                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
1720                     "Cannot remap MMIO (%s), aborting.\n",
1721                     pci_name(ha->pdev));
1722                 goto iospace_error_exit;
1723         }
1724
1725         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
1726         /* 83XX 26XX always use MQ type access for queues
1727          * - mbar 2, a.k.a region 4 */
1728         ha->max_req_queues = ha->max_rsp_queues = 1;
1729         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
1730                         pci_resource_len(ha->pdev, 4));
1731
1732         if (!ha->mqiobase) {
1733                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
1734                     "BAR2/region4 not enabled\n");
1735                 goto mqiobase_exit;
1736         }
1737
1738         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
1739                         pci_resource_len(ha->pdev, 2));
1740         if (ha->msixbase) {
1741                 /* Read MSIX vector size of the board */
1742                 pci_read_config_word(ha->pdev,
1743                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
1744                 ha->msix_count = msix;
1745                 /* Max queues are bounded by available msix vectors */
1746                 /* queue 0 uses two msix vectors */
1747                 if (ql2xmultique_tag) {
1748                         cpus = num_online_cpus();
1749                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1750                                 (cpus + 1) : (ha->msix_count - 1);
1751                         ha->max_req_queues = 2;
1752                 } else if (ql2xmaxqueues > 1) {
1753                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1754                                                 QLA_MQ_SIZE : ql2xmaxqueues;
1755                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc00c,
1756                             "QoS mode set, max no of request queues:%d.\n",
1757                             ha->max_req_queues);
1758                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
1759                             "QoS mode set, max no of request queues:%d.\n",
1760                             ha->max_req_queues);
1761                 }
1762                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
1763                     "MSI-X vector count: %d.\n", msix);
1764         } else
1765                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
1766                     "BAR 1 not enabled.\n");
1767
1768 mqiobase_exit:
1769         ha->msix_count = ha->max_rsp_queues + 1;
1770
1771         qlt_83xx_iospace_config(ha);
1772
1773         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
1774             "MSIX Count:%d.\n", ha->msix_count);
1775         return 0;
1776
1777 iospace_error_exit:
1778         return -ENOMEM;
1779 }
1780
1781 static struct isp_operations qla2100_isp_ops = {
1782         .pci_config             = qla2100_pci_config,
1783         .reset_chip             = qla2x00_reset_chip,
1784         .chip_diag              = qla2x00_chip_diag,
1785         .config_rings           = qla2x00_config_rings,
1786         .reset_adapter          = qla2x00_reset_adapter,
1787         .nvram_config           = qla2x00_nvram_config,
1788         .update_fw_options      = qla2x00_update_fw_options,
1789         .load_risc              = qla2x00_load_risc,
1790         .pci_info_str           = qla2x00_pci_info_str,
1791         .fw_version_str         = qla2x00_fw_version_str,
1792         .intr_handler           = qla2100_intr_handler,
1793         .enable_intrs           = qla2x00_enable_intrs,
1794         .disable_intrs          = qla2x00_disable_intrs,
1795         .abort_command          = qla2x00_abort_command,
1796         .target_reset           = qla2x00_abort_target,
1797         .lun_reset              = qla2x00_lun_reset,
1798         .fabric_login           = qla2x00_login_fabric,
1799         .fabric_logout          = qla2x00_fabric_logout,
1800         .calc_req_entries       = qla2x00_calc_iocbs_32,
1801         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1802         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1803         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1804         .read_nvram             = qla2x00_read_nvram_data,
1805         .write_nvram            = qla2x00_write_nvram_data,
1806         .fw_dump                = qla2100_fw_dump,
1807         .beacon_on              = NULL,
1808         .beacon_off             = NULL,
1809         .beacon_blink           = NULL,
1810         .read_optrom            = qla2x00_read_optrom_data,
1811         .write_optrom           = qla2x00_write_optrom_data,
1812         .get_flash_version      = qla2x00_get_flash_version,
1813         .start_scsi             = qla2x00_start_scsi,
1814         .abort_isp              = qla2x00_abort_isp,
1815         .iospace_config         = qla2x00_iospace_config,
1816         .initialize_adapter     = qla2x00_initialize_adapter,
1817 };
1818
1819 static struct isp_operations qla2300_isp_ops = {
1820         .pci_config             = qla2300_pci_config,
1821         .reset_chip             = qla2x00_reset_chip,
1822         .chip_diag              = qla2x00_chip_diag,
1823         .config_rings           = qla2x00_config_rings,
1824         .reset_adapter          = qla2x00_reset_adapter,
1825         .nvram_config           = qla2x00_nvram_config,
1826         .update_fw_options      = qla2x00_update_fw_options,
1827         .load_risc              = qla2x00_load_risc,
1828         .pci_info_str           = qla2x00_pci_info_str,
1829         .fw_version_str         = qla2x00_fw_version_str,
1830         .intr_handler           = qla2300_intr_handler,
1831         .enable_intrs           = qla2x00_enable_intrs,
1832         .disable_intrs          = qla2x00_disable_intrs,
1833         .abort_command          = qla2x00_abort_command,
1834         .target_reset           = qla2x00_abort_target,
1835         .lun_reset              = qla2x00_lun_reset,
1836         .fabric_login           = qla2x00_login_fabric,
1837         .fabric_logout          = qla2x00_fabric_logout,
1838         .calc_req_entries       = qla2x00_calc_iocbs_32,
1839         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1840         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1841         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1842         .read_nvram             = qla2x00_read_nvram_data,
1843         .write_nvram            = qla2x00_write_nvram_data,
1844         .fw_dump                = qla2300_fw_dump,
1845         .beacon_on              = qla2x00_beacon_on,
1846         .beacon_off             = qla2x00_beacon_off,
1847         .beacon_blink           = qla2x00_beacon_blink,
1848         .read_optrom            = qla2x00_read_optrom_data,
1849         .write_optrom           = qla2x00_write_optrom_data,
1850         .get_flash_version      = qla2x00_get_flash_version,
1851         .start_scsi             = qla2x00_start_scsi,
1852         .abort_isp              = qla2x00_abort_isp,
1853         .iospace_config         = qla2x00_iospace_config,
1854         .initialize_adapter     = qla2x00_initialize_adapter,
1855 };
1856
1857 static struct isp_operations qla24xx_isp_ops = {
1858         .pci_config             = qla24xx_pci_config,
1859         .reset_chip             = qla24xx_reset_chip,
1860         .chip_diag              = qla24xx_chip_diag,
1861         .config_rings           = qla24xx_config_rings,
1862         .reset_adapter          = qla24xx_reset_adapter,
1863         .nvram_config           = qla24xx_nvram_config,
1864         .update_fw_options      = qla24xx_update_fw_options,
1865         .load_risc              = qla24xx_load_risc,
1866         .pci_info_str           = qla24xx_pci_info_str,
1867         .fw_version_str         = qla24xx_fw_version_str,
1868         .intr_handler           = qla24xx_intr_handler,
1869         .enable_intrs           = qla24xx_enable_intrs,
1870         .disable_intrs          = qla24xx_disable_intrs,
1871         .abort_command          = qla24xx_abort_command,
1872         .target_reset           = qla24xx_abort_target,
1873         .lun_reset              = qla24xx_lun_reset,
1874         .fabric_login           = qla24xx_login_fabric,
1875         .fabric_logout          = qla24xx_fabric_logout,
1876         .calc_req_entries       = NULL,
1877         .build_iocbs            = NULL,
1878         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1879         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1880         .read_nvram             = qla24xx_read_nvram_data,
1881         .write_nvram            = qla24xx_write_nvram_data,
1882         .fw_dump                = qla24xx_fw_dump,
1883         .beacon_on              = qla24xx_beacon_on,
1884         .beacon_off             = qla24xx_beacon_off,
1885         .beacon_blink           = qla24xx_beacon_blink,
1886         .read_optrom            = qla24xx_read_optrom_data,
1887         .write_optrom           = qla24xx_write_optrom_data,
1888         .get_flash_version      = qla24xx_get_flash_version,
1889         .start_scsi             = qla24xx_start_scsi,
1890         .abort_isp              = qla2x00_abort_isp,
1891         .iospace_config         = qla2x00_iospace_config,
1892         .initialize_adapter     = qla2x00_initialize_adapter,
1893 };
1894
1895 static struct isp_operations qla25xx_isp_ops = {
1896         .pci_config             = qla25xx_pci_config,
1897         .reset_chip             = qla24xx_reset_chip,
1898         .chip_diag              = qla24xx_chip_diag,
1899         .config_rings           = qla24xx_config_rings,
1900         .reset_adapter          = qla24xx_reset_adapter,
1901         .nvram_config           = qla24xx_nvram_config,
1902         .update_fw_options      = qla24xx_update_fw_options,
1903         .load_risc              = qla24xx_load_risc,
1904         .pci_info_str           = qla24xx_pci_info_str,
1905         .fw_version_str         = qla24xx_fw_version_str,
1906         .intr_handler           = qla24xx_intr_handler,
1907         .enable_intrs           = qla24xx_enable_intrs,
1908         .disable_intrs          = qla24xx_disable_intrs,
1909         .abort_command          = qla24xx_abort_command,
1910         .target_reset           = qla24xx_abort_target,
1911         .lun_reset              = qla24xx_lun_reset,
1912         .fabric_login           = qla24xx_login_fabric,
1913         .fabric_logout          = qla24xx_fabric_logout,
1914         .calc_req_entries       = NULL,
1915         .build_iocbs            = NULL,
1916         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1917         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1918         .read_nvram             = qla25xx_read_nvram_data,
1919         .write_nvram            = qla25xx_write_nvram_data,
1920         .fw_dump                = qla25xx_fw_dump,
1921         .beacon_on              = qla24xx_beacon_on,
1922         .beacon_off             = qla24xx_beacon_off,
1923         .beacon_blink           = qla24xx_beacon_blink,
1924         .read_optrom            = qla25xx_read_optrom_data,
1925         .write_optrom           = qla24xx_write_optrom_data,
1926         .get_flash_version      = qla24xx_get_flash_version,
1927         .start_scsi             = qla24xx_dif_start_scsi,
1928         .abort_isp              = qla2x00_abort_isp,
1929         .iospace_config         = qla2x00_iospace_config,
1930         .initialize_adapter     = qla2x00_initialize_adapter,
1931 };
1932
1933 static struct isp_operations qla81xx_isp_ops = {
1934         .pci_config             = qla25xx_pci_config,
1935         .reset_chip             = qla24xx_reset_chip,
1936         .chip_diag              = qla24xx_chip_diag,
1937         .config_rings           = qla24xx_config_rings,
1938         .reset_adapter          = qla24xx_reset_adapter,
1939         .nvram_config           = qla81xx_nvram_config,
1940         .update_fw_options      = qla81xx_update_fw_options,
1941         .load_risc              = qla81xx_load_risc,
1942         .pci_info_str           = qla24xx_pci_info_str,
1943         .fw_version_str         = qla24xx_fw_version_str,
1944         .intr_handler           = qla24xx_intr_handler,
1945         .enable_intrs           = qla24xx_enable_intrs,
1946         .disable_intrs          = qla24xx_disable_intrs,
1947         .abort_command          = qla24xx_abort_command,
1948         .target_reset           = qla24xx_abort_target,
1949         .lun_reset              = qla24xx_lun_reset,
1950         .fabric_login           = qla24xx_login_fabric,
1951         .fabric_logout          = qla24xx_fabric_logout,
1952         .calc_req_entries       = NULL,
1953         .build_iocbs            = NULL,
1954         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1955         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1956         .read_nvram             = NULL,
1957         .write_nvram            = NULL,
1958         .fw_dump                = qla81xx_fw_dump,
1959         .beacon_on              = qla24xx_beacon_on,
1960         .beacon_off             = qla24xx_beacon_off,
1961         .beacon_blink           = qla83xx_beacon_blink,
1962         .read_optrom            = qla25xx_read_optrom_data,
1963         .write_optrom           = qla24xx_write_optrom_data,
1964         .get_flash_version      = qla24xx_get_flash_version,
1965         .start_scsi             = qla24xx_dif_start_scsi,
1966         .abort_isp              = qla2x00_abort_isp,
1967         .iospace_config         = qla2x00_iospace_config,
1968         .initialize_adapter     = qla2x00_initialize_adapter,
1969 };
1970
1971 static struct isp_operations qla82xx_isp_ops = {
1972         .pci_config             = qla82xx_pci_config,
1973         .reset_chip             = qla82xx_reset_chip,
1974         .chip_diag              = qla24xx_chip_diag,
1975         .config_rings           = qla82xx_config_rings,
1976         .reset_adapter          = qla24xx_reset_adapter,
1977         .nvram_config           = qla81xx_nvram_config,
1978         .update_fw_options      = qla24xx_update_fw_options,
1979         .load_risc              = qla82xx_load_risc,
1980         .pci_info_str           = qla24xx_pci_info_str,
1981         .fw_version_str         = qla24xx_fw_version_str,
1982         .intr_handler           = qla82xx_intr_handler,
1983         .enable_intrs           = qla82xx_enable_intrs,
1984         .disable_intrs          = qla82xx_disable_intrs,
1985         .abort_command          = qla24xx_abort_command,
1986         .target_reset           = qla24xx_abort_target,
1987         .lun_reset              = qla24xx_lun_reset,
1988         .fabric_login           = qla24xx_login_fabric,
1989         .fabric_logout          = qla24xx_fabric_logout,
1990         .calc_req_entries       = NULL,
1991         .build_iocbs            = NULL,
1992         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1993         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1994         .read_nvram             = qla24xx_read_nvram_data,
1995         .write_nvram            = qla24xx_write_nvram_data,
1996         .fw_dump                = qla82xx_fw_dump,
1997         .beacon_on              = qla82xx_beacon_on,
1998         .beacon_off             = qla82xx_beacon_off,
1999         .beacon_blink           = NULL,
2000         .read_optrom            = qla82xx_read_optrom_data,
2001         .write_optrom           = qla82xx_write_optrom_data,
2002         .get_flash_version      = qla82xx_get_flash_version,
2003         .start_scsi             = qla82xx_start_scsi,
2004         .abort_isp              = qla82xx_abort_isp,
2005         .iospace_config         = qla82xx_iospace_config,
2006         .initialize_adapter     = qla2x00_initialize_adapter,
2007 };
2008
2009 static struct isp_operations qla8044_isp_ops = {
2010         .pci_config             = qla82xx_pci_config,
2011         .reset_chip             = qla82xx_reset_chip,
2012         .chip_diag              = qla24xx_chip_diag,
2013         .config_rings           = qla82xx_config_rings,
2014         .reset_adapter          = qla24xx_reset_adapter,
2015         .nvram_config           = qla81xx_nvram_config,
2016         .update_fw_options      = qla24xx_update_fw_options,
2017         .load_risc              = qla82xx_load_risc,
2018         .pci_info_str           = qla24xx_pci_info_str,
2019         .fw_version_str         = qla24xx_fw_version_str,
2020         .intr_handler           = qla8044_intr_handler,
2021         .enable_intrs           = qla82xx_enable_intrs,
2022         .disable_intrs          = qla82xx_disable_intrs,
2023         .abort_command          = qla24xx_abort_command,
2024         .target_reset           = qla24xx_abort_target,
2025         .lun_reset              = qla24xx_lun_reset,
2026         .fabric_login           = qla24xx_login_fabric,
2027         .fabric_logout          = qla24xx_fabric_logout,
2028         .calc_req_entries       = NULL,
2029         .build_iocbs            = NULL,
2030         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2031         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2032         .read_nvram             = NULL,
2033         .write_nvram            = NULL,
2034         .fw_dump                = qla8044_fw_dump,
2035         .beacon_on              = qla82xx_beacon_on,
2036         .beacon_off             = qla82xx_beacon_off,
2037         .beacon_blink           = NULL,
2038         .read_optrom            = qla8044_read_optrom_data,
2039         .write_optrom           = qla8044_write_optrom_data,
2040         .get_flash_version      = qla82xx_get_flash_version,
2041         .start_scsi             = qla82xx_start_scsi,
2042         .abort_isp              = qla8044_abort_isp,
2043         .iospace_config         = qla82xx_iospace_config,
2044         .initialize_adapter     = qla2x00_initialize_adapter,
2045 };
2046
2047 static struct isp_operations qla83xx_isp_ops = {
2048         .pci_config             = qla25xx_pci_config,
2049         .reset_chip             = qla24xx_reset_chip,
2050         .chip_diag              = qla24xx_chip_diag,
2051         .config_rings           = qla24xx_config_rings,
2052         .reset_adapter          = qla24xx_reset_adapter,
2053         .nvram_config           = qla81xx_nvram_config,
2054         .update_fw_options      = qla81xx_update_fw_options,
2055         .load_risc              = qla81xx_load_risc,
2056         .pci_info_str           = qla24xx_pci_info_str,
2057         .fw_version_str         = qla24xx_fw_version_str,
2058         .intr_handler           = qla24xx_intr_handler,
2059         .enable_intrs           = qla24xx_enable_intrs,
2060         .disable_intrs          = qla24xx_disable_intrs,
2061         .abort_command          = qla24xx_abort_command,
2062         .target_reset           = qla24xx_abort_target,
2063         .lun_reset              = qla24xx_lun_reset,
2064         .fabric_login           = qla24xx_login_fabric,
2065         .fabric_logout          = qla24xx_fabric_logout,
2066         .calc_req_entries       = NULL,
2067         .build_iocbs            = NULL,
2068         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2069         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2070         .read_nvram             = NULL,
2071         .write_nvram            = NULL,
2072         .fw_dump                = qla83xx_fw_dump,
2073         .beacon_on              = qla24xx_beacon_on,
2074         .beacon_off             = qla24xx_beacon_off,
2075         .beacon_blink           = qla83xx_beacon_blink,
2076         .read_optrom            = qla25xx_read_optrom_data,
2077         .write_optrom           = qla24xx_write_optrom_data,
2078         .get_flash_version      = qla24xx_get_flash_version,
2079         .start_scsi             = qla24xx_dif_start_scsi,
2080         .abort_isp              = qla2x00_abort_isp,
2081         .iospace_config         = qla83xx_iospace_config,
2082         .initialize_adapter     = qla2x00_initialize_adapter,
2083 };
2084
2085 static struct isp_operations qlafx00_isp_ops = {
2086         .pci_config             = qlafx00_pci_config,
2087         .reset_chip             = qlafx00_soft_reset,
2088         .chip_diag              = qlafx00_chip_diag,
2089         .config_rings           = qlafx00_config_rings,
2090         .reset_adapter          = qlafx00_soft_reset,
2091         .nvram_config           = NULL,
2092         .update_fw_options      = NULL,
2093         .load_risc              = NULL,
2094         .pci_info_str           = qlafx00_pci_info_str,
2095         .fw_version_str         = qlafx00_fw_version_str,
2096         .intr_handler           = qlafx00_intr_handler,
2097         .enable_intrs           = qlafx00_enable_intrs,
2098         .disable_intrs          = qlafx00_disable_intrs,
2099         .abort_command          = qla24xx_async_abort_command,
2100         .target_reset           = qlafx00_abort_target,
2101         .lun_reset              = qlafx00_lun_reset,
2102         .fabric_login           = NULL,
2103         .fabric_logout          = NULL,
2104         .calc_req_entries       = NULL,
2105         .build_iocbs            = NULL,
2106         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2107         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2108         .read_nvram             = qla24xx_read_nvram_data,
2109         .write_nvram            = qla24xx_write_nvram_data,
2110         .fw_dump                = NULL,
2111         .beacon_on              = qla24xx_beacon_on,
2112         .beacon_off             = qla24xx_beacon_off,
2113         .beacon_blink           = NULL,
2114         .read_optrom            = qla24xx_read_optrom_data,
2115         .write_optrom           = qla24xx_write_optrom_data,
2116         .get_flash_version      = qla24xx_get_flash_version,
2117         .start_scsi             = qlafx00_start_scsi,
2118         .abort_isp              = qlafx00_abort_isp,
2119         .iospace_config         = qlafx00_iospace_config,
2120         .initialize_adapter     = qlafx00_initialize_adapter,
2121 };
2122
2123 static struct isp_operations qla27xx_isp_ops = {
2124         .pci_config             = qla25xx_pci_config,
2125         .reset_chip             = qla24xx_reset_chip,
2126         .chip_diag              = qla24xx_chip_diag,
2127         .config_rings           = qla24xx_config_rings,
2128         .reset_adapter          = qla24xx_reset_adapter,
2129         .nvram_config           = qla81xx_nvram_config,
2130         .update_fw_options      = qla81xx_update_fw_options,
2131         .load_risc              = qla81xx_load_risc,
2132         .pci_info_str           = qla24xx_pci_info_str,
2133         .fw_version_str         = qla24xx_fw_version_str,
2134         .intr_handler           = qla24xx_intr_handler,
2135         .enable_intrs           = qla24xx_enable_intrs,
2136         .disable_intrs          = qla24xx_disable_intrs,
2137         .abort_command          = qla24xx_abort_command,
2138         .target_reset           = qla24xx_abort_target,
2139         .lun_reset              = qla24xx_lun_reset,
2140         .fabric_login           = qla24xx_login_fabric,
2141         .fabric_logout          = qla24xx_fabric_logout,
2142         .calc_req_entries       = NULL,
2143         .build_iocbs            = NULL,
2144         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2145         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2146         .read_nvram             = NULL,
2147         .write_nvram            = NULL,
2148         .fw_dump                = qla27xx_fwdump,
2149         .beacon_on              = qla24xx_beacon_on,
2150         .beacon_off             = qla24xx_beacon_off,
2151         .beacon_blink           = qla83xx_beacon_blink,
2152         .read_optrom            = qla25xx_read_optrom_data,
2153         .write_optrom           = qla24xx_write_optrom_data,
2154         .get_flash_version      = qla24xx_get_flash_version,
2155         .start_scsi             = qla24xx_dif_start_scsi,
2156         .abort_isp              = qla2x00_abort_isp,
2157         .iospace_config         = qla83xx_iospace_config,
2158         .initialize_adapter     = qla2x00_initialize_adapter,
2159 };
2160
2161 static inline void
2162 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2163 {
2164         ha->device_type = DT_EXTENDED_IDS;
2165         switch (ha->pdev->device) {
2166         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2167                 ha->device_type |= DT_ISP2100;
2168                 ha->device_type &= ~DT_EXTENDED_IDS;
2169                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2170                 break;
2171         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2172                 ha->device_type |= DT_ISP2200;
2173                 ha->device_type &= ~DT_EXTENDED_IDS;
2174                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2175                 break;
2176         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2177                 ha->device_type |= DT_ISP2300;
2178                 ha->device_type |= DT_ZIO_SUPPORTED;
2179                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2180                 break;
2181         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2182                 ha->device_type |= DT_ISP2312;
2183                 ha->device_type |= DT_ZIO_SUPPORTED;
2184                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2185                 break;
2186         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2187                 ha->device_type |= DT_ISP2322;
2188                 ha->device_type |= DT_ZIO_SUPPORTED;
2189                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2190                     ha->pdev->subsystem_device == 0x0170)
2191                         ha->device_type |= DT_OEM_001;
2192                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2193                 break;
2194         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2195                 ha->device_type |= DT_ISP6312;
2196                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2197                 break;
2198         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2199                 ha->device_type |= DT_ISP6322;
2200                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2201                 break;
2202         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2203                 ha->device_type |= DT_ISP2422;
2204                 ha->device_type |= DT_ZIO_SUPPORTED;
2205                 ha->device_type |= DT_FWI2;
2206                 ha->device_type |= DT_IIDMA;
2207                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2208                 break;
2209         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2210                 ha->device_type |= DT_ISP2432;
2211                 ha->device_type |= DT_ZIO_SUPPORTED;
2212                 ha->device_type |= DT_FWI2;
2213                 ha->device_type |= DT_IIDMA;
2214                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2215                 break;
2216         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2217                 ha->device_type |= DT_ISP8432;
2218                 ha->device_type |= DT_ZIO_SUPPORTED;
2219                 ha->device_type |= DT_FWI2;
2220                 ha->device_type |= DT_IIDMA;
2221                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2222                 break;
2223         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2224                 ha->device_type |= DT_ISP5422;
2225                 ha->device_type |= DT_FWI2;
2226                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2227                 break;
2228         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2229                 ha->device_type |= DT_ISP5432;
2230                 ha->device_type |= DT_FWI2;
2231                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2232                 break;
2233         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2234                 ha->device_type |= DT_ISP2532;
2235                 ha->device_type |= DT_ZIO_SUPPORTED;
2236                 ha->device_type |= DT_FWI2;
2237                 ha->device_type |= DT_IIDMA;
2238                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2239                 break;
2240         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2241                 ha->device_type |= DT_ISP8001;
2242                 ha->device_type |= DT_ZIO_SUPPORTED;
2243                 ha->device_type |= DT_FWI2;
2244                 ha->device_type |= DT_IIDMA;
2245                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2246                 break;
2247         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2248                 ha->device_type |= DT_ISP8021;
2249                 ha->device_type |= DT_ZIO_SUPPORTED;
2250                 ha->device_type |= DT_FWI2;
2251                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2252                 /* Initialize 82XX ISP flags */
2253                 qla82xx_init_flags(ha);
2254                 break;
2255          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2256                 ha->device_type |= DT_ISP8044;
2257                 ha->device_type |= DT_ZIO_SUPPORTED;
2258                 ha->device_type |= DT_FWI2;
2259                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2260                 /* Initialize 82XX ISP flags */
2261                 qla82xx_init_flags(ha);
2262                 break;
2263         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2264                 ha->device_type |= DT_ISP2031;
2265                 ha->device_type |= DT_ZIO_SUPPORTED;
2266                 ha->device_type |= DT_FWI2;
2267                 ha->device_type |= DT_IIDMA;
2268                 ha->device_type |= DT_T10_PI;
2269                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2270                 break;
2271         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2272                 ha->device_type |= DT_ISP8031;
2273                 ha->device_type |= DT_ZIO_SUPPORTED;
2274                 ha->device_type |= DT_FWI2;
2275                 ha->device_type |= DT_IIDMA;
2276                 ha->device_type |= DT_T10_PI;
2277                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2278                 break;
2279         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2280                 ha->device_type |= DT_ISPFX00;
2281                 break;
2282         case PCI_DEVICE_ID_QLOGIC_ISP2071:
2283                 ha->device_type |= DT_ISP2071;
2284                 ha->device_type |= DT_ZIO_SUPPORTED;
2285                 ha->device_type |= DT_FWI2;
2286                 ha->device_type |= DT_IIDMA;
2287                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2288                 break;
2289         case PCI_DEVICE_ID_QLOGIC_ISP2271:
2290                 ha->device_type |= DT_ISP2271;
2291                 ha->device_type |= DT_ZIO_SUPPORTED;
2292                 ha->device_type |= DT_FWI2;
2293                 ha->device_type |= DT_IIDMA;
2294                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2295                 break;
2296         }
2297
2298         if (IS_QLA82XX(ha))
2299                 ha->port_no = ha->portnum & 1;
2300         else {
2301                 /* Get adapter physical port no from interrupt pin register. */
2302                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2303                 if (IS_QLA27XX(ha))
2304                         ha->port_no--;
2305                 else
2306                         ha->port_no = !(ha->port_no & 1);
2307         }
2308
2309         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2310             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2311             ha->device_type, ha->port_no, ha->fw_srisc_address);
2312 }
2313
2314 static void
2315 qla2xxx_scan_start(struct Scsi_Host *shost)
2316 {
2317         scsi_qla_host_t *vha = shost_priv(shost);
2318
2319         if (vha->hw->flags.running_gold_fw)
2320                 return;
2321
2322         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2323         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2324         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2325         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2326 }
2327
2328 static int
2329 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2330 {
2331         scsi_qla_host_t *vha = shost_priv(shost);
2332
2333         if (!vha->host)
2334                 return 1;
2335         if (time > vha->hw->loop_reset_delay * HZ)
2336                 return 1;
2337
2338         return atomic_read(&vha->loop_state) == LOOP_READY;
2339 }
2340
2341 /*
2342  * PCI driver interface
2343  */
2344 static int
2345 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2346 {
2347         int     ret = -ENODEV;
2348         struct Scsi_Host *host;
2349         scsi_qla_host_t *base_vha = NULL;
2350         struct qla_hw_data *ha;
2351         char pci_info[30];
2352         char fw_str[30], wq_name[30];
2353         struct scsi_host_template *sht;
2354         int bars, mem_only = 0;
2355         uint16_t req_length = 0, rsp_length = 0;
2356         struct req_que *req = NULL;
2357         struct rsp_que *rsp = NULL;
2358         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2359         sht = &qla2xxx_driver_template;
2360         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2361             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2362             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2363             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2364             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2365             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2366             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2367             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2368             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2369             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2370             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2371             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2372             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2373             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271) {
2374                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2375                 mem_only = 1;
2376                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2377                     "Mem only adapter.\n");
2378         }
2379         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2380             "Bars=%d.\n", bars);
2381
2382         if (mem_only) {
2383                 if (pci_enable_device_mem(pdev))
2384                         goto probe_out;
2385         } else {
2386                 if (pci_enable_device(pdev))
2387                         goto probe_out;
2388         }
2389
2390         /* This may fail but that's ok */
2391         pci_enable_pcie_error_reporting(pdev);
2392
2393         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2394         if (!ha) {
2395                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2396                     "Unable to allocate memory for ha.\n");
2397                 goto probe_out;
2398         }
2399         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2400             "Memory allocated for ha=%p.\n", ha);
2401         ha->pdev = pdev;
2402         ha->tgt.enable_class_2 = ql2xenableclass2;
2403
2404         /* Clear our data area */
2405         ha->bars = bars;
2406         ha->mem_only = mem_only;
2407         spin_lock_init(&ha->hardware_lock);
2408         spin_lock_init(&ha->vport_slock);
2409         mutex_init(&ha->selflogin_lock);
2410         mutex_init(&ha->optrom_mutex);
2411
2412         /* Set ISP-type information. */
2413         qla2x00_set_isp_flags(ha);
2414
2415         /* Set EEH reset type to fundamental if required by hba */
2416         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2417             IS_QLA83XX(ha) || IS_QLA27XX(ha))
2418                 pdev->needs_freset = 1;
2419
2420         ha->prev_topology = 0;
2421         ha->init_cb_size = sizeof(init_cb_t);
2422         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2423         ha->optrom_size = OPTROM_SIZE_2300;
2424
2425         /* Assign ISP specific operations. */
2426         if (IS_QLA2100(ha)) {
2427                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2428                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2429                 req_length = REQUEST_ENTRY_CNT_2100;
2430                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2431                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2432                 ha->gid_list_info_size = 4;
2433                 ha->flash_conf_off = ~0;
2434                 ha->flash_data_off = ~0;
2435                 ha->nvram_conf_off = ~0;
2436                 ha->nvram_data_off = ~0;
2437                 ha->isp_ops = &qla2100_isp_ops;
2438         } else if (IS_QLA2200(ha)) {
2439                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2440                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2441                 req_length = REQUEST_ENTRY_CNT_2200;
2442                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2443                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2444                 ha->gid_list_info_size = 4;
2445                 ha->flash_conf_off = ~0;
2446                 ha->flash_data_off = ~0;
2447                 ha->nvram_conf_off = ~0;
2448                 ha->nvram_data_off = ~0;
2449                 ha->isp_ops = &qla2100_isp_ops;
2450         } else if (IS_QLA23XX(ha)) {
2451                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2452                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2453                 req_length = REQUEST_ENTRY_CNT_2200;
2454                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2455                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2456                 ha->gid_list_info_size = 6;
2457                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2458                         ha->optrom_size = OPTROM_SIZE_2322;
2459                 ha->flash_conf_off = ~0;
2460                 ha->flash_data_off = ~0;
2461                 ha->nvram_conf_off = ~0;
2462                 ha->nvram_data_off = ~0;
2463                 ha->isp_ops = &qla2300_isp_ops;
2464         } else if (IS_QLA24XX_TYPE(ha)) {
2465                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2466                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2467                 req_length = REQUEST_ENTRY_CNT_24XX;
2468                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2469                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2470                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2471                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2472                 ha->gid_list_info_size = 8;
2473                 ha->optrom_size = OPTROM_SIZE_24XX;
2474                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2475                 ha->isp_ops = &qla24xx_isp_ops;
2476                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2477                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2478                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2479                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2480         } else if (IS_QLA25XX(ha)) {
2481                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2482                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2483                 req_length = REQUEST_ENTRY_CNT_24XX;
2484                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2485                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2486                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2487                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2488                 ha->gid_list_info_size = 8;
2489                 ha->optrom_size = OPTROM_SIZE_25XX;
2490                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2491                 ha->isp_ops = &qla25xx_isp_ops;
2492                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2493                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2494                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2495                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2496         } else if (IS_QLA81XX(ha)) {
2497                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2498                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2499                 req_length = REQUEST_ENTRY_CNT_24XX;
2500                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2501                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2502                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2503                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2504                 ha->gid_list_info_size = 8;
2505                 ha->optrom_size = OPTROM_SIZE_81XX;
2506                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2507                 ha->isp_ops = &qla81xx_isp_ops;
2508                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2509                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2510                 ha->nvram_conf_off = ~0;
2511                 ha->nvram_data_off = ~0;
2512         } else if (IS_QLA82XX(ha)) {
2513                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2514                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2515                 req_length = REQUEST_ENTRY_CNT_82XX;
2516                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2517                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2518                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2519                 ha->gid_list_info_size = 8;
2520                 ha->optrom_size = OPTROM_SIZE_82XX;
2521                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2522                 ha->isp_ops = &qla82xx_isp_ops;
2523                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2524                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2525                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2526                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2527         } else if (IS_QLA8044(ha)) {
2528                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2529                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2530                 req_length = REQUEST_ENTRY_CNT_82XX;
2531                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2532                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2533                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2534                 ha->gid_list_info_size = 8;
2535                 ha->optrom_size = OPTROM_SIZE_83XX;
2536                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2537                 ha->isp_ops = &qla8044_isp_ops;
2538                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2539                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2540                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2541                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2542         } else if (IS_QLA83XX(ha)) {
2543                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2544                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2545                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2546                 req_length = REQUEST_ENTRY_CNT_24XX;
2547                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2548                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2549                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2550                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2551                 ha->gid_list_info_size = 8;
2552                 ha->optrom_size = OPTROM_SIZE_83XX;
2553                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2554                 ha->isp_ops = &qla83xx_isp_ops;
2555                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2556                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2557                 ha->nvram_conf_off = ~0;
2558                 ha->nvram_data_off = ~0;
2559         }  else if (IS_QLAFX00(ha)) {
2560                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
2561                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
2562                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
2563                 req_length = REQUEST_ENTRY_CNT_FX00;
2564                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
2565                 ha->isp_ops = &qlafx00_isp_ops;
2566                 ha->port_down_retry_count = 30; /* default value */
2567                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
2568                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2569                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
2570                 ha->mr.fw_hbt_en = 1;
2571                 ha->mr.host_info_resend = false;
2572                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
2573         } else if (IS_QLA27XX(ha)) {
2574                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2575                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2576                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2577                 req_length = REQUEST_ENTRY_CNT_24XX;
2578                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2579                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2580                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2581                 ha->gid_list_info_size = 8;
2582                 ha->optrom_size = OPTROM_SIZE_83XX;
2583                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2584                 ha->isp_ops = &qla27xx_isp_ops;
2585                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2586                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2587                 ha->nvram_conf_off = ~0;
2588                 ha->nvram_data_off = ~0;
2589         }
2590
2591         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2592             "mbx_count=%d, req_length=%d, "
2593             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2594             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2595             "max_fibre_devices=%d.\n",
2596             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2597             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2598             ha->nvram_npiv_size, ha->max_fibre_devices);
2599         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2600             "isp_ops=%p, flash_conf_off=%d, "
2601             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2602             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2603             ha->nvram_conf_off, ha->nvram_data_off);
2604
2605         /* Configure PCI I/O space */
2606         ret = ha->isp_ops->iospace_config(ha);
2607         if (ret)
2608                 goto iospace_config_failed;
2609
2610         ql_log_pci(ql_log_info, pdev, 0x001d,
2611             "Found an ISP%04X irq %d iobase 0x%p.\n",
2612             pdev->device, pdev->irq, ha->iobase);
2613         mutex_init(&ha->vport_lock);
2614         init_completion(&ha->mbx_cmd_comp);
2615         complete(&ha->mbx_cmd_comp);
2616         init_completion(&ha->mbx_intr_comp);
2617         init_completion(&ha->dcbx_comp);
2618         init_completion(&ha->lb_portup_comp);
2619
2620         set_bit(0, (unsigned long *) ha->vp_idx_map);
2621
2622         qla2x00_config_dma_addressing(ha);
2623         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
2624             "64 Bit addressing is %s.\n",
2625             ha->flags.enable_64bit_addressing ? "enable" :
2626             "disable");
2627         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2628         if (ret) {
2629                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
2630                     "Failed to allocate memory for adapter, aborting.\n");
2631
2632                 goto probe_hw_failed;
2633         }
2634
2635         req->max_q_depth = MAX_Q_DEPTH;
2636         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2637                 req->max_q_depth = ql2xmaxqdepth;
2638
2639
2640         base_vha = qla2x00_create_host(sht, ha);
2641         if (!base_vha) {
2642                 ret = -ENOMEM;
2643                 qla2x00_mem_free(ha);
2644                 qla2x00_free_req_que(ha, req);
2645                 qla2x00_free_rsp_que(ha, rsp);
2646                 goto probe_hw_failed;
2647         }
2648
2649         pci_set_drvdata(pdev, base_vha);
2650
2651         host = base_vha->host;
2652         base_vha->req = req;
2653         if (IS_QLA2XXX_MIDTYPE(ha))
2654                 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
2655         else
2656                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2657                                                 base_vha->vp_idx;
2658
2659         /* Setup fcport template structure. */
2660         ha->mr.fcport.vha = base_vha;
2661         ha->mr.fcport.port_type = FCT_UNKNOWN;
2662         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
2663         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
2664         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
2665         ha->mr.fcport.scan_state = 1;
2666
2667         /* Set the SG table size based on ISP type */
2668         if (!IS_FWI2_CAPABLE(ha)) {
2669                 if (IS_QLA2100(ha))
2670                         host->sg_tablesize = 32;
2671         } else {
2672                 if (!IS_QLA82XX(ha))
2673                         host->sg_tablesize = QLA_SG_ALL;
2674         }
2675         host->max_id = ha->max_fibre_devices;
2676         host->cmd_per_lun = 3;
2677         host->unique_id = host->host_no;
2678         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
2679                 host->max_cmd_len = 32;
2680         else
2681                 host->max_cmd_len = MAX_CMDSZ;
2682         host->max_channel = MAX_BUSES - 1;
2683         host->max_lun = ql2xmaxlun;
2684         host->transportt = qla2xxx_transport_template;
2685         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
2686
2687         ql_dbg(ql_dbg_init, base_vha, 0x0033,
2688             "max_id=%d this_id=%d "
2689             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
2690             "max_lun=%d transportt=%p, vendor_id=%llu.\n", host->max_id,
2691             host->this_id, host->cmd_per_lun, host->unique_id,
2692             host->max_cmd_len, host->max_channel, host->max_lun,
2693             host->transportt, sht->vendor_id);
2694
2695 que_init:
2696         /* Alloc arrays of request and response ring ptrs */
2697         if (!qla2x00_alloc_queues(ha, req, rsp)) {
2698                 ql_log(ql_log_fatal, base_vha, 0x003d,
2699                     "Failed to allocate memory for queue pointers..."
2700                     "aborting.\n");
2701                 goto probe_init_failed;
2702         }
2703
2704         qlt_probe_one_stage1(base_vha, ha);
2705
2706         /* Set up the irqs */
2707         ret = qla2x00_request_irqs(ha, rsp);
2708         if (ret)
2709                 goto probe_init_failed;
2710
2711         pci_save_state(pdev);
2712
2713         /* Assign back pointers */
2714         rsp->req = req;
2715         req->rsp = rsp;
2716
2717         if (IS_QLAFX00(ha)) {
2718                 ha->rsp_q_map[0] = rsp;
2719                 ha->req_q_map[0] = req;
2720                 set_bit(0, ha->req_qid_map);
2721                 set_bit(0, ha->rsp_qid_map);
2722         }
2723
2724         /* FWI2-capable only. */
2725         req->req_q_in = &ha->iobase->isp24.req_q_in;
2726         req->req_q_out = &ha->iobase->isp24.req_q_out;
2727         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2728         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
2729         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
2730                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2731                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2732                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2733                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
2734         }
2735
2736         if (IS_QLAFX00(ha)) {
2737                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
2738                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
2739                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
2740                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
2741         }
2742
2743         if (IS_P3P_TYPE(ha)) {
2744                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2745                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2746                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2747         }
2748
2749         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
2750             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2751             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2752         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
2753             "req->req_q_in=%p req->req_q_out=%p "
2754             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2755             req->req_q_in, req->req_q_out,
2756             rsp->rsp_q_in, rsp->rsp_q_out);
2757         ql_dbg(ql_dbg_init, base_vha, 0x003e,
2758             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2759             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2760         ql_dbg(ql_dbg_init, base_vha, 0x003f,
2761             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2762             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
2763
2764         if (ha->isp_ops->initialize_adapter(base_vha)) {
2765                 ql_log(ql_log_fatal, base_vha, 0x00d6,
2766                     "Failed to initialize adapter - Adapter flags %x.\n",
2767                     base_vha->device_flags);
2768
2769                 if (IS_QLA82XX(ha)) {
2770                         qla82xx_idc_lock(ha);
2771                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2772                                 QLA8XXX_DEV_FAILED);
2773                         qla82xx_idc_unlock(ha);
2774                         ql_log(ql_log_fatal, base_vha, 0x00d7,
2775                             "HW State: FAILED.\n");
2776                 } else if (IS_QLA8044(ha)) {
2777                         qla8044_idc_lock(ha);
2778                         qla8044_wr_direct(base_vha,
2779                                 QLA8044_CRB_DEV_STATE_INDEX,
2780                                 QLA8XXX_DEV_FAILED);
2781                         qla8044_idc_unlock(ha);
2782                         ql_log(ql_log_fatal, base_vha, 0x0150,
2783                             "HW State: FAILED.\n");
2784                 }
2785
2786                 ret = -ENODEV;
2787                 goto probe_failed;
2788         }
2789
2790         if (IS_QLAFX00(ha))
2791                 host->can_queue = QLAFX00_MAX_CANQUEUE;
2792         else
2793                 host->can_queue = req->num_outstanding_cmds - 10;
2794
2795         ql_dbg(ql_dbg_init, base_vha, 0x0032,
2796             "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
2797             host->can_queue, base_vha->req,
2798             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
2799
2800         if (ha->mqenable) {
2801                 if (qla25xx_setup_mode(base_vha)) {
2802                         ql_log(ql_log_warn, base_vha, 0x00ec,
2803                             "Failed to create queues, falling back to single queue mode.\n");
2804                         goto que_init;
2805                 }
2806         }
2807
2808         if (ha->flags.running_gold_fw)
2809                 goto skip_dpc;
2810
2811         /*
2812          * Startup the kernel thread for this host adapter
2813          */
2814         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
2815             "%s_dpc", base_vha->host_str);
2816         if (IS_ERR(ha->dpc_thread)) {
2817                 ql_log(ql_log_fatal, base_vha, 0x00ed,
2818                     "Failed to start DPC thread.\n");
2819                 ret = PTR_ERR(ha->dpc_thread);
2820                 goto probe_failed;
2821         }
2822         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
2823             "DPC thread started successfully.\n");
2824
2825         /*
2826          * If we're not coming up in initiator mode, we might sit for
2827          * a while without waking up the dpc thread, which leads to a
2828          * stuck process warning.  So just kick the dpc once here and
2829          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
2830          */
2831         qla2xxx_wake_dpc(base_vha);
2832
2833         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
2834
2835         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
2836                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
2837                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
2838                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
2839
2840                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
2841                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
2842                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
2843                 INIT_WORK(&ha->idc_state_handler,
2844                     qla83xx_idc_state_handler_work);
2845                 INIT_WORK(&ha->nic_core_unrecoverable,
2846                     qla83xx_nic_core_unrecoverable_work);
2847         }
2848
2849 skip_dpc:
2850         list_add_tail(&base_vha->list, &ha->vp_list);
2851         base_vha->host->irq = ha->pdev->irq;
2852
2853         /* Initialized the timer */
2854         qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
2855         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
2856             "Started qla2x00_timer with "
2857             "interval=%d.\n", WATCH_INTERVAL);
2858         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
2859             "Detected hba at address=%p.\n",
2860             ha);
2861
2862         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
2863                 if (ha->fw_attributes & BIT_4) {
2864                         int prot = 0, guard;
2865                         base_vha->flags.difdix_supported = 1;
2866                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
2867                             "Registering for DIF/DIX type 1 and 3 protection.\n");
2868                         if (ql2xenabledif == 1)
2869                                 prot = SHOST_DIX_TYPE0_PROTECTION;
2870                         scsi_host_set_prot(host,
2871                             prot | SHOST_DIF_TYPE1_PROTECTION
2872                             | SHOST_DIF_TYPE2_PROTECTION
2873                             | SHOST_DIF_TYPE3_PROTECTION
2874                             | SHOST_DIX_TYPE1_PROTECTION
2875                             | SHOST_DIX_TYPE2_PROTECTION
2876                             | SHOST_DIX_TYPE3_PROTECTION);
2877
2878                         guard = SHOST_DIX_GUARD_CRC;
2879
2880                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
2881                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
2882                                 guard |= SHOST_DIX_GUARD_IP;
2883
2884                         scsi_host_set_guard(host, guard);
2885                 } else
2886                         base_vha->flags.difdix_supported = 0;
2887         }
2888
2889         ha->isp_ops->enable_intrs(ha);
2890
2891         if (IS_QLAFX00(ha)) {
2892                 ret = qlafx00_fx_disc(base_vha,
2893                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
2894                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
2895                     QLA_SG_ALL : 128;
2896         }
2897
2898         ret = scsi_add_host(host, &pdev->dev);
2899         if (ret)
2900                 goto probe_failed;
2901
2902         base_vha->flags.init_done = 1;
2903         base_vha->flags.online = 1;
2904         ha->prev_minidump_failed = 0;
2905
2906         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
2907             "Init done and hba is online.\n");
2908
2909         if (qla_ini_mode_enabled(base_vha))
2910                 scsi_scan_host(host);
2911         else
2912                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
2913                         "skipping scsi_scan_host() for non-initiator port\n");
2914
2915         qla2x00_alloc_sysfs_attr(base_vha);
2916
2917         if (IS_QLAFX00(ha)) {
2918                 ret = qlafx00_fx_disc(base_vha,
2919                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
2920
2921                 /* Register system information */
2922                 ret =  qlafx00_fx_disc(base_vha,
2923                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
2924         }
2925
2926         qla2x00_init_host_attr(base_vha);
2927
2928         qla2x00_dfs_setup(base_vha);
2929
2930         ql_log(ql_log_info, base_vha, 0x00fb,
2931             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
2932         ql_log(ql_log_info, base_vha, 0x00fc,
2933             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
2934             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
2935             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
2936             base_vha->host_no,
2937             ha->isp_ops->fw_version_str(base_vha, fw_str));
2938
2939         qlt_add_target(ha, base_vha);
2940
2941         return 0;
2942
2943 probe_init_failed:
2944         qla2x00_free_req_que(ha, req);
2945         ha->req_q_map[0] = NULL;
2946         clear_bit(0, ha->req_qid_map);
2947         qla2x00_free_rsp_que(ha, rsp);
2948         ha->rsp_q_map[0] = NULL;
2949         clear_bit(0, ha->rsp_qid_map);
2950         ha->max_req_queues = ha->max_rsp_queues = 0;
2951
2952 probe_failed:
2953         if (base_vha->timer_active)
2954                 qla2x00_stop_timer(base_vha);
2955         base_vha->flags.online = 0;
2956         if (ha->dpc_thread) {
2957                 struct task_struct *t = ha->dpc_thread;
2958
2959                 ha->dpc_thread = NULL;
2960                 kthread_stop(t);
2961         }
2962
2963         qla2x00_free_device(base_vha);
2964
2965         scsi_host_put(base_vha->host);
2966
2967 probe_hw_failed:
2968         if (IS_QLA82XX(ha)) {
2969                 qla82xx_idc_lock(ha);
2970                 qla82xx_clear_drv_active(ha);
2971                 qla82xx_idc_unlock(ha);
2972         }
2973         if (IS_QLA8044(ha)) {
2974                 qla8044_idc_lock(ha);
2975                 qla8044_clear_drv_active(ha);
2976                 qla8044_idc_unlock(ha);
2977         }
2978 iospace_config_failed:
2979         if (IS_P3P_TYPE(ha)) {
2980                 if (!ha->nx_pcibase)
2981                         iounmap((device_reg_t *)ha->nx_pcibase);
2982                 if (!ql2xdbwr)
2983                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
2984         } else {
2985                 if (ha->iobase)
2986                         iounmap(ha->iobase);
2987                 if (ha->cregbase)
2988                         iounmap(ha->cregbase);
2989         }
2990         pci_release_selected_regions(ha->pdev, ha->bars);
2991         kfree(ha);
2992         ha = NULL;
2993
2994 probe_out:
2995         pci_disable_device(pdev);
2996         return ret;
2997 }
2998
2999 static void
3000 qla2x00_shutdown(struct pci_dev *pdev)
3001 {
3002         scsi_qla_host_t *vha;
3003         struct qla_hw_data  *ha;
3004
3005         if (!atomic_read(&pdev->enable_cnt))
3006                 return;
3007
3008         vha = pci_get_drvdata(pdev);
3009         ha = vha->hw;
3010
3011         /* Notify ISPFX00 firmware */
3012         if (IS_QLAFX00(ha))
3013                 qlafx00_driver_shutdown(vha, 20);
3014
3015         /* Turn-off FCE trace */
3016         if (ha->flags.fce_enabled) {
3017                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3018                 ha->flags.fce_enabled = 0;
3019         }
3020
3021         /* Turn-off EFT trace */
3022         if (ha->eft)
3023                 qla2x00_disable_eft_trace(vha);
3024
3025         /* Stop currently executing firmware. */
3026         qla2x00_try_to_stop_firmware(vha);
3027
3028         /* Turn adapter off line */
3029         vha->flags.online = 0;
3030
3031         /* turn-off interrupts on the card */
3032         if (ha->interrupts_on) {
3033                 vha->flags.init_done = 0;
3034                 ha->isp_ops->disable_intrs(ha);
3035         }
3036
3037         qla2x00_free_irqs(vha);
3038
3039         qla2x00_free_fw_dump(ha);
3040 }
3041
3042 /* Deletes all the virtual ports for a given ha */
3043 static void
3044 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
3045 {
3046         struct Scsi_Host *scsi_host;
3047         scsi_qla_host_t *vha;
3048         unsigned long flags;
3049
3050         mutex_lock(&ha->vport_lock);
3051         while (ha->cur_vport_count) {
3052                 spin_lock_irqsave(&ha->vport_slock, flags);
3053
3054                 BUG_ON(base_vha->list.next == &ha->vp_list);
3055                 /* This assumes first entry in ha->vp_list is always base vha */
3056                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3057                 scsi_host = scsi_host_get(vha->host);
3058
3059                 spin_unlock_irqrestore(&ha->vport_slock, flags);
3060                 mutex_unlock(&ha->vport_lock);
3061
3062                 fc_vport_terminate(vha->fc_vport);
3063                 scsi_host_put(vha->host);
3064
3065                 mutex_lock(&ha->vport_lock);
3066         }
3067         mutex_unlock(&ha->vport_lock);
3068 }
3069
3070 /* Stops all deferred work threads */
3071 static void
3072 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3073 {
3074         /* Flush the work queue and remove it */
3075         if (ha->wq) {
3076                 flush_workqueue(ha->wq);
3077                 destroy_workqueue(ha->wq);
3078                 ha->wq = NULL;
3079         }
3080
3081         /* Cancel all work and destroy DPC workqueues */
3082         if (ha->dpc_lp_wq) {
3083                 cancel_work_sync(&ha->idc_aen);
3084                 destroy_workqueue(ha->dpc_lp_wq);
3085                 ha->dpc_lp_wq = NULL;
3086         }
3087
3088         if (ha->dpc_hp_wq) {
3089                 cancel_work_sync(&ha->nic_core_reset);
3090                 cancel_work_sync(&ha->idc_state_handler);
3091                 cancel_work_sync(&ha->nic_core_unrecoverable);
3092                 destroy_workqueue(ha->dpc_hp_wq);
3093                 ha->dpc_hp_wq = NULL;
3094         }
3095
3096         /* Kill the kernel thread for this host */
3097         if (ha->dpc_thread) {
3098                 struct task_struct *t = ha->dpc_thread;
3099
3100                 /*
3101                  * qla2xxx_wake_dpc checks for ->dpc_thread
3102                  * so we need to zero it out.
3103                  */
3104                 ha->dpc_thread = NULL;
3105                 kthread_stop(t);
3106         }
3107 }
3108
3109 static void
3110 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3111 {
3112         if (IS_QLA82XX(ha)) {
3113
3114                 iounmap((device_reg_t *)ha->nx_pcibase);
3115                 if (!ql2xdbwr)
3116                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3117         } else {
3118                 if (ha->iobase)
3119                         iounmap(ha->iobase);
3120
3121                 if (ha->cregbase)
3122                         iounmap(ha->cregbase);
3123
3124                 if (ha->mqiobase)
3125                         iounmap(ha->mqiobase);
3126
3127                 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && ha->msixbase)
3128                         iounmap(ha->msixbase);
3129         }
3130 }
3131
3132 static void
3133 qla2x00_clear_drv_active(scsi_qla_host_t *vha)
3134 {
3135         struct qla_hw_data *ha = vha->hw;
3136
3137         if (IS_QLA8044(ha)) {
3138                 qla8044_idc_lock(ha);
3139                 qla8044_clear_drv_active(ha);
3140                 qla8044_idc_unlock(ha);
3141         } else if (IS_QLA82XX(ha)) {
3142                 qla82xx_idc_lock(ha);
3143                 qla82xx_clear_drv_active(ha);
3144                 qla82xx_idc_unlock(ha);
3145         }
3146 }
3147
3148 static void
3149 qla2x00_remove_one(struct pci_dev *pdev)
3150 {
3151         scsi_qla_host_t *base_vha;
3152         struct qla_hw_data  *ha;
3153
3154         /*
3155          * If the PCI device is disabled that means that probe failed and any
3156          * resources should be have cleaned up on probe exit.
3157          */
3158         if (!atomic_read(&pdev->enable_cnt))
3159                 return;
3160
3161         base_vha = pci_get_drvdata(pdev);
3162         ha = base_vha->hw;
3163
3164         set_bit(UNLOADING, &base_vha->dpc_flags);
3165
3166         if (IS_QLAFX00(ha))
3167                 qlafx00_driver_shutdown(base_vha, 20);
3168
3169         qla2x00_delete_all_vps(ha, base_vha);
3170
3171         if (IS_QLA8031(ha)) {
3172                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3173                     "Clearing fcoe driver presence.\n");
3174                 if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3175                         ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3176                             "Error while clearing DRV-Presence.\n");
3177         }
3178
3179         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3180
3181         qla2x00_dfs_remove(base_vha);
3182
3183         qla84xx_put_chip(base_vha);
3184
3185         /* Disable timer */
3186         if (base_vha->timer_active)
3187                 qla2x00_stop_timer(base_vha);
3188
3189         base_vha->flags.online = 0;
3190
3191         qla2x00_destroy_deferred_work(ha);
3192
3193         qlt_remove_target(ha, base_vha);
3194
3195         qla2x00_free_sysfs_attr(base_vha, true);
3196
3197         fc_remove_host(base_vha->host);
3198
3199         scsi_remove_host(base_vha->host);
3200
3201         qla2x00_free_device(base_vha);
3202
3203         scsi_host_put(base_vha->host);
3204
3205         qla2x00_clear_drv_active(base_vha);
3206
3207         qla2x00_unmap_iobases(ha);
3208
3209         pci_release_selected_regions(ha->pdev, ha->bars);
3210         kfree(ha);
3211         ha = NULL;
3212
3213         pci_disable_pcie_error_reporting(pdev);
3214
3215         pci_disable_device(pdev);
3216 }
3217
3218 static void
3219 qla2x00_free_device(scsi_qla_host_t *vha)
3220 {
3221         struct qla_hw_data *ha = vha->hw;
3222
3223         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3224
3225         /* Disable timer */
3226         if (vha->timer_active)
3227                 qla2x00_stop_timer(vha);
3228
3229         qla25xx_delete_queues(vha);
3230
3231         if (ha->flags.fce_enabled)
3232                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3233
3234         if (ha->eft)
3235                 qla2x00_disable_eft_trace(vha);
3236
3237         /* Stop currently executing firmware. */
3238         qla2x00_try_to_stop_firmware(vha);
3239
3240         vha->flags.online = 0;
3241
3242         /* turn-off interrupts on the card */
3243         if (ha->interrupts_on) {
3244                 vha->flags.init_done = 0;
3245                 ha->isp_ops->disable_intrs(ha);
3246         }
3247
3248         qla2x00_free_irqs(vha);
3249
3250         qla2x00_free_fcports(vha);
3251
3252         qla2x00_mem_free(ha);
3253
3254         qla82xx_md_free(vha);
3255
3256         qla2x00_free_queues(ha);
3257 }
3258
3259 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3260 {
3261         fc_port_t *fcport, *tfcport;
3262
3263         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
3264                 list_del(&fcport->list);
3265                 qla2x00_clear_loop_id(fcport);
3266                 kfree(fcport);
3267                 fcport = NULL;
3268         }
3269 }
3270
3271 static inline void
3272 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3273     int defer)
3274 {
3275         struct fc_rport *rport;
3276         scsi_qla_host_t *base_vha;
3277         unsigned long flags;
3278
3279         if (!fcport->rport)
3280                 return;
3281
3282         rport = fcport->rport;
3283         if (defer) {
3284                 base_vha = pci_get_drvdata(vha->hw->pdev);
3285                 spin_lock_irqsave(vha->host->host_lock, flags);
3286                 fcport->drport = rport;
3287                 spin_unlock_irqrestore(vha->host->host_lock, flags);
3288                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3289                 qla2xxx_wake_dpc(base_vha);
3290         } else {
3291                 fc_remote_port_delete(rport);
3292                 qlt_fc_port_deleted(vha, fcport);
3293         }
3294 }
3295
3296 /*
3297  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3298  *
3299  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3300  *
3301  * Return: None.
3302  *
3303  * Context:
3304  */
3305 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3306     int do_login, int defer)
3307 {
3308         if (IS_QLAFX00(vha->hw)) {
3309                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3310                 qla2x00_schedule_rport_del(vha, fcport, defer);
3311                 return;
3312         }
3313
3314         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3315             vha->vp_idx == fcport->vha->vp_idx) {
3316                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3317                 qla2x00_schedule_rport_del(vha, fcport, defer);
3318         }
3319         /*
3320          * We may need to retry the login, so don't change the state of the
3321          * port but do the retries.
3322          */
3323         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3324                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3325
3326         if (!do_login)
3327                 return;
3328
3329         if (fcport->login_retry == 0) {
3330                 fcport->login_retry = vha->hw->login_retry_count;
3331                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3332
3333                 ql_dbg(ql_dbg_disc, vha, 0x2067,
3334                     "Port login retry %8phN, id = 0x%04x retry cnt=%d.\n",
3335                     fcport->port_name, fcport->loop_id, fcport->login_retry);
3336         }
3337 }
3338
3339 /*
3340  * qla2x00_mark_all_devices_lost
3341  *      Updates fcport state when device goes offline.
3342  *
3343  * Input:
3344  *      ha = adapter block pointer.
3345  *      fcport = port structure pointer.
3346  *
3347  * Return:
3348  *      None.
3349  *
3350  * Context:
3351  */
3352 void
3353 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3354 {
3355         fc_port_t *fcport;
3356
3357         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3358                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3359                         continue;
3360
3361                 /*
3362                  * No point in marking the device as lost, if the device is
3363                  * already DEAD.
3364                  */
3365                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3366                         continue;
3367                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3368                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3369                         if (defer)
3370                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3371                         else if (vha->vp_idx == fcport->vha->vp_idx)
3372                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3373                 }
3374         }
3375 }
3376
3377 /*
3378 * qla2x00_mem_alloc
3379 *      Allocates adapter memory.
3380 *
3381 * Returns:
3382 *      0  = success.
3383 *      !0  = failure.
3384 */
3385 static int
3386 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3387         struct req_que **req, struct rsp_que **rsp)
3388 {
3389         char    name[16];
3390
3391         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3392                 &ha->init_cb_dma, GFP_KERNEL);
3393         if (!ha->init_cb)
3394                 goto fail;
3395
3396         if (qlt_mem_alloc(ha) < 0)
3397                 goto fail_free_init_cb;
3398
3399         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3400                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3401         if (!ha->gid_list)
3402                 goto fail_free_tgt_mem;
3403
3404         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3405         if (!ha->srb_mempool)
3406                 goto fail_free_gid_list;
3407
3408         if (IS_P3P_TYPE(ha)) {
3409                 /* Allocate cache for CT6 Ctx. */
3410                 if (!ctx_cachep) {
3411                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3412                                 sizeof(struct ct6_dsd), 0,
3413                                 SLAB_HWCACHE_ALIGN, NULL);
3414                         if (!ctx_cachep)
3415                                 goto fail_free_gid_list;
3416                 }
3417                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3418                         ctx_cachep);
3419                 if (!ha->ctx_mempool)
3420                         goto fail_free_srb_mempool;
3421                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3422                     "ctx_cachep=%p ctx_mempool=%p.\n",
3423                     ctx_cachep, ha->ctx_mempool);
3424         }
3425
3426         /* Get memory for cached NVRAM */
3427         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3428         if (!ha->nvram)
3429                 goto fail_free_ctx_mempool;
3430
3431         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3432                 ha->pdev->device);
3433         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3434                 DMA_POOL_SIZE, 8, 0);
3435         if (!ha->s_dma_pool)
3436                 goto fail_free_nvram;
3437
3438         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3439             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3440             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
3441
3442         if (IS_P3P_TYPE(ha) || ql2xenabledif) {
3443                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3444                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
3445                 if (!ha->dl_dma_pool) {
3446                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
3447                             "Failed to allocate memory for dl_dma_pool.\n");
3448                         goto fail_s_dma_pool;
3449                 }
3450
3451                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3452                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
3453                 if (!ha->fcp_cmnd_dma_pool) {
3454                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
3455                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3456                         goto fail_dl_dma_pool;
3457                 }
3458                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
3459                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3460                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3461         }
3462
3463         /* Allocate memory for SNS commands */
3464         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3465         /* Get consistent memory allocated for SNS commands */
3466                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3467                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3468                 if (!ha->sns_cmd)
3469                         goto fail_dma_pool;
3470                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3471                     "sns_cmd: %p.\n", ha->sns_cmd);
3472         } else {
3473         /* Get consistent memory allocated for MS IOCB */
3474                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3475                         &ha->ms_iocb_dma);
3476                 if (!ha->ms_iocb)
3477                         goto fail_dma_pool;
3478         /* Get consistent memory allocated for CT SNS commands */
3479                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3480                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
3481                 if (!ha->ct_sns)
3482                         goto fail_free_ms_iocb;
3483                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
3484                     "ms_iocb=%p ct_sns=%p.\n",
3485                     ha->ms_iocb, ha->ct_sns);
3486         }
3487
3488         /* Allocate memory for request ring */
3489         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
3490         if (!*req) {
3491                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
3492                     "Failed to allocate memory for req.\n");
3493                 goto fail_req;
3494         }
3495         (*req)->length = req_len;
3496         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
3497                 ((*req)->length + 1) * sizeof(request_t),
3498                 &(*req)->dma, GFP_KERNEL);
3499         if (!(*req)->ring) {
3500                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
3501                     "Failed to allocate memory for req_ring.\n");
3502                 goto fail_req_ring;
3503         }
3504         /* Allocate memory for response ring */
3505         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
3506         if (!*rsp) {
3507                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
3508                     "Failed to allocate memory for rsp.\n");
3509                 goto fail_rsp;
3510         }
3511         (*rsp)->hw = ha;
3512         (*rsp)->length = rsp_len;
3513         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
3514                 ((*rsp)->length + 1) * sizeof(response_t),
3515                 &(*rsp)->dma, GFP_KERNEL);
3516         if (!(*rsp)->ring) {
3517                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
3518                     "Failed to allocate memory for rsp_ring.\n");
3519                 goto fail_rsp_ring;
3520         }
3521         (*req)->rsp = *rsp;
3522         (*rsp)->req = *req;
3523         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
3524             "req=%p req->length=%d req->ring=%p rsp=%p "
3525             "rsp->length=%d rsp->ring=%p.\n",
3526             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
3527             (*rsp)->ring);
3528         /* Allocate memory for NVRAM data for vports */
3529         if (ha->nvram_npiv_size) {
3530                 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
3531                     ha->nvram_npiv_size, GFP_KERNEL);
3532                 if (!ha->npiv_info) {
3533                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
3534                             "Failed to allocate memory for npiv_info.\n");
3535                         goto fail_npiv_info;
3536                 }
3537         } else
3538                 ha->npiv_info = NULL;
3539
3540         /* Get consistent memory allocated for EX-INIT-CB. */
3541         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
3542                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3543                     &ha->ex_init_cb_dma);
3544                 if (!ha->ex_init_cb)
3545                         goto fail_ex_init_cb;
3546                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
3547                     "ex_init_cb=%p.\n", ha->ex_init_cb);
3548         }
3549
3550         INIT_LIST_HEAD(&ha->gbl_dsd_list);
3551
3552         /* Get consistent memory allocated for Async Port-Database. */
3553         if (!IS_FWI2_CAPABLE(ha)) {
3554                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3555                         &ha->async_pd_dma);
3556                 if (!ha->async_pd)
3557                         goto fail_async_pd;
3558                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
3559                     "async_pd=%p.\n", ha->async_pd);
3560         }
3561
3562         INIT_LIST_HEAD(&ha->vp_list);
3563
3564         /* Allocate memory for our loop_id bitmap */
3565         ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long),
3566             GFP_KERNEL);
3567         if (!ha->loop_id_map)
3568                 goto fail_async_pd;
3569         else {
3570                 qla2x00_set_reserved_loop_ids(ha);
3571                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
3572                     "loop_id_map=%p.\n", ha->loop_id_map);
3573         }
3574
3575         return 0;
3576
3577 fail_async_pd:
3578         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
3579 fail_ex_init_cb:
3580         kfree(ha->npiv_info);
3581 fail_npiv_info:
3582         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
3583                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
3584         (*rsp)->ring = NULL;
3585         (*rsp)->dma = 0;
3586 fail_rsp_ring:
3587         kfree(*rsp);
3588 fail_rsp:
3589         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
3590                 sizeof(request_t), (*req)->ring, (*req)->dma);
3591         (*req)->ring = NULL;
3592         (*req)->dma = 0;
3593 fail_req_ring:
3594         kfree(*req);
3595 fail_req:
3596         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3597                 ha->ct_sns, ha->ct_sns_dma);
3598         ha->ct_sns = NULL;
3599         ha->ct_sns_dma = 0;
3600 fail_free_ms_iocb:
3601         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3602         ha->ms_iocb = NULL;
3603         ha->ms_iocb_dma = 0;
3604 fail_dma_pool:
3605         if (IS_QLA82XX(ha) || ql2xenabledif) {
3606                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3607                 ha->fcp_cmnd_dma_pool = NULL;
3608         }
3609 fail_dl_dma_pool:
3610         if (IS_QLA82XX(ha) || ql2xenabledif) {
3611                 dma_pool_destroy(ha->dl_dma_pool);
3612                 ha->dl_dma_pool = NULL;
3613         }
3614 fail_s_dma_pool:
3615         dma_pool_destroy(ha->s_dma_pool);
3616         ha->s_dma_pool = NULL;
3617 fail_free_nvram:
3618         kfree(ha->nvram);
3619         ha->nvram = NULL;
3620 fail_free_ctx_mempool:
3621         mempool_destroy(ha->ctx_mempool);
3622         ha->ctx_mempool = NULL;
3623 fail_free_srb_mempool:
3624         mempool_destroy(ha->srb_mempool);
3625         ha->srb_mempool = NULL;
3626 fail_free_gid_list:
3627         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3628         ha->gid_list,
3629         ha->gid_list_dma);
3630         ha->gid_list = NULL;
3631         ha->gid_list_dma = 0;
3632 fail_free_tgt_mem:
3633         qlt_mem_free(ha);
3634 fail_free_init_cb:
3635         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
3636         ha->init_cb_dma);
3637         ha->init_cb = NULL;
3638         ha->init_cb_dma = 0;
3639 fail:
3640         ql_log(ql_log_fatal, NULL, 0x0030,
3641             "Memory allocation failure.\n");
3642         return -ENOMEM;
3643 }
3644
3645 /*
3646 * qla2x00_free_fw_dump
3647 *       Frees fw dump stuff.
3648 *
3649 * Input:
3650 *       ha = adapter block pointer
3651 */
3652 static void
3653 qla2x00_free_fw_dump(struct qla_hw_data *ha)
3654 {
3655         if (ha->fce)
3656                 dma_free_coherent(&ha->pdev->dev,
3657                     FCE_SIZE, ha->fce, ha->fce_dma);
3658
3659         if (ha->eft)
3660                 dma_free_coherent(&ha->pdev->dev,
3661                     EFT_SIZE, ha->eft, ha->eft_dma);
3662
3663         if (ha->fw_dump)
3664                 vfree(ha->fw_dump);
3665         if (ha->fw_dump_template)
3666                 vfree(ha->fw_dump_template);
3667
3668         ha->fce = NULL;
3669         ha->fce_dma = 0;
3670         ha->eft = NULL;
3671         ha->eft_dma = 0;
3672         ha->fw_dumped = 0;
3673         ha->fw_dump_cap_flags = 0;
3674         ha->fw_dump_reading = 0;
3675         ha->fw_dump = NULL;
3676         ha->fw_dump_len = 0;
3677         ha->fw_dump_template = NULL;
3678         ha->fw_dump_template_len = 0;
3679 }
3680
3681 /*
3682 * qla2x00_mem_free
3683 *      Frees all adapter allocated memory.
3684 *
3685 * Input:
3686 *      ha = adapter block pointer.
3687 */
3688 static void
3689 qla2x00_mem_free(struct qla_hw_data *ha)
3690 {
3691         qla2x00_free_fw_dump(ha);
3692
3693         if (ha->mctp_dump)
3694                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
3695                     ha->mctp_dump_dma);
3696
3697         if (ha->srb_mempool)
3698                 mempool_destroy(ha->srb_mempool);
3699
3700         if (ha->dcbx_tlv)
3701                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
3702                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
3703
3704         if (ha->xgmac_data)
3705                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
3706                     ha->xgmac_data, ha->xgmac_data_dma);
3707
3708         if (ha->sns_cmd)
3709                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
3710                 ha->sns_cmd, ha->sns_cmd_dma);
3711
3712         if (ha->ct_sns)
3713                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3714                 ha->ct_sns, ha->ct_sns_dma);
3715
3716         if (ha->sfp_data)
3717                 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
3718
3719         if (ha->ms_iocb)
3720                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3721
3722         if (ha->ex_init_cb)
3723                 dma_pool_free(ha->s_dma_pool,
3724                         ha->ex_init_cb, ha->ex_init_cb_dma);
3725
3726         if (ha->async_pd)
3727                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
3728
3729         if (ha->s_dma_pool)
3730                 dma_pool_destroy(ha->s_dma_pool);
3731
3732         if (ha->gid_list)
3733                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3734                 ha->gid_list, ha->gid_list_dma);
3735
3736         if (IS_QLA82XX(ha)) {
3737                 if (!list_empty(&ha->gbl_dsd_list)) {
3738                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
3739
3740                         /* clean up allocated prev pool */
3741                         list_for_each_entry_safe(dsd_ptr,
3742                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
3743                                 dma_pool_free(ha->dl_dma_pool,
3744                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
3745                                 list_del(&dsd_ptr->list);
3746                                 kfree(dsd_ptr);
3747                         }
3748                 }
3749         }
3750
3751         if (ha->dl_dma_pool)
3752                 dma_pool_destroy(ha->dl_dma_pool);
3753
3754         if (ha->fcp_cmnd_dma_pool)
3755                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3756
3757         if (ha->ctx_mempool)
3758                 mempool_destroy(ha->ctx_mempool);
3759
3760         qlt_mem_free(ha);
3761
3762         if (ha->init_cb)
3763                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
3764                         ha->init_cb, ha->init_cb_dma);
3765         vfree(ha->optrom_buffer);
3766         kfree(ha->nvram);
3767         kfree(ha->npiv_info);
3768         kfree(ha->swl);
3769         kfree(ha->loop_id_map);
3770
3771         ha->srb_mempool = NULL;
3772         ha->ctx_mempool = NULL;
3773         ha->sns_cmd = NULL;
3774         ha->sns_cmd_dma = 0;
3775         ha->ct_sns = NULL;
3776         ha->ct_sns_dma = 0;
3777         ha->ms_iocb = NULL;
3778         ha->ms_iocb_dma = 0;
3779         ha->init_cb = NULL;
3780         ha->init_cb_dma = 0;
3781         ha->ex_init_cb = NULL;
3782         ha->ex_init_cb_dma = 0;
3783         ha->async_pd = NULL;
3784         ha->async_pd_dma = 0;
3785
3786         ha->s_dma_pool = NULL;
3787         ha->dl_dma_pool = NULL;
3788         ha->fcp_cmnd_dma_pool = NULL;
3789
3790         ha->gid_list = NULL;
3791         ha->gid_list_dma = 0;
3792
3793         ha->tgt.atio_ring = NULL;
3794         ha->tgt.atio_dma = 0;
3795         ha->tgt.tgt_vp_map = NULL;
3796 }
3797
3798 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
3799                                                 struct qla_hw_data *ha)
3800 {
3801         struct Scsi_Host *host;
3802         struct scsi_qla_host *vha = NULL;
3803
3804         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
3805         if (host == NULL) {
3806                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
3807                     "Failed to allocate host from the scsi layer, aborting.\n");
3808                 goto fail;
3809         }
3810
3811         /* Clear our data area */
3812         vha = shost_priv(host);
3813         memset(vha, 0, sizeof(scsi_qla_host_t));
3814
3815         vha->host = host;
3816         vha->host_no = host->host_no;
3817         vha->hw = ha;
3818
3819         INIT_LIST_HEAD(&vha->vp_fcports);
3820         INIT_LIST_HEAD(&vha->work_list);
3821         INIT_LIST_HEAD(&vha->list);
3822
3823         spin_lock_init(&vha->work_lock);
3824
3825         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
3826         ql_dbg(ql_dbg_init, vha, 0x0041,
3827             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
3828             vha->host, vha->hw, vha,
3829             dev_name(&(ha->pdev->dev)));
3830
3831         return vha;
3832
3833 fail:
3834         return vha;
3835 }
3836
3837 static struct qla_work_evt *
3838 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
3839 {
3840         struct qla_work_evt *e;
3841         uint8_t bail;
3842
3843         QLA_VHA_MARK_BUSY(vha, bail);
3844         if (bail)
3845                 return NULL;
3846
3847         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
3848         if (!e) {
3849                 QLA_VHA_MARK_NOT_BUSY(vha);
3850                 return NULL;
3851         }
3852
3853         INIT_LIST_HEAD(&e->list);
3854         e->type = type;
3855         e->flags = QLA_EVT_FLAG_FREE;
3856         return e;
3857 }
3858
3859 static int
3860 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
3861 {
3862         unsigned long flags;
3863
3864         spin_lock_irqsave(&vha->work_lock, flags);
3865         list_add_tail(&e->list, &vha->work_list);
3866         spin_unlock_irqrestore(&vha->work_lock, flags);
3867         qla2xxx_wake_dpc(vha);
3868
3869         return QLA_SUCCESS;
3870 }
3871
3872 int
3873 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
3874     u32 data)
3875 {
3876         struct qla_work_evt *e;
3877
3878         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
3879         if (!e)
3880                 return QLA_FUNCTION_FAILED;
3881
3882         e->u.aen.code = code;
3883         e->u.aen.data = data;
3884         return qla2x00_post_work(vha, e);
3885 }
3886
3887 int
3888 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
3889 {
3890         struct qla_work_evt *e;
3891
3892         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
3893         if (!e)
3894                 return QLA_FUNCTION_FAILED;
3895
3896         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
3897         return qla2x00_post_work(vha, e);
3898 }
3899
3900 #define qla2x00_post_async_work(name, type)     \
3901 int qla2x00_post_async_##name##_work(           \
3902     struct scsi_qla_host *vha,                  \
3903     fc_port_t *fcport, uint16_t *data)          \
3904 {                                               \
3905         struct qla_work_evt *e;                 \
3906                                                 \
3907         e = qla2x00_alloc_work(vha, type);      \
3908         if (!e)                                 \
3909                 return QLA_FUNCTION_FAILED;     \
3910                                                 \
3911         e->u.logio.fcport = fcport;             \
3912         if (data) {                             \
3913                 e->u.logio.data[0] = data[0];   \
3914                 e->u.logio.data[1] = data[1];   \
3915         }                                       \
3916         return qla2x00_post_work(vha, e);       \
3917 }
3918
3919 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
3920 qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
3921 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
3922 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
3923 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
3924 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
3925
3926 int
3927 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
3928 {
3929         struct qla_work_evt *e;
3930
3931         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
3932         if (!e)
3933                 return QLA_FUNCTION_FAILED;
3934
3935         e->u.uevent.code = code;
3936         return qla2x00_post_work(vha, e);
3937 }
3938
3939 static void
3940 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
3941 {
3942         char event_string[40];
3943         char *envp[] = { event_string, NULL };
3944
3945         switch (code) {
3946         case QLA_UEVENT_CODE_FW_DUMP:
3947                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
3948                     vha->host_no);
3949                 break;
3950         default:
3951                 /* do nothing */
3952                 break;
3953         }
3954         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
3955 }
3956
3957 int
3958 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
3959                         uint32_t *data, int cnt)
3960 {
3961         struct qla_work_evt *e;
3962
3963         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
3964         if (!e)
3965                 return QLA_FUNCTION_FAILED;
3966
3967         e->u.aenfx.evtcode = evtcode;
3968         e->u.aenfx.count = cnt;
3969         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
3970         return qla2x00_post_work(vha, e);
3971 }
3972
3973 void
3974 qla2x00_do_work(struct scsi_qla_host *vha)
3975 {
3976         struct qla_work_evt *e, *tmp;
3977         unsigned long flags;
3978         LIST_HEAD(work);
3979
3980         spin_lock_irqsave(&vha->work_lock, flags);
3981         list_splice_init(&vha->work_list, &work);
3982         spin_unlock_irqrestore(&vha->work_lock, flags);
3983
3984         list_for_each_entry_safe(e, tmp, &work, list) {
3985                 list_del_init(&e->list);
3986
3987                 switch (e->type) {
3988                 case QLA_EVT_AEN:
3989                         fc_host_post_event(vha->host, fc_get_event_number(),
3990                             e->u.aen.code, e->u.aen.data);
3991                         break;
3992                 case QLA_EVT_IDC_ACK:
3993                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
3994                         break;
3995                 case QLA_EVT_ASYNC_LOGIN:
3996                         qla2x00_async_login(vha, e->u.logio.fcport,
3997                             e->u.logio.data);
3998                         break;
3999                 case QLA_EVT_ASYNC_LOGIN_DONE:
4000                         qla2x00_async_login_done(vha, e->u.logio.fcport,
4001                             e->u.logio.data);
4002                         break;
4003                 case QLA_EVT_ASYNC_LOGOUT:
4004                         qla2x00_async_logout(vha, e->u.logio.fcport);
4005                         break;
4006                 case QLA_EVT_ASYNC_LOGOUT_DONE:
4007                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
4008                             e->u.logio.data);
4009                         break;
4010                 case QLA_EVT_ASYNC_ADISC:
4011                         qla2x00_async_adisc(vha, e->u.logio.fcport,
4012                             e->u.logio.data);
4013                         break;
4014                 case QLA_EVT_ASYNC_ADISC_DONE:
4015                         qla2x00_async_adisc_done(vha, e->u.logio.fcport,
4016                             e->u.logio.data);
4017                         break;
4018                 case QLA_EVT_UEVENT:
4019                         qla2x00_uevent_emit(vha, e->u.uevent.code);
4020                         break;
4021                 case QLA_EVT_AENFX:
4022                         qlafx00_process_aen(vha, e);
4023                         break;
4024                 }
4025                 if (e->flags & QLA_EVT_FLAG_FREE)
4026                         kfree(e);
4027
4028                 /* For each work completed decrement vha ref count */
4029                 QLA_VHA_MARK_NOT_BUSY(vha);
4030         }
4031 }
4032
4033 /* Relogins all the fcports of a vport
4034  * Context: dpc thread
4035  */
4036 void qla2x00_relogin(struct scsi_qla_host *vha)
4037 {
4038         fc_port_t       *fcport;
4039         int status;
4040         uint16_t        next_loopid = 0;
4041         struct qla_hw_data *ha = vha->hw;
4042         uint16_t data[2];
4043
4044         list_for_each_entry(fcport, &vha->vp_fcports, list) {
4045         /*
4046          * If the port is not ONLINE then try to login
4047          * to it if we haven't run out of retries.
4048          */
4049                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
4050                     fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
4051                         fcport->login_retry--;
4052                         if (fcport->flags & FCF_FABRIC_DEVICE) {
4053                                 if (fcport->flags & FCF_FCP2_DEVICE)
4054                                         ha->isp_ops->fabric_logout(vha,
4055                                                         fcport->loop_id,
4056                                                         fcport->d_id.b.domain,
4057                                                         fcport->d_id.b.area,
4058                                                         fcport->d_id.b.al_pa);
4059
4060                                 if (fcport->loop_id == FC_NO_LOOP_ID) {
4061                                         fcport->loop_id = next_loopid =
4062                                             ha->min_external_loopid;
4063                                         status = qla2x00_find_new_loop_id(
4064                                             vha, fcport);
4065                                         if (status != QLA_SUCCESS) {
4066                                                 /* Ran out of IDs to use */
4067                                                 break;
4068                                         }
4069                                 }
4070
4071                                 if (IS_ALOGIO_CAPABLE(ha)) {
4072                                         fcport->flags |= FCF_ASYNC_SENT;
4073                                         data[0] = 0;
4074                                         data[1] = QLA_LOGIO_LOGIN_RETRIED;
4075                                         status = qla2x00_post_async_login_work(
4076                                             vha, fcport, data);
4077                                         if (status == QLA_SUCCESS)
4078                                                 continue;
4079                                         /* Attempt a retry. */
4080                                         status = 1;
4081                                 } else {
4082                                         status = qla2x00_fabric_login(vha,
4083                                             fcport, &next_loopid);
4084                                         if (status ==  QLA_SUCCESS) {
4085                                                 int status2;
4086                                                 uint8_t opts;
4087
4088                                                 opts = 0;
4089                                                 if (fcport->flags &
4090                                                     FCF_FCP2_DEVICE)
4091                                                         opts |= BIT_1;
4092                                                 status2 =
4093                                                     qla2x00_get_port_database(
4094                                                         vha, fcport, opts);
4095                                                 if (status2 != QLA_SUCCESS)
4096                                                         status = 1;
4097                                         }
4098                                 }
4099                         } else
4100                                 status = qla2x00_local_device_login(vha,
4101                                                                 fcport);
4102
4103                         if (status == QLA_SUCCESS) {
4104                                 fcport->old_loop_id = fcport->loop_id;
4105
4106                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
4107                                     "Port login OK: logged in ID 0x%x.\n",
4108                                     fcport->loop_id);
4109
4110                                 qla2x00_update_fcport(vha, fcport);
4111
4112                         } else if (status == 1) {
4113                                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4114                                 /* retry the login again */
4115                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
4116                                     "Retrying %d login again loop_id 0x%x.\n",
4117                                     fcport->login_retry, fcport->loop_id);
4118                         } else {
4119                                 fcport->login_retry = 0;
4120                         }
4121
4122                         if (fcport->login_retry == 0 && status != QLA_SUCCESS)
4123                                 qla2x00_clear_loop_id(fcport);
4124                 }
4125                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
4126                         break;
4127         }
4128 }
4129
4130 /* Schedule work on any of the dpc-workqueues */
4131 void
4132 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
4133 {
4134         struct qla_hw_data *ha = base_vha->hw;
4135
4136         switch (work_code) {
4137         case MBA_IDC_AEN: /* 0x8200 */
4138                 if (ha->dpc_lp_wq)
4139                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
4140                 break;
4141
4142         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
4143                 if (!ha->flags.nic_core_reset_hdlr_active) {
4144                         if (ha->dpc_hp_wq)
4145                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
4146                 } else
4147                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
4148                             "NIC Core reset is already active. Skip "
4149                             "scheduling it again.\n");
4150                 break;
4151         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
4152                 if (ha->dpc_hp_wq)
4153                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
4154                 break;
4155         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
4156                 if (ha->dpc_hp_wq)
4157                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
4158                 break;
4159         default:
4160                 ql_log(ql_log_warn, base_vha, 0xb05f,
4161                     "Unknow work-code=0x%x.\n", work_code);
4162         }
4163
4164         return;
4165 }
4166
4167 /* Work: Perform NIC Core Unrecoverable state handling */
4168 void
4169 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
4170 {
4171         struct qla_hw_data *ha =
4172                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
4173         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4174         uint32_t dev_state = 0;
4175
4176         qla83xx_idc_lock(base_vha, 0);
4177         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4178         qla83xx_reset_ownership(base_vha);
4179         if (ha->flags.nic_core_reset_owner) {
4180                 ha->flags.nic_core_reset_owner = 0;
4181                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4182                     QLA8XXX_DEV_FAILED);
4183                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
4184                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4185         }
4186         qla83xx_idc_unlock(base_vha, 0);
4187 }
4188
4189 /* Work: Execute IDC state handler */
4190 void
4191 qla83xx_idc_state_handler_work(struct work_struct *work)
4192 {
4193         struct qla_hw_data *ha =
4194                 container_of(work, struct qla_hw_data, idc_state_handler);
4195         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4196         uint32_t dev_state = 0;
4197
4198         qla83xx_idc_lock(base_vha, 0);
4199         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4200         if (dev_state == QLA8XXX_DEV_FAILED ||
4201                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
4202                 qla83xx_idc_state_handler(base_vha);
4203         qla83xx_idc_unlock(base_vha, 0);
4204 }
4205
4206 static int
4207 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
4208 {
4209         int rval = QLA_SUCCESS;
4210         unsigned long heart_beat_wait = jiffies + (1 * HZ);
4211         uint32_t heart_beat_counter1, heart_beat_counter2;
4212
4213         do {
4214                 if (time_after(jiffies, heart_beat_wait)) {
4215                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
4216                             "Nic Core f/w is not alive.\n");
4217                         rval = QLA_FUNCTION_FAILED;
4218                         break;
4219                 }
4220
4221                 qla83xx_idc_lock(base_vha, 0);
4222                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4223                     &heart_beat_counter1);
4224                 qla83xx_idc_unlock(base_vha, 0);
4225                 msleep(100);
4226                 qla83xx_idc_lock(base_vha, 0);
4227                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4228                     &heart_beat_counter2);
4229                 qla83xx_idc_unlock(base_vha, 0);
4230         } while (heart_beat_counter1 == heart_beat_counter2);
4231
4232         return rval;
4233 }
4234
4235 /* Work: Perform NIC Core Reset handling */
4236 void
4237 qla83xx_nic_core_reset_work(struct work_struct *work)
4238 {
4239         struct qla_hw_data *ha =
4240                 container_of(work, struct qla_hw_data, nic_core_reset);
4241         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4242         uint32_t dev_state = 0;
4243
4244         if (IS_QLA2031(ha)) {
4245                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
4246                         ql_log(ql_log_warn, base_vha, 0xb081,
4247                             "Failed to dump mctp\n");
4248                 return;
4249         }
4250
4251         if (!ha->flags.nic_core_reset_hdlr_active) {
4252                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
4253                         qla83xx_idc_lock(base_vha, 0);
4254                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4255                             &dev_state);
4256                         qla83xx_idc_unlock(base_vha, 0);
4257                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
4258                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
4259                                     "Nic Core f/w is alive.\n");
4260                                 return;
4261                         }
4262                 }
4263
4264                 ha->flags.nic_core_reset_hdlr_active = 1;
4265                 if (qla83xx_nic_core_reset(base_vha)) {
4266                         /* NIC Core reset failed. */
4267                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
4268                             "NIC Core reset failed.\n");
4269                 }
4270                 ha->flags.nic_core_reset_hdlr_active = 0;
4271         }
4272 }
4273
4274 /* Work: Handle 8200 IDC aens */
4275 void
4276 qla83xx_service_idc_aen(struct work_struct *work)
4277 {
4278         struct qla_hw_data *ha =
4279                 container_of(work, struct qla_hw_data, idc_aen);
4280         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4281         uint32_t dev_state, idc_control;
4282
4283         qla83xx_idc_lock(base_vha, 0);
4284         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4285         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
4286         qla83xx_idc_unlock(base_vha, 0);
4287         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
4288                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
4289                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
4290                             "Application requested NIC Core Reset.\n");
4291                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4292                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
4293                     QLA_SUCCESS) {
4294                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
4295                             "Other protocol driver requested NIC Core Reset.\n");
4296                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4297                 }
4298         } else if (dev_state == QLA8XXX_DEV_FAILED ||
4299                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
4300                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4301         }
4302 }
4303
4304 static void
4305 qla83xx_wait_logic(void)
4306 {
4307         int i;
4308
4309         /* Yield CPU */
4310         if (!in_interrupt()) {
4311                 /*
4312                  * Wait about 200ms before retrying again.
4313                  * This controls the number of retries for single
4314                  * lock operation.
4315                  */
4316                 msleep(100);
4317                 schedule();
4318         } else {
4319                 for (i = 0; i < 20; i++)
4320                         cpu_relax(); /* This a nop instr on i386 */
4321         }
4322 }
4323
4324 static int
4325 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
4326 {
4327         int rval;
4328         uint32_t data;
4329         uint32_t idc_lck_rcvry_stage_mask = 0x3;
4330         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
4331         struct qla_hw_data *ha = base_vha->hw;
4332         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
4333             "Trying force recovery of the IDC lock.\n");
4334
4335         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
4336         if (rval)
4337                 return rval;
4338
4339         if ((data & idc_lck_rcvry_stage_mask) > 0) {
4340                 return QLA_SUCCESS;
4341         } else {
4342                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
4343                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4344                     data);
4345                 if (rval)
4346                         return rval;
4347
4348                 msleep(200);
4349
4350                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4351                     &data);
4352                 if (rval)
4353                         return rval;
4354
4355                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
4356                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
4357                                         ~(idc_lck_rcvry_stage_mask));
4358                         rval = qla83xx_wr_reg(base_vha,
4359                             QLA83XX_IDC_LOCK_RECOVERY, data);
4360                         if (rval)
4361                                 return rval;
4362
4363                         /* Forcefully perform IDC UnLock */
4364                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
4365                             &data);
4366                         if (rval)
4367                                 return rval;
4368                         /* Clear lock-id by setting 0xff */
4369                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4370                             0xff);
4371                         if (rval)
4372                                 return rval;
4373                         /* Clear lock-recovery by setting 0x0 */
4374                         rval = qla83xx_wr_reg(base_vha,
4375                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
4376                         if (rval)
4377                                 return rval;
4378                 } else
4379                         return QLA_SUCCESS;
4380         }
4381
4382         return rval;
4383 }
4384
4385 static int
4386 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
4387 {
4388         int rval = QLA_SUCCESS;
4389         uint32_t o_drv_lockid, n_drv_lockid;
4390         unsigned long lock_recovery_timeout;
4391
4392         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
4393 retry_lockid:
4394         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
4395         if (rval)
4396                 goto exit;
4397
4398         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
4399         if (time_after_eq(jiffies, lock_recovery_timeout)) {
4400                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
4401                         return QLA_SUCCESS;
4402                 else
4403                         return QLA_FUNCTION_FAILED;
4404         }
4405
4406         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
4407         if (rval)
4408                 goto exit;
4409
4410         if (o_drv_lockid == n_drv_lockid) {
4411                 qla83xx_wait_logic();
4412                 goto retry_lockid;
4413         } else
4414                 return QLA_SUCCESS;
4415
4416 exit:
4417         return rval;
4418 }
4419
4420 void
4421 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4422 {
4423         uint16_t options = (requester_id << 15) | BIT_6;
4424         uint32_t data;
4425         uint32_t lock_owner;
4426         struct qla_hw_data *ha = base_vha->hw;
4427
4428         /* IDC-lock implementation using driver-lock/lock-id remote registers */
4429 retry_lock:
4430         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
4431             == QLA_SUCCESS) {
4432                 if (data) {
4433                         /* Setting lock-id to our function-number */
4434                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4435                             ha->portnum);
4436                 } else {
4437                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4438                             &lock_owner);
4439                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
4440                             "Failed to acquire IDC lock, acquired by %d, "
4441                             "retrying...\n", lock_owner);
4442
4443                         /* Retry/Perform IDC-Lock recovery */
4444                         if (qla83xx_idc_lock_recovery(base_vha)
4445                             == QLA_SUCCESS) {
4446                                 qla83xx_wait_logic();
4447                                 goto retry_lock;
4448                         } else
4449                                 ql_log(ql_log_warn, base_vha, 0xb075,
4450                                     "IDC Lock recovery FAILED.\n");
4451                 }
4452
4453         }
4454
4455         return;
4456
4457         /* XXX: IDC-lock implementation using access-control mbx */
4458 retry_lock2:
4459         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4460                 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
4461                     "Failed to acquire IDC lock. retrying...\n");
4462                 /* Retry/Perform IDC-Lock recovery */
4463                 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
4464                         qla83xx_wait_logic();
4465                         goto retry_lock2;
4466                 } else
4467                         ql_log(ql_log_warn, base_vha, 0xb076,
4468                             "IDC Lock recovery FAILED.\n");
4469         }
4470
4471         return;
4472 }
4473
4474 void
4475 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4476 {
4477         uint16_t options = (requester_id << 15) | BIT_7, retry;
4478         uint32_t data;
4479         struct qla_hw_data *ha = base_vha->hw;
4480
4481         /* IDC-unlock implementation using driver-unlock/lock-id
4482          * remote registers
4483          */
4484         retry = 0;
4485 retry_unlock:
4486         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
4487             == QLA_SUCCESS) {
4488                 if (data == ha->portnum) {
4489                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
4490                         /* Clearing lock-id by setting 0xff */
4491                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
4492                 } else if (retry < 10) {
4493                         /* SV: XXX: IDC unlock retrying needed here? */
4494
4495                         /* Retry for IDC-unlock */
4496                         qla83xx_wait_logic();
4497                         retry++;
4498                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
4499                             "Failed to release IDC lock, retyring=%d\n", retry);
4500                         goto retry_unlock;
4501                 }
4502         } else if (retry < 10) {
4503                 /* Retry for IDC-unlock */
4504                 qla83xx_wait_logic();
4505                 retry++;
4506                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
4507                     "Failed to read drv-lockid, retyring=%d\n", retry);
4508                 goto retry_unlock;
4509         }
4510
4511         return;
4512
4513         /* XXX: IDC-unlock implementation using access-control mbx */
4514         retry = 0;
4515 retry_unlock2:
4516         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4517                 if (retry < 10) {
4518                         /* Retry for IDC-unlock */
4519                         qla83xx_wait_logic();
4520                         retry++;
4521                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
4522                             "Failed to release IDC lock, retyring=%d\n", retry);
4523                         goto retry_unlock2;
4524                 }
4525         }
4526
4527         return;
4528 }
4529
4530 int
4531 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4532 {
4533         int rval = QLA_SUCCESS;
4534         struct qla_hw_data *ha = vha->hw;
4535         uint32_t drv_presence;
4536
4537         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4538         if (rval == QLA_SUCCESS) {
4539                 drv_presence |= (1 << ha->portnum);
4540                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4541                     drv_presence);
4542         }
4543
4544         return rval;
4545 }
4546
4547 int
4548 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4549 {
4550         int rval = QLA_SUCCESS;
4551
4552         qla83xx_idc_lock(vha, 0);
4553         rval = __qla83xx_set_drv_presence(vha);
4554         qla83xx_idc_unlock(vha, 0);
4555
4556         return rval;
4557 }
4558
4559 int
4560 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4561 {
4562         int rval = QLA_SUCCESS;
4563         struct qla_hw_data *ha = vha->hw;
4564         uint32_t drv_presence;
4565
4566         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4567         if (rval == QLA_SUCCESS) {
4568                 drv_presence &= ~(1 << ha->portnum);
4569                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4570                     drv_presence);
4571         }
4572
4573         return rval;
4574 }
4575
4576 int
4577 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4578 {
4579         int rval = QLA_SUCCESS;
4580
4581         qla83xx_idc_lock(vha, 0);
4582         rval = __qla83xx_clear_drv_presence(vha);
4583         qla83xx_idc_unlock(vha, 0);
4584
4585         return rval;
4586 }
4587
4588 static void
4589 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
4590 {
4591         struct qla_hw_data *ha = vha->hw;
4592         uint32_t drv_ack, drv_presence;
4593         unsigned long ack_timeout;
4594
4595         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
4596         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
4597         while (1) {
4598                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
4599                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4600                 if ((drv_ack & drv_presence) == drv_presence)
4601                         break;
4602
4603                 if (time_after_eq(jiffies, ack_timeout)) {
4604                         ql_log(ql_log_warn, vha, 0xb067,
4605                             "RESET ACK TIMEOUT! drv_presence=0x%x "
4606                             "drv_ack=0x%x\n", drv_presence, drv_ack);
4607                         /*
4608                          * The function(s) which did not ack in time are forced
4609                          * to withdraw any further participation in the IDC
4610                          * reset.
4611                          */
4612                         if (drv_ack != drv_presence)
4613                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4614                                     drv_ack);
4615                         break;
4616                 }
4617
4618                 qla83xx_idc_unlock(vha, 0);
4619                 msleep(1000);
4620                 qla83xx_idc_lock(vha, 0);
4621         }
4622
4623         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
4624         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
4625 }
4626
4627 static int
4628 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
4629 {
4630         int rval = QLA_SUCCESS;
4631         uint32_t idc_control;
4632
4633         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
4634         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
4635
4636         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
4637         __qla83xx_get_idc_control(vha, &idc_control);
4638         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
4639         __qla83xx_set_idc_control(vha, 0);
4640
4641         qla83xx_idc_unlock(vha, 0);
4642         rval = qla83xx_restart_nic_firmware(vha);
4643         qla83xx_idc_lock(vha, 0);
4644
4645         if (rval != QLA_SUCCESS) {
4646                 ql_log(ql_log_fatal, vha, 0xb06a,
4647                     "Failed to restart NIC f/w.\n");
4648                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
4649                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
4650         } else {
4651                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
4652                     "Success in restarting nic f/w.\n");
4653                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
4654                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
4655         }
4656
4657         return rval;
4658 }
4659
4660 /* Assumes idc_lock always held on entry */
4661 int
4662 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
4663 {
4664         struct qla_hw_data *ha = base_vha->hw;
4665         int rval = QLA_SUCCESS;
4666         unsigned long dev_init_timeout;
4667         uint32_t dev_state;
4668
4669         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
4670         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
4671
4672         while (1) {
4673
4674                 if (time_after_eq(jiffies, dev_init_timeout)) {
4675                         ql_log(ql_log_warn, base_vha, 0xb06e,
4676                             "Initialization TIMEOUT!\n");
4677                         /* Init timeout. Disable further NIC Core
4678                          * communication.
4679                          */
4680                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4681                                 QLA8XXX_DEV_FAILED);
4682                         ql_log(ql_log_info, base_vha, 0xb06f,
4683                             "HW State: FAILED.\n");
4684                 }
4685
4686                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4687                 switch (dev_state) {
4688                 case QLA8XXX_DEV_READY:
4689                         if (ha->flags.nic_core_reset_owner)
4690                                 qla83xx_idc_audit(base_vha,
4691                                     IDC_AUDIT_COMPLETION);
4692                         ha->flags.nic_core_reset_owner = 0;
4693                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
4694                             "Reset_owner reset by 0x%x.\n",
4695                             ha->portnum);
4696                         goto exit;
4697                 case QLA8XXX_DEV_COLD:
4698                         if (ha->flags.nic_core_reset_owner)
4699                                 rval = qla83xx_device_bootstrap(base_vha);
4700                         else {
4701                         /* Wait for AEN to change device-state */
4702                                 qla83xx_idc_unlock(base_vha, 0);
4703                                 msleep(1000);
4704                                 qla83xx_idc_lock(base_vha, 0);
4705                         }
4706                         break;
4707                 case QLA8XXX_DEV_INITIALIZING:
4708                         /* Wait for AEN to change device-state */
4709                         qla83xx_idc_unlock(base_vha, 0);
4710                         msleep(1000);
4711                         qla83xx_idc_lock(base_vha, 0);
4712                         break;
4713                 case QLA8XXX_DEV_NEED_RESET:
4714                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
4715                                 qla83xx_need_reset_handler(base_vha);
4716                         else {
4717                                 /* Wait for AEN to change device-state */
4718                                 qla83xx_idc_unlock(base_vha, 0);
4719                                 msleep(1000);
4720                                 qla83xx_idc_lock(base_vha, 0);
4721                         }
4722                         /* reset timeout value after need reset handler */
4723                         dev_init_timeout = jiffies +
4724                             (ha->fcoe_dev_init_timeout * HZ);
4725                         break;
4726                 case QLA8XXX_DEV_NEED_QUIESCENT:
4727                         /* XXX: DEBUG for now */
4728                         qla83xx_idc_unlock(base_vha, 0);
4729                         msleep(1000);
4730                         qla83xx_idc_lock(base_vha, 0);
4731                         break;
4732                 case QLA8XXX_DEV_QUIESCENT:
4733                         /* XXX: DEBUG for now */
4734                         if (ha->flags.quiesce_owner)
4735                                 goto exit;
4736
4737                         qla83xx_idc_unlock(base_vha, 0);
4738                         msleep(1000);
4739                         qla83xx_idc_lock(base_vha, 0);
4740                         dev_init_timeout = jiffies +
4741                             (ha->fcoe_dev_init_timeout * HZ);
4742                         break;
4743                 case QLA8XXX_DEV_FAILED:
4744                         if (ha->flags.nic_core_reset_owner)
4745                                 qla83xx_idc_audit(base_vha,
4746                                     IDC_AUDIT_COMPLETION);
4747                         ha->flags.nic_core_reset_owner = 0;
4748                         __qla83xx_clear_drv_presence(base_vha);
4749                         qla83xx_idc_unlock(base_vha, 0);
4750                         qla8xxx_dev_failed_handler(base_vha);
4751                         rval = QLA_FUNCTION_FAILED;
4752                         qla83xx_idc_lock(base_vha, 0);
4753                         goto exit;
4754                 case QLA8XXX_BAD_VALUE:
4755                         qla83xx_idc_unlock(base_vha, 0);
4756                         msleep(1000);
4757                         qla83xx_idc_lock(base_vha, 0);
4758                         break;
4759                 default:
4760                         ql_log(ql_log_warn, base_vha, 0xb071,
4761                             "Unknow Device State: %x.\n", dev_state);
4762                         qla83xx_idc_unlock(base_vha, 0);
4763                         qla8xxx_dev_failed_handler(base_vha);
4764                         rval = QLA_FUNCTION_FAILED;
4765                         qla83xx_idc_lock(base_vha, 0);
4766                         goto exit;
4767                 }
4768         }
4769
4770 exit:
4771         return rval;
4772 }
4773
4774 void
4775 qla2x00_disable_board_on_pci_error(struct work_struct *work)
4776 {
4777         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
4778             board_disable);
4779         struct pci_dev *pdev = ha->pdev;
4780         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4781
4782         ql_log(ql_log_warn, base_vha, 0x015b,
4783             "Disabling adapter.\n");
4784
4785         set_bit(UNLOADING, &base_vha->dpc_flags);
4786
4787         qla2x00_delete_all_vps(ha, base_vha);
4788
4789         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
4790
4791         qla2x00_dfs_remove(base_vha);
4792
4793         qla84xx_put_chip(base_vha);
4794
4795         if (base_vha->timer_active)
4796                 qla2x00_stop_timer(base_vha);
4797
4798         base_vha->flags.online = 0;
4799
4800         qla2x00_destroy_deferred_work(ha);
4801
4802         /*
4803          * Do not try to stop beacon blink as it will issue a mailbox
4804          * command.
4805          */
4806         qla2x00_free_sysfs_attr(base_vha, false);
4807
4808         fc_remove_host(base_vha->host);
4809
4810         scsi_remove_host(base_vha->host);
4811
4812         base_vha->flags.init_done = 0;
4813         qla25xx_delete_queues(base_vha);
4814         qla2x00_free_irqs(base_vha);
4815         qla2x00_free_fcports(base_vha);
4816         qla2x00_mem_free(ha);
4817         qla82xx_md_free(base_vha);
4818         qla2x00_free_queues(ha);
4819
4820         scsi_host_put(base_vha->host);
4821
4822         qla2x00_unmap_iobases(ha);
4823
4824         pci_release_selected_regions(ha->pdev, ha->bars);
4825         kfree(ha);
4826         ha = NULL;
4827
4828         pci_disable_pcie_error_reporting(pdev);
4829         pci_disable_device(pdev);
4830         pci_set_drvdata(pdev, NULL);
4831
4832 }
4833
4834 /**************************************************************************
4835 * qla2x00_do_dpc
4836 *   This kernel thread is a task that is schedule by the interrupt handler
4837 *   to perform the background processing for interrupts.
4838 *
4839 * Notes:
4840 * This task always run in the context of a kernel thread.  It
4841 * is kick-off by the driver's detect code and starts up
4842 * up one per adapter. It immediately goes to sleep and waits for
4843 * some fibre event.  When either the interrupt handler or
4844 * the timer routine detects a event it will one of the task
4845 * bits then wake us up.
4846 **************************************************************************/
4847 static int
4848 qla2x00_do_dpc(void *data)
4849 {
4850         int             rval;
4851         scsi_qla_host_t *base_vha;
4852         struct qla_hw_data *ha;
4853
4854         ha = (struct qla_hw_data *)data;
4855         base_vha = pci_get_drvdata(ha->pdev);
4856
4857         set_user_nice(current, -20);
4858
4859         set_current_state(TASK_INTERRUPTIBLE);
4860         while (!kthread_should_stop()) {
4861                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
4862                     "DPC handler sleeping.\n");
4863
4864                 schedule();
4865                 __set_current_state(TASK_RUNNING);
4866
4867                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
4868                         goto end_loop;
4869
4870                 if (ha->flags.eeh_busy) {
4871                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
4872                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
4873                         goto end_loop;
4874                 }
4875
4876                 ha->dpc_active = 1;
4877
4878                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
4879                     "DPC handler waking up, dpc_flags=0x%lx.\n",
4880                     base_vha->dpc_flags);
4881
4882                 qla2x00_do_work(base_vha);
4883
4884                 if (IS_P3P_TYPE(ha)) {
4885                         if (IS_QLA8044(ha)) {
4886                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
4887                                         &base_vha->dpc_flags)) {
4888                                         qla8044_idc_lock(ha);
4889                                         qla8044_wr_direct(base_vha,
4890                                                 QLA8044_CRB_DEV_STATE_INDEX,
4891                                                 QLA8XXX_DEV_FAILED);
4892                                         qla8044_idc_unlock(ha);
4893                                         ql_log(ql_log_info, base_vha, 0x4004,
4894                                                 "HW State: FAILED.\n");
4895                                         qla8044_device_state_handler(base_vha);
4896                                         continue;
4897                                 }
4898
4899                         } else {
4900                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
4901                                         &base_vha->dpc_flags)) {
4902                                         qla82xx_idc_lock(ha);
4903                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
4904                                                 QLA8XXX_DEV_FAILED);
4905                                         qla82xx_idc_unlock(ha);
4906                                         ql_log(ql_log_info, base_vha, 0x0151,
4907                                                 "HW State: FAILED.\n");
4908                                         qla82xx_device_state_handler(base_vha);
4909                                         continue;
4910                                 }
4911                         }
4912
4913                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
4914                                 &base_vha->dpc_flags)) {
4915
4916                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
4917                                     "FCoE context reset scheduled.\n");
4918                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4919                                         &base_vha->dpc_flags))) {
4920                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
4921                                                 /* FCoE-ctx reset failed.
4922                                                  * Escalate to chip-reset
4923                                                  */
4924                                                 set_bit(ISP_ABORT_NEEDED,
4925                                                         &base_vha->dpc_flags);
4926                                         }
4927                                         clear_bit(ABORT_ISP_ACTIVE,
4928                                                 &base_vha->dpc_flags);
4929                                 }
4930
4931                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
4932                                     "FCoE context reset end.\n");
4933                         }
4934                 } else if (IS_QLAFX00(ha)) {
4935                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
4936                                 &base_vha->dpc_flags)) {
4937                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
4938                                     "Firmware Reset Recovery\n");
4939                                 if (qlafx00_reset_initialize(base_vha)) {
4940                                         /* Failed. Abort isp later. */
4941                                         if (!test_bit(UNLOADING,
4942                                             &base_vha->dpc_flags))
4943                                                 set_bit(ISP_UNRECOVERABLE,
4944                                                     &base_vha->dpc_flags);
4945                                                 ql_dbg(ql_dbg_dpc, base_vha,
4946                                                     0x4021,
4947                                                     "Reset Recovery Failed\n");
4948                                 }
4949                         }
4950
4951                         if (test_and_clear_bit(FX00_TARGET_SCAN,
4952                                 &base_vha->dpc_flags)) {
4953                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
4954                                     "ISPFx00 Target Scan scheduled\n");
4955                                 if (qlafx00_rescan_isp(base_vha)) {
4956                                         if (!test_bit(UNLOADING,
4957                                             &base_vha->dpc_flags))
4958                                                 set_bit(ISP_UNRECOVERABLE,
4959                                                     &base_vha->dpc_flags);
4960                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
4961                                             "ISPFx00 Target Scan Failed\n");
4962                                 }
4963                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
4964                                     "ISPFx00 Target Scan End\n");
4965                         }
4966                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
4967                                 &base_vha->dpc_flags)) {
4968                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
4969                                     "ISPFx00 Host Info resend scheduled\n");
4970                                 qlafx00_fx_disc(base_vha,
4971                                     &base_vha->hw->mr.fcport,
4972                                     FXDISC_REG_HOST_INFO);
4973                         }
4974                 }
4975
4976                 if (test_and_clear_bit(ISP_ABORT_NEEDED,
4977                                                 &base_vha->dpc_flags)) {
4978
4979                         ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
4980                             "ISP abort scheduled.\n");
4981                         if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4982                             &base_vha->dpc_flags))) {
4983
4984                                 if (ha->isp_ops->abort_isp(base_vha)) {
4985                                         /* failed. retry later */
4986                                         set_bit(ISP_ABORT_NEEDED,
4987                                             &base_vha->dpc_flags);
4988                                 }
4989                                 clear_bit(ABORT_ISP_ACTIVE,
4990                                                 &base_vha->dpc_flags);
4991                         }
4992
4993                         ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
4994                             "ISP abort end.\n");
4995                 }
4996
4997                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
4998                     &base_vha->dpc_flags)) {
4999                         qla2x00_update_fcports(base_vha);
5000                 }
5001
5002                 if (test_bit(SCR_PENDING, &base_vha->dpc_flags)) {
5003                         int ret;
5004                         ret = qla2x00_send_change_request(base_vha, 0x3, 0);
5005                         if (ret != QLA_SUCCESS)
5006                                 ql_log(ql_log_warn, base_vha, 0x121,
5007                                     "Failed to enable receiving of RSCN "
5008                                     "requests: 0x%x.\n", ret);
5009                         clear_bit(SCR_PENDING, &base_vha->dpc_flags);
5010                 }
5011
5012                 if (IS_QLAFX00(ha))
5013                         goto loop_resync_check;
5014
5015                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
5016                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
5017                             "Quiescence mode scheduled.\n");
5018                         if (IS_P3P_TYPE(ha)) {
5019                                 if (IS_QLA82XX(ha))
5020                                         qla82xx_device_state_handler(base_vha);
5021                                 if (IS_QLA8044(ha))
5022                                         qla8044_device_state_handler(base_vha);
5023                                 clear_bit(ISP_QUIESCE_NEEDED,
5024                                     &base_vha->dpc_flags);
5025                                 if (!ha->flags.quiesce_owner) {
5026                                         qla2x00_perform_loop_resync(base_vha);
5027                                         if (IS_QLA82XX(ha)) {
5028                                                 qla82xx_idc_lock(ha);
5029                                                 qla82xx_clear_qsnt_ready(
5030                                                     base_vha);
5031                                                 qla82xx_idc_unlock(ha);
5032                                         } else if (IS_QLA8044(ha)) {
5033                                                 qla8044_idc_lock(ha);
5034                                                 qla8044_clear_qsnt_ready(
5035                                                     base_vha);
5036                                                 qla8044_idc_unlock(ha);
5037                                         }
5038                                 }
5039                         } else {
5040                                 clear_bit(ISP_QUIESCE_NEEDED,
5041                                     &base_vha->dpc_flags);
5042                                 qla2x00_quiesce_io(base_vha);
5043                         }
5044                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
5045                             "Quiescence mode end.\n");
5046                 }
5047
5048                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
5049                                 &base_vha->dpc_flags) &&
5050                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
5051
5052                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
5053                             "Reset marker scheduled.\n");
5054                         qla2x00_rst_aen(base_vha);
5055                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
5056                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
5057                             "Reset marker end.\n");
5058                 }
5059
5060                 /* Retry each device up to login retry count */
5061                 if ((test_and_clear_bit(RELOGIN_NEEDED,
5062                                                 &base_vha->dpc_flags)) &&
5063                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
5064                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
5065
5066                         ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
5067                             "Relogin scheduled.\n");
5068                         qla2x00_relogin(base_vha);
5069                         ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
5070                             "Relogin end.\n");
5071                 }
5072 loop_resync_check:
5073                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
5074                     &base_vha->dpc_flags)) {
5075
5076                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
5077                             "Loop resync scheduled.\n");
5078
5079                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
5080                             &base_vha->dpc_flags))) {
5081
5082                                 rval = qla2x00_loop_resync(base_vha);
5083
5084                                 clear_bit(LOOP_RESYNC_ACTIVE,
5085                                                 &base_vha->dpc_flags);
5086                         }
5087
5088                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
5089                             "Loop resync end.\n");
5090                 }
5091
5092                 if (IS_QLAFX00(ha))
5093                         goto intr_on_check;
5094
5095                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
5096                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
5097                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
5098                         qla2xxx_flash_npiv_conf(base_vha);
5099                 }
5100
5101 intr_on_check:
5102                 if (!ha->interrupts_on)
5103                         ha->isp_ops->enable_intrs(ha);
5104
5105                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
5106                                         &base_vha->dpc_flags))
5107                         ha->isp_ops->beacon_blink(base_vha);
5108
5109                 if (!IS_QLAFX00(ha))
5110                         qla2x00_do_dpc_all_vps(base_vha);
5111
5112                 ha->dpc_active = 0;
5113 end_loop:
5114                 set_current_state(TASK_INTERRUPTIBLE);
5115         } /* End of while(1) */
5116         __set_current_state(TASK_RUNNING);
5117
5118         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
5119             "DPC handler exiting.\n");
5120
5121         /*
5122          * Make sure that nobody tries to wake us up again.
5123          */
5124         ha->dpc_active = 0;
5125
5126         /* Cleanup any residual CTX SRBs. */
5127         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5128
5129         return 0;
5130 }
5131
5132 void
5133 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
5134 {
5135         struct qla_hw_data *ha = vha->hw;
5136         struct task_struct *t = ha->dpc_thread;
5137
5138         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
5139                 wake_up_process(t);
5140 }
5141
5142 /*
5143 *  qla2x00_rst_aen
5144 *      Processes asynchronous reset.
5145 *
5146 * Input:
5147 *      ha  = adapter block pointer.
5148 */
5149 static void
5150 qla2x00_rst_aen(scsi_qla_host_t *vha)
5151 {
5152         if (vha->flags.online && !vha->flags.reset_active &&
5153             !atomic_read(&vha->loop_down_timer) &&
5154             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
5155                 do {
5156                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5157
5158                         /*
5159                          * Issue marker command only when we are going to start
5160                          * the I/O.
5161                          */
5162                         vha->marker_needed = 1;
5163                 } while (!atomic_read(&vha->loop_down_timer) &&
5164                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
5165         }
5166 }
5167
5168 /**************************************************************************
5169 *   qla2x00_timer
5170 *
5171 * Description:
5172 *   One second timer
5173 *
5174 * Context: Interrupt
5175 ***************************************************************************/
5176 void
5177 qla2x00_timer(scsi_qla_host_t *vha)
5178 {
5179         unsigned long   cpu_flags = 0;
5180         int             start_dpc = 0;
5181         int             index;
5182         srb_t           *sp;
5183         uint16_t        w;
5184         struct qla_hw_data *ha = vha->hw;
5185         struct req_que *req;
5186
5187         if (ha->flags.eeh_busy) {
5188                 ql_dbg(ql_dbg_timer, vha, 0x6000,
5189                     "EEH = %d, restarting timer.\n",
5190                     ha->flags.eeh_busy);
5191                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
5192                 return;
5193         }
5194
5195         /*
5196          * Hardware read to raise pending EEH errors during mailbox waits. If
5197          * the read returns -1 then disable the board.
5198          */
5199         if (!pci_channel_offline(ha->pdev)) {
5200                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
5201                 if (w == 0xffff)
5202                         /*
5203                          * Schedule this on the default system workqueue so that
5204                          * all the adapter workqueues and the DPC thread can be
5205                          * shutdown cleanly.
5206                          */
5207                         schedule_work(&ha->board_disable);
5208         }
5209
5210         /* Make sure qla82xx_watchdog is run only for physical port */
5211         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
5212                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
5213                         start_dpc++;
5214                 if (IS_QLA82XX(ha))
5215                         qla82xx_watchdog(vha);
5216                 else if (IS_QLA8044(ha))
5217                         qla8044_watchdog(vha);
5218         }
5219
5220         if (!vha->vp_idx && IS_QLAFX00(ha))
5221                 qlafx00_timer_routine(vha);
5222
5223         /* Loop down handler. */
5224         if (atomic_read(&vha->loop_down_timer) > 0 &&
5225             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
5226             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
5227                 && vha->flags.online) {
5228
5229                 if (atomic_read(&vha->loop_down_timer) ==
5230                     vha->loop_down_abort_time) {
5231
5232                         ql_log(ql_log_info, vha, 0x6008,
5233                             "Loop down - aborting the queues before time expires.\n");
5234
5235                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
5236                                 atomic_set(&vha->loop_state, LOOP_DEAD);
5237
5238                         /*
5239                          * Schedule an ISP abort to return any FCP2-device
5240                          * commands.
5241                          */
5242                         /* NPIV - scan physical port only */
5243                         if (!vha->vp_idx) {
5244                                 spin_lock_irqsave(&ha->hardware_lock,
5245                                     cpu_flags);
5246                                 req = ha->req_q_map[0];
5247                                 for (index = 1;
5248                                     index < req->num_outstanding_cmds;
5249                                     index++) {
5250                                         fc_port_t *sfcp;
5251
5252                                         sp = req->outstanding_cmds[index];
5253                                         if (!sp)
5254                                                 continue;
5255                                         if (sp->type != SRB_SCSI_CMD)
5256                                                 continue;
5257                                         sfcp = sp->fcport;
5258                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
5259                                                 continue;
5260
5261                                         if (IS_QLA82XX(ha))
5262                                                 set_bit(FCOE_CTX_RESET_NEEDED,
5263                                                         &vha->dpc_flags);
5264                                         else
5265                                                 set_bit(ISP_ABORT_NEEDED,
5266                                                         &vha->dpc_flags);
5267                                         break;
5268                                 }
5269                                 spin_unlock_irqrestore(&ha->hardware_lock,
5270                                                                 cpu_flags);
5271                         }
5272                         start_dpc++;
5273                 }
5274
5275                 /* if the loop has been down for 4 minutes, reinit adapter */
5276                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
5277                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
5278                                 ql_log(ql_log_warn, vha, 0x6009,
5279                                     "Loop down - aborting ISP.\n");
5280
5281                                 if (IS_QLA82XX(ha))
5282                                         set_bit(FCOE_CTX_RESET_NEEDED,
5283                                                 &vha->dpc_flags);
5284                                 else
5285                                         set_bit(ISP_ABORT_NEEDED,
5286                                                 &vha->dpc_flags);
5287                         }
5288                 }
5289                 ql_dbg(ql_dbg_timer, vha, 0x600a,
5290                     "Loop down - seconds remaining %d.\n",
5291                     atomic_read(&vha->loop_down_timer));
5292         }
5293         /* Check if beacon LED needs to be blinked for physical host only */
5294         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
5295                 /* There is no beacon_blink function for ISP82xx */
5296                 if (!IS_P3P_TYPE(ha)) {
5297                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
5298                         start_dpc++;
5299                 }
5300         }
5301
5302         /* Process any deferred work. */
5303         if (!list_empty(&vha->work_list))
5304                 start_dpc++;
5305
5306         /* Schedule the DPC routine if needed */
5307         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
5308             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
5309             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
5310             start_dpc ||
5311             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
5312             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
5313             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
5314             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
5315             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
5316             test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
5317                 ql_dbg(ql_dbg_timer, vha, 0x600b,
5318                     "isp_abort_needed=%d loop_resync_needed=%d "
5319                     "fcport_update_needed=%d start_dpc=%d "
5320                     "reset_marker_needed=%d",
5321                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
5322                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
5323                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
5324                     start_dpc,
5325                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
5326                 ql_dbg(ql_dbg_timer, vha, 0x600c,
5327                     "beacon_blink_needed=%d isp_unrecoverable=%d "
5328                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
5329                     "relogin_needed=%d.\n",
5330                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
5331                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
5332                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
5333                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
5334                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
5335                 qla2xxx_wake_dpc(vha);
5336         }
5337
5338         qla2x00_restart_timer(vha, WATCH_INTERVAL);
5339 }
5340
5341 /* Firmware interface routines. */
5342
5343 #define FW_BLOBS        11
5344 #define FW_ISP21XX      0
5345 #define FW_ISP22XX      1
5346 #define FW_ISP2300      2
5347 #define FW_ISP2322      3
5348 #define FW_ISP24XX      4
5349 #define FW_ISP25XX      5
5350 #define FW_ISP81XX      6
5351 #define FW_ISP82XX      7
5352 #define FW_ISP2031      8
5353 #define FW_ISP8031      9
5354 #define FW_ISP27XX      10
5355
5356 #define FW_FILE_ISP21XX "ql2100_fw.bin"
5357 #define FW_FILE_ISP22XX "ql2200_fw.bin"
5358 #define FW_FILE_ISP2300 "ql2300_fw.bin"
5359 #define FW_FILE_ISP2322 "ql2322_fw.bin"
5360 #define FW_FILE_ISP24XX "ql2400_fw.bin"
5361 #define FW_FILE_ISP25XX "ql2500_fw.bin"
5362 #define FW_FILE_ISP81XX "ql8100_fw.bin"
5363 #define FW_FILE_ISP82XX "ql8200_fw.bin"
5364 #define FW_FILE_ISP2031 "ql2600_fw.bin"
5365 #define FW_FILE_ISP8031 "ql8300_fw.bin"
5366 #define FW_FILE_ISP27XX "ql2700_fw.bin"
5367
5368
5369 static DEFINE_MUTEX(qla_fw_lock);
5370
5371 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
5372         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
5373         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
5374         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
5375         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
5376         { .name = FW_FILE_ISP24XX, },
5377         { .name = FW_FILE_ISP25XX, },
5378         { .name = FW_FILE_ISP81XX, },
5379         { .name = FW_FILE_ISP82XX, },
5380         { .name = FW_FILE_ISP2031, },
5381         { .name = FW_FILE_ISP8031, },
5382         { .name = FW_FILE_ISP27XX, },
5383 };
5384
5385 struct fw_blob *
5386 qla2x00_request_firmware(scsi_qla_host_t *vha)
5387 {
5388         struct qla_hw_data *ha = vha->hw;
5389         struct fw_blob *blob;
5390
5391         if (IS_QLA2100(ha)) {
5392                 blob = &qla_fw_blobs[FW_ISP21XX];
5393         } else if (IS_QLA2200(ha)) {
5394                 blob = &qla_fw_blobs[FW_ISP22XX];
5395         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
5396                 blob = &qla_fw_blobs[FW_ISP2300];
5397         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
5398                 blob = &qla_fw_blobs[FW_ISP2322];
5399         } else if (IS_QLA24XX_TYPE(ha)) {
5400                 blob = &qla_fw_blobs[FW_ISP24XX];
5401         } else if (IS_QLA25XX(ha)) {
5402                 blob = &qla_fw_blobs[FW_ISP25XX];
5403         } else if (IS_QLA81XX(ha)) {
5404                 blob = &qla_fw_blobs[FW_ISP81XX];
5405         } else if (IS_QLA82XX(ha)) {
5406                 blob = &qla_fw_blobs[FW_ISP82XX];
5407         } else if (IS_QLA2031(ha)) {
5408                 blob = &qla_fw_blobs[FW_ISP2031];
5409         } else if (IS_QLA8031(ha)) {
5410                 blob = &qla_fw_blobs[FW_ISP8031];
5411         } else if (IS_QLA27XX(ha)) {
5412                 blob = &qla_fw_blobs[FW_ISP27XX];
5413         } else {
5414                 return NULL;
5415         }
5416
5417         mutex_lock(&qla_fw_lock);
5418         if (blob->fw)
5419                 goto out;
5420
5421         if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
5422                 ql_log(ql_log_warn, vha, 0x0063,
5423                     "Failed to load firmware image (%s).\n", blob->name);
5424                 blob->fw = NULL;
5425                 blob = NULL;
5426                 goto out;
5427         }
5428
5429 out:
5430         mutex_unlock(&qla_fw_lock);
5431         return blob;
5432 }
5433
5434 static void
5435 qla2x00_release_firmware(void)
5436 {
5437         int idx;
5438
5439         mutex_lock(&qla_fw_lock);
5440         for (idx = 0; idx < FW_BLOBS; idx++)
5441                 release_firmware(qla_fw_blobs[idx].fw);
5442         mutex_unlock(&qla_fw_lock);
5443 }
5444
5445 static pci_ers_result_t
5446 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5447 {
5448         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
5449         struct qla_hw_data *ha = vha->hw;
5450
5451         ql_dbg(ql_dbg_aer, vha, 0x9000,
5452             "PCI error detected, state %x.\n", state);
5453
5454         switch (state) {
5455         case pci_channel_io_normal:
5456                 ha->flags.eeh_busy = 0;
5457                 return PCI_ERS_RESULT_CAN_RECOVER;
5458         case pci_channel_io_frozen:
5459                 ha->flags.eeh_busy = 1;
5460                 /* For ISP82XX complete any pending mailbox cmd */
5461                 if (IS_QLA82XX(ha)) {
5462                         ha->flags.isp82xx_fw_hung = 1;
5463                         ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
5464                         qla82xx_clear_pending_mbx(vha);
5465                 }
5466                 qla2x00_free_irqs(vha);
5467                 pci_disable_device(pdev);
5468                 /* Return back all IOs */
5469                 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
5470                 return PCI_ERS_RESULT_NEED_RESET;
5471         case pci_channel_io_perm_failure:
5472                 ha->flags.pci_channel_io_perm_failure = 1;
5473                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
5474                 return PCI_ERS_RESULT_DISCONNECT;
5475         }
5476         return PCI_ERS_RESULT_NEED_RESET;
5477 }
5478
5479 static pci_ers_result_t
5480 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
5481 {
5482         int risc_paused = 0;
5483         uint32_t stat;
5484         unsigned long flags;
5485         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5486         struct qla_hw_data *ha = base_vha->hw;
5487         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
5488         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
5489
5490         if (IS_QLA82XX(ha))
5491                 return PCI_ERS_RESULT_RECOVERED;
5492
5493         spin_lock_irqsave(&ha->hardware_lock, flags);
5494         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
5495                 stat = RD_REG_DWORD(&reg->hccr);
5496                 if (stat & HCCR_RISC_PAUSE)
5497                         risc_paused = 1;
5498         } else if (IS_QLA23XX(ha)) {
5499                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
5500                 if (stat & HSR_RISC_PAUSED)
5501                         risc_paused = 1;
5502         } else if (IS_FWI2_CAPABLE(ha)) {
5503                 stat = RD_REG_DWORD(&reg24->host_status);
5504                 if (stat & HSRX_RISC_PAUSED)
5505                         risc_paused = 1;
5506         }
5507         spin_unlock_irqrestore(&ha->hardware_lock, flags);
5508
5509         if (risc_paused) {
5510                 ql_log(ql_log_info, base_vha, 0x9003,
5511                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
5512                 ha->isp_ops->fw_dump(base_vha, 0);
5513
5514                 return PCI_ERS_RESULT_NEED_RESET;
5515         } else
5516                 return PCI_ERS_RESULT_RECOVERED;
5517 }
5518
5519 static uint32_t
5520 qla82xx_error_recovery(scsi_qla_host_t *base_vha)
5521 {
5522         uint32_t rval = QLA_FUNCTION_FAILED;
5523         uint32_t drv_active = 0;
5524         struct qla_hw_data *ha = base_vha->hw;
5525         int fn;
5526         struct pci_dev *other_pdev = NULL;
5527
5528         ql_dbg(ql_dbg_aer, base_vha, 0x9006,
5529             "Entered %s.\n", __func__);
5530
5531         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5532
5533         if (base_vha->flags.online) {
5534                 /* Abort all outstanding commands,
5535                  * so as to be requeued later */
5536                 qla2x00_abort_isp_cleanup(base_vha);
5537         }
5538
5539
5540         fn = PCI_FUNC(ha->pdev->devfn);
5541         while (fn > 0) {
5542                 fn--;
5543                 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
5544                     "Finding pci device at function = 0x%x.\n", fn);
5545                 other_pdev =
5546                     pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
5547                     ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
5548                     fn));
5549
5550                 if (!other_pdev)
5551                         continue;
5552                 if (atomic_read(&other_pdev->enable_cnt)) {
5553                         ql_dbg(ql_dbg_aer, base_vha, 0x9008,
5554                             "Found PCI func available and enable at 0x%x.\n",
5555                             fn);
5556                         pci_dev_put(other_pdev);
5557                         break;
5558                 }
5559                 pci_dev_put(other_pdev);
5560         }
5561
5562         if (!fn) {
5563                 /* Reset owner */
5564                 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
5565                     "This devfn is reset owner = 0x%x.\n",
5566                     ha->pdev->devfn);
5567                 qla82xx_idc_lock(ha);
5568
5569                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5570                     QLA8XXX_DEV_INITIALIZING);
5571
5572                 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
5573                     QLA82XX_IDC_VERSION);
5574
5575                 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
5576                 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
5577                     "drv_active = 0x%x.\n", drv_active);
5578
5579                 qla82xx_idc_unlock(ha);
5580                 /* Reset if device is not already reset
5581                  * drv_active would be 0 if a reset has already been done
5582                  */
5583                 if (drv_active)
5584                         rval = qla82xx_start_firmware(base_vha);
5585                 else
5586                         rval = QLA_SUCCESS;
5587                 qla82xx_idc_lock(ha);
5588
5589                 if (rval != QLA_SUCCESS) {
5590                         ql_log(ql_log_info, base_vha, 0x900b,
5591                             "HW State: FAILED.\n");
5592                         qla82xx_clear_drv_active(ha);
5593                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5594                             QLA8XXX_DEV_FAILED);
5595                 } else {
5596                         ql_log(ql_log_info, base_vha, 0x900c,
5597                             "HW State: READY.\n");
5598                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5599                             QLA8XXX_DEV_READY);
5600                         qla82xx_idc_unlock(ha);
5601                         ha->flags.isp82xx_fw_hung = 0;
5602                         rval = qla82xx_restart_isp(base_vha);
5603                         qla82xx_idc_lock(ha);
5604                         /* Clear driver state register */
5605                         qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
5606                         qla82xx_set_drv_active(base_vha);
5607                 }
5608                 qla82xx_idc_unlock(ha);
5609         } else {
5610                 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
5611                     "This devfn is not reset owner = 0x%x.\n",
5612                     ha->pdev->devfn);
5613                 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
5614                     QLA8XXX_DEV_READY)) {
5615                         ha->flags.isp82xx_fw_hung = 0;
5616                         rval = qla82xx_restart_isp(base_vha);
5617                         qla82xx_idc_lock(ha);
5618                         qla82xx_set_drv_active(base_vha);
5619                         qla82xx_idc_unlock(ha);
5620                 }
5621         }
5622         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5623
5624         return rval;
5625 }
5626
5627 static pci_ers_result_t
5628 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
5629 {
5630         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
5631         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5632         struct qla_hw_data *ha = base_vha->hw;
5633         struct rsp_que *rsp;
5634         int rc, retries = 10;
5635
5636         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
5637             "Slot Reset.\n");
5638
5639         /* Workaround: qla2xxx driver which access hardware earlier
5640          * needs error state to be pci_channel_io_online.
5641          * Otherwise mailbox command timesout.
5642          */
5643         pdev->error_state = pci_channel_io_normal;
5644
5645         pci_restore_state(pdev);
5646
5647         /* pci_restore_state() clears the saved_state flag of the device
5648          * save restored state which resets saved_state flag
5649          */
5650         pci_save_state(pdev);
5651
5652         if (ha->mem_only)
5653                 rc = pci_enable_device_mem(pdev);
5654         else
5655                 rc = pci_enable_device(pdev);
5656
5657         if (rc) {
5658                 ql_log(ql_log_warn, base_vha, 0x9005,
5659                     "Can't re-enable PCI device after reset.\n");
5660                 goto exit_slot_reset;
5661         }
5662
5663         rsp = ha->rsp_q_map[0];
5664         if (qla2x00_request_irqs(ha, rsp))
5665                 goto exit_slot_reset;
5666
5667         if (ha->isp_ops->pci_config(base_vha))
5668                 goto exit_slot_reset;
5669
5670         if (IS_QLA82XX(ha)) {
5671                 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
5672                         ret = PCI_ERS_RESULT_RECOVERED;
5673                         goto exit_slot_reset;
5674                 } else
5675                         goto exit_slot_reset;
5676         }
5677
5678         while (ha->flags.mbox_busy && retries--)
5679                 msleep(1000);
5680
5681         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5682         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
5683                 ret =  PCI_ERS_RESULT_RECOVERED;
5684         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5685
5686
5687 exit_slot_reset:
5688         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
5689             "slot_reset return %x.\n", ret);
5690
5691         return ret;
5692 }
5693
5694 static void
5695 qla2xxx_pci_resume(struct pci_dev *pdev)
5696 {
5697         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5698         struct qla_hw_data *ha = base_vha->hw;
5699         int ret;
5700
5701         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
5702             "pci_resume.\n");
5703
5704         ret = qla2x00_wait_for_hba_online(base_vha);
5705         if (ret != QLA_SUCCESS) {
5706                 ql_log(ql_log_fatal, base_vha, 0x9002,
5707                     "The device failed to resume I/O from slot/link_reset.\n");
5708         }
5709
5710         pci_cleanup_aer_uncorrect_error_status(pdev);
5711
5712         ha->flags.eeh_busy = 0;
5713 }
5714
5715 static const struct pci_error_handlers qla2xxx_err_handler = {
5716         .error_detected = qla2xxx_pci_error_detected,
5717         .mmio_enabled = qla2xxx_pci_mmio_enabled,
5718         .slot_reset = qla2xxx_pci_slot_reset,
5719         .resume = qla2xxx_pci_resume,
5720 };
5721
5722 static struct pci_device_id qla2xxx_pci_tbl[] = {
5723         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
5724         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
5725         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
5726         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
5727         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
5728         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
5729         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
5730         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
5731         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
5732         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
5733         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
5734         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
5735         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
5736         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
5737         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
5738         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
5739         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
5740         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
5741         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
5742         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
5743         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
5744         { 0 },
5745 };
5746 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
5747
5748 static struct pci_driver qla2xxx_pci_driver = {
5749         .name           = QLA2XXX_DRIVER_NAME,
5750         .driver         = {
5751                 .owner          = THIS_MODULE,
5752         },
5753         .id_table       = qla2xxx_pci_tbl,
5754         .probe          = qla2x00_probe_one,
5755         .remove         = qla2x00_remove_one,
5756         .shutdown       = qla2x00_shutdown,
5757         .err_handler    = &qla2xxx_err_handler,
5758 };
5759
5760 static const struct file_operations apidev_fops = {
5761         .owner = THIS_MODULE,
5762         .llseek = noop_llseek,
5763 };
5764
5765 /**
5766  * qla2x00_module_init - Module initialization.
5767  **/
5768 static int __init
5769 qla2x00_module_init(void)
5770 {
5771         int ret = 0;
5772
5773         /* Allocate cache for SRBs. */
5774         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
5775             SLAB_HWCACHE_ALIGN, NULL);
5776         if (srb_cachep == NULL) {
5777                 ql_log(ql_log_fatal, NULL, 0x0001,
5778                     "Unable to allocate SRB cache...Failing load!.\n");
5779                 return -ENOMEM;
5780         }
5781
5782         /* Initialize target kmem_cache and mem_pools */
5783         ret = qlt_init();
5784         if (ret < 0) {
5785                 kmem_cache_destroy(srb_cachep);
5786                 return ret;
5787         } else if (ret > 0) {
5788                 /*
5789                  * If initiator mode is explictly disabled by qlt_init(),
5790                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
5791                  * performing scsi_scan_target() during LOOP UP event.
5792                  */
5793                 qla2xxx_transport_functions.disable_target_scan = 1;
5794                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
5795         }
5796
5797         /* Derive version string. */
5798         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
5799         if (ql2xextended_error_logging)
5800                 strcat(qla2x00_version_str, "-debug");
5801
5802         qla2xxx_transport_template =
5803             fc_attach_transport(&qla2xxx_transport_functions);
5804         if (!qla2xxx_transport_template) {
5805                 kmem_cache_destroy(srb_cachep);
5806                 ql_log(ql_log_fatal, NULL, 0x0002,
5807                     "fc_attach_transport failed...Failing load!.\n");
5808                 qlt_exit();
5809                 return -ENODEV;
5810         }
5811
5812         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
5813         if (apidev_major < 0) {
5814                 ql_log(ql_log_fatal, NULL, 0x0003,
5815                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
5816         }
5817
5818         qla2xxx_transport_vport_template =
5819             fc_attach_transport(&qla2xxx_transport_vport_functions);
5820         if (!qla2xxx_transport_vport_template) {
5821                 kmem_cache_destroy(srb_cachep);
5822                 qlt_exit();
5823                 fc_release_transport(qla2xxx_transport_template);
5824                 ql_log(ql_log_fatal, NULL, 0x0004,
5825                     "fc_attach_transport vport failed...Failing load!.\n");
5826                 return -ENODEV;
5827         }
5828         ql_log(ql_log_info, NULL, 0x0005,
5829             "QLogic Fibre Channel HBA Driver: %s.\n",
5830             qla2x00_version_str);
5831         ret = pci_register_driver(&qla2xxx_pci_driver);
5832         if (ret) {
5833                 kmem_cache_destroy(srb_cachep);
5834                 qlt_exit();
5835                 fc_release_transport(qla2xxx_transport_template);
5836                 fc_release_transport(qla2xxx_transport_vport_template);
5837                 ql_log(ql_log_fatal, NULL, 0x0006,
5838                     "pci_register_driver failed...ret=%d Failing load!.\n",
5839                     ret);
5840         }
5841         return ret;
5842 }
5843
5844 /**
5845  * qla2x00_module_exit - Module cleanup.
5846  **/
5847 static void __exit
5848 qla2x00_module_exit(void)
5849 {
5850         unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
5851         pci_unregister_driver(&qla2xxx_pci_driver);
5852         qla2x00_release_firmware();
5853         kmem_cache_destroy(srb_cachep);
5854         qlt_exit();
5855         if (ctx_cachep)
5856                 kmem_cache_destroy(ctx_cachep);
5857         fc_release_transport(qla2xxx_transport_template);
5858         fc_release_transport(qla2xxx_transport_vport_template);
5859 }
5860
5861 module_init(qla2x00_module_init);
5862 module_exit(qla2x00_module_exit);
5863
5864 MODULE_AUTHOR("QLogic Corporation");
5865 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
5866 MODULE_LICENSE("GPL");
5867 MODULE_VERSION(QLA2XXX_VERSION);
5868 MODULE_FIRMWARE(FW_FILE_ISP21XX);
5869 MODULE_FIRMWARE(FW_FILE_ISP22XX);
5870 MODULE_FIRMWARE(FW_FILE_ISP2300);
5871 MODULE_FIRMWARE(FW_FILE_ISP2322);
5872 MODULE_FIRMWARE(FW_FILE_ISP24XX);
5873 MODULE_FIRMWARE(FW_FILE_ISP25XX);