2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2014 QLogic Corporation
5 * See LICENSE.qla2xxx for copyright and licensing details.
8 #ifndef __QLA_DMP27_H__
9 #define __QLA_DMP27_H__
11 #define IOBASE_ADDR offsetof(struct device_reg_24xx, iobase_addr)
13 struct __packed qla27xx_fwdt_template {
14 uint32_t template_type;
15 uint32_t entry_offset;
16 uint32_t template_size;
20 uint32_t template_version;
21 uint32_t capture_timestamp;
22 uint32_t template_checksum;
25 uint32_t driver_info[3];
27 uint32_t saved_state[16];
29 uint32_t reserved_3[8];
30 uint32_t firmware_version[5];
33 #define TEMPLATE_TYPE_FWDUMP 99
35 #define ENTRY_TYPE_NOP 0
36 #define ENTRY_TYPE_TMP_END 255
37 #define ENTRY_TYPE_RD_IOB_T1 256
38 #define ENTRY_TYPE_WR_IOB_T1 257
39 #define ENTRY_TYPE_RD_IOB_T2 258
40 #define ENTRY_TYPE_WR_IOB_T2 259
41 #define ENTRY_TYPE_RD_PCI 260
42 #define ENTRY_TYPE_WR_PCI 261
43 #define ENTRY_TYPE_RD_RAM 262
44 #define ENTRY_TYPE_GET_QUEUE 263
45 #define ENTRY_TYPE_GET_FCE 264
46 #define ENTRY_TYPE_PSE_RISC 265
47 #define ENTRY_TYPE_RST_RISC 266
48 #define ENTRY_TYPE_DIS_INTR 267
49 #define ENTRY_TYPE_GET_HBUF 268
50 #define ENTRY_TYPE_SCRATCH 269
51 #define ENTRY_TYPE_RDREMREG 270
52 #define ENTRY_TYPE_WRREMREG 271
53 #define ENTRY_TYPE_RDREMRAM 272
54 #define ENTRY_TYPE_PCICFG 273
55 #define ENTRY_TYPE_GET_SHADOW 274
56 #define ENTRY_TYPE_WRITE_BUF 275
58 #define CAPTURE_FLAG_PHYS_ONLY BIT_0
59 #define CAPTURE_FLAG_PHYS_VIRT BIT_1
61 #define DRIVER_FLAG_SKIP_ENTRY BIT_7
63 struct __packed qla27xx_fwdt_entry {
69 uint8_t capture_flags;
70 uint8_t reserved_2[2];
99 uint8_t banksel_offset;
109 uint8_t banksel_offset;
138 uint32_t fce_trace_size;
139 uint64_t write_pointer;
140 uint64_t base_pointer;
141 uint32_t fce_enable_mb0;
142 uint32_t fce_enable_mb2;
143 uint32_t fce_enable_mb3;
144 uint32_t fce_enable_mb4;
145 uint32_t fce_enable_mb5;
146 uint32_t fce_enable_mb6;
169 uint32_t scratch_size;
205 #define T262_RAM_AREA_CRITICAL_RAM 1
206 #define T262_RAM_AREA_EXTERNAL_RAM 2
207 #define T262_RAM_AREA_SHARED_RAM 3
208 #define T262_RAM_AREA_DDR_RAM 4
210 #define T263_QUEUE_TYPE_REQ 1
211 #define T263_QUEUE_TYPE_RSP 2
212 #define T263_QUEUE_TYPE_ATIO 3
214 #define T268_BUF_TYPE_EXTD_TRACE 1
215 #define T268_BUF_TYPE_EXCH_BUFOFF 2
216 #define T268_BUF_TYPE_EXTD_LOGIN 3
217 #define T268_BUF_TYPE_REQ_MIRROR 4
218 #define T268_BUF_TYPE_RSP_MIRROR 5
220 #define T274_QUEUE_TYPE_REQ_SHAD 1
221 #define T274_QUEUE_TYPE_RSP_SHAD 2
222 #define T274_QUEUE_TYPE_ATIO_SHAD 3