2 * QLogic iSCSI HBA Driver
3 * Copyright (c) 2003-2006 QLogic Corporation
5 * See LICENSE.qla4xxx for copyright and licensing details.
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/types.h>
14 #include <linux/module.h>
15 #include <linux/list.h>
16 #include <linux/pci.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/sched.h>
19 #include <linux/slab.h>
20 #include <linux/dmapool.h>
21 #include <linux/mempool.h>
22 #include <linux/spinlock.h>
23 #include <linux/workqueue.h>
24 #include <linux/delay.h>
25 #include <linux/interrupt.h>
26 #include <linux/mutex.h>
29 #include <scsi/scsi.h>
30 #include <scsi/scsi_host.h>
31 #include <scsi/scsi_device.h>
32 #include <scsi/scsi_cmnd.h>
33 #include <scsi/scsi_transport.h>
34 #include <scsi/scsi_transport_iscsi.h>
39 #ifndef PCI_DEVICE_ID_QLOGIC_ISP4010
40 #define PCI_DEVICE_ID_QLOGIC_ISP4010 0x4010
43 #ifndef PCI_DEVICE_ID_QLOGIC_ISP4022
44 #define PCI_DEVICE_ID_QLOGIC_ISP4022 0x4022
47 #ifndef PCI_DEVICE_ID_QLOGIC_ISP4032
48 #define PCI_DEVICE_ID_QLOGIC_ISP4032 0x4032
51 #ifndef PCI_DEVICE_ID_QLOGIC_ISP8022
52 #define PCI_DEVICE_ID_QLOGIC_ISP8022 0x8022
59 * Data bit definitions
77 #define BIT_16 0x10000
78 #define BIT_17 0x20000
79 #define BIT_18 0x40000
80 #define BIT_19 0x80000
81 #define BIT_20 0x100000
82 #define BIT_21 0x200000
83 #define BIT_22 0x400000
84 #define BIT_23 0x800000
85 #define BIT_24 0x1000000
86 #define BIT_25 0x2000000
87 #define BIT_26 0x4000000
88 #define BIT_27 0x8000000
89 #define BIT_28 0x10000000
90 #define BIT_29 0x20000000
91 #define BIT_30 0x40000000
92 #define BIT_31 0x80000000
95 * Macros to help code, maintain, etc.
97 #define ql4_printk(level, ha, format, arg...) \
98 dev_printk(level , &((ha)->pdev->dev) , format , ## arg)
102 * Host adapter default definitions
103 ***********************************/
106 #define MAX_TARGETS MAX_DEV_DB_ENTRIES
107 #define MAX_LUNS 0xffff
108 #define MAX_AEN_ENTRIES 256 /* should be > EXT_DEF_MAX_AEN_QUEUE */
109 #define MAX_DDB_ENTRIES MAX_DEV_DB_ENTRIES
110 #define MAX_PDU_ENTRIES 32
111 #define INVALID_ENTRY 0xFFFF
112 #define MAX_CMDS_TO_RISC 1024
113 #define MAX_SRBS MAX_CMDS_TO_RISC
114 #define MBOX_AEN_REG_COUNT 5
115 #define MAX_INIT_RETRIES 5
120 #define REQUEST_QUEUE_DEPTH MAX_CMDS_TO_RISC
121 #define RESPONSE_QUEUE_DEPTH 64
122 #define QUEUE_SIZE 64
123 #define DMA_BUFFER_SIZE 512
128 #define MAC_ADDR_LEN 6 /* in bytes */
129 #define IP_ADDR_LEN 4 /* in bytes */
130 #define IPv6_ADDR_LEN 16 /* IPv6 address size */
131 #define DRIVER_NAME "qla4xxx"
133 #define MAX_LINKED_CMDS_PER_LUN 3
134 #define MAX_REQS_SERVICED_PER_INTR 1
136 #define ISCSI_IPADDR_SIZE 4 /* IP address size */
137 #define ISCSI_ALIAS_SIZE 32 /* ISCSI Alias name size */
138 #define ISCSI_NAME_SIZE 0xE0 /* ISCSI Name size */
140 #define QL4_SESS_RECOVERY_TMO 30 /* iSCSI session */
141 /* recovery timeout */
143 #define LSDW(x) ((u32)((u64)(x)))
144 #define MSDW(x) ((u32)((((u64)(x)) >> 16) >> 16))
147 * Retry & Timeout Values
150 #define SOFT_RESET_TOV 30
151 #define RESET_INTR_TOV 3
152 #define SEMAPHORE_TOV 10
153 #define ADAPTER_INIT_TOV 30
154 #define ADAPTER_RESET_TOV 180
155 #define EXTEND_CMD_TOV 60
156 #define WAIT_CMD_TOV 30
157 #define EH_WAIT_CMD_TOV 120
158 #define FIRMWARE_UP_TOV 60
159 #define RESET_FIRMWARE_TOV 30
160 #define LOGOUT_TOV 10
161 #define IOCB_TOV_MARGIN 10
162 #define RELOGIN_TOV 18
163 #define ISNS_DEREG_TOV 5
165 #define MAX_RESET_HA_RETRIES 2
167 #define CMD_SP(Cmnd) ((Cmnd)->SCp.ptr)
170 * SCSI Request Block structure (srb) that is placed
171 * on cmd->SCp location of every I/O [We have 22 bytes available]
174 struct list_head list; /* (8) */
175 struct scsi_qla_host *ha; /* HA the SP is queued on */
176 struct ddb_entry *ddb;
177 uint16_t flags; /* (1) Status flags. */
179 #define SRB_DMA_VALID BIT_3 /* DMA Buffer mapped. */
180 #define SRB_GOT_SENSE BIT_4 /* sense data recieved. */
181 uint8_t state; /* (1) Status flags. */
183 #define SRB_NO_QUEUE_STATE 0 /* Request is in between states */
184 #define SRB_FREE_STATE 1
185 #define SRB_ACTIVE_STATE 3
186 #define SRB_ACTIVE_TIMEOUT_STATE 4
187 #define SRB_SUSPENDED_STATE 7 /* Request in suspended state */
189 struct scsi_cmnd *cmd; /* (4) SCSI command block */
190 dma_addr_t dma_handle; /* (4) for unmap of single transfers */
191 struct kref srb_ref; /* reference count for this srb */
192 uint32_t fw_ddb_index;
193 uint8_t err_id; /* error id */
194 #define SRB_ERR_PORT 1 /* Request failed because "port down" */
195 #define SRB_ERR_LOOP 2 /* Request failed because "loop down" */
196 #define SRB_ERR_DEVICE 3 /* Request failed because "device error" */
197 #define SRB_ERR_OTHER 4
201 uint16_t iocb_cnt; /* Number of used iocbs */
204 /* Used for extended sense / status continuation */
205 uint8_t *req_sense_ptr;
206 uint16_t req_sense_len;
211 * Asynchronous Event Queue structure
214 uint32_t mbox_sts[MBOX_AEN_REG_COUNT];
219 struct aen entry[MAX_AEN_ENTRIES];
223 * Device Database (DDB) structure
226 struct list_head list; /* ddb list */
227 struct scsi_qla_host *ha;
228 struct iscsi_cls_session *sess;
229 struct iscsi_cls_conn *conn;
231 atomic_t state; /* DDB State */
233 unsigned long flags; /* DDB Flags */
235 unsigned long dev_scan_wait_to_start_relogin;
236 unsigned long dev_scan_wait_to_complete_relogin;
238 uint16_t fw_ddb_index; /* DDB firmware index */
240 uint32_t fw_ddb_device_state; /* F/W Device State -- see ql4_fw.h */
243 uint16_t target_session_id;
244 uint16_t connection_id;
245 uint16_t exe_throttle; /* Max mumber of cmds outstanding
247 uint16_t task_mgmt_timeout; /* Min time for task mgmt cmds to
249 uint16_t default_relogin_timeout; /* Max time to wait for
250 * relogin to complete */
251 uint16_t tcp_source_port_num;
252 uint32_t default_time2wait; /* Default Min time between
253 * relogins (+aens) */
255 atomic_t retry_relogin_timer; /* Min Time between relogins
257 atomic_t relogin_timer; /* Max Time to wait for relogin to complete */
258 atomic_t relogin_retry_count; /* Num of times relogin has been
263 uint8_t ip_addr[IP_ADDR_LEN];
264 uint8_t iscsi_name[ISCSI_NAME_SIZE]; /* 72 x48 */
265 uint8_t iscsi_alias[0x20];
267 uint16_t iscsi_max_burst_len;
268 uint16_t iscsi_max_outsnd_r2t;
269 uint16_t iscsi_first_burst_len;
270 uint16_t iscsi_max_rcv_data_seg_len;
271 uint16_t iscsi_max_snd_data_seg_len;
273 struct in6_addr remote_ipv6_addr;
274 struct in6_addr link_local_ipv6_addr;
280 #define DDB_STATE_DEAD 0 /* We can no longer talk to
282 #define DDB_STATE_ONLINE 1 /* Device ready to accept
284 #define DDB_STATE_MISSING 2 /* Device logged off, trying
290 #define DF_RELOGIN 0 /* Relogin to device */
291 #define DF_NO_RELOGIN 1 /* Do not relogin if IOCTL
293 #define DF_ISNS_DISCOVERED 2 /* Device was discovered via iSNS */
294 #define DF_FO_MASKED 3
298 #include "ql4_nvram.h"
300 struct ql82xx_hw_data {
301 /* Offsets for flash/nvram access (set to ~0 if not used). */
302 uint32_t flash_conf_off;
303 uint32_t flash_data_off;
305 uint32_t fdt_wrt_disable;
306 uint32_t fdt_erase_cmd;
307 uint32_t fdt_block_size;
308 uint32_t fdt_unprotect_sec_cmd;
309 uint32_t fdt_protect_sec_cmd;
311 uint32_t flt_region_flt;
312 uint32_t flt_region_fdt;
313 uint32_t flt_region_boot;
314 uint32_t flt_region_bootload;
315 uint32_t flt_region_fw;
319 struct qla4_8xxx_legacy_intr_set {
320 uint32_t int_vec_bit;
321 uint32_t tgt_status_reg;
322 uint32_t tgt_mask_reg;
323 uint32_t pci_int_reg;
328 #define QLA_MSIX_DEFAULT 0x00
329 #define QLA_MSIX_RSP_Q 0x01
331 #define QLA_MSIX_ENTRIES 2
332 #define QLA_MIDX_DEFAULT 0
333 #define QLA_MIDX_RSP_Q 1
335 struct ql4_msix_entry {
337 uint16_t msix_vector;
344 struct isp_operations {
345 int (*iospace_config) (struct scsi_qla_host *ha);
346 void (*pci_config) (struct scsi_qla_host *);
347 void (*disable_intrs) (struct scsi_qla_host *);
348 void (*enable_intrs) (struct scsi_qla_host *);
349 int (*start_firmware) (struct scsi_qla_host *);
350 irqreturn_t (*intr_handler) (int , void *);
351 void (*interrupt_service_routine) (struct scsi_qla_host *, uint32_t);
352 int (*reset_chip) (struct scsi_qla_host *);
353 int (*reset_firmware) (struct scsi_qla_host *);
354 void (*queue_iocb) (struct scsi_qla_host *);
355 void (*complete_iocb) (struct scsi_qla_host *);
356 uint16_t (*rd_shdw_req_q_out) (struct scsi_qla_host *);
357 uint16_t (*rd_shdw_rsp_q_in) (struct scsi_qla_host *);
358 int (*get_sys_info) (struct scsi_qla_host *);
362 * Linux Host Adapter structure
364 struct scsi_qla_host {
365 /* Linux adapter configuration data */
368 #define AF_ONLINE 0 /* 0x00000001 */
369 #define AF_INIT_DONE 1 /* 0x00000002 */
370 #define AF_MBOX_COMMAND 2 /* 0x00000004 */
371 #define AF_MBOX_COMMAND_DONE 3 /* 0x00000008 */
372 #define AF_DPC_SCHEDULED 5 /* 0x00000020 */
373 #define AF_INTERRUPTS_ON 6 /* 0x00000040 */
374 #define AF_GET_CRASH_RECORD 7 /* 0x00000080 */
375 #define AF_LINK_UP 8 /* 0x00000100 */
376 #define AF_IRQ_ATTACHED 10 /* 0x00000400 */
377 #define AF_DISABLE_ACB_COMPLETE 11 /* 0x00000800 */
378 #define AF_HBA_GOING_AWAY 12 /* 0x00001000 */
379 #define AF_INTx_ENABLED 15 /* 0x00008000 */
380 #define AF_MSI_ENABLED 16 /* 0x00010000 */
381 #define AF_MSIX_ENABLED 17 /* 0x00020000 */
382 #define AF_MBOX_COMMAND_NOPOLL 18 /* 0x00040000 */
385 unsigned long dpc_flags;
387 #define DPC_RESET_HA 1 /* 0x00000002 */
388 #define DPC_RETRY_RESET_HA 2 /* 0x00000004 */
389 #define DPC_RELOGIN_DEVICE 3 /* 0x00000008 */
390 #define DPC_RESET_HA_FW_CONTEXT 4 /* 0x00000010 */
391 #define DPC_RESET_HA_INTR 5 /* 0x00000020 */
392 #define DPC_ISNS_RESTART 7 /* 0x00000080 */
393 #define DPC_AEN 9 /* 0x00000200 */
394 #define DPC_GET_DHCP_IP_ADDR 15 /* 0x00008000 */
395 #define DPC_LINK_CHANGED 18 /* 0x00040000 */
396 #define DPC_RESET_ACTIVE 20 /* 0x00040000 */
397 #define DPC_HA_UNRECOVERABLE 21 /* 0x00080000 ISP-82xx only*/
398 #define DPC_HA_NEED_QUIESCENT 22 /* 0x00100000 ISP-82xx only*/
401 struct Scsi_Host *host; /* pointer to host data */
407 #define SRB_MIN_REQ 128
408 mempool_t *srb_mempool;
410 /* pci information */
411 struct pci_dev *pdev;
413 struct isp_reg __iomem *reg; /* Base I/O address */
414 unsigned long pio_address;
415 unsigned long pio_length;
416 #define MIN_IOBASE_LEN 0x100
418 uint16_t req_q_count;
420 unsigned long host_no;
422 /* NVRAM registers */
423 struct eeprom_data *nvram;
424 spinlock_t hardware_lock ____cacheline_aligned;
425 uint32_t eeprom_cmd_data;
427 /* Counters for general statistics */
429 uint64_t adapter_error_count;
430 uint64_t device_error_count;
431 uint64_t total_io_count;
432 uint64_t total_mbytes_xferred;
433 uint64_t link_failure_count;
434 uint64_t invalid_crc_count;
435 uint32_t bytes_xfered;
436 uint32_t spurious_int_count;
437 uint32_t aborted_io_count;
438 uint32_t io_timeout_count;
439 uint32_t mailbox_timeout_count;
440 uint32_t seconds_since_last_intr;
441 uint32_t seconds_since_last_heartbeat;
444 /* Info Needed for Management App */
445 /* --- From GetFwVersion --- */
446 uint32_t firmware_version[2];
447 uint32_t patch_number;
448 uint32_t build_number;
451 /* --- From Init_FW --- */
452 /* init_cb_t *init_cb; */
453 uint16_t firmware_options;
454 uint16_t tcp_options;
455 uint8_t ip_address[IP_ADDR_LEN];
456 uint8_t subnet_mask[IP_ADDR_LEN];
457 uint8_t gateway[IP_ADDR_LEN];
459 uint8_t name_string[256];
460 uint8_t heartbeat_interval;
462 /* --- From FlashSysInfo --- */
463 uint8_t my_mac[MAC_ADDR_LEN];
464 uint8_t serial_number[16];
466 /* --- From GetFwState --- */
467 uint32_t firmware_state;
468 uint32_t addl_fw_state;
470 /* Linux kernel thread */
471 struct workqueue_struct *dpc_thread;
472 struct work_struct dpc_work;
474 /* Linux timer thread */
475 struct timer_list timer;
476 uint32_t timer_active;
478 /* Recovery Timers */
479 uint32_t discovery_wait;
480 atomic_t check_relogin_timeouts;
481 uint32_t retry_reset_ha_cnt;
482 uint32_t isp_reset_timer; /* reset test timer */
483 uint32_t nic_reset_timer; /* simulated nic reset test timer */
485 struct list_head free_srb_q;
486 uint16_t free_srb_q_count;
487 uint16_t num_srbs_allocated;
489 /* DMA Memory Block */
491 dma_addr_t queues_dma;
492 unsigned long queues_len;
494 #define MEM_ALIGN_VALUE \
495 ((max(REQUEST_QUEUE_DEPTH, RESPONSE_QUEUE_DEPTH)) * \
496 sizeof(struct queue_entry))
497 /* request and response queue variables */
498 dma_addr_t request_dma;
499 struct queue_entry *request_ring;
500 struct queue_entry *request_ptr;
501 dma_addr_t response_dma;
502 struct queue_entry *response_ring;
503 struct queue_entry *response_ptr;
504 dma_addr_t shadow_regs_dma;
505 struct shadow_regs *shadow_regs;
506 uint16_t request_in; /* Current indexes. */
507 uint16_t request_out;
508 uint16_t response_in;
509 uint16_t response_out;
511 /* aen queue variables */
512 uint16_t aen_q_count; /* Number of available aen_q entries */
513 uint16_t aen_in; /* Current indexes */
515 struct aen aen_q[MAX_AEN_ENTRIES];
517 struct ql4_aen_log aen_log;/* tracks all aens */
519 /* This mutex protects several threads to do mailbox commands
522 struct mutex mbox_sem;
524 /* temporary mailbox status registers */
525 volatile uint8_t mbox_status_count;
526 volatile uint32_t mbox_status[MBOX_REG_COUNT];
528 /* local device database list (contains internal ddb entries) */
529 struct list_head ddb_list;
531 /* Map ddb_list entry by FW ddb index */
532 struct ddb_entry *fw_ddb_index_map[MAX_DDB_ENTRIES];
534 /* Saved srb for status continuation entry processing */
535 struct srb *status_srb;
537 /* IPv6 support info from InitFW */
539 uint8_t ipv4_addr_state;
540 uint16_t ipv4_options;
543 uint32_t ipv6_options;
544 uint32_t ipv6_addl_options;
545 uint8_t ipv6_link_local_state;
546 uint8_t ipv6_addr0_state;
547 uint8_t ipv6_addr1_state;
548 uint8_t ipv6_default_router_state;
549 struct in6_addr ipv6_link_local_addr;
550 struct in6_addr ipv6_addr0;
551 struct in6_addr ipv6_addr1;
552 struct in6_addr ipv6_default_router_addr;
554 /* qla82xx specific fields */
555 struct device_reg_82xx __iomem *qla4_8xxx_reg; /* Base I/O address */
556 unsigned long nx_pcibase; /* Base I/O address */
557 uint8_t *nx_db_rd_ptr; /* Doorbell read pointer */
558 unsigned long nx_db_wr_ptr; /* Door bell write pointer */
559 unsigned long first_page_group_start;
560 unsigned long first_page_group_end;
563 uint32_t curr_window;
564 uint32_t ddr_mn_window;
565 unsigned long mn_win_crb;
566 unsigned long ms_win_crb;
572 struct qla4_8xxx_legacy_intr_set nx_legacy_intr;
576 uint32_t fw_heartbeat_counter;
578 struct isp_operations *isp_ops;
579 struct ql82xx_hw_data hw;
581 struct ql4_msix_entry msix_entries[QLA_MSIX_ENTRIES];
583 uint32_t nx_dev_init_timeout;
584 uint32_t nx_reset_timeout;
586 struct completion mbx_intr_comp;
589 static inline int is_ipv4_enabled(struct scsi_qla_host *ha)
591 return ((ha->ipv4_options & IPOPT_IPv4_PROTOCOL_ENABLE) != 0);
594 static inline int is_ipv6_enabled(struct scsi_qla_host *ha)
596 return ((ha->ipv6_options & IPV6_OPT_IPV6_PROTOCOL_ENABLE) != 0);
599 static inline int is_qla4010(struct scsi_qla_host *ha)
601 return ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP4010;
604 static inline int is_qla4022(struct scsi_qla_host *ha)
606 return ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP4022;
609 static inline int is_qla4032(struct scsi_qla_host *ha)
611 return ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP4032;
614 static inline int is_qla8022(struct scsi_qla_host *ha)
616 return ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8022;
619 static inline int adapter_up(struct scsi_qla_host *ha)
621 return (test_bit(AF_ONLINE, &ha->flags) != 0) &&
622 (test_bit(AF_LINK_UP, &ha->flags) != 0);
625 static inline struct scsi_qla_host* to_qla_host(struct Scsi_Host *shost)
627 return (struct scsi_qla_host *)shost->hostdata;
630 static inline void __iomem* isp_semaphore(struct scsi_qla_host *ha)
632 return (is_qla4010(ha) ?
633 &ha->reg->u1.isp4010.nvram :
634 &ha->reg->u1.isp4022.semaphore);
637 static inline void __iomem* isp_nvram(struct scsi_qla_host *ha)
639 return (is_qla4010(ha) ?
640 &ha->reg->u1.isp4010.nvram :
641 &ha->reg->u1.isp4022.nvram);
644 static inline void __iomem* isp_ext_hw_conf(struct scsi_qla_host *ha)
646 return (is_qla4010(ha) ?
647 &ha->reg->u2.isp4010.ext_hw_conf :
648 &ha->reg->u2.isp4022.p0.ext_hw_conf);
651 static inline void __iomem* isp_port_status(struct scsi_qla_host *ha)
653 return (is_qla4010(ha) ?
654 &ha->reg->u2.isp4010.port_status :
655 &ha->reg->u2.isp4022.p0.port_status);
658 static inline void __iomem* isp_port_ctrl(struct scsi_qla_host *ha)
660 return (is_qla4010(ha) ?
661 &ha->reg->u2.isp4010.port_ctrl :
662 &ha->reg->u2.isp4022.p0.port_ctrl);
665 static inline void __iomem* isp_port_error_status(struct scsi_qla_host *ha)
667 return (is_qla4010(ha) ?
668 &ha->reg->u2.isp4010.port_err_status :
669 &ha->reg->u2.isp4022.p0.port_err_status);
672 static inline void __iomem * isp_gp_out(struct scsi_qla_host *ha)
674 return (is_qla4010(ha) ?
675 &ha->reg->u2.isp4010.gp_out :
676 &ha->reg->u2.isp4022.p0.gp_out);
679 static inline int eeprom_ext_hw_conf_offset(struct scsi_qla_host *ha)
681 return (is_qla4010(ha) ?
682 offsetof(struct eeprom_data, isp4010.ext_hw_conf) / 2 :
683 offsetof(struct eeprom_data, isp4022.ext_hw_conf) / 2);
686 int ql4xxx_sem_spinlock(struct scsi_qla_host * ha, u32 sem_mask, u32 sem_bits);
687 void ql4xxx_sem_unlock(struct scsi_qla_host * ha, u32 sem_mask);
688 int ql4xxx_sem_lock(struct scsi_qla_host * ha, u32 sem_mask, u32 sem_bits);
690 static inline int ql4xxx_lock_flash(struct scsi_qla_host *a)
693 return ql4xxx_sem_spinlock(a, QL4010_FLASH_SEM_MASK,
694 QL4010_FLASH_SEM_BITS);
696 return ql4xxx_sem_spinlock(a, QL4022_FLASH_SEM_MASK,
697 (QL4022_RESOURCE_BITS_BASE_CODE |
698 (a->mac_index)) << 13);
701 static inline void ql4xxx_unlock_flash(struct scsi_qla_host *a)
704 ql4xxx_sem_unlock(a, QL4010_FLASH_SEM_MASK);
706 ql4xxx_sem_unlock(a, QL4022_FLASH_SEM_MASK);
709 static inline int ql4xxx_lock_nvram(struct scsi_qla_host *a)
712 return ql4xxx_sem_spinlock(a, QL4010_NVRAM_SEM_MASK,
713 QL4010_NVRAM_SEM_BITS);
715 return ql4xxx_sem_spinlock(a, QL4022_NVRAM_SEM_MASK,
716 (QL4022_RESOURCE_BITS_BASE_CODE |
717 (a->mac_index)) << 10);
720 static inline void ql4xxx_unlock_nvram(struct scsi_qla_host *a)
723 ql4xxx_sem_unlock(a, QL4010_NVRAM_SEM_MASK);
725 ql4xxx_sem_unlock(a, QL4022_NVRAM_SEM_MASK);
728 static inline int ql4xxx_lock_drvr(struct scsi_qla_host *a)
731 return ql4xxx_sem_lock(a, QL4010_DRVR_SEM_MASK,
732 QL4010_DRVR_SEM_BITS);
734 return ql4xxx_sem_lock(a, QL4022_DRVR_SEM_MASK,
735 (QL4022_RESOURCE_BITS_BASE_CODE |
736 (a->mac_index)) << 1);
739 static inline void ql4xxx_unlock_drvr(struct scsi_qla_host *a)
742 ql4xxx_sem_unlock(a, QL4010_DRVR_SEM_MASK);
744 ql4xxx_sem_unlock(a, QL4022_DRVR_SEM_MASK);
747 /*---------------------------------------------------------------------------*/
749 /* Defines for qla4xxx_initialize_adapter() and qla4xxx_recover_adapter() */
750 #define PRESERVE_DDB_LIST 0
751 #define REBUILD_DDB_LIST 1
753 /* Defines for process_aen() */
754 #define PROCESS_ALL_AENS 0
755 #define FLUSH_DDB_CHANGED_AENS 1
756 #define RELOGIN_DDB_CHANGED_AENS 2
758 #endif /*_QLA4XXX_H */