drivers/scsi/stex.c

   1 /*
   2  * SuperTrak EX Series Storage Controller driver for Linux
   3  *
   4  *      Copyright (C) 2005, 2006 Promise Technology Inc.
   5  *
   6  *      This program is free software; you can redistribute it and/or
   7  *      modify it under the terms of the GNU General Public License
   8  *      as published by the Free Software Foundation; either version
   9  *      2 of the License, or (at your option) any later version.
  10  *
  11  *      Written By:
  12  *              Ed Lin <promise_linux@promise.com>
  13  *
  14  */
  15
  16 #include <linux/init.h>
  17 #include <linux/errno.h>
  18 #include <linux/kernel.h>
  19 #include <linux/delay.h>
  20 #include <linux/time.h>
  21 #include <linux/pci.h>
  22 #include <linux/blkdev.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/types.h>
  25 #include <linux/module.h>
  26 #include <linux/spinlock.h>
  27 #include <asm/io.h>
  28 #include <asm/irq.h>
  29 #include <asm/byteorder.h>
  30 #include <scsi/scsi.h>
  31 #include <scsi/scsi_device.h>
  32 #include <scsi/scsi_cmnd.h>
  33 #include <scsi/scsi_host.h>
  34 #include <scsi/scsi_tcq.h>
  35 #include <scsi/scsi_dbg.h>
  36 #include <scsi/scsi_eh.h>
  37
  38 #define DRV_NAME "stex"
  39 #define ST_DRIVER_VERSION "3.6.0000.1"
  40 #define ST_VER_MAJOR            3
  41 #define ST_VER_MINOR            6
  42 #define ST_OEM                  0
  43 #define ST_BUILD_VER            1
  44
  45 enum {
  46         /* MU register offset */
  47         IMR0    = 0x10, /* MU_INBOUND_MESSAGE_REG0 */
  48         IMR1    = 0x14, /* MU_INBOUND_MESSAGE_REG1 */
  49         OMR0    = 0x18, /* MU_OUTBOUND_MESSAGE_REG0 */
  50         OMR1    = 0x1c, /* MU_OUTBOUND_MESSAGE_REG1 */
  51         IDBL    = 0x20, /* MU_INBOUND_DOORBELL */
  52         IIS     = 0x24, /* MU_INBOUND_INTERRUPT_STATUS */
  53         IIM     = 0x28, /* MU_INBOUND_INTERRUPT_MASK */
  54         ODBL    = 0x2c, /* MU_OUTBOUND_DOORBELL */
  55         OIS     = 0x30, /* MU_OUTBOUND_INTERRUPT_STATUS */
  56         OIM     = 0x3c, /* MU_OUTBOUND_INTERRUPT_MASK */
  57
  58         /* MU register value */
  59         MU_INBOUND_DOORBELL_HANDSHAKE           = 1,
  60         MU_INBOUND_DOORBELL_REQHEADCHANGED      = 2,
  61         MU_INBOUND_DOORBELL_STATUSTAILCHANGED   = 4,
  62         MU_INBOUND_DOORBELL_HMUSTOPPED          = 8,
  63         MU_INBOUND_DOORBELL_RESET               = 16,
  64
  65         MU_OUTBOUND_DOORBELL_HANDSHAKE          = 1,
  66         MU_OUTBOUND_DOORBELL_REQUESTTAILCHANGED = 2,
  67         MU_OUTBOUND_DOORBELL_STATUSHEADCHANGED  = 4,
  68         MU_OUTBOUND_DOORBELL_BUSCHANGE          = 8,
  69         MU_OUTBOUND_DOORBELL_HASEVENT           = 16,
  70
  71         /* MU status code */
  72         MU_STATE_STARTING                       = 1,
  73         MU_STATE_FMU_READY_FOR_HANDSHAKE        = 2,
  74         MU_STATE_SEND_HANDSHAKE_FRAME           = 3,
  75         MU_STATE_STARTED                        = 4,
  76         MU_STATE_RESETTING                      = 5,
  77
  78         MU_MAX_DELAY                            = 120,
  79         MU_HANDSHAKE_SIGNATURE                  = 0x55aaaa55,
  80         MU_HANDSHAKE_SIGNATURE_HALF             = 0x5a5a0000,
  81         MU_HARD_RESET_WAIT                      = 30000,
  82         HMU_PARTNER_TYPE                        = 2,
  83
  84         /* firmware returned values */
  85         SRB_STATUS_SUCCESS                      = 0x01,
  86         SRB_STATUS_ERROR                        = 0x04,
  87         SRB_STATUS_BUSY                         = 0x05,
  88         SRB_STATUS_INVALID_REQUEST              = 0x06,
  89         SRB_STATUS_SELECTION_TIMEOUT            = 0x0A,
  90         SRB_SEE_SENSE                           = 0x80,
  91
  92         /* task attribute */
  93         TASK_ATTRIBUTE_SIMPLE                   = 0x0,
  94         TASK_ATTRIBUTE_HEADOFQUEUE              = 0x1,
  95         TASK_ATTRIBUTE_ORDERED                  = 0x2,
  96         TASK_ATTRIBUTE_ACA                      = 0x4,
  97
  98         /* request count, etc. */
  99         MU_MAX_REQUEST                          = 32,
 100
 101         /* one message wasted, use MU_MAX_REQUEST+1
 102                 to handle MU_MAX_REQUEST messages */
 103         MU_REQ_COUNT                            = (MU_MAX_REQUEST + 1),
 104         MU_STATUS_COUNT                         = (MU_MAX_REQUEST + 1),
 105
 106         STEX_CDB_LENGTH                         = MAX_COMMAND_SIZE,
 107         REQ_VARIABLE_LEN                        = 1024,
 108         STATUS_VAR_LEN                          = 128,
 109         ST_CAN_QUEUE                            = MU_MAX_REQUEST,
 110         ST_CMD_PER_LUN                          = MU_MAX_REQUEST,
 111         ST_MAX_SG                               = 32,
 112
 113         /* sg flags */
 114         SG_CF_EOT                               = 0x80, /* end of table */
 115         SG_CF_64B                               = 0x40, /* 64 bit item */
 116         SG_CF_HOST                              = 0x20, /* sg in host memory */
 117
 118         st_shasta                               = 0,
 119         st_vsc                                  = 1,
 120         st_vsc1                                 = 2,
 121         st_yosemite                             = 3,
 122         st_seq                                  = 4,
 123
 124         PASSTHRU_REQ_TYPE                       = 0x00000001,
 125         PASSTHRU_REQ_NO_WAKEUP                  = 0x00000100,
 126         ST_INTERNAL_TIMEOUT                     = 30,
 127
 128         ST_TO_CMD                               = 0,
 129         ST_FROM_CMD                             = 1,
 130
 131         /* vendor specific commands of Promise */
 132         MGT_CMD                                 = 0xd8,
 133         SINBAND_MGT_CMD                         = 0xd9,
 134         ARRAY_CMD                               = 0xe0,
 135         CONTROLLER_CMD                          = 0xe1,
 136         DEBUGGING_CMD                           = 0xe2,
 137         PASSTHRU_CMD                            = 0xe3,
 138
 139         PASSTHRU_GET_ADAPTER                    = 0x05,
 140         PASSTHRU_GET_DRVVER                     = 0x10,
 141
 142         CTLR_CONFIG_CMD                         = 0x03,
 143         CTLR_SHUTDOWN                           = 0x0d,
 144
 145         CTLR_POWER_STATE_CHANGE                 = 0x0e,
 146         CTLR_POWER_SAVING                       = 0x01,
 147
 148         PASSTHRU_SIGNATURE                      = 0x4e415041,
 149         MGT_CMD_SIGNATURE                       = 0xba,
 150
 151         INQUIRY_EVPD                            = 0x01,
 152
 153         ST_ADDITIONAL_MEM                       = 0x200000,
 154 };
 155
 156 /* SCSI inquiry data */
 157 typedef struct st_inq {
 158         u8 DeviceType                   :5;
 159         u8 DeviceTypeQualifier          :3;
 160         u8 DeviceTypeModifier           :7;
 161         u8 RemovableMedia               :1;
 162         u8 Versions;
 163         u8 ResponseDataFormat           :4;
 164         u8 HiSupport                    :1;
 165         u8 NormACA                      :1;
 166         u8 ReservedBit                  :1;
 167         u8 AERC                         :1;
 168         u8 AdditionalLength;
 169         u8 Reserved[2];
 170         u8 SoftReset                    :1;
 171         u8 CommandQueue                 :1;
 172         u8 Reserved2                    :1;
 173         u8 LinkedCommands               :1;
 174         u8 Synchronous                  :1;
 175         u8 Wide16Bit                    :1;
 176         u8 Wide32Bit                    :1;
 177         u8 RelativeAddressing           :1;
 178         u8 VendorId[8];
 179         u8 ProductId[16];
 180         u8 ProductRevisionLevel[4];
 181         u8 VendorSpecific[20];
 182         u8 Reserved3[40];
 183 } ST_INQ;
 184
 185 struct st_sgitem {
 186         u8 ctrl;        /* SG_CF_xxx */
 187         u8 reserved[3];
 188         __le32 count;
 189         __le32 addr;
 190         __le32 addr_hi;
 191 };
 192
 193 struct st_sgtable {
 194         __le16 sg_count;
 195         __le16 max_sg_count;
 196         __le32 sz_in_byte;
 197         struct st_sgitem table[ST_MAX_SG];
 198 };
 199
 200 struct handshake_frame {
 201         __le32 rb_phy;          /* request payload queue physical address */
 202         __le32 rb_phy_hi;
 203         __le16 req_sz;          /* size of each request payload */
 204         __le16 req_cnt;         /* count of reqs the buffer can hold */
 205         __le16 status_sz;       /* size of each status payload */
 206         __le16 status_cnt;      /* count of status the buffer can hold */
 207         __le32 hosttime;        /* seconds from Jan 1, 1970 (GMT) */
 208         __le32 hosttime_hi;
 209         u8 partner_type;        /* who sends this frame */
 210         u8 reserved0[7];
 211         __le32 partner_ver_major;
 212         __le32 partner_ver_minor;
 213         __le32 partner_ver_oem;
 214         __le32 partner_ver_build;
 215         __le32 extra_offset;    /* NEW */
 216         __le32 extra_size;      /* NEW */
 217         u32 reserved1[2];
 218 };
 219
 220 struct req_msg {
 221         __le16 tag;
 222         u8 lun;
 223         u8 target;
 224         u8 task_attr;
 225         u8 task_manage;
 226         u8 prd_entry;
 227         u8 payload_sz;          /* payload size in 4-byte, not used */
 228         u8 cdb[STEX_CDB_LENGTH];
 229         u8 variable[REQ_VARIABLE_LEN];
 230 };
 231
 232 struct status_msg {
 233         __le16 tag;
 234         u8 lun;
 235         u8 target;
 236         u8 srb_status;
 237         u8 scsi_status;
 238         u8 reserved;
 239         u8 payload_sz;          /* payload size in 4-byte */
 240         u8 variable[STATUS_VAR_LEN];
 241 };
 242
 243 struct ver_info {
 244         u32 major;
 245         u32 minor;
 246         u32 oem;
 247         u32 build;
 248         u32 reserved[2];
 249 };
 250
 251 struct st_frame {
 252         u32 base[6];
 253         u32 rom_addr;
 254
 255         struct ver_info drv_ver;
 256         struct ver_info bios_ver;
 257
 258         u32 bus;
 259         u32 slot;
 260         u32 irq_level;
 261         u32 irq_vec;
 262         u32 id;
 263         u32 subid;
 264
 265         u32 dimm_size;
 266         u8 dimm_type;
 267         u8 reserved[3];
 268
 269         u32 channel;
 270         u32 reserved1;
 271 };
 272
 273 struct st_drvver {
 274         u32 major;
 275         u32 minor;
 276         u32 oem;
 277         u32 build;
 278         u32 signature[2];
 279         u8 console_id;
 280         u8 host_no;
 281         u8 reserved0[2];
 282         u32 reserved[3];
 283 };
 284
 285 #define MU_REQ_BUFFER_SIZE      (MU_REQ_COUNT * sizeof(struct req_msg))
 286 #define MU_STATUS_BUFFER_SIZE   (MU_STATUS_COUNT * sizeof(struct status_msg))
 287 #define MU_BUFFER_SIZE          (MU_REQ_BUFFER_SIZE + MU_STATUS_BUFFER_SIZE)
 288 #define STEX_EXTRA_SIZE         max(sizeof(struct st_frame), sizeof(ST_INQ))
 289 #define STEX_BUFFER_SIZE        (MU_BUFFER_SIZE + STEX_EXTRA_SIZE)
 290
 291 struct st_ccb {
 292         struct req_msg *req;
 293         struct scsi_cmnd *cmd;
 294
 295         void *sense_buffer;
 296         unsigned int sense_bufflen;
 297         int sg_count;
 298
 299         u32 req_type;
 300         u8 srb_status;
 301         u8 scsi_status;
 302 };
 303
 304 struct st_hba {
 305         void __iomem *mmio_base;        /* iomapped PCI memory space */
 306         void *dma_mem;
 307         dma_addr_t dma_handle;
 308         size_t dma_size;
 309
 310         struct Scsi_Host *host;
 311         struct pci_dev *pdev;
 312
 313         u32 req_head;
 314         u32 req_tail;
 315         u32 status_head;
 316         u32 status_tail;
 317
 318         struct status_msg *status_buffer;
 319         void *copy_buffer; /* temp buffer for driver-handled commands */
 320         struct st_ccb ccb[MU_MAX_REQUEST];
 321         struct st_ccb *wait_ccb;
 322         wait_queue_head_t waitq;
 323
 324         unsigned int mu_status;
 325         int out_req_cnt;
 326
 327         unsigned int cardtype;
 328 };
 329
 330 static const char console_inq_page[] =
 331 {
 332         0x03,0x00,0x03,0x03,0xFA,0x00,0x00,0x30,
 333         0x50,0x72,0x6F,0x6D,0x69,0x73,0x65,0x20,        /* "Promise " */
 334         0x52,0x41,0x49,0x44,0x20,0x43,0x6F,0x6E,        /* "RAID Con" */
 335         0x73,0x6F,0x6C,0x65,0x20,0x20,0x20,0x20,        /* "sole    " */
 336         0x31,0x2E,0x30,0x30,0x20,0x20,0x20,0x20,        /* "1.00    " */
 337         0x53,0x58,0x2F,0x52,0x53,0x41,0x46,0x2D,        /* "SX/RSAF-" */
 338         0x54,0x45,0x31,0x2E,0x30,0x30,0x20,0x20,        /* "TE1.00  " */
 339         0x0C,0x20,0x20,0x20,0x20,0x20,0x20,0x20
 340 };
 341
 342 MODULE_AUTHOR("Ed Lin");
 343 MODULE_DESCRIPTION("Promise Technology SuperTrak EX Controllers");
 344 MODULE_LICENSE("GPL");
 345 MODULE_VERSION(ST_DRIVER_VERSION);
 346
 347 static void stex_gettime(__le32 *time)
 348 {
 349         struct timeval tv;
 350         do_gettimeofday(&tv);
 351
 352         *time = cpu_to_le32(tv.tv_sec & 0xffffffff);
 353         *(time + 1) = cpu_to_le32((tv.tv_sec >> 16) >> 16);
 354 }
 355
 356 static struct status_msg *stex_get_status(struct st_hba *hba)
 357 {
 358         struct status_msg *status =
 359                 hba->status_buffer + hba->status_tail;
 360
 361         ++hba->status_tail;
 362         hba->status_tail %= MU_STATUS_COUNT;
 363
 364         return status;
 365 }
 366
 367 static void stex_invalid_field(struct scsi_cmnd *cmd,
 368                                void (*done)(struct scsi_cmnd *))
 369 {
 370         cmd->result = (DRIVER_SENSE << 24) | SAM_STAT_CHECK_CONDITION;
 371
 372         /* "Invalid field in cbd" */
 373         scsi_build_sense_buffer(0, cmd->sense_buffer, ILLEGAL_REQUEST, 0x24,
 374                                 0x0);
 375         done(cmd);
 376 }
 377
 378 static struct req_msg *stex_alloc_req(struct st_hba *hba)
 379 {
 380         struct req_msg *req = ((struct req_msg *)hba->dma_mem) +
 381                 hba->req_head;
 382
 383         ++hba->req_head;
 384         hba->req_head %= MU_REQ_COUNT;
 385
 386         return req;
 387 }
 388
 389 static int stex_map_sg(struct st_hba *hba,
 390         struct req_msg *req, struct st_ccb *ccb)
 391 {
 392         struct scsi_cmnd *cmd;
 393         struct scatterlist *sg;
 394         struct st_sgtable *dst;
 395         int i, nseg;
 396
 397         cmd = ccb->cmd;
 398         dst = (struct st_sgtable *)req->variable;
 399         dst->max_sg_count = cpu_to_le16(ST_MAX_SG);
 400         dst->sz_in_byte = cpu_to_le32(scsi_bufflen(cmd));
 401
 402         nseg = scsi_dma_map(cmd);
 403         if (nseg < 0)
 404                 return -EIO;
 405         if (nseg) {
 406                 ccb->sg_count = nseg;
 407                 dst->sg_count = cpu_to_le16((u16)nseg);
 408
 409                 scsi_for_each_sg(cmd, sg, nseg, i) {
 410                         dst->table[i].count = cpu_to_le32((u32)sg_dma_len(sg));
 411                         dst->table[i].addr =
 412                                 cpu_to_le32(sg_dma_address(sg) & 0xffffffff);
 413                         dst->table[i].addr_hi =
 414                                 cpu_to_le32((sg_dma_address(sg) >> 16) >> 16);
 415                         dst->table[i].ctrl = SG_CF_64B | SG_CF_HOST;
 416                 }
 417                 dst->table[--i].ctrl |= SG_CF_EOT;
 418         }
 419
 420         return 0;
 421 }
 422
 423 static void stex_controller_info(struct st_hba *hba, struct st_ccb *ccb)
 424 {
 425         struct st_frame *p;
 426         size_t count = sizeof(struct st_frame);
 427
 428         p = hba->copy_buffer;
 429         count = scsi_sg_copy_to_buffer(ccb->cmd, p, count);
 430         memset(p->base, 0, sizeof(u32)*6);
 431         *(unsigned long *)(p->base) = pci_resource_start(hba->pdev, 0);
 432         p->rom_addr = 0;
 433
 434         p->drv_ver.major = ST_VER_MAJOR;
 435         p->drv_ver.minor = ST_VER_MINOR;
 436         p->drv_ver.oem = ST_OEM;
 437         p->drv_ver.build = ST_BUILD_VER;
 438
 439         p->bus = hba->pdev->bus->number;
 440         p->slot = hba->pdev->devfn;
 441         p->irq_level = 0;
 442         p->irq_vec = hba->pdev->irq;
 443         p->id = hba->pdev->vendor << 16 | hba->pdev->device;
 444         p->subid =
 445                 hba->pdev->subsystem_vendor << 16 | hba->pdev->subsystem_device;
 446
 447         count = scsi_sg_copy_from_buffer(ccb->cmd, p, count);
 448 }
 449
 450 static void
 451 stex_send_cmd(struct st_hba *hba, struct req_msg *req, u16 tag)
 452 {
 453         req->tag = cpu_to_le16(tag);
 454         req->task_attr = TASK_ATTRIBUTE_SIMPLE;
 455         req->task_manage = 0; /* not supported yet */
 456
 457         hba->ccb[tag].req = req;
 458         hba->out_req_cnt++;
 459
 460         writel(hba->req_head, hba->mmio_base + IMR0);
 461         writel(MU_INBOUND_DOORBELL_REQHEADCHANGED, hba->mmio_base + IDBL);
 462         readl(hba->mmio_base + IDBL); /* flush */
 463 }
 464
 465 static int
 466 stex_slave_alloc(struct scsi_device *sdev)
 467 {
 468         /* Cheat: usually extracted from Inquiry data */
 469         sdev->tagged_supported = 1;
 470
 471         scsi_activate_tcq(sdev, ST_CMD_PER_LUN);
 472
 473         return 0;
 474 }
 475
 476 static int
 477 stex_slave_config(struct scsi_device *sdev)
 478 {
 479         sdev->use_10_for_rw = 1;
 480         sdev->use_10_for_ms = 1;
 481         blk_queue_rq_timeout(sdev->request_queue, 60 * HZ);
 482         sdev->tagged_supported = 1;
 483
 484         return 0;
 485 }
 486
 487 static void
 488 stex_slave_destroy(struct scsi_device *sdev)
 489 {
 490         scsi_deactivate_tcq(sdev, 1);
 491 }
 492
 493 static int
 494 stex_queuecommand(struct scsi_cmnd *cmd, void (* done)(struct scsi_cmnd *))
 495 {
 496         struct st_hba *hba;
 497         struct Scsi_Host *host;
 498         unsigned int id,lun;
 499         struct req_msg *req;
 500         u16 tag;
 501         host = cmd->device->host;
 502         id = cmd->device->id;
 503         lun = cmd->device->lun;
 504         hba = (struct st_hba *) &host->hostdata[0];
 505
 506         switch (cmd->cmnd[0]) {
 507         case MODE_SENSE_10:
 508         {
 509                 static char ms10_caching_page[12] =
 510                         { 0, 0x12, 0, 0, 0, 0, 0, 0, 0x8, 0xa, 0x4, 0 };
 511                 unsigned char page;
 512                 page = cmd->cmnd[2] & 0x3f;
 513                 if (page == 0x8 || page == 0x3f) {
 514                         scsi_sg_copy_from_buffer(cmd, ms10_caching_page,
 515                                                  sizeof(ms10_caching_page));
 516                         cmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8;
 517                         done(cmd);
 518                 } else
 519                         stex_invalid_field(cmd, done);
 520                 return 0;
 521         }
 522         case REPORT_LUNS:
 523                 /*
 524                  * The shasta firmware does not report actual luns in the
 525                  * target, so fail the command to force sequential lun scan.
 526                  * Also, the console device does not support this command.
 527                  */
 528                 if (hba->cardtype == st_shasta || id == host->max_id - 1) {
 529                         stex_invalid_field(cmd, done);
 530                         return 0;
 531                 }
 532                 break;
 533         case TEST_UNIT_READY:
 534                 if (id == host->max_id - 1) {
 535                         cmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8;
 536                         done(cmd);
 537                         return 0;
 538                 }
 539                 break;
 540         case INQUIRY:
 541                 if (id != host->max_id - 1)
 542                         break;
 543                 if (lun == 0 && (cmd->cmnd[1] & INQUIRY_EVPD) == 0) {
 544                         scsi_sg_copy_from_buffer(cmd, (void *)console_inq_page,
 545                                                  sizeof(console_inq_page));
 546                         cmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8;
 547                         done(cmd);
 548                 } else
 549                         stex_invalid_field(cmd, done);
 550                 return 0;
 551         case PASSTHRU_CMD:
 552                 if (cmd->cmnd[1] == PASSTHRU_GET_DRVVER) {
 553                         struct st_drvver ver;
 554                         size_t cp_len = sizeof(ver);
 555                         ver.major = ST_VER_MAJOR;
 556                         ver.minor = ST_VER_MINOR;
 557                         ver.oem = ST_OEM;
 558                         ver.build = ST_BUILD_VER;
 559                         ver.signature[0] = PASSTHRU_SIGNATURE;
 560                         ver.console_id = host->max_id - 1;
 561                         ver.host_no = hba->host->host_no;
 562                         cp_len = scsi_sg_copy_from_buffer(cmd, &ver, cp_len);
 563                         cmd->result = sizeof(ver) == cp_len ?
 564                                 DID_OK << 16 | COMMAND_COMPLETE << 8 :
 565                                 DID_ERROR << 16 | COMMAND_COMPLETE << 8;
 566                         done(cmd);
 567                         return 0;
 568                 }
 569         default:
 570                 break;
 571         }
 572
 573         cmd->scsi_done = done;
 574
 575         tag = cmd->request->tag;
 576
 577         if (unlikely(tag >= host->can_queue))
 578                 return SCSI_MLQUEUE_HOST_BUSY;
 579
 580         req = stex_alloc_req(hba);
 581
 582         req->lun = lun;
 583         req->target = id;
 584
 585         /* cdb */
 586         memcpy(req->cdb, cmd->cmnd, STEX_CDB_LENGTH);
 587
 588         hba->ccb[tag].cmd = cmd;
 589         hba->ccb[tag].sense_bufflen = SCSI_SENSE_BUFFERSIZE;
 590         hba->ccb[tag].sense_buffer = cmd->sense_buffer;
 591         hba->ccb[tag].req_type = 0;
 592
 593         if (cmd->sc_data_direction != DMA_NONE)
 594                 stex_map_sg(hba, req, &hba->ccb[tag]);
 595
 596         stex_send_cmd(hba, req, tag);
 597         return 0;
 598 }
 599
 600 static void stex_scsi_done(struct st_ccb *ccb)
 601 {
 602         struct scsi_cmnd *cmd = ccb->cmd;
 603         int result;
 604
 605         if (ccb->srb_status == SRB_STATUS_SUCCESS ||  ccb->srb_status == 0) {
 606                 result = ccb->scsi_status;
 607                 switch (ccb->scsi_status) {
 608                 case SAM_STAT_GOOD:
 609                         result |= DID_OK << 16 | COMMAND_COMPLETE << 8;
 610                         break;
 611                 case SAM_STAT_CHECK_CONDITION:
 612                         result |= DRIVER_SENSE << 24;
 613                         break;
 614                 case SAM_STAT_BUSY:
 615                         result |= DID_BUS_BUSY << 16 | COMMAND_COMPLETE << 8;
 616                         break;
 617                 default:
 618                         result |= DID_ERROR << 16 | COMMAND_COMPLETE << 8;
 619                         break;
 620                 }
 621         }
 622         else if (ccb->srb_status & SRB_SEE_SENSE)
 623                 result = DRIVER_SENSE << 24 | SAM_STAT_CHECK_CONDITION;
 624         else switch (ccb->srb_status) {
 625                 case SRB_STATUS_SELECTION_TIMEOUT:
 626                         result = DID_NO_CONNECT << 16 | COMMAND_COMPLETE << 8;
 627                         break;
 628                 case SRB_STATUS_BUSY:
 629                         result = DID_BUS_BUSY << 16 | COMMAND_COMPLETE << 8;
 630                         break;
 631                 case SRB_STATUS_INVALID_REQUEST:
 632                 case SRB_STATUS_ERROR:
 633                 default:
 634                         result = DID_ERROR << 16 | COMMAND_COMPLETE << 8;
 635                         break;
 636         }
 637
 638         cmd->result = result;
 639         cmd->scsi_done(cmd);
 640 }
 641
 642 static void stex_copy_data(struct st_ccb *ccb,
 643         struct status_msg *resp, unsigned int variable)
 644 {
 645         size_t count = variable;
 646         if (resp->scsi_status != SAM_STAT_GOOD) {
 647                 if (ccb->sense_buffer != NULL)
 648                         memcpy(ccb->sense_buffer, resp->variable,
 649                                 min(variable, ccb->sense_bufflen));
 650                 return;
 651         }
 652
 653         if (ccb->cmd == NULL)
 654                 return;
 655         count = scsi_sg_copy_from_buffer(ccb->cmd, resp->variable, count);
 656 }
 657
 658 static void stex_ys_commands(struct st_hba *hba,
 659         struct st_ccb *ccb, struct status_msg *resp)
 660 {
 661         if (ccb->cmd->cmnd[0] == MGT_CMD &&
 662                 resp->scsi_status != SAM_STAT_CHECK_CONDITION) {
 663                 scsi_set_resid(ccb->cmd, scsi_bufflen(ccb->cmd) -
 664                         le32_to_cpu(*(__le32 *)&resp->variable[0]));
 665                 return;
 666         }
 667
 668         if (resp->srb_status != 0)
 669                 return;
 670
 671         /* determine inquiry command status by DeviceTypeQualifier */
 672         if (ccb->cmd->cmnd[0] == INQUIRY &&
 673                 resp->scsi_status == SAM_STAT_GOOD) {
 674                 ST_INQ *inq_data;
 675
 676                 scsi_sg_copy_to_buffer(ccb->cmd, hba->copy_buffer,
 677                                        STEX_EXTRA_SIZE);
 678                 inq_data = (ST_INQ *)hba->copy_buffer;
 679                 if (inq_data->DeviceTypeQualifier != 0)
 680                         ccb->srb_status = SRB_STATUS_SELECTION_TIMEOUT;
 681                 else
 682                         ccb->srb_status = SRB_STATUS_SUCCESS;
 683         }
 684 }
 685
 686 static void stex_mu_intr(struct st_hba *hba, u32 doorbell)
 687 {
 688         void __iomem *base = hba->mmio_base;
 689         struct status_msg *resp;
 690         struct st_ccb *ccb;
 691         unsigned int size;
 692         u16 tag;
 693
 694         if (!(doorbell & MU_OUTBOUND_DOORBELL_STATUSHEADCHANGED))
 695                 return;
 696
 697         /* status payloads */
 698         hba->status_head = readl(base + OMR1);
 699         if (unlikely(hba->status_head >= MU_STATUS_COUNT)) {
 700                 printk(KERN_WARNING DRV_NAME "(%s): invalid status head\n",
 701                         pci_name(hba->pdev));
 702                 return;
 703         }
 704
 705         /*
 706          * it's not a valid status payload if:
 707          * 1. there are no pending requests(e.g. during init stage)
 708          * 2. there are some pending requests, but the controller is in
 709          *     reset status, and its type is not st_yosemite
 710          * firmware of st_yosemite in reset status will return pending requests
 711          * to driver, so we allow it to pass
 712          */
 713         if (unlikely(hba->out_req_cnt <= 0 ||
 714                         (hba->mu_status == MU_STATE_RESETTING &&
 715                          hba->cardtype != st_yosemite))) {
 716                 hba->status_tail = hba->status_head;
 717                 goto update_status;
 718         }
 719
 720         while (hba->status_tail != hba->status_head) {
 721                 resp = stex_get_status(hba);
 722                 tag = le16_to_cpu(resp->tag);
 723                 if (unlikely(tag >= hba->host->can_queue)) {
 724                         printk(KERN_WARNING DRV_NAME
 725                                 "(%s): invalid tag\n", pci_name(hba->pdev));
 726                         continue;
 727                 }
 728
 729                 ccb = &hba->ccb[tag];
 730                 if (hba->wait_ccb == ccb)
 731                         hba->wait_ccb = NULL;
 732                 if (unlikely(ccb->req == NULL)) {
 733                         printk(KERN_WARNING DRV_NAME
 734                                 "(%s): lagging req\n", pci_name(hba->pdev));
 735                         hba->out_req_cnt--;
 736                         continue;
 737                 }
 738
 739                 size = resp->payload_sz * sizeof(u32); /* payload size */
 740                 if (unlikely(size < sizeof(*resp) - STATUS_VAR_LEN ||
 741                         size > sizeof(*resp))) {
 742                         printk(KERN_WARNING DRV_NAME "(%s): bad status size\n",
 743                                 pci_name(hba->pdev));
 744                 } else {
 745                         size -= sizeof(*resp) - STATUS_VAR_LEN; /* copy size */
 746                         if (size)
 747                                 stex_copy_data(ccb, resp, size);
 748                 }
 749
 750                 ccb->req = NULL;
 751                 ccb->srb_status = resp->srb_status;
 752                 ccb->scsi_status = resp->scsi_status;
 753
 754                 if (likely(ccb->cmd != NULL)) {
 755                         if (hba->cardtype == st_yosemite)
 756                                 stex_ys_commands(hba, ccb, resp);
 757
 758                         if (unlikely(ccb->cmd->cmnd[0] == PASSTHRU_CMD &&
 759                                 ccb->cmd->cmnd[1] == PASSTHRU_GET_ADAPTER))
 760                                 stex_controller_info(hba, ccb);
 761
 762                         scsi_dma_unmap(ccb->cmd);
 763                         stex_scsi_done(ccb);
 764                         hba->out_req_cnt--;
 765                 } else if (ccb->req_type & PASSTHRU_REQ_TYPE) {
 766                         hba->out_req_cnt--;
 767                         if (ccb->req_type & PASSTHRU_REQ_NO_WAKEUP) {
 768                                 ccb->req_type = 0;
 769                                 continue;
 770                         }
 771                         ccb->req_type = 0;
 772                         if (waitqueue_active(&hba->waitq))
 773                                 wake_up(&hba->waitq);
 774                 }
 775         }
 776
 777 update_status:
 778         writel(hba->status_head, base + IMR1);
 779         readl(base + IMR1); /* flush */
 780 }
 781
 782 static irqreturn_t stex_intr(int irq, void *__hba)
 783 {
 784         struct st_hba *hba = __hba;
 785         void __iomem *base = hba->mmio_base;
 786         u32 data;
 787         unsigned long flags;
 788         int handled = 0;
 789
 790         spin_lock_irqsave(hba->host->host_lock, flags);
 791
 792         data = readl(base + ODBL);
 793
 794         if (data && data != 0xffffffff) {
 795                 /* clear the interrupt */
 796                 writel(data, base + ODBL);
 797                 readl(base + ODBL); /* flush */
 798                 stex_mu_intr(hba, data);
 799                 handled = 1;
 800         }
 801
 802         spin_unlock_irqrestore(hba->host->host_lock, flags);
 803
 804         return IRQ_RETVAL(handled);
 805 }
 806
 807 static int stex_handshake(struct st_hba *hba)
 808 {
 809         void __iomem *base = hba->mmio_base;
 810         struct handshake_frame *h;
 811         dma_addr_t status_phys;
 812         u32 data;
 813         unsigned long before;
 814
 815         if (readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE) {
 816                 writel(MU_INBOUND_DOORBELL_HANDSHAKE, base + IDBL);
 817                 readl(base + IDBL);
 818                 before = jiffies;
 819                 while (readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE) {
 820                         if (time_after(jiffies, before + MU_MAX_DELAY * HZ)) {
 821                                 printk(KERN_ERR DRV_NAME
 822                                         "(%s): no handshake signature\n",
 823                                         pci_name(hba->pdev));
 824                                 return -1;
 825                         }
 826                         rmb();
 827                         msleep(1);
 828                 }
 829         }
 830
 831         udelay(10);
 832
 833         data = readl(base + OMR1);
 834         if ((data & 0xffff0000) == MU_HANDSHAKE_SIGNATURE_HALF) {
 835                 data &= 0x0000ffff;
 836                 if (hba->host->can_queue > data)
 837                         hba->host->can_queue = data;
 838         }
 839
 840         h = (struct handshake_frame *)(hba->dma_mem + MU_REQ_BUFFER_SIZE);
 841         h->rb_phy = cpu_to_le32(hba->dma_handle);
 842         h->rb_phy_hi = cpu_to_le32((hba->dma_handle >> 16) >> 16);
 843         h->req_sz = cpu_to_le16(sizeof(struct req_msg));
 844         h->req_cnt = cpu_to_le16(MU_REQ_COUNT);
 845         h->status_sz = cpu_to_le16(sizeof(struct status_msg));
 846         h->status_cnt = cpu_to_le16(MU_STATUS_COUNT);
 847         stex_gettime(&h->hosttime);
 848         h->partner_type = HMU_PARTNER_TYPE;
 849         if (hba->dma_size > STEX_BUFFER_SIZE) {
 850                 h->extra_offset = cpu_to_le32(STEX_BUFFER_SIZE);
 851                 h->extra_size = cpu_to_le32(ST_ADDITIONAL_MEM);
 852         } else
 853                 h->extra_offset = h->extra_size = 0;
 854
 855         status_phys = hba->dma_handle + MU_REQ_BUFFER_SIZE;
 856         writel(status_phys, base + IMR0);
 857         readl(base + IMR0);
 858         writel((status_phys >> 16) >> 16, base + IMR1);
 859         readl(base + IMR1);
 860
 861         writel((status_phys >> 16) >> 16, base + OMR0); /* old fw compatible */
 862         readl(base + OMR0);
 863         writel(MU_INBOUND_DOORBELL_HANDSHAKE, base + IDBL);
 864         readl(base + IDBL); /* flush */
 865
 866         udelay(10);
 867         before = jiffies;
 868         while (readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE) {
 869                 if (time_after(jiffies, before + MU_MAX_DELAY * HZ)) {
 870                         printk(KERN_ERR DRV_NAME
 871                                 "(%s): no signature after handshake frame\n",
 872                                 pci_name(hba->pdev));
 873                         return -1;
 874                 }
 875                 rmb();
 876                 msleep(1);
 877         }
 878
 879         writel(0, base + IMR0);
 880         readl(base + IMR0);
 881         writel(0, base + OMR0);
 882         readl(base + OMR0);
 883         writel(0, base + IMR1);
 884         readl(base + IMR1);
 885         writel(0, base + OMR1);
 886         readl(base + OMR1); /* flush */
 887         hba->mu_status = MU_STATE_STARTED;
 888         return 0;
 889 }
 890
 891 static int stex_abort(struct scsi_cmnd *cmd)
 892 {
 893         struct Scsi_Host *host = cmd->device->host;
 894         struct st_hba *hba = (struct st_hba *)host->hostdata;
 895         u16 tag = cmd->request->tag;
 896         void __iomem *base;
 897         u32 data;
 898         int result = SUCCESS;
 899         unsigned long flags;
 900
 901         printk(KERN_INFO DRV_NAME
 902                 "(%s): aborting command\n", pci_name(hba->pdev));
 903         scsi_print_command(cmd);
 904
 905         base = hba->mmio_base;
 906         spin_lock_irqsave(host->host_lock, flags);
 907         if (tag < host->can_queue && hba->ccb[tag].cmd == cmd)
 908                 hba->wait_ccb = &hba->ccb[tag];
 909         else {
 910                 for (tag = 0; tag < host->can_queue; tag++)
 911                         if (hba->ccb[tag].cmd == cmd) {
 912                                 hba->wait_ccb = &hba->ccb[tag];
 913                                 break;
 914                         }
 915                 if (tag >= host->can_queue)
 916                         goto out;
 917         }
 918
 919         data = readl(base + ODBL);
 920         if (data == 0 || data == 0xffffffff)
 921                 goto fail_out;
 922
 923         writel(data, base + ODBL);
 924         readl(base + ODBL); /* flush */
 925
 926         stex_mu_intr(hba, data);
 927
 928         if (hba->wait_ccb == NULL) {
 929                 printk(KERN_WARNING DRV_NAME
 930                         "(%s): lost interrupt\n", pci_name(hba->pdev));
 931                 goto out;
 932         }
 933
 934 fail_out:
 935         scsi_dma_unmap(cmd);
 936         hba->wait_ccb->req = NULL; /* nullify the req's future return */
 937         hba->wait_ccb = NULL;
 938         result = FAILED;
 939 out:
 940         spin_unlock_irqrestore(host->host_lock, flags);
 941         return result;
 942 }
 943
 944 static void stex_hard_reset(struct st_hba *hba)
 945 {
 946         struct pci_bus *bus;
 947         int i;
 948         u16 pci_cmd;
 949         u8 pci_bctl;
 950
 951         for (i = 0; i < 16; i++)
 952                 pci_read_config_dword(hba->pdev, i * 4,
 953                         &hba->pdev->saved_config_space[i]);
 954
 955         /* Reset secondary bus. Our controller(MU/ATU) is the only device on
 956            secondary bus. Consult Intel 80331/3 developer's manual for detail */
 957         bus = hba->pdev->bus;
 958         pci_read_config_byte(bus->self, PCI_BRIDGE_CONTROL, &pci_bctl);
 959         pci_bctl |= PCI_BRIDGE_CTL_BUS_RESET;
 960         pci_write_config_byte(bus->self, PCI_BRIDGE_CONTROL, pci_bctl);
 961
 962         /*
 963          * 1 ms may be enough for 8-port controllers. But 16-port controllers
 964          * require more time to finish bus reset. Use 100 ms here for safety
 965          */
 966         msleep(100);
 967         pci_bctl &= ~PCI_BRIDGE_CTL_BUS_RESET;
 968         pci_write_config_byte(bus->self, PCI_BRIDGE_CONTROL, pci_bctl);
 969
 970         for (i = 0; i < MU_HARD_RESET_WAIT; i++) {
 971                 pci_read_config_word(hba->pdev, PCI_COMMAND, &pci_cmd);
 972                 if (pci_cmd != 0xffff && (pci_cmd & PCI_COMMAND_MASTER))
 973                         break;
 974                 msleep(1);
 975         }
 976
 977         ssleep(5);
 978         for (i = 0; i < 16; i++)
 979                 pci_write_config_dword(hba->pdev, i * 4,
 980                         hba->pdev->saved_config_space[i]);
 981 }
 982
 983 static int stex_reset(struct scsi_cmnd *cmd)
 984 {
 985         struct st_hba *hba;
 986         unsigned long flags;
 987         unsigned long before;
 988         hba = (struct st_hba *) &cmd->device->host->hostdata[0];
 989
 990         printk(KERN_INFO DRV_NAME
 991                 "(%s): resetting host\n", pci_name(hba->pdev));
 992         scsi_print_command(cmd);
 993
 994         hba->mu_status = MU_STATE_RESETTING;
 995
 996         if (hba->cardtype == st_shasta)
 997                 stex_hard_reset(hba);
 998
 999         if (hba->cardtype != st_yosemite) {
1000                 if (stex_handshake(hba)) {
1001                         printk(KERN_WARNING DRV_NAME
1002                                 "(%s): resetting: handshake failed\n",
1003                                 pci_name(hba->pdev));
1004                         return FAILED;
1005                 }
1006                 spin_lock_irqsave(hba->host->host_lock, flags);
1007                 hba->req_head = 0;
1008                 hba->req_tail = 0;
1009                 hba->status_head = 0;
1010                 hba->status_tail = 0;
1011                 hba->out_req_cnt = 0;
1012                 spin_unlock_irqrestore(hba->host->host_lock, flags);
1013                 return SUCCESS;
1014         }
1015
1016         /* st_yosemite */
1017         writel(MU_INBOUND_DOORBELL_RESET, hba->mmio_base + IDBL);
1018         readl(hba->mmio_base + IDBL); /* flush */
1019         before = jiffies;
1020         while (hba->out_req_cnt > 0) {
1021                 if (time_after(jiffies, before + ST_INTERNAL_TIMEOUT * HZ)) {
1022                         printk(KERN_WARNING DRV_NAME
1023                                 "(%s): reset timeout\n", pci_name(hba->pdev));
1024                         return FAILED;
1025                 }
1026                 msleep(1);
1027         }
1028
1029         hba->mu_status = MU_STATE_STARTED;
1030         return SUCCESS;
1031 }
1032
1033 static int stex_biosparam(struct scsi_device *sdev,
1034         struct block_device *bdev, sector_t capacity, int geom[])
1035 {
1036         int heads = 255, sectors = 63;
1037
1038         if (capacity < 0x200000) {
1039                 heads = 64;
1040                 sectors = 32;
1041         }
1042
1043         sector_div(capacity, heads * sectors);
1044
1045         geom[0] = heads;
1046         geom[1] = sectors;
1047         geom[2] = capacity;
1048
1049         return 0;
1050 }
1051
1052 static struct scsi_host_template driver_template = {
1053         .module                         = THIS_MODULE,
1054         .name                           = DRV_NAME,
1055         .proc_name                      = DRV_NAME,
1056         .bios_param                     = stex_biosparam,
1057         .queuecommand                   = stex_queuecommand,
1058         .slave_alloc                    = stex_slave_alloc,
1059         .slave_configure                = stex_slave_config,
1060         .slave_destroy                  = stex_slave_destroy,
1061         .eh_abort_handler               = stex_abort,
1062         .eh_host_reset_handler          = stex_reset,
1063         .can_queue                      = ST_CAN_QUEUE,
1064         .this_id                        = -1,
1065         .sg_tablesize                   = ST_MAX_SG,
1066         .cmd_per_lun                    = ST_CMD_PER_LUN,
1067 };
1068
1069 static int stex_set_dma_mask(struct pci_dev * pdev)
1070 {
1071         int ret;
1072         if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)
1073                 && !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
1074                 return 0;
1075         ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1076         if (!ret)
1077                 ret = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
1078         return ret;
1079 }
1080
1081 static int __devinit
1082 stex_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1083 {
1084         struct st_hba *hba;
1085         struct Scsi_Host *host;
1086         int err;
1087
1088         err = pci_enable_device(pdev);
1089         if (err)
1090                 return err;
1091
1092         pci_set_master(pdev);
1093
1094         host = scsi_host_alloc(&driver_template, sizeof(struct st_hba));
1095
1096         if (!host) {
1097                 printk(KERN_ERR DRV_NAME "(%s): scsi_host_alloc failed\n",
1098                         pci_name(pdev));
1099                 err = -ENOMEM;
1100                 goto out_disable;
1101         }
1102
1103         hba = (struct st_hba *)host->hostdata;
1104         memset(hba, 0, sizeof(struct st_hba));
1105
1106         err = pci_request_regions(pdev, DRV_NAME);
1107         if (err < 0) {
1108                 printk(KERN_ERR DRV_NAME "(%s): request regions failed\n",
1109                         pci_name(pdev));
1110                 goto out_scsi_host_put;
1111         }
1112
1113         hba->mmio_base = pci_ioremap_bar(pdev, 0);
1114         if ( !hba->mmio_base) {
1115                 printk(KERN_ERR DRV_NAME "(%s): memory map failed\n",
1116                         pci_name(pdev));
1117                 err = -ENOMEM;
1118                 goto out_release_regions;
1119         }
1120
1121         err = stex_set_dma_mask(pdev);
1122         if (err) {
1123                 printk(KERN_ERR DRV_NAME "(%s): set dma mask failed\n",
1124                         pci_name(pdev));
1125                 goto out_iounmap;
1126         }
1127
1128         hba->cardtype = (unsigned int) id->driver_data;
1129         if (hba->cardtype == st_vsc && (pdev->subsystem_device & 0xf) == 0x1)
1130                 hba->cardtype = st_vsc1;
1131         hba->dma_size = (hba->cardtype == st_vsc1 || hba->cardtype == st_seq) ?
1132                 (STEX_BUFFER_SIZE + ST_ADDITIONAL_MEM) : (STEX_BUFFER_SIZE);
1133         hba->dma_mem = dma_alloc_coherent(&pdev->dev,
1134                 hba->dma_size, &hba->dma_handle, GFP_KERNEL);
1135         if (!hba->dma_mem) {
1136                 err = -ENOMEM;
1137                 printk(KERN_ERR DRV_NAME "(%s): dma mem alloc failed\n",
1138                         pci_name(pdev));
1139                 goto out_iounmap;
1140         }
1141
1142         hba->status_buffer =
1143                 (struct status_msg *)(hba->dma_mem + MU_REQ_BUFFER_SIZE);
1144         hba->copy_buffer = hba->dma_mem + MU_BUFFER_SIZE;
1145         hba->mu_status = MU_STATE_STARTING;
1146
1147         if (hba->cardtype == st_shasta) {
1148                 host->max_lun = 8;
1149                 host->max_id = 16 + 1;
1150         } else if (hba->cardtype == st_yosemite) {
1151                 host->max_lun = 128;
1152                 host->max_id = 1 + 1;
1153         } else {
1154                 /* st_vsc , st_vsc1 and st_seq */
1155                 host->max_lun = 1;
1156                 host->max_id = 128 + 1;
1157         }
1158         host->max_channel = 0;
1159         host->unique_id = host->host_no;
1160         host->max_cmd_len = STEX_CDB_LENGTH;
1161
1162         hba->host = host;
1163         hba->pdev = pdev;
1164         init_waitqueue_head(&hba->waitq);
1165
1166         err = request_irq(pdev->irq, stex_intr, IRQF_SHARED, DRV_NAME, hba);
1167         if (err) {
1168                 printk(KERN_ERR DRV_NAME "(%s): request irq failed\n",
1169                         pci_name(pdev));
1170                 goto out_pci_free;
1171         }
1172
1173         err = stex_handshake(hba);
1174         if (err)
1175                 goto out_free_irq;
1176
1177         err = scsi_init_shared_tag_map(host, host->can_queue);
1178         if (err) {
1179                 printk(KERN_ERR DRV_NAME "(%s): init shared queue failed\n",
1180                         pci_name(pdev));
1181                 goto out_free_irq;
1182         }
1183
1184         pci_set_drvdata(pdev, hba);
1185
1186         err = scsi_add_host(host, &pdev->dev);
1187         if (err) {
1188                 printk(KERN_ERR DRV_NAME "(%s): scsi_add_host failed\n",
1189                         pci_name(pdev));
1190                 goto out_free_irq;
1191         }
1192
1193         scsi_scan_host(host);
1194
1195         return 0;
1196
1197 out_free_irq:
1198         free_irq(pdev->irq, hba);
1199 out_pci_free:
1200         dma_free_coherent(&pdev->dev, hba->dma_size,
1201                           hba->dma_mem, hba->dma_handle);
1202 out_iounmap:
1203         iounmap(hba->mmio_base);
1204 out_release_regions:
1205         pci_release_regions(pdev);
1206 out_scsi_host_put:
1207         scsi_host_put(host);
1208 out_disable:
1209         pci_disable_device(pdev);
1210
1211         return err;
1212 }
1213
1214 static void stex_hba_stop(struct st_hba *hba)
1215 {
1216         struct req_msg *req;
1217         unsigned long flags;
1218         unsigned long before;
1219         u16 tag = 0;
1220
1221         spin_lock_irqsave(hba->host->host_lock, flags);
1222         req = stex_alloc_req(hba);
1223         memset(req->cdb, 0, STEX_CDB_LENGTH);
1224
1225         if (hba->cardtype == st_yosemite) {
1226                 req->cdb[0] = MGT_CMD;
1227                 req->cdb[1] = MGT_CMD_SIGNATURE;
1228                 req->cdb[2] = CTLR_CONFIG_CMD;
1229                 req->cdb[3] = CTLR_SHUTDOWN;
1230         } else {
1231                 req->cdb[0] = CONTROLLER_CMD;
1232                 req->cdb[1] = CTLR_POWER_STATE_CHANGE;
1233                 req->cdb[2] = CTLR_POWER_SAVING;
1234         }
1235
1236         hba->ccb[tag].cmd = NULL;
1237         hba->ccb[tag].sg_count = 0;
1238         hba->ccb[tag].sense_bufflen = 0;
1239         hba->ccb[tag].sense_buffer = NULL;
1240         hba->ccb[tag].req_type |= PASSTHRU_REQ_TYPE;
1241
1242         stex_send_cmd(hba, req, tag);
1243         spin_unlock_irqrestore(hba->host->host_lock, flags);
1244
1245         before = jiffies;
1246         while (hba->ccb[tag].req_type & PASSTHRU_REQ_TYPE) {
1247                 if (time_after(jiffies, before + ST_INTERNAL_TIMEOUT * HZ))
1248                         return;
1249                 msleep(10);
1250         }
1251 }
1252
1253 static void stex_hba_free(struct st_hba *hba)
1254 {
1255         free_irq(hba->pdev->irq, hba);
1256
1257         iounmap(hba->mmio_base);
1258
1259         pci_release_regions(hba->pdev);
1260
1261         dma_free_coherent(&hba->pdev->dev, hba->dma_size,
1262                           hba->dma_mem, hba->dma_handle);
1263 }
1264
1265 static void stex_remove(struct pci_dev *pdev)
1266 {
1267         struct st_hba *hba = pci_get_drvdata(pdev);
1268
1269         scsi_remove_host(hba->host);
1270
1271         pci_set_drvdata(pdev, NULL);
1272
1273         stex_hba_stop(hba);
1274
1275         stex_hba_free(hba);
1276
1277         scsi_host_put(hba->host);
1278
1279         pci_disable_device(pdev);
1280 }
1281
1282 static void stex_shutdown(struct pci_dev *pdev)
1283 {
1284         struct st_hba *hba = pci_get_drvdata(pdev);
1285
1286         stex_hba_stop(hba);
1287 }
1288
1289 static struct pci_device_id stex_pci_tbl[] = {
1290         /* st_shasta */
1291         { 0x105a, 0x8350, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
1292                 st_shasta }, /* SuperTrak EX8350/8300/16350/16300 */
1293         { 0x105a, 0xc350, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
1294                 st_shasta }, /* SuperTrak EX12350 */
1295         { 0x105a, 0x4302, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
1296                 st_shasta }, /* SuperTrak EX4350 */
1297         { 0x105a, 0xe350, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
1298                 st_shasta }, /* SuperTrak EX24350 */
1299
1300         /* st_vsc */
1301         { 0x105a, 0x7250, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_vsc },
1302
1303         /* st_yosemite */
1304         { 0x105a, 0x8650, PCI_ANY_ID, 0x4600, 0, 0,
1305                 st_yosemite }, /* SuperTrak EX4650 */
1306         { 0x105a, 0x8650, PCI_ANY_ID, 0x4610, 0, 0,
1307                 st_yosemite }, /* SuperTrak EX4650o */
1308         { 0x105a, 0x8650, PCI_ANY_ID, 0x8600, 0, 0,
1309                 st_yosemite }, /* SuperTrak EX8650EL */
1310         { 0x105a, 0x8650, PCI_ANY_ID, 0x8601, 0, 0,
1311                 st_yosemite }, /* SuperTrak EX8650 */
1312         { 0x105a, 0x8650, PCI_ANY_ID, 0x8602, 0, 0,
1313                 st_yosemite }, /* SuperTrak EX8654 */
1314         { 0x105a, 0x8650, PCI_ANY_ID, PCI_ANY_ID, 0, 0,
1315                 st_yosemite }, /* generic st_yosemite */
1316
1317         /* st_seq */
1318         { 0x105a, 0x3360, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_seq },
1319         { }     /* terminate list */
1320 };
1321 MODULE_DEVICE_TABLE(pci, stex_pci_tbl);
1322
1323 static struct pci_driver stex_pci_driver = {
1324         .name           = DRV_NAME,
1325         .id_table       = stex_pci_tbl,
1326         .probe          = stex_probe,
1327         .remove         = __devexit_p(stex_remove),
1328         .shutdown       = stex_shutdown,
1329 };
1330
1331 static int __init stex_init(void)
1332 {
1333         printk(KERN_INFO DRV_NAME
1334                 ": Promise SuperTrak EX Driver version: %s\n",
1335                  ST_DRIVER_VERSION);
1336
1337         return pci_register_driver(&stex_pci_driver);
1338 }
1339
1340 static void __exit stex_exit(void)
1341 {
1342         pci_unregister_driver(&stex_pci_driver);
1343 }
1344
1345 module_init(stex_init);
1346 module_exit(stex_exit);