2 * Universal Flash Storage Host controller driver Core
4 * This code is based on drivers/scsi/ufs/ufshcd.c
5 * Copyright (C) 2011-2013 Samsung India Software Operations
8 * Santosh Yaraganavi <santosh.sy@samsung.com>
9 * Vinayak Holikatti <h.vinayak@samsung.com>
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version 2
14 * of the License, or (at your option) any later version.
15 * See the COPYING file in the top-level directory or visit
16 * <http://www.gnu.org/licenses/gpl-2.0.html>
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * This program is provided "AS IS" and "WITH ALL FAULTS" and
24 * without warranty of any kind. You are solely responsible for
25 * determining the appropriateness of using and distributing
26 * the program and assume all risks associated with your exercise
27 * of rights with respect to the program, including but not limited
28 * to infringement of third party rights, the risks and costs of
29 * program errors, damage to or loss of data, programs or equipment,
30 * and unavailability or interruption of operations. Under no
31 * circumstances will the contributor of this Program be liable for
32 * any damages of any kind arising from your use or distribution of
36 #include <linux/async.h>
40 #define UFSHCD_ENABLE_INTRS (UTP_TRANSFER_REQ_COMPL |\
43 /* UIC command timeout, unit: ms */
44 #define UIC_CMD_TIMEOUT 500
47 UFSHCD_MAX_CHANNEL = 0,
50 UFSHCD_CMD_PER_LUN = 32,
51 UFSHCD_CAN_QUEUE = 32,
56 UFSHCD_STATE_OPERATIONAL,
61 /* Interrupt configuration options */
68 /* Interrupt aggregation options */
75 * ufshcd_get_intr_mask - Get the interrupt bit mask
76 * @hba - Pointer to adapter instance
78 * Returns interrupt bit mask per version
80 static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
82 if (hba->ufs_version == UFSHCI_VERSION_10)
83 return INTERRUPT_MASK_ALL_VER_10;
85 return INTERRUPT_MASK_ALL_VER_11;
89 * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
90 * @hba - Pointer to adapter instance
92 * Returns UFSHCI version supported by the controller
94 static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
96 return ufshcd_readl(hba, REG_UFS_VERSION);
100 * ufshcd_is_device_present - Check if any device connected to
101 * the host controller
102 * @reg_hcs - host controller status register value
104 * Returns 1 if device present, 0 if no device detected
106 static inline int ufshcd_is_device_present(u32 reg_hcs)
108 return (DEVICE_PRESENT & reg_hcs) ? 1 : 0;
112 * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
113 * @lrb: pointer to local command reference block
115 * This function is used to get the OCS field from UTRD
116 * Returns the OCS field in the UTRD
118 static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
120 return lrbp->utr_descriptor_ptr->header.dword_2 & MASK_OCS;
124 * ufshcd_get_tmr_ocs - Get the UTMRD Overall Command Status
125 * @task_req_descp: pointer to utp_task_req_desc structure
127 * This function is used to get the OCS field from UTMRD
128 * Returns the OCS field in the UTMRD
131 ufshcd_get_tmr_ocs(struct utp_task_req_desc *task_req_descp)
133 return task_req_descp->header.dword_2 & MASK_OCS;
137 * ufshcd_get_tm_free_slot - get a free slot for task management request
138 * @hba: per adapter instance
140 * Returns maximum number of task management request slots in case of
141 * task management queue full or returns the free slot number
143 static inline int ufshcd_get_tm_free_slot(struct ufs_hba *hba)
145 return find_first_zero_bit(&hba->outstanding_tasks, hba->nutmrs);
149 * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
150 * @hba: per adapter instance
151 * @pos: position of the bit to be cleared
153 static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
155 ufshcd_writel(hba, ~(1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
159 * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
160 * @reg: Register value of host controller status
162 * Returns integer, 0 on Success and positive value if failed
164 static inline int ufshcd_get_lists_status(u32 reg)
167 * The mask 0xFF is for the following HCS register bits
177 return (((reg) & (0xFF)) >> 1) ^ (0x07);
181 * ufshcd_get_uic_cmd_result - Get the UIC command result
182 * @hba: Pointer to adapter instance
184 * This function gets the result of UIC command completion
185 * Returns 0 on success, non zero value on error
187 static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
189 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
190 MASK_UIC_COMMAND_RESULT;
194 * ufshcd_is_valid_req_rsp - checks if controller TR response is valid
195 * @ucd_rsp_ptr: pointer to response UPIU
197 * This function checks the response UPIU for valid transaction type in
199 * Returns 0 on success, non-zero on failure
202 ufshcd_is_valid_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
204 return ((be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24) ==
205 UPIU_TRANSACTION_RESPONSE) ? 0 : DID_ERROR << 16;
209 * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
210 * @ucd_rsp_ptr: pointer to response UPIU
212 * This function gets the response status and scsi_status from response UPIU
213 * Returns the response result code.
216 ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
218 return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
222 * ufshcd_config_int_aggr - Configure interrupt aggregation values.
223 * Currently there is no use case where we want to configure
224 * interrupt aggregation dynamically. So to configure interrupt
225 * aggregation, #define INT_AGGR_COUNTER_THRESHOLD_VALUE and
226 * INT_AGGR_TIMEOUT_VALUE are used.
227 * @hba: per adapter instance
228 * @option: Interrupt aggregation option
231 ufshcd_config_int_aggr(struct ufs_hba *hba, int option)
235 ufshcd_writel(hba, INT_AGGR_ENABLE |
236 INT_AGGR_COUNTER_AND_TIMER_RESET,
237 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
239 case INT_AGGR_CONFIG:
240 ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
241 INT_AGGR_COUNTER_THRESHOLD_VALUE |
242 INT_AGGR_TIMEOUT_VALUE,
243 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
249 * ufshcd_enable_run_stop_reg - Enable run-stop registers,
250 * When run-stop registers are set to 1, it indicates the
251 * host controller that it can process the requests
252 * @hba: per adapter instance
254 static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
256 ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
257 REG_UTP_TASK_REQ_LIST_RUN_STOP);
258 ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
259 REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
263 * ufshcd_hba_start - Start controller initialization sequence
264 * @hba: per adapter instance
266 static inline void ufshcd_hba_start(struct ufs_hba *hba)
268 ufshcd_writel(hba, CONTROLLER_ENABLE, REG_CONTROLLER_ENABLE);
272 * ufshcd_is_hba_active - Get controller state
273 * @hba: per adapter instance
275 * Returns zero if controller is active, 1 otherwise
277 static inline int ufshcd_is_hba_active(struct ufs_hba *hba)
279 return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & 0x1) ? 0 : 1;
283 * ufshcd_send_command - Send SCSI or device management commands
284 * @hba: per adapter instance
285 * @task_tag: Task tag of the command
288 void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
290 __set_bit(task_tag, &hba->outstanding_reqs);
291 ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
295 * ufshcd_copy_sense_data - Copy sense data in case of check condition
296 * @lrb - pointer to local reference block
298 static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
301 if (lrbp->sense_buffer) {
302 len = be16_to_cpu(lrbp->ucd_rsp_ptr->sense_data_len);
303 memcpy(lrbp->sense_buffer,
304 lrbp->ucd_rsp_ptr->sense_data,
305 min_t(int, len, SCSI_SENSE_BUFFERSIZE));
310 * ufshcd_hba_capabilities - Read controller capabilities
311 * @hba: per adapter instance
313 static inline void ufshcd_hba_capabilities(struct ufs_hba *hba)
315 hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
317 /* nutrs and nutmrs are 0 based values */
318 hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
320 ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
324 * ufshcd_ready_for_uic_cmd - Check if controller is ready
325 * to accept UIC commands
326 * @hba: per adapter instance
327 * Return true on success, else false
329 static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
331 if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
338 * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
339 * @hba: per adapter instance
340 * @uic_cmd: UIC command
342 * Mutex must be held.
345 ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
347 WARN_ON(hba->active_uic_cmd);
349 hba->active_uic_cmd = uic_cmd;
352 ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
353 ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
354 ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
357 ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
362 * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
363 * @hba: per adapter instance
364 * @uic_command: UIC command
366 * Must be called with mutex held.
367 * Returns 0 only if success.
370 ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
375 if (wait_for_completion_timeout(&uic_cmd->done,
376 msecs_to_jiffies(UIC_CMD_TIMEOUT)))
377 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
381 spin_lock_irqsave(hba->host->host_lock, flags);
382 hba->active_uic_cmd = NULL;
383 spin_unlock_irqrestore(hba->host->host_lock, flags);
389 * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
390 * @hba: per adapter instance
391 * @uic_cmd: UIC command
393 * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
395 * Returns 0 only if success.
398 __ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
403 if (!ufshcd_ready_for_uic_cmd(hba)) {
405 "Controller not ready to accept UIC commands\n");
409 init_completion(&uic_cmd->done);
411 spin_lock_irqsave(hba->host->host_lock, flags);
412 ufshcd_dispatch_uic_cmd(hba, uic_cmd);
413 spin_unlock_irqrestore(hba->host->host_lock, flags);
415 ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
421 * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
422 * @hba: per adapter instance
423 * @uic_cmd: UIC command
425 * Returns 0 only if success.
428 ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
432 mutex_lock(&hba->uic_cmd_mutex);
433 ret = __ufshcd_send_uic_cmd(hba, uic_cmd);
434 mutex_unlock(&hba->uic_cmd_mutex);
440 * ufshcd_map_sg - Map scatter-gather list to prdt
441 * @lrbp - pointer to local reference block
443 * Returns 0 in case of success, non-zero value in case of failure
445 static int ufshcd_map_sg(struct ufshcd_lrb *lrbp)
447 struct ufshcd_sg_entry *prd_table;
448 struct scatterlist *sg;
449 struct scsi_cmnd *cmd;
454 sg_segments = scsi_dma_map(cmd);
459 lrbp->utr_descriptor_ptr->prd_table_length =
460 cpu_to_le16((u16) (sg_segments));
462 prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
464 scsi_for_each_sg(cmd, sg, sg_segments, i) {
466 cpu_to_le32(((u32) sg_dma_len(sg))-1);
467 prd_table[i].base_addr =
468 cpu_to_le32(lower_32_bits(sg->dma_address));
469 prd_table[i].upper_addr =
470 cpu_to_le32(upper_32_bits(sg->dma_address));
473 lrbp->utr_descriptor_ptr->prd_table_length = 0;
480 * ufshcd_enable_intr - enable interrupts
481 * @hba: per adapter instance
482 * @intrs: interrupt bits
484 static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
486 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
488 if (hba->ufs_version == UFSHCI_VERSION_10) {
490 rw = set & INTERRUPT_MASK_RW_VER_10;
491 set = rw | ((set ^ intrs) & intrs);
496 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
500 * ufshcd_disable_intr - disable interrupts
501 * @hba: per adapter instance
502 * @intrs: interrupt bits
504 static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
506 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
508 if (hba->ufs_version == UFSHCI_VERSION_10) {
510 rw = (set & INTERRUPT_MASK_RW_VER_10) &
511 ~(intrs & INTERRUPT_MASK_RW_VER_10);
512 set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
518 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
522 * ufshcd_compose_upiu - form UFS Protocol Information Unit(UPIU)
523 * @lrb - pointer to local reference block
525 static void ufshcd_compose_upiu(struct ufshcd_lrb *lrbp)
527 struct utp_transfer_req_desc *req_desc;
528 struct utp_upiu_cmd *ucd_cmd_ptr;
532 ucd_cmd_ptr = lrbp->ucd_cmd_ptr;
533 req_desc = lrbp->utr_descriptor_ptr;
535 switch (lrbp->command_type) {
536 case UTP_CMD_TYPE_SCSI:
537 if (lrbp->cmd->sc_data_direction == DMA_FROM_DEVICE) {
538 data_direction = UTP_DEVICE_TO_HOST;
539 upiu_flags = UPIU_CMD_FLAGS_READ;
540 } else if (lrbp->cmd->sc_data_direction == DMA_TO_DEVICE) {
541 data_direction = UTP_HOST_TO_DEVICE;
542 upiu_flags = UPIU_CMD_FLAGS_WRITE;
544 data_direction = UTP_NO_DATA_TRANSFER;
545 upiu_flags = UPIU_CMD_FLAGS_NONE;
548 /* Transfer request descriptor header fields */
549 req_desc->header.dword_0 =
550 cpu_to_le32(data_direction | UTP_SCSI_COMMAND);
553 * assigning invalid value for command status. Controller
554 * updates OCS on command completion, with the command
557 req_desc->header.dword_2 =
558 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
560 /* command descriptor fields */
561 ucd_cmd_ptr->header.dword_0 =
562 cpu_to_be32(UPIU_HEADER_DWORD(UPIU_TRANSACTION_COMMAND,
566 ucd_cmd_ptr->header.dword_1 =
568 UPIU_HEADER_DWORD(UPIU_COMMAND_SET_TYPE_SCSI,
573 /* Total EHS length and Data segment length will be zero */
574 ucd_cmd_ptr->header.dword_2 = 0;
576 ucd_cmd_ptr->exp_data_transfer_len =
577 cpu_to_be32(lrbp->cmd->sdb.length);
579 memcpy(ucd_cmd_ptr->cdb,
581 (min_t(unsigned short,
585 case UTP_CMD_TYPE_DEV_MANAGE:
586 /* For query function implementation */
588 case UTP_CMD_TYPE_UFS:
589 /* For UFS native command implementation */
591 } /* end of switch */
595 * ufshcd_queuecommand - main entry point for SCSI requests
596 * @cmd: command from SCSI Midlayer
597 * @done: call back function
599 * Returns 0 for success, non-zero in case of failure
601 static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
603 struct ufshcd_lrb *lrbp;
609 hba = shost_priv(host);
611 tag = cmd->request->tag;
613 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
614 err = SCSI_MLQUEUE_HOST_BUSY;
618 lrbp = &hba->lrb[tag];
621 lrbp->sense_bufflen = SCSI_SENSE_BUFFERSIZE;
622 lrbp->sense_buffer = cmd->sense_buffer;
623 lrbp->task_tag = tag;
624 lrbp->lun = cmd->device->lun;
626 lrbp->command_type = UTP_CMD_TYPE_SCSI;
628 /* form UPIU before issuing the command */
629 ufshcd_compose_upiu(lrbp);
630 err = ufshcd_map_sg(lrbp);
634 /* issue command to the controller */
635 spin_lock_irqsave(hba->host->host_lock, flags);
636 ufshcd_send_command(hba, tag);
637 spin_unlock_irqrestore(hba->host->host_lock, flags);
643 * ufshcd_memory_alloc - allocate memory for host memory space data structures
644 * @hba: per adapter instance
646 * 1. Allocate DMA memory for Command Descriptor array
647 * Each command descriptor consist of Command UPIU, Response UPIU and PRDT
648 * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
649 * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
651 * 4. Allocate memory for local reference block(lrb).
653 * Returns 0 for success, non-zero in case of failure
655 static int ufshcd_memory_alloc(struct ufs_hba *hba)
657 size_t utmrdl_size, utrdl_size, ucdl_size;
659 /* Allocate memory for UTP command descriptors */
660 ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
661 hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
667 * UFSHCI requires UTP command descriptor to be 128 byte aligned.
668 * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
669 * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
670 * be aligned to 128 bytes as well
672 if (!hba->ucdl_base_addr ||
673 WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
675 "Command Descriptor Memory allocation failed\n");
680 * Allocate memory for UTP Transfer descriptors
681 * UFSHCI requires 1024 byte alignment of UTRD
683 utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
684 hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
686 &hba->utrdl_dma_addr,
688 if (!hba->utrdl_base_addr ||
689 WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
691 "Transfer Descriptor Memory allocation failed\n");
696 * Allocate memory for UTP Task Management descriptors
697 * UFSHCI requires 1024 byte alignment of UTMRD
699 utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
700 hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
702 &hba->utmrdl_dma_addr,
704 if (!hba->utmrdl_base_addr ||
705 WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
707 "Task Management Descriptor Memory allocation failed\n");
711 /* Allocate memory for local reference block */
712 hba->lrb = devm_kzalloc(hba->dev,
713 hba->nutrs * sizeof(struct ufshcd_lrb),
716 dev_err(hba->dev, "LRB Memory allocation failed\n");
725 * ufshcd_host_memory_configure - configure local reference block with
727 * @hba: per adapter instance
729 * Configure Host memory space
730 * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
732 * 2. Update each UTRD with Response UPIU offset, Response UPIU length
734 * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
735 * into local reference block.
737 static void ufshcd_host_memory_configure(struct ufs_hba *hba)
739 struct utp_transfer_cmd_desc *cmd_descp;
740 struct utp_transfer_req_desc *utrdlp;
741 dma_addr_t cmd_desc_dma_addr;
742 dma_addr_t cmd_desc_element_addr;
748 utrdlp = hba->utrdl_base_addr;
749 cmd_descp = hba->ucdl_base_addr;
752 offsetof(struct utp_transfer_cmd_desc, response_upiu);
754 offsetof(struct utp_transfer_cmd_desc, prd_table);
756 cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
757 cmd_desc_dma_addr = hba->ucdl_dma_addr;
759 for (i = 0; i < hba->nutrs; i++) {
760 /* Configure UTRD with command descriptor base address */
761 cmd_desc_element_addr =
762 (cmd_desc_dma_addr + (cmd_desc_size * i));
763 utrdlp[i].command_desc_base_addr_lo =
764 cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
765 utrdlp[i].command_desc_base_addr_hi =
766 cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
768 /* Response upiu and prdt offset should be in double words */
769 utrdlp[i].response_upiu_offset =
770 cpu_to_le16((response_offset >> 2));
771 utrdlp[i].prd_table_offset =
772 cpu_to_le16((prdt_offset >> 2));
773 utrdlp[i].response_upiu_length =
774 cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
776 hba->lrb[i].utr_descriptor_ptr = (utrdlp + i);
777 hba->lrb[i].ucd_cmd_ptr =
778 (struct utp_upiu_cmd *)(cmd_descp + i);
779 hba->lrb[i].ucd_rsp_ptr =
780 (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
781 hba->lrb[i].ucd_prdt_ptr =
782 (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
787 * ufshcd_dme_link_startup - Notify Unipro to perform link startup
788 * @hba: per adapter instance
790 * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
791 * in order to initialize the Unipro link startup procedure.
792 * Once the Unipro links are up, the device connected to the controller
795 * Returns 0 on success, non-zero value on failure
797 static int ufshcd_dme_link_startup(struct ufs_hba *hba)
799 struct uic_command uic_cmd = {0};
802 uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
804 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
807 "dme-link-startup: error code %d\n", ret);
812 * ufshcd_make_hba_operational - Make UFS controller operational
813 * @hba: per adapter instance
815 * To bring UFS host controller to operational state,
816 * 1. Check if device is present
817 * 2. Enable required interrupts
818 * 3. Configure interrupt aggregation
819 * 4. Program UTRL and UTMRL base addres
820 * 5. Configure run-stop-registers
822 * Returns 0 on success, non-zero value on failure
824 static int ufshcd_make_hba_operational(struct ufs_hba *hba)
829 /* check if device present */
830 reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
831 if (!ufshcd_is_device_present(reg)) {
832 dev_err(hba->dev, "cc: Device not present\n");
837 /* Enable required interrupts */
838 ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
840 /* Configure interrupt aggregation */
841 ufshcd_config_int_aggr(hba, INT_AGGR_CONFIG);
843 /* Configure UTRL and UTMRL base address registers */
844 ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
845 REG_UTP_TRANSFER_REQ_LIST_BASE_L);
846 ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
847 REG_UTP_TRANSFER_REQ_LIST_BASE_H);
848 ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
849 REG_UTP_TASK_REQ_LIST_BASE_L);
850 ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
851 REG_UTP_TASK_REQ_LIST_BASE_H);
854 * UCRDY, UTMRLDY and UTRLRDY bits must be 1
855 * DEI, HEI bits must be 0
857 if (!(ufshcd_get_lists_status(reg))) {
858 ufshcd_enable_run_stop_reg(hba);
861 "Host controller not ready to process requests");
866 if (hba->ufshcd_state == UFSHCD_STATE_RESET)
867 scsi_unblock_requests(hba->host);
869 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
876 * ufshcd_hba_enable - initialize the controller
877 * @hba: per adapter instance
879 * The controller resets itself and controller firmware initialization
880 * sequence kicks off. When controller is ready it will set
881 * the Host Controller Enable bit to 1.
883 * Returns 0 on success, non-zero value on failure
885 static int ufshcd_hba_enable(struct ufs_hba *hba)
890 * msleep of 1 and 5 used in this function might result in msleep(20),
891 * but it was necessary to send the UFS FPGA to reset mode during
892 * development and testing of this driver. msleep can be changed to
893 * mdelay and retry count can be reduced based on the controller.
895 if (!ufshcd_is_hba_active(hba)) {
897 /* change controller state to "reset state" */
898 ufshcd_hba_stop(hba);
901 * This delay is based on the testing done with UFS host
902 * controller FPGA. The delay can be changed based on the
903 * host controller used.
908 /* start controller initialization sequence */
909 ufshcd_hba_start(hba);
912 * To initialize a UFS host controller HCE bit must be set to 1.
913 * During initialization the HCE bit value changes from 1->0->1.
914 * When the host controller completes initialization sequence
915 * it sets the value of HCE bit to 1. The same HCE bit is read back
916 * to check if the controller has completed initialization sequence.
917 * So without this delay the value HCE = 1, set in the previous
918 * instruction might be read back.
919 * This delay can be changed based on the controller.
923 /* wait for the host controller to complete initialization */
925 while (ufshcd_is_hba_active(hba)) {
930 "Controller enable failed\n");
939 * ufshcd_link_startup - Initialize unipro link startup
940 * @hba: per adapter instance
942 * Returns 0 for success, non-zero in case of failure
944 static int ufshcd_link_startup(struct ufs_hba *hba)
948 /* enable UIC related interrupts */
949 ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
951 ret = ufshcd_dme_link_startup(hba);
955 ret = ufshcd_make_hba_operational(hba);
959 dev_err(hba->dev, "link startup failed %d\n", ret);
964 * ufshcd_do_reset - reset the host controller
965 * @hba: per adapter instance
967 * Returns SUCCESS/FAILED
969 static int ufshcd_do_reset(struct ufs_hba *hba)
971 struct ufshcd_lrb *lrbp;
975 /* block commands from midlayer */
976 scsi_block_requests(hba->host);
978 spin_lock_irqsave(hba->host->host_lock, flags);
979 hba->ufshcd_state = UFSHCD_STATE_RESET;
981 /* send controller to reset state */
982 ufshcd_hba_stop(hba);
983 spin_unlock_irqrestore(hba->host->host_lock, flags);
985 /* abort outstanding commands */
986 for (tag = 0; tag < hba->nutrs; tag++) {
987 if (test_bit(tag, &hba->outstanding_reqs)) {
988 lrbp = &hba->lrb[tag];
989 scsi_dma_unmap(lrbp->cmd);
990 lrbp->cmd->result = DID_RESET << 16;
991 lrbp->cmd->scsi_done(lrbp->cmd);
996 /* clear outstanding request/task bit maps */
997 hba->outstanding_reqs = 0;
998 hba->outstanding_tasks = 0;
1000 /* Host controller enable */
1001 if (ufshcd_hba_enable(hba)) {
1003 "Reset: Controller initialization failed\n");
1007 if (ufshcd_link_startup(hba)) {
1009 "Reset: Link start-up failed\n");
1017 * ufshcd_slave_alloc - handle initial SCSI device configurations
1018 * @sdev: pointer to SCSI device
1022 static int ufshcd_slave_alloc(struct scsi_device *sdev)
1024 struct ufs_hba *hba;
1026 hba = shost_priv(sdev->host);
1027 sdev->tagged_supported = 1;
1029 /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
1030 sdev->use_10_for_ms = 1;
1031 scsi_set_tag_type(sdev, MSG_SIMPLE_TAG);
1034 * Inform SCSI Midlayer that the LUN queue depth is same as the
1035 * controller queue depth. If a LUN queue depth is less than the
1036 * controller queue depth and if the LUN reports
1037 * SAM_STAT_TASK_SET_FULL, the LUN queue depth will be adjusted
1038 * with scsi_adjust_queue_depth.
1040 scsi_activate_tcq(sdev, hba->nutrs);
1045 * ufshcd_slave_destroy - remove SCSI device configurations
1046 * @sdev: pointer to SCSI device
1048 static void ufshcd_slave_destroy(struct scsi_device *sdev)
1050 struct ufs_hba *hba;
1052 hba = shost_priv(sdev->host);
1053 scsi_deactivate_tcq(sdev, hba->nutrs);
1057 * ufshcd_task_req_compl - handle task management request completion
1058 * @hba: per adapter instance
1059 * @index: index of the completed request
1061 * Returns SUCCESS/FAILED
1063 static int ufshcd_task_req_compl(struct ufs_hba *hba, u32 index)
1065 struct utp_task_req_desc *task_req_descp;
1066 struct utp_upiu_task_rsp *task_rsp_upiup;
1067 unsigned long flags;
1071 spin_lock_irqsave(hba->host->host_lock, flags);
1073 /* Clear completed tasks from outstanding_tasks */
1074 __clear_bit(index, &hba->outstanding_tasks);
1076 task_req_descp = hba->utmrdl_base_addr;
1077 ocs_value = ufshcd_get_tmr_ocs(&task_req_descp[index]);
1079 if (ocs_value == OCS_SUCCESS) {
1080 task_rsp_upiup = (struct utp_upiu_task_rsp *)
1081 task_req_descp[index].task_rsp_upiu;
1082 task_result = be32_to_cpu(task_rsp_upiup->header.dword_1);
1083 task_result = ((task_result & MASK_TASK_RESPONSE) >> 8);
1085 if (task_result != UPIU_TASK_MANAGEMENT_FUNC_COMPL &&
1086 task_result != UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED)
1087 task_result = FAILED;
1089 task_result = SUCCESS;
1091 task_result = FAILED;
1093 "trc: Invalid ocs = %x\n", ocs_value);
1095 spin_unlock_irqrestore(hba->host->host_lock, flags);
1100 * ufshcd_adjust_lun_qdepth - Update LUN queue depth if device responds with
1101 * SAM_STAT_TASK_SET_FULL SCSI command status.
1102 * @cmd: pointer to SCSI command
1104 static void ufshcd_adjust_lun_qdepth(struct scsi_cmnd *cmd)
1106 struct ufs_hba *hba;
1110 hba = shost_priv(cmd->device->host);
1113 * LUN queue depth can be obtained by counting outstanding commands
1116 for (i = 0; i < hba->nutrs; i++) {
1117 if (test_bit(i, &hba->outstanding_reqs)) {
1120 * Check if the outstanding command belongs
1121 * to the LUN which reported SAM_STAT_TASK_SET_FULL.
1123 if (cmd->device->lun == hba->lrb[i].lun)
1129 * LUN queue depth will be total outstanding commands, except the
1130 * command for which the LUN reported SAM_STAT_TASK_SET_FULL.
1132 scsi_adjust_queue_depth(cmd->device, MSG_SIMPLE_TAG, lun_qdepth - 1);
1136 * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
1137 * @lrb: pointer to local reference block of completed command
1138 * @scsi_status: SCSI command status
1140 * Returns value base on SCSI command status
1143 ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
1147 switch (scsi_status) {
1149 result |= DID_OK << 16 |
1150 COMMAND_COMPLETE << 8 |
1153 case SAM_STAT_CHECK_CONDITION:
1154 result |= DID_OK << 16 |
1155 COMMAND_COMPLETE << 8 |
1156 SAM_STAT_CHECK_CONDITION;
1157 ufshcd_copy_sense_data(lrbp);
1160 result |= SAM_STAT_BUSY;
1162 case SAM_STAT_TASK_SET_FULL:
1165 * If a LUN reports SAM_STAT_TASK_SET_FULL, then the LUN queue
1166 * depth needs to be adjusted to the exact number of
1167 * outstanding commands the LUN can handle at any given time.
1169 ufshcd_adjust_lun_qdepth(lrbp->cmd);
1170 result |= SAM_STAT_TASK_SET_FULL;
1172 case SAM_STAT_TASK_ABORTED:
1173 result |= SAM_STAT_TASK_ABORTED;
1176 result |= DID_ERROR << 16;
1178 } /* end of switch */
1184 * ufshcd_transfer_rsp_status - Get overall status of the response
1185 * @hba: per adapter instance
1186 * @lrb: pointer to local reference block of completed command
1188 * Returns result of the command to notify SCSI midlayer
1191 ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
1197 /* overall command status of utrd */
1198 ocs = ufshcd_get_tr_ocs(lrbp);
1203 /* check if the returned transfer response is valid */
1204 result = ufshcd_is_valid_req_rsp(lrbp->ucd_rsp_ptr);
1207 "Invalid response = %x\n", result);
1212 * get the response UPIU result to extract
1213 * the SCSI command status
1215 result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
1218 * get the result based on SCSI status response
1219 * to notify the SCSI midlayer of the command status
1221 scsi_status = result & MASK_SCSI_STATUS;
1222 result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
1225 result |= DID_ABORT << 16;
1227 case OCS_INVALID_CMD_TABLE_ATTR:
1228 case OCS_INVALID_PRDT_ATTR:
1229 case OCS_MISMATCH_DATA_BUF_SIZE:
1230 case OCS_MISMATCH_RESP_UPIU_SIZE:
1231 case OCS_PEER_COMM_FAILURE:
1232 case OCS_FATAL_ERROR:
1234 result |= DID_ERROR << 16;
1236 "OCS error from controller = %x\n", ocs);
1238 } /* end of switch */
1244 * ufshcd_uic_cmd_compl - handle completion of uic command
1245 * @hba: per adapter instance
1247 static void ufshcd_uic_cmd_compl(struct ufs_hba *hba)
1249 if (hba->active_uic_cmd) {
1250 hba->active_uic_cmd->argument2 |=
1251 ufshcd_get_uic_cmd_result(hba);
1252 complete(&hba->active_uic_cmd->done);
1257 * ufshcd_transfer_req_compl - handle SCSI and query command completion
1258 * @hba: per adapter instance
1260 static void ufshcd_transfer_req_compl(struct ufs_hba *hba)
1262 struct ufshcd_lrb *lrb;
1263 unsigned long completed_reqs;
1269 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
1270 completed_reqs = tr_doorbell ^ hba->outstanding_reqs;
1272 for (index = 0; index < hba->nutrs; index++) {
1273 if (test_bit(index, &completed_reqs)) {
1275 result = ufshcd_transfer_rsp_status(hba, &lrb[index]);
1277 if (lrb[index].cmd) {
1278 scsi_dma_unmap(lrb[index].cmd);
1279 lrb[index].cmd->result = result;
1280 lrb[index].cmd->scsi_done(lrb[index].cmd);
1282 /* Mark completed command as NULL in LRB */
1283 lrb[index].cmd = NULL;
1288 /* clear corresponding bits of completed commands */
1289 hba->outstanding_reqs ^= completed_reqs;
1291 /* Reset interrupt aggregation counters */
1292 ufshcd_config_int_aggr(hba, INT_AGGR_RESET);
1296 * ufshcd_fatal_err_handler - handle fatal errors
1297 * @hba: per adapter instance
1299 static void ufshcd_fatal_err_handler(struct work_struct *work)
1301 struct ufs_hba *hba;
1302 hba = container_of(work, struct ufs_hba, feh_workq);
1304 /* check if reset is already in progress */
1305 if (hba->ufshcd_state != UFSHCD_STATE_RESET)
1306 ufshcd_do_reset(hba);
1310 * ufshcd_err_handler - Check for fatal errors
1311 * @work: pointer to a work queue structure
1313 static void ufshcd_err_handler(struct ufs_hba *hba)
1317 if (hba->errors & INT_FATAL_ERRORS)
1320 if (hba->errors & UIC_ERROR) {
1321 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
1322 if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
1327 hba->ufshcd_state = UFSHCD_STATE_ERROR;
1328 schedule_work(&hba->feh_workq);
1332 * ufshcd_tmc_handler - handle task management function completion
1333 * @hba: per adapter instance
1335 static void ufshcd_tmc_handler(struct ufs_hba *hba)
1339 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
1340 hba->tm_condition = tm_doorbell ^ hba->outstanding_tasks;
1341 wake_up_interruptible(&hba->ufshcd_tm_wait_queue);
1345 * ufshcd_sl_intr - Interrupt service routine
1346 * @hba: per adapter instance
1347 * @intr_status: contains interrupts generated by the controller
1349 static void ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
1351 hba->errors = UFSHCD_ERROR_MASK & intr_status;
1353 ufshcd_err_handler(hba);
1355 if (intr_status & UIC_COMMAND_COMPL)
1356 ufshcd_uic_cmd_compl(hba);
1358 if (intr_status & UTP_TASK_REQ_COMPL)
1359 ufshcd_tmc_handler(hba);
1361 if (intr_status & UTP_TRANSFER_REQ_COMPL)
1362 ufshcd_transfer_req_compl(hba);
1366 * ufshcd_intr - Main interrupt service routine
1368 * @__hba: pointer to adapter instance
1370 * Returns IRQ_HANDLED - If interrupt is valid
1371 * IRQ_NONE - If invalid interrupt
1373 static irqreturn_t ufshcd_intr(int irq, void *__hba)
1376 irqreturn_t retval = IRQ_NONE;
1377 struct ufs_hba *hba = __hba;
1379 spin_lock(hba->host->host_lock);
1380 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
1383 ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
1384 ufshcd_sl_intr(hba, intr_status);
1385 retval = IRQ_HANDLED;
1387 spin_unlock(hba->host->host_lock);
1392 * ufshcd_issue_tm_cmd - issues task management commands to controller
1393 * @hba: per adapter instance
1394 * @lrbp: pointer to local reference block
1396 * Returns SUCCESS/FAILED
1399 ufshcd_issue_tm_cmd(struct ufs_hba *hba,
1400 struct ufshcd_lrb *lrbp,
1403 struct utp_task_req_desc *task_req_descp;
1404 struct utp_upiu_task_req *task_req_upiup;
1405 struct Scsi_Host *host;
1406 unsigned long flags;
1412 spin_lock_irqsave(host->host_lock, flags);
1414 /* If task management queue is full */
1415 free_slot = ufshcd_get_tm_free_slot(hba);
1416 if (free_slot >= hba->nutmrs) {
1417 spin_unlock_irqrestore(host->host_lock, flags);
1418 dev_err(hba->dev, "Task management queue full\n");
1423 task_req_descp = hba->utmrdl_base_addr;
1424 task_req_descp += free_slot;
1426 /* Configure task request descriptor */
1427 task_req_descp->header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
1428 task_req_descp->header.dword_2 =
1429 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
1431 /* Configure task request UPIU */
1433 (struct utp_upiu_task_req *) task_req_descp->task_req_upiu;
1434 task_req_upiup->header.dword_0 =
1435 cpu_to_be32(UPIU_HEADER_DWORD(UPIU_TRANSACTION_TASK_REQ, 0,
1436 lrbp->lun, lrbp->task_tag));
1437 task_req_upiup->header.dword_1 =
1438 cpu_to_be32(UPIU_HEADER_DWORD(0, tm_function, 0, 0));
1440 task_req_upiup->input_param1 = lrbp->lun;
1441 task_req_upiup->input_param1 =
1442 cpu_to_be32(task_req_upiup->input_param1);
1443 task_req_upiup->input_param2 = lrbp->task_tag;
1444 task_req_upiup->input_param2 =
1445 cpu_to_be32(task_req_upiup->input_param2);
1447 /* send command to the controller */
1448 __set_bit(free_slot, &hba->outstanding_tasks);
1449 ufshcd_writel(hba, 1 << free_slot, REG_UTP_TASK_REQ_DOOR_BELL);
1451 spin_unlock_irqrestore(host->host_lock, flags);
1453 /* wait until the task management command is completed */
1455 wait_event_interruptible_timeout(hba->ufshcd_tm_wait_queue,
1456 (test_bit(free_slot,
1457 &hba->tm_condition) != 0),
1461 "Task management command timed-out\n");
1465 clear_bit(free_slot, &hba->tm_condition);
1466 err = ufshcd_task_req_compl(hba, free_slot);
1472 * ufshcd_device_reset - reset device and abort all the pending commands
1473 * @cmd: SCSI command pointer
1475 * Returns SUCCESS/FAILED
1477 static int ufshcd_device_reset(struct scsi_cmnd *cmd)
1479 struct Scsi_Host *host;
1480 struct ufs_hba *hba;
1485 host = cmd->device->host;
1486 hba = shost_priv(host);
1487 tag = cmd->request->tag;
1489 err = ufshcd_issue_tm_cmd(hba, &hba->lrb[tag], UFS_LOGICAL_RESET);
1493 for (pos = 0; pos < hba->nutrs; pos++) {
1494 if (test_bit(pos, &hba->outstanding_reqs) &&
1495 (hba->lrb[tag].lun == hba->lrb[pos].lun)) {
1497 /* clear the respective UTRLCLR register bit */
1498 ufshcd_utrl_clear(hba, pos);
1500 clear_bit(pos, &hba->outstanding_reqs);
1502 if (hba->lrb[pos].cmd) {
1503 scsi_dma_unmap(hba->lrb[pos].cmd);
1504 hba->lrb[pos].cmd->result =
1506 hba->lrb[pos].cmd->scsi_done(cmd);
1507 hba->lrb[pos].cmd = NULL;
1516 * ufshcd_host_reset - Main reset function registered with scsi layer
1517 * @cmd: SCSI command pointer
1519 * Returns SUCCESS/FAILED
1521 static int ufshcd_host_reset(struct scsi_cmnd *cmd)
1523 struct ufs_hba *hba;
1525 hba = shost_priv(cmd->device->host);
1527 if (hba->ufshcd_state == UFSHCD_STATE_RESET)
1530 return ufshcd_do_reset(hba);
1534 * ufshcd_abort - abort a specific command
1535 * @cmd: SCSI command pointer
1537 * Returns SUCCESS/FAILED
1539 static int ufshcd_abort(struct scsi_cmnd *cmd)
1541 struct Scsi_Host *host;
1542 struct ufs_hba *hba;
1543 unsigned long flags;
1547 host = cmd->device->host;
1548 hba = shost_priv(host);
1549 tag = cmd->request->tag;
1551 spin_lock_irqsave(host->host_lock, flags);
1553 /* check if command is still pending */
1554 if (!(test_bit(tag, &hba->outstanding_reqs))) {
1556 spin_unlock_irqrestore(host->host_lock, flags);
1559 spin_unlock_irqrestore(host->host_lock, flags);
1561 err = ufshcd_issue_tm_cmd(hba, &hba->lrb[tag], UFS_ABORT_TASK);
1565 scsi_dma_unmap(cmd);
1567 spin_lock_irqsave(host->host_lock, flags);
1569 /* clear the respective UTRLCLR register bit */
1570 ufshcd_utrl_clear(hba, tag);
1572 __clear_bit(tag, &hba->outstanding_reqs);
1573 hba->lrb[tag].cmd = NULL;
1574 spin_unlock_irqrestore(host->host_lock, flags);
1580 * ufshcd_async_scan - asynchronous execution for link startup
1581 * @data: data pointer to pass to this function
1582 * @cookie: cookie data
1584 static void ufshcd_async_scan(void *data, async_cookie_t cookie)
1586 struct ufs_hba *hba = (struct ufs_hba *)data;
1589 ret = ufshcd_link_startup(hba);
1591 scsi_scan_host(hba->host);
1594 static struct scsi_host_template ufshcd_driver_template = {
1595 .module = THIS_MODULE,
1597 .proc_name = UFSHCD,
1598 .queuecommand = ufshcd_queuecommand,
1599 .slave_alloc = ufshcd_slave_alloc,
1600 .slave_destroy = ufshcd_slave_destroy,
1601 .eh_abort_handler = ufshcd_abort,
1602 .eh_device_reset_handler = ufshcd_device_reset,
1603 .eh_host_reset_handler = ufshcd_host_reset,
1605 .sg_tablesize = SG_ALL,
1606 .cmd_per_lun = UFSHCD_CMD_PER_LUN,
1607 .can_queue = UFSHCD_CAN_QUEUE,
1611 * ufshcd_suspend - suspend power management function
1612 * @hba: per adapter instance
1613 * @state: power state
1617 int ufshcd_suspend(struct ufs_hba *hba, pm_message_t state)
1621 * 1. Block SCSI requests from SCSI midlayer
1622 * 2. Change the internal driver state to non operational
1623 * 3. Set UTRLRSR and UTMRLRSR bits to zero
1624 * 4. Wait until outstanding commands are completed
1625 * 5. Set HCE to zero to send the UFS host controller to reset state
1630 EXPORT_SYMBOL_GPL(ufshcd_suspend);
1633 * ufshcd_resume - resume power management function
1634 * @hba: per adapter instance
1638 int ufshcd_resume(struct ufs_hba *hba)
1642 * 1. Set HCE to 1, to start the UFS host controller
1643 * initialization process
1644 * 2. Set UTRLRSR and UTMRLRSR bits to 1
1645 * 3. Change the internal driver state to operational
1646 * 4. Unblock SCSI requests from SCSI midlayer
1651 EXPORT_SYMBOL_GPL(ufshcd_resume);
1654 * ufshcd_remove - de-allocate SCSI host and host memory space
1655 * data structure memory
1656 * @hba - per adapter instance
1658 void ufshcd_remove(struct ufs_hba *hba)
1660 /* disable interrupts */
1661 ufshcd_disable_intr(hba, hba->intr_mask);
1662 ufshcd_hba_stop(hba);
1664 scsi_remove_host(hba->host);
1665 scsi_host_put(hba->host);
1667 EXPORT_SYMBOL_GPL(ufshcd_remove);
1670 * ufshcd_init - Driver initialization routine
1671 * @dev: pointer to device handle
1672 * @hba_handle: driver private handle
1673 * @mmio_base: base register address
1674 * @irq: Interrupt line of device
1675 * Returns 0 on success, non-zero value on failure
1677 int ufshcd_init(struct device *dev, struct ufs_hba **hba_handle,
1678 void __iomem *mmio_base, unsigned int irq)
1680 struct Scsi_Host *host;
1681 struct ufs_hba *hba;
1686 "Invalid memory reference for dev is NULL\n");
1693 "Invalid memory reference for mmio_base is NULL\n");
1698 host = scsi_host_alloc(&ufshcd_driver_template,
1699 sizeof(struct ufs_hba));
1701 dev_err(dev, "scsi_host_alloc failed\n");
1705 hba = shost_priv(host);
1708 hba->mmio_base = mmio_base;
1711 /* Read capabilities registers */
1712 ufshcd_hba_capabilities(hba);
1714 /* Get UFS version supported by the controller */
1715 hba->ufs_version = ufshcd_get_ufs_version(hba);
1717 /* Get Interrupt bit mask per version */
1718 hba->intr_mask = ufshcd_get_intr_mask(hba);
1720 /* Allocate memory for host memory space */
1721 err = ufshcd_memory_alloc(hba);
1723 dev_err(hba->dev, "Memory allocation failed\n");
1728 ufshcd_host_memory_configure(hba);
1730 host->can_queue = hba->nutrs;
1731 host->cmd_per_lun = hba->nutrs;
1732 host->max_id = UFSHCD_MAX_ID;
1733 host->max_lun = UFSHCD_MAX_LUNS;
1734 host->max_channel = UFSHCD_MAX_CHANNEL;
1735 host->unique_id = host->host_no;
1736 host->max_cmd_len = MAX_CDB_SIZE;
1738 /* Initailize wait queue for task management */
1739 init_waitqueue_head(&hba->ufshcd_tm_wait_queue);
1741 /* Initialize work queues */
1742 INIT_WORK(&hba->feh_workq, ufshcd_fatal_err_handler);
1744 /* Initialize UIC command mutex */
1745 mutex_init(&hba->uic_cmd_mutex);
1747 /* IRQ registration */
1748 err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
1750 dev_err(hba->dev, "request irq failed\n");
1754 /* Enable SCSI tag mapping */
1755 err = scsi_init_shared_tag_map(host, host->can_queue);
1757 dev_err(hba->dev, "init shared queue failed\n");
1761 err = scsi_add_host(host, hba->dev);
1763 dev_err(hba->dev, "scsi_add_host failed\n");
1767 /* Host controller enable */
1768 err = ufshcd_hba_enable(hba);
1770 dev_err(hba->dev, "Host controller enable failed\n");
1771 goto out_remove_scsi_host;
1776 async_schedule(ufshcd_async_scan, hba);
1780 out_remove_scsi_host:
1781 scsi_remove_host(hba->host);
1783 scsi_host_put(host);
1787 EXPORT_SYMBOL_GPL(ufshcd_init);
1789 MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
1790 MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
1791 MODULE_DESCRIPTION("Generic UFS host controller driver Core");
1792 MODULE_LICENSE("GPL");
1793 MODULE_VERSION(UFSHCD_DRIVER_VERSION);