drivers/serial/rk2818_serial.c

   1 /*
   2  * drivers/serial/rk2818_serial.c - driver for rk2818 serial device and console
   3  *
   4  * Copyright (C) 2010 ROCKCHIP, Inc.
   5  *
   6  * This software is licensed under the terms of the GNU General Public
   7  * License version 2, as published by the Free Software Foundation, and
   8  * may be copied, distributed, and modified under those terms.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15
  16
  17 #if defined(CONFIG_SERIAL_RK2818_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  18 #define SUPPORT_SYSRQ
  19 #endif
  20
  21 #include <linux/hrtimer.h>
  22 #include <linux/module.h>
  23 #include <linux/io.h>
  24 #include <linux/ioport.h>
  25 #include <linux/irq.h>
  26 #include <linux/init.h>
  27 #include <linux/console.h>
  28 #include <linux/tty.h>
  29 #include <linux/tty_flip.h>
  30 #include <linux/serial_core.h>
  31 #include <linux/serial.h>
  32 #include <linux/clk.h>
  33 #include <linux/platform_device.h>
  34 #include <mach/iomux.h>
  35 #include <mach/gpio.h>
  36
  37 #include "rk2818_serial.h"
  38
  39 /*
  40  * We wrap our port structure around the generic uart_port.
  41  */
  42 struct rk2818_port {
  43         struct uart_port        uart;
  44         char                    name[16];
  45         struct clk              *clk;
  46         unsigned int            imr;
  47 };
  48
  49 #define UART_TO_RK2818(uart_port)       ((struct rk2818_port *) uart_port)
  50 #define RK2818_SERIAL_MAJOR      TTY_MAJOR
  51 #define RK2818_SERIAL_MINOR      64
  52
  53
  54 static inline void rk2818_uart_write(struct uart_port *port, unsigned int val,
  55                              unsigned int off)
  56 {
  57         __raw_writel(val, port->membase + off);
  58 }
  59
  60 static inline unsigned int rk2818_uart_read(struct uart_port *port, unsigned int off)
  61 {
  62         return __raw_readl(port->membase + off);
  63 }
  64
  65 static int rk2818_set_baud_rate(struct uart_port *port, unsigned int baud)
  66 {
  67         unsigned int uartTemp;
  68
  69         rk2818_uart_write(port,rk2818_uart_read(port,UART_LCR) | LCR_DLA_EN,UART_LCR);
  70     uartTemp = port->uartclk / (16 * baud);
  71     rk2818_uart_write(port,uartTemp & 0xff,UART_DLL);
  72     rk2818_uart_write(port,(uartTemp>>8) & 0xff,UART_DLH);
  73     rk2818_uart_write(port,rk2818_uart_read(port,UART_LCR) & (~LCR_DLA_EN),UART_LCR);
  74         return baud;
  75 }
  76
  77 /*
  78  * ÅÐ¶Ï·¢ËÍ»º³åÇøÊÇ·ñÎª¿Õ
  79  *ÏÈÒÔFIFO´ò¿ª×ö£¬ºóÃæ¿ÉÒÔ×ö³ÉFIFO¹Ø»òFIFO¿ª¡£
  80  */
  81 static u_int rk2818_serial_tx_empty(struct uart_port *port)
  82 {
  83     while(!(rk2818_uart_read(port,UART_USR)&UART_TRANSMIT_FIFO_EMPTY))
  84         cpu_relax();
  85         if(rk2818_uart_read(port,UART_USR)&UART_TRANSMIT_FIFO_EMPTY)
  86         {
  87         return (1);///1£º¿Õ
  88         }else{
  89         return (0);///0:·Ç¿Õ
  90         }
  91 }
  92
  93 /*
  94  * Power / Clock management.
  95  */
  96 static void rk2818_serial_pm(struct uart_port *port, unsigned int state,
  97                             unsigned int oldstate)
  98 {
  99         struct rk2818_port *rk2818_port = UART_TO_RK2818(port);
 100
 101         switch (state) {
 102         case 0:
 103                 /*
 104                  * Enable the peripheral clock for this serial port.
 105                  * This is called on uart_open() or a resume event.
 106                  */
 107                 clk_enable(rk2818_port->clk);
 108                 break;
 109         case 3:
 110                 /*
 111                  * Disable the peripheral clock for this serial port.
 112                  * This is called on uart_close() or a suspend event.
 113                  */
 114                 clk_disable(rk2818_port->clk);
 115                 break;
 116         default:
 117                 printk(KERN_ERR "rk2818_serial: unknown pm %d\n", state);
 118         }
 119 }
 120
 121 /*
 122  * Return string describing the specified port
 123  */
 124 static const char *rk2818_serial_type(struct uart_port *port)
 125 {
 126         return (port->type == PORT_RK2818) ? "RK2818_SERIAL" : NULL;
 127 }
 128
 129 static void rk2818_serial_enable_ms(struct uart_port *port)
 130 {
 131   #ifdef DEBUG_LHH
 132   printk("Enter::%s\n",__FUNCTION__);
 133   #endif
 134 }
 135
 136 /* no modem control lines */
 137 static unsigned int rk2818_serial_get_mctrl(struct uart_port *port)
 138 {
 139         unsigned int result = 0;
 140         unsigned int status;
 141
 142         status = rk2818_uart_read(port,UART_MSR);
 143         if (status & UART_MSR_URCTS)
 144         {
 145                 result = TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
 146                 printk("UART_GET_MSR:0x%x\n",result);
 147         }else{
 148                 result = TIOCM_CAR | TIOCM_DSR;
 149                 printk("UART_GET_MSR:0x%x\n",result);
 150         }
 151         return result;
 152 }
 153
 154 static void rk2818_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
 155 {
 156         #ifdef DEBUG_LHH
 157         printk("Enter::%s\n",__FUNCTION__);
 158         #endif
 159 }
 160
 161 /*
 162  * Stop transmitting.
 163  */
 164 static void rk2818_serial_stop_tx(struct uart_port *port)
 165 {
 166         #ifdef DEBUG_LHH
 167         printk("Enter::%s\n",__FUNCTION__);
 168         #endif
 169 }
 170
 171 /*
 172  * Start transmitting.
 173  */
 174 static void rk2818_serial_start_tx(struct uart_port *port)
 175 {
 176         struct circ_buf *xmit = &port->state->xmit;
 177         while(!(uart_circ_empty(xmit)))
 178         {
 179                 while (!(rk2818_uart_read(port,UART_USR) & UART_TRANSMIT_FIFO_NOT_FULL)){
 180             rk2818_uart_write(port,UART_IER_RECV_DATA_AVAIL_INT_ENABLE|UART_IER_SEND_EMPTY_INT_ENABLE,UART_IER);
 181             return;
 182         }
 183         rk2818_uart_write(port,xmit->buf[xmit->tail],UART_THR);
 184                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 185                 port->icount.tx++;
 186         }
 187         if((uart_circ_empty(xmit)))
 188                 rk2818_uart_write(port,UART_IER_RECV_DATA_AVAIL_INT_ENABLE,UART_IER);
 189         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 190                 uart_write_wakeup(port);
 191 }
 192
 193 /*
 194  * Stop receiving - port is in process of being closed.
 195  */
 196 static void rk2818_serial_stop_rx(struct uart_port *port)
 197 {
 198     #ifdef DEBUG_LHH
 199     printk("Enter::%s\n",__FUNCTION__);
 200     #endif
 201 }
 202
 203 /*
 204  * Control the transmission of a break signal
 205  */
 206 static void rk2818_serial_break_ctl(struct uart_port *port, int break_state)
 207 {
 208     unsigned int temp;
 209     temp = rk2818_uart_read(port,UART_LCR);
 210     if (break_state != 0)
 211         temp = temp & (~BREAK_CONTROL_BIT);/* start break */
 212         else
 213         temp = temp | BREAK_CONTROL_BIT; /* stop break */
 214     rk2818_uart_write(port,temp,UART_LCR);
 215 }
 216
 217
 218 /*
 219  * Characters received (called from interrupt handler)
 220  */
 221 static void rk2818_rx_chars(struct uart_port *port)
 222 {
 223         unsigned int ch, flag;
 224         while((rk2818_uart_read(port,UART_USR) & UART_RECEIVE_FIFO_NOT_EMPTY) == UART_RECEIVE_FIFO_NOT_EMPTY)
 225         {
 226                 u32 lsr = rk2818_uart_read(port, UART_LSR);
 227             ch = rk2818_uart_read(port,UART_RBR);
 228             flag = TTY_NORMAL;
 229                 port->icount.rx++;
 230                 if (lsr & UART_BREAK_INT_BIT) {
 231                         port->icount.brk++;
 232                         if (uart_handle_break(port))
 233                                 continue;
 234                 }
 235                 if (uart_handle_sysrq_char(port, ch))
 236                 {
 237                         continue;
 238                 }
 239                 uart_insert_char(port, 0, 0, ch, flag);
 240         }
 241         tty_flip_buffer_push(port->state->port.tty);
 242
 243 }
 244
 245 /*
 246  * Interrupt handler
 247  */
 248 static irqreturn_t rk2818_uart_interrupt(int irq, void *dev_id)
 249 {
 250         struct uart_port *port = dev_id;
 251         unsigned int status, pending;
 252
 253         status = rk2818_uart_read(port,UART_IIR);
 254         pending = status & 0x0f;
 255     if((pending == UART_IIR_RECV_AVAILABLE) || (pending == UART_IIR_CHAR_TIMEOUT))
 256                 rk2818_rx_chars(port);
 257         if(pending == UART_IIR_THR_EMPTY)
 258                 rk2818_serial_start_tx(port);
 259         return IRQ_HANDLED;
 260 }
 261
 262 /*
 263  * Disable the port
 264  */
 265 static void rk2818_serial_shutdown(struct uart_port *port)
 266 {
 267    struct rk2818_port *rk2818_port = UART_TO_RK2818(port);
 268    rk2818_uart_write(port,0x00,UART_IER);
 269    clk_disable(rk2818_port->clk);
 270    free_irq(port->irq, port);
 271 }
 272 /*
 273  * Perform initialization and enable port for reception
 274  */
 275 static int rk2818_serial_startup(struct uart_port *port)
 276 {
 277         struct rk2818_port *rk2818_port = UART_TO_RK2818(port);
 278         struct tty_struct *tty = port->state->port.tty;
 279         int retval;
 280
 281         retval = request_irq(port->irq,rk2818_uart_interrupt,IRQF_SHARED,
 282                      tty ? tty->name : "rk2818_serial",port);
 283         if(retval)
 284         {
 285                 printk("\nrk2818_serial_startup err \n");
 286                 rk2818_serial_shutdown(port);
 287                 return  retval;
 288         }
 289         clk_enable(rk2818_port->clk);
 290         rk2818_uart_write(port,0xf1,UART_FCR);
 291         rk2818_uart_write(port,0x01,UART_SFE);///enable fifo
 292     rk2818_uart_write(port,UART_IER_RECV_DATA_AVAIL_INT_ENABLE,UART_IER);  //enable uart recevice IRQ
 293         return 0;
 294 }
 295
 296 /*
 297  * Change the port parameters
 298  */
 299 static void rk2818_serial_set_termios(struct uart_port *port, struct ktermios *termios,
 300                               struct ktermios *old)
 301 {
 302     unsigned long flags;
 303     unsigned int mode, baud;
 304         unsigned int umcon,fcr;
 305     /* Get current mode register */
 306     mode = rk2818_uart_read(port,UART_LCR) & (BREAK_CONTROL_BIT | EVEN_PARITY_SELECT | PARITY_ENABLED
 307                        | ONE_HALF_OR_TWO_BIT | UART_DATABIT_MASK);
 308
 309     baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
 310     /* byte size */
 311     switch (termios->c_cflag & CSIZE) {
 312     case CS5:
 313         mode |= LCR_WLS_5;
 314         break;
 315     case CS6:
 316         mode |= LCR_WLS_6;
 317         break;
 318     case CS7:
 319         mode |= LCR_WLS_7;
 320         break;
 321     default:
 322         mode |= LCR_WLS_8;
 323         break;
 324     }
 325
 326     /* stop bits */
 327     if (termios->c_cflag & CSTOPB)
 328         mode |= ONE_STOP_BIT;
 329
 330     /* parity */
 331     if (termios->c_cflag & PARENB)
 332     {
 333         mode |= PARITY_ENABLED;
 334         if (termios->c_cflag & PARODD)
 335             mode |= ODD_PARITY;
 336         else
 337             mode |= EVEN_PARITY;
 338     }
 339     spin_lock_irqsave(&port->lock, flags);
 340         if(termios->c_cflag & CRTSCTS)
 341         {
 342                         /*¿ªÆôuart0Ó²¼þÁ÷¿Ø*/
 343                 rk2818_mux_api_set(GPIOB2_U0CTSN_SEL_NAME, IOMUXB_UART0_CTS_N);
 344                 rk2818_mux_api_set(GPIOB3_U0RTSN_SEL_NAME, IOMUXB_UART0_RTS_N);
 345                 printk("start CRTSCTS control and baudrate is %d\n",baud);
 346                 umcon=rk2818_uart_read(port,UART_MCR);
 347                 printk("UART_GET_MCR umcon=0x%x\n",umcon);
 348                 umcon |= UART_MCR_AFCEN;
 349                 umcon |= UART_MCR_URRTS;
 350                 umcon &=~UART_SIR_ENABLE;
 351                 rk2818_uart_write(port,umcon,UART_MCR);
 352                 printk("UART_GET_MCR umcon=0x%x\n",umcon);
 353                 fcr=rk2818_uart_read(port,UART_FCR);
 354                 printk("UART_GET_MCR fcr=0x%x\n",fcr);
 355                 fcr |= UART_FCR_FIFO_ENABLE;
 356                 rk2818_uart_write(port,fcr,UART_FCR);
 357                 printk("UART_GET_MCR fcr=0x%x\n",fcr);
 358         }
 359     mode = mode | LCR_DLA_EN;
 360     while(rk2818_uart_read(port,UART_USR)&UART_USR_BUSY)
 361         cpu_relax();
 362     rk2818_uart_write(port,mode,UART_LCR);
 363     baud = rk2818_set_baud_rate(port, baud);
 364     uart_update_timeout(port, termios->c_cflag, baud);
 365     spin_unlock_irqrestore(&port->lock, flags);
 366 }
 367
 368
 369 static void rk2818_serial_release_port(struct uart_port *port)
 370 {
 371     struct platform_device *pdev = to_platform_device(port->dev);
 372         struct resource *resource;
 373         resource_size_t size;
 374
 375         resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 376         if (unlikely(!resource))
 377                 return;
 378         size = resource->end - resource->start + 1;
 379
 380         release_mem_region(port->mapbase, size);
 381         iounmap(port->membase);
 382         port->membase = NULL;
 383 }
 384
 385 static int rk2818_serial_request_port(struct uart_port *port)
 386 {
 387         struct platform_device *pdev = to_platform_device(port->dev);
 388         struct resource *resource;
 389         resource_size_t size;
 390
 391         resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 392         if (unlikely(!resource))
 393                 return -ENXIO;
 394         size = resource->end - resource->start + 1;
 395
 396         if (unlikely(!request_mem_region(port->mapbase, size, "rk2818_serial")))
 397                 return -EBUSY;
 398
 399         port->membase = ioremap(port->mapbase, size);
 400         if (!port->membase) {
 401                 release_mem_region(port->mapbase, size);
 402                 return -EBUSY;
 403         }
 404
 405         return 0;
 406 }
 407
 408 /*
 409  * Configure/autoconfigure the port.
 410  */
 411 static void rk2818_serial_config_port(struct uart_port *port, int flags)
 412 {
 413         if (flags & UART_CONFIG_TYPE) {
 414                 port->type = PORT_RK2818;
 415                 rk2818_serial_request_port(port);
 416         }
 417 }
 418
 419 /*
 420  * Verify the new serial_struct (for TIOCSSERIAL).
 421  */
 422 static int rk2818_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
 423 {
 424         int ret = 0;
 425         if (ser->type != PORT_UNKNOWN && ser->type != PORT_RK2818)
 426                 ret = -EINVAL;
 427         if (port->irq != ser->irq)
 428                 ret = -EINVAL;
 429         if (ser->io_type != SERIAL_IO_MEM)
 430                 ret = -EINVAL;
 431         if (port->uartclk / 16 != ser->baud_base)
 432                 ret = -EINVAL;
 433         if ((void *)port->mapbase != ser->iomem_base)
 434                 ret = -EINVAL;
 435         if (port->iobase != ser->port)
 436                 ret = -EINVAL;
 437         if (ser->hub6 != 0)
 438                 ret = -EINVAL;
 439         return ret;
 440 }
 441
 442 #ifdef CONFIG_CONSOLE_POLL
 443 /*
 444  * Console polling routines for writing and reading from the uart while
 445  * in an interrupt or debug context.
 446  */
 447
 448 static int rk2818_serial_poll_get_char(struct uart_port *port)
 449 {
 450         while (!((rk2818_uart_read(port, UART_USR) & UART_RECEIVE_FIFO_NOT_EMPTY) == UART_RECEIVE_FIFO_NOT_EMPTY))
 451                 barrier();
 452         return rk2818_uart_read(port, UART_RBR);
 453 }
 454
 455 static void rk2818_serial_poll_put_char(struct uart_port *port, unsigned char c)
 456 {
 457         while (!(rk2818_uart_read(port, UART_USR) & UART_TRANSMIT_FIFO_NOT_FULL))
 458                 barrier();
 459         rk2818_uart_write(port, c, UART_THR);
 460 }
 461 #endif /* CONFIG_CONSOLE_POLL */
 462
 463 static struct uart_ops rk2818_uart_pops = {
 464         .tx_empty = rk2818_serial_tx_empty,
 465         .set_mctrl = rk2818_serial_set_mctrl,
 466         .get_mctrl = rk2818_serial_get_mctrl,
 467         .stop_tx = rk2818_serial_stop_tx,
 468         .start_tx = rk2818_serial_start_tx,
 469         .stop_rx = rk2818_serial_stop_rx,
 470         .enable_ms = rk2818_serial_enable_ms,
 471         .break_ctl = rk2818_serial_break_ctl,
 472         .startup = rk2818_serial_startup,
 473         .shutdown = rk2818_serial_shutdown,
 474         .set_termios = rk2818_serial_set_termios,
 475         .type = rk2818_serial_type,
 476         .release_port = rk2818_serial_release_port,
 477         .request_port = rk2818_serial_request_port,
 478         .config_port = rk2818_serial_config_port,
 479         .verify_port = rk2818_serial_verify_port,
 480         .pm = rk2818_serial_pm,
 481 #ifdef CONFIG_CONSOLE_POLL
 482         .poll_get_char = rk2818_serial_poll_get_char,
 483         .poll_put_char = rk2818_serial_poll_put_char,
 484 #endif
 485 };
 486
 487
 488 static struct rk2818_port rk2818_uart_ports[] = {
 489         {
 490                 .uart = {
 491                         .iotype = UPIO_MEM,
 492                         .ops = &rk2818_uart_pops,
 493                         .flags = UPF_BOOT_AUTOCONF,
 494                         .fifosize = 32,
 495                         .line = 0,
 496                 },
 497         },
 498         {
 499                 .uart = {
 500                         .iotype = UPIO_MEM,
 501                         .ops = &rk2818_uart_pops,
 502                         .flags = UPF_BOOT_AUTOCONF,
 503                         .fifosize = 32,
 504                         .line = 1,
 505                 },
 506         },
 507         {
 508                 .uart = {
 509                         .iotype = UPIO_MEM,
 510                         .ops = &rk2818_uart_pops,
 511                         .flags = UPF_BOOT_AUTOCONF,
 512                         .fifosize = 32,
 513                         .line = 2,
 514                 },
 515         },
 516         {
 517                 .uart = {
 518                         .iotype = UPIO_MEM,
 519                         .ops = &rk2818_uart_pops,
 520                         .flags = UPF_BOOT_AUTOCONF,
 521                         .fifosize = 32,
 522                         .line = 3,
 523                 },
 524         },
 525 };
 526
 527 #define UART_NR ARRAY_SIZE(rk2818_uart_ports)
 528
 529 static inline struct uart_port *get_port_from_line(unsigned int line)
 530 {
 531         return &rk2818_uart_ports[line].uart;
 532 }
 533
 534 #ifdef CONFIG_SERIAL_RK2818_CONSOLE
 535 static void rk2818_console_putchar(struct uart_port *port, int ch)
 536 {
 537     while (!(rk2818_uart_read(port,UART_USR) & UART_TRANSMIT_FIFO_NOT_FULL))
 538                 cpu_relax();
 539         rk2818_uart_write(port,ch,UART_THR);
 540 }
 541
 542 /*
 543  * Interrupts are disabled on entering
 544  */
 545 static void rk2818_console_write(struct console *co, const char *s, u_int count)
 546 {
 547         struct uart_port *port;
 548         struct rk2818_port *rk2818_port;
 549
 550         BUG_ON(co->index < 0 || co->index >= UART_NR);
 551
 552         port = get_port_from_line(co->index);
 553         rk2818_port = UART_TO_RK2818(port);
 554
 555         spin_lock(&port->lock);
 556         uart_console_write(port, s, count, rk2818_console_putchar);
 557         spin_unlock(&port->lock);
 558 }
 559
 560 static int __init rk2818_console_setup(struct console *co, char *options)
 561 {
 562         struct uart_port *port;
 563         int baud, flow, bits, parity;
 564
 565         if (unlikely(co->index >= UART_NR || co->index < 0))
 566                 return -ENXIO;
 567
 568         port = get_port_from_line(co->index);
 569
 570         if (unlikely(!port->membase))
 571                 return -ENXIO;
 572
 573         port->cons = co;
 574
 575         //rk2818_init_clock(port);
 576
 577         if (options)
 578                 uart_parse_options(options, &baud, &parity, &bits, &flow);
 579
 580         bits = 8;
 581         parity = 'n';
 582         flow = 'n';
 583         rk2818_uart_write(port,rk2818_uart_read(port,UART_LCR) | LCR_WLS_8 | PARITY_DISABLED | ONE_STOP_BIT,UART_LCR);  /* 8N1 */
 584         if (baud < 300 || baud > 115200)
 585                 baud = 115200;
 586         rk2818_set_baud_rate(port, baud);
 587
 588         printk(KERN_INFO "rk2818_serial: console setup on port %d\n", port->line);
 589
 590         return uart_set_options(port, co, baud, parity, bits, flow);
 591 }
 592
 593 static struct uart_driver rk2818_uart_driver;
 594
 595 static struct console rk2818_console = {
 596         .name = "ttyS",
 597         .write = rk2818_console_write,
 598         .device = uart_console_device,
 599         .setup = rk2818_console_setup,
 600         .flags = CON_PRINTBUFFER,
 601         .index = 1,
 602         .data = &rk2818_uart_driver,
 603 };
 604
 605 #define RK2818_CONSOLE  (&rk2818_console)
 606
 607 #else
 608 #define RK2818_CONSOLE  NULL
 609 #endif
 610
 611 static struct uart_driver rk2818_uart_driver = {
 612         .owner = THIS_MODULE,
 613         .driver_name = "rk2818_serial",
 614         .dev_name = "ttyS",
 615         .nr = UART_NR,
 616         .cons = RK2818_CONSOLE,
 617         .major          = RK2818_SERIAL_MAJOR,
 618         .minor          = RK2818_SERIAL_MINOR,
 619 };
 620
 621 static int __devinit rk2818_serial_probe(struct platform_device *pdev)
 622 {
 623         struct rk2818_port *rk2818_port;
 624         struct resource *resource;
 625         struct uart_port *port;
 626     int ret = 0;
 627
 628         if (unlikely(pdev->id < 0 || pdev->id >= UART_NR))
 629                 return -ENXIO;
 630
 631         printk(KERN_INFO "rk2818_serial: detected port %d\n", pdev->id);
 632
 633
 634 #if 1
 635 //cz@rock-chips.com
 636 //20100808
 637 //UART0µÄËÄ¸ö¹Ü½ÅÏÈIOMUX³ÉGPIO
 638 //È»ºó·Ö±ðÉèÖÃÊäÈëÊä³ö/À¸ßÀµÍ´¦Àí
 639 //×îºóÔÙIOMUX³ÉUART
 640 //·ÀÖ¹Ö±½ÓIOMUX³ÉUARTºóËÄ¸ö¹Ü½ÅµÄ×´Ì¬²»¶ÔÊ±
 641 //²Ù×÷UARTµ¼ÖÂUART_USR_BUSYÊ¼ÖÕÎª1Ôì³ÉÈçÏÂËÀÑ»·
 642 //while(rk2818_uart_read(port,UART_USR)&UART_USR_BUSY)
 643 //UARTËÄ¸ö¹Ü½ÅÔÚÎ´´«ÊäÊ±Õý³£×´Ì¬Ó¦¸ÃÎª£º
 644 //RX/TX£ºHIGH
 645 //CTS/RTS£ºLOW
 646 //×¢Òâ£ºCTS/RTSÎªµÍÓÐÐ§£¬Ó²¼þÉÏ²»Ó¦¸ÃÇ¿ÐÐ×öÉÏÀ
 647     if(pdev->id == 0)
 648     {
 649         rk2818_mux_api_set(GPIOG1_UART0_MMC1WPT_NAME, IOMUXA_GPIO1_C1 /*IOMUXA_UART0_SOUT*/);
 650         rk2818_mux_api_set(GPIOG0_UART0_MMC1DET_NAME, IOMUXA_GPIO1_C0 /*IOMUXA_UART0_SIN*/);
 651
 652         ret = gpio_request(RK2818_PIN_PG0, NULL);
 653         if(ret != 0)
 654         {
 655           gpio_free(RK2818_PIN_PG0);
 656         }
 657         gpio_direction_output(RK2818_PIN_PG0,GPIO_HIGH);
 658
 659
 660         ret = gpio_request(RK2818_PIN_PG1, NULL);
 661         if(ret != 0)
 662         {
 663           gpio_free(RK2818_PIN_PG1);
 664         }
 665         gpio_direction_output(RK2818_PIN_PG1,GPIO_HIGH);
 666
 667         gpio_pull_updown(RK2818_PIN_PG1,GPIOPullUp);
 668         gpio_pull_updown(RK2818_PIN_PG0,GPIOPullUp);
 669
 670         rk2818_mux_api_set(GPIOG1_UART0_MMC1WPT_NAME, IOMUXA_UART0_SOUT);
 671         rk2818_mux_api_set(GPIOG0_UART0_MMC1DET_NAME, IOMUXA_UART0_SIN);
 672
 673         rk2818_mux_api_set(GPIOB2_U0CTSN_SEL_NAME, IOMUXB_GPIO0_B2/*IOMUXB_UART0_CTS_N*/);
 674         rk2818_mux_api_set(GPIOB3_U0RTSN_SEL_NAME, IOMUXB_GPIO0_B3/*IOMUXB_UART0_RTS_N*/);
 675
 676         ret = gpio_request(RK2818_PIN_PB2, NULL);
 677         if(ret != 0)
 678         {
 679           gpio_free(RK2818_PIN_PB2);
 680         }
 681         gpio_direction_input(RK2818_PIN_PB2);
 682     //    gpio_direction_output(RK2818_PIN_PB2,GPIO_LOW);
 683
 684         ret = gpio_request(RK2818_PIN_PB3, NULL);
 685         if(ret != 0)
 686         {
 687           gpio_free(RK2818_PIN_PB3);
 688         }
 689         gpio_direction_output(RK2818_PIN_PB3,GPIO_LOW);
 690     }
 691 #endif
 692
 693
 694         port = get_port_from_line(pdev->id);
 695         port->dev = &pdev->dev;
 696         rk2818_port = UART_TO_RK2818(port);
 697
 698         rk2818_port->clk = clk_get(&pdev->dev, "uart");
 699         if (unlikely(IS_ERR(rk2818_port->clk)))
 700                 return PTR_ERR(rk2818_port->clk);
 701         port->uartclk = clk_get_rate(rk2818_port->clk);
 702
 703         resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 704         if (unlikely(!resource))
 705                 return -ENXIO;
 706         port->mapbase = resource->start;
 707
 708         port->irq = platform_get_irq(pdev, 0);
 709         if (unlikely(port->irq < 0))
 710                 return -ENXIO;
 711
 712         platform_set_drvdata(pdev, port);
 713
 714         return uart_add_one_port(&rk2818_uart_driver, port);
 715 }
 716
 717 static int __devexit rk2818_serial_remove(struct platform_device *pdev)
 718 {
 719         struct rk2818_port *rk2818_port = platform_get_drvdata(pdev);
 720
 721         clk_put(rk2818_port->clk);
 722
 723         return 0;
 724 }
 725
 726 static struct platform_driver rk2818_platform_driver = {
 727         .remove = rk2818_serial_remove,
 728         .driver = {
 729                 .name = "rk2818_serial",
 730                 .owner = THIS_MODULE,
 731         },
 732 };
 733
 734 static int __init rk2818_serial_init(void)
 735 {
 736         int ret;
 737         ret = uart_register_driver(&rk2818_uart_driver);
 738         if (unlikely(ret))
 739                 return ret;
 740
 741         ret = platform_driver_probe(&rk2818_platform_driver, rk2818_serial_probe);
 742         if (unlikely(ret))
 743                 uart_unregister_driver(&rk2818_uart_driver);
 744
 745         printk(KERN_INFO "rk2818_serial: driver initialized\n");
 746
 747         return ret;
 748 }
 749
 750 static void __exit rk2818_serial_exit(void)
 751 {
 752         #ifdef CONFIG_SERIAL_RK2818_CONSOLE
 753         unregister_console(&rk2818_console);
 754         #endif
 755         platform_driver_unregister(&rk2818_platform_driver);
 756         uart_unregister_driver(&rk2818_uart_driver);
 757 }
 758
 759 /*
 760  * While this can be a module, if builtin it's most likely the console
 761  * So let's leave module_exit but move module_init to an earlier place
 762  */
 763 arch_initcall(rk2818_serial_init);
 764 module_exit(rk2818_serial_exit);
 765
 766 MODULE_AUTHOR("lhh lhh@rock-chips.com");
 767 MODULE_DESCRIPTION("Rockchip RK2818 Serial port driver");
 768 MODULE_LICENSE("GPL");