drivers/serial/rk2818_serial.c

   1 /*
   2  * drivers/serial/rk2818_serial.c - driver for rk2818 RK2818  serial device and console
   3  *
   4  * Copyright (C) 2010 ROCKCHIP, Inc.
   5  *
   6  * This software is licensed under the terms of the GNU General Public
   7  * License version 2, as published by the Free Software Foundation, and
   8  * may be copied, distributed, and modified under those terms.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  */
  15
  16
  17
  18 #include <linux/hrtimer.h>
  19 #include <linux/module.h>
  20 #include <linux/io.h>
  21 #include <linux/ioport.h>
  22 #include <linux/irq.h>
  23 #include <linux/init.h>
  24 #include <linux/console.h>
  25 #include <linux/tty.h>
  26 #include <linux/tty_flip.h>
  27 #include <linux/serial_core.h>
  28 #include <linux/serial.h>
  29 #include <linux/clk.h>
  30 #include <linux/platform_device.h>
  31
  32 #include "rk2818_serial.h"
  33
  34 /*
  35  * We wrap our port structure around the generic uart_port.
  36  */
  37 struct rk2818_port {
  38         struct uart_port        uart;
  39         char                    name[16];
  40         struct clk              *clk;
  41         unsigned int            imr;
  42 };
  43
  44 #if defined(CONFIG_SERIAL_RK2818_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  45 #define SUPPORT_SYSRQ
  46 #endif
  47
  48 #define UART_TO_RK2818(uart_port)       ((struct rk2818_port *) uart_port)
  49 #define RK2818_SERIAL_MAJOR      TTY_MAJOR
  50 #define RK2818_SERIAL_MINOR      64
  51
  52
  53 static inline void rk2818_uart_write(struct uart_port *port, unsigned int val,
  54                              unsigned int off)
  55 {
  56         __raw_writel(val, port->membase + off);
  57 }
  58
  59 static inline unsigned int rk2818_uart_read(struct uart_port *port, unsigned int off)
  60 {
  61         return __raw_readl(port->membase + off);
  62 }
  63
  64 static int rk2818_set_baud_rate(struct uart_port *port, unsigned int baud)
  65 {
  66         unsigned int uartTemp;
  67
  68         rk2818_uart_write(port,rk2818_uart_read(port,UART_LCR) | LCR_DLA_EN,UART_LCR);
  69     uartTemp = port->uartclk / (16 * baud);
  70     rk2818_uart_write(port,uartTemp & 0xff,UART_DLL);
  71     rk2818_uart_write(port,(uartTemp>>8) & 0xff,UART_DLH);
  72     rk2818_uart_write(port,rk2818_uart_read(port,UART_LCR) & (~LCR_DLA_EN),UART_LCR);
  73         return baud;
  74 }
  75
  76 /*
  77  * ÅÐ¶Ï·¢ËÍ»º³åÇøÊÇ·ñÎª¿Õ
  78  *ÏÈÒÔFIFO´ò¿ª×ö£¬ºóÃæ¿ÉÒÔ×ö³ÉFIFO¹Ø»òFIFO¿ª¡£
  79  */
  80 static u_int rk2818_serial_tx_empty(struct uart_port *port)
  81 {
  82     while(!(rk2818_uart_read(port,UART_USR)&UART_TRANSMIT_FIFO_EMPTY))
  83         cpu_relax();
  84         if(rk2818_uart_read(port,UART_USR)&UART_TRANSMIT_FIFO_EMPTY)
  85         {
  86         return (1);///1£º¿Õ
  87         }else{
  88         return (0);///0:·Ç¿Õ
  89         }
  90 }
  91
  92 /*
  93  * Power / Clock management.
  94  */
  95 static void rk2818_serial_pm(struct uart_port *port, unsigned int state,
  96                             unsigned int oldstate)
  97 {
  98         struct rk2818_port *rk2818_port = UART_TO_RK2818(port);
  99
 100         switch (state) {
 101         case 0:
 102                 /*
 103                  * Enable the peripheral clock for this serial port.
 104                  * This is called on uart_open() or a resume event.
 105                  */
 106                 clk_enable(rk2818_port->clk);
 107                 break;
 108         case 3:
 109                 /*
 110                  * Disable the peripheral clock for this serial port.
 111                  * This is called on uart_close() or a suspend event.
 112                  */
 113                 clk_disable(rk2818_port->clk);
 114                 break;
 115         default:
 116                 printk(KERN_ERR "rk2818_serial: unknown pm %d\n", state);
 117         }
 118 }
 119
 120 /*
 121  * Return string describing the specified port
 122  */
 123 static const char *rk2818_serial_type(struct uart_port *port)
 124 {
 125         return (port->type == PORT_RK2818) ? "RK2818_SERIAL" : NULL;
 126 }
 127
 128 static void rk2818_serial_enable_ms(struct uart_port *port)
 129 {
 130   #ifdef DEBUG_LHH
 131   printk("Enter::%s\n",__FUNCTION__);
 132   #endif
 133 }
 134
 135 /* no modem control lines */
 136 static unsigned int rk2818_serial_get_mctrl(struct uart_port *port)
 137 {
 138         unsigned int result = 0;
 139         unsigned int status;
 140
 141         status = rk2818_uart_read(port,UART_MSR);
 142         if (status & UART_MSR_URCTS)
 143         {
 144                 result = TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
 145                 printk("UART_GET_MSR:0x%x\n",result);
 146         }else{
 147                 result = TIOCM_CAR | TIOCM_DSR;
 148                 printk("UART_GET_MSR:0x%x\n",result);
 149         }
 150         return result;
 151 }
 152
 153 static void rk2818_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
 154 {
 155         #ifdef DEBUG_LHH
 156         printk("Enter::%s\n",__FUNCTION__);
 157         #endif
 158 }
 159
 160 /*
 161  * Stop transmitting.
 162  */
 163 static void rk2818_serial_stop_tx(struct uart_port *port)
 164 {
 165         #ifdef DEBUG_LHH
 166         printk("Enter::%s\n",__FUNCTION__);
 167         #endif
 168 }
 169
 170 /*
 171  * Start transmitting.
 172  */
 173 static void rk2818_serial_start_tx(struct uart_port *port)
 174 {
 175         struct circ_buf *xmit = &port->state->xmit;
 176         while(!(uart_circ_empty(xmit)))
 177         {
 178                 while (!(rk2818_uart_read(port,UART_USR) & UART_TRANSMIT_FIFO_NOT_FULL)){
 179             rk2818_uart_write(port,UART_IER_RECV_DATA_AVAIL_INT_ENABLE|UART_IER_SEND_EMPTY_INT_ENABLE,UART_IER);
 180             return;
 181         }
 182         rk2818_uart_write(port,xmit->buf[xmit->tail],UART_THR);
 183                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 184                 port->icount.tx++;
 185         }
 186         if((uart_circ_empty(xmit)))
 187                 rk2818_uart_write(port,UART_IER_RECV_DATA_AVAIL_INT_ENABLE,UART_IER);
 188         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 189                 uart_write_wakeup(port);
 190 }
 191
 192 /*
 193  * Stop receiving - port is in process of being closed.
 194  */
 195 static void rk2818_serial_stop_rx(struct uart_port *port)
 196 {
 197     #ifdef DEBUG_LHH
 198     printk("Enter::%s\n",__FUNCTION__);
 199     #endif
 200 }
 201
 202 /*
 203  * Control the transmission of a break signal
 204  */
 205 static void rk2818_serial_break_ctl(struct uart_port *port, int break_state)
 206 {
 207     unsigned int temp;
 208     temp = rk2818_uart_read(port,UART_LCR);
 209     if (break_state != 0)
 210         temp = temp & (~BREAK_CONTROL_BIT);/* start break */
 211         else
 212         temp = temp | BREAK_CONTROL_BIT; /* stop break */
 213     rk2818_uart_write(port,temp,UART_LCR);
 214 }
 215
 216
 217 /*
 218  * Characters received (called from interrupt handler)
 219  */
 220 static void rk2818_rx_chars(struct uart_port *port)
 221 {
 222         unsigned int ch, flag;
 223         while((rk2818_uart_read(port,UART_USR) & UART_RECEIVE_FIFO_NOT_EMPTY) == UART_RECEIVE_FIFO_NOT_EMPTY)
 224         {
 225             ch = rk2818_uart_read(port,UART_RBR);
 226             flag = TTY_NORMAL;
 227                 port->icount.rx++;
 228                 if (uart_handle_sysrq_char(port, ch))
 229                 {
 230                         continue;
 231                 }
 232                 uart_insert_char(port, 0, 0, ch, flag);
 233         }
 234         spin_unlock(&port->lock);
 235         tty_flip_buffer_push(port->state->port.tty);
 236         spin_lock(&port->lock);
 237
 238 }
 239
 240 /*
 241  * Interrupt handler
 242  */
 243 static irqreturn_t rk2818_uart_interrupt(int irq, void *dev_id)
 244 {
 245         struct uart_port *port = dev_id;
 246         unsigned int status, pending;
 247
 248         status = rk2818_uart_read(port,UART_IIR);
 249         pending = status & 0x0f;
 250     if((pending == UART_IIR_RECV_AVAILABLE) || (pending == UART_IIR_CHAR_TIMEOUT))
 251                 rk2818_rx_chars(port);
 252         if(pending == UART_IIR_THR_EMPTY)
 253                 rk2818_serial_start_tx(port);
 254         return IRQ_HANDLED;
 255 }
 256
 257 /*
 258  * Disable the port
 259  */
 260 static void rk2818_serial_shutdown(struct uart_port *port)
 261 {
 262    struct rk2818_port *rk2818_port = UART_TO_RK2818(port);
 263    rk2818_uart_write(port,0x00,UART_IER);
 264    clk_disable(rk2818_port->clk);
 265    free_irq(port->irq, port);
 266 }
 267 /*
 268  * Perform initialization and enable port for reception
 269  */
 270 static int rk2818_serial_startup(struct uart_port *port)
 271 {
 272         struct tty_struct *tty = port->state->port.tty;
 273         int retval;
 274
 275         retval = request_irq(port->irq,rk2818_uart_interrupt,IRQF_SHARED,
 276                      tty ? tty->name : "rk2818_serial",port);
 277         if(retval)
 278         {
 279                 printk("\nrk2818_serial_startup err \n");
 280                 rk2818_serial_shutdown(port);
 281                 return  retval;
 282         }
 283     rk2818_uart_write(port,UART_IER_RECV_DATA_AVAIL_INT_ENABLE,UART_IER);  //enable uart recevice IRQ
 284         return 0;
 285 }
 286
 287 /*
 288  * Change the port parameters
 289  */
 290 static void rk2818_serial_set_termios(struct uart_port *port, struct ktermios *termios,
 291                               struct ktermios *old)
 292 {
 293     unsigned long flags;
 294     unsigned int mode, baud;
 295         unsigned int umcon,fcr;
 296     /* Get current mode register */
 297     mode = rk2818_uart_read(port,UART_LCR) & (BREAK_CONTROL_BIT | EVEN_PARITY_SELECT | PARITY_ENABLED
 298                        | ONE_HALF_OR_TWO_BIT | UART_DATABIT_MASK);
 299
 300     baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
 301     /* byte size */
 302     switch (termios->c_cflag & CSIZE) {
 303     case CS5:
 304         mode |= LCR_WLS_5;
 305         break;
 306     case CS6:
 307         mode |= LCR_WLS_6;
 308         break;
 309     case CS7:
 310         mode |= LCR_WLS_7;
 311         break;
 312     default:
 313         mode |= LCR_WLS_8;
 314         break;
 315     }
 316
 317     /* stop bits */
 318     if (termios->c_cflag & CSTOPB)
 319         mode |= ONE_STOP_BIT;
 320
 321     /* parity */
 322     if (termios->c_cflag & PARENB)
 323     {
 324         mode |= PARITY_ENABLED;
 325         if (termios->c_cflag & PARODD)
 326             mode |= ODD_PARITY;
 327         else
 328             mode |= EVEN_PARITY;
 329     }
 330     spin_lock_irqsave(&port->lock, flags);
 331         if(termios->c_cflag & CRTSCTS)
 332         {
 333                         /*¿ªÆôuart0Ó²¼þÁ÷¿Ø*/
 334                 //rk2818_mux_api_set(GPIOB2_U0CTSN_SEL_NAME, IOMUXB_UART0_CTS_N);
 335                 //rk2818_mux_api_set(GPIOB3_U0RTSN_SEL_NAME, IOMUXB_UART0_RTS_N);
 336                 printk("start CRTSCTS control and baudrate is %d\n",baud);
 337                 umcon=rk2818_uart_read(port,UART_MCR);
 338                 printk("UART_GET_MCR umcon=0x%x\n",umcon);
 339                 umcon |= UART_MCR_AFCEN;
 340                 umcon |= UART_MCR_URRTS;
 341                 umcon &=~UART_SIR_ENABLE;
 342                 rk2818_uart_write(port,umcon,UART_MCR);
 343                 printk("UART_GET_MCR umcon=0x%x\n",umcon);
 344                 fcr=rk2818_uart_read(port,UART_FCR);
 345                 printk("UART_GET_MCR fcr=0x%x\n",fcr);
 346                 fcr |= UART_FCR_FIFO_ENABLE;
 347                 rk2818_uart_write(port,fcr,UART_FCR);
 348                 printk("UART_GET_MCR fcr=0x%x\n",fcr);
 349         }
 350     mode = mode | LCR_DLA_EN;
 351     while(rk2818_uart_read(port,UART_USR)&UART_USR_BUSY)
 352         cpu_relax();
 353     rk2818_uart_write(port,mode,UART_LCR);
 354     baud = rk2818_set_baud_rate(port, baud);
 355     uart_update_timeout(port, termios->c_cflag, baud);
 356     spin_unlock_irqrestore(&port->lock, flags);
 357 }
 358
 359
 360 static void rk2818_serial_release_port(struct uart_port *port)
 361 {
 362     struct platform_device *pdev = to_platform_device(port->dev);
 363         struct resource *resource;
 364         resource_size_t size;
 365
 366         resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 367         if (unlikely(!resource))
 368                 return;
 369         size = resource->end - resource->start + 1;
 370
 371         release_mem_region(port->mapbase, size);
 372         iounmap(port->membase);
 373         port->membase = NULL;
 374 }
 375
 376 static int rk2818_serial_request_port(struct uart_port *port)
 377 {
 378         struct platform_device *pdev = to_platform_device(port->dev);
 379         struct resource *resource;
 380         resource_size_t size;
 381
 382         resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 383         if (unlikely(!resource))
 384                 return -ENXIO;
 385         size = resource->end - resource->start + 1;
 386
 387         if (unlikely(!request_mem_region(port->mapbase, size, "rk2818_serial")))
 388                 return -EBUSY;
 389
 390         port->membase = ioremap(port->mapbase, size);
 391         if (!port->membase) {
 392                 release_mem_region(port->mapbase, size);
 393                 return -EBUSY;
 394         }
 395
 396         return 0;
 397 }
 398
 399 /*
 400  * Configure/autoconfigure the port.
 401  */
 402 static void rk2818_serial_config_port(struct uart_port *port, int flags)
 403 {
 404         if (flags & UART_CONFIG_TYPE) {
 405                 port->type = PORT_RK2818;
 406                 rk2818_serial_request_port(port);
 407         }
 408 }
 409
 410 /*
 411  * Verify the new serial_struct (for TIOCSSERIAL).
 412  */
 413 static int rk2818_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
 414 {
 415         int ret = 0;
 416         if (ser->type != PORT_UNKNOWN && ser->type != PORT_RK2818)
 417                 ret = -EINVAL;
 418         if (port->irq != ser->irq)
 419                 ret = -EINVAL;
 420         if (ser->io_type != SERIAL_IO_MEM)
 421                 ret = -EINVAL;
 422         if (port->uartclk / 16 != ser->baud_base)
 423                 ret = -EINVAL;
 424         if ((void *)port->mapbase != ser->iomem_base)
 425                 ret = -EINVAL;
 426         if (port->iobase != ser->port)
 427                 ret = -EINVAL;
 428         if (ser->hub6 != 0)
 429                 ret = -EINVAL;
 430         return ret;
 431 }
 432
 433
 434 static struct uart_ops rk2818_uart_pops = {
 435         .tx_empty = rk2818_serial_tx_empty,
 436         .set_mctrl = rk2818_serial_set_mctrl,
 437         .get_mctrl = rk2818_serial_get_mctrl,
 438         .stop_tx = rk2818_serial_stop_tx,
 439         .start_tx = rk2818_serial_start_tx,
 440         .stop_rx = rk2818_serial_stop_rx,
 441         .enable_ms = rk2818_serial_enable_ms,
 442         .break_ctl = rk2818_serial_break_ctl,
 443         .startup = rk2818_serial_startup,
 444         .shutdown = rk2818_serial_shutdown,
 445         .set_termios = rk2818_serial_set_termios,
 446         .type = rk2818_serial_type,
 447         .release_port = rk2818_serial_release_port,
 448         .request_port = rk2818_serial_request_port,
 449         .config_port = rk2818_serial_config_port,
 450         .verify_port = rk2818_serial_verify_port,
 451         .pm = rk2818_serial_pm,
 452 };
 453
 454
 455 static struct rk2818_port rk2818_uart_ports[] = {
 456         {
 457                 .uart = {
 458                         .iotype = UPIO_MEM,
 459                         .ops = &rk2818_uart_pops,
 460                         .flags = UPF_BOOT_AUTOCONF,
 461                         .fifosize = 32,
 462                         .line = 0,
 463                 },
 464         },
 465         {
 466                 .uart = {
 467                         .iotype = UPIO_MEM,
 468                         .ops = &rk2818_uart_pops,
 469                         .flags = UPF_BOOT_AUTOCONF,
 470                         .fifosize = 32,
 471                         .line = 1,
 472                 },
 473         },
 474         {
 475                 .uart = {
 476                         .iotype = UPIO_MEM,
 477                         .ops = &rk2818_uart_pops,
 478                         .flags = UPF_BOOT_AUTOCONF,
 479                         .fifosize = 32,
 480                         .line = 2,
 481                 },
 482         },
 483         {
 484                 .uart = {
 485                         .iotype = UPIO_MEM,
 486                         .ops = &rk2818_uart_pops,
 487                         .flags = UPF_BOOT_AUTOCONF,
 488                         .fifosize = 32,
 489                         .line = 3,
 490                 },
 491         },
 492 };
 493
 494 #define UART_NR ARRAY_SIZE(rk2818_uart_ports)
 495
 496 static inline struct uart_port *get_port_from_line(unsigned int line)
 497 {
 498         return &rk2818_uart_ports[line].uart;
 499 }
 500
 501 #ifdef CONFIG_SERIAL_RK2818_CONSOLE
 502 static void rk2818_console_putchar(struct uart_port *port, int ch)
 503 {
 504     while (!(rk2818_uart_read(port,UART_USR) & UART_TRANSMIT_FIFO_NOT_FULL))
 505                 cpu_relax();
 506         rk2818_uart_write(port,ch,UART_THR);
 507 }
 508
 509 /*
 510  * Interrupts are disabled on entering
 511  */
 512 static void rk2818_console_write(struct console *co, const char *s, u_int count)
 513 {
 514         struct uart_port *port;
 515         struct rk2818_port *rk2818_port;
 516
 517         BUG_ON(co->index < 0 || co->index >= UART_NR);
 518
 519         port = get_port_from_line(co->index);
 520         rk2818_port = UART_TO_RK2818(port);
 521
 522         spin_lock(&port->lock);
 523         uart_console_write(port, s, count, rk2818_console_putchar);
 524         spin_unlock(&port->lock);
 525 }
 526
 527 static int __init rk2818_console_setup(struct console *co, char *options)
 528 {
 529         struct uart_port *port;
 530         int baud, flow, bits, parity;
 531
 532         if (unlikely(co->index >= UART_NR || co->index < 0))
 533                 return -ENXIO;
 534
 535         port = get_port_from_line(co->index);
 536
 537         if (unlikely(!port->membase))
 538                 return -ENXIO;
 539
 540         port->cons = co;
 541
 542         //rk2818_init_clock(port);
 543
 544         if (options)
 545                 uart_parse_options(options, &baud, &parity, &bits, &flow);
 546
 547         bits = 8;
 548         parity = 'n';
 549         flow = 'n';
 550         rk2818_uart_write(port,rk2818_uart_read(port,UART_LCR) | LCR_WLS_8 | PARITY_DISABLED | ONE_STOP_BIT,UART_LCR);  /* 8N1 */
 551         if (baud < 300 || baud > 115200)
 552                 baud = 115200;
 553         rk2818_set_baud_rate(port, baud);
 554
 555         printk(KERN_INFO "rk2818_serial: console setup on port %d\n", port->line);
 556
 557         return uart_set_options(port, co, baud, parity, bits, flow);
 558 }
 559
 560 static struct uart_driver rk2818_uart_driver;
 561
 562 static struct console rk2818_console = {
 563         .name = "ttyS",
 564         .write = rk2818_console_write,
 565         .device = uart_console_device,
 566         .setup = rk2818_console_setup,
 567         .flags = CON_PRINTBUFFER,
 568         .index = 1,
 569         .data = &rk2818_uart_driver,
 570 };
 571
 572 #define RK2818_CONSOLE  (&rk2818_console)
 573
 574 #else
 575 #define RK2818_CONSOLE  NULL
 576 #endif
 577
 578 static struct uart_driver rk2818_uart_driver = {
 579         .owner = THIS_MODULE,
 580         .driver_name = "rk2818_serial",
 581         .dev_name = "ttyS",
 582         .nr = UART_NR,
 583         .cons = RK2818_CONSOLE,
 584         .major          = RK2818_SERIAL_MAJOR,
 585         .minor          = RK2818_SERIAL_MINOR,
 586 };
 587
 588 static int __devinit rk2818_serial_probe(struct platform_device *pdev)
 589 {
 590         struct rk2818_port *rk2818_port;
 591         struct resource *resource;
 592         struct uart_port *port;
 593
 594         if (unlikely(pdev->id < 0 || pdev->id >= UART_NR))
 595                 return -ENXIO;
 596
 597         printk(KERN_INFO "rk2818_serial: detected port %d\n", pdev->id);
 598
 599         port = get_port_from_line(pdev->id);
 600         port->dev = &pdev->dev;
 601         rk2818_port = UART_TO_RK2818(port);
 602
 603         rk2818_port->clk = clk_get(&pdev->dev, "uart_clk");
 604         if (unlikely(IS_ERR(rk2818_port->clk)))
 605                 return PTR_ERR(rk2818_port->clk);
 606         port->uartclk = 24000*1000;  ///clk_get_rate(rk2818_port->clk);
 607
 608         resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 609         if (unlikely(!resource))
 610                 return -ENXIO;
 611         port->mapbase = resource->start;
 612
 613         port->irq = platform_get_irq(pdev, 0);
 614         if (unlikely(port->irq < 0))
 615                 return -ENXIO;
 616
 617         platform_set_drvdata(pdev, port);
 618
 619         return uart_add_one_port(&rk2818_uart_driver, port);
 620 }
 621
 622 static int __devexit rk2818_serial_remove(struct platform_device *pdev)
 623 {
 624         struct rk2818_port *rk2818_port = platform_get_drvdata(pdev);
 625
 626         clk_put(rk2818_port->clk);
 627
 628         return 0;
 629 }
 630
 631 static struct platform_driver rk2818_platform_driver = {
 632         .remove = rk2818_serial_remove,
 633         .driver = {
 634                 .name = "rk2818_serial",
 635                 .owner = THIS_MODULE,
 636         },
 637 };
 638
 639 static int __init rk2818_serial_init(void)
 640 {
 641         int ret;
 642         ret = uart_register_driver(&rk2818_uart_driver);
 643         if (unlikely(ret))
 644                 return ret;
 645
 646         ret = platform_driver_probe(&rk2818_platform_driver, rk2818_serial_probe);
 647         if (unlikely(ret))
 648                 uart_unregister_driver(&rk2818_uart_driver);
 649
 650         printk(KERN_INFO "rk2818_serial: driver initialized\n");
 651
 652         return ret;
 653 }
 654
 655 static void __exit rk2818_serial_exit(void)
 656 {
 657         #ifdef CONFIG_SERIAL_RK2818_CONSOLE
 658         unregister_console(&rk2818_console);
 659         #endif
 660         platform_driver_unregister(&rk2818_platform_driver);
 661         uart_unregister_driver(&rk2818_uart_driver);
 662 }
 663
 664
 665 module_init(rk2818_serial_init);
 666 module_exit(rk2818_serial_exit);
 667
 668 MODULE_AUTHOR("lhh lhh@rock-chips.com");
 669 MODULE_DESCRIPTION("Rockchip RK2818 Serial port driver");
 670 MODULE_LICENSE("GPL");