drivers/serial/rk_serial.c

   1 /*\r
   2  * Driver for RK-UART controller.\r
   3  * Based on drivers/tty/serial/8250.c\r
   4  *\r
   5  * Copyright (C) 2011 Rochchip.\r
   6  *\r
   7  * This program is free software; you can redistribute it and/or modify\r
   8  * it under the terms of the GNU General Public License as published by\r
   9  * the Free Software Foundation; either version 2 of the License, or\r
  10 \r
  11  * (at your option) any later version.\r
  12  *\r
  13  * Author: hhb@rock-chips.com\r
  14  * Date: 2011.06.18\r
  15  */\r
  16 \r
  17 #ifndef CONFIG_SERIAL_RK_CONSOLE\r
  18 #if defined(CONFIG_SERIAL_RK29_CONSOLE)\r
  19 #define CONFIG_SERIAL_RK_CONSOLE\r
  20 #endif\r
  21 #endif\r
  22 \r
  23 #if defined(CONFIG_SERIAL_RK_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)\r
  24 #define SUPPORT_SYSRQ\r
  25 #endif\r
  26 \r
  27 //#define DEBUG\r
  28 #include <linux/module.h>\r
  29 #include <linux/ioport.h>\r
  30 #include <linux/init.h>\r
  31 #include <linux/console.h>\r
  32 #include <linux/sysrq.h>\r
  33 #include <linux/delay.h>\r
  34 #include <linux/platform_device.h>\r
  35 #include <linux/tty.h>\r
  36 #include <linux/ratelimit.h>\r
  37 #include <linux/tty_flip.h>\r
  38 #include <linux/serial_reg.h>\r
  39 #include <linux/serial_core.h>\r
  40 #include <linux/serial.h>\r
  41 #include <linux/serial_8250.h>\r
  42 #include <linux/nmi.h>\r
  43 #include <linux/mutex.h>\r
  44 #include <linux/slab.h>\r
  45 #include <linux/clk.h>\r
  46 #include <linux/timer.h>\r
  47 #include <linux/workqueue.h>\r
  48 #include <mach/rk29-dma-pl330.h>\r
  49 #include <linux/dma-mapping.h>\r
  50 \r
  51 #include <asm/io.h>\r
  52 #include <asm/irq.h>\r
  53 \r
  54 \r
  55 #define PORT_RK         90\r
  56 #define UART_USR        0x1F    /* UART Status Register */\r
  57 #define UART_IER_PTIME  0x80    /* Programmable THRE Interrupt Mode Enable */\r
  58 #define RX_TIMEOUT              (3000*10)  //uint ms\r
  59 \r
  60 #define BOTH_EMPTY      (UART_LSR_TEMT | UART_LSR_THRE)\r
  61 \r
  62 #define UART_NR 4   //uart port number\r
  63 \r
  64 /* configurate whether the port transmit-receive by DMA */\r
  65 #define OPEN_DMA      1\r
  66 #define CLOSE_DMA     0\r
  67 \r
  68 #ifdef CONFIG_UART0_DMA_RK29\r
  69 #define UART0_USE_DMA OPEN_DMA\r
  70 #else\r
  71 #define UART0_USE_DMA CLOSE_DMA\r
  72 #endif\r
  73 \r
  74 #ifdef CONFIG_UART2_DMA_RK29\r
  75 #define UART2_USE_DMA OPEN_DMA\r
  76 #else\r
  77 #define UART2_USE_DMA CLOSE_DMA\r
  78 #endif\r
  79 \r
  80 #ifdef CONFIG_UART3_DMA_RK29\r
  81 #define UART3_USE_DMA OPEN_DMA\r
  82 #else\r
  83 #define UART3_USE_DMA CLOSE_DMA\r
  84 #endif\r
  85 \r
  86 #define UART1_USE_DMA CLOSE_DMA\r
  87 \r
  88 #define DMA_TX_TRRIGE_LEVEL 30\r
  89 \r
  90 #define USE_TIMER 1           // use timer for dma transport\r
  91 #define THRE_MODE 0X00   //0yhh\r
  92 \r
  93 static struct uart_driver serial_rk_reg;\r
  94 \r
  95 /*\r
  96  * Debugging.\r
  97  */\r
  98 #define DBG_PORT 1\r
  99 #ifdef CONFIG_SERIAL_CORE_CONSOLE\r
 100 #define uart_console(port)      ((port)->cons && (port)->cons->index == (port)->line)\r
 101 #else\r
 102 #define uart_console(port)      (0)\r
 103 #endif\r
 104 \r
 105 #ifdef DEBUG\r
 106 extern void printascii(const char *);\r
 107 \r
 108 static void dbg(const char *fmt, ...)\r
 109 {\r
 110         va_list va;\r
 111         char buff[256];\r
 112 \r
 113         va_start(va, fmt);\r
 114         vsprintf(buff, fmt, va);\r
 115         va_end(va);\r
 116 \r
 117         printascii(buff);\r
 118 }\r
 119 \r
 120 #define DEBUG_INTR(fmt...)      if (!uart_console(&up->port)) dbg(fmt)\r
 121 #else\r
 122 #define DEBUG_INTR(fmt...)      do { } while (0)\r
 123 #endif\r
 124 \r
 125 \r
 126 /* added by hhb@rock-chips.com for uart dma transfer */\r
 127 \r
 128 struct rk29_uart_dma_t {\r
 129         u32 use_dma;            //1:used\r
 130         u32 rx_dma_start;\r
 131         enum dma_ch rx_dmach;\r
 132         enum dma_ch tx_dmach;\r
 133         u32 tx_dma_inited;\r
 134         u32 rx_dma_inited;\r
 135         spinlock_t              tx_lock;\r
 136         spinlock_t              rx_lock;\r
 137         char * rx_buffer;\r
 138         char * tx_buffer;\r
 139         dma_addr_t rx_phy_addr;\r
 140         dma_addr_t tx_phy_addr;\r
 141         u32 rx_buffer_size;\r
 142         u32 tx_buffer_size;\r
 143 \r
 144         u32 rb_cur_pos;\r
 145         u32 rb_pre_pos;\r
 146         u32 rx_size;\r
 147         char use_timer;\r
 148         char tx_dma_used;\r
 149         /* timer to poll activity on rx dma */\r
 150         struct timer_list       rx_timer;\r
 151         int                     rx_timeout;\r
 152 \r
 153 };\r
 154 \r
 155 struct uart_rk_port {\r
 156         struct uart_port        port;\r
 157         struct platform_device  *pdev;\r
 158         struct clk              *clk;\r
 159         unsigned int            tx_loadsz;      /* transmit fifo load size */\r
 160         unsigned char           ier;\r
 161         unsigned char           lcr;\r
 162         unsigned char           mcr;\r
 163         unsigned char           iir;\r
 164 \r
 165         /*\r
 166          * Some bits in registers are cleared on a read, so they must\r
 167          * be saved whenever the register is read but the bits will not\r
 168          * be immediately processed.\r
 169          */\r
 170 #define LSR_SAVE_FLAGS UART_LSR_BRK_ERROR_BITS\r
 171         unsigned char           lsr_saved_flags;\r
 172 #if 0\r
 173 #define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA\r
 174         unsigned char           msr_saved_flags;\r
 175 #endif\r
 176 \r
 177         char                    name[12];\r
 178         char                    fifo[32];\r
 179         char                    fifo_size;\r
 180         unsigned long           port_activity;\r
 181         struct work_struct uart_work;\r
 182         struct work_struct uart_work_rx;\r
 183         struct workqueue_struct *uart_wq;\r
 184         struct rk29_uart_dma_t *prk29_uart_dma_t;\r
 185 };\r
 186 \r
 187 static void serial_rk_release_dma_tx(struct uart_port *port);\r
 188 static int serial_rk_start_tx_dma(struct uart_port *port);\r
 189 static void serial_rk_rx_timeout(unsigned long uart);\r
 190 static void serial_rk_release_dma_rx(struct uart_port *port);\r
 191 static int serial_rk_start_rx_dma(struct uart_port *port);\r
 192 static int serial_rk_startup(struct uart_port *port);\r
 193 static inline unsigned int serial_in(struct uart_rk_port *up, int offset)\r
 194 {\r
 195         offset = offset << 2;\r
 196         return readb(up->port.membase + offset);\r
 197 }\r
 198 \r
 199 /* Save the LCR value so it can be re-written when a Busy Detect IRQ occurs. */\r
 200 static inline void dwapb_save_out_value(struct uart_rk_port *up, int offset,\r
 201                                         unsigned char value)\r
 202 {\r
 203         if (offset == UART_LCR)\r
 204                 up->lcr = value;\r
 205 }\r
 206 \r
 207 /* Read the IER to ensure any interrupt is cleared before returning from ISR. */\r
 208 static inline void dwapb_check_clear_ier(struct uart_rk_port *up, int offset)\r
 209 {\r
 210         if (offset == UART_TX || offset == UART_IER)\r
 211                 serial_in(up, UART_IER);\r
 212 }\r
 213 \r
 214 static inline void serial_out(struct uart_rk_port *up, int offset, unsigned char value)\r
 215 {\r
 216         dwapb_save_out_value(up, offset, value);\r
 217         writeb(value, up->port.membase + (offset << 2));\r
 218         dwapb_check_clear_ier(up, offset);\r
 219 }\r
 220 \r
 221 /* Uart divisor latch read */\r
 222 static inline int serial_dl_read(struct uart_rk_port *up)\r
 223 {\r
 224         return serial_in(up, UART_DLL) | serial_in(up, UART_DLM) << 8;\r
 225 }\r
 226 \r
 227 /* Uart divisor latch write */\r
 228 static inline void serial_dl_write(struct uart_rk_port *up, unsigned int value)\r
 229 {\r
 230         serial_out(up, UART_DLL, value & 0xff);\r
 231         serial_out(up, UART_DLM, value >> 8 & 0xff);\r
 232 }\r
 233 \r
 234 static void serial_lcr_write(struct uart_rk_port *up, unsigned char value)\r
 235 {\r
 236         unsigned int tmout = 10000;\r
 237 \r
 238         for (;;) {\r
 239                 unsigned char lcr;\r
 240                 serial_out(up, UART_LCR, value);\r
 241                 lcr = serial_in(up, UART_LCR);\r
 242                 if (lcr == value)\r
 243                         break;\r
 244                 /* Read the USR to clear any busy interrupts */\r
 245                 serial_in(up, UART_USR);\r
 246                 serial_in(up, UART_RX);\r
 247                 if (--tmout == 0)\r
 248                         break;\r
 249                 udelay(1);\r
 250         }\r
 251 }\r
 252 \r
 253 static inline void serial_rk_enable_ier_thri(struct uart_rk_port *up)\r
 254 {\r
 255         if (!(up->ier & UART_IER_THRI)) {\r
 256                 up->ier |= UART_IER_THRI;\r
 257                 serial_out(up, UART_IER, up->ier);\r
 258         }\r
 259 }\r
 260 \r
 261 \r
 262 static inline void serial_rk_disable_ier_thri(struct uart_rk_port *up)\r
 263 {\r
 264         if (up->ier & UART_IER_THRI) {\r
 265                 up->ier &= ~UART_IER_THRI;\r
 266                 serial_out(up, UART_IER, up->ier);\r
 267         }\r
 268 }\r
 269 \r
 270 /*\r
 271  * FIFO support.\r
 272  */\r
 273 static void serial_rk_clear_fifos(struct uart_rk_port *up)\r
 274 {\r
 275         serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);\r
 276         serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |\r
 277                        UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);\r
 278         serial_out(up, UART_FCR, 0);\r
 279 }\r
 280 \r
 281 static inline void __stop_tx(struct uart_rk_port *p)\r
 282 {\r
 283         if (p->ier & UART_IER_THRI) {\r
 284                 p->ier &= ~UART_IER_THRI;\r
 285                 serial_out(p, UART_IER, p->ier);\r
 286         }\r
 287 }\r
 288 \r
 289 static void serial_rk_stop_tx(struct uart_port *port)\r
 290 {\r
 291         struct uart_rk_port *up =\r
 292                 container_of(port, struct uart_rk_port, port);\r
 293         struct rk29_uart_dma_t *prk29_uart_dma_t = up->prk29_uart_dma_t;\r
 294 \r
 295         if(OPEN_DMA == prk29_uart_dma_t->use_dma){\r
 296                 serial_rk_release_dma_tx(port);\r
 297         }\r
 298         __stop_tx(up);\r
 299 }\r
 300 \r
 301 \r
 302 static void serial_rk_start_tx(struct uart_port *port)\r
 303 {\r
 304         struct uart_rk_port *up =\r
 305                 container_of(port, struct uart_rk_port, port);\r
 306 /*\r
 307  *  struct circ_buf *xmit = &port->state->xmit;\r
 308     int size = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);\r
 309         if(size > 64){\r
 310                 serial_rk_start_tx_dma(port);\r
 311         }\r
 312         else{\r
 313                 serial_rk_enable_ier_thri(up);\r
 314         }\r
 315 */\r
 316 \r
 317         if(0 == serial_rk_start_tx_dma(port)){\r
 318                 serial_rk_enable_ier_thri(up);\r
 319         }\r
 320 \r
 321 }\r
 322 \r
 323 \r
 324 static void serial_rk_stop_rx(struct uart_port *port)\r
 325 {\r
 326         struct uart_rk_port *up =\r
 327                 container_of(port, struct uart_rk_port, port);\r
 328         struct rk29_uart_dma_t *prk29_uart_dma_t = up->prk29_uart_dma_t;\r
 329 \r
 330         if(OPEN_DMA == prk29_uart_dma_t->use_dma){\r
 331                 serial_rk_release_dma_rx(port);\r
 332         }\r
 333         up->ier &= ~UART_IER_RLSI;\r
 334         up->port.read_status_mask &= ~UART_LSR_DR;\r
 335         serial_out(up, UART_IER, up->ier);\r
 336 }\r
 337 \r
 338 \r
 339 static void serial_rk_enable_ms(struct uart_port *port)\r
 340 {\r
 341         /* no MSR capabilities */\r
 342 #if 0\r
 343         struct uart_rk_port *up =\r
 344                 container_of(port, struct uart_rk_port, port);\r
 345 \r
 346         dev_dbg(port->dev, "%s\n", __func__);\r
 347         up->ier |= UART_IER_MSI;\r
 348         serial_out(up, UART_IER, up->ier);\r
 349 #endif\r
 350 }\r
 351 \r
 352 \r
 353 /*\r
 354  * Start transmitting by dma.\r
 355  */\r
 356 #define DMA_SERIAL_BUFFER_SIZE     UART_XMIT_SIZE\r
 357 \r
 358 /* added by hhb@rock-chips.com  for uart dma transfer*/\r
 359 static struct rk29_uart_dma_t rk29_uart_ports_dma_t[] = {\r
 360                 {UART0_USE_DMA, 0, DMACH_UART0_RX, DMACH_UART0_TX},\r
 361                 {UART1_USE_DMA, 0, DMACH_UART1_RX, DMACH_UART1_TX},\r
 362                 {UART2_USE_DMA, 0, DMACH_UART2_RX, DMACH_UART2_TX},\r
 363                 {UART3_USE_DMA, 0, DMACH_UART3_RX, DMACH_UART3_TX},\r
 364 };\r
 365 \r
 366 \r
 367 /* DMAC PL330 add by hhb@rock-chips.com */\r
 368 static struct rk29_dma_client rk29_uart_dma_client = {\r
 369         .name = "rk29xx-uart-dma",\r
 370 };\r
 371 \r
 372 /*TX*/\r
 373 \r
 374 static void serial_rk_release_dma_tx(struct uart_port *port)\r
 375 {\r
 376         struct uart_rk_port *up =\r
 377                         container_of(port, struct uart_rk_port, port);\r
 378         struct rk29_uart_dma_t *prk29_uart_dma_t = up->prk29_uart_dma_t;\r
 379         if(!port){\r
 380                 return;\r
 381         }\r
 382         if(prk29_uart_dma_t && prk29_uart_dma_t->tx_dma_inited) {\r
 383                 rk29_dma_free(prk29_uart_dma_t->tx_dmach, &rk29_uart_dma_client);\r
 384                 prk29_uart_dma_t->tx_dma_inited = 0;\r
 385         }\r
 386 }\r
 387 \r
 388 /*this function will be called every time after rk29_dma_enqueue() be invoked*/\r
 389 static void serial_rk_dma_txcb(void *buf, int size, enum rk29_dma_buffresult result) {\r
 390         struct uart_port *port = buf;\r
 391         struct uart_rk_port *up = container_of(port, struct uart_rk_port, port);\r
 392         struct circ_buf *xmit = &port->state->xmit;\r
 393 \r
 394         if(result != RK29_RES_OK){\r
 395                 return;\r
 396         }\r
 397 \r
 398         port->icount.tx += size;\r
 399         xmit->tail = (xmit->tail + size) & (UART_XMIT_SIZE - 1);\r
 400 \r
 401         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)\r
 402                 uart_write_wakeup(&up->port);\r
 403         spin_lock(&(up->prk29_uart_dma_t->tx_lock));\r
 404         up->prk29_uart_dma_t->tx_dma_used = 0;\r
 405         spin_unlock(&(up->prk29_uart_dma_t->tx_lock));\r
 406         if (!uart_circ_empty(xmit)) {\r
 407                 serial_rk_start_tx_dma(port);\r
 408         }\r
 409 \r
 410         up->port_activity = jiffies;\r
 411 //      dev_info(up->port.dev, "s:%d\n", size);\r
 412 }\r
 413 \r
 414 static int serial_rk_init_dma_tx(struct uart_port *port) {\r
 415 \r
 416         struct uart_rk_port *up =\r
 417                                 container_of(port, struct uart_rk_port, port);\r
 418         struct rk29_uart_dma_t *prk29_uart_dma_t = up->prk29_uart_dma_t;\r
 419         if(!port || !prk29_uart_dma_t){\r
 420                 dev_info(up->port.dev, "serial_rk_init_dma_tx fail\n");\r
 421                 return -1;\r
 422         }\r
 423 \r
 424         if(prk29_uart_dma_t->tx_dma_inited) {\r
 425                 return 0;\r
 426         }\r
 427 \r
 428         if (rk29_dma_request(prk29_uart_dma_t->tx_dmach, &rk29_uart_dma_client, NULL) == -EBUSY) {\r
 429                 dev_info(up->port.dev, "rk29_dma_request tx fail\n");\r
 430                 return -1;\r
 431         }\r
 432 \r
 433         if (rk29_dma_set_buffdone_fn(prk29_uart_dma_t->tx_dmach, serial_rk_dma_txcb)) {\r
 434                 dev_info(up->port.dev, "rk29_dma_set_buffdone_fn tx fail\n");\r
 435                 return -1;\r
 436         }\r
 437         if (rk29_dma_devconfig(prk29_uart_dma_t->tx_dmach, RK29_DMASRC_MEM, (unsigned long)(port->iobase + UART_TX))) {\r
 438                 dev_info(up->port.dev, "rk29_dma_devconfig tx fail\n");\r
 439                 return -1;\r
 440         }\r
 441         if (rk29_dma_config(prk29_uart_dma_t->tx_dmach, 1, 1)) {\r
 442                 dev_info(up->port.dev, "rk29_dma_config tx fail\n");\r
 443                 return -1;\r
 444         }\r
 445 \r
 446         prk29_uart_dma_t->tx_dma_inited = 1;\r
 447         dev_info(up->port.dev, "serial_rk_init_dma_tx sucess\n");\r
 448         return 0;\r
 449 \r
 450 }\r
 451 \r
 452 static int serial_rk_start_tx_dma(struct uart_port *port)\r
 453 {\r
 454 \r
 455         struct circ_buf *xmit = &port->state->xmit;\r
 456         struct uart_rk_port *up = container_of(port, struct uart_rk_port, port);\r
 457         struct rk29_uart_dma_t *prk29_uart_dma_t = up->prk29_uart_dma_t;\r
 458 \r
 459         if(0 == prk29_uart_dma_t->use_dma){\r
 460                 return CLOSE_DMA;\r
 461         }\r
 462 \r
 463         if(-1 == serial_rk_init_dma_tx(port)){\r
 464                 goto err_out;\r
 465         }\r
 466 \r
 467         if (1 == prk29_uart_dma_t->tx_dma_used){\r
 468                 return 1;\r
 469         }\r
 470         if(!uart_circ_empty(xmit)){\r
 471                 if (rk29_dma_enqueue(prk29_uart_dma_t->tx_dmach, port,\r
 472                                 prk29_uart_dma_t->tx_phy_addr + xmit->tail,\r
 473                                 CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE))) {\r
 474                         goto err_out;\r
 475                 }\r
 476         }\r
 477         rk29_dma_ctrl(prk29_uart_dma_t->tx_dmach, RK29_DMAOP_START);\r
 478         spin_lock(&(prk29_uart_dma_t->tx_lock));\r
 479         up->prk29_uart_dma_t->tx_dma_used = 1;\r
 480         spin_unlock(&(prk29_uart_dma_t->tx_lock));\r
 481 \r
 482         return 1;\r
 483 err_out:\r
 484         dev_info(up->port.dev, "-serial_rk_start_tx_dma-error-\n");\r
 485         return -1;\r
 486 \r
 487 }\r
 488 \r
 489 \r
 490 \r
 491 /*RX*/\r
 492 static void serial_rk_dma_rxcb(void *buf, int size, enum rk29_dma_buffresult result) {\r
 493 \r
 494 //      printk("^\n");\r
 495 \r
 496 }\r
 497 \r
 498 static void serial_rk_release_dma_rx(struct uart_port *port)\r
 499 {\r
 500         struct uart_rk_port *up =\r
 501                                 container_of(port, struct uart_rk_port, port);\r
 502         struct rk29_uart_dma_t *prk29_uart_dma_t = up->prk29_uart_dma_t;\r
 503         if(!port){\r
 504                 return;\r
 505         }\r
 506         if(prk29_uart_dma_t && prk29_uart_dma_t->rx_dma_inited) {\r
 507                 del_timer(&prk29_uart_dma_t->rx_timer);\r
 508                 rk29_dma_free(prk29_uart_dma_t->rx_dmach, &rk29_uart_dma_client);\r
 509                 prk29_uart_dma_t->rb_pre_pos = 0;\r
 510                 prk29_uart_dma_t->rx_dma_inited = 0;\r
 511                 prk29_uart_dma_t->rx_dma_start = 0;\r
 512         }\r
 513 }\r
 514 \r
 515 \r
 516 static int serial_rk_init_dma_rx(struct uart_port *port) {\r
 517 \r
 518         struct uart_rk_port *up =\r
 519                                 container_of(port, struct uart_rk_port, port);\r
 520         struct rk29_uart_dma_t *prk29_uart_dma_t = up->prk29_uart_dma_t;\r
 521         if(!port || !prk29_uart_dma_t){\r
 522                 dev_info(up->port.dev, "serial_rk_init_dma_rx: port fail\n");\r
 523                 return -1;\r
 524         }\r
 525         if(prk29_uart_dma_t->rx_dma_inited) {\r
 526                 return 0;\r
 527         }\r
 528 \r
 529         if (rk29_dma_request(prk29_uart_dma_t->rx_dmach, &rk29_uart_dma_client, NULL) == -EBUSY) {\r
 530                 dev_info(up->port.dev, "rk29_dma_request fail rx \n");\r
 531                 return -1;\r
 532         }\r
 533 \r
 534         if (rk29_dma_set_buffdone_fn(prk29_uart_dma_t->rx_dmach, serial_rk_dma_rxcb)) {\r
 535                 dev_info(up->port.dev, "rk29_dma_set_buffdone_fn rx fail\n");\r
 536                 return -1;\r
 537         }\r
 538         if (rk29_dma_devconfig(prk29_uart_dma_t->rx_dmach, RK29_DMASRC_HW, (unsigned long)(port->iobase + UART_RX))) {\r
 539                 dev_info(up->port.dev, "rk29_dma_devconfig rx fail\n");\r
 540                 return -1;\r
 541         }\r
 542 \r
 543         if (rk29_dma_config(prk29_uart_dma_t->rx_dmach, 1, 1)) {\r
 544                 dev_info(up->port.dev, "rk29_dma_config rx fail\n");\r
 545                 return -1;\r
 546         }\r
 547 \r
 548         rk29_dma_setflags(prk29_uart_dma_t->rx_dmach, RK29_DMAF_CIRCULAR);\r
 549 \r
 550         prk29_uart_dma_t->rx_dma_inited = 1;\r
 551         dev_info(up->port.dev, "serial_rk_init_dma_rx sucess\n");\r
 552         return 0;\r
 553 \r
 554 }\r
 555 \r
 556 static int serial_rk_start_rx_dma(struct uart_port *port)\r
 557 {\r
 558         struct uart_rk_port *up =\r
 559                                 container_of(port, struct uart_rk_port, port);\r
 560         struct rk29_uart_dma_t *prk29_uart_dma_t = up->prk29_uart_dma_t;\r
 561         if(0 == prk29_uart_dma_t->use_dma){\r
 562                 return 0;\r
 563         }\r
 564 \r
 565         if(prk29_uart_dma_t->rx_dma_start == 1){\r
 566                 return 0;\r
 567         }\r
 568 \r
 569         if(-1 == serial_rk_init_dma_rx(port)){\r
 570                 dev_info(up->port.dev, "*******serial_rk_init_dma_rx*******error*******\n");\r
 571                 return -1;\r
 572         }\r
 573 \r
 574         if (rk29_dma_enqueue(prk29_uart_dma_t->rx_dmach, (void *)up, prk29_uart_dma_t->rx_phy_addr,\r
 575                         prk29_uart_dma_t->rx_buffer_size/2)) {\r
 576                 dev_info(up->port.dev, "*******rk29_dma_enqueue fail*****\n");\r
 577                 return -1;\r
 578         }\r
 579 \r
 580         if (rk29_dma_enqueue(prk29_uart_dma_t->rx_dmach, (void *)up,\r
 581                         prk29_uart_dma_t->rx_phy_addr+prk29_uart_dma_t->rx_buffer_size/2,\r
 582                 prk29_uart_dma_t->rx_buffer_size/2)) {\r
 583                 dev_info(up->port.dev, "*******rk29_dma_enqueue fail*****\n");\r
 584                 return -1;\r
 585         }\r
 586 \r
 587         rk29_dma_ctrl(prk29_uart_dma_t->rx_dmach, RK29_DMAOP_START);\r
 588         prk29_uart_dma_t->rx_dma_start = 1;\r
 589         if(prk29_uart_dma_t->use_timer == 1){\r
 590                 mod_timer(&prk29_uart_dma_t->rx_timer, jiffies +\r
 591                                 msecs_to_jiffies(prk29_uart_dma_t->rx_timeout));\r
 592         }\r
 593         up->port_activity = jiffies;\r
 594         return 1;\r
 595 }\r
 596 \r
 597 static void serial_rk_update_rb_addr(struct uart_rk_port *up){\r
 598         dma_addr_t current_pos = 0;\r
 599         dma_addr_t rx_current_pos = 0;\r
 600         struct rk29_uart_dma_t *prk29_uart_dma_t = up->prk29_uart_dma_t;\r
 601         spin_lock(&(up->prk29_uart_dma_t->rx_lock));\r
 602         rk29_dma_getposition(prk29_uart_dma_t->rx_dmach, &current_pos, &rx_current_pos);\r
 603 \r
 604         prk29_uart_dma_t->rb_cur_pos = (rx_current_pos - prk29_uart_dma_t->rx_phy_addr);\r
 605         prk29_uart_dma_t->rx_size = CIRC_CNT(prk29_uart_dma_t->rb_cur_pos,\r
 606                         prk29_uart_dma_t->rb_pre_pos, prk29_uart_dma_t->rx_buffer_size);\r
 607 \r
 608         spin_unlock(&(up->prk29_uart_dma_t->rx_lock));\r
 609 }\r
 610 \r
 611 static void serial_rk_report_dma_rx(unsigned long uart)\r
 612 {\r
 613         struct uart_rk_port *up = (struct uart_rk_port *)uart;\r
 614         struct rk29_uart_dma_t *prk29_uart_dma_t = up->prk29_uart_dma_t;\r
 615         if(prk29_uart_dma_t->use_timer == 1){\r
 616                 serial_rk_update_rb_addr(up);\r
 617         }\r
 618         if(prk29_uart_dma_t->rx_size > 0) {\r
 619                 spin_lock(&(up->prk29_uart_dma_t->rx_lock));\r
 620 \r
 621                 if(prk29_uart_dma_t->rb_cur_pos > prk29_uart_dma_t->rb_pre_pos){\r
 622                         tty_insert_flip_string(up->port.state->port.tty, prk29_uart_dma_t->rx_buffer\r
 623                                         + prk29_uart_dma_t->rb_pre_pos, prk29_uart_dma_t->rx_size);\r
 624                         tty_flip_buffer_push(up->port.state->port.tty);\r
 625                 }\r
 626                 else if(prk29_uart_dma_t->rb_cur_pos < prk29_uart_dma_t->rb_pre_pos){\r
 627 \r
 628                         tty_insert_flip_string(up->port.state->port.tty, prk29_uart_dma_t->rx_buffer\r
 629                                         + prk29_uart_dma_t->rb_pre_pos, CIRC_CNT_TO_END(prk29_uart_dma_t->rb_cur_pos,\r
 630                                         prk29_uart_dma_t->rb_pre_pos, prk29_uart_dma_t->rx_buffer_size));\r
 631                         tty_flip_buffer_push(up->port.state->port.tty);\r
 632 \r
 633                         if(prk29_uart_dma_t->rb_cur_pos != 0){\r
 634                                 tty_insert_flip_string(up->port.state->port.tty, prk29_uart_dma_t->rx_buffer,\r
 635                                                 prk29_uart_dma_t->rb_cur_pos);\r
 636                                 tty_flip_buffer_push(up->port.state->port.tty);\r
 637                         }\r
 638                 }\r
 639 \r
 640                 prk29_uart_dma_t->rb_pre_pos = (prk29_uart_dma_t->rb_pre_pos + prk29_uart_dma_t->rx_size)\r
 641                                 & (prk29_uart_dma_t->rx_buffer_size - 1);\r
 642                 up->port.icount.rx += prk29_uart_dma_t->rx_size;\r
 643                 spin_unlock(&(up->prk29_uart_dma_t->rx_lock));\r
 644                 prk29_uart_dma_t->rx_timeout = 7;\r
 645                 up->port_activity = jiffies;\r
 646         }\r
 647 \r
 648 \r
 649 #if 1\r
 650         if (jiffies_to_msecs(jiffies - up->port_activity) < RX_TIMEOUT) {\r
 651                 if(prk29_uart_dma_t->use_timer == 1){\r
 652                         mod_timer(&prk29_uart_dma_t->rx_timer, jiffies + msecs_to_jiffies(prk29_uart_dma_t->rx_timeout));\r
 653                 }\r
 654         } else {\r
 655 \r
 656 #if 1\r
 657 \r
 658 \r
 659                 prk29_uart_dma_t->rx_timeout = 20;\r
 660                 mod_timer(&prk29_uart_dma_t->rx_timer, jiffies + msecs_to_jiffies(prk29_uart_dma_t->rx_timeout));\r
 661 #else\r
 662 //              serial_out(up, 0x2a, 0x01);\r
 663                 serial_rk_release_dma_rx(&up->port);\r
 664                 serial_out(up, 0x2a, 0x01);\r
 665                 up->ier |= (UART_IER_RDI | UART_IER_RLSI);\r
 666                 serial_out(up, UART_IER, up->ier);\r
 667 //              serial_out(up, 0x22, 0x01);\r
 668                 dev_info(up->port.dev, "*****enable recv int*****\n");\r
 669 \r
 670                 //serial_rk_start_rx_dma(&up->port);\r
 671 #endif\r
 672         }\r
 673 \r
 674 \r
 675 #else\r
 676         if(prk29_uart_dma_t->use_timer == 1){\r
 677                 mod_timer(&prk29_uart_dma_t->rx_timer, jiffies + msecs_to_jiffies(prk29_uart_dma_t->rx_timeout));\r
 678         }\r
 679 #endif\r
 680 \r
 681 }\r
 682 \r
 683 static void serial_rk_rx_timeout(unsigned long uart)\r
 684 {\r
 685         struct uart_rk_port *up = (struct uart_rk_port *)uart;\r
 686 \r
 687         //serial_rk_report_dma_rx(up);\r
 688         queue_work(up->uart_wq, &up->uart_work);\r
 689 }\r
 690 \r
 691 static void serial_rk_report_revdata_workfunc(struct work_struct *work)\r
 692 {\r
 693         struct uart_rk_port *up =\r
 694                                 container_of(work, struct uart_rk_port, uart_work);\r
 695         serial_rk_report_dma_rx((unsigned long)up);\r
 696         spin_lock(&(up->prk29_uart_dma_t->rx_lock));\r
 697 \r
 698         if(up->prk29_uart_dma_t->use_timer == 1){\r
 699 \r
 700         }else{\r
 701                 tty_insert_flip_string(up->port.state->port.tty, up->fifo, up->fifo_size);\r
 702                 tty_flip_buffer_push(up->port.state->port.tty);\r
 703                 up->port.icount.rx += up->fifo_size;\r
 704         }\r
 705 \r
 706         spin_unlock(&(up->prk29_uart_dma_t->rx_lock));\r
 707 \r
 708 }\r
 709 \r
 710 \r
 711 static void serial_rk_start_dma_rx(struct work_struct *work)\r
 712 {\r
 713         struct uart_rk_port *up =\r
 714                                         container_of(work, struct uart_rk_port, uart_work_rx);\r
 715         serial_rk_start_rx_dma(&up->port);\r
 716 }\r
 717 \r
 718 \r
 719 \r
 720 static void\r
 721 receive_chars(struct uart_rk_port *up, unsigned int *status)\r
 722 {\r
 723         struct tty_struct *tty = up->port.state->port.tty;\r
 724         unsigned char ch, lsr = *status;\r
 725         int max_count = 256;\r
 726         char flag;\r
 727 \r
 728         do {\r
 729                 if (likely(lsr & UART_LSR_DR))\r
 730                         ch = serial_in(up, UART_RX);\r
 731                 else\r
 732                         /*\r
 733                          * Intel 82571 has a Serial Over Lan device that will\r
 734                          * set UART_LSR_BI without setting UART_LSR_DR when\r
 735                          * it receives a break. To avoid reading from the\r
 736                          * receive buffer without UART_LSR_DR bit set, we\r
 737                          * just force the read character to be 0\r
 738                          */\r
 739                         ch = 0;\r
 740 \r
 741                 flag = TTY_NORMAL;\r
 742                 up->port.icount.rx++;\r
 743 \r
 744                 lsr |= up->lsr_saved_flags;\r
 745                 up->lsr_saved_flags = 0;\r
 746 \r
 747                 if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) {\r
 748                         /*\r
 749                          * For statistics only\r
 750                          */\r
 751                         if (lsr & UART_LSR_BI) {\r
 752                                 lsr &= ~(UART_LSR_FE | UART_LSR_PE);\r
 753                                 up->port.icount.brk++;\r
 754                                 /*\r
 755                                  * We do the SysRQ and SAK checking\r
 756                                  * here because otherwise the break\r
 757                                  * may get masked by ignore_status_mask\r
 758                                  * or read_status_mask.\r
 759                                  */\r
 760                                 if (uart_handle_break(&up->port))\r
 761                                         goto ignore_char;\r
 762                         } else if (lsr & UART_LSR_PE)\r
 763                                 up->port.icount.parity++;\r
 764                         else if (lsr & UART_LSR_FE)\r
 765                                 up->port.icount.frame++;\r
 766                         if (lsr & UART_LSR_OE)\r
 767                                 up->port.icount.overrun++;\r
 768 \r
 769 \r
 770                         /*\r
 771                          * Mask off conditions which should be ignored.\r
 772                          */\r
 773                         lsr &= up->port.read_status_mask;\r
 774 \r
 775                         if (lsr & UART_LSR_BI) {\r
 776                                 DEBUG_INTR("handling break....");\r
 777                                 flag = TTY_BREAK;\r
 778                         } else if (lsr & UART_LSR_PE)\r
 779                                 flag = TTY_PARITY;\r
 780                         else if (lsr & UART_LSR_FE)\r
 781                                 flag = TTY_FRAME;\r
 782                 }\r
 783                 if (uart_handle_sysrq_char(&up->port, ch))\r
 784                         goto ignore_char;\r
 785 \r
 786                 uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);\r
 787 \r
 788 ignore_char:\r
 789                 lsr = serial_in(up, UART_LSR);\r
 790         } while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (max_count-- > 0));\r
 791         spin_unlock(&up->port.lock);\r
 792         tty_flip_buffer_push(tty);\r
 793         spin_lock(&up->port.lock);\r
 794         *status = lsr;\r
 795 }\r
 796 \r
 797 static void transmit_chars(struct uart_rk_port *up)\r
 798 {\r
 799         struct circ_buf *xmit = &up->port.state->xmit;\r
 800         int count;\r
 801 \r
 802         if (up->port.x_char) {\r
 803                 serial_out(up, UART_TX, up->port.x_char);\r
 804                 up->port.icount.tx++;\r
 805                 up->port.x_char = 0;\r
 806                 return;\r
 807         }\r
 808         if (uart_tx_stopped(&up->port)) {\r
 809                 __stop_tx(up);\r
 810                 return;\r
 811         }\r
 812         if (uart_circ_empty(xmit)) {\r
 813                 __stop_tx(up);\r
 814                 return;\r
 815         }\r
 816 \r
 817         count = up->tx_loadsz;\r
 818         do {\r
 819                 serial_out(up, UART_TX, xmit->buf[xmit->tail]);\r
 820                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);\r
 821                 up->port.icount.tx++;\r
 822                 if (uart_circ_empty(xmit))\r
 823                         break;\r
 824         } while (--count > 0);\r
 825 \r
 826         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)\r
 827                 uart_write_wakeup(&up->port);\r
 828 \r
 829         DEBUG_INTR("THRE...");\r
 830 \r
 831         if (uart_circ_empty(xmit))\r
 832                 __stop_tx(up);\r
 833 }\r
 834 \r
 835 static unsigned int check_modem_status(struct uart_rk_port *up)\r
 836 {\r
 837         unsigned int status = serial_in(up, UART_MSR);\r
 838 \r
 839 #if 0\r
 840         status |= up->msr_saved_flags;\r
 841         up->msr_saved_flags = 0;\r
 842         if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&\r
 843             up->port.state != NULL) {\r
 844                 if (status & UART_MSR_TERI)\r
 845                         up->port.icount.rng++;\r
 846                 if (status & UART_MSR_DDSR)\r
 847                         up->port.icount.dsr++;\r
 848                 if (status & UART_MSR_DDCD)\r
 849                         uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);\r
 850                 if (status & UART_MSR_DCTS)\r
 851                         uart_handle_cts_change(&up->port, status & UART_MSR_CTS);\r
 852 \r
 853                 wake_up_interruptible(&up->port.state->port.delta_msr_wait);\r
 854         }\r
 855 #endif\r
 856 \r
 857         return status;\r
 858 }\r
 859 \r
 860 \r
 861 /*\r
 862  * This handles the interrupt from one port.\r
 863  */\r
 864 static void serial_rk_handle_port(struct uart_rk_port *up)\r
 865 {\r
 866         unsigned int status;\r
 867         unsigned long flags;\r
 868         spin_lock_irqsave(&up->port.lock, flags);\r
 869 \r
 870         status = serial_in(up, UART_LSR);\r
 871 \r
 872         DEBUG_INTR("status = %x...", status);\r
 873 \r
 874         if(up->prk29_uart_dma_t->use_dma == 1) {\r
 875 \r
 876                 if(up->iir & UART_IIR_RLSI){\r
 877 \r
 878                         if (status & (UART_LSR_DR | UART_LSR_BI)) {\r
 879                                 up->port_activity = jiffies;\r
 880                                 up->ier &= ~UART_IER_RLSI;\r
 881                                 up->ier &= ~UART_IER_RDI;\r
 882                                 serial_out(up, UART_IER, up->ier);\r
 883                                 //receive_chars(up, &status);\r
 884                                 //mod_timer(&up->prk29_uart_dma_t->rx_timer, jiffies +\r
 885                                                                 //msecs_to_jiffies(up->prk29_uart_dma_t->rx_timeout));\r
 886                                 if(serial_rk_start_rx_dma(&up->port) == -1){\r
 887                                         receive_chars(up, &status);\r
 888                                 }\r
 889                         }\r
 890                 }\r
 891 \r
 892 /*\r
 893                 if (status & UART_LSR_THRE) {\r
 894                         transmit_chars(up);\r
 895                 }\r
 896 */\r
 897 \r
 898         }else {   //dma mode disable\r
 899 \r
 900                 if (status & (UART_LSR_DR | UART_LSR_BI)) {\r
 901                         receive_chars(up, &status);\r
 902                 }\r
 903                 check_modem_status(up);\r
 904                 if (status & UART_LSR_THRE) {\r
 905                         transmit_chars(up);\r
 906                 }\r
 907         }\r
 908 \r
 909         spin_unlock_irqrestore(&up->port.lock, flags);\r
 910 }\r
 911 \r
 912 /*\r
 913  * This is the serial driver's interrupt routine.\r
 914  */\r
 915 \r
 916 static irqreturn_t serial_rk_interrupt(int irq, void *dev_id)\r
 917 {\r
 918         struct uart_rk_port *up = dev_id;\r
 919         int handled = 0;\r
 920         unsigned int iir;\r
 921 \r
 922         iir = serial_in(up, UART_IIR);\r
 923         DEBUG_INTR("%s(%d) iir = 0x%02x ", __func__, irq, iir);\r
 924         up->iir = iir;\r
 925 \r
 926         if (!(iir & UART_IIR_NO_INT)) {\r
 927                 serial_rk_handle_port(up);\r
 928                 handled = 1;\r
 929         } else if ((iir & UART_IIR_BUSY) == UART_IIR_BUSY) {\r
 930                 /* The DesignWare APB UART has an Busy Detect (0x07)\r
 931                  * interrupt meaning an LCR write attempt occured while the\r
 932                  * UART was busy. The interrupt must be cleared by reading\r
 933                  * the UART status register (USR) and the LCR re-written. */\r
 934                 serial_in(up, UART_USR);\r
 935                 serial_out(up, UART_LCR, up->lcr);\r
 936 \r
 937                 handled = 1;\r
 938                 DEBUG_INTR("busy ");\r
 939         }\r
 940         DEBUG_INTR("end(%d).\n", handled);\r
 941 \r
 942         return IRQ_RETVAL(handled);\r
 943 }\r
 944 \r
 945 static unsigned int serial_rk_tx_empty(struct uart_port *port)\r
 946 {\r
 947         struct uart_rk_port *up =\r
 948                 container_of(port, struct uart_rk_port, port);\r
 949         unsigned long flags;\r
 950         unsigned int lsr;\r
 951 \r
 952         dev_dbg(port->dev, "%s\n", __func__);\r
 953         spin_lock_irqsave(&up->port.lock, flags);\r
 954         lsr = serial_in(up, UART_LSR);\r
 955         up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;\r
 956         spin_unlock_irqrestore(&up->port.lock, flags);\r
 957 \r
 958         return (lsr & BOTH_EMPTY) == BOTH_EMPTY ? TIOCSER_TEMT : 0;\r
 959 }\r
 960 \r
 961 static unsigned int serial_rk_get_mctrl(struct uart_port *port)\r
 962 {\r
 963         struct uart_rk_port *up =\r
 964                 container_of(port, struct uart_rk_port, port);\r
 965         unsigned int status;\r
 966         unsigned int ret;\r
 967 \r
 968         status = check_modem_status(up);\r
 969 \r
 970         ret = 0;\r
 971         if (status & UART_MSR_DCD)\r
 972                 ret |= TIOCM_CAR;\r
 973         if (status & UART_MSR_RI)\r
 974                 ret |= TIOCM_RNG;\r
 975         if (status & UART_MSR_DSR)\r
 976                 ret |= TIOCM_DSR;\r
 977         if (status & UART_MSR_CTS)\r
 978                 ret |= TIOCM_CTS;\r
 979         dev_dbg(port->dev, "%s 0x%08x\n", __func__, ret);\r
 980         return ret;\r
 981 }\r
 982 \r
 983 static void serial_rk_set_mctrl(struct uart_port *port, unsigned int mctrl)\r
 984 {\r
 985         struct uart_rk_port *up =\r
 986                 container_of(port, struct uart_rk_port, port);\r
 987         unsigned char mcr = 0;\r
 988 \r
 989         dev_dbg(port->dev, "+%s\n", __func__);\r
 990         if (mctrl & TIOCM_RTS)\r
 991                 mcr |= UART_MCR_RTS;\r
 992         if (mctrl & TIOCM_DTR)\r
 993                 mcr |= UART_MCR_DTR;\r
 994         if (mctrl & TIOCM_OUT1)\r
 995                 mcr |= UART_MCR_OUT1;\r
 996         if (mctrl & TIOCM_OUT2)\r
 997                 mcr |= UART_MCR_OUT2;\r
 998         if (mctrl & TIOCM_LOOP)\r
 999                 mcr |= UART_MCR_LOOP;\r
1000 \r
1001         mcr |= up->mcr;\r
1002 \r
1003         serial_out(up, UART_MCR, mcr);\r
1004         dev_dbg(port->dev, "-%s mcr: 0x%02x\n", __func__, mcr);\r
1005 }\r
1006 \r
1007 static void serial_rk_break_ctl(struct uart_port *port, int break_state)\r
1008 {\r
1009         struct uart_rk_port *up =\r
1010                 container_of(port, struct uart_rk_port, port);\r
1011         unsigned long flags;\r
1012 \r
1013         dev_dbg(port->dev, "+%s\n", __func__);\r
1014         spin_lock_irqsave(&up->port.lock, flags);\r
1015         if (break_state == -1)\r
1016                 up->lcr |= UART_LCR_SBC;\r
1017         else\r
1018                 up->lcr &= ~UART_LCR_SBC;\r
1019         serial_lcr_write(up, up->lcr);\r
1020         spin_unlock_irqrestore(&up->port.lock, flags);\r
1021         dev_dbg(port->dev, "-%s lcr: 0x%02x\n", __func__, up->lcr);\r
1022 }\r
1023 \r
1024 /*\r
1025  *      Wait for transmitter & holding register to empty\r
1026  */\r
1027 static void wait_for_xmitr(struct uart_rk_port *up, int bits)\r
1028 {\r
1029         unsigned int status, tmout = 10000;\r
1030 \r
1031         /* Wait up to 10ms for the character(s) to be sent. */\r
1032         for (;;) {\r
1033                 status = serial_in(up, UART_LSR);\r
1034 \r
1035                 up->lsr_saved_flags |= status & LSR_SAVE_FLAGS;\r
1036 \r
1037                 if ((status & bits) == bits)\r
1038                         break;\r
1039                 if (--tmout == 0)\r
1040                         break;\r
1041                 udelay(1);\r
1042         }\r
1043 }\r
1044 \r
1045 #ifdef CONFIG_CONSOLE_POLL\r
1046 /*\r
1047  * Console polling routines for writing and reading from the uart while\r
1048  * in an interrupt or debug context.\r
1049  */\r
1050 \r
1051 static int serial_rk_get_poll_char(struct uart_port *port)\r
1052 {\r
1053         struct uart_rk_port *up =\r
1054                 container_of(port, struct uart_rk_port, port);\r
1055         unsigned char lsr = serial_in(up, UART_LSR);\r
1056 \r
1057         while (!(lsr & UART_LSR_DR))\r
1058                 lsr = serial_in(up, UART_LSR);\r
1059 \r
1060         return serial_in(up, UART_RX);\r
1061 }\r
1062 \r
1063 static void serial_rk_put_poll_char(struct uart_port *port,\r
1064                          unsigned char c)\r
1065 {\r
1066         unsigned int ier;\r
1067         struct uart_rk_port *up =\r
1068                 container_of(port, struct uart_rk_port, port);\r
1069 \r
1070         /*\r
1071          *      First save the IER then disable the interrupts\r
1072          */\r
1073         ier = serial_in(up, UART_IER);\r
1074         serial_out(up, UART_IER, 0);\r
1075 \r
1076         wait_for_xmitr(up, BOTH_EMPTY);\r
1077         /*\r
1078          *      Send the character out.\r
1079          *      If a LF, also do CR...\r
1080          */\r
1081         serial_out(up, UART_TX, c);\r
1082         if (c == 10) {\r
1083                 wait_for_xmitr(up, BOTH_EMPTY);\r
1084                 serial_out(up, UART_TX, 13);\r
1085         }\r
1086 \r
1087         /*\r
1088          *      Finally, wait for transmitter to become empty\r
1089          *      and restore the IER\r
1090          */\r
1091         wait_for_xmitr(up, BOTH_EMPTY);\r
1092         serial_out(up, UART_IER, ier);\r
1093 }\r
1094 \r
1095 #endif /* CONFIG_CONSOLE_POLL */\r
1096 \r
1097 static int serial_rk_startup(struct uart_port *port)\r
1098 {\r
1099         struct uart_rk_port *up =\r
1100                 container_of(port, struct uart_rk_port, port);\r
1101         unsigned long flags;\r
1102         int retval;\r
1103 \r
1104 \r
1105         dev_dbg(port->dev, "%s\n", __func__);\r
1106 \r
1107         /*\r
1108          * Allocate the IRQ\r
1109          */\r
1110         retval = request_irq(up->port.irq, serial_rk_interrupt, up->port.irqflags,\r
1111                                 up->name, up);\r
1112         if (retval)\r
1113                 return retval;\r
1114 \r
1115         up->mcr = 0;\r
1116 \r
1117         /*\r
1118          * Clear the FIFO buffers and disable them.\r
1119          * (they will be reenabled in set_termios())\r
1120          */\r
1121         serial_rk_clear_fifos(up);\r
1122 \r
1123         /*\r
1124          * Clear the interrupt registers.\r
1125          */\r
1126         (void) serial_in(up, UART_LSR);\r
1127         (void) serial_in(up, UART_RX);\r
1128         (void) serial_in(up, UART_IIR);\r
1129         (void) serial_in(up, UART_MSR);\r
1130 \r
1131         /*\r
1132          * Now, initialize the UART\r
1133          */\r
1134         serial_lcr_write(up, UART_LCR_WLEN8);\r
1135 \r
1136         spin_lock_irqsave(&up->port.lock, flags);\r
1137 \r
1138         /*\r
1139          * Most PC uarts need OUT2 raised to enable interrupts.\r
1140          */\r
1141         up->port.mctrl |= TIOCM_OUT2;\r
1142 \r
1143         serial_rk_set_mctrl(&up->port, up->port.mctrl);\r
1144 \r
1145         spin_unlock_irqrestore(&up->port.lock, flags);\r
1146 \r
1147         /*\r
1148          * Clear the interrupt registers again for luck, and clear the\r
1149          * saved flags to avoid getting false values from polling\r
1150          * routines or the previous session.\r
1151          */\r
1152         serial_in(up, UART_LSR);\r
1153         serial_in(up, UART_RX);\r
1154         serial_in(up, UART_IIR);\r
1155         serial_in(up, UART_MSR);\r
1156         up->lsr_saved_flags = 0;\r
1157 #if 0\r
1158         up->msr_saved_flags = 0;\r
1159 #endif\r
1160 \r
1161 \r
1162         if (1 == up->prk29_uart_dma_t->use_dma) {\r
1163 \r
1164                 if(up->port.state->xmit.buf != up->prk29_uart_dma_t->tx_buffer){\r
1165                         free_page((unsigned long)up->port.state->xmit.buf);\r
1166                         up->port.state->xmit.buf = up->prk29_uart_dma_t->tx_buffer;\r
1167                 }\r
1168 \r
1169 #if 1\r
1170                 serial_rk_start_rx_dma(&up->port);\r
1171 #else\r
1172                 up->ier |= UART_IER_RDI;\r
1173                 up->ier |= UART_IER_RLSI;\r
1174                 serial_out(up, UART_IER, up->ier);\r
1175 #endif\r
1176                 up->port_activity = jiffies;\r
1177 \r
1178         }else{\r
1179                 up->ier |= UART_IER_RDI;\r
1180                 up->ier |= UART_IER_RLSI;\r
1181                 serial_out(up, UART_IER, up->ier);\r
1182         }\r
1183 \r
1184         /*\r
1185          * Finally, enable interrupts.  Note: Modem status interrupts\r
1186          * are set via set_termios(), which will be occurring imminently\r
1187          * anyway, so we don't enable them here.\r
1188          */\r
1189 \r
1190         return 0;\r
1191 }\r
1192 \r
1193 \r
1194 static void serial_rk_shutdown(struct uart_port *port)\r
1195 {\r
1196         struct uart_rk_port *up =\r
1197                 container_of(port, struct uart_rk_port, port);\r
1198         unsigned long flags;\r
1199 \r
1200         dev_dbg(port->dev, "%s\n", __func__);\r
1201         /*\r
1202          * Disable interrupts from this port\r
1203          */\r
1204         up->ier = 0;\r
1205         serial_out(up, UART_IER, 0);\r
1206 \r
1207         spin_lock_irqsave(&up->port.lock, flags);\r
1208         up->port.mctrl &= ~TIOCM_OUT2;\r
1209         serial_rk_set_mctrl(&up->port, up->port.mctrl);\r
1210         spin_unlock_irqrestore(&up->port.lock, flags);\r
1211 \r
1212         /*\r
1213          * Disable break condition and FIFOs\r
1214          */\r
1215         serial_lcr_write(up, serial_in(up, UART_LCR) & ~UART_LCR_SBC);\r
1216         serial_rk_clear_fifos(up);\r
1217 \r
1218         /*\r
1219          * Read data port to reset things, and then free the irq\r
1220          */\r
1221         (void) serial_in(up, UART_RX);\r
1222 \r
1223         free_irq(up->port.irq, up);\r
1224 }\r
1225 \r
1226 static void\r
1227 serial_rk_set_termios(struct uart_port *port, struct ktermios *termios,\r
1228                       struct ktermios *old)\r
1229 {\r
1230         struct uart_rk_port *up =\r
1231                 container_of(port, struct uart_rk_port, port);\r
1232         unsigned char cval, fcr = 0;\r
1233         unsigned long flags, bits;\r
1234         unsigned int baud, quot;\r
1235 \r
1236         dev_dbg(port->dev, "+%s\n", __func__);\r
1237 \r
1238         //start bit\r
1239         bits += 1;\r
1240         switch (termios->c_cflag & CSIZE) {\r
1241         case CS5:\r
1242                 cval = UART_LCR_WLEN5;\r
1243                 bits += 5;\r
1244                 break;\r
1245         case CS6:\r
1246                 cval = UART_LCR_WLEN6;\r
1247                 bits += 6;\r
1248                 break;\r
1249         case CS7:\r
1250                 cval = UART_LCR_WLEN7;\r
1251                 bits += 7;\r
1252                 break;\r
1253         default:\r
1254         case CS8:\r
1255                 cval = UART_LCR_WLEN8;\r
1256                 bits += 8;\r
1257                 break;\r
1258         }\r
1259 \r
1260         if (termios->c_cflag & CSTOPB){\r
1261                 cval |= UART_LCR_STOP;\r
1262                 bits += 2;\r
1263         }\r
1264         else{\r
1265                 bits += 1;\r
1266         }\r
1267         if (termios->c_cflag & PARENB){\r
1268                 cval |= UART_LCR_PARITY;\r
1269                 bits += 1;\r
1270         }\r
1271         if (!(termios->c_cflag & PARODD)){\r
1272                 cval |= UART_LCR_EPAR;\r
1273         }\r
1274 #ifdef CMSPAR\r
1275         if (termios->c_cflag & CMSPAR)\r
1276                 cval |= UART_LCR_SPAR;\r
1277 #endif\r
1278 \r
1279         /*\r
1280          * Ask the core to calculate the divisor for us.\r
1281          */\r
1282         baud = uart_get_baud_rate(port, termios, old,\r
1283                                   port->uartclk / 16 / 0xffff,\r
1284                                   port->uartclk / 16);\r
1285 \r
1286         quot = uart_get_divisor(port, baud);\r
1287 \r
1288 \r
1289         dev_info(up->port.dev, "*****baud:%d*******\n", baud);\r
1290         dev_info(up->port.dev, "*****quot:%d*******\n", quot);\r
1291 \r
1292         if (baud < 2400){\r
1293                 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;\r
1294         }\r
1295         else{\r
1296                 //added by hhb@rock-chips.com\r
1297                 if(up->prk29_uart_dma_t->use_timer == 1){\r
1298                         fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00 | UART_FCR_T_TRIG_01;\r
1299                         //set time out value according to the baud rate\r
1300 /*\r
1301                         up->prk29_uart_dma_t->rx_timeout = bits*1000*1024/baud + 1;\r
1302 \r
1303                         if(up->prk29_uart_dma_t->rx_timeout < 10){\r
1304                                 up->prk29_uart_dma_t->rx_timeout = 10;\r
1305                         }\r
1306                         if(up->prk29_uart_dma_t->rx_timeout > 25){\r
1307                                 up->prk29_uart_dma_t->rx_timeout = 25;\r
1308                         }\r
1309                         printk("%s:time:%d, bits:%d, baud:%d\n", __func__, up->prk29_uart_dma_t->rx_timeout, bits, baud);\r
1310                         up->prk29_uart_dma_t->rx_timeout = 7;\r
1311 */\r
1312                 }\r
1313                 else{\r
1314                         fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 | UART_FCR_T_TRIG_01;\r
1315                 }\r
1316         }\r
1317 \r
1318         /*\r
1319          * MCR-based auto flow control.  When AFE is enabled, RTS will be\r
1320          * deasserted when the receive FIFO contains more characters than\r
1321          * the trigger, or the MCR RTS bit is cleared.  In the case where\r
1322          * the remote UART is not using CTS auto flow control, we must\r
1323          * have sufficient FIFO entries for the latency of the remote\r
1324          * UART to respond.  IOW, at least 32 bytes of FIFO.\r
1325          */\r
1326         up->mcr &= ~UART_MCR_AFE;\r
1327         if (termios->c_cflag & CRTSCTS){\r
1328                 up->mcr |= UART_MCR_AFE;\r
1329                 //dev_info(up->port.dev, "*****UART_MCR_AFE*******\n");\r
1330         }\r
1331 \r
1332 \r
1333         /*\r
1334          * Ok, we're now changing the port state.  Do it with\r
1335          * interrupts disabled.\r
1336          */\r
1337         spin_lock_irqsave(&up->port.lock, flags);\r
1338 \r
1339         /*\r
1340          * Update the per-port timeout.\r
1341          */\r
1342         uart_update_timeout(port, termios->c_cflag, baud);\r
1343 \r
1344         up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;\r
1345         if (termios->c_iflag & INPCK)\r
1346                 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;\r
1347         if (termios->c_iflag & (BRKINT | PARMRK))\r
1348                 up->port.read_status_mask |= UART_LSR_BI;\r
1349 \r
1350         /*\r
1351          * Characteres to ignore\r
1352          */\r
1353         up->port.ignore_status_mask = 0;\r
1354         if (termios->c_iflag & IGNPAR)\r
1355                 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;\r
1356         if (termios->c_iflag & IGNBRK) {\r
1357                 up->port.ignore_status_mask |= UART_LSR_BI;\r
1358                 /*\r
1359                  * If we're ignoring parity and break indicators,\r
1360                  * ignore overruns too (for real raw support).\r
1361                  */\r
1362                 if (termios->c_iflag & IGNPAR)\r
1363                         up->port.ignore_status_mask |= UART_LSR_OE;\r
1364         }\r
1365 \r
1366         /*\r
1367          * ignore all characters if CREAD is not set\r
1368          */\r
1369         if ((termios->c_cflag & CREAD) == 0)\r
1370                 up->port.ignore_status_mask |= UART_LSR_DR;\r
1371 \r
1372         /*\r
1373          * CTS flow control flag and modem status interrupts\r
1374          */\r
1375         up->ier &= ~UART_IER_MSI;\r
1376 #if 0\r
1377         if (UART_ENABLE_MS(&up->port, termios->c_cflag))\r
1378                 up->ier |= UART_IER_MSI;\r
1379 #endif\r
1380 \r
1381         serial_out(up, UART_IER, up->ier);\r
1382 \r
1383         serial_lcr_write(up, cval | UART_LCR_DLAB);/* set DLAB */\r
1384 \r
1385         serial_dl_write(up, quot);\r
1386 \r
1387         serial_lcr_write(up, cval);             /* reset DLAB */\r
1388         up->lcr = cval;                         /* Save LCR */\r
1389 \r
1390         serial_out(up, UART_FCR, fcr);          /* set fcr */\r
1391 //      fcr |= UART_FCR_DMA_SELECT;\r
1392 //      serial_out(up, UART_FCR, fcr);          /* set fcr */\r
1393         serial_rk_set_mctrl(&up->port, up->port.mctrl);\r
1394 \r
1395         spin_unlock_irqrestore(&up->port.lock, flags);\r
1396         /* Don't rewrite B0 */\r
1397         if (tty_termios_baud_rate(termios))\r
1398                 tty_termios_encode_baud_rate(termios, baud, baud);\r
1399         dev_dbg(port->dev, "-%s baud %d\n", __func__, baud);\r
1400 }\r
1401 \r
1402 #if 0\r
1403 static void\r
1404 serial_rk_set_ldisc(struct uart_port *port, int new)\r
1405 {\r
1406         if (new == N_PPS) {\r
1407                 port->flags |= UPF_HARDPPS_CD;\r
1408                 serial_rk_enable_ms(port);\r
1409         } else\r
1410                 port->flags &= ~UPF_HARDPPS_CD;\r
1411 }\r
1412 #endif\r
1413 \r
1414 static void\r
1415 serial_rk_pm(struct uart_port *port, unsigned int state,\r
1416               unsigned int oldstate)\r
1417 {\r
1418         struct uart_rk_port *up =\r
1419                 container_of(port, struct uart_rk_port, port);\r
1420 \r
1421         dev_dbg(port->dev, "%s: %s\n", __func__, state ? "disable" : "enable");\r
1422         if (state)\r
1423                 clk_disable(up->clk);\r
1424         else\r
1425                 clk_enable(up->clk);\r
1426 }\r
1427 \r
1428 static void serial_rk_release_port(struct uart_port *port)\r
1429 {\r
1430         dev_dbg(port->dev, "%s\n", __func__);\r
1431 }\r
1432 \r
1433 static int serial_rk_request_port(struct uart_port *port)\r
1434 {\r
1435         dev_dbg(port->dev, "%s\n", __func__);\r
1436         return 0;\r
1437 }\r
1438 \r
1439 static void serial_rk_config_port(struct uart_port *port, int flags)\r
1440 {\r
1441         dev_dbg(port->dev, "%s\n", __func__);\r
1442         port->type = PORT_RK;\r
1443 }\r
1444 \r
1445 static int\r
1446 serial_rk_verify_port(struct uart_port *port, struct serial_struct *ser)\r
1447 {\r
1448         /* we don't want the core code to modify any port params */\r
1449         dev_dbg(port->dev, "%s\n", __func__);\r
1450         return -EINVAL;\r
1451 }\r
1452 \r
1453 static const char *\r
1454 serial_rk_type(struct uart_port *port)\r
1455 {\r
1456         struct uart_rk_port *up =\r
1457                 container_of(port, struct uart_rk_port, port);\r
1458 \r
1459         dev_dbg(port->dev, "%s: %s\n", __func__, up->name);\r
1460         return up->name;\r
1461 }\r
1462 \r
1463 static struct uart_ops serial_rk_pops = {\r
1464         .tx_empty       = serial_rk_tx_empty,\r
1465         .set_mctrl      = serial_rk_set_mctrl,\r
1466         .get_mctrl      = serial_rk_get_mctrl,\r
1467         .stop_tx        = serial_rk_stop_tx,\r
1468         .start_tx       = serial_rk_start_tx,\r
1469         .stop_rx        = serial_rk_stop_rx,\r
1470         .enable_ms      = serial_rk_enable_ms,\r
1471         .break_ctl      = serial_rk_break_ctl,\r
1472         .startup        = serial_rk_startup,\r
1473         .shutdown       = serial_rk_shutdown,\r
1474         .set_termios    = serial_rk_set_termios,\r
1475 #if 0\r
1476         .set_ldisc      = serial_rk_set_ldisc,\r
1477 #endif\r
1478         .pm             = serial_rk_pm,\r
1479         .type           = serial_rk_type,\r
1480         .release_port   = serial_rk_release_port,\r
1481         .request_port   = serial_rk_request_port,\r
1482         .config_port    = serial_rk_config_port,\r
1483         .verify_port    = serial_rk_verify_port,\r
1484 #ifdef CONFIG_CONSOLE_POLL\r
1485         .poll_get_char = serial_rk_get_poll_char,\r
1486         .poll_put_char = serial_rk_put_poll_char,\r
1487 #endif\r
1488 };\r
1489 \r
1490 #ifdef CONFIG_SERIAL_RK_CONSOLE\r
1491 \r
1492 static struct uart_rk_port *serial_rk_console_ports[UART_NR];\r
1493 \r
1494 static void serial_rk_console_putchar(struct uart_port *port, int ch)\r
1495 {\r
1496         struct uart_rk_port *up =\r
1497                 container_of(port, struct uart_rk_port, port);\r
1498 \r
1499         wait_for_xmitr(up, UART_LSR_THRE);\r
1500         serial_out(up, UART_TX, ch);\r
1501 }\r
1502 \r
1503 /*\r
1504  *      Print a string to the serial port trying not to disturb\r
1505  *      any possible real use of the port...\r
1506  *\r
1507  *      The console_lock must be held when we get here.\r
1508  */\r
1509 static void\r
1510 serial_rk_console_write(struct console *co, const char *s, unsigned int count)\r
1511 {\r
1512         struct uart_rk_port *up = serial_rk_console_ports[co->index];\r
1513         unsigned long flags;\r
1514         unsigned int ier;\r
1515         int locked = 1;\r
1516 \r
1517         touch_nmi_watchdog();\r
1518 \r
1519         local_irq_save(flags);\r
1520         if (up->port.sysrq) {\r
1521                 /* serial_rk_handle_port() already took the lock */\r
1522                 locked = 0;\r
1523         } else if (oops_in_progress) {\r
1524                 locked = spin_trylock(&up->port.lock);\r
1525         } else\r
1526                 spin_lock(&up->port.lock);\r
1527 \r
1528         /*\r
1529          *      First save the IER then disable the interrupts\r
1530          */\r
1531         ier = serial_in(up, UART_IER);\r
1532 \r
1533         serial_out(up, UART_IER, 0);\r
1534 \r
1535         uart_console_write(&up->port, s, count, serial_rk_console_putchar);\r
1536 \r
1537         /*\r
1538          *      Finally, wait for transmitter to become empty\r
1539          *      and restore the IER\r
1540          */\r
1541         wait_for_xmitr(up, BOTH_EMPTY);\r
1542         serial_out(up, UART_IER, ier);\r
1543 \r
1544 #if 0\r
1545         /*\r
1546          *      The receive handling will happen properly because the\r
1547          *      receive ready bit will still be set; it is not cleared\r
1548          *      on read.  However, modem control will not, we must\r
1549          *      call it if we have saved something in the saved flags\r
1550          *      while processing with interrupts off.\r
1551          */\r
1552         if (up->msr_saved_flags)\r
1553                 check_modem_status(up);\r
1554 #endif\r
1555 \r
1556         if (locked)\r
1557                 spin_unlock(&up->port.lock);\r
1558         local_irq_restore(flags);\r
1559 }\r
1560 \r
1561 static int __init serial_rk_console_setup(struct console *co, char *options)\r
1562 {\r
1563         struct uart_rk_port *up;\r
1564         int baud = 115200;\r
1565         int bits = 8;\r
1566         int parity = 'n';\r
1567         int flow = 'n';\r
1568 \r
1569         if (unlikely(co->index >= UART_NR || co->index < 0))\r
1570                 return -ENODEV;\r
1571 \r
1572         if (serial_rk_console_ports[co->index] == NULL)\r
1573                 return -ENODEV;\r
1574         up = serial_rk_console_ports[co->index];\r
1575 \r
1576         if (options)\r
1577                 uart_parse_options(options, &baud, &parity, &bits, &flow);\r
1578 \r
1579         return uart_set_options(&up->port, co, baud, parity, bits, flow);\r
1580 }\r
1581 \r
1582 static struct console serial_rk_console = {\r
1583         .name           = "ttyS",\r
1584         .write          = serial_rk_console_write,\r
1585         .device         = uart_console_device,\r
1586         .setup          = serial_rk_console_setup,\r
1587         .flags          = CON_PRINTBUFFER | CON_ANYTIME,\r
1588         .index          = -1,\r
1589         .data           = &serial_rk_reg,\r
1590 };\r
1591 \r
1592 static void serial_rk_add_console_port(struct uart_rk_port *up)\r
1593 {\r
1594         serial_rk_console_ports[up->pdev->id] = up;\r
1595 }\r
1596 \r
1597 #define SERIAL_CONSOLE  &serial_rk_console\r
1598 #else\r
1599 #define SERIAL_CONSOLE  NULL\r
1600 \r
1601 static inline void serial_rk_add_console_port(struct uart_rk_port *up)\r
1602 {}\r
1603 \r
1604 #endif\r
1605 \r
1606 static struct uart_driver serial_rk_reg = {\r
1607         .owner                  = THIS_MODULE,\r
1608         .driver_name            = "rk29_serial",\r
1609         .dev_name               = "ttyS",\r
1610         .major                  = TTY_MAJOR,\r
1611         .minor                  = 64,\r
1612         .cons                   = SERIAL_CONSOLE,\r
1613         .nr                     = UART_NR,\r
1614 };\r
1615 \r
1616 static int __devinit serial_rk_probe(struct platform_device *pdev)\r
1617 {\r
1618         struct uart_rk_port     *up;\r
1619         struct resource         *mem;\r
1620         int irq;\r
1621         int ret = -ENOSPC;\r
1622         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);\r
1623         if (!mem) {\r
1624                 dev_err(&pdev->dev, "no mem resource?\n");\r
1625                 return -ENODEV;\r
1626         }\r
1627 \r
1628         irq = platform_get_irq(pdev, 0);\r
1629         if (irq < 0) {\r
1630                 dev_err(&pdev->dev, "no irq resource?\n");\r
1631                 return irq;\r
1632         }\r
1633 \r
1634         if (!request_mem_region(mem->start, (mem->end - mem->start) + 1,\r
1635                                 pdev->dev.driver->name)) {\r
1636                 dev_err(&pdev->dev, "memory region already claimed\n");\r
1637                 return -EBUSY;\r
1638         }\r
1639 \r
1640         up = kzalloc(sizeof(*up), GFP_KERNEL);\r
1641         if (up == NULL) {\r
1642                 ret = -ENOMEM;\r
1643                 goto do_release_region;\r
1644         }\r
1645 \r
1646         sprintf(up->name, "rk29_serial.%d", pdev->id);\r
1647         up->pdev = pdev;\r
1648         up->clk = clk_get(&pdev->dev, "uart");\r
1649         if (unlikely(IS_ERR(up->clk))) {\r
1650                 ret = PTR_ERR(up->clk);\r
1651                 goto do_free;\r
1652         }\r
1653         up->tx_loadsz = 30;\r
1654         up->prk29_uart_dma_t = &rk29_uart_ports_dma_t[pdev->id];\r
1655         up->port.dev = &pdev->dev;\r
1656         up->port.type = PORT_RK;\r
1657         up->port.irq = irq;\r
1658         up->port.iotype = UPIO_DWAPB;\r
1659 \r
1660         up->port.regshift = 2;\r
1661         up->port.fifosize = 32;\r
1662         up->port.ops = &serial_rk_pops;\r
1663         up->port.line = pdev->id;\r
1664         up->port.iobase = mem->start;\r
1665         up->port.membase = ioremap_nocache(mem->start, mem->end - mem->start + 1);\r
1666         if (!up->port.membase) {\r
1667                 ret = -ENOMEM;\r
1668                 goto do_put_clk;\r
1669         }\r
1670         up->port.mapbase = mem->start;\r
1671         up->port.irqflags = 0;\r
1672         up->port.uartclk = clk_get_rate(up->clk);\r
1673 \r
1674         /* set dma config */\r
1675         if(1 == up->prk29_uart_dma_t->use_dma) {\r
1676                 pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);\r
1677 \r
1678                 //timer\r
1679                 up->prk29_uart_dma_t->use_timer = USE_TIMER;\r
1680                 up->prk29_uart_dma_t->rx_timer.function = serial_rk_rx_timeout;\r
1681                 up->prk29_uart_dma_t->rx_timer.data = (unsigned long)up;\r
1682                 up->prk29_uart_dma_t->rx_timeout = 7;\r
1683                 up->prk29_uart_dma_t->rx_timer.expires = jiffies + msecs_to_jiffies(up->prk29_uart_dma_t->rx_timeout);\r
1684                 init_timer(&up->prk29_uart_dma_t->rx_timer);\r
1685                 //tx buffer\r
1686                 up->prk29_uart_dma_t->tx_buffer_size = UART_XMIT_SIZE;\r
1687                 up->prk29_uart_dma_t->tx_buffer = dmam_alloc_coherent(up->port.dev, up->prk29_uart_dma_t->tx_buffer_size,\r
1688                                 &up->prk29_uart_dma_t->tx_phy_addr, DMA_MEMORY_MAP);\r
1689                 if(!up->prk29_uart_dma_t->tx_buffer){\r
1690                         dev_info(up->port.dev, "dmam_alloc_coherent dma_tx_buffer fail\n");\r
1691                 }\r
1692                 else{\r
1693                         dev_info(up->port.dev, "dma_tx_buffer 0x%08x\n", (unsigned) up->prk29_uart_dma_t->tx_buffer);\r
1694                         dev_info(up->port.dev, "dma_tx_phy 0x%08x\n", (unsigned) up->prk29_uart_dma_t->tx_phy_addr);\r
1695                 }\r
1696                 //rx buffer\r
1697                 up->prk29_uart_dma_t->rx_buffer_size = UART_XMIT_SIZE*32;\r
1698                 up->prk29_uart_dma_t->rx_buffer = dmam_alloc_coherent(up->port.dev, up->prk29_uart_dma_t->rx_buffer_size,\r
1699                                 &up->prk29_uart_dma_t->rx_phy_addr, DMA_MEMORY_MAP);\r
1700                 up->prk29_uart_dma_t->rb_pre_pos = 0;\r
1701                 if(!up->prk29_uart_dma_t->rx_buffer){\r
1702                         dev_info(up->port.dev, "dmam_alloc_coherent dma_rx_buffer fail\n");\r
1703                 }\r
1704                 else {\r
1705                         dev_info(up->port.dev, "dma_rx_buffer 0x%08x\n", (unsigned) up->prk29_uart_dma_t->rx_buffer);\r
1706                         dev_info(up->port.dev, "up 0x%08x\n", (unsigned)up->prk29_uart_dma_t);\r
1707                 }\r
1708 \r
1709                 // work queue\r
1710                 INIT_WORK(&up->uart_work, serial_rk_report_revdata_workfunc);\r
1711                 INIT_WORK(&up->uart_work_rx, serial_rk_start_dma_rx);\r
1712                 up->uart_wq = create_singlethread_workqueue("uart_workqueue");\r
1713                 up->prk29_uart_dma_t->rx_dma_start = 0;\r
1714                 spin_lock_init(&(up->prk29_uart_dma_t->tx_lock));\r
1715                 spin_lock_init(&(up->prk29_uart_dma_t->rx_lock));\r
1716                 serial_rk_init_dma_rx(&up->port);\r
1717                 serial_rk_init_dma_tx(&up->port);\r
1718                 up->ier |= THRE_MODE;                   // enable THRE interrupt mode\r
1719                 serial_out(up, UART_IER, up->ier);\r
1720         }\r
1721         clk_enable(up->clk);  // enable the config uart clock\r
1722 \r
1723         serial_rk_add_console_port(up);\r
1724         ret = uart_add_one_port(&serial_rk_reg, &up->port);\r
1725         if (ret != 0)\r
1726                 goto do_iounmap;\r
1727 \r
1728         platform_set_drvdata(pdev, up);\r
1729         dev_info(&pdev->dev, "membase 0x%08x\n", (unsigned) up->port.membase);\r
1730 \r
1731         return 0;\r
1732 \r
1733 do_iounmap:\r
1734         iounmap(up->port.membase);\r
1735         up->port.membase = NULL;\r
1736 do_put_clk:\r
1737         clk_put(up->clk);\r
1738 do_free:\r
1739         kfree(up);\r
1740 do_release_region:\r
1741         release_mem_region(mem->start, (mem->end - mem->start) + 1);\r
1742         return ret;\r
1743 }\r
1744 \r
1745 static int __devexit serial_rk_remove(struct platform_device *pdev)\r
1746 {\r
1747         struct uart_rk_port *up = platform_get_drvdata(pdev);\r
1748 \r
1749         platform_set_drvdata(pdev, NULL);\r
1750         if (up) {\r
1751                 struct resource *mem;\r
1752                 destroy_workqueue(up->uart_wq);\r
1753                 uart_remove_one_port(&serial_rk_reg, &up->port);\r
1754                 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);\r
1755                 iounmap(up->port.membase);\r
1756                 up->port.membase = NULL;\r
1757                 clk_put(up->clk);\r
1758                 kfree(up);\r
1759                 release_mem_region(mem->start, (mem->end - mem->start) + 1);\r
1760         }\r
1761 \r
1762         return 0;\r
1763 }\r
1764 \r
1765 static int serial_rk_suspend(struct platform_device *dev, pm_message_t state)\r
1766 {\r
1767         struct uart_rk_port *up = platform_get_drvdata(dev);\r
1768 \r
1769         if (up)\r
1770                 uart_suspend_port(&serial_rk_reg, &up->port);\r
1771         return 0;\r
1772 }\r
1773 \r
1774 static int serial_rk_resume(struct platform_device *dev)\r
1775 {\r
1776         struct uart_rk_port *up = platform_get_drvdata(dev);\r
1777 \r
1778         if (up)\r
1779                 uart_resume_port(&serial_rk_reg, &up->port);\r
1780         return 0;\r
1781 }\r
1782 \r
1783 static struct platform_driver serial_rk_driver = {\r
1784         .probe          = serial_rk_probe,\r
1785         .remove         = __devexit_p(serial_rk_remove),\r
1786         .suspend        = serial_rk_suspend,\r
1787         .resume         = serial_rk_resume,\r
1788         .driver         = {\r
1789 #if defined(CONFIG_SERIAL_RK29)\r
1790                 .name   = "rk29_serial",\r
1791 #elif defined(CONFIG_SERIAL_RK2818)\r
1792                 .name   = "rk2818_serial",\r
1793 #else\r
1794                 .name   = "rk_serial",\r
1795 #endif\r
1796                 .owner  = THIS_MODULE,\r
1797         },\r
1798 };\r
1799 \r
1800 static int __init serial_rk_init(void)\r
1801 {\r
1802         int ret;\r
1803 \r
1804         ret = uart_register_driver(&serial_rk_reg);\r
1805         if (ret)\r
1806                 return ret;\r
1807 \r
1808         ret = platform_driver_register(&serial_rk_driver);\r
1809         if (ret != 0)\r
1810                 uart_unregister_driver(&serial_rk_reg);\r
1811 \r
1812         return ret;\r
1813 }\r
1814 \r
1815 static void __exit serial_rk_exit(void)\r
1816 {\r
1817         platform_driver_unregister(&serial_rk_driver);\r
1818         uart_unregister_driver(&serial_rk_reg);\r
1819 }\r
1820 \r
1821 module_init(serial_rk_init);\r
1822 module_exit(serial_rk_exit);\r
1823 \r
1824 MODULE_LICENSE("GPL");\r
1825 MODULE_DESCRIPTION("RK UART driver");\r
1826 \r