2 * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 #include <linux/kernel.h>
20 #include <linux/of_address.h>
23 #include <soc/tegra/fuse.h>
27 #define APBMISC_BASE 0x70000800
28 #define APBMISC_SIZE 0x64
29 #define FUSE_SKU_INFO 0x10
31 #define PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT 4
32 #define PMC_STRAPPING_OPT_A_RAM_CODE_MASK_LONG \
33 (0xf << PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT)
34 #define PMC_STRAPPING_OPT_A_RAM_CODE_MASK_SHORT \
35 (0x3 << PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT)
37 static void __iomem *apbmisc_base;
38 static void __iomem *strapping_base;
39 static bool long_ram_code;
41 u32 tegra_read_chipid(void)
43 return readl_relaxed(apbmisc_base + 4);
46 u8 tegra_get_chip_id(void)
49 WARN(1, "Tegra Chip ID not yet available\n");
53 return (tegra_read_chipid() >> 8) & 0xff;
56 u32 tegra_read_straps(void)
59 return readl_relaxed(strapping_base);
64 u32 tegra_read_ram_code(void)
66 u32 straps = tegra_read_straps();
69 straps &= PMC_STRAPPING_OPT_A_RAM_CODE_MASK_LONG;
71 straps &= PMC_STRAPPING_OPT_A_RAM_CODE_MASK_SHORT;
73 return straps >> PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT;
76 static const struct of_device_id apbmisc_match[] __initconst = {
77 { .compatible = "nvidia,tegra20-apbmisc", },
81 void __init tegra_init_revision(void)
83 u32 id, chip_id, minor_rev;
86 id = tegra_read_chipid();
87 chip_id = (id >> 8) & 0xff;
88 minor_rev = (id >> 16) & 0xf;
92 rev = TEGRA_REVISION_A01;
95 rev = TEGRA_REVISION_A02;
98 if (chip_id == TEGRA20 && (tegra20_spare_fuse_early(18) ||
99 tegra20_spare_fuse_early(19)))
100 rev = TEGRA_REVISION_A03p;
102 rev = TEGRA_REVISION_A03;
105 rev = TEGRA_REVISION_A04;
108 rev = TEGRA_REVISION_UNKNOWN;
111 tegra_sku_info.revision = rev;
113 if (chip_id == TEGRA20)
114 tegra_sku_info.sku_id = tegra20_fuse_early(FUSE_SKU_INFO);
116 tegra_sku_info.sku_id = tegra30_fuse_readl(FUSE_SKU_INFO);
119 void __init tegra_init_apbmisc(void)
121 struct device_node *np;
123 np = of_find_matching_node(NULL, apbmisc_match);
124 apbmisc_base = of_iomap(np, 0);
126 pr_warn("ioremap tegra apbmisc failed. using %08x instead\n",
128 apbmisc_base = ioremap(APBMISC_BASE, APBMISC_SIZE);
131 strapping_base = of_iomap(np, 1);
133 pr_err("ioremap tegra strapping_base failed\n");
135 long_ram_code = of_property_read_bool(np, "nvidia,long-ram-code");