2 * MPC512x PSC in SPI mode driver.
4 * Copyright (C) 2007,2008 Freescale Semiconductor Inc.
5 * Original port from 52xx driver:
6 * Hongjun Chen <hong-jun.chen@freescale.com>
8 * Fork of mpc52xx_psc_spi.c:
9 * Copyright (C) 2006 TOPTICA Photonics AG., Dragos Carp
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
17 #include <linux/module.h>
18 #include <linux/kernel.h>
19 #include <linux/init.h>
20 #include <linux/errno.h>
21 #include <linux/interrupt.h>
22 #include <linux/of_address.h>
23 #include <linux/of_irq.h>
24 #include <linux/of_platform.h>
25 #include <linux/completion.h>
27 #include <linux/delay.h>
28 #include <linux/clk.h>
29 #include <linux/spi/spi.h>
30 #include <linux/fsl_devices.h>
31 #include <linux/gpio.h>
32 #include <asm/mpc52xx_psc.h>
34 struct mpc512x_psc_spi {
35 void (*cs_control)(struct spi_device *spi, bool on);
37 /* driver internal data */
38 struct mpc52xx_psc __iomem *psc;
39 struct mpc512x_psc_fifo __iomem *fifo;
46 struct completion txisrdone;
49 /* controller state */
50 struct mpc512x_psc_spi_cs {
55 /* set clock freq, clock ramp, bits per work
56 * if t is NULL then reset the values to the default values
58 static int mpc512x_psc_spi_transfer_setup(struct spi_device *spi,
59 struct spi_transfer *t)
61 struct mpc512x_psc_spi_cs *cs = spi->controller_state;
63 cs->speed_hz = (t && t->speed_hz)
64 ? t->speed_hz : spi->max_speed_hz;
65 cs->bits_per_word = (t && t->bits_per_word)
66 ? t->bits_per_word : spi->bits_per_word;
67 cs->bits_per_word = ((cs->bits_per_word + 7) / 8) * 8;
71 static void mpc512x_psc_spi_activate_cs(struct spi_device *spi)
73 struct mpc512x_psc_spi_cs *cs = spi->controller_state;
74 struct mpc512x_psc_spi *mps = spi_master_get_devdata(spi->master);
75 struct mpc52xx_psc __iomem *psc = mps->psc;
81 sicr = in_be32(&psc->sicr);
83 /* Set clock phase and polarity */
84 if (spi->mode & SPI_CPHA)
89 if (spi->mode & SPI_CPOL)
94 if (spi->mode & SPI_LSB_FIRST)
98 out_be32(&psc->sicr, sicr);
100 ccr = in_be32(&psc->ccr);
102 speed = cs->speed_hz;
104 speed = 1000000; /* default 1MHz */
105 bclkdiv = (mps->mclk_rate / speed) - 1;
107 ccr |= (((bclkdiv & 0xff) << 16) | (((bclkdiv >> 8) & 0xff) << 8));
108 out_be32(&psc->ccr, ccr);
109 mps->bits_per_word = cs->bits_per_word;
111 if (mps->cs_control && gpio_is_valid(spi->cs_gpio))
112 mps->cs_control(spi, (spi->mode & SPI_CS_HIGH) ? 1 : 0);
115 static void mpc512x_psc_spi_deactivate_cs(struct spi_device *spi)
117 struct mpc512x_psc_spi *mps = spi_master_get_devdata(spi->master);
119 if (mps->cs_control && gpio_is_valid(spi->cs_gpio))
120 mps->cs_control(spi, (spi->mode & SPI_CS_HIGH) ? 0 : 1);
124 /* extract and scale size field in txsz or rxsz */
125 #define MPC512x_PSC_FIFO_SZ(sz) ((sz & 0x7ff) << 2);
129 static int mpc512x_psc_spi_transfer_rxtx(struct spi_device *spi,
130 struct spi_transfer *t)
132 struct mpc512x_psc_spi *mps = spi_master_get_devdata(spi->master);
133 struct mpc512x_psc_fifo __iomem *fifo = mps->fifo;
134 size_t tx_len = t->len;
135 size_t rx_len = t->len;
136 u8 *tx_buf = (u8 *)t->tx_buf;
137 u8 *rx_buf = (u8 *)t->rx_buf;
139 if (!tx_buf && !rx_buf && t->len)
142 while (rx_len || tx_len) {
150 * send the TX bytes in as large a chunk as possible
151 * but neither exceed the TX nor the RX FIFOs
153 fifosz = MPC512x_PSC_FIFO_SZ(in_be32(&fifo->txsz));
154 txcount = min(fifosz, tx_len);
155 fifosz = MPC512x_PSC_FIFO_SZ(in_be32(&fifo->rxsz));
156 fifosz -= in_be32(&fifo->rxcnt) + 1;
157 txcount = min(fifosz, txcount);
160 /* fill the TX FIFO */
161 while (txcount-- > 0) {
162 data = tx_buf ? *tx_buf++ : 0;
163 if (tx_len == EOFBYTE && t->cs_change)
164 setbits32(&fifo->txcmd,
165 MPC512x_PSC_FIFO_EOF);
166 out_8(&fifo->txdata_8, data);
170 /* have the ISR trigger when the TX FIFO is empty */
171 reinit_completion(&mps->txisrdone);
172 out_be32(&fifo->txisr, MPC512x_PSC_FIFO_EMPTY);
173 out_be32(&fifo->tximr, MPC512x_PSC_FIFO_EMPTY);
174 wait_for_completion(&mps->txisrdone);
178 * consume as much RX data as the FIFO holds, while we
179 * iterate over the transfer's TX data length
181 * only insist in draining all the remaining RX bytes
182 * when the TX bytes were exhausted (that's at the very
183 * end of this transfer, not when still iterating over
184 * the transfer's chunks)
190 * grab whatever was in the FIFO when we started
191 * looking, don't bother fetching what was added to
192 * the FIFO while we read from it -- we'll return
193 * here eventually and prefer sending out remaining
196 fifosz = in_be32(&fifo->rxcnt);
197 rxcount = min(fifosz, rx_len);
198 while (rxcount-- > 0) {
199 data = in_8(&fifo->rxdata_8);
206 * come back later if there still is TX data to send,
207 * bail out of the RX drain loop if all of the TX data
208 * was sent and all of the RX data was received (i.e.
209 * when the transmission has completed)
217 * TX data transmission has completed while RX data
218 * is still pending -- that's a transient situation
219 * which depends on wire speed and specific
220 * hardware implementation details (buffering) yet
221 * should resolve very quickly
223 * just yield for a moment to not hog the CPU for
224 * too long when running SPI at low speed
226 * the timeout range is rather arbitrary and tries
227 * to balance throughput against system load; the
228 * chosen values result in a minimal timeout of 50
229 * times 10us and thus work at speeds as low as
230 * some 20kbps, while the maximum timeout at the
231 * transfer's end could be 5ms _if_ nothing else
232 * ticks in the system _and_ RX data still wasn't
233 * received, which only occurs in situations that
234 * are exceptional; removing the unpredictability
235 * of the timeout either decreases throughput
236 * (longer timeouts), or puts more load on the
237 * system (fixed short timeouts) or requires the
238 * use of a timeout API instead of a counter and an
239 * unknown inner delay
241 usleep_range(10, 100);
243 } while (--rxtries > 0);
244 if (!tx_len && rx_len && !rxtries) {
246 * not enough RX bytes even after several retries
247 * and the resulting rather long timeout?
249 rxcount = in_be32(&fifo->rxcnt);
251 "short xfer, missing %zd RX bytes, FIFO level %zd\n",
256 * drain and drop RX data which "should not be there" in
257 * the first place, for undisturbed transmission this turns
258 * into a NOP (except for the FIFO level fetch)
260 if (!tx_len && !rx_len) {
261 while (in_be32(&fifo->rxcnt))
262 in_8(&fifo->rxdata_8);
269 static int mpc512x_psc_spi_msg_xfer(struct spi_master *master,
270 struct spi_message *m)
272 struct spi_device *spi;
275 struct spi_transfer *t;
280 list_for_each_entry(t, &m->transfers, transfer_list) {
281 if (t->bits_per_word || t->speed_hz) {
282 status = mpc512x_psc_spi_transfer_setup(spi, t);
288 mpc512x_psc_spi_activate_cs(spi);
289 cs_change = t->cs_change;
291 status = mpc512x_psc_spi_transfer_rxtx(spi, t);
294 m->actual_length += t->len;
297 udelay(t->delay_usecs);
300 mpc512x_psc_spi_deactivate_cs(spi);
305 m->complete(m->context);
307 if (status || !cs_change)
308 mpc512x_psc_spi_deactivate_cs(spi);
310 mpc512x_psc_spi_transfer_setup(spi, NULL);
312 spi_finalize_current_message(master);
316 static int mpc512x_psc_spi_prep_xfer_hw(struct spi_master *master)
318 struct mpc512x_psc_spi *mps = spi_master_get_devdata(master);
319 struct mpc52xx_psc __iomem *psc = mps->psc;
321 dev_dbg(&master->dev, "%s()\n", __func__);
325 out_8(&psc->mode, 0x0);
327 /* enable transmitter/receiver */
328 out_8(&psc->command, MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE);
333 static int mpc512x_psc_spi_unprep_xfer_hw(struct spi_master *master)
335 struct mpc512x_psc_spi *mps = spi_master_get_devdata(master);
336 struct mpc52xx_psc __iomem *psc = mps->psc;
337 struct mpc512x_psc_fifo __iomem *fifo = mps->fifo;
339 dev_dbg(&master->dev, "%s()\n", __func__);
341 /* disable transmitter/receiver and fifo interrupt */
342 out_8(&psc->command, MPC52xx_PSC_TX_DISABLE | MPC52xx_PSC_RX_DISABLE);
343 out_be32(&fifo->tximr, 0);
348 static int mpc512x_psc_spi_setup(struct spi_device *spi)
350 struct mpc512x_psc_spi_cs *cs = spi->controller_state;
353 if (spi->bits_per_word % 8)
357 cs = kzalloc(sizeof *cs, GFP_KERNEL);
361 if (gpio_is_valid(spi->cs_gpio)) {
362 ret = gpio_request(spi->cs_gpio, dev_name(&spi->dev));
364 dev_err(&spi->dev, "can't get CS gpio: %d\n",
369 gpio_direction_output(spi->cs_gpio,
370 spi->mode & SPI_CS_HIGH ? 0 : 1);
373 spi->controller_state = cs;
376 cs->bits_per_word = spi->bits_per_word;
377 cs->speed_hz = spi->max_speed_hz;
382 static void mpc512x_psc_spi_cleanup(struct spi_device *spi)
384 if (gpio_is_valid(spi->cs_gpio))
385 gpio_free(spi->cs_gpio);
386 kfree(spi->controller_state);
389 static int mpc512x_psc_spi_port_config(struct spi_master *master,
390 struct mpc512x_psc_spi *mps)
392 struct mpc52xx_psc __iomem *psc = mps->psc;
393 struct mpc512x_psc_fifo __iomem *fifo = mps->fifo;
399 /* Reset the PSC into a known state */
400 out_8(&psc->command, MPC52xx_PSC_RST_RX);
401 out_8(&psc->command, MPC52xx_PSC_RST_TX);
402 out_8(&psc->command, MPC52xx_PSC_TX_DISABLE | MPC52xx_PSC_RX_DISABLE);
404 /* Disable psc interrupts all useful interrupts are in fifo */
405 out_be16(&psc->isr_imr.imr, 0);
407 /* Disable fifo interrupts, will be enabled later */
408 out_be32(&fifo->tximr, 0);
409 out_be32(&fifo->rximr, 0);
411 /* Setup fifo slice address and size */
412 /*out_be32(&fifo->txsz, 0x0fe00004);*/
413 /*out_be32(&fifo->rxsz, 0x0ff00004);*/
415 sicr = 0x01000000 | /* SIM = 0001 -- 8 bit */
416 0x00800000 | /* GenClk = 1 -- internal clk */
417 0x00008000 | /* SPI = 1 */
418 0x00004000 | /* MSTR = 1 -- SPI master */
419 0x00000800; /* UseEOF = 1 -- SS low until EOF */
421 out_be32(&psc->sicr, sicr);
423 ccr = in_be32(&psc->ccr);
425 speed = 1000000; /* default 1MHz */
426 bclkdiv = (mps->mclk_rate / speed) - 1;
427 ccr |= (((bclkdiv & 0xff) << 16) | (((bclkdiv >> 8) & 0xff) << 8));
428 out_be32(&psc->ccr, ccr);
430 /* Set 2ms DTL delay */
431 out_8(&psc->ctur, 0x00);
432 out_8(&psc->ctlr, 0x82);
434 /* we don't use the alarms */
435 out_be32(&fifo->rxalarm, 0xfff);
436 out_be32(&fifo->txalarm, 0);
438 /* Enable FIFO slices for Rx/Tx */
439 out_be32(&fifo->rxcmd,
440 MPC512x_PSC_FIFO_ENABLE_SLICE | MPC512x_PSC_FIFO_ENABLE_DMA);
441 out_be32(&fifo->txcmd,
442 MPC512x_PSC_FIFO_ENABLE_SLICE | MPC512x_PSC_FIFO_ENABLE_DMA);
444 mps->bits_per_word = 8;
449 static irqreturn_t mpc512x_psc_spi_isr(int irq, void *dev_id)
451 struct mpc512x_psc_spi *mps = (struct mpc512x_psc_spi *)dev_id;
452 struct mpc512x_psc_fifo __iomem *fifo = mps->fifo;
454 /* clear interrupt and wake up the rx/tx routine */
455 if (in_be32(&fifo->txisr) &
456 in_be32(&fifo->tximr) & MPC512x_PSC_FIFO_EMPTY) {
457 out_be32(&fifo->txisr, MPC512x_PSC_FIFO_EMPTY);
458 out_be32(&fifo->tximr, 0);
459 complete(&mps->txisrdone);
465 static void mpc512x_spi_cs_control(struct spi_device *spi, bool onoff)
467 gpio_set_value(spi->cs_gpio, onoff);
470 /* bus_num is used only for the case dev->platform_data == NULL */
471 static int mpc512x_psc_spi_do_probe(struct device *dev, u32 regaddr,
472 u32 size, unsigned int irq,
475 struct fsl_spi_platform_data *pdata = dev_get_platdata(dev);
476 struct mpc512x_psc_spi *mps;
477 struct spi_master *master;
482 master = spi_alloc_master(dev, sizeof *mps);
486 dev_set_drvdata(dev, master);
487 mps = spi_master_get_devdata(master);
491 mps->cs_control = mpc512x_spi_cs_control;
492 master->bus_num = bus_num;
494 mps->cs_control = pdata->cs_control;
495 master->bus_num = pdata->bus_num;
496 master->num_chipselect = pdata->max_chipselect;
499 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST;
500 master->setup = mpc512x_psc_spi_setup;
501 master->prepare_transfer_hardware = mpc512x_psc_spi_prep_xfer_hw;
502 master->transfer_one_message = mpc512x_psc_spi_msg_xfer;
503 master->unprepare_transfer_hardware = mpc512x_psc_spi_unprep_xfer_hw;
504 master->cleanup = mpc512x_psc_spi_cleanup;
505 master->dev.of_node = dev->of_node;
507 tempp = devm_ioremap(dev, regaddr, size);
509 dev_err(dev, "could not ioremap I/O port range\n");
515 (struct mpc512x_psc_fifo *)(tempp + sizeof(struct mpc52xx_psc));
516 ret = devm_request_irq(dev, mps->irq, mpc512x_psc_spi_isr, IRQF_SHARED,
517 "mpc512x-psc-spi", mps);
520 init_completion(&mps->txisrdone);
522 clk = devm_clk_get(dev, "mclk");
527 ret = clk_prepare_enable(clk);
531 mps->mclk_rate = clk_get_rate(clk);
533 clk = devm_clk_get(dev, "ipg");
536 goto free_mclk_clock;
538 ret = clk_prepare_enable(clk);
540 goto free_mclk_clock;
543 ret = mpc512x_psc_spi_port_config(master, mps);
547 ret = devm_spi_register_master(dev, master);
554 clk_disable_unprepare(mps->clk_ipg);
556 clk_disable_unprepare(mps->clk_mclk);
558 spi_master_put(master);
563 static int mpc512x_psc_spi_do_remove(struct device *dev)
565 struct spi_master *master = dev_get_drvdata(dev);
566 struct mpc512x_psc_spi *mps = spi_master_get_devdata(master);
568 clk_disable_unprepare(mps->clk_mclk);
569 clk_disable_unprepare(mps->clk_ipg);
574 static int mpc512x_psc_spi_of_probe(struct platform_device *op)
576 const u32 *regaddr_p;
577 u64 regaddr64, size64;
580 regaddr_p = of_get_address(op->dev.of_node, 0, &size64, NULL);
582 dev_err(&op->dev, "Invalid PSC address\n");
585 regaddr64 = of_translate_address(op->dev.of_node, regaddr_p);
587 /* get PSC id (0..11, used by port_config) */
588 id = of_alias_get_id(op->dev.of_node, "spi");
590 dev_err(&op->dev, "no alias id for %s\n",
591 op->dev.of_node->full_name);
595 return mpc512x_psc_spi_do_probe(&op->dev, (u32) regaddr64, (u32) size64,
596 irq_of_parse_and_map(op->dev.of_node, 0), id);
599 static int mpc512x_psc_spi_of_remove(struct platform_device *op)
601 return mpc512x_psc_spi_do_remove(&op->dev);
604 static struct of_device_id mpc512x_psc_spi_of_match[] = {
605 { .compatible = "fsl,mpc5121-psc-spi", },
609 MODULE_DEVICE_TABLE(of, mpc512x_psc_spi_of_match);
611 static struct platform_driver mpc512x_psc_spi_of_driver = {
612 .probe = mpc512x_psc_spi_of_probe,
613 .remove = mpc512x_psc_spi_of_remove,
615 .name = "mpc512x-psc-spi",
616 .owner = THIS_MODULE,
617 .of_match_table = mpc512x_psc_spi_of_match,
620 module_platform_driver(mpc512x_psc_spi_of_driver);
622 MODULE_AUTHOR("John Rigby");
623 MODULE_DESCRIPTION("MPC512x PSC SPI Driver");
624 MODULE_LICENSE("GPL");