2 * MPC52xx SPI bus driver.
4 * Copyright (C) 2008 Secret Lab Technologies Ltd.
6 * This file is released under the GPLv2
8 * This is the driver for the MPC5200's dedicated SPI controller.
10 * Note: this driver does not support the MPC5200 PSC in SPI mode. For
11 * that driver see drivers/spi/mpc52xx_psc_spi.c
14 #include <linux/module.h>
15 #include <linux/errno.h>
16 #include <linux/of_platform.h>
17 #include <linux/interrupt.h>
18 #include <linux/delay.h>
19 #include <linux/spi/spi.h>
21 #include <linux/of_gpio.h>
22 #include <linux/slab.h>
24 #include <asm/mpc52xx.h>
26 MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
27 MODULE_DESCRIPTION("MPC52xx SPI (non-PSC) Driver");
28 MODULE_LICENSE("GPL");
30 /* Register offsets */
31 #define SPI_CTRL1 0x00
32 #define SPI_CTRL1_SPIE (1 << 7)
33 #define SPI_CTRL1_SPE (1 << 6)
34 #define SPI_CTRL1_MSTR (1 << 4)
35 #define SPI_CTRL1_CPOL (1 << 3)
36 #define SPI_CTRL1_CPHA (1 << 2)
37 #define SPI_CTRL1_SSOE (1 << 1)
38 #define SPI_CTRL1_LSBFE (1 << 0)
40 #define SPI_CTRL2 0x01
43 #define SPI_STATUS 0x05
44 #define SPI_STATUS_SPIF (1 << 7)
45 #define SPI_STATUS_WCOL (1 << 6)
46 #define SPI_STATUS_MODF (1 << 4)
49 #define SPI_PORTDATA 0x0d
50 #define SPI_DATADIR 0x10
52 /* FSM state return values */
53 #define FSM_STOP 0 /* Nothing more for the state machine to */
54 /* do. If something interesting happens */
55 /* then an IRQ will be received */
56 #define FSM_POLL 1 /* need to poll for completion, an IRQ is */
58 #define FSM_CONTINUE 2 /* Keep iterating the state machine */
60 /* Driver internal data */
62 struct spi_master *master;
64 int irq0; /* MODF irq */
65 int irq1; /* SPIF irq */
66 unsigned int ipb_freq;
68 /* Statistics; not used now, but will be reintroduced for debugfs */
72 u32 wcol_tx_timestamp;
76 struct list_head queue; /* queue of pending messages */
78 struct work_struct work;
80 /* Details of current transfer (length, and buffer pointers) */
81 struct spi_message *message; /* current message */
82 struct spi_transfer *transfer; /* current transfer */
83 int (*state)(int irq, struct mpc52xx_spi *ms, u8 status, u8 data);
90 unsigned int *gpio_cs;
96 static void mpc52xx_spi_chipsel(struct mpc52xx_spi *ms, int value)
100 if (ms->gpio_cs_count > 0) {
101 cs = ms->message->spi->chip_select;
102 gpio_set_value(ms->gpio_cs[cs], value ? 0 : 1);
104 out_8(ms->regs + SPI_PORTDATA, value ? 0 : 0x08);
108 * Start a new transfer. This is called both by the idle state
109 * for the first transfer in a message, and by the wait state when the
110 * previous transfer in a message is complete.
112 static void mpc52xx_spi_start_transfer(struct mpc52xx_spi *ms)
114 ms->rx_buf = ms->transfer->rx_buf;
115 ms->tx_buf = ms->transfer->tx_buf;
116 ms->len = ms->transfer->len;
118 /* Activate the chip select */
120 mpc52xx_spi_chipsel(ms, 1);
121 ms->cs_change = ms->transfer->cs_change;
123 /* Write out the first byte */
124 ms->wcol_tx_timestamp = get_tbl();
126 out_8(ms->regs + SPI_DATA, *ms->tx_buf++);
128 out_8(ms->regs + SPI_DATA, 0);
131 /* Forward declaration of state handlers */
132 static int mpc52xx_spi_fsmstate_transfer(int irq, struct mpc52xx_spi *ms,
134 static int mpc52xx_spi_fsmstate_wait(int irq, struct mpc52xx_spi *ms,
140 * No transfers are in progress; if another transfer is pending then retrieve
141 * it and kick it off. Otherwise, stop processing the state machine
144 mpc52xx_spi_fsmstate_idle(int irq, struct mpc52xx_spi *ms, u8 status, u8 data)
146 struct spi_device *spi;
150 if (status && (irq != NO_IRQ))
151 dev_err(&ms->master->dev, "spurious irq, status=0x%.2x\n",
154 /* Check if there is another transfer waiting. */
155 if (list_empty(&ms->queue))
158 /* get the head of the queue */
159 ms->message = list_first_entry(&ms->queue, struct spi_message, queue);
160 list_del_init(&ms->message->queue);
162 /* Setup the controller parameters */
163 ctrl1 = SPI_CTRL1_SPIE | SPI_CTRL1_SPE | SPI_CTRL1_MSTR;
164 spi = ms->message->spi;
165 if (spi->mode & SPI_CPHA)
166 ctrl1 |= SPI_CTRL1_CPHA;
167 if (spi->mode & SPI_CPOL)
168 ctrl1 |= SPI_CTRL1_CPOL;
169 if (spi->mode & SPI_LSB_FIRST)
170 ctrl1 |= SPI_CTRL1_LSBFE;
171 out_8(ms->regs + SPI_CTRL1, ctrl1);
173 /* Setup the controller speed */
174 /* minimum divider is '2'. Also, add '1' to force rounding the
176 sppr = ((ms->ipb_freq / ms->message->spi->max_speed_hz) + 1) >> 1;
180 while (((sppr - 1) & ~0x7) != 0) {
181 sppr = (sppr + 1) >> 1; /* add '1' to force rounding up */
184 sppr--; /* sppr quantity in register is offset by 1 */
186 /* Don't overrun limits of SPI baudrate register */
190 out_8(ms->regs + SPI_BRR, sppr << 4 | spr); /* Set speed */
193 ms->transfer = container_of(ms->message->transfers.next,
194 struct spi_transfer, transfer_list);
196 mpc52xx_spi_start_transfer(ms);
197 ms->state = mpc52xx_spi_fsmstate_transfer;
205 * In the middle of a transfer. If the SPI core has completed processing
206 * a byte, then read out the received data and write out the next byte
207 * (unless this transfer is finished; in which case go on to the wait
210 static int mpc52xx_spi_fsmstate_transfer(int irq, struct mpc52xx_spi *ms,
214 return ms->irq0 ? FSM_STOP : FSM_POLL;
216 if (status & SPI_STATUS_WCOL) {
217 /* The SPI controller is stoopid. At slower speeds, it may
218 * raise the SPIF flag before the state machine is actually
219 * finished, which causes a collision (internal to the state
220 * machine only). The manual recommends inserting a delay
221 * between receiving the interrupt and sending the next byte,
222 * but it can also be worked around simply by retrying the
223 * transfer which is what we do here. */
225 ms->wcol_ticks += get_tbl() - ms->wcol_tx_timestamp;
226 ms->wcol_tx_timestamp = get_tbl();
229 data = *(ms->tx_buf - 1);
230 out_8(ms->regs + SPI_DATA, data); /* try again */
232 } else if (status & SPI_STATUS_MODF) {
234 dev_err(&ms->master->dev, "mode fault\n");
235 mpc52xx_spi_chipsel(ms, 0);
236 ms->message->status = -EIO;
237 ms->message->complete(ms->message->context);
238 ms->state = mpc52xx_spi_fsmstate_idle;
242 /* Read data out of the spi device */
245 *ms->rx_buf++ = data;
247 /* Is the transfer complete? */
250 ms->timestamp = get_tbl();
251 ms->timestamp += ms->transfer->delay_usecs * tb_ticks_per_usec;
252 ms->state = mpc52xx_spi_fsmstate_wait;
256 /* Write out the next byte */
257 ms->wcol_tx_timestamp = get_tbl();
259 out_8(ms->regs + SPI_DATA, *ms->tx_buf++);
261 out_8(ms->regs + SPI_DATA, 0);
269 * A transfer has completed; need to wait for the delay period to complete
270 * before starting the next transfer
273 mpc52xx_spi_fsmstate_wait(int irq, struct mpc52xx_spi *ms, u8 status, u8 data)
276 dev_err(&ms->master->dev, "spurious irq, status=0x%.2x\n",
279 if (((int)get_tbl()) - ms->timestamp < 0)
282 ms->message->actual_length += ms->transfer->len;
284 /* Check if there is another transfer in this message. If there
285 * aren't then deactivate CS, notify sender, and drop back to idle
286 * to start the next message. */
287 if (ms->transfer->transfer_list.next == &ms->message->transfers) {
289 mpc52xx_spi_chipsel(ms, 0);
290 ms->message->status = 0;
291 ms->message->complete(ms->message->context);
292 ms->state = mpc52xx_spi_fsmstate_idle;
296 /* There is another transfer; kick it off */
299 mpc52xx_spi_chipsel(ms, 0);
301 ms->transfer = container_of(ms->transfer->transfer_list.next,
302 struct spi_transfer, transfer_list);
303 mpc52xx_spi_start_transfer(ms);
304 ms->state = mpc52xx_spi_fsmstate_transfer;
309 * mpc52xx_spi_fsm_process - Finite State Machine iteration function
310 * @irq: irq number that triggered the FSM or 0 for polling
311 * @ms: pointer to mpc52xx_spi driver data
313 static void mpc52xx_spi_fsm_process(int irq, struct mpc52xx_spi *ms)
315 int rc = FSM_CONTINUE;
318 while (rc == FSM_CONTINUE) {
319 /* Interrupt cleared by read of STATUS followed by
320 * read of DATA registers */
321 status = in_8(ms->regs + SPI_STATUS);
322 data = in_8(ms->regs + SPI_DATA);
323 rc = ms->state(irq, ms, status, data);
327 schedule_work(&ms->work);
331 * mpc52xx_spi_irq - IRQ handler
333 static irqreturn_t mpc52xx_spi_irq(int irq, void *_ms)
335 struct mpc52xx_spi *ms = _ms;
336 spin_lock(&ms->lock);
337 mpc52xx_spi_fsm_process(irq, ms);
338 spin_unlock(&ms->lock);
343 * mpc52xx_spi_wq - Workqueue function for polling the state machine
345 static void mpc52xx_spi_wq(struct work_struct *work)
347 struct mpc52xx_spi *ms = container_of(work, struct mpc52xx_spi, work);
350 spin_lock_irqsave(&ms->lock, flags);
351 mpc52xx_spi_fsm_process(0, ms);
352 spin_unlock_irqrestore(&ms->lock, flags);
359 static int mpc52xx_spi_transfer(struct spi_device *spi, struct spi_message *m)
361 struct mpc52xx_spi *ms = spi_master_get_devdata(spi->master);
364 m->actual_length = 0;
365 m->status = -EINPROGRESS;
367 spin_lock_irqsave(&ms->lock, flags);
368 list_add_tail(&m->queue, &ms->queue);
369 spin_unlock_irqrestore(&ms->lock, flags);
370 schedule_work(&ms->work);
376 * OF Platform Bus Binding
378 static int mpc52xx_spi_probe(struct platform_device *op)
380 struct spi_master *master;
381 struct mpc52xx_spi *ms;
388 dev_dbg(&op->dev, "probing mpc5200 SPI device\n");
389 regs = of_iomap(op->dev.of_node, 0);
393 /* initialize the device */
394 ctrl1 = SPI_CTRL1_SPIE | SPI_CTRL1_SPE | SPI_CTRL1_MSTR;
395 out_8(regs + SPI_CTRL1, ctrl1);
396 out_8(regs + SPI_CTRL2, 0x0);
397 out_8(regs + SPI_DATADIR, 0xe); /* Set output pins */
398 out_8(regs + SPI_PORTDATA, 0x8); /* Deassert /SS signal */
400 /* Clear the status register and re-read it to check for a MODF
401 * failure. This driver cannot currently handle multiple masters
402 * on the SPI bus. This fault will also occur if the SPI signals
403 * are not connected to any pins (port_config setting) */
404 in_8(regs + SPI_STATUS);
405 out_8(regs + SPI_CTRL1, ctrl1);
407 in_8(regs + SPI_DATA);
408 if (in_8(regs + SPI_STATUS) & SPI_STATUS_MODF) {
409 dev_err(&op->dev, "mode fault; is port_config correct?\n");
414 dev_dbg(&op->dev, "allocating spi_master struct\n");
415 master = spi_alloc_master(&op->dev, sizeof *ms);
421 master->transfer = mpc52xx_spi_transfer;
422 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST;
423 master->bits_per_word_mask = SPI_BPW_MASK(8);
424 master->dev.of_node = op->dev.of_node;
426 platform_set_drvdata(op, master);
428 ms = spi_master_get_devdata(master);
431 ms->irq0 = irq_of_parse_and_map(op->dev.of_node, 0);
432 ms->irq1 = irq_of_parse_and_map(op->dev.of_node, 1);
433 ms->state = mpc52xx_spi_fsmstate_idle;
434 ms->ipb_freq = mpc5xxx_get_bus_frequency(op->dev.of_node);
435 ms->gpio_cs_count = of_gpio_count(op->dev.of_node);
436 if (ms->gpio_cs_count > 0) {
437 master->num_chipselect = ms->gpio_cs_count;
438 ms->gpio_cs = kmalloc(ms->gpio_cs_count * sizeof(unsigned int),
445 for (i = 0; i < ms->gpio_cs_count; i++) {
446 gpio_cs = of_get_gpio(op->dev.of_node, i);
449 "could not parse the gpio field "
455 rc = gpio_request(gpio_cs, dev_name(&op->dev));
458 "can't request spi cs gpio #%d "
459 "on gpio line %d\n", i, gpio_cs);
463 gpio_direction_output(gpio_cs, 1);
464 ms->gpio_cs[i] = gpio_cs;
468 spin_lock_init(&ms->lock);
469 INIT_LIST_HEAD(&ms->queue);
470 INIT_WORK(&ms->work, mpc52xx_spi_wq);
472 /* Decide if interrupts can be used */
473 if (ms->irq0 && ms->irq1) {
474 rc = request_irq(ms->irq0, mpc52xx_spi_irq, 0,
475 "mpc5200-spi-modf", ms);
476 rc |= request_irq(ms->irq1, mpc52xx_spi_irq, 0,
477 "mpc5200-spi-spif", ms);
479 free_irq(ms->irq0, ms);
480 free_irq(ms->irq1, ms);
481 ms->irq0 = ms->irq1 = 0;
484 /* operate in polled mode */
485 ms->irq0 = ms->irq1 = 0;
489 dev_info(&op->dev, "using polled mode\n");
491 dev_dbg(&op->dev, "registering spi_master struct\n");
492 rc = spi_register_master(master);
496 dev_info(&ms->master->dev, "registered MPC5200 SPI bus\n");
501 dev_err(&ms->master->dev, "initialization failed\n");
504 gpio_free(ms->gpio_cs[i]);
508 spi_master_put(master);
515 static int mpc52xx_spi_remove(struct platform_device *op)
517 struct spi_master *master = spi_master_get(platform_get_drvdata(op));
518 struct mpc52xx_spi *ms = spi_master_get_devdata(master);
521 free_irq(ms->irq0, ms);
522 free_irq(ms->irq1, ms);
524 for (i = 0; i < ms->gpio_cs_count; i++)
525 gpio_free(ms->gpio_cs[i]);
528 spi_unregister_master(master);
530 spi_master_put(master);
535 static const struct of_device_id mpc52xx_spi_match[] = {
536 { .compatible = "fsl,mpc5200-spi", },
539 MODULE_DEVICE_TABLE(of, mpc52xx_spi_match);
541 static struct platform_driver mpc52xx_spi_of_driver = {
543 .name = "mpc52xx-spi",
544 .owner = THIS_MODULE,
545 .of_match_table = mpc52xx_spi_match,
547 .probe = mpc52xx_spi_probe,
548 .remove = mpc52xx_spi_remove,
550 module_platform_driver(mpc52xx_spi_of_driver);