2 * Copyright (c) 2009 Nuvoton technology.
3 * Wan ZongShun <mcuos.com@gmail.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
11 #include <linux/module.h>
12 #include <linux/spinlock.h>
13 #include <linux/workqueue.h>
14 #include <linux/interrupt.h>
15 #include <linux/delay.h>
16 #include <linux/errno.h>
17 #include <linux/err.h>
18 #include <linux/clk.h>
19 #include <linux/device.h>
20 #include <linux/platform_device.h>
21 #include <linux/gpio.h>
23 #include <linux/slab.h>
25 #include <linux/spi/spi.h>
26 #include <linux/spi/spi_bitbang.h>
28 #include <linux/platform_data/spi-nuc900.h>
30 /* usi registers offset */
37 /* usi register bit */
38 #define ENINT (0x01 << 17)
39 #define ENFLG (0x01 << 16)
40 #define SLEEP (0x0f << 12)
41 #define TXNUM (0x03 << 8)
42 #define TXBITLEN (0x1f << 3)
43 #define TXNEG (0x01 << 2)
44 #define RXNEG (0x01 << 1)
45 #define LSB (0x01 << 10)
46 #define SELECTLEV (0x01 << 2)
47 #define SELECTPOL (0x01 << 31)
48 #define SELECTSLAVE 0x01
52 struct spi_bitbang bitbang;
53 struct completion done;
58 const unsigned char *tx;
61 struct spi_master *master;
62 struct nuc900_spi_info *pdata;
66 static inline struct nuc900_spi *to_hw(struct spi_device *sdev)
68 return spi_master_get_devdata(sdev->master);
71 static void nuc900_slave_select(struct spi_device *spi, unsigned int ssr)
73 struct nuc900_spi *hw = to_hw(spi);
75 unsigned int cs = spi->mode & SPI_CS_HIGH ? 1 : 0;
76 unsigned int cpol = spi->mode & SPI_CPOL ? 1 : 0;
79 spin_lock_irqsave(&hw->lock, flags);
81 val = __raw_readl(hw->regs + USI_SSR);
93 __raw_writel(val, hw->regs + USI_SSR);
95 val = __raw_readl(hw->regs + USI_CNT);
102 __raw_writel(val, hw->regs + USI_CNT);
104 spin_unlock_irqrestore(&hw->lock, flags);
107 static void nuc900_spi_chipsel(struct spi_device *spi, int value)
110 case BITBANG_CS_INACTIVE:
111 nuc900_slave_select(spi, 0);
114 case BITBANG_CS_ACTIVE:
115 nuc900_slave_select(spi, 1);
120 static void nuc900_spi_setup_txnum(struct nuc900_spi *hw, unsigned int txnum)
125 spin_lock_irqsave(&hw->lock, flags);
127 val = __raw_readl(hw->regs + USI_CNT) & ~TXNUM;
130 val |= txnum << 0x08;
132 __raw_writel(val, hw->regs + USI_CNT);
134 spin_unlock_irqrestore(&hw->lock, flags);
138 static void nuc900_spi_setup_txbitlen(struct nuc900_spi *hw,
139 unsigned int txbitlen)
144 spin_lock_irqsave(&hw->lock, flags);
146 val = __raw_readl(hw->regs + USI_CNT) & ~TXBITLEN;
148 val |= (txbitlen << 0x03);
150 __raw_writel(val, hw->regs + USI_CNT);
152 spin_unlock_irqrestore(&hw->lock, flags);
155 static void nuc900_spi_gobusy(struct nuc900_spi *hw)
160 spin_lock_irqsave(&hw->lock, flags);
162 val = __raw_readl(hw->regs + USI_CNT);
166 __raw_writel(val, hw->regs + USI_CNT);
168 spin_unlock_irqrestore(&hw->lock, flags);
171 static inline unsigned int hw_txbyte(struct nuc900_spi *hw, int count)
173 return hw->tx ? hw->tx[count] : 0;
176 static int nuc900_spi_txrx(struct spi_device *spi, struct spi_transfer *t)
178 struct nuc900_spi *hw = to_hw(spi);
185 __raw_writel(hw_txbyte(hw, 0x0), hw->regs + USI_TX0);
187 nuc900_spi_gobusy(hw);
189 wait_for_completion(&hw->done);
194 static irqreturn_t nuc900_spi_irq(int irq, void *dev)
196 struct nuc900_spi *hw = dev;
198 unsigned int count = hw->count;
200 status = __raw_readl(hw->regs + USI_CNT);
201 __raw_writel(status, hw->regs + USI_CNT);
203 if (status & ENFLG) {
207 hw->rx[count] = __raw_readl(hw->regs + USI_RX0);
210 if (count < hw->len) {
211 __raw_writel(hw_txbyte(hw, count), hw->regs + USI_TX0);
212 nuc900_spi_gobusy(hw);
224 static void nuc900_tx_edge(struct nuc900_spi *hw, unsigned int edge)
229 spin_lock_irqsave(&hw->lock, flags);
231 val = __raw_readl(hw->regs + USI_CNT);
237 __raw_writel(val, hw->regs + USI_CNT);
239 spin_unlock_irqrestore(&hw->lock, flags);
242 static void nuc900_rx_edge(struct nuc900_spi *hw, unsigned int edge)
247 spin_lock_irqsave(&hw->lock, flags);
249 val = __raw_readl(hw->regs + USI_CNT);
255 __raw_writel(val, hw->regs + USI_CNT);
257 spin_unlock_irqrestore(&hw->lock, flags);
260 static void nuc900_send_first(struct nuc900_spi *hw, unsigned int lsb)
265 spin_lock_irqsave(&hw->lock, flags);
267 val = __raw_readl(hw->regs + USI_CNT);
273 __raw_writel(val, hw->regs + USI_CNT);
275 spin_unlock_irqrestore(&hw->lock, flags);
278 static void nuc900_set_sleep(struct nuc900_spi *hw, unsigned int sleep)
283 spin_lock_irqsave(&hw->lock, flags);
285 val = __raw_readl(hw->regs + USI_CNT) & ~SLEEP;
288 val |= (sleep << 12);
290 __raw_writel(val, hw->regs + USI_CNT);
292 spin_unlock_irqrestore(&hw->lock, flags);
295 static void nuc900_enable_int(struct nuc900_spi *hw)
300 spin_lock_irqsave(&hw->lock, flags);
302 val = __raw_readl(hw->regs + USI_CNT);
306 __raw_writel(val, hw->regs + USI_CNT);
308 spin_unlock_irqrestore(&hw->lock, flags);
311 static void nuc900_set_divider(struct nuc900_spi *hw)
313 __raw_writel(hw->pdata->divider, hw->regs + USI_DIV);
316 static void nuc900_init_spi(struct nuc900_spi *hw)
319 spin_lock_init(&hw->lock);
321 nuc900_tx_edge(hw, hw->pdata->txneg);
322 nuc900_rx_edge(hw, hw->pdata->rxneg);
323 nuc900_send_first(hw, hw->pdata->lsb);
324 nuc900_set_sleep(hw, hw->pdata->sleep);
325 nuc900_spi_setup_txbitlen(hw, hw->pdata->txbitlen);
326 nuc900_spi_setup_txnum(hw, hw->pdata->txnum);
327 nuc900_set_divider(hw);
328 nuc900_enable_int(hw);
331 static int nuc900_spi_probe(struct platform_device *pdev)
333 struct nuc900_spi *hw;
334 struct spi_master *master;
335 struct resource *res;
338 master = spi_alloc_master(&pdev->dev, sizeof(struct nuc900_spi));
339 if (master == NULL) {
340 dev_err(&pdev->dev, "No memory for spi_master\n");
344 hw = spi_master_get_devdata(master);
346 hw->pdata = dev_get_platdata(&pdev->dev);
348 if (hw->pdata == NULL) {
349 dev_err(&pdev->dev, "No platform data supplied\n");
354 platform_set_drvdata(pdev, hw);
355 init_completion(&hw->done);
357 master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
359 master->mode_bits |= SPI_LSB_FIRST;
360 master->num_chipselect = hw->pdata->num_cs;
361 master->bus_num = hw->pdata->bus_num;
362 hw->bitbang.master = hw->master;
363 hw->bitbang.chipselect = nuc900_spi_chipsel;
364 hw->bitbang.txrx_bufs = nuc900_spi_txrx;
366 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
367 hw->regs = devm_ioremap_resource(&pdev->dev, res);
368 if (IS_ERR(hw->regs)) {
369 err = PTR_ERR(hw->regs);
373 hw->irq = platform_get_irq(pdev, 0);
375 dev_err(&pdev->dev, "No IRQ specified\n");
380 err = devm_request_irq(&pdev->dev, hw->irq, nuc900_spi_irq, 0,
383 dev_err(&pdev->dev, "Cannot claim IRQ\n");
387 hw->clk = devm_clk_get(&pdev->dev, "spi");
388 if (IS_ERR(hw->clk)) {
389 dev_err(&pdev->dev, "No clock for device\n");
390 err = PTR_ERR(hw->clk);
394 mfp_set_groupg(&pdev->dev, NULL);
397 err = spi_bitbang_start(&hw->bitbang);
399 dev_err(&pdev->dev, "Failed to register SPI master\n");
406 clk_disable(hw->clk);
408 spi_master_put(hw->master);
412 static int nuc900_spi_remove(struct platform_device *dev)
414 struct nuc900_spi *hw = platform_get_drvdata(dev);
416 spi_bitbang_stop(&hw->bitbang);
417 clk_disable(hw->clk);
418 spi_master_put(hw->master);
422 static struct platform_driver nuc900_spi_driver = {
423 .probe = nuc900_spi_probe,
424 .remove = nuc900_spi_remove,
426 .name = "nuc900-spi",
427 .owner = THIS_MODULE,
430 module_platform_driver(nuc900_spi_driver);
432 MODULE_AUTHOR("Wan ZongShun <mcuos.com@gmail.com>");
433 MODULE_DESCRIPTION("nuc900 spi driver!");
434 MODULE_LICENSE("GPL");
435 MODULE_ALIAS("platform:nuc900-spi");