1 /***********************************
3 ************************************/
7 #define MAX_FRAGMENTEDIP_CLASSIFICATION_ENTRIES 256
10 typedef struct _LIST_ENTRY{
11 struct _LIST_ENTRY *next;
12 struct _LIST_ENTRY *prev;
13 } LIST_ENTRY, *PLIST_ENTRY;
15 typedef struct _BCM_LIST_ENTRY {
19 } BCM_LIST_ENTRY, *PBCM_LIST_ENTRY;
21 typedef enum _RCB_STATUS
25 } RCB_STATUS, *PRCB_STATUS;
32 // The network packet that this RCB is receiving
34 // Describes the length of the packet .
35 UINT ui_packet_length;
36 // Pointer to the first buffer in the packet (only one buffer for Rx)
40 } __attribute__((packed));
41 typedef struct _BCM_CB BCM_CB,*PBCM_CB;
43 typedef BCM_CB BCM_RCB, *PBCM_RCB;
44 typedef BCM_CB BCM_TCB, *PBCM_TCB;
46 /* This is to be stored in the "pvOsDepData" of ADAPTER */
47 typedef struct LINUX_DEP_DATA
49 struct net_device *virtualdev; /* Our Interface (veth0) */
50 struct net_device *actualdev; /* True Interface (eth0) */
51 struct net_device_stats netstats; /* Net statistics */
52 struct fasync_struct *async_queue; /* For asynchronus notification */
54 } LINUX_DEP_DATA, *PLINUX_DEP_DATA;
63 }__attribute__((packed));
64 typedef struct _LEADER LEADER,*PLEADER;
70 }__attribute__((packed));
71 typedef struct _PACKETTOSEND PACKETTOSEND, *PPACKETTOSEND;
74 struct _CONTROL_PACKET
78 struct _CONTROL_PACKET* next;
79 }__attribute__((packed));
80 typedef struct _CONTROL_PACKET CONTROL_PACKET,*PCONTROL_PACKET;
87 }__attribute__((packed));
88 typedef struct link_request LINK_REQUEST, *PLINK_REQUEST;
91 //classification extension is added
92 typedef struct _ADD_CONNECTION
94 ULONG SrcIpAddressCount;
95 ULONG SrcIpAddress[MAX_CONNECTIONS];
96 ULONG SrcIpMask[MAX_CONNECTIONS];
98 ULONG DestIpAddressCount;
99 ULONG DestIpAddress[MAX_CONNECTIONS];
100 ULONG DestIpMask[MAX_CONNECTIONS];
105 USHORT DestPortBegin;
110 } ADD_CONNECTION,*PADD_CONNECTION;
113 typedef struct _CLASSIFICATION_RULE
115 UCHAR ucIPSrcAddrLen;
116 UCHAR ucIPSrcAddr[32];
117 UCHAR ucIPDestAddrLen;
118 UCHAR ucIPDestAddr[32];
119 UCHAR ucSrcPortRangeLen;
120 UCHAR ucSrcPortRange[4];
121 UCHAR ucDestPortRangeLen;
122 UCHAR ucDestPortRange[4];
124 } CLASSIFICATION_RULE,*PCLASSIFICATION_RULE;
126 typedef struct _CLASSIFICATION_ONLY
134 UCHAR ucDestinationAddress[16];
135 } CLASSIFICATION_ONLY, *PCLASSIFICATION_ONLY;
138 #define MAX_IP_RANGE_LENGTH 4
139 #define MAX_PORT_RANGE 4
140 #define MAX_PROTOCOL_LENGTH 32
141 #define IPV6_ADDRESS_SIZEINBYTES 0x10
143 typedef union _U_IP_ADDRESS
147 ULONG ulIpv4Addr[MAX_IP_RANGE_LENGTH];//Source Ip Address Range
148 ULONG ulIpv4Mask[MAX_IP_RANGE_LENGTH];//Source Ip Mask Address Range
152 ULONG ulIpv6Addr[MAX_IP_RANGE_LENGTH * 4];//Source Ip Address Range
153 ULONG ulIpv6Mask[MAX_IP_RANGE_LENGTH * 4];//Source Ip Mask Address Range
158 UCHAR ucIpv4Address[MAX_IP_RANGE_LENGTH * IP_LENGTH_OF_ADDRESS];
159 UCHAR ucIpv4Mask[MAX_IP_RANGE_LENGTH * IP_LENGTH_OF_ADDRESS];
163 UCHAR ucIpv6Address[MAX_IP_RANGE_LENGTH * IPV6_ADDRESS_SIZEINBYTES];
164 UCHAR ucIpv6Mask[MAX_IP_RANGE_LENGTH * IPV6_ADDRESS_SIZEINBYTES];
169 typedef struct _S_HDR_SUPRESSION_CONTEXTINFO
172 UCHAR ucaHdrSupressionInBuf[MAX_PHS_LENGTHS]; //Intermediate buffer to accumulate pkt Header for PHS
173 UCHAR ucaHdrSupressionOutBuf[MAX_PHS_LENGTHS + PHSI_LEN]; //Intermediate buffer containing pkt Header after PHS
175 }S_HDR_SUPRESSION_CONTEXTINFO;
178 typedef struct _S_CLASSIFIER_RULE
182 B_UINT16 uiClassifierRuleIndex;
185 B_UINT8 u8ClassifierRulePriority; //This field detemines the Classifier Priority
186 U_IP_ADDRESS stSrcIpAddress;
187 UCHAR ucIPSourceAddressLength;//Ip Source Address Length
189 U_IP_ADDRESS stDestIpAddress;
190 UCHAR ucIPDestinationAddressLength;//Ip Destination Address Length
191 UCHAR ucIPTypeOfServiceLength;//Type of service Length
192 UCHAR ucTosLow;//Tos Low
193 UCHAR ucTosHigh;//Tos High
194 UCHAR ucTosMask;//Tos Mask
196 UCHAR ucProtocolLength;//protocol Length
197 UCHAR ucProtocol[MAX_PROTOCOL_LENGTH];//protocol Length
198 USHORT usSrcPortRangeLo[MAX_PORT_RANGE];
199 USHORT usSrcPortRangeHi[MAX_PORT_RANGE];
200 UCHAR ucSrcPortRangeLength;
202 USHORT usDestPortRangeLo[MAX_PORT_RANGE];
203 USHORT usDestPortRangeHi[MAX_PORT_RANGE];
204 UCHAR ucDestPortRangeLength;
206 BOOLEAN bProtocolValid;
208 BOOLEAN bDestIpValid;
211 //For IPv6 Addressing
213 BOOLEAN bIpv6Protocol;
216 UCHAR u8AssociatedPHSI;
218 //Classification fields for ETH CS
219 UCHAR ucEthCSSrcMACLen;
220 UCHAR au8EThCSSrcMAC[MAC_ADDRESS_SIZE];
221 UCHAR au8EThCSSrcMACMask[MAC_ADDRESS_SIZE];
222 UCHAR ucEthCSDestMACLen;
223 UCHAR au8EThCSDestMAC[MAC_ADDRESS_SIZE];
224 UCHAR au8EThCSDestMACMask[MAC_ADDRESS_SIZE];
225 UCHAR ucEtherTypeLen;
226 UCHAR au8EthCSEtherType[NUM_ETHERTYPE_BYTES];
227 UCHAR usUserPriority[2];
229 USHORT usValidityBitMap;
231 //typedef struct _S_CLASSIFIER_RULE S_CLASSIFIER_RULE;
233 typedef struct _S_FRAGMENTED_PACKET_INFO
236 ULONG ulSrcIpAddress;
237 USHORT usIpIdentification;
238 S_CLASSIFIER_RULE *pstMatchedClassifierEntry;
239 BOOLEAN bOutOfOrderFragment;
240 }S_FRAGMENTED_PACKET_INFO,*PS_FRAGMENTED_PACKET_INFO;
244 //classification extension Rule
248 // This field determines the priority of the SF Queues
249 B_UINT8 u8TrafficPriority;
253 BOOLEAN bActivateRequestSent;
255 B_UINT8 u8QueueType;//BE or rtPS
257 UINT uiMaxBucketSize;//maximum size of the bucket for the queue
258 UINT uiCurrentQueueDepthOnTarget;
259 UINT uiCurrentBytesOnHost;
260 UINT uiCurrentPacketsOnHost;
261 UINT uiDroppedCountBytes;
262 UINT uiDroppedCountPackets;
265 UINT uiCurrentDrainRate;
266 UINT uiThisPeriodSentBytes;
267 LARGE_INTEGER liDrainCalculated;
268 UINT uiCurrentTokenCount;
269 LARGE_INTEGER liLastUpdateTokenAt;
270 UINT uiMaxAllowedRate;
271 UINT NumOfPacketsSent;
274 S_MIBS_EXTSERVICEFLOW_PARAMETERS stMibsExtServiceFlowTable;
275 UINT uiCurrentRxRate;
276 UINT uiThisPeriodRxBytes;
286 struct sk_buff* FirstTxQueue;
287 struct sk_buff* LastTxQueue;
291 struct sk_buff* ControlHead;
292 struct sk_buff* ControlTail;
295 BOOLEAN bProtocolValid;
297 BOOLEAN bDestIpValid;
301 BOOLEAN bAdmittedSet;
302 BOOLEAN bAuthorizedSet;
303 BOOLEAN bClassifierPriority;
304 UCHAR ucServiceClassName[MAX_CLASS_NAME_LENGTH];
305 BOOLEAN bHeaderSuppressionEnabled;
306 spinlock_t SFQueueLock;
307 void *pstSFIndication;
308 struct timeval stLastUpdateTokenAt;
309 atomic_t uiPerSFTxResourceCount;
314 typedef struct _packet_info PacketInfo;
317 typedef struct _PER_TARANG_DATA
319 struct _PER_TARANG_DATA * next;
320 struct _MINI_ADAPTER * Adapter;
321 struct sk_buff* RxAppControlHead;
322 struct sk_buff* RxAppControlTail;
323 volatile INT AppCtrlQueueLen;
324 BOOLEAN MacTracingEnabled;
325 BOOLEAN bApplicationToExit;
326 S_MIBS_DROPPED_APP_CNTRL_MESSAGES stDroppedAppCntrlMsgs;
327 ULONG RxCntrlMsgBitMask;
328 } PER_TARANG_DATA, *PPER_TARANG_DATA;
332 typedef struct _TARGET_PARAMS
334 B_UINT32 m_u32CfgVersion;
336 // Scanning Related Params
337 B_UINT32 m_u32CenterFrequency;
338 B_UINT32 m_u32BandAScan;
339 B_UINT32 m_u32BandBScan;
340 B_UINT32 m_u32BandCScan;
343 B_UINT32 m_u32minGrantsize; // size of minimum grant is 0 or 6
344 B_UINT32 m_u32PHSEnable;
347 B_UINT32 m_u32HoEnable;
348 B_UINT32 m_u32HoReserved1;
349 B_UINT32 m_u32HoReserved2;
351 // Power Control Params
352 B_UINT32 m_u32MimoEnable;
353 B_UINT32 m_u32SecurityEnable;
355 * bit 1: 1 Idlemode enable;
356 * bit 2: 1 Sleepmode Enable
358 B_UINT32 m_u32PowerSavingModesEnable;
359 /* PowerSaving Mode Options:
360 bit 0 = 1: CPE mode - to keep pcmcia if alive;
361 bit 1 = 1: CINR reporing in Idlemode Msg
362 bit 2 = 1: Default PSC Enable in sleepmode*/
363 B_UINT32 m_u32PowerSavingModeOptions;
365 B_UINT32 m_u32ArqEnable;
367 // From Version #3, the HARQ section renamed as general
368 B_UINT32 m_u32HarqEnable;
369 // EEPROM Param Location
370 B_UINT32 m_u32EEPROMFlag;
371 /* BINARY TYPE - 4th MSByte:
372 * Interface Type - 3rd MSByte:
373 * Vendor Type - 2nd MSByte
376 B_UINT32 m_u32Customize;
377 B_UINT32 m_u32ConfigBW; /* In Hz */
378 B_UINT32 m_u32ShutDownTimer;
381 B_UINT32 m_u32RadioParameter;
382 B_UINT32 m_u32PhyParameter1;
383 B_UINT32 m_u32PhyParameter2;
384 B_UINT32 m_u32PhyParameter3;
386 /* in eval mode only;
387 * lower 16bits = basic cid for testing;
388 * then bit 16 is test cqich,
389 * bit 17 test init rang;
390 * bit 18 test periodic rang
391 * bit 19 is test harq ack/nack
393 B_UINT32 m_u32TestOptions;
395 B_UINT32 m_u32MaxMACDataperDLFrame;
396 B_UINT32 m_u32MaxMACDataperULFrame;
398 B_UINT32 m_u32Corr2MacFlags;
400 //adding driver params.
401 B_UINT32 HostDrvrConfig1;
402 B_UINT32 HostDrvrConfig2;
403 B_UINT32 HostDrvrConfig3;
404 B_UINT32 HostDrvrConfig4;
405 B_UINT32 HostDrvrConfig5;
406 B_UINT32 HostDrvrConfig6;
407 B_UINT32 m_u32SegmentedPUSCenable;
409 // BAMC enable - but 4.x does not support this feature
410 // This is added just to sync 4.x and 5.x CFGs
411 B_UINT32 m_u32BandAMCEnable;
412 } STARGETPARAMS, *PSTARGETPARAMS;
415 typedef struct _STTARGETDSXBUFFER
417 ULONG ulTargetDsxBuffer;
420 }STTARGETDSXBUFFER, *PSTTARGETDSXBUFFER;
422 typedef INT (*FP_FLASH_WRITE)(struct _MINI_ADAPTER*,UINT,PVOID);
424 typedef INT (*FP_FLASH_WRITE_STATUS)(struct _MINI_ADAPTER*,UINT,PVOID);
427 Driver adapter data structure
431 struct _MINI_ADAPTER *next;
434 atomic_t ApplicationRunning;
435 volatile INT CtrlQueueLen;
436 atomic_t AppCtrlQueueLen;
437 BOOLEAN AppCtrlQueueOverFlow;
438 atomic_t CurrentApplicationCount;
439 atomic_t RegisteredApplicationCount;
441 ULONG StatisticsPointer;
442 struct sk_buff *RxControlHead;
443 struct sk_buff *RxControlTail;
444 // spinlock_t RxControlQueuelock;
445 struct semaphore RxAppControlQueuelock;
446 struct semaphore fw_download_sema;
448 PPER_TARANG_DATA pTarangs;
449 spinlock_t control_queue_lock;
450 wait_queue_head_t process_read_wait_queue;
451 ULONG bcm_jiffies; /* Store Jiffies value */
453 // the pointer to the first packet we have queued in send
454 // deserialized miniport support variables
455 atomic_t TotalPacketCount;
458 // this to keep track of the Tx and Rx MailBox Registers.
459 atomic_t CurrNumFreeTxDesc;
460 // to keep track the no of byte recieved
461 atomic_t RxRollOverCount;
462 USHORT PrevNumRecvDescs;
463 USHORT CurrNumRecvDescs;
464 atomic_t GoodRxByteCount;
465 atomic_t GoodRxPktCount;
466 atomic_t BadRxByteCount;
467 atomic_t RxPacketDroppedCount;
468 atomic_t GoodTxByteCount;
469 atomic_t TxTotalPacketCount;
470 atomic_t TxDroppedPacketCount;
472 BOOLEAN TransferMode;
474 PacketInfo PackInfo[NO_OF_QUEUES];
475 S_CLASSIFIER_RULE astClassifierTable[MAX_CLASSIFIERS];
477 /*************** qos ******************/
481 ULONG rtPSBucketSize;
486 struct net_device *dev;
489 wait_queue_head_t tx_packet_wait_queue;
490 wait_queue_head_t process_rx_cntrlpkt;
491 atomic_t process_waiting;
492 BOOLEAN fw_download_done;
494 unsigned int ctrlpkt_present;
495 BOOLEAN packets_given_to_all;
496 char *txctlpacket[MAX_CNTRL_PKTS];
497 atomic_t cntrlpktCnt ;
498 atomic_t index_app_read_cntrlpkt;
499 atomic_t index_wr_txcntrlpkt;
500 atomic_t index_rd_txcntrlpkt;
502 struct semaphore rdmwrmsync;
504 STTARGETDSXBUFFER astTargetDsxBuffer[MAX_TARGET_DSX_BUFFERS];
505 ULONG ulFreeTargetBufferCnt;
506 ULONG ulCurrentTargetBuffer;
507 ULONG ulTotalTargetBuffersAvailable;
508 unsigned int timeout;
510 unsigned long chip_id;
511 unsigned int bFlashBoot;
513 // spinlock_t sleeper_lock;
514 atomic_t rdm_wrm_access;
515 atomic_t tx_rx_access;
516 wait_queue_head_t lowpower_mode_wait_queue;
517 atomic_t bAbortedByHost;
518 BOOLEAN bBinDownloaded;
519 BOOLEAN bCfgDownloaded;
520 USHORT usBestEffortQueueIndex;
521 BOOLEAN bSyncUpRequestSent;
522 // struct semaphore data_packet_queue_lock;
523 wait_queue_head_t ioctl_fw_dnld_wait_queue;
524 BOOLEAN waiting_to_fw_download_done;
525 pid_t fw_download_process_pid;
526 PSTARGETPARAMS pstargetparams;
527 BOOLEAN device_removed;
528 BOOLEAN DeviceAccess;
530 BOOLEAN bDDRInitDone;
531 ULONG ulPowerSaveMode;
532 BOOLEAN bIsAutoCorrectEnabled;
533 spinlock_t txtransmitlock;
534 B_UINT8 txtransmit_running;
535 /* Thread for control packet handling */
536 struct task_struct *control_packet_handler;
537 /* thread for transmitting packets. */
538 struct task_struct *transmit_packet_thread;
540 /* LED Related Structures */
541 LED_INFO_STRUCT LEDInfo;
543 /* Driver State for LED Blinking */
544 LedEventInfo_t DriverState;
545 /* Interface Specific */
546 PVOID pvInterfaceAdapter;
547 int (*bcm_file_download)( PVOID,
550 int (*bcm_file_readback_from_chip)( PVOID,
553 INT (*interface_rdm)(PVOID,
557 INT (*interface_wrm)(PVOID,
561 int (*interface_transmit)(PVOID, PVOID , UINT);
563 BOOLEAN bDregRequestSentInIdleMode;
564 BOOLEAN bTriedToWakeUpFromlowPowerMode;
566 BOOLEAN bWakeUpDevice;
567 unsigned int usIdleModePattern;
568 //BOOLEAN bTriedToWakeUpFromShutdown;
569 BOOLEAN bLinkDownRequested;
570 unsigned int check_for_hang;
572 PHS_DEVICE_EXTENSION stBCMPhsContext;
573 S_HDR_SUPRESSION_CONTEXTINFO stPhsTxContextInfo;
574 uint8_t ucaPHSPktRestoreBuf[2048];
579 UINT32 aTxPktSizeHist[MIBS_MAX_HIST_ENTRIES];
580 UINT32 aRxPktSizeHist[MIBS_MAX_HIST_ENTRIES];
581 S_FRAGMENTED_PACKET_INFO astFragmentedPktClassifierTable[MAX_FRAGMENTEDIP_CLASSIFICATION_ENTRIES];
586 UINT uiSectorSizeInCFG;
587 BOOLEAN bSectorSizeOverride;
588 BOOLEAN bStatusWrite;
590 UINT uiVendorExtnFlag;
591 //it will always represent choosed DSD at any point of time.
592 // Generally it is Active DSD but in case of NVM RD/WR it might be different.
593 UINT ulFlashCalStart;
594 ULONG ulFlashControlSectionStart;
595 ULONG ulFlashWriteSize;
597 FP_FLASH_WRITE fpFlashWrite;
598 FP_FLASH_WRITE_STATUS fpFlashWriteWithStatusCheck;
601 struct semaphore NVMRdmWrmLock;
602 BOOLEAN bNetworkInterfaceRegistered;
603 BOOLEAN bNetdeviceNotifierRegistered;
604 struct device *pstCreatedClassDevice;
605 BOOLEAN bUsbClassDriverRegistered;
606 // BOOLEAN InterfaceUpStatus;
607 PFLASH2X_CS_INFO psFlash2xCSInfo;
608 PFLASH_CS_INFO psFlashCSInfo ;
609 PFLASH2X_VENDORSPECIFIC_INFO psFlash2xVendorInfo;
610 UINT uiFlashBaseAdd; //Flash start address
611 UINT uiActiveISOOffset; //Active ISO offset choosen before f/w download
612 FLASH2X_SECTION_VAL eActiveISO; //Active ISO section val
613 FLASH2X_SECTION_VAL eActiveDSD; //Active DSD val choosen before f/w download
614 UINT uiActiveDSDOffsetAtFwDld; //For accessing Active DSD choosen before f/w download
615 UINT uiFlashLayoutMajorVersion ;
616 UINT uiFlashLayoutMinorVersion;
617 BOOLEAN bAllDSDWriteAllow ;
618 BOOLEAN bSigCorrupted ;
619 //this should be set who so ever want to change the Headers. after Wrtie it should be reset immediately.
620 BOOLEAN bHeaderChangeAllowed ;
622 BOOLEAN bEndPointHalted;
623 //while bFlashRawRead will be true, Driver ignore map lay out and consider flash as of without any map.
624 BOOLEAN bFlashRawRead;
625 BOOLEAN bPreparingForLowPowerMode ;
627 UINT syscfgBefFwDld ;
628 BOOLEAN StopAllXaction ;
629 UINT32 liTimeSinceLastNetEntry; //Used to Support extended CAPI requirements from
630 struct semaphore LowPowerModeSync;
631 ULONG liDrainCalculated;
633 S_BCM_DEBUG_STATE stDebugState;
636 typedef struct _MINI_ADAPTER MINI_ADAPTER, *PMINI_ADAPTER;
639 typedef struct _DEVICE_EXTENSION
641 PMINI_ADAPTER pAdapt;
642 }DEVICE_EXTENSION,*PDEVICE_EXTENSION;
645 struct _ETH_HEADER_STRUC {
646 UCHAR au8DestinationAddress[6];
647 UCHAR au8SourceAddress[6];
649 }__attribute__((packed));
650 typedef struct _ETH_HEADER_STRUC ETH_HEADER_STRUC, *PETH_HEADER_STRUC;
653 typedef struct FirmwareInfo
655 void __user * pvMappedFirmwareAddress;
656 ULONG u32FirmwareLength;
657 ULONG u32StartingAddress;
658 }__attribute__((packed)) FIRMWARE_INFO, *PFIRMWARE_INFO;
660 // holds the value of net_device structure..
661 extern struct net_device *gblpnetdev;
662 typedef struct _cntl_pkt{
663 PMINI_ADAPTER Adapter;
666 typedef LINK_REQUEST CONTROL_MESSAGE;
668 typedef struct _DDR_SETTING
672 }DDR_SETTING, *PDDR_SETTING;
673 typedef DDR_SETTING DDR_SET_NODE, *PDDR_SET_NODE;
675 InitAdapter(PMINI_ADAPTER psAdapter);
677 // =====================================================================
678 // Beceem vendor request codes for EP0
679 // =====================================================================
681 #define BCM_REQUEST_READ 0x2
682 #define BCM_REQUEST_WRITE 0x1
683 #define EP2_MPS_REG 0x0F0110A0
686 #define EP2_CFG_REG 0x0F0110A8
687 #define EP2_CFG_INT 0x27
688 #define EP2_CFG_BULK 0x25
690 #define EP4_MPS_REG 0x0F0110F0
693 #define EP4_CFG_REG 0x0F0110F8
695 #define ISO_MPS_REG 0x0F0110C8
696 #define ISO_MPS 0x00000000
707 typedef enum eInterface_setting
709 DEFAULT_SETTING_0 = 0,
710 ALTERNATE_SETTING_1 = 1,
713 #endif //__ADAPTER_H__