2 * Copyright (c) 2010 Broadcom Corporation
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #include <linux/kernel.h>
18 #include <linux/string.h>
19 #include <linux/bitops.h>
20 #include <linux/delay.h>
23 #include <linux/pci.h>
30 #include <wlc_phy_radio.h>
31 #include <wlc_phy_int.h>
32 #include <wlc_phy_lcn.h>
33 #include <wlc_phytbl_lcn.h>
35 #define PLL_2064_NDIV 90
36 #define PLL_2064_LOW_END_VCO 3000
37 #define PLL_2064_LOW_END_KVCO 27
38 #define PLL_2064_HIGH_END_VCO 4200
39 #define PLL_2064_HIGH_END_KVCO 68
40 #define PLL_2064_LOOP_BW_DOUBLER 200
41 #define PLL_2064_D30_DOUBLER 10500
42 #define PLL_2064_LOOP_BW 260
43 #define PLL_2064_D30 8000
44 #define PLL_2064_CAL_REF_TO 8
45 #define PLL_2064_MHZ 1000000
46 #define PLL_2064_OPEN_LOOP_DELAY 5
51 #define NOISE_IF_UPD_CHK_INTERVAL 1
52 #define NOISE_IF_UPD_RST_INTERVAL 60
53 #define NOISE_IF_UPD_THRESHOLD_CNT 1
54 #define NOISE_IF_UPD_TRHRESHOLD 50
55 #define NOISE_IF_UPD_TIMEOUT 1000
56 #define NOISE_IF_OFF 0
57 #define NOISE_IF_CHK 1
60 #define PAPD_BLANKING_PROFILE 3
62 #define PAPD_CORR_NORM 0
63 #define PAPD_BLANKING_THRESHOLD 0
64 #define PAPD_STOP_AFTER_LAST_UPDATE 0
66 #define LCN_TARGET_PWR 60
68 #define LCN_VBAT_OFFSET_433X 34649679
69 #define LCN_VBAT_SLOPE_433X 8258032
71 #define LCN_VBAT_SCALE_NOM 53
72 #define LCN_VBAT_SCALE_DEN 432
74 #define LCN_TEMPSENSE_OFFSET 80812
75 #define LCN_TEMPSENSE_DEN 2647
77 #define LCNPHY_txgainctrlovrval1_pagain_ovr_val1_SHIFT \
79 #define LCNPHY_txgainctrlovrval1_pagain_ovr_val1_MASK \
80 (0x7f << LCNPHY_txgainctrlovrval1_pagain_ovr_val1_SHIFT)
82 #define LCNPHY_stxtxgainctrlovrval1_pagain_ovr_val1_SHIFT \
84 #define LCNPHY_stxtxgainctrlovrval1_pagain_ovr_val1_MASK \
85 (0x7f << LCNPHY_stxtxgainctrlovrval1_pagain_ovr_val1_SHIFT)
87 #define wlc_lcnphy_enable_tx_gain_override(pi) \
88 wlc_lcnphy_set_tx_gain_override(pi, true)
89 #define wlc_lcnphy_disable_tx_gain_override(pi) \
90 wlc_lcnphy_set_tx_gain_override(pi, false)
92 #define wlc_lcnphy_iqcal_active(pi) \
93 (read_phy_reg((pi), 0x451) & \
94 ((0x1 << 15) | (0x1 << 14)))
96 #define txpwrctrl_off(pi) (0x7 != ((read_phy_reg(pi, 0x4a4) & 0xE000) >> 13))
97 #define wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi) \
98 (pi->temppwrctrl_capable)
99 #define wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi) \
100 (pi->hwpwrctrl_capable)
102 #define SWCTRL_BT_TX 0x18
103 #define SWCTRL_OVR_DISABLE 0x40
105 #define AFE_CLK_INIT_MODE_TXRX2X 1
106 #define AFE_CLK_INIT_MODE_PAPD 0
108 #define LCNPHY_TBL_ID_IQLOCAL 0x00
110 #define LCNPHY_TBL_ID_RFSEQ 0x08
111 #define LCNPHY_TBL_ID_GAIN_IDX 0x0d
112 #define LCNPHY_TBL_ID_SW_CTRL 0x0f
113 #define LCNPHY_TBL_ID_GAIN_TBL 0x12
114 #define LCNPHY_TBL_ID_SPUR 0x14
115 #define LCNPHY_TBL_ID_SAMPLEPLAY 0x15
116 #define LCNPHY_TBL_ID_SAMPLEPLAY1 0x16
118 #define LCNPHY_TX_PWR_CTRL_RATE_OFFSET 832
119 #define LCNPHY_TX_PWR_CTRL_MAC_OFFSET 128
120 #define LCNPHY_TX_PWR_CTRL_GAIN_OFFSET 192
121 #define LCNPHY_TX_PWR_CTRL_IQ_OFFSET 320
122 #define LCNPHY_TX_PWR_CTRL_LO_OFFSET 448
123 #define LCNPHY_TX_PWR_CTRL_PWR_OFFSET 576
125 #define LCNPHY_TX_PWR_CTRL_START_INDEX_2G_4313 140
127 #define LCNPHY_TX_PWR_CTRL_START_NPT 1
128 #define LCNPHY_TX_PWR_CTRL_MAX_NPT 7
130 #define LCNPHY_NOISE_SAMPLES_DEFAULT 5000
132 #define LCNPHY_ACI_DETECT_START 1
133 #define LCNPHY_ACI_DETECT_PROGRESS 2
134 #define LCNPHY_ACI_DETECT_STOP 3
136 #define LCNPHY_ACI_CRSHIFRMLO_TRSH 100
137 #define LCNPHY_ACI_GLITCH_TRSH 2000
138 #define LCNPHY_ACI_TMOUT 250
139 #define LCNPHY_ACI_DETECT_TIMEOUT 2
140 #define LCNPHY_ACI_START_DELAY 0
142 #define wlc_lcnphy_tx_gain_override_enabled(pi) \
143 (0 != (read_phy_reg((pi), 0x43b) & (0x1 << 6)))
145 #define wlc_lcnphy_total_tx_frames(pi) \
146 wlapi_bmac_read_shm((pi)->sh->physhim, M_UCODE_MACSTAT + offsetof(macstat_t, txallfrm))
164 lcnphy_txgains_t gains;
167 } lcnphy_txcalgains_t;
173 } lcnphy_rx_iqcomp_t;
183 } lcnphy_unsign16_struct;
199 } lcnphy_papd_cal_type_t;
201 typedef u16 iqcal_gain_params_lcnphy[9];
203 static const iqcal_gain_params_lcnphy tbl_iqcal_gainparams_lcnphy_2G[] = {
204 {0, 0, 0, 0, 0, 0, 0, 0, 0},
207 static const iqcal_gain_params_lcnphy *tbl_iqcal_gainparams_lcnphy[1] = {
208 tbl_iqcal_gainparams_lcnphy_2G,
211 static const u16 iqcal_gainparams_numgains_lcnphy[1] = {
212 sizeof(tbl_iqcal_gainparams_lcnphy_2G) /
213 sizeof(*tbl_iqcal_gainparams_lcnphy_2G),
216 static const lcnphy_sfo_cfg_t lcnphy_sfo_cfg[] = {
234 u16 lcnphy_iqcal_loft_gainladder[] = {
258 u16 lcnphy_iqcal_ir_gainladder[] = {
282 lcnphy_spb_tone_t lcnphy_spb_tone_3750[] = {
318 u16 iqlo_loopback_rf_regs[20] = {
342 u16 tempsense_phy_regs[14] = {
360 u16 rxiq_cal_rf_reg[11] = {
375 lcnphy_rx_iqcomp_t lcnphy_rx_iqcomp_table_rev0[] = {
429 static const u32 lcnphy_23bitgaincode_table[] = {
469 static const s8 lcnphy_gain_table[] = {
509 static const s8 lcnphy_gain_index_offset_for_rssi[] = {
550 extern const u8 spur_tbl_rev0[];
551 extern const u32 dot11lcnphytbl_rx_gain_info_sz_rev1;
552 extern const dot11lcnphytbl_info_t dot11lcnphytbl_rx_gain_info_rev1[];
553 extern const dot11lcnphytbl_info_t dot11lcn_sw_ctrl_tbl_info_4313_bt_epa;
554 extern const dot11lcnphytbl_info_t dot11lcn_sw_ctrl_tbl_info_4313_bt_epa_p250;
556 typedef struct _chan_info_2064_lcnphy {
561 u8 txrf_mix_tune_ctrl;
564 u8 pa_rxrf_lna1_freq_tune;
565 u8 pa_rxrf_lna2_freq_tune;
567 } chan_info_2064_lcnphy_t;
569 static chan_info_2064_lcnphy_t chan_info_2064_lcnphy[] = {
570 {1, 2412, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80},
571 {2, 2417, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80},
572 {3, 2422, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80},
573 {4, 2427, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80},
574 {5, 2432, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80},
575 {6, 2437, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80},
576 {7, 2442, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80},
577 {8, 2447, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80},
578 {9, 2452, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80},
579 {10, 2457, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80},
580 {11, 2462, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80},
581 {12, 2467, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80},
582 {13, 2472, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80},
583 {14, 2484, 0x0B, 0x0A, 0x00, 0x07, 0x0A, 0x88, 0x88, 0x80},
586 lcnphy_radio_regs_t lcnphy_radio_regs_2064[] = {
588 {0x01, 0x64, 0x64, 0, 0},
589 {0x02, 0x20, 0x20, 0, 0},
590 {0x03, 0x66, 0x66, 0, 0},
591 {0x04, 0xf8, 0xf8, 0, 0},
593 {0x06, 0x10, 0x10, 0, 0},
597 {0x0A, 0x37, 0x37, 0, 0},
598 {0x0B, 0x6, 0x6, 0, 0},
599 {0x0C, 0x55, 0x55, 0, 0},
600 {0x0D, 0x8b, 0x8b, 0, 0},
602 {0x0F, 0x5, 0x5, 0, 0},
604 {0x11, 0xe, 0xe, 0, 0},
606 {0x13, 0xb, 0xb, 0, 0},
607 {0x14, 0x2, 0x2, 0, 0},
608 {0x15, 0x12, 0x12, 0, 0},
609 {0x16, 0x12, 0x12, 0, 0},
610 {0x17, 0xc, 0xc, 0, 0},
611 {0x18, 0xc, 0xc, 0, 0},
612 {0x19, 0xc, 0xc, 0, 0},
613 {0x1A, 0x8, 0x8, 0, 0},
614 {0x1B, 0x2, 0x2, 0, 0},
616 {0x1D, 0x1, 0x1, 0, 0},
617 {0x1E, 0x12, 0x12, 0, 0},
618 {0x1F, 0x6e, 0x6e, 0, 0},
619 {0x20, 0x2, 0x2, 0, 0},
620 {0x21, 0x23, 0x23, 0, 0},
621 {0x22, 0x8, 0x8, 0, 0},
624 {0x25, 0xc, 0xc, 0, 0},
625 {0x26, 0x33, 0x33, 0, 0},
626 {0x27, 0x55, 0x55, 0, 0},
628 {0x29, 0x30, 0x30, 0, 0},
629 {0x2A, 0xb, 0xb, 0, 0},
630 {0x2B, 0x1b, 0x1b, 0, 0},
631 {0x2C, 0x3, 0x3, 0, 0},
632 {0x2D, 0x1b, 0x1b, 0, 0},
634 {0x2F, 0x20, 0x20, 0, 0},
635 {0x30, 0xa, 0xa, 0, 0},
637 {0x32, 0x62, 0x62, 0, 0},
638 {0x33, 0x19, 0x19, 0, 0},
639 {0x34, 0x33, 0x33, 0, 0},
640 {0x35, 0x77, 0x77, 0, 0},
642 {0x37, 0x70, 0x70, 0, 0},
643 {0x38, 0x3, 0x3, 0, 0},
644 {0x39, 0xf, 0xf, 0, 0},
645 {0x3A, 0x6, 0x6, 0, 0},
646 {0x3B, 0xcf, 0xcf, 0, 0},
647 {0x3C, 0x1a, 0x1a, 0, 0},
648 {0x3D, 0x6, 0x6, 0, 0},
649 {0x3E, 0x42, 0x42, 0, 0},
651 {0x40, 0xfb, 0xfb, 0, 0},
652 {0x41, 0x9a, 0x9a, 0, 0},
653 {0x42, 0x7a, 0x7a, 0, 0},
654 {0x43, 0x29, 0x29, 0, 0},
656 {0x45, 0x8, 0x8, 0, 0},
657 {0x46, 0xce, 0xce, 0, 0},
658 {0x47, 0x27, 0x27, 0, 0},
659 {0x48, 0x62, 0x62, 0, 0},
660 {0x49, 0x6, 0x6, 0, 0},
661 {0x4A, 0x58, 0x58, 0, 0},
662 {0x4B, 0xf7, 0xf7, 0, 0},
664 {0x4D, 0xb3, 0xb3, 0, 0},
666 {0x4F, 0x2, 0x2, 0, 0},
668 {0x51, 0x9, 0x9, 0, 0},
669 {0x52, 0x5, 0x5, 0, 0},
670 {0x53, 0x17, 0x17, 0, 0},
671 {0x54, 0x38, 0x38, 0, 0},
674 {0x57, 0xb, 0xb, 0, 0},
681 {0x5E, 0x88, 0x88, 0, 0},
682 {0x5F, 0xcc, 0xcc, 0, 0},
683 {0x60, 0x74, 0x74, 0, 0},
684 {0x61, 0x74, 0x74, 0, 0},
685 {0x62, 0x74, 0x74, 0, 0},
686 {0x63, 0x44, 0x44, 0, 0},
687 {0x64, 0x77, 0x77, 0, 0},
688 {0x65, 0x44, 0x44, 0, 0},
689 {0x66, 0x77, 0x77, 0, 0},
690 {0x67, 0x55, 0x55, 0, 0},
691 {0x68, 0x77, 0x77, 0, 0},
692 {0x69, 0x77, 0x77, 0, 0},
694 {0x6B, 0x7f, 0x7f, 0, 0},
695 {0x6C, 0x8, 0x8, 0, 0},
697 {0x6E, 0x88, 0x88, 0, 0},
698 {0x6F, 0x66, 0x66, 0, 0},
699 {0x70, 0x66, 0x66, 0, 0},
700 {0x71, 0x28, 0x28, 0, 0},
701 {0x72, 0x55, 0x55, 0, 0},
702 {0x73, 0x4, 0x4, 0, 0},
706 {0x77, 0x1, 0x1, 0, 0},
707 {0x78, 0xd6, 0xd6, 0, 0},
718 {0x83, 0xb4, 0xb4, 0, 0},
719 {0x84, 0x1, 0x1, 0, 0},
720 {0x85, 0x20, 0x20, 0, 0},
721 {0x86, 0x5, 0x5, 0, 0},
722 {0x87, 0xff, 0xff, 0, 0},
723 {0x88, 0x7, 0x7, 0, 0},
724 {0x89, 0x77, 0x77, 0, 0},
725 {0x8A, 0x77, 0x77, 0, 0},
726 {0x8B, 0x77, 0x77, 0, 0},
727 {0x8C, 0x77, 0x77, 0, 0},
728 {0x8D, 0x8, 0x8, 0, 0},
729 {0x8E, 0xa, 0xa, 0, 0},
730 {0x8F, 0x8, 0x8, 0, 0},
731 {0x90, 0x18, 0x18, 0, 0},
732 {0x91, 0x5, 0x5, 0, 0},
733 {0x92, 0x1f, 0x1f, 0, 0},
734 {0x93, 0x10, 0x10, 0, 0},
735 {0x94, 0x3, 0x3, 0, 0},
738 {0x97, 0xaa, 0xaa, 0, 0},
740 {0x99, 0x23, 0x23, 0, 0},
741 {0x9A, 0x7, 0x7, 0, 0},
742 {0x9B, 0xf, 0xf, 0, 0},
743 {0x9C, 0x10, 0x10, 0, 0},
744 {0x9D, 0x3, 0x3, 0, 0},
745 {0x9E, 0x4, 0x4, 0, 0},
746 {0x9F, 0x20, 0x20, 0, 0},
751 {0xA4, 0x1, 0x1, 0, 0},
752 {0xA5, 0x77, 0x77, 0, 0},
753 {0xA6, 0x77, 0x77, 0, 0},
754 {0xA7, 0x77, 0x77, 0, 0},
755 {0xA8, 0x77, 0x77, 0, 0},
756 {0xA9, 0x8c, 0x8c, 0, 0},
757 {0xAA, 0x88, 0x88, 0, 0},
758 {0xAB, 0x78, 0x78, 0, 0},
759 {0xAC, 0x57, 0x57, 0, 0},
760 {0xAD, 0x88, 0x88, 0, 0},
762 {0xAF, 0x8, 0x8, 0, 0},
763 {0xB0, 0x88, 0x88, 0, 0},
765 {0xB2, 0x1b, 0x1b, 0, 0},
766 {0xB3, 0x3, 0x3, 0, 0},
767 {0xB4, 0x24, 0x24, 0, 0},
768 {0xB5, 0x3, 0x3, 0, 0},
769 {0xB6, 0x1b, 0x1b, 0, 0},
770 {0xB7, 0x24, 0x24, 0, 0},
771 {0xB8, 0x3, 0x3, 0, 0},
773 {0xBA, 0xaa, 0xaa, 0, 0},
775 {0xBC, 0x4, 0x4, 0, 0},
777 {0xBE, 0x8, 0x8, 0, 0},
778 {0xBF, 0x11, 0x11, 0, 0},
781 {0xC2, 0x62, 0x62, 0, 0},
782 {0xC3, 0x1e, 0x1e, 0, 0},
783 {0xC4, 0x33, 0x33, 0, 0},
784 {0xC5, 0x37, 0x37, 0, 0},
786 {0xC7, 0x70, 0x70, 0, 0},
787 {0xC8, 0x1e, 0x1e, 0, 0},
788 {0xC9, 0x6, 0x6, 0, 0},
789 {0xCA, 0x4, 0x4, 0, 0},
790 {0xCB, 0x2f, 0x2f, 0, 0},
791 {0xCC, 0xf, 0xf, 0, 0},
793 {0xCE, 0xff, 0xff, 0, 0},
794 {0xCF, 0x8, 0x8, 0, 0},
795 {0xD0, 0x3f, 0x3f, 0, 0},
796 {0xD1, 0x3f, 0x3f, 0, 0},
797 {0xD2, 0x3f, 0x3f, 0, 0},
801 {0xD6, 0xcc, 0xcc, 0, 0},
803 {0xD8, 0x8, 0x8, 0, 0},
804 {0xD9, 0x8, 0x8, 0, 0},
805 {0xDA, 0x8, 0x8, 0, 0},
806 {0xDB, 0x11, 0x11, 0, 0},
808 {0xDD, 0x87, 0x87, 0, 0},
809 {0xDE, 0x88, 0x88, 0, 0},
810 {0xDF, 0x8, 0x8, 0, 0},
811 {0xE0, 0x8, 0x8, 0, 0},
812 {0xE1, 0x8, 0x8, 0, 0},
816 {0xE5, 0xf5, 0xf5, 0, 0},
817 {0xE6, 0x30, 0x30, 0, 0},
818 {0xE7, 0x1, 0x1, 0, 0},
820 {0xE9, 0xff, 0xff, 0, 0},
823 {0xEC, 0x22, 0x22, 0, 0},
827 {0xF0, 0x3, 0x3, 0, 0},
828 {0xF1, 0x1, 0x1, 0, 0},
834 {0xF7, 0x6, 0x6, 0, 0},
837 {0xFA, 0x40, 0x40, 0, 0},
839 {0xFC, 0x1, 0x1, 0, 0},
840 {0xFD, 0x80, 0x80, 0, 0},
841 {0xFE, 0x2, 0x2, 0, 0},
842 {0xFF, 0x10, 0x10, 0, 0},
843 {0x100, 0x2, 0x2, 0, 0},
844 {0x101, 0x1e, 0x1e, 0, 0},
845 {0x102, 0x1e, 0x1e, 0, 0},
847 {0x104, 0x1f, 0x1f, 0, 0},
848 {0x105, 0, 0x8, 0, 1},
849 {0x106, 0x2a, 0x2a, 0, 0},
850 {0x107, 0xf, 0xf, 0, 0},
871 {0x11C, 0x1, 0x1, 0, 0},
877 {0x122, 0x80, 0x80, 0, 0},
879 {0x124, 0xf8, 0xf8, 0, 0},
895 #define LCNPHY_NUM_DIG_FILT_COEFFS 16
896 #define LCNPHY_NUM_TX_DIG_FILTERS_CCK 13
899 LCNPHY_txdigfiltcoeffs_cck[LCNPHY_NUM_TX_DIG_FILTERS_CCK]
900 [LCNPHY_NUM_DIG_FILT_COEFFS + 1] = {
901 {0, 1, 415, 1874, 64, 128, 64, 792, 1656, 64, 128, 64, 778, 1582, 64,
903 {1, 1, 402, 1847, 259, 59, 259, 671, 1794, 68, 54, 68, 608, 1863, 93,
905 {2, 1, 415, 1874, 64, 128, 64, 792, 1656, 192, 384, 192, 778, 1582, 64,
907 {3, 1, 302, 1841, 129, 258, 129, 658, 1720, 205, 410, 205, 754, 1760,
909 {20, 1, 360, 1884, 242, 1734, 242, 752, 1720, 205, 1845, 205, 767, 1760,
911 {21, 1, 360, 1884, 149, 1874, 149, 752, 1720, 205, 1883, 205, 767, 1760,
913 {22, 1, 360, 1884, 98, 1948, 98, 752, 1720, 205, 1924, 205, 767, 1760,
915 {23, 1, 350, 1884, 116, 1966, 116, 752, 1720, 205, 2008, 205, 767, 1760,
917 {24, 1, 325, 1884, 32, 40, 32, 756, 1720, 256, 471, 256, 766, 1760, 256,
919 {25, 1, 299, 1884, 51, 64, 51, 736, 1720, 256, 471, 256, 765, 1760, 256,
921 {26, 1, 277, 1943, 39, 117, 88, 637, 1838, 64, 192, 144, 614, 1864, 128,
923 {27, 1, 245, 1943, 49, 147, 110, 626, 1838, 256, 768, 576, 613, 1864,
925 {30, 1, 302, 1841, 61, 122, 61, 658, 1720, 205, 410, 205, 754, 1760,
929 #define LCNPHY_NUM_TX_DIG_FILTERS_OFDM 3
931 LCNPHY_txdigfiltcoeffs_ofdm[LCNPHY_NUM_TX_DIG_FILTERS_OFDM]
932 [LCNPHY_NUM_DIG_FILT_COEFFS + 1] = {
933 {0, 0, 0xa2, 0x0, 0x100, 0x100, 0x0, 0x0, 0x0, 0x100, 0x0, 0x0,
934 0x278, 0xfea0, 0x80, 0x100, 0x80,},
935 {1, 0, 374, 0xFF79, 16, 32, 16, 799, 0xFE74, 50, 32, 50,
936 750, 0xFE2B, 212, 0xFFCE, 212,},
937 {2, 0, 375, 0xFF16, 37, 76, 37, 799, 0xFE74, 32, 20, 32, 748,
938 0xFEF2, 128, 0xFFE2, 128}
941 #define wlc_lcnphy_set_start_tx_pwr_idx(pi, idx) \
942 mod_phy_reg(pi, 0x4a4, \
946 #define wlc_lcnphy_set_tx_pwr_npt(pi, npt) \
947 mod_phy_reg(pi, 0x4a5, \
951 #define wlc_lcnphy_get_tx_pwr_ctrl(pi) \
952 (read_phy_reg((pi), 0x4a4) & \
957 #define wlc_lcnphy_get_tx_pwr_npt(pi) \
958 ((read_phy_reg(pi, 0x4a5) & \
962 #define wlc_lcnphy_get_current_tx_pwr_idx_if_pwrctrl_on(pi) \
963 (read_phy_reg(pi, 0x473) & 0x1ff)
965 #define wlc_lcnphy_get_target_tx_pwr(pi) \
966 ((read_phy_reg(pi, 0x4a7) & \
970 #define wlc_lcnphy_set_target_tx_pwr(pi, target) \
971 mod_phy_reg(pi, 0x4a7, \
975 #define wlc_radio_2064_rcal_done(pi) (0 != (read_radio_reg(pi, RADIO_2064_REG05C) & 0x20))
976 #define tempsense_done(pi) (0x8000 == (read_phy_reg(pi, 0x476) & 0x8000))
978 #define LCNPHY_IQLOCC_READ(val) ((u8)(-(s8)(((val) & 0xf0) >> 4) + (s8)((val) & 0x0f)))
979 #define FIXED_TXPWR 78
980 #define LCNPHY_TEMPSENSE(val) ((s16)((val > 255) ? (val - 512) : val))
982 static u32 wlc_lcnphy_qdiv_roundup(u32 divident, u32 divisor,
984 static void wlc_lcnphy_set_rx_gain_by_distribution(phy_info_t *pi,
985 u16 ext_lna, u16 trsw,
989 static void wlc_lcnphy_clear_tx_power_offsets(phy_info_t *pi);
990 static void wlc_lcnphy_set_pa_gain(phy_info_t *pi, u16 gain);
991 static void wlc_lcnphy_set_trsw_override(phy_info_t *pi, bool tx, bool rx);
992 static void wlc_lcnphy_set_bbmult(phy_info_t *pi, u8 m0);
993 static u8 wlc_lcnphy_get_bbmult(phy_info_t *pi);
994 static void wlc_lcnphy_get_tx_gain(phy_info_t *pi, lcnphy_txgains_t *gains);
995 static void wlc_lcnphy_set_tx_gain_override(phy_info_t *pi, bool bEnable);
996 static void wlc_lcnphy_toggle_afe_pwdn(phy_info_t *pi);
997 static void wlc_lcnphy_rx_gain_override_enable(phy_info_t *pi, bool enable);
998 static void wlc_lcnphy_set_tx_gain(phy_info_t *pi,
999 lcnphy_txgains_t *target_gains);
1000 static bool wlc_lcnphy_rx_iq_est(phy_info_t *pi, u16 num_samps,
1001 u8 wait_time, lcnphy_iq_est_t *iq_est);
1002 static bool wlc_lcnphy_calc_rx_iq_comp(phy_info_t *pi, u16 num_samps);
1003 static u16 wlc_lcnphy_get_pa_gain(phy_info_t *pi);
1004 static void wlc_lcnphy_afe_clk_init(phy_info_t *pi, u8 mode);
1005 extern void wlc_lcnphy_tx_pwr_ctrl_init(wlc_phy_t *ppi);
1006 static void wlc_lcnphy_radio_2064_channel_tune_4313(phy_info_t *pi,
1009 static void wlc_lcnphy_load_tx_gain_table(phy_info_t *pi,
1010 const lcnphy_tx_gain_tbl_entry *g);
1012 static void wlc_lcnphy_samp_cap(phy_info_t *pi, int clip_detect_algo,
1013 u16 thresh, s16 *ptr, int mode);
1014 static int wlc_lcnphy_calc_floor(s16 coeff, int type);
1015 static void wlc_lcnphy_tx_iqlo_loopback(phy_info_t *pi,
1016 u16 *values_to_save);
1017 static void wlc_lcnphy_tx_iqlo_loopback_cleanup(phy_info_t *pi,
1018 u16 *values_to_save);
1019 static void wlc_lcnphy_set_cc(phy_info_t *pi, int cal_type, s16 coeff_x,
1021 static lcnphy_unsign16_struct wlc_lcnphy_get_cc(phy_info_t *pi, int cal_type);
1022 static void wlc_lcnphy_a1(phy_info_t *pi, int cal_type,
1023 int num_levels, int step_size_lg2);
1024 static void wlc_lcnphy_tx_iqlo_soft_cal_full(phy_info_t *pi);
1026 static void wlc_lcnphy_set_chanspec_tweaks(phy_info_t *pi,
1027 chanspec_t chanspec);
1028 static void wlc_lcnphy_agc_temp_init(phy_info_t *pi);
1029 static void wlc_lcnphy_temp_adj(phy_info_t *pi);
1030 static void wlc_lcnphy_clear_papd_comptable(phy_info_t *pi);
1031 static void wlc_lcnphy_baseband_init(phy_info_t *pi);
1032 static void wlc_lcnphy_radio_init(phy_info_t *pi);
1033 static void wlc_lcnphy_rc_cal(phy_info_t *pi);
1034 static void wlc_lcnphy_rcal(phy_info_t *pi);
1035 static void wlc_lcnphy_txrx_spur_avoidance_mode(phy_info_t *pi, bool enable);
1036 static int wlc_lcnphy_load_tx_iir_filter(phy_info_t *pi, bool is_ofdm,
1038 static void wlc_lcnphy_set_rx_iq_comp(phy_info_t *pi, u16 a, u16 b);
1040 void wlc_lcnphy_write_table(phy_info_t *pi, const phytbl_info_t *pti)
1042 wlc_phy_write_table(pi, pti, 0x455, 0x457, 0x456);
1045 void wlc_lcnphy_read_table(phy_info_t *pi, phytbl_info_t *pti)
1047 wlc_phy_read_table(pi, pti, 0x455, 0x457, 0x456);
1051 wlc_lcnphy_common_read_table(phy_info_t *pi, u32 tbl_id,
1052 const void *tbl_ptr, u32 tbl_len,
1053 u32 tbl_width, u32 tbl_offset)
1056 tab.tbl_id = tbl_id;
1057 tab.tbl_ptr = tbl_ptr;
1058 tab.tbl_len = tbl_len;
1059 tab.tbl_width = tbl_width;
1060 tab.tbl_offset = tbl_offset;
1061 wlc_lcnphy_read_table(pi, &tab);
1065 wlc_lcnphy_common_write_table(phy_info_t *pi, u32 tbl_id,
1066 const void *tbl_ptr, u32 tbl_len,
1067 u32 tbl_width, u32 tbl_offset)
1071 tab.tbl_id = tbl_id;
1072 tab.tbl_ptr = tbl_ptr;
1073 tab.tbl_len = tbl_len;
1074 tab.tbl_width = tbl_width;
1075 tab.tbl_offset = tbl_offset;
1076 wlc_lcnphy_write_table(pi, &tab);
1080 wlc_lcnphy_qdiv_roundup(u32 dividend, u32 divisor, u8 precision)
1082 u32 quotient, remainder, roundup, rbit;
1084 quotient = dividend / divisor;
1085 remainder = dividend % divisor;
1087 roundup = (divisor >> 1) + rbit;
1089 while (precision--) {
1091 if (remainder >= roundup) {
1093 remainder = ((remainder - roundup) << 1) + rbit;
1099 if (remainder >= roundup)
1105 static int wlc_lcnphy_calc_floor(s16 coeff_x, int type)
1111 k = (coeff_x - 1) / 2;
1117 if ((coeff_x + 1) < 0)
1120 k = (coeff_x + 1) / 2;
1125 s8 wlc_lcnphy_get_current_tx_pwr_idx(phy_info_t *pi)
1128 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
1130 if (txpwrctrl_off(pi))
1131 index = pi_lcn->lcnphy_current_index;
1132 else if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi))
1134 (s8) (wlc_lcnphy_get_current_tx_pwr_idx_if_pwrctrl_on(pi)
1137 index = pi_lcn->lcnphy_current_index;
1141 static u32 wlc_lcnphy_measure_digital_power(phy_info_t *pi, u16 nsamples)
1143 lcnphy_iq_est_t iq_est = { 0, 0, 0 };
1145 if (!wlc_lcnphy_rx_iq_est(pi, nsamples, 32, &iq_est))
1147 return (iq_est.i_pwr + iq_est.q_pwr) / nsamples;
1150 void wlc_lcnphy_crsuprs(phy_info_t *pi, int channel)
1152 u16 afectrlovr, afectrlovrval;
1153 afectrlovr = read_phy_reg(pi, 0x43b);
1154 afectrlovrval = read_phy_reg(pi, 0x43c);
1156 mod_phy_reg(pi, 0x43b, (0x1 << 1), (1) << 1);
1158 mod_phy_reg(pi, 0x43c, (0x1 << 1), (0) << 1);
1160 mod_phy_reg(pi, 0x43b, (0x1 << 4), (1) << 4);
1162 mod_phy_reg(pi, 0x43c, (0x1 << 6), (0) << 6);
1164 write_phy_reg(pi, 0x44b, 0xffff);
1165 wlc_lcnphy_tx_pu(pi, 1);
1167 mod_phy_reg(pi, 0x634, (0xff << 8), (0) << 8);
1169 or_phy_reg(pi, 0x6da, 0x0080);
1171 or_phy_reg(pi, 0x00a, 0x228);
1173 and_phy_reg(pi, 0x00a, ~(0x228));
1175 and_phy_reg(pi, 0x6da, 0xFF7F);
1176 write_phy_reg(pi, 0x43b, afectrlovr);
1177 write_phy_reg(pi, 0x43c, afectrlovrval);
1181 static void wlc_lcnphy_toggle_afe_pwdn(phy_info_t *pi)
1183 u16 save_AfeCtrlOvrVal, save_AfeCtrlOvr;
1185 save_AfeCtrlOvrVal = read_phy_reg(pi, 0x43c);
1186 save_AfeCtrlOvr = read_phy_reg(pi, 0x43b);
1188 write_phy_reg(pi, 0x43c, save_AfeCtrlOvrVal | 0x1);
1189 write_phy_reg(pi, 0x43b, save_AfeCtrlOvr | 0x1);
1191 write_phy_reg(pi, 0x43c, save_AfeCtrlOvrVal & 0xfffe);
1192 write_phy_reg(pi, 0x43b, save_AfeCtrlOvr & 0xfffe);
1194 write_phy_reg(pi, 0x43c, save_AfeCtrlOvrVal);
1195 write_phy_reg(pi, 0x43b, save_AfeCtrlOvr);
1198 static void wlc_lcnphy_txrx_spur_avoidance_mode(phy_info_t *pi, bool enable)
1201 write_phy_reg(pi, 0x942, 0x7);
1202 write_phy_reg(pi, 0x93b, ((1 << 13) + 23));
1203 write_phy_reg(pi, 0x93c, ((1 << 13) + 1989));
1205 write_phy_reg(pi, 0x44a, 0x084);
1206 write_phy_reg(pi, 0x44a, 0x080);
1207 write_phy_reg(pi, 0x6d3, 0x2222);
1208 write_phy_reg(pi, 0x6d3, 0x2220);
1210 write_phy_reg(pi, 0x942, 0x0);
1211 write_phy_reg(pi, 0x93b, ((0 << 13) + 23));
1212 write_phy_reg(pi, 0x93c, ((0 << 13) + 1989));
1214 wlapi_switch_macfreq(pi->sh->physhim, enable);
1217 void wlc_phy_chanspec_set_lcnphy(phy_info_t *pi, chanspec_t chanspec)
1219 u8 channel = CHSPEC_CHANNEL(chanspec);
1221 wlc_phy_chanspec_radio_set((wlc_phy_t *) pi, chanspec);
1223 wlc_lcnphy_set_chanspec_tweaks(pi, pi->radio_chanspec);
1225 or_phy_reg(pi, 0x44a, 0x44);
1226 write_phy_reg(pi, 0x44a, 0x80);
1228 if (!NORADIO_ENAB(pi->pubpi)) {
1229 wlc_lcnphy_radio_2064_channel_tune_4313(pi, channel);
1233 wlc_lcnphy_toggle_afe_pwdn(pi);
1235 write_phy_reg(pi, 0x657, lcnphy_sfo_cfg[channel - 1].ptcentreTs20);
1236 write_phy_reg(pi, 0x658, lcnphy_sfo_cfg[channel - 1].ptcentreFactor);
1238 if (CHSPEC_CHANNEL(pi->radio_chanspec) == 14) {
1239 mod_phy_reg(pi, 0x448, (0x3 << 8), (2) << 8);
1241 wlc_lcnphy_load_tx_iir_filter(pi, false, 3);
1243 mod_phy_reg(pi, 0x448, (0x3 << 8), (1) << 8);
1245 wlc_lcnphy_load_tx_iir_filter(pi, false, 2);
1248 wlc_lcnphy_load_tx_iir_filter(pi, true, 0);
1250 mod_phy_reg(pi, 0x4eb, (0x7 << 3), (1) << 3);
1254 static void wlc_lcnphy_set_dac_gain(phy_info_t *pi, u16 dac_gain)
1258 dac_ctrl = (read_phy_reg(pi, 0x439) >> 0);
1259 dac_ctrl = dac_ctrl & 0xc7f;
1260 dac_ctrl = dac_ctrl | (dac_gain << 7);
1261 mod_phy_reg(pi, 0x439, (0xfff << 0), (dac_ctrl) << 0);
1265 static void wlc_lcnphy_set_tx_gain_override(phy_info_t *pi, bool bEnable)
1267 u16 bit = bEnable ? 1 : 0;
1269 mod_phy_reg(pi, 0x4b0, (0x1 << 7), bit << 7);
1271 mod_phy_reg(pi, 0x4b0, (0x1 << 14), bit << 14);
1273 mod_phy_reg(pi, 0x43b, (0x1 << 6), bit << 6);
1276 static u16 wlc_lcnphy_get_pa_gain(phy_info_t *pi)
1280 pa_gain = (read_phy_reg(pi, 0x4fb) &
1281 LCNPHY_txgainctrlovrval1_pagain_ovr_val1_MASK) >>
1282 LCNPHY_txgainctrlovrval1_pagain_ovr_val1_SHIFT;
1288 wlc_lcnphy_set_tx_gain(phy_info_t *pi, lcnphy_txgains_t *target_gains)
1290 u16 pa_gain = wlc_lcnphy_get_pa_gain(pi);
1292 mod_phy_reg(pi, 0x4b5,
1294 ((target_gains->gm_gain) | (target_gains->pga_gain << 8)) <<
1296 mod_phy_reg(pi, 0x4fb,
1298 ((target_gains->pad_gain) | (pa_gain << 8)) << 0);
1300 mod_phy_reg(pi, 0x4fc,
1302 ((target_gains->gm_gain) | (target_gains->pga_gain << 8)) <<
1304 mod_phy_reg(pi, 0x4fd,
1306 ((target_gains->pad_gain) | (pa_gain << 8)) << 0);
1308 wlc_lcnphy_set_dac_gain(pi, target_gains->dac_gain);
1310 wlc_lcnphy_enable_tx_gain_override(pi);
1313 static void wlc_lcnphy_set_bbmult(phy_info_t *pi, u8 m0)
1315 u16 m0m1 = (u16) m0 << 8;
1318 tab.tbl_ptr = &m0m1;
1320 tab.tbl_id = LCNPHY_TBL_ID_IQLOCAL;
1321 tab.tbl_offset = 87;
1323 wlc_lcnphy_write_table(pi, &tab);
1326 static void wlc_lcnphy_clear_tx_power_offsets(phy_info_t *pi)
1331 memset(data_buf, 0, sizeof(data_buf));
1333 tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
1335 tab.tbl_ptr = data_buf;
1337 if (!wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) {
1340 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_RATE_OFFSET;
1341 wlc_lcnphy_write_table(pi, &tab);
1345 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_MAC_OFFSET;
1346 wlc_lcnphy_write_table(pi, &tab);
1351 LCNPHY_TSSI_POST_PA,
1353 } lcnphy_tssi_mode_t;
1355 static void wlc_lcnphy_set_tssi_mux(phy_info_t *pi, lcnphy_tssi_mode_t pos)
1357 mod_phy_reg(pi, 0x4d7, (0x1 << 0), (0x1) << 0);
1359 mod_phy_reg(pi, 0x4d7, (0x1 << 6), (1) << 6);
1361 if (LCNPHY_TSSI_POST_PA == pos) {
1362 mod_phy_reg(pi, 0x4d9, (0x1 << 2), (0) << 2);
1364 mod_phy_reg(pi, 0x4d9, (0x1 << 3), (1) << 3);
1366 if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {
1367 mod_radio_reg(pi, RADIO_2064_REG086, 0x4, 0x4);
1369 mod_radio_reg(pi, RADIO_2064_REG03A, 1, 0x1);
1370 mod_radio_reg(pi, RADIO_2064_REG11A, 0x8, 0x8);
1373 mod_phy_reg(pi, 0x4d9, (0x1 << 2), (0x1) << 2);
1375 mod_phy_reg(pi, 0x4d9, (0x1 << 3), (0) << 3);
1377 if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {
1378 mod_radio_reg(pi, RADIO_2064_REG086, 0x4, 0x4);
1380 mod_radio_reg(pi, RADIO_2064_REG03A, 1, 0);
1381 mod_radio_reg(pi, RADIO_2064_REG11A, 0x8, 0x8);
1384 mod_phy_reg(pi, 0x637, (0x3 << 14), (0) << 14);
1386 if (LCNPHY_TSSI_EXT == pos) {
1387 write_radio_reg(pi, RADIO_2064_REG07F, 1);
1388 mod_radio_reg(pi, RADIO_2064_REG005, 0x7, 0x2);
1389 mod_radio_reg(pi, RADIO_2064_REG112, 0x80, 0x1 << 7);
1390 mod_radio_reg(pi, RADIO_2064_REG028, 0x1f, 0x3);
1394 static u16 wlc_lcnphy_rfseq_tbl_adc_pwrup(phy_info_t *pi)
1396 u16 N1, N2, N3, N4, N5, N6, N;
1397 N1 = ((read_phy_reg(pi, 0x4a5) & (0xff << 0))
1399 N2 = 1 << ((read_phy_reg(pi, 0x4a5) & (0x7 << 12))
1401 N3 = ((read_phy_reg(pi, 0x40d) & (0xff << 0))
1403 N4 = 1 << ((read_phy_reg(pi, 0x40d) & (0x7 << 8))
1405 N5 = ((read_phy_reg(pi, 0x4a2) & (0xff << 0))
1407 N6 = 1 << ((read_phy_reg(pi, 0x4a2) & (0x7 << 8))
1409 N = 2 * (N1 + N2 + N3 + N4 + 2 * (N5 + N6)) + 80;
1415 static void wlc_lcnphy_pwrctrl_rssiparams(phy_info_t *pi)
1417 u16 auxpga_vmid, auxpga_vmid_temp, auxpga_gain_temp;
1418 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
1421 (2 << 8) | (pi_lcn->lcnphy_rssi_vc << 4) | pi_lcn->lcnphy_rssi_vf;
1422 auxpga_vmid_temp = (2 << 8) | (8 << 4) | 4;
1423 auxpga_gain_temp = 2;
1425 mod_phy_reg(pi, 0x4d8, (0x1 << 0), (0) << 0);
1427 mod_phy_reg(pi, 0x4d8, (0x1 << 1), (0) << 1);
1429 mod_phy_reg(pi, 0x4d7, (0x1 << 3), (0) << 3);
1431 mod_phy_reg(pi, 0x4db,
1434 (auxpga_vmid << 0) | (pi_lcn->lcnphy_rssi_gs << 12));
1436 mod_phy_reg(pi, 0x4dc,
1439 (auxpga_vmid << 0) | (pi_lcn->lcnphy_rssi_gs << 12));
1441 mod_phy_reg(pi, 0x40a,
1444 (auxpga_vmid << 0) | (pi_lcn->lcnphy_rssi_gs << 12));
1446 mod_phy_reg(pi, 0x40b,
1449 (auxpga_vmid_temp << 0) | (auxpga_gain_temp << 12));
1451 mod_phy_reg(pi, 0x40c,
1454 (auxpga_vmid_temp << 0) | (auxpga_gain_temp << 12));
1456 mod_radio_reg(pi, RADIO_2064_REG082, (1 << 5), (1 << 5));
1459 static void wlc_lcnphy_tssi_setup(phy_info_t *pi)
1464 tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
1469 for (ind = 0; ind < 128; ind++) {
1470 wlc_lcnphy_write_table(pi, &tab);
1473 tab.tbl_offset = 704;
1474 for (ind = 0; ind < 128; ind++) {
1475 wlc_lcnphy_write_table(pi, &tab);
1478 mod_phy_reg(pi, 0x503, (0x1 << 0), (0) << 0);
1480 mod_phy_reg(pi, 0x503, (0x1 << 2), (0) << 2);
1482 mod_phy_reg(pi, 0x503, (0x1 << 4), (1) << 4);
1484 wlc_lcnphy_set_tssi_mux(pi, LCNPHY_TSSI_EXT);
1485 mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0) << 14);
1487 mod_phy_reg(pi, 0x4a4, (0x1 << 15), (1) << 15);
1489 mod_phy_reg(pi, 0x4d0, (0x1 << 5), (0) << 5);
1491 mod_phy_reg(pi, 0x4a4, (0x1ff << 0), (0) << 0);
1493 mod_phy_reg(pi, 0x4a5, (0xff << 0), (255) << 0);
1495 mod_phy_reg(pi, 0x4a5, (0x7 << 12), (5) << 12);
1497 mod_phy_reg(pi, 0x4a5, (0x7 << 8), (0) << 8);
1499 mod_phy_reg(pi, 0x40d, (0xff << 0), (64) << 0);
1501 mod_phy_reg(pi, 0x40d, (0x7 << 8), (4) << 8);
1503 mod_phy_reg(pi, 0x4a2, (0xff << 0), (64) << 0);
1505 mod_phy_reg(pi, 0x4a2, (0x7 << 8), (4) << 8);
1507 mod_phy_reg(pi, 0x4d0, (0x1ff << 6), (0) << 6);
1509 mod_phy_reg(pi, 0x4a8, (0xff << 0), (0x1) << 0);
1511 wlc_lcnphy_clear_tx_power_offsets(pi);
1513 mod_phy_reg(pi, 0x4a6, (0x1 << 15), (1) << 15);
1515 mod_phy_reg(pi, 0x4a6, (0x1ff << 0), (0xff) << 0);
1517 mod_phy_reg(pi, 0x49a, (0x1ff << 0), (0xff) << 0);
1519 if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {
1520 mod_radio_reg(pi, RADIO_2064_REG028, 0xf, 0xe);
1521 mod_radio_reg(pi, RADIO_2064_REG086, 0x4, 0x4);
1523 mod_radio_reg(pi, RADIO_2064_REG03A, 0x1, 1);
1524 mod_radio_reg(pi, RADIO_2064_REG11A, 0x8, 1 << 3);
1527 write_radio_reg(pi, RADIO_2064_REG025, 0xc);
1529 if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {
1530 mod_radio_reg(pi, RADIO_2064_REG03A, 0x1, 1);
1532 if (CHSPEC_IS2G(pi->radio_chanspec))
1533 mod_radio_reg(pi, RADIO_2064_REG03A, 0x2, 1 << 1);
1535 mod_radio_reg(pi, RADIO_2064_REG03A, 0x2, 0 << 1);
1538 if (LCNREV_IS(pi->pubpi.phy_rev, 2))
1539 mod_radio_reg(pi, RADIO_2064_REG03A, 0x2, 1 << 1);
1541 mod_radio_reg(pi, RADIO_2064_REG03A, 0x4, 1 << 2);
1543 mod_radio_reg(pi, RADIO_2064_REG11A, 0x1, 1 << 0);
1545 mod_radio_reg(pi, RADIO_2064_REG005, 0x8, 1 << 3);
1547 if (!wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) {
1548 mod_phy_reg(pi, 0x4d7,
1549 (0x1 << 3) | (0x7 << 12), 0 << 3 | 2 << 12);
1552 rfseq = wlc_lcnphy_rfseq_tbl_adc_pwrup(pi);
1553 tab.tbl_id = LCNPHY_TBL_ID_RFSEQ;
1555 tab.tbl_ptr = &rfseq;
1558 wlc_lcnphy_write_table(pi, &tab);
1560 mod_phy_reg(pi, 0x938, (0x1 << 2), (1) << 2);
1562 mod_phy_reg(pi, 0x939, (0x1 << 2), (1) << 2);
1564 mod_phy_reg(pi, 0x4a4, (0x1 << 12), (1) << 12);
1566 mod_phy_reg(pi, 0x4d7, (0x1 << 2), (1) << 2);
1568 mod_phy_reg(pi, 0x4d7, (0xf << 8), (0) << 8);
1570 wlc_lcnphy_pwrctrl_rssiparams(pi);
1573 void wlc_lcnphy_tx_pwr_update_npt(phy_info_t *pi)
1575 u16 tx_cnt, tx_total, npt;
1576 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
1578 tx_total = wlc_lcnphy_total_tx_frames(pi);
1579 tx_cnt = tx_total - pi_lcn->lcnphy_tssi_tx_cnt;
1580 npt = wlc_lcnphy_get_tx_pwr_npt(pi);
1582 if (tx_cnt > (1 << npt)) {
1584 pi_lcn->lcnphy_tssi_tx_cnt = tx_total;
1586 pi_lcn->lcnphy_tssi_idx = wlc_lcnphy_get_current_tx_pwr_idx(pi);
1587 pi_lcn->lcnphy_tssi_npt = npt;
1592 s32 wlc_lcnphy_tssi2dbm(s32 tssi, s32 a1, s32 b0, s32 b1)
1596 a = 32768 + (a1 * tssi);
1597 b = (1024 * b0) + (64 * b1 * tssi);
1598 p = ((2 * b) + a) / (2 * a);
1603 static void wlc_lcnphy_txpower_reset_npt(phy_info_t *pi)
1605 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
1606 if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi))
1609 pi_lcn->lcnphy_tssi_idx = LCNPHY_TX_PWR_CTRL_START_INDEX_2G_4313;
1610 pi_lcn->lcnphy_tssi_npt = LCNPHY_TX_PWR_CTRL_START_NPT;
1613 void wlc_lcnphy_txpower_recalc_target(phy_info_t *pi)
1616 u32 rate_table[WLC_NUM_RATES_CCK + WLC_NUM_RATES_OFDM +
1617 WLC_NUM_RATES_MCS_1_STREAM];
1619 if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi))
1622 for (i = 0, j = 0; i < ARRAY_SIZE(rate_table); i++, j++) {
1624 if (i == WLC_NUM_RATES_CCK + WLC_NUM_RATES_OFDM)
1625 j = TXP_FIRST_MCS_20_SISO;
1627 rate_table[i] = (u32) ((s32) (-pi->tx_power_offset[j]));
1630 tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
1632 tab.tbl_len = ARRAY_SIZE(rate_table);
1633 tab.tbl_ptr = rate_table;
1634 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_RATE_OFFSET;
1635 wlc_lcnphy_write_table(pi, &tab);
1637 if (wlc_lcnphy_get_target_tx_pwr(pi) != pi->tx_power_min) {
1638 wlc_lcnphy_set_target_tx_pwr(pi, pi->tx_power_min);
1640 wlc_lcnphy_txpower_reset_npt(pi);
1644 static void wlc_lcnphy_set_tx_pwr_soft_ctrl(phy_info_t *pi, s8 index)
1646 u32 cck_offset[4] = { 22, 22, 22, 22 };
1647 u32 ofdm_offset, reg_offset_cck;
1652 if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi))
1655 mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0x1) << 14);
1657 mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0x0) << 14);
1659 or_phy_reg(pi, 0x6da, 0x0040);
1662 for (i = 0; i < 4; i++)
1663 cck_offset[i] -= reg_offset_cck;
1664 tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
1667 tab.tbl_ptr = cck_offset;
1668 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_RATE_OFFSET;
1669 wlc_lcnphy_write_table(pi, &tab);
1672 tab.tbl_ptr = &ofdm_offset;
1673 for (i = 836; i < 862; i++) {
1675 wlc_lcnphy_write_table(pi, &tab);
1678 mod_phy_reg(pi, 0x4a4, (0x1 << 15), (0x1) << 15);
1680 mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0x1) << 14);
1682 mod_phy_reg(pi, 0x4a4, (0x1 << 13), (0x1) << 13);
1684 mod_phy_reg(pi, 0x4b0, (0x1 << 7), (0) << 7);
1686 mod_phy_reg(pi, 0x43b, (0x1 << 6), (0) << 6);
1688 mod_phy_reg(pi, 0x4a9, (0x1 << 15), (1) << 15);
1690 index2 = (u16) (index * 2);
1691 mod_phy_reg(pi, 0x4a9, (0x1ff << 0), (index2) << 0);
1693 mod_phy_reg(pi, 0x6a3, (0x1 << 4), (0) << 4);
1697 static s8 wlc_lcnphy_tempcompensated_txpwrctrl(phy_info_t *pi)
1699 s8 index, delta_brd, delta_temp, new_index, tempcorrx;
1700 s16 manp, meas_temp, temp_diff;
1703 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
1705 if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi))
1706 return pi_lcn->lcnphy_current_index;
1708 index = FIXED_TXPWR;
1710 if (NORADIO_ENAB(pi->pubpi))
1713 if (pi_lcn->lcnphy_tempsense_slope == 0) {
1716 temp = (u16) wlc_lcnphy_tempsense(pi, 0);
1717 meas_temp = LCNPHY_TEMPSENSE(temp);
1719 if (pi->tx_power_min != 0) {
1720 delta_brd = (pi_lcn->lcnphy_measPower - pi->tx_power_min);
1725 manp = LCNPHY_TEMPSENSE(pi_lcn->lcnphy_rawtempsense);
1726 temp_diff = manp - meas_temp;
1727 if (temp_diff < 0) {
1731 temp_diff = -temp_diff;
1734 delta_temp = (s8) wlc_lcnphy_qdiv_roundup((u32) (temp_diff * 192),
1736 lcnphy_tempsense_slope
1739 delta_temp = -delta_temp;
1741 if (pi_lcn->lcnphy_tempsense_option == 3
1742 && LCNREV_IS(pi->pubpi.phy_rev, 0))
1744 if (pi_lcn->lcnphy_tempcorrx > 31)
1745 tempcorrx = (s8) (pi_lcn->lcnphy_tempcorrx - 64);
1747 tempcorrx = (s8) pi_lcn->lcnphy_tempcorrx;
1748 if (LCNREV_IS(pi->pubpi.phy_rev, 1))
1751 index + delta_brd + delta_temp - pi_lcn->lcnphy_bandedge_corr;
1752 new_index += tempcorrx;
1754 if (LCNREV_IS(pi->pubpi.phy_rev, 1))
1756 if (new_index < 0 || new_index > 126) {
1762 static u16 wlc_lcnphy_set_tx_pwr_ctrl_mode(phy_info_t *pi, u16 mode)
1765 u16 current_mode = mode;
1766 if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi) &&
1767 mode == LCNPHY_TX_PWR_CTRL_HW)
1768 current_mode = LCNPHY_TX_PWR_CTRL_TEMPBASED;
1769 if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi) &&
1770 mode == LCNPHY_TX_PWR_CTRL_TEMPBASED)
1771 current_mode = LCNPHY_TX_PWR_CTRL_HW;
1772 return current_mode;
1775 void wlc_lcnphy_set_tx_pwr_ctrl(phy_info_t *pi, u16 mode)
1777 u16 old_mode = wlc_lcnphy_get_tx_pwr_ctrl(pi);
1779 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
1781 mode = wlc_lcnphy_set_tx_pwr_ctrl_mode(pi, mode);
1782 old_mode = wlc_lcnphy_set_tx_pwr_ctrl_mode(pi, old_mode);
1784 mod_phy_reg(pi, 0x6da, (0x1 << 6),
1785 ((LCNPHY_TX_PWR_CTRL_HW == mode) ? 1 : 0) << 6);
1787 mod_phy_reg(pi, 0x6a3, (0x1 << 4),
1788 ((LCNPHY_TX_PWR_CTRL_HW == mode) ? 0 : 1) << 4);
1790 if (old_mode != mode) {
1791 if (LCNPHY_TX_PWR_CTRL_HW == old_mode) {
1793 wlc_lcnphy_tx_pwr_update_npt(pi);
1795 wlc_lcnphy_clear_tx_power_offsets(pi);
1797 if (LCNPHY_TX_PWR_CTRL_HW == mode) {
1799 wlc_lcnphy_txpower_recalc_target(pi);
1801 wlc_lcnphy_set_start_tx_pwr_idx(pi,
1804 wlc_lcnphy_set_tx_pwr_npt(pi, pi_lcn->lcnphy_tssi_npt);
1805 mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, 0);
1807 pi_lcn->lcnphy_tssi_tx_cnt =
1808 wlc_lcnphy_total_tx_frames(pi);
1810 wlc_lcnphy_disable_tx_gain_override(pi);
1811 pi_lcn->lcnphy_tx_power_idx_override = -1;
1813 wlc_lcnphy_enable_tx_gain_override(pi);
1815 mod_phy_reg(pi, 0x4a4,
1816 ((0x1 << 15) | (0x1 << 14) | (0x1 << 13)), mode);
1817 if (mode == LCNPHY_TX_PWR_CTRL_TEMPBASED) {
1818 index = wlc_lcnphy_tempcompensated_txpwrctrl(pi);
1819 wlc_lcnphy_set_tx_pwr_soft_ctrl(pi, index);
1820 pi_lcn->lcnphy_current_index = (s8)
1821 ((read_phy_reg(pi, 0x4a9) & 0xFF) / 2);
1826 static bool wlc_lcnphy_iqcal_wait(phy_info_t *pi)
1828 uint delay_count = 0;
1830 while (wlc_lcnphy_iqcal_active(pi)) {
1834 if (delay_count > (10 * 500))
1838 return (0 == wlc_lcnphy_iqcal_active(pi));
1842 wlc_lcnphy_tx_iqlo_cal(phy_info_t *pi,
1843 lcnphy_txgains_t *target_gains,
1844 lcnphy_cal_mode_t cal_mode, bool keep_tone)
1847 lcnphy_txgains_t cal_gains, temp_gains;
1851 u16 ncorr_override[5];
1852 u16 syst_coeffs[] = { 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
1853 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
1856 u16 commands_fullcal[] = {
1857 0x8434, 0x8334, 0x8084, 0x8267, 0x8056, 0x8234 };
1859 u16 commands_recal[] = {
1860 0x8434, 0x8334, 0x8084, 0x8267, 0x8056, 0x8234 };
1862 u16 command_nums_fullcal[] = {
1863 0x7a97, 0x7a97, 0x7a97, 0x7a87, 0x7a87, 0x7b97 };
1865 u16 command_nums_recal[] = {
1866 0x7a97, 0x7a97, 0x7a97, 0x7a87, 0x7a87, 0x7b97 };
1867 u16 *command_nums = command_nums_fullcal;
1869 u16 *start_coeffs = NULL, *cal_cmds = NULL, cal_type, diq_start;
1870 u16 tx_pwr_ctrl_old, save_txpwrctrlrfctrl2;
1871 u16 save_sslpnCalibClkEnCtrl, save_sslpnRxFeClkEnCtrl;
1872 bool tx_gain_override_old;
1873 lcnphy_txgains_t old_gains;
1874 uint i, n_cal_cmds = 0, n_cal_start = 0;
1875 u16 *values_to_save;
1876 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
1878 if (NORADIO_ENAB(pi->pubpi))
1881 values_to_save = kmalloc(sizeof(u16) * 20, GFP_ATOMIC);
1882 if (NULL == values_to_save) {
1886 save_sslpnRxFeClkEnCtrl = read_phy_reg(pi, 0x6db);
1887 save_sslpnCalibClkEnCtrl = read_phy_reg(pi, 0x6da);
1889 or_phy_reg(pi, 0x6da, 0x40);
1890 or_phy_reg(pi, 0x6db, 0x3);
1893 case LCNPHY_CAL_FULL:
1894 start_coeffs = syst_coeffs;
1895 cal_cmds = commands_fullcal;
1896 n_cal_cmds = ARRAY_SIZE(commands_fullcal);
1899 case LCNPHY_CAL_RECAL:
1900 start_coeffs = syst_coeffs;
1901 cal_cmds = commands_recal;
1902 n_cal_cmds = ARRAY_SIZE(commands_recal);
1903 command_nums = command_nums_recal;
1910 wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
1911 start_coeffs, 11, 16, 64);
1913 write_phy_reg(pi, 0x6da, 0xffff);
1914 mod_phy_reg(pi, 0x503, (0x1 << 3), (1) << 3);
1916 tx_pwr_ctrl_old = wlc_lcnphy_get_tx_pwr_ctrl(pi);
1918 mod_phy_reg(pi, 0x4a4, (0x1 << 12), (1) << 12);
1920 wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);
1922 save_txpwrctrlrfctrl2 = read_phy_reg(pi, 0x4db);
1924 mod_phy_reg(pi, 0x4db, (0x3ff << 0), (0x2a6) << 0);
1926 mod_phy_reg(pi, 0x4db, (0x7 << 12), (2) << 12);
1928 wlc_lcnphy_tx_iqlo_loopback(pi, values_to_save);
1930 tx_gain_override_old = wlc_lcnphy_tx_gain_override_enabled(pi);
1931 if (tx_gain_override_old)
1932 wlc_lcnphy_get_tx_gain(pi, &old_gains);
1934 if (!target_gains) {
1935 if (!tx_gain_override_old)
1936 wlc_lcnphy_set_tx_pwr_by_index(pi,
1937 pi_lcn->lcnphy_tssi_idx);
1938 wlc_lcnphy_get_tx_gain(pi, &temp_gains);
1939 target_gains = &temp_gains;
1942 hash = (target_gains->gm_gain << 8) |
1943 (target_gains->pga_gain << 4) | (target_gains->pad_gain);
1945 band_idx = (CHSPEC_IS5G(pi->radio_chanspec) ? 1 : 0);
1947 cal_gains = *target_gains;
1948 memset(ncorr_override, 0, sizeof(ncorr_override));
1949 for (j = 0; j < iqcal_gainparams_numgains_lcnphy[band_idx]; j++) {
1950 if (hash == tbl_iqcal_gainparams_lcnphy[band_idx][j][0]) {
1952 tbl_iqcal_gainparams_lcnphy[band_idx][j][1];
1953 cal_gains.pga_gain =
1954 tbl_iqcal_gainparams_lcnphy[band_idx][j][2];
1955 cal_gains.pad_gain =
1956 tbl_iqcal_gainparams_lcnphy[band_idx][j][3];
1957 memcpy(ncorr_override,
1958 &tbl_iqcal_gainparams_lcnphy[band_idx][j][3],
1959 sizeof(ncorr_override));
1964 wlc_lcnphy_set_tx_gain(pi, &cal_gains);
1966 write_phy_reg(pi, 0x453, 0xaa9);
1967 write_phy_reg(pi, 0x93d, 0xc0);
1969 wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
1971 lcnphy_iqcal_loft_gainladder,
1972 ARRAY_SIZE(lcnphy_iqcal_loft_gainladder),
1975 wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
1976 (const void *)lcnphy_iqcal_ir_gainladder,
1977 ARRAY_SIZE(lcnphy_iqcal_ir_gainladder), 16,
1980 if (pi->phy_tx_tone_freq) {
1982 wlc_lcnphy_stop_tx_tone(pi);
1984 wlc_lcnphy_start_tx_tone(pi, 3750, 88, 1);
1986 wlc_lcnphy_start_tx_tone(pi, 3750, 88, 1);
1989 write_phy_reg(pi, 0x6da, 0xffff);
1991 for (i = n_cal_start; i < n_cal_cmds; i++) {
1993 u16 best_coeffs[11];
1996 cal_type = (cal_cmds[i] & 0x0f00) >> 8;
1998 command_num = command_nums[i];
1999 if (ncorr_override[cal_type])
2001 ncorr_override[cal_type] << 8 | (command_num &
2004 write_phy_reg(pi, 0x452, command_num);
2006 if ((cal_type == 3) || (cal_type == 4)) {
2008 wlc_lcnphy_common_read_table(pi, LCNPHY_TBL_ID_IQLOCAL,
2009 &diq_start, 1, 16, 69);
2011 wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
2012 &zero_diq, 1, 16, 69);
2015 write_phy_reg(pi, 0x451, cal_cmds[i]);
2017 if (!wlc_lcnphy_iqcal_wait(pi)) {
2022 wlc_lcnphy_common_read_table(pi, LCNPHY_TBL_ID_IQLOCAL,
2024 ARRAY_SIZE(best_coeffs), 16, 96);
2025 wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
2027 ARRAY_SIZE(best_coeffs), 16, 64);
2029 if ((cal_type == 3) || (cal_type == 4)) {
2030 wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
2031 &diq_start, 1, 16, 69);
2033 wlc_lcnphy_common_read_table(pi, LCNPHY_TBL_ID_IQLOCAL,
2034 pi_lcn->lcnphy_cal_results.
2035 txiqlocal_bestcoeffs,
2038 txiqlocal_bestcoeffs),
2042 wlc_lcnphy_common_read_table(pi, LCNPHY_TBL_ID_IQLOCAL,
2043 pi_lcn->lcnphy_cal_results.
2044 txiqlocal_bestcoeffs,
2045 ARRAY_SIZE(pi_lcn->lcnphy_cal_results.
2046 txiqlocal_bestcoeffs), 16, 96);
2047 pi_lcn->lcnphy_cal_results.txiqlocal_bestcoeffs_valid = true;
2049 wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
2050 &pi_lcn->lcnphy_cal_results.
2051 txiqlocal_bestcoeffs[0], 4, 16, 80);
2053 wlc_lcnphy_common_write_table(pi, LCNPHY_TBL_ID_IQLOCAL,
2054 &pi_lcn->lcnphy_cal_results.
2055 txiqlocal_bestcoeffs[5], 2, 16, 85);
2058 wlc_lcnphy_tx_iqlo_loopback_cleanup(pi, values_to_save);
2059 kfree(values_to_save);
2062 wlc_lcnphy_stop_tx_tone(pi);
2064 write_phy_reg(pi, 0x4db, save_txpwrctrlrfctrl2);
2066 write_phy_reg(pi, 0x453, 0);
2068 if (tx_gain_override_old)
2069 wlc_lcnphy_set_tx_gain(pi, &old_gains);
2070 wlc_lcnphy_set_tx_pwr_ctrl(pi, tx_pwr_ctrl_old);
2072 write_phy_reg(pi, 0x6da, save_sslpnCalibClkEnCtrl);
2073 write_phy_reg(pi, 0x6db, save_sslpnRxFeClkEnCtrl);
2077 static void wlc_lcnphy_idle_tssi_est(wlc_phy_t *ppi)
2079 bool suspend, tx_gain_override_old;
2080 lcnphy_txgains_t old_gains;
2081 phy_info_t *pi = (phy_info_t *) ppi;
2082 u16 idleTssi, idleTssi0_2C, idleTssi0_OB, idleTssi0_regvalue_OB,
2083 idleTssi0_regvalue_2C;
2084 u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);
2085 u16 SAVE_lpfgain = read_radio_reg(pi, RADIO_2064_REG112);
2086 u16 SAVE_jtag_bb_afe_switch =
2087 read_radio_reg(pi, RADIO_2064_REG007) & 1;
2088 u16 SAVE_jtag_auxpga = read_radio_reg(pi, RADIO_2064_REG0FF) & 0x10;
2089 u16 SAVE_iqadc_aux_en = read_radio_reg(pi, RADIO_2064_REG11F) & 4;
2090 idleTssi = read_phy_reg(pi, 0x4ab);
2093 (R_REG(&((phy_info_t *) pi)->regs->maccontrol) &
2096 wlapi_suspend_mac_and_wait(pi->sh->physhim);
2097 wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);
2099 tx_gain_override_old = wlc_lcnphy_tx_gain_override_enabled(pi);
2100 wlc_lcnphy_get_tx_gain(pi, &old_gains);
2102 wlc_lcnphy_enable_tx_gain_override(pi);
2103 wlc_lcnphy_set_tx_pwr_by_index(pi, 127);
2104 write_radio_reg(pi, RADIO_2064_REG112, 0x6);
2105 mod_radio_reg(pi, RADIO_2064_REG007, 0x1, 1);
2106 mod_radio_reg(pi, RADIO_2064_REG0FF, 0x10, 1 << 4);
2107 mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, 1 << 2);
2108 wlc_lcnphy_tssi_setup(pi);
2109 wlc_phy_do_dummy_tx(pi, true, OFF);
2110 idleTssi = ((read_phy_reg(pi, 0x4ab) & (0x1ff << 0))
2113 idleTssi0_2C = ((read_phy_reg(pi, 0x63e) & (0x1ff << 0))
2116 if (idleTssi0_2C >= 256)
2117 idleTssi0_OB = idleTssi0_2C - 256;
2119 idleTssi0_OB = idleTssi0_2C + 256;
2121 idleTssi0_regvalue_OB = idleTssi0_OB;
2122 if (idleTssi0_regvalue_OB >= 256)
2123 idleTssi0_regvalue_2C = idleTssi0_regvalue_OB - 256;
2125 idleTssi0_regvalue_2C = idleTssi0_regvalue_OB + 256;
2126 mod_phy_reg(pi, 0x4a6, (0x1ff << 0), (idleTssi0_regvalue_2C) << 0);
2128 mod_phy_reg(pi, 0x44c, (0x1 << 12), (0) << 12);
2130 wlc_lcnphy_set_tx_gain_override(pi, tx_gain_override_old);
2131 wlc_lcnphy_set_tx_gain(pi, &old_gains);
2132 wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_txpwrctrl);
2134 write_radio_reg(pi, RADIO_2064_REG112, SAVE_lpfgain);
2135 mod_radio_reg(pi, RADIO_2064_REG007, 0x1, SAVE_jtag_bb_afe_switch);
2136 mod_radio_reg(pi, RADIO_2064_REG0FF, 0x10, SAVE_jtag_auxpga);
2137 mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, SAVE_iqadc_aux_en);
2138 mod_radio_reg(pi, RADIO_2064_REG112, 0x80, 1 << 7);
2140 wlapi_enable_mac(pi->sh->physhim);
2143 static void wlc_lcnphy_vbat_temp_sense_setup(phy_info_t *pi, u8 mode)
2146 u16 save_txpwrCtrlEn;
2147 u8 auxpga_vmidcourse, auxpga_vmidfine, auxpga_gain;
2151 u8 save_reg007, save_reg0FF, save_reg11F, save_reg005, save_reg025,
2153 u16 values_to_save[14];
2156 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
2159 save_reg007 = (u8) read_radio_reg(pi, RADIO_2064_REG007);
2160 save_reg0FF = (u8) read_radio_reg(pi, RADIO_2064_REG0FF);
2161 save_reg11F = (u8) read_radio_reg(pi, RADIO_2064_REG11F);
2162 save_reg005 = (u8) read_radio_reg(pi, RADIO_2064_REG005);
2163 save_reg025 = (u8) read_radio_reg(pi, RADIO_2064_REG025);
2164 save_reg112 = (u8) read_radio_reg(pi, RADIO_2064_REG112);
2166 for (i = 0; i < 14; i++)
2167 values_to_save[i] = read_phy_reg(pi, tempsense_phy_regs[i]);
2169 (0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
2171 wlapi_suspend_mac_and_wait(pi->sh->physhim);
2172 save_txpwrCtrlEn = read_radio_reg(pi, 0x4a4);
2174 wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);
2175 index = pi_lcn->lcnphy_current_index;
2176 wlc_lcnphy_set_tx_pwr_by_index(pi, 127);
2177 mod_radio_reg(pi, RADIO_2064_REG007, 0x1, 0x1);
2178 mod_radio_reg(pi, RADIO_2064_REG0FF, 0x10, 0x1 << 4);
2179 mod_radio_reg(pi, RADIO_2064_REG11F, 0x4, 0x1 << 2);
2180 mod_phy_reg(pi, 0x503, (0x1 << 0), (0) << 0);
2182 mod_phy_reg(pi, 0x503, (0x1 << 2), (0) << 2);
2184 mod_phy_reg(pi, 0x4a4, (0x1 << 14), (0) << 14);
2186 mod_phy_reg(pi, 0x4a4, (0x1 << 15), (0) << 15);
2188 mod_phy_reg(pi, 0x4d0, (0x1 << 5), (0) << 5);
2190 mod_phy_reg(pi, 0x4a5, (0xff << 0), (255) << 0);
2192 mod_phy_reg(pi, 0x4a5, (0x7 << 12), (5) << 12);
2194 mod_phy_reg(pi, 0x4a5, (0x7 << 8), (0) << 8);
2196 mod_phy_reg(pi, 0x40d, (0xff << 0), (64) << 0);
2198 mod_phy_reg(pi, 0x40d, (0x7 << 8), (6) << 8);
2200 mod_phy_reg(pi, 0x4a2, (0xff << 0), (64) << 0);
2202 mod_phy_reg(pi, 0x4a2, (0x7 << 8), (6) << 8);
2204 mod_phy_reg(pi, 0x4d9, (0x7 << 4), (2) << 4);
2206 mod_phy_reg(pi, 0x4d9, (0x7 << 8), (3) << 8);
2208 mod_phy_reg(pi, 0x4d9, (0x7 << 12), (1) << 12);
2210 mod_phy_reg(pi, 0x4da, (0x1 << 12), (0) << 12);
2212 mod_phy_reg(pi, 0x4da, (0x1 << 13), (1) << 13);
2214 mod_phy_reg(pi, 0x4a6, (0x1 << 15), (1) << 15);
2216 write_radio_reg(pi, RADIO_2064_REG025, 0xC);
2218 mod_radio_reg(pi, RADIO_2064_REG005, 0x8, 0x1 << 3);
2220 mod_phy_reg(pi, 0x938, (0x1 << 2), (1) << 2);
2222 mod_phy_reg(pi, 0x939, (0x1 << 2), (1) << 2);
2224 mod_phy_reg(pi, 0x4a4, (0x1 << 12), (1) << 12);
2226 val = wlc_lcnphy_rfseq_tbl_adc_pwrup(pi);
2227 tab.tbl_id = LCNPHY_TBL_ID_RFSEQ;
2232 wlc_lcnphy_write_table(pi, &tab);
2233 if (mode == TEMPSENSE) {
2234 mod_phy_reg(pi, 0x4d7, (0x1 << 3), (1) << 3);
2236 mod_phy_reg(pi, 0x4d7, (0x7 << 12), (1) << 12);
2238 auxpga_vmidcourse = 8;
2239 auxpga_vmidfine = 0x4;
2241 mod_radio_reg(pi, RADIO_2064_REG082, 0x20, 1 << 5);
2243 mod_phy_reg(pi, 0x4d7, (0x1 << 3), (1) << 3);
2245 mod_phy_reg(pi, 0x4d7, (0x7 << 12), (3) << 12);
2247 auxpga_vmidcourse = 7;
2248 auxpga_vmidfine = 0xa;
2252 (u16) ((2 << 8) | (auxpga_vmidcourse << 4) | auxpga_vmidfine);
2253 mod_phy_reg(pi, 0x4d8, (0x1 << 0), (1) << 0);
2255 mod_phy_reg(pi, 0x4d8, (0x3ff << 2), (auxpga_vmid) << 2);
2257 mod_phy_reg(pi, 0x4d8, (0x1 << 1), (1) << 1);
2259 mod_phy_reg(pi, 0x4d8, (0x7 << 12), (auxpga_gain) << 12);
2261 mod_phy_reg(pi, 0x4d0, (0x1 << 5), (1) << 5);
2263 write_radio_reg(pi, RADIO_2064_REG112, 0x6);
2265 wlc_phy_do_dummy_tx(pi, true, OFF);
2266 if (!tempsense_done(pi))
2269 write_radio_reg(pi, RADIO_2064_REG007, (u16) save_reg007);
2270 write_radio_reg(pi, RADIO_2064_REG0FF, (u16) save_reg0FF);
2271 write_radio_reg(pi, RADIO_2064_REG11F, (u16) save_reg11F);
2272 write_radio_reg(pi, RADIO_2064_REG005, (u16) save_reg005);
2273 write_radio_reg(pi, RADIO_2064_REG025, (u16) save_reg025);
2274 write_radio_reg(pi, RADIO_2064_REG112, (u16) save_reg112);
2275 for (i = 0; i < 14; i++)
2276 write_phy_reg(pi, tempsense_phy_regs[i], values_to_save[i]);
2277 wlc_lcnphy_set_tx_pwr_by_index(pi, (int)index);
2279 write_radio_reg(pi, 0x4a4, save_txpwrCtrlEn);
2281 wlapi_enable_mac(pi->sh->physhim);
2285 void WLBANDINITFN(wlc_lcnphy_tx_pwr_ctrl_init) (wlc_phy_t *ppi)
2287 lcnphy_txgains_t tx_gains;
2291 s32 tssi, pwr, maxtargetpwr, mintargetpwr;
2293 phy_info_t *pi = (phy_info_t *) ppi;
2296 (0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
2298 wlapi_suspend_mac_and_wait(pi->sh->physhim);
2300 if (NORADIO_ENAB(pi->pubpi)) {
2301 wlc_lcnphy_set_bbmult(pi, 0x30);
2303 wlapi_enable_mac(pi->sh->physhim);
2307 if (!pi->hwpwrctrl_capable) {
2308 if (CHSPEC_IS2G(pi->radio_chanspec)) {
2309 tx_gains.gm_gain = 4;
2310 tx_gains.pga_gain = 12;
2311 tx_gains.pad_gain = 12;
2312 tx_gains.dac_gain = 0;
2316 tx_gains.gm_gain = 7;
2317 tx_gains.pga_gain = 15;
2318 tx_gains.pad_gain = 14;
2319 tx_gains.dac_gain = 0;
2323 wlc_lcnphy_set_tx_gain(pi, &tx_gains);
2324 wlc_lcnphy_set_bbmult(pi, bbmult);
2325 wlc_lcnphy_vbat_temp_sense_setup(pi, TEMPSENSE);
2328 wlc_lcnphy_idle_tssi_est(ppi);
2330 wlc_lcnphy_clear_tx_power_offsets(pi);
2332 b0 = pi->txpa_2g[0];
2333 b1 = pi->txpa_2g[1];
2334 a1 = pi->txpa_2g[2];
2335 maxtargetpwr = wlc_lcnphy_tssi2dbm(10, a1, b0, b1);
2336 mintargetpwr = wlc_lcnphy_tssi2dbm(125, a1, b0, b1);
2338 tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
2343 for (tssi = 0; tssi < 128; tssi++) {
2344 pwr = wlc_lcnphy_tssi2dbm(tssi, a1, b0, b1);
2346 pwr = (pwr < mintargetpwr) ? mintargetpwr : pwr;
2347 wlc_lcnphy_write_table(pi, &tab);
2351 mod_phy_reg(pi, 0x410, (0x1 << 7), (0) << 7);
2353 write_phy_reg(pi, 0x4a8, 10);
2355 wlc_lcnphy_set_target_tx_pwr(pi, LCN_TARGET_PWR);
2357 wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_HW);
2360 wlapi_enable_mac(pi->sh->physhim);
2363 static u8 wlc_lcnphy_get_bbmult(phy_info_t *pi)
2368 tab.tbl_ptr = &m0m1;
2370 tab.tbl_id = LCNPHY_TBL_ID_IQLOCAL;
2371 tab.tbl_offset = 87;
2373 wlc_lcnphy_read_table(pi, &tab);
2375 return (u8) ((m0m1 & 0xff00) >> 8);
2378 static void wlc_lcnphy_set_pa_gain(phy_info_t *pi, u16 gain)
2380 mod_phy_reg(pi, 0x4fb,
2381 LCNPHY_txgainctrlovrval1_pagain_ovr_val1_MASK,
2382 gain << LCNPHY_txgainctrlovrval1_pagain_ovr_val1_SHIFT);
2383 mod_phy_reg(pi, 0x4fd,
2384 LCNPHY_stxtxgainctrlovrval1_pagain_ovr_val1_MASK,
2385 gain << LCNPHY_stxtxgainctrlovrval1_pagain_ovr_val1_SHIFT);
2389 wlc_lcnphy_get_radio_loft(phy_info_t *pi,
2390 u8 *ei0, u8 *eq0, u8 *fi0, u8 *fq0)
2392 *ei0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG089));
2393 *eq0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG08A));
2394 *fi0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG08B));
2395 *fq0 = LCNPHY_IQLOCC_READ(read_radio_reg(pi, RADIO_2064_REG08C));
2398 static void wlc_lcnphy_get_tx_gain(phy_info_t *pi, lcnphy_txgains_t *gains)
2402 dac_gain = read_phy_reg(pi, 0x439) >> 0;
2403 gains->dac_gain = (dac_gain & 0x380) >> 7;
2406 u16 rfgain0, rfgain1;
2408 rfgain0 = (read_phy_reg(pi, 0x4b5) & (0xffff << 0)) >> 0;
2409 rfgain1 = (read_phy_reg(pi, 0x4fb) & (0x7fff << 0)) >> 0;
2411 gains->gm_gain = rfgain0 & 0xff;
2412 gains->pga_gain = (rfgain0 >> 8) & 0xff;
2413 gains->pad_gain = rfgain1 & 0xff;
2417 void wlc_lcnphy_set_tx_iqcc(phy_info_t *pi, u16 a, u16 b)
2425 tab.tbl_id = LCNPHY_TBL_ID_IQLOCAL;
2429 tab.tbl_offset = 80;
2430 wlc_lcnphy_write_table(pi, &tab);
2433 void wlc_lcnphy_set_tx_locc(phy_info_t *pi, u16 didq)
2437 tab.tbl_id = LCNPHY_TBL_ID_IQLOCAL;
2439 tab.tbl_ptr = &didq;
2441 tab.tbl_offset = 85;
2442 wlc_lcnphy_write_table(pi, &tab);
2445 void wlc_lcnphy_set_tx_pwr_by_index(phy_info_t *pi, int index)
2450 u32 bbmultiqcomp, txgain, locoeffs, rfpower;
2451 lcnphy_txgains_t gains;
2452 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
2454 pi_lcn->lcnphy_tx_power_idx_override = (s8) index;
2455 pi_lcn->lcnphy_current_index = (u8) index;
2457 tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
2461 wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);
2463 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_IQ_OFFSET + index;
2464 tab.tbl_ptr = &bbmultiqcomp;
2465 wlc_lcnphy_read_table(pi, &tab);
2467 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_GAIN_OFFSET + index;
2469 tab.tbl_ptr = &txgain;
2470 wlc_lcnphy_read_table(pi, &tab);
2472 gains.gm_gain = (u16) (txgain & 0xff);
2473 gains.pga_gain = (u16) (txgain >> 8) & 0xff;
2474 gains.pad_gain = (u16) (txgain >> 16) & 0xff;
2475 gains.dac_gain = (u16) (bbmultiqcomp >> 28) & 0x07;
2476 wlc_lcnphy_set_tx_gain(pi, &gains);
2477 wlc_lcnphy_set_pa_gain(pi, (u16) (txgain >> 24) & 0x7f);
2479 bb_mult = (u8) ((bbmultiqcomp >> 20) & 0xff);
2480 wlc_lcnphy_set_bbmult(pi, bb_mult);
2482 wlc_lcnphy_enable_tx_gain_override(pi);
2484 if (!wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) {
2486 a = (u16) ((bbmultiqcomp >> 10) & 0x3ff);
2487 b = (u16) (bbmultiqcomp & 0x3ff);
2488 wlc_lcnphy_set_tx_iqcc(pi, a, b);
2490 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_LO_OFFSET + index;
2491 tab.tbl_ptr = &locoeffs;
2492 wlc_lcnphy_read_table(pi, &tab);
2494 wlc_lcnphy_set_tx_locc(pi, (u16) locoeffs);
2496 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_PWR_OFFSET + index;
2497 tab.tbl_ptr = &rfpower;
2498 wlc_lcnphy_read_table(pi, &tab);
2499 mod_phy_reg(pi, 0x6a6, (0x1fff << 0), (rfpower * 8) << 0);
2504 static void wlc_lcnphy_set_trsw_override(phy_info_t *pi, bool tx, bool rx)
2507 mod_phy_reg(pi, 0x44d,
2509 (0x1 << 0), (tx ? (0x1 << 1) : 0) | (rx ? (0x1 << 0) : 0));
2511 or_phy_reg(pi, 0x44c, (0x1 << 1) | (0x1 << 0));
2514 static void wlc_lcnphy_clear_papd_comptable(phy_info_t *pi)
2518 u32 temp_offset[128];
2519 tab.tbl_ptr = temp_offset;
2521 tab.tbl_id = LCNPHY_TBL_ID_PAPDCOMPDELTATBL;
2525 memset(temp_offset, 0, sizeof(temp_offset));
2526 for (j = 1; j < 128; j += 2)
2527 temp_offset[j] = 0x80000;
2529 wlc_lcnphy_write_table(pi, &tab);
2534 wlc_lcnphy_set_rx_gain_by_distribution(phy_info_t *pi,
2539 u16 tia, u16 lna2, u16 lna1)
2541 u16 gain0_15, gain16_19;
2543 gain16_19 = biq2 & 0xf;
2544 gain0_15 = ((biq1 & 0xf) << 12) |
2545 ((tia & 0xf) << 8) |
2546 ((lna2 & 0x3) << 6) |
2547 ((lna2 & 0x3) << 4) | ((lna1 & 0x3) << 2) | ((lna1 & 0x3) << 0);
2549 mod_phy_reg(pi, 0x4b6, (0xffff << 0), gain0_15 << 0);
2550 mod_phy_reg(pi, 0x4b7, (0xf << 0), gain16_19 << 0);
2551 mod_phy_reg(pi, 0x4b1, (0x3 << 11), lna1 << 11);
2553 if (LCNREV_LT(pi->pubpi.phy_rev, 2)) {
2554 mod_phy_reg(pi, 0x4b1, (0x1 << 9), ext_lna << 9);
2555 mod_phy_reg(pi, 0x4b1, (0x1 << 10), ext_lna << 10);
2557 mod_phy_reg(pi, 0x4b1, (0x1 << 10), 0 << 10);
2559 mod_phy_reg(pi, 0x4b1, (0x1 << 15), 0 << 15);
2561 mod_phy_reg(pi, 0x4b1, (0x1 << 9), ext_lna << 9);
2564 mod_phy_reg(pi, 0x44d, (0x1 << 0), (!trsw) << 0);
2568 static void wlc_lcnphy_rx_gain_override_enable(phy_info_t *pi, bool enable)
2570 u16 ebit = enable ? 1 : 0;
2572 mod_phy_reg(pi, 0x4b0, (0x1 << 8), ebit << 8);
2574 mod_phy_reg(pi, 0x44c, (0x1 << 0), ebit << 0);
2576 if (LCNREV_LT(pi->pubpi.phy_rev, 2)) {
2577 mod_phy_reg(pi, 0x44c, (0x1 << 4), ebit << 4);
2578 mod_phy_reg(pi, 0x44c, (0x1 << 6), ebit << 6);
2579 mod_phy_reg(pi, 0x4b0, (0x1 << 5), ebit << 5);
2580 mod_phy_reg(pi, 0x4b0, (0x1 << 6), ebit << 6);
2582 mod_phy_reg(pi, 0x4b0, (0x1 << 12), ebit << 12);
2583 mod_phy_reg(pi, 0x4b0, (0x1 << 13), ebit << 13);
2584 mod_phy_reg(pi, 0x4b0, (0x1 << 5), ebit << 5);
2587 if (CHSPEC_IS2G(pi->radio_chanspec)) {
2588 mod_phy_reg(pi, 0x4b0, (0x1 << 10), ebit << 10);
2589 mod_phy_reg(pi, 0x4e5, (0x1 << 3), ebit << 3);
2593 void wlc_lcnphy_tx_pu(phy_info_t *pi, bool bEnable)
2597 and_phy_reg(pi, 0x43b, ~(u16) ((0x1 << 1) | (0x1 << 4)));
2599 mod_phy_reg(pi, 0x43c, (0x1 << 1), 1 << 1);
2601 and_phy_reg(pi, 0x44c,
2602 ~(u16) ((0x1 << 3) |
2605 (0x1 << 0) | (0x1 << 1) | (0x1 << 2)));
2607 and_phy_reg(pi, 0x44d,
2608 ~(u16) ((0x1 << 3) | (0x1 << 5) | (0x1 << 14)));
2609 mod_phy_reg(pi, 0x44d, (0x1 << 2), 1 << 2);
2611 mod_phy_reg(pi, 0x44d, (0x1 << 1) | (0x1 << 0), (0x1 << 0));
2613 and_phy_reg(pi, 0x4f9,
2614 ~(u16) ((0x1 << 0) | (0x1 << 1) | (0x1 << 2)));
2616 and_phy_reg(pi, 0x4fa,
2617 ~(u16) ((0x1 << 0) | (0x1 << 1) | (0x1 << 2)));
2620 mod_phy_reg(pi, 0x43b, (0x1 << 1), 1 << 1);
2621 mod_phy_reg(pi, 0x43c, (0x1 << 1), 0 << 1);
2623 mod_phy_reg(pi, 0x43b, (0x1 << 4), 1 << 4);
2624 mod_phy_reg(pi, 0x43c, (0x1 << 6), 0 << 6);
2626 mod_phy_reg(pi, 0x44c, (0x1 << 12), 1 << 12);
2627 mod_phy_reg(pi, 0x44d, (0x1 << 14), 1 << 14);
2629 wlc_lcnphy_set_trsw_override(pi, true, false);
2631 mod_phy_reg(pi, 0x44d, (0x1 << 2), 0 << 2);
2632 mod_phy_reg(pi, 0x44c, (0x1 << 2), 1 << 2);
2634 if (CHSPEC_IS2G(pi->radio_chanspec)) {
2636 mod_phy_reg(pi, 0x44c, (0x1 << 3), 1 << 3);
2637 mod_phy_reg(pi, 0x44d, (0x1 << 3), 1 << 3);
2639 mod_phy_reg(pi, 0x44c, (0x1 << 5), 1 << 5);
2640 mod_phy_reg(pi, 0x44d, (0x1 << 5), 0 << 5);
2642 mod_phy_reg(pi, 0x4f9, (0x1 << 1), 1 << 1);
2643 mod_phy_reg(pi, 0x4fa, (0x1 << 1), 1 << 1);
2645 mod_phy_reg(pi, 0x4f9, (0x1 << 2), 1 << 2);
2646 mod_phy_reg(pi, 0x4fa, (0x1 << 2), 1 << 2);
2648 mod_phy_reg(pi, 0x4f9, (0x1 << 0), 1 << 0);
2649 mod_phy_reg(pi, 0x4fa, (0x1 << 0), 1 << 0);
2652 mod_phy_reg(pi, 0x44c, (0x1 << 3), 1 << 3);
2653 mod_phy_reg(pi, 0x44d, (0x1 << 3), 0 << 3);
2655 mod_phy_reg(pi, 0x44c, (0x1 << 5), 1 << 5);
2656 mod_phy_reg(pi, 0x44d, (0x1 << 5), 1 << 5);
2658 mod_phy_reg(pi, 0x4f9, (0x1 << 1), 1 << 1);
2659 mod_phy_reg(pi, 0x4fa, (0x1 << 1), 0 << 1);
2661 mod_phy_reg(pi, 0x4f9, (0x1 << 2), 1 << 2);
2662 mod_phy_reg(pi, 0x4fa, (0x1 << 2), 0 << 2);
2664 mod_phy_reg(pi, 0x4f9, (0x1 << 0), 1 << 0);
2665 mod_phy_reg(pi, 0x4fa, (0x1 << 0), 0 << 0);
2671 wlc_lcnphy_run_samples(phy_info_t *pi,
2673 u16 num_loops, u16 wait, bool iqcalmode)
2676 or_phy_reg(pi, 0x6da, 0x8080);
2678 mod_phy_reg(pi, 0x642, (0x7f << 0), (num_samps - 1) << 0);
2679 if (num_loops != 0xffff)
2681 mod_phy_reg(pi, 0x640, (0xffff << 0), num_loops << 0);
2683 mod_phy_reg(pi, 0x641, (0xffff << 0), wait << 0);
2687 and_phy_reg(pi, 0x453, (u16) ~(0x1 << 15));
2688 or_phy_reg(pi, 0x453, (0x1 << 15));
2690 write_phy_reg(pi, 0x63f, 1);
2691 wlc_lcnphy_tx_pu(pi, 1);
2694 or_radio_reg(pi, RADIO_2064_REG112, 0x6);
2697 void wlc_lcnphy_deaf_mode(phy_info_t *pi, bool mode)
2701 phybw40 = CHSPEC_IS40(pi->radio_chanspec);
2703 if (LCNREV_LT(pi->pubpi.phy_rev, 2)) {
2704 mod_phy_reg(pi, 0x4b0, (0x1 << 5), (mode) << 5);
2705 mod_phy_reg(pi, 0x4b1, (0x1 << 9), 0 << 9);
2707 mod_phy_reg(pi, 0x4b0, (0x1 << 5), (mode) << 5);
2708 mod_phy_reg(pi, 0x4b1, (0x1 << 9), 0 << 9);
2712 mod_phy_reg((pi), 0x410,
2715 ((CHSPEC_IS2G(pi->radio_chanspec)) ? (!mode) : 0) <<
2717 mod_phy_reg(pi, 0x410, (0x1 << 7), (mode) << 7);
2722 wlc_lcnphy_start_tx_tone(phy_info_t *pi, s32 f_kHz, u16 max_val,
2726 u16 num_samps, t, k;
2728 fixed theta = 0, rot = 0;
2733 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
2735 pi->phy_tx_tone_freq = f_kHz;
2737 wlc_lcnphy_deaf_mode(pi, true);
2740 if (pi_lcn->lcnphy_spurmod) {
2741 write_phy_reg(pi, 0x942, 0x2);
2742 write_phy_reg(pi, 0x93b, 0x0);
2743 write_phy_reg(pi, 0x93c, 0x0);
2744 wlc_lcnphy_txrx_spur_avoidance_mode(pi, false);
2750 bw = phy_bw * 1000 * k;
2751 num_samps = bw / ABS(f_kHz);
2753 } while ((num_samps * (u32) (ABS(f_kHz))) != bw);
2757 rot = FIXED((f_kHz * 36) / phy_bw) / 100;
2760 for (t = 0; t < num_samps; t++) {
2762 wlc_phy_cordic(theta, &tone_samp);
2766 i_samp = (u16) (FLOAT(tone_samp.i * max_val) & 0x3ff);
2767 q_samp = (u16) (FLOAT(tone_samp.q * max_val) & 0x3ff);
2768 data_buf[t] = (i_samp << 10) | q_samp;
2771 mod_phy_reg(pi, 0x6d6, (0x3 << 0), 0 << 0);
2773 mod_phy_reg(pi, 0x6da, (0x1 << 3), 1 << 3);
2775 tab.tbl_ptr = data_buf;
2776 tab.tbl_len = num_samps;
2777 tab.tbl_id = LCNPHY_TBL_ID_SAMPLEPLAY;
2780 wlc_lcnphy_write_table(pi, &tab);
2782 wlc_lcnphy_run_samples(pi, num_samps, 0xffff, 0, iqcalmode);
2785 void wlc_lcnphy_stop_tx_tone(phy_info_t *pi)
2787 s16 playback_status;
2788 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
2790 pi->phy_tx_tone_freq = 0;
2791 if (pi_lcn->lcnphy_spurmod) {
2792 write_phy_reg(pi, 0x942, 0x7);
2793 write_phy_reg(pi, 0x93b, 0x2017);
2794 write_phy_reg(pi, 0x93c, 0x27c5);
2795 wlc_lcnphy_txrx_spur_avoidance_mode(pi, true);
2798 playback_status = read_phy_reg(pi, 0x644);
2799 if (playback_status & (0x1 << 0)) {
2800 wlc_lcnphy_tx_pu(pi, 0);
2801 mod_phy_reg(pi, 0x63f, (0x1 << 1), 1 << 1);
2802 } else if (playback_status & (0x1 << 1))
2803 mod_phy_reg(pi, 0x453, (0x1 << 15), 0 << 15);
2805 mod_phy_reg(pi, 0x6d6, (0x3 << 0), 1 << 0);
2807 mod_phy_reg(pi, 0x6da, (0x1 << 3), 0 << 3);
2809 mod_phy_reg(pi, 0x6da, (0x1 << 7), 0 << 7);
2811 and_radio_reg(pi, RADIO_2064_REG112, 0xFFF9);
2813 wlc_lcnphy_deaf_mode(pi, false);
2816 static void wlc_lcnphy_clear_trsw_override(phy_info_t *pi)
2819 and_phy_reg(pi, 0x44c, (u16) ~((0x1 << 1) | (0x1 << 0)));
2822 void wlc_lcnphy_get_tx_iqcc(phy_info_t *pi, u16 *a, u16 *b)
2830 tab.tbl_offset = 80;
2832 wlc_lcnphy_read_table(pi, &tab);
2838 u16 wlc_lcnphy_get_tx_locc(phy_info_t *pi)
2845 tab.tbl_ptr = &didq;
2847 tab.tbl_offset = 85;
2848 wlc_lcnphy_read_table(pi, &tab);
2853 static void wlc_lcnphy_txpwrtbl_iqlo_cal(phy_info_t *pi)
2856 lcnphy_txgains_t target_gains, old_gains;
2858 u16 a, b, didq, save_pa_gain = 0;
2859 uint idx, SAVE_txpwrindex = 0xFF;
2861 u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);
2863 u8 ei0, eq0, fi0, fq0;
2864 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
2866 wlc_lcnphy_get_tx_gain(pi, &old_gains);
2867 save_pa_gain = wlc_lcnphy_get_pa_gain(pi);
2869 save_bb_mult = wlc_lcnphy_get_bbmult(pi);
2871 if (SAVE_txpwrctrl == LCNPHY_TX_PWR_CTRL_OFF)
2872 SAVE_txpwrindex = wlc_lcnphy_get_current_tx_pwr_idx(pi);
2874 wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);
2876 target_gains.gm_gain = 7;
2877 target_gains.pga_gain = 0;
2878 target_gains.pad_gain = 21;
2879 target_gains.dac_gain = 0;
2880 wlc_lcnphy_set_tx_gain(pi, &target_gains);
2881 wlc_lcnphy_set_tx_pwr_by_index(pi, 16);
2883 if (LCNREV_IS(pi->pubpi.phy_rev, 1) || pi_lcn->lcnphy_hw_iqcal_en) {
2885 wlc_lcnphy_set_tx_pwr_by_index(pi, 30);
2887 wlc_lcnphy_tx_iqlo_cal(pi, &target_gains,
2889 lcnphy_recal ? LCNPHY_CAL_RECAL :
2890 LCNPHY_CAL_FULL), false);
2893 wlc_lcnphy_tx_iqlo_soft_cal_full(pi);
2896 wlc_lcnphy_get_radio_loft(pi, &ei0, &eq0, &fi0, &fq0);
2897 if ((ABS((s8) fi0) == 15) && (ABS((s8) fq0) == 15)) {
2898 if (CHSPEC_IS5G(pi->radio_chanspec)) {
2899 target_gains.gm_gain = 255;
2900 target_gains.pga_gain = 255;
2901 target_gains.pad_gain = 0xf0;
2902 target_gains.dac_gain = 0;
2904 target_gains.gm_gain = 7;
2905 target_gains.pga_gain = 45;
2906 target_gains.pad_gain = 186;
2907 target_gains.dac_gain = 0;
2910 if (LCNREV_IS(pi->pubpi.phy_rev, 1)
2911 || pi_lcn->lcnphy_hw_iqcal_en) {
2913 target_gains.pga_gain = 0;
2914 target_gains.pad_gain = 30;
2915 wlc_lcnphy_set_tx_pwr_by_index(pi, 16);
2916 wlc_lcnphy_tx_iqlo_cal(pi, &target_gains,
2917 LCNPHY_CAL_FULL, false);
2920 wlc_lcnphy_tx_iqlo_soft_cal_full(pi);
2925 wlc_lcnphy_get_tx_iqcc(pi, &a, &b);
2927 didq = wlc_lcnphy_get_tx_locc(pi);
2929 tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
2934 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_RATE_OFFSET;
2936 for (idx = 0; idx < 128; idx++) {
2937 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_IQ_OFFSET + idx;
2939 wlc_lcnphy_read_table(pi, &tab);
2940 val = (val & 0xfff00000) |
2941 ((u32) (a & 0x3FF) << 10) | (b & 0x3ff);
2942 wlc_lcnphy_write_table(pi, &tab);
2945 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_LO_OFFSET + idx;
2946 wlc_lcnphy_write_table(pi, &tab);
2949 pi_lcn->lcnphy_cal_results.txiqlocal_a = a;
2950 pi_lcn->lcnphy_cal_results.txiqlocal_b = b;
2951 pi_lcn->lcnphy_cal_results.txiqlocal_didq = didq;
2952 pi_lcn->lcnphy_cal_results.txiqlocal_ei0 = ei0;
2953 pi_lcn->lcnphy_cal_results.txiqlocal_eq0 = eq0;
2954 pi_lcn->lcnphy_cal_results.txiqlocal_fi0 = fi0;
2955 pi_lcn->lcnphy_cal_results.txiqlocal_fq0 = fq0;
2957 wlc_lcnphy_set_bbmult(pi, save_bb_mult);
2958 wlc_lcnphy_set_pa_gain(pi, save_pa_gain);
2959 wlc_lcnphy_set_tx_gain(pi, &old_gains);
2961 if (SAVE_txpwrctrl != LCNPHY_TX_PWR_CTRL_OFF)
2962 wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_txpwrctrl);
2964 wlc_lcnphy_set_tx_pwr_by_index(pi, SAVE_txpwrindex);
2967 s16 wlc_lcnphy_tempsense_new(phy_info_t *pi, bool mode)
2969 u16 tempsenseval1, tempsenseval2;
2973 if (NORADIO_ENAB(pi->pubpi))
2979 (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
2981 wlapi_suspend_mac_and_wait(pi->sh->physhim);
2982 wlc_lcnphy_vbat_temp_sense_setup(pi, TEMPSENSE);
2984 tempsenseval1 = read_phy_reg(pi, 0x476) & 0x1FF;
2985 tempsenseval2 = read_phy_reg(pi, 0x477) & 0x1FF;
2987 if (tempsenseval1 > 255)
2988 avg = (s16) (tempsenseval1 - 512);
2990 avg = (s16) tempsenseval1;
2992 if (tempsenseval2 > 255)
2993 avg += (s16) (tempsenseval2 - 512);
2995 avg += (s16) tempsenseval2;
3001 mod_phy_reg(pi, 0x448, (0x1 << 14), (1) << 14);
3004 mod_phy_reg(pi, 0x448, (0x1 << 14), (0) << 14);
3007 wlapi_enable_mac(pi->sh->physhim);
3012 u16 wlc_lcnphy_tempsense(phy_info_t *pi, bool mode)
3014 u16 tempsenseval1, tempsenseval2;
3017 u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);
3018 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
3020 if (NORADIO_ENAB(pi->pubpi))
3026 (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
3028 wlapi_suspend_mac_and_wait(pi->sh->physhim);
3029 wlc_lcnphy_vbat_temp_sense_setup(pi, TEMPSENSE);
3031 tempsenseval1 = read_phy_reg(pi, 0x476) & 0x1FF;
3032 tempsenseval2 = read_phy_reg(pi, 0x477) & 0x1FF;
3034 if (tempsenseval1 > 255)
3035 avg = (int)(tempsenseval1 - 512);
3037 avg = (int)tempsenseval1;
3039 if (pi_lcn->lcnphy_tempsense_option == 1 || pi->hwpwrctrl_capable) {
3040 if (tempsenseval2 > 255)
3041 avg = (int)(avg - tempsenseval2 + 512);
3043 avg = (int)(avg - tempsenseval2);
3045 if (tempsenseval2 > 255)
3046 avg = (int)(avg + tempsenseval2 - 512);
3048 avg = (int)(avg + tempsenseval2);
3054 if (pi_lcn->lcnphy_tempsense_option == 2)
3055 avg = tempsenseval1;
3058 wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_txpwrctrl);
3062 mod_phy_reg(pi, 0x448, (0x1 << 14), (1) << 14);
3065 mod_phy_reg(pi, 0x448, (0x1 << 14), (0) << 14);
3068 wlapi_enable_mac(pi->sh->physhim);
3073 s8 wlc_lcnphy_tempsense_degree(phy_info_t *pi, bool mode)
3075 s32 degree = wlc_lcnphy_tempsense_new(pi, mode);
3077 ((degree << 10) + LCN_TEMPSENSE_OFFSET + (LCN_TEMPSENSE_DEN >> 1))
3078 / LCN_TEMPSENSE_DEN;
3082 s8 wlc_lcnphy_vbatsense(phy_info_t *pi, bool mode)
3088 if (NORADIO_ENAB(pi->pubpi))
3094 (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
3096 wlapi_suspend_mac_and_wait(pi->sh->physhim);
3097 wlc_lcnphy_vbat_temp_sense_setup(pi, VBATSENSE);
3100 vbatsenseval = read_phy_reg(pi, 0x475) & 0x1FF;
3102 if (vbatsenseval > 255)
3103 avg = (s32) (vbatsenseval - 512);
3105 avg = (s32) vbatsenseval;
3108 (avg * LCN_VBAT_SCALE_NOM +
3109 (LCN_VBAT_SCALE_DEN >> 1)) / LCN_VBAT_SCALE_DEN;
3113 wlapi_enable_mac(pi->sh->physhim);
3118 static void wlc_lcnphy_afe_clk_init(phy_info_t *pi, u8 mode)
3121 phybw40 = CHSPEC_IS40(pi->radio_chanspec);
3123 mod_phy_reg(pi, 0x6d1, (0x1 << 7), (1) << 7);
3125 if (((mode == AFE_CLK_INIT_MODE_PAPD) && (phybw40 == 0)) ||
3126 (mode == AFE_CLK_INIT_MODE_TXRX2X))
3127 write_phy_reg(pi, 0x6d0, 0x7);
3129 wlc_lcnphy_toggle_afe_pwdn(pi);
3133 wlc_lcnphy_rx_iq_est(phy_info_t *pi,
3135 u8 wait_time, lcnphy_iq_est_t *iq_est)
3140 phybw40 = CHSPEC_IS40(pi->radio_chanspec);
3142 mod_phy_reg(pi, 0x6da, (0x1 << 5), (1) << 5);
3144 mod_phy_reg(pi, 0x410, (0x1 << 3), (0) << 3);
3146 mod_phy_reg(pi, 0x482, (0xffff << 0), (num_samps) << 0);
3148 mod_phy_reg(pi, 0x481, (0xff << 0), ((u16) wait_time) << 0);
3150 mod_phy_reg(pi, 0x481, (0x1 << 8), (0) << 8);
3152 mod_phy_reg(pi, 0x481, (0x1 << 9), (1) << 9);
3154 while (read_phy_reg(pi, 0x481) & (0x1 << 9)) {
3156 if (wait_count > (10 * 500)) {
3164 iq_est->iq_prod = ((u32) read_phy_reg(pi, 0x483) << 16) |
3165 (u32) read_phy_reg(pi, 0x484);
3166 iq_est->i_pwr = ((u32) read_phy_reg(pi, 0x485) << 16) |
3167 (u32) read_phy_reg(pi, 0x486);
3168 iq_est->q_pwr = ((u32) read_phy_reg(pi, 0x487) << 16) |
3169 (u32) read_phy_reg(pi, 0x488);
3172 mod_phy_reg(pi, 0x410, (0x1 << 3), (1) << 3);
3174 mod_phy_reg(pi, 0x6da, (0x1 << 5), (0) << 5);
3179 static bool wlc_lcnphy_calc_rx_iq_comp(phy_info_t *pi, u16 num_samps)
3181 #define LCNPHY_MIN_RXIQ_PWR 2
3184 lcnphy_iq_est_t iq_est = { 0, 0, 0 };
3186 s16 iq_nbits, qq_nbits, arsh, brsh;
3189 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
3191 a0_new = ((read_phy_reg(pi, 0x645) & (0x3ff << 0)) >> 0);
3192 b0_new = ((read_phy_reg(pi, 0x646) & (0x3ff << 0)) >> 0);
3193 mod_phy_reg(pi, 0x6d1, (0x1 << 2), (0) << 2);
3195 mod_phy_reg(pi, 0x64b, (0x1 << 6), (1) << 6);
3197 wlc_lcnphy_set_rx_iq_comp(pi, 0, 0);
3199 result = wlc_lcnphy_rx_iq_est(pi, num_samps, 32, &iq_est);
3203 iq = (s32) iq_est.iq_prod;
3207 if ((ii + qq) < LCNPHY_MIN_RXIQ_PWR) {
3212 iq_nbits = wlc_phy_nbits(iq);
3213 qq_nbits = wlc_phy_nbits(qq);
3215 arsh = 10 - (30 - iq_nbits);
3217 a = (-(iq << (30 - iq_nbits)) + (ii >> (1 + arsh)));
3218 temp = (s32) (ii >> arsh);
3223 a = (-(iq << (30 - iq_nbits)) + (ii << (-1 - arsh)));
3224 temp = (s32) (ii << -arsh);
3230 brsh = qq_nbits - 31 + 20;
3232 b = (qq << (31 - qq_nbits));
3233 temp = (s32) (ii >> brsh);
3238 b = (qq << (31 - qq_nbits));
3239 temp = (s32) (ii << -brsh);
3246 b = (s32) wlc_phy_sqrt_int((u32) b);
3248 a0_new = (u16) (a & 0x3ff);
3249 b0_new = (u16) (b & 0x3ff);
3252 wlc_lcnphy_set_rx_iq_comp(pi, a0_new, b0_new);
3254 mod_phy_reg(pi, 0x64b, (0x1 << 0), (1) << 0);
3256 mod_phy_reg(pi, 0x64b, (0x1 << 3), (1) << 3);
3258 pi_lcn->lcnphy_cal_results.rxiqcal_coeff_a0 = a0_new;
3259 pi_lcn->lcnphy_cal_results.rxiqcal_coeff_b0 = b0_new;
3265 wlc_lcnphy_rx_iq_cal(phy_info_t *pi, const lcnphy_rx_iqcomp_t *iqcomp,
3266 int iqcomp_sz, bool tx_switch, bool rx_switch, int module,
3269 lcnphy_txgains_t old_gains;
3271 u8 tx_gain_index_old = 0;
3272 bool result = false, tx_gain_override_old = false;
3273 u16 i, Core1TxControl_old, RFOverride0_old,
3274 RFOverrideVal0_old, rfoverride2_old, rfoverride2val_old,
3275 rfoverride3_old, rfoverride3val_old, rfoverride4_old,
3276 rfoverride4val_old, afectrlovr_old, afectrlovrval_old;
3278 u32 received_power, rx_pwr_threshold;
3279 u16 old_sslpnCalibClkEnCtrl, old_sslpnRxFeClkEnCtrl;
3280 u16 values_to_save[11];
3282 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
3284 ptr = kmalloc(sizeof(s16) * 131, GFP_ATOMIC);
3289 while (iqcomp_sz--) {
3290 if (iqcomp[iqcomp_sz].chan ==
3291 CHSPEC_CHANNEL(pi->radio_chanspec)) {
3293 wlc_lcnphy_set_rx_iq_comp(pi,
3295 iqcomp[iqcomp_sz].a,
3297 iqcomp[iqcomp_sz].b);
3307 tx_pwr_ctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);
3308 wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);
3310 for (i = 0; i < 11; i++) {
3312 read_radio_reg(pi, rxiq_cal_rf_reg[i]);
3314 Core1TxControl_old = read_phy_reg(pi, 0x631);
3316 or_phy_reg(pi, 0x631, 0x0015);
3318 RFOverride0_old = read_phy_reg(pi, 0x44c);
3319 RFOverrideVal0_old = read_phy_reg(pi, 0x44d);
3320 rfoverride2_old = read_phy_reg(pi, 0x4b0);
3321 rfoverride2val_old = read_phy_reg(pi, 0x4b1);
3322 rfoverride3_old = read_phy_reg(pi, 0x4f9);
3323 rfoverride3val_old = read_phy_reg(pi, 0x4fa);
3324 rfoverride4_old = read_phy_reg(pi, 0x938);
3325 rfoverride4val_old = read_phy_reg(pi, 0x939);
3326 afectrlovr_old = read_phy_reg(pi, 0x43b);
3327 afectrlovrval_old = read_phy_reg(pi, 0x43c);
3328 old_sslpnCalibClkEnCtrl = read_phy_reg(pi, 0x6da);
3329 old_sslpnRxFeClkEnCtrl = read_phy_reg(pi, 0x6db);
3331 tx_gain_override_old = wlc_lcnphy_tx_gain_override_enabled(pi);
3332 if (tx_gain_override_old) {
3333 wlc_lcnphy_get_tx_gain(pi, &old_gains);
3334 tx_gain_index_old = pi_lcn->lcnphy_current_index;
3337 wlc_lcnphy_set_tx_pwr_by_index(pi, tx_gain_idx);
3339 mod_phy_reg(pi, 0x4f9, (0x1 << 0), 1 << 0);
3340 mod_phy_reg(pi, 0x4fa, (0x1 << 0), 0 << 0);
3342 mod_phy_reg(pi, 0x43b, (0x1 << 1), 1 << 1);
3343 mod_phy_reg(pi, 0x43c, (0x1 << 1), 0 << 1);
3345 write_radio_reg(pi, RADIO_2064_REG116, 0x06);
3346 write_radio_reg(pi, RADIO_2064_REG12C, 0x07);
3347 write_radio_reg(pi, RADIO_2064_REG06A, 0xd3);
3348 write_radio_reg(pi, RADIO_2064_REG098, 0x03);
3349 write_radio_reg(pi, RADIO_2064_REG00B, 0x7);
3350 mod_radio_reg(pi, RADIO_2064_REG113, 1 << 4, 1 << 4);
3351 write_radio_reg(pi, RADIO_2064_REG01D, 0x01);
3352 write_radio_reg(pi, RADIO_2064_REG114, 0x01);
3353 write_radio_reg(pi, RADIO_2064_REG02E, 0x10);
3354 write_radio_reg(pi, RADIO_2064_REG12A, 0x08);
3356 mod_phy_reg(pi, 0x938, (0x1 << 0), 1 << 0);
3357 mod_phy_reg(pi, 0x939, (0x1 << 0), 0 << 0);
3358 mod_phy_reg(pi, 0x938, (0x1 << 1), 1 << 1);
3359 mod_phy_reg(pi, 0x939, (0x1 << 1), 1 << 1);
3360 mod_phy_reg(pi, 0x938, (0x1 << 2), 1 << 2);
3361 mod_phy_reg(pi, 0x939, (0x1 << 2), 1 << 2);
3362 mod_phy_reg(pi, 0x938, (0x1 << 3), 1 << 3);
3363 mod_phy_reg(pi, 0x939, (0x1 << 3), 1 << 3);
3364 mod_phy_reg(pi, 0x938, (0x1 << 5), 1 << 5);
3365 mod_phy_reg(pi, 0x939, (0x1 << 5), 0 << 5);
3367 mod_phy_reg(pi, 0x43b, (0x1 << 0), 1 << 0);
3368 mod_phy_reg(pi, 0x43c, (0x1 << 0), 0 << 0);
3370 wlc_lcnphy_start_tx_tone(pi, 2000, 120, 0);
3371 write_phy_reg(pi, 0x6da, 0xffff);
3372 or_phy_reg(pi, 0x6db, 0x3);
3373 wlc_lcnphy_set_trsw_override(pi, tx_switch, rx_switch);
3374 wlc_lcnphy_rx_gain_override_enable(pi, true);
3377 rx_pwr_threshold = 950;
3378 while (tia_gain > 0) {
3380 wlc_lcnphy_set_rx_gain_by_distribution(pi,
3387 wlc_lcnphy_measure_digital_power(pi, 2000);
3388 if (received_power < rx_pwr_threshold)
3391 result = wlc_lcnphy_calc_rx_iq_comp(pi, 0xffff);
3393 wlc_lcnphy_stop_tx_tone(pi);
3395 write_phy_reg(pi, 0x631, Core1TxControl_old);
3397 write_phy_reg(pi, 0x44c, RFOverrideVal0_old);
3398 write_phy_reg(pi, 0x44d, RFOverrideVal0_old);
3399 write_phy_reg(pi, 0x4b0, rfoverride2_old);
3400 write_phy_reg(pi, 0x4b1, rfoverride2val_old);
3401 write_phy_reg(pi, 0x4f9, rfoverride3_old);
3402 write_phy_reg(pi, 0x4fa, rfoverride3val_old);
3403 write_phy_reg(pi, 0x938, rfoverride4_old);
3404 write_phy_reg(pi, 0x939, rfoverride4val_old);
3405 write_phy_reg(pi, 0x43b, afectrlovr_old);
3406 write_phy_reg(pi, 0x43c, afectrlovrval_old);
3407 write_phy_reg(pi, 0x6da, old_sslpnCalibClkEnCtrl);
3408 write_phy_reg(pi, 0x6db, old_sslpnRxFeClkEnCtrl);
3410 wlc_lcnphy_clear_trsw_override(pi);
3412 mod_phy_reg(pi, 0x44c, (0x1 << 2), 0 << 2);
3414 for (i = 0; i < 11; i++) {
3415 write_radio_reg(pi, rxiq_cal_rf_reg[i],
3419 if (tx_gain_override_old) {
3420 wlc_lcnphy_set_tx_pwr_by_index(pi, tx_gain_index_old);
3422 wlc_lcnphy_disable_tx_gain_override(pi);
3423 wlc_lcnphy_set_tx_pwr_ctrl(pi, tx_pwr_ctrl);
3425 wlc_lcnphy_rx_gain_override_enable(pi, false);
3433 static void wlc_lcnphy_temp_adj(phy_info_t *pi)
3435 if (NORADIO_ENAB(pi->pubpi))
3439 static void wlc_lcnphy_glacial_timer_based_cal(phy_info_t *pi)
3443 u16 SAVE_pwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);
3444 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
3446 (0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
3448 wlapi_suspend_mac_and_wait(pi->sh->physhim);
3449 wlc_lcnphy_deaf_mode(pi, true);
3450 pi->phy_lastcal = pi->sh->now;
3451 pi->phy_forcecal = false;
3452 index = pi_lcn->lcnphy_current_index;
3454 wlc_lcnphy_txpwrtbl_iqlo_cal(pi);
3456 wlc_lcnphy_set_tx_pwr_by_index(pi, index);
3457 wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_pwrctrl);
3458 wlc_lcnphy_deaf_mode(pi, false);
3460 wlapi_enable_mac(pi->sh->physhim);
3464 static void wlc_lcnphy_periodic_cal(phy_info_t *pi)
3466 bool suspend, full_cal;
3467 const lcnphy_rx_iqcomp_t *rx_iqcomp;
3469 u16 SAVE_pwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);
3473 s32 tssi, pwr, maxtargetpwr, mintargetpwr;
3474 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
3476 if (NORADIO_ENAB(pi->pubpi))
3479 pi->phy_lastcal = pi->sh->now;
3480 pi->phy_forcecal = false;
3482 (pi_lcn->lcnphy_full_cal_channel !=
3483 CHSPEC_CHANNEL(pi->radio_chanspec));
3484 pi_lcn->lcnphy_full_cal_channel = CHSPEC_CHANNEL(pi->radio_chanspec);
3485 index = pi_lcn->lcnphy_current_index;
3488 (0 == (R_REG(&pi->regs->maccontrol) & MCTL_EN_MAC));
3491 wlapi_bmac_write_shm(pi->sh->physhim, M_CTS_DURATION, 10000);
3492 wlapi_suspend_mac_and_wait(pi->sh->physhim);
3494 wlc_lcnphy_deaf_mode(pi, true);
3496 wlc_lcnphy_txpwrtbl_iqlo_cal(pi);
3498 rx_iqcomp = lcnphy_rx_iqcomp_table_rev0;
3499 rx_iqcomp_sz = ARRAY_SIZE(lcnphy_rx_iqcomp_table_rev0);
3501 if (LCNREV_IS(pi->pubpi.phy_rev, 1))
3502 wlc_lcnphy_rx_iq_cal(pi, NULL, 0, true, false, 1, 40);
3504 wlc_lcnphy_rx_iq_cal(pi, NULL, 0, true, false, 1, 127);
3506 if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi)) {
3508 wlc_lcnphy_idle_tssi_est((wlc_phy_t *) pi);
3510 b0 = pi->txpa_2g[0];
3511 b1 = pi->txpa_2g[1];
3512 a1 = pi->txpa_2g[2];
3513 maxtargetpwr = wlc_lcnphy_tssi2dbm(10, a1, b0, b1);
3514 mintargetpwr = wlc_lcnphy_tssi2dbm(125, a1, b0, b1);
3516 tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
3521 for (tssi = 0; tssi < 128; tssi++) {
3522 pwr = wlc_lcnphy_tssi2dbm(tssi, a1, b0, b1);
3523 pwr = (pwr < mintargetpwr) ? mintargetpwr : pwr;
3524 wlc_lcnphy_write_table(pi, &tab);
3529 wlc_lcnphy_set_tx_pwr_by_index(pi, index);
3530 wlc_lcnphy_set_tx_pwr_ctrl(pi, SAVE_pwrctrl);
3531 wlc_lcnphy_deaf_mode(pi, false);
3533 wlapi_enable_mac(pi->sh->physhim);
3536 void wlc_lcnphy_calib_modes(phy_info_t *pi, uint mode)
3539 int temp1, temp2, temp_diff;
3540 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
3543 case PHY_PERICAL_CHAN:
3547 wlc_lcnphy_periodic_cal(pi);
3549 case PHY_PERICAL_PHYINIT:
3550 wlc_lcnphy_periodic_cal(pi);
3552 case PHY_PERICAL_WATCHDOG:
3553 if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) {
3554 temp_new = wlc_lcnphy_tempsense(pi, 0);
3555 temp1 = LCNPHY_TEMPSENSE(temp_new);
3556 temp2 = LCNPHY_TEMPSENSE(pi_lcn->lcnphy_cal_temper);
3557 temp_diff = temp1 - temp2;
3558 if ((pi_lcn->lcnphy_cal_counter > 90) ||
3559 (temp_diff > 60) || (temp_diff < -60)) {
3560 wlc_lcnphy_glacial_timer_based_cal(pi);
3561 wlc_2064_vco_cal(pi);
3562 pi_lcn->lcnphy_cal_temper = temp_new;
3563 pi_lcn->lcnphy_cal_counter = 0;
3565 pi_lcn->lcnphy_cal_counter++;
3568 case LCNPHY_PERICAL_TEMPBASED_TXPWRCTRL:
3569 if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi))
3570 wlc_lcnphy_tx_power_adjustment((wlc_phy_t *) pi);
3575 void wlc_lcnphy_get_tssi(phy_info_t *pi, s8 *ofdm_pwr, s8 *cck_pwr)
3579 status = (read_phy_reg(pi, 0x4ab));
3580 if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi) &&
3581 (status & (0x1 << 15))) {
3582 *ofdm_pwr = (s8) (((read_phy_reg(pi, 0x4ab) & (0x1ff << 0))
3585 if (wlc_phy_tpc_isenabled_lcnphy(pi))
3586 cck_offset = pi->tx_power_offset[TXP_FIRST_CCK];
3590 *cck_pwr = *ofdm_pwr + cck_offset;
3597 void WLBANDINITFN(wlc_phy_cal_init_lcnphy) (phy_info_t *pi)
3603 static void wlc_lcnphy_set_chanspec_tweaks(phy_info_t *pi, chanspec_t chanspec)
3605 u8 channel = CHSPEC_CHANNEL(chanspec);
3606 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
3608 if (NORADIO_ENAB(pi->pubpi))
3611 if (channel == 14) {
3612 mod_phy_reg(pi, 0x448, (0x3 << 8), (2) << 8);
3615 mod_phy_reg(pi, 0x448, (0x3 << 8), (1) << 8);
3618 pi_lcn->lcnphy_bandedge_corr = 2;
3620 pi_lcn->lcnphy_bandedge_corr = 4;
3622 if (channel == 1 || channel == 2 || channel == 3 ||
3623 channel == 4 || channel == 9 ||
3624 channel == 10 || channel == 11 || channel == 12) {
3625 si_pmu_pllcontrol(pi->sh->sih, 0x2, 0xffffffff, 0x03000c04);
3626 si_pmu_pllcontrol(pi->sh->sih, 0x3, 0xffffff, 0x0);
3627 si_pmu_pllcontrol(pi->sh->sih, 0x4, 0xffffffff, 0x200005c0);
3629 si_pmu_pllupd(pi->sh->sih);
3630 write_phy_reg(pi, 0x942, 0);
3631 wlc_lcnphy_txrx_spur_avoidance_mode(pi, false);
3632 pi_lcn->lcnphy_spurmod = 0;
3633 mod_phy_reg(pi, 0x424, (0xff << 8), (0x1b) << 8);
3635 write_phy_reg(pi, 0x425, 0x5907);
3637 si_pmu_pllcontrol(pi->sh->sih, 0x2, 0xffffffff, 0x03140c04);
3638 si_pmu_pllcontrol(pi->sh->sih, 0x3, 0xffffff, 0x333333);
3639 si_pmu_pllcontrol(pi->sh->sih, 0x4, 0xffffffff, 0x202c2820);
3641 si_pmu_pllupd(pi->sh->sih);
3642 write_phy_reg(pi, 0x942, 0);
3643 wlc_lcnphy_txrx_spur_avoidance_mode(pi, true);
3645 pi_lcn->lcnphy_spurmod = 0;
3646 mod_phy_reg(pi, 0x424, (0xff << 8), (0x1f) << 8);
3648 write_phy_reg(pi, 0x425, 0x590a);
3651 or_phy_reg(pi, 0x44a, 0x44);
3652 write_phy_reg(pi, 0x44a, 0x80);
3655 void wlc_lcnphy_tx_power_adjustment(wlc_phy_t *ppi)
3659 phy_info_t *pi = (phy_info_t *) ppi;
3660 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
3661 u16 SAVE_txpwrctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);
3662 if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi) && SAVE_txpwrctrl) {
3663 index = wlc_lcnphy_tempcompensated_txpwrctrl(pi);
3664 index2 = (u16) (index * 2);
3665 mod_phy_reg(pi, 0x4a9, (0x1ff << 0), (index2) << 0);
3667 pi_lcn->lcnphy_current_index = (s8)
3668 ((read_phy_reg(pi, 0x4a9) & 0xFF) / 2);
3672 static void wlc_lcnphy_set_rx_iq_comp(phy_info_t *pi, u16 a, u16 b)
3674 mod_phy_reg(pi, 0x645, (0x3ff << 0), (a) << 0);
3676 mod_phy_reg(pi, 0x646, (0x3ff << 0), (b) << 0);
3678 mod_phy_reg(pi, 0x647, (0x3ff << 0), (a) << 0);
3680 mod_phy_reg(pi, 0x648, (0x3ff << 0), (b) << 0);
3682 mod_phy_reg(pi, 0x649, (0x3ff << 0), (a) << 0);
3684 mod_phy_reg(pi, 0x64a, (0x3ff << 0), (b) << 0);
3688 void WLBANDINITFN(wlc_phy_init_lcnphy) (phy_info_t *pi)
3691 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
3692 phybw40 = CHSPEC_IS40(pi->radio_chanspec);
3694 pi_lcn->lcnphy_cal_counter = 0;
3695 pi_lcn->lcnphy_cal_temper = pi_lcn->lcnphy_rawtempsense;
3697 or_phy_reg(pi, 0x44a, 0x80);
3698 and_phy_reg(pi, 0x44a, 0x7f);
3700 wlc_lcnphy_afe_clk_init(pi, AFE_CLK_INIT_MODE_TXRX2X);
3702 write_phy_reg(pi, 0x60a, 160);
3704 write_phy_reg(pi, 0x46a, 25);
3706 wlc_lcnphy_baseband_init(pi);
3708 wlc_lcnphy_radio_init(pi);
3710 if (CHSPEC_IS2G(pi->radio_chanspec))
3711 wlc_lcnphy_tx_pwr_ctrl_init((wlc_phy_t *) pi);
3713 wlc_phy_chanspec_set((wlc_phy_t *) pi, pi->radio_chanspec);
3715 si_pmu_regcontrol(pi->sh->sih, 0, 0xf, 0x9);
3717 si_pmu_chipcontrol(pi->sh->sih, 0, 0xffffffff, 0x03CDDDDD);
3719 if ((pi->sh->boardflags & BFL_FEM)
3720 && wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi))
3721 wlc_lcnphy_set_tx_pwr_by_index(pi, FIXED_TXPWR);
3723 wlc_lcnphy_agc_temp_init(pi);
3725 wlc_lcnphy_temp_adj(pi);
3727 mod_phy_reg(pi, 0x448, (0x1 << 14), (1) << 14);
3730 mod_phy_reg(pi, 0x448, (0x1 << 14), (0) << 14);
3732 wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_HW);
3733 pi_lcn->lcnphy_noise_samples = LCNPHY_NOISE_SAMPLES_DEFAULT;
3734 wlc_lcnphy_calib_modes(pi, PHY_PERICAL_PHYINIT);
3738 wlc_lcnphy_tx_iqlo_loopback(phy_info_t *pi, u16 *values_to_save)
3742 for (i = 0; i < 20; i++) {
3744 read_radio_reg(pi, iqlo_loopback_rf_regs[i]);
3747 mod_phy_reg(pi, 0x44c, (0x1 << 12), 1 << 12);
3748 mod_phy_reg(pi, 0x44d, (0x1 << 14), 1 << 14);
3750 mod_phy_reg(pi, 0x44c, (0x1 << 11), 1 << 11);
3751 mod_phy_reg(pi, 0x44d, (0x1 << 13), 0 << 13);
3753 mod_phy_reg(pi, 0x43b, (0x1 << 1), 1 << 1);
3754 mod_phy_reg(pi, 0x43c, (0x1 << 1), 0 << 1);
3756 mod_phy_reg(pi, 0x43b, (0x1 << 0), 1 << 0);
3757 mod_phy_reg(pi, 0x43c, (0x1 << 0), 0 << 0);
3759 if (LCNREV_IS(pi->pubpi.phy_rev, 2))
3760 and_radio_reg(pi, RADIO_2064_REG03A, 0xFD);
3762 and_radio_reg(pi, RADIO_2064_REG03A, 0xF9);
3763 or_radio_reg(pi, RADIO_2064_REG11A, 0x1);
3765 or_radio_reg(pi, RADIO_2064_REG036, 0x01);
3766 or_radio_reg(pi, RADIO_2064_REG11A, 0x18);
3769 if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {
3770 if (CHSPEC_IS5G(pi->radio_chanspec))
3771 mod_radio_reg(pi, RADIO_2064_REG03A, 1, 0);
3773 or_radio_reg(pi, RADIO_2064_REG03A, 1);
3775 if (CHSPEC_IS5G(pi->radio_chanspec))
3776 mod_radio_reg(pi, RADIO_2064_REG03A, 3, 1);
3778 or_radio_reg(pi, RADIO_2064_REG03A, 0x3);
3783 write_radio_reg(pi, RADIO_2064_REG025, 0xF);
3784 if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {
3785 if (CHSPEC_IS5G(pi->radio_chanspec))
3786 mod_radio_reg(pi, RADIO_2064_REG028, 0xF, 0x4);
3788 mod_radio_reg(pi, RADIO_2064_REG028, 0xF, 0x6);
3790 if (CHSPEC_IS5G(pi->radio_chanspec))
3791 mod_radio_reg(pi, RADIO_2064_REG028, 0x1e, 0x4 << 1);
3793 mod_radio_reg(pi, RADIO_2064_REG028, 0x1e, 0x6 << 1);
3798 write_radio_reg(pi, RADIO_2064_REG005, 0x8);
3799 or_radio_reg(pi, RADIO_2064_REG112, 0x80);
3802 or_radio_reg(pi, RADIO_2064_REG0FF, 0x10);
3803 or_radio_reg(pi, RADIO_2064_REG11F, 0x44);
3806 or_radio_reg(pi, RADIO_2064_REG00B, 0x7);
3807 or_radio_reg(pi, RADIO_2064_REG113, 0x10);
3810 write_radio_reg(pi, RADIO_2064_REG007, 0x1);
3814 mod_radio_reg(pi, RADIO_2064_REG0FC, 0x3 << 0, (vmid >> 8) & 0x3);
3815 write_radio_reg(pi, RADIO_2064_REG0FD, (vmid & 0xff));
3816 or_radio_reg(pi, RADIO_2064_REG11F, 0x44);
3819 or_radio_reg(pi, RADIO_2064_REG0FF, 0x10);
3821 write_radio_reg(pi, RADIO_2064_REG012, 0x02);
3822 or_radio_reg(pi, RADIO_2064_REG112, 0x06);
3823 write_radio_reg(pi, RADIO_2064_REG036, 0x11);
3824 write_radio_reg(pi, RADIO_2064_REG059, 0xcc);
3825 write_radio_reg(pi, RADIO_2064_REG05C, 0x2e);
3826 write_radio_reg(pi, RADIO_2064_REG078, 0xd7);
3827 write_radio_reg(pi, RADIO_2064_REG092, 0x15);
3831 wlc_lcnphy_samp_cap(phy_info_t *pi, int clip_detect_algo, u16 thresh,
3834 u32 curval1, curval2, stpptr, curptr, strptr, val;
3835 u16 sslpnCalibClkEnCtrl, timer;
3836 u16 old_sslpnCalibClkEnCtrl;
3838 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
3841 old_sslpnCalibClkEnCtrl = read_phy_reg(pi, 0x6da);
3843 curval1 = R_REG(&pi->regs->psm_corectlsts);
3845 W_REG(&pi->regs->psm_corectlsts, ((1 << 6) | curval1));
3847 W_REG(&pi->regs->smpl_clct_strptr, 0x7E00);
3848 W_REG(&pi->regs->smpl_clct_stpptr, 0x8000);
3850 curval2 = R_REG(&pi->regs->psm_phy_hdr_param);
3851 W_REG(&pi->regs->psm_phy_hdr_param, curval2 | 0x30);
3853 write_phy_reg(pi, 0x555, 0x0);
3854 write_phy_reg(pi, 0x5a6, 0x5);
3856 write_phy_reg(pi, 0x5a2, (u16) (mode | mode << 6));
3857 write_phy_reg(pi, 0x5cf, 3);
3858 write_phy_reg(pi, 0x5a5, 0x3);
3859 write_phy_reg(pi, 0x583, 0x0);
3860 write_phy_reg(pi, 0x584, 0x0);
3861 write_phy_reg(pi, 0x585, 0x0fff);
3862 write_phy_reg(pi, 0x586, 0x0000);
3864 write_phy_reg(pi, 0x580, 0x4501);
3866 sslpnCalibClkEnCtrl = read_phy_reg(pi, 0x6da);
3867 write_phy_reg(pi, 0x6da, (u32) (sslpnCalibClkEnCtrl | 0x2008));
3868 stpptr = R_REG(&pi->regs->smpl_clct_stpptr);
3869 curptr = R_REG(&pi->regs->smpl_clct_curptr);
3872 curptr = R_REG(&pi->regs->smpl_clct_curptr);
3874 } while ((curptr != stpptr) && (timer < 500));
3876 W_REG(&pi->regs->psm_phy_hdr_param, 0x2);
3878 W_REG(&pi->regs->tplatewrptr, strptr);
3879 while (strptr < 0x8000) {
3880 val = R_REG(&pi->regs->tplatewrdata);
3881 imag = ((val >> 16) & 0x3ff);
3882 real = ((val) & 0x3ff);
3889 if (pi_lcn->lcnphy_iqcal_swp_dis)
3890 ptr[(strptr - 0x7E00) / 4] = real;
3892 ptr[(strptr - 0x7E00) / 4] = imag;
3893 if (clip_detect_algo) {
3894 if (imag > thresh || imag < -thresh) {
3902 write_phy_reg(pi, 0x6da, old_sslpnCalibClkEnCtrl);
3903 W_REG(&pi->regs->psm_phy_hdr_param, curval2);
3904 W_REG(&pi->regs->psm_corectlsts, curval1);
3907 static void wlc_lcnphy_tx_iqlo_soft_cal_full(phy_info_t *pi)
3909 lcnphy_unsign16_struct iqcc0, locc2, locc3, locc4;
3911 wlc_lcnphy_set_cc(pi, 0, 0, 0);
3912 wlc_lcnphy_set_cc(pi, 2, 0, 0);
3913 wlc_lcnphy_set_cc(pi, 3, 0, 0);
3914 wlc_lcnphy_set_cc(pi, 4, 0, 0);
3916 wlc_lcnphy_a1(pi, 4, 0, 0);
3917 wlc_lcnphy_a1(pi, 3, 0, 0);
3918 wlc_lcnphy_a1(pi, 2, 3, 2);
3919 wlc_lcnphy_a1(pi, 0, 5, 8);
3920 wlc_lcnphy_a1(pi, 2, 2, 1);
3921 wlc_lcnphy_a1(pi, 0, 4, 3);
3923 iqcc0 = wlc_lcnphy_get_cc(pi, 0);
3924 locc2 = wlc_lcnphy_get_cc(pi, 2);
3925 locc3 = wlc_lcnphy_get_cc(pi, 3);
3926 locc4 = wlc_lcnphy_get_cc(pi, 4);
3930 wlc_lcnphy_set_cc(phy_info_t *pi, int cal_type, s16 coeff_x, s16 coeff_y)
3937 wlc_lcnphy_set_tx_iqcc(pi, coeff_x, coeff_y);
3940 di0dq0 = (coeff_x & 0xff) << 8 | (coeff_y & 0xff);
3941 wlc_lcnphy_set_tx_locc(pi, di0dq0);
3944 k = wlc_lcnphy_calc_floor(coeff_x, 0);
3946 k = wlc_lcnphy_calc_floor(coeff_x, 1);
3948 data_rf = (x * 16 + y);
3949 write_radio_reg(pi, RADIO_2064_REG089, data_rf);
3950 k = wlc_lcnphy_calc_floor(coeff_y, 0);
3952 k = wlc_lcnphy_calc_floor(coeff_y, 1);
3954 data_rf = (x * 16 + y);
3955 write_radio_reg(pi, RADIO_2064_REG08A, data_rf);
3958 k = wlc_lcnphy_calc_floor(coeff_x, 0);
3960 k = wlc_lcnphy_calc_floor(coeff_x, 1);
3962 data_rf = (x * 16 + y);
3963 write_radio_reg(pi, RADIO_2064_REG08B, data_rf);
3964 k = wlc_lcnphy_calc_floor(coeff_y, 0);
3966 k = wlc_lcnphy_calc_floor(coeff_y, 1);
3968 data_rf = (x * 16 + y);
3969 write_radio_reg(pi, RADIO_2064_REG08C, data_rf);
3974 static lcnphy_unsign16_struct wlc_lcnphy_get_cc(phy_info_t *pi, int cal_type)
3977 u8 di0, dq0, ei, eq, fi, fq;
3978 lcnphy_unsign16_struct cc;
3983 wlc_lcnphy_get_tx_iqcc(pi, &a, &b);
3988 didq = wlc_lcnphy_get_tx_locc(pi);
3989 di0 = (((didq & 0xff00) << 16) >> 24);
3990 dq0 = (((didq & 0x00ff) << 24) >> 24);
3995 wlc_lcnphy_get_radio_loft(pi, &ei, &eq, &fi, &fq);
4000 wlc_lcnphy_get_radio_loft(pi, &ei, &eq, &fi, &fq);
4009 wlc_lcnphy_a1(phy_info_t *pi, int cal_type, int num_levels, int step_size_lg2)
4011 const lcnphy_spb_tone_t *phy_c1;
4012 lcnphy_spb_tone_t phy_c2;
4013 lcnphy_unsign16_struct phy_c3;
4014 int phy_c4, phy_c5, k, l, j, phy_c6;
4015 u16 phy_c7, phy_c8, phy_c9;
4016 s16 phy_c10, phy_c11, phy_c12, phy_c13, phy_c14, phy_c15, phy_c16;
4018 s32 phy_c18, phy_c19;
4019 u32 phy_c20, phy_c21;
4020 bool phy_c22, phy_c23, phy_c24, phy_c25;
4021 u16 phy_c26, phy_c27;
4022 u16 phy_c28, phy_c29, phy_c30;
4026 phy_c10 = phy_c13 = phy_c14 = phy_c8 = 0;
4027 ptr = kmalloc(sizeof(s16) * 131, GFP_ATOMIC);
4032 phy_c32 = kmalloc(sizeof(u16) * 20, GFP_ATOMIC);
4033 if (NULL == phy_c32) {
4037 phy_c26 = read_phy_reg(pi, 0x6da);
4038 phy_c27 = read_phy_reg(pi, 0x6db);
4039 phy_c31 = read_radio_reg(pi, RADIO_2064_REG026);
4040 write_phy_reg(pi, 0x93d, 0xC0);
4042 wlc_lcnphy_start_tx_tone(pi, 3750, 88, 0);
4043 write_phy_reg(pi, 0x6da, 0xffff);
4044 or_phy_reg(pi, 0x6db, 0x3);
4046 wlc_lcnphy_tx_iqlo_loopback(pi, phy_c32);
4048 phy_c28 = read_phy_reg(pi, 0x938);
4049 phy_c29 = read_phy_reg(pi, 0x4d7);
4050 phy_c30 = read_phy_reg(pi, 0x4d8);
4051 or_phy_reg(pi, 0x938, 0x1 << 2);
4052 or_phy_reg(pi, 0x4d7, 0x1 << 2);
4053 or_phy_reg(pi, 0x4d7, 0x1 << 3);
4054 mod_phy_reg(pi, 0x4d7, (0x7 << 12), 0x2 << 12);
4055 or_phy_reg(pi, 0x4d8, 1 << 0);
4056 or_phy_reg(pi, 0x4d8, 1 << 1);
4057 mod_phy_reg(pi, 0x4d8, (0x3ff << 2), 0x23A << 2);
4058 mod_phy_reg(pi, 0x4d8, (0x7 << 12), 0x7 << 12);
4059 phy_c1 = &lcnphy_spb_tone_3750[0];
4062 if (num_levels == 0) {
4063 if (cal_type != 0) {
4069 if (step_size_lg2 == 0) {
4070 if (cal_type != 0) {
4077 phy_c7 = (1 << step_size_lg2);
4078 phy_c3 = wlc_lcnphy_get_cc(pi, cal_type);
4079 phy_c15 = (s16) phy_c3.re;
4080 phy_c16 = (s16) phy_c3.im;
4081 if (cal_type == 2) {
4082 if (phy_c3.re > 127)
4083 phy_c15 = phy_c3.re - 256;
4084 if (phy_c3.im > 127)
4085 phy_c16 = phy_c3.im - 256;
4087 wlc_lcnphy_set_cc(pi, cal_type, phy_c15, phy_c16);
4089 for (phy_c8 = 0; phy_c7 != 0 && phy_c8 < num_levels; phy_c8++) {
4107 phy_c9 = read_phy_reg(pi, 0x93d);
4108 phy_c9 = 2 * phy_c9;
4113 write_radio_reg(pi, RADIO_2064_REG026,
4114 (phy_c5 & 0x7) | ((phy_c5 & 0x7) << 4));
4118 wlc_lcnphy_samp_cap(pi, 1, phy_c9, &ptr[0], 2);
4123 if ((phy_c22 != phy_c24) && (!phy_c25))
4127 if (phy_c5 <= 0 || phy_c5 >= 7)
4135 else if (phy_c5 > 7)
4138 for (k = -phy_c7; k <= phy_c7; k += phy_c7) {
4139 for (l = -phy_c7; l <= phy_c7; l += phy_c7) {
4140 phy_c11 = phy_c15 + k;
4141 phy_c12 = phy_c16 + l;
4143 if (phy_c11 < -phy_c10)
4145 else if (phy_c11 > phy_c10)
4147 if (phy_c12 < -phy_c10)
4149 else if (phy_c12 > phy_c10)
4151 wlc_lcnphy_set_cc(pi, cal_type, phy_c11,
4154 wlc_lcnphy_samp_cap(pi, 0, 0, ptr, 2);
4158 for (j = 0; j < 128; j++) {
4159 if (cal_type != 0) {
4160 phy_c6 = j % phy_c4;
4162 phy_c6 = (2 * j) % phy_c4;
4164 phy_c2.re = phy_c1[phy_c6].re;
4165 phy_c2.im = phy_c1[phy_c6].im;
4167 phy_c18 = phy_c18 + phy_c17 * phy_c2.re;
4168 phy_c19 = phy_c19 + phy_c17 * phy_c2.im;
4171 phy_c18 = phy_c18 >> 10;
4172 phy_c19 = phy_c19 >> 10;
4174 ((phy_c18 * phy_c18) + (phy_c19 * phy_c19));
4176 if (phy_c23 || phy_c20 < phy_c21) {
4187 phy_c7 = phy_c7 >> 1;
4188 wlc_lcnphy_set_cc(pi, cal_type, phy_c15, phy_c16);
4193 wlc_lcnphy_tx_iqlo_loopback_cleanup(pi, phy_c32);
4194 wlc_lcnphy_stop_tx_tone(pi);
4195 write_phy_reg(pi, 0x6da, phy_c26);
4196 write_phy_reg(pi, 0x6db, phy_c27);
4197 write_phy_reg(pi, 0x938, phy_c28);
4198 write_phy_reg(pi, 0x4d7, phy_c29);
4199 write_phy_reg(pi, 0x4d8, phy_c30);
4200 write_radio_reg(pi, RADIO_2064_REG026, phy_c31);
4207 wlc_lcnphy_tx_iqlo_loopback_cleanup(phy_info_t *pi, u16 *values_to_save)
4211 and_phy_reg(pi, 0x44c, 0x0 >> 11);
4213 and_phy_reg(pi, 0x43b, 0xC);
4215 for (i = 0; i < 20; i++) {
4216 write_radio_reg(pi, iqlo_loopback_rf_regs[i],
4222 WLBANDINITFN(wlc_lcnphy_load_tx_gain_table) (phy_info_t *pi,
4223 const lcnphy_tx_gain_tbl_entry *
4231 if (CHSPEC_IS5G(pi->radio_chanspec))
4236 if (pi->sh->boardflags & BFL_FEM)
4238 tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
4243 for (j = 0; j < 128; j++) {
4244 gm_gain = gain_table[j].gm;
4245 val = (((u32) pa_gain << 24) |
4246 (gain_table[j].pad << 16) |
4247 (gain_table[j].pga << 8) | gm_gain);
4249 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_GAIN_OFFSET + j;
4250 wlc_lcnphy_write_table(pi, &tab);
4252 val = (gain_table[j].dac << 28) | (gain_table[j].bb_mult << 20);
4253 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_IQ_OFFSET + j;
4254 wlc_lcnphy_write_table(pi, &tab);
4258 static void wlc_lcnphy_load_rfpower(phy_info_t *pi)
4261 u32 val, bbmult, rfgain;
4263 u8 scale_factor = 1;
4264 s16 temp, temp1, temp2, qQ, qQ1, qQ2, shift;
4266 tab.tbl_id = LCNPHY_TBL_ID_TXPWRCTL;
4270 for (index = 0; index < 128; index++) {
4271 tab.tbl_ptr = &bbmult;
4272 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_IQ_OFFSET + index;
4273 wlc_lcnphy_read_table(pi, &tab);
4274 bbmult = bbmult >> 20;
4276 tab.tbl_ptr = &rfgain;
4277 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_GAIN_OFFSET + index;
4278 wlc_lcnphy_read_table(pi, &tab);
4280 qm_log10((s32) (bbmult), 0, &temp1, &qQ1);
4281 qm_log10((s32) (1 << 6), 0, &temp2, &qQ2);
4284 temp2 = qm_shr16(temp2, qQ2 - qQ1);
4287 temp1 = qm_shr16(temp1, qQ1 - qQ2);
4290 temp = qm_sub16(temp1, temp2);
4297 val = (((index << shift) + (5 * temp) +
4298 (1 << (scale_factor + shift - 3))) >> (scale_factor +
4302 tab.tbl_offset = LCNPHY_TX_PWR_CTRL_PWR_OFFSET + index;
4303 wlc_lcnphy_write_table(pi, &tab);
4307 static void WLBANDINITFN(wlc_lcnphy_tbl_init) (phy_info_t *pi)
4314 phybw40 = CHSPEC_IS40(pi->radio_chanspec);
4316 for (idx = 0; idx < dot11lcnphytbl_info_sz_rev0; idx++) {
4317 wlc_lcnphy_write_table(pi, &dot11lcnphytbl_info_rev0[idx]);
4320 if (pi->sh->boardflags & BFL_FEM_BT) {
4321 tab.tbl_id = LCNPHY_TBL_ID_RFSEQ;
4327 wlc_lcnphy_write_table(pi, &tab);
4330 tab.tbl_id = LCNPHY_TBL_ID_RFSEQ;
4337 wlc_lcnphy_write_table(pi, &tab);
4341 wlc_lcnphy_write_table(pi, &tab);
4345 wlc_lcnphy_write_table(pi, &tab);
4347 if (CHSPEC_IS2G(pi->radio_chanspec)) {
4348 if (pi->sh->boardflags & BFL_FEM)
4349 wlc_lcnphy_load_tx_gain_table(pi,
4350 dot11lcnphy_2GHz_extPA_gaintable_rev0);
4352 wlc_lcnphy_load_tx_gain_table(pi,
4353 dot11lcnphy_2GHz_gaintable_rev0);
4356 if (LCNREV_IS(pi->pubpi.phy_rev, 2)) {
4357 if (CHSPEC_IS2G(pi->radio_chanspec)) {
4359 idx < dot11lcnphytbl_rx_gain_info_2G_rev2_sz;
4361 if (pi->sh->boardflags & BFL_EXTLNA)
4362 wlc_lcnphy_write_table(pi,
4363 &dot11lcnphytbl_rx_gain_info_extlna_2G_rev2
4366 wlc_lcnphy_write_table(pi,
4367 &dot11lcnphytbl_rx_gain_info_2G_rev2
4371 idx < dot11lcnphytbl_rx_gain_info_5G_rev2_sz;
4373 if (pi->sh->boardflags & BFL_EXTLNA_5GHz)
4374 wlc_lcnphy_write_table(pi,
4375 &dot11lcnphytbl_rx_gain_info_extlna_5G_rev2
4378 wlc_lcnphy_write_table(pi,
4379 &dot11lcnphytbl_rx_gain_info_5G_rev2
4384 if ((pi->sh->boardflags & BFL_FEM)
4385 && !(pi->sh->boardflags & BFL_FEM_BT))
4386 wlc_lcnphy_write_table(pi, &dot11lcn_sw_ctrl_tbl_info_4313_epa);
4387 else if (pi->sh->boardflags & BFL_FEM_BT) {
4388 if (pi->sh->boardrev < 0x1250)
4389 wlc_lcnphy_write_table(pi,
4390 &dot11lcn_sw_ctrl_tbl_info_4313_bt_epa);
4392 wlc_lcnphy_write_table(pi,
4393 &dot11lcn_sw_ctrl_tbl_info_4313_bt_epa_p250);
4395 wlc_lcnphy_write_table(pi, &dot11lcn_sw_ctrl_tbl_info_4313);
4397 wlc_lcnphy_load_rfpower(pi);
4399 wlc_lcnphy_clear_papd_comptable(pi);
4402 static void WLBANDINITFN(wlc_lcnphy_rev0_baseband_init) (phy_info_t *pi)
4405 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
4407 write_radio_reg(pi, RADIO_2064_REG11C, 0x0);
4409 write_phy_reg(pi, 0x43b, 0x0);
4410 write_phy_reg(pi, 0x43c, 0x0);
4411 write_phy_reg(pi, 0x44c, 0x0);
4412 write_phy_reg(pi, 0x4e6, 0x0);
4413 write_phy_reg(pi, 0x4f9, 0x0);
4414 write_phy_reg(pi, 0x4b0, 0x0);
4415 write_phy_reg(pi, 0x938, 0x0);
4416 write_phy_reg(pi, 0x4b0, 0x0);
4417 write_phy_reg(pi, 0x44e, 0);
4419 or_phy_reg(pi, 0x567, 0x03);
4421 or_phy_reg(pi, 0x44a, 0x44);
4422 write_phy_reg(pi, 0x44a, 0x80);
4424 if (!(pi->sh->boardflags & BFL_FEM))
4425 wlc_lcnphy_set_tx_pwr_by_index(pi, 52);
4429 afectrl1 = (u16) ((pi_lcn->lcnphy_rssi_vf) |
4430 (pi_lcn->lcnphy_rssi_vc << 4) | (pi_lcn->
4433 write_phy_reg(pi, 0x43e, afectrl1);
4436 mod_phy_reg(pi, 0x634, (0xff << 0), 0xC << 0);
4437 if (pi->sh->boardflags & BFL_FEM) {
4438 mod_phy_reg(pi, 0x634, (0xff << 0), 0xA << 0);
4440 write_phy_reg(pi, 0x910, 0x1);
4443 mod_phy_reg(pi, 0x448, (0x3 << 8), 1 << 8);
4444 mod_phy_reg(pi, 0x608, (0xff << 0), 0x17 << 0);
4445 mod_phy_reg(pi, 0x604, (0x7ff << 0), 0x3EA << 0);
4449 static void WLBANDINITFN(wlc_lcnphy_rev2_baseband_init) (phy_info_t *pi)
4451 if (CHSPEC_IS5G(pi->radio_chanspec)) {
4452 mod_phy_reg(pi, 0x416, (0xff << 0), 80 << 0);
4454 mod_phy_reg(pi, 0x416, (0xff << 8), 80 << 8);
4458 static void wlc_lcnphy_agc_temp_init(phy_info_t *pi)
4463 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
4465 if (NORADIO_ENAB(pi->pubpi))
4468 temp = (s16) read_phy_reg(pi, 0x4df);
4469 pi_lcn->lcnphy_ofdmgainidxtableoffset = (temp & (0xff << 0)) >> 0;
4471 if (pi_lcn->lcnphy_ofdmgainidxtableoffset > 127)
4472 pi_lcn->lcnphy_ofdmgainidxtableoffset -= 256;
4474 pi_lcn->lcnphy_dsssgainidxtableoffset = (temp & (0xff << 8)) >> 8;
4476 if (pi_lcn->lcnphy_dsssgainidxtableoffset > 127)
4477 pi_lcn->lcnphy_dsssgainidxtableoffset -= 256;
4479 tab.tbl_ptr = tableBuffer;
4482 tab.tbl_offset = 59;
4484 wlc_lcnphy_read_table(pi, &tab);
4486 if (tableBuffer[0] > 63)
4487 tableBuffer[0] -= 128;
4488 pi_lcn->lcnphy_tr_R_gain_val = tableBuffer[0];
4490 if (tableBuffer[1] > 63)
4491 tableBuffer[1] -= 128;
4492 pi_lcn->lcnphy_tr_T_gain_val = tableBuffer[1];
4494 temp = (s16) (read_phy_reg(pi, 0x434)
4498 pi_lcn->lcnphy_input_pwr_offset_db = (s8) temp;
4500 pi_lcn->lcnphy_Med_Low_Gain_db = (read_phy_reg(pi, 0x424)
4503 pi_lcn->lcnphy_Very_Low_Gain_db = (read_phy_reg(pi, 0x425)
4507 tab.tbl_ptr = tableBuffer;
4509 tab.tbl_id = LCNPHY_TBL_ID_GAIN_IDX;
4510 tab.tbl_offset = 28;
4512 wlc_lcnphy_read_table(pi, &tab);
4514 pi_lcn->lcnphy_gain_idx_14_lowword = tableBuffer[0];
4515 pi_lcn->lcnphy_gain_idx_14_hiword = tableBuffer[1];
4519 static void WLBANDINITFN(wlc_lcnphy_bu_tweaks) (phy_info_t *pi)
4521 if (NORADIO_ENAB(pi->pubpi))
4524 or_phy_reg(pi, 0x805, 0x1);
4526 mod_phy_reg(pi, 0x42f, (0x7 << 0), (0x3) << 0);
4528 mod_phy_reg(pi, 0x030, (0x7 << 0), (0x3) << 0);
4530 write_phy_reg(pi, 0x414, 0x1e10);
4531 write_phy_reg(pi, 0x415, 0x0640);
4533 mod_phy_reg(pi, 0x4df, (0xff << 8), -9 << 8);
4535 or_phy_reg(pi, 0x44a, 0x44);
4536 write_phy_reg(pi, 0x44a, 0x80);
4537 mod_phy_reg(pi, 0x434, (0xff << 0), (0xFD) << 0);
4539 mod_phy_reg(pi, 0x420, (0xff << 0), (16) << 0);
4541 if (!(pi->sh->boardrev < 0x1204))
4542 mod_radio_reg(pi, RADIO_2064_REG09B, 0xF0, 0xF0);
4544 write_phy_reg(pi, 0x7d6, 0x0902);
4545 mod_phy_reg(pi, 0x429, (0xf << 0), (0x9) << 0);
4547 mod_phy_reg(pi, 0x429, (0x3f << 4), (0xe) << 4);
4549 if (LCNREV_IS(pi->pubpi.phy_rev, 1)) {
4550 mod_phy_reg(pi, 0x423, (0xff << 0), (0x46) << 0);
4552 mod_phy_reg(pi, 0x411, (0xff << 0), (1) << 0);
4554 mod_phy_reg(pi, 0x434, (0xff << 0), (0xFF) << 0);
4556 mod_phy_reg(pi, 0x656, (0xf << 0), (2) << 0);
4558 mod_phy_reg(pi, 0x44d, (0x1 << 2), (1) << 2);
4560 mod_radio_reg(pi, RADIO_2064_REG0F7, 0x4, 0x4);
4561 mod_radio_reg(pi, RADIO_2064_REG0F1, 0x3, 0);
4562 mod_radio_reg(pi, RADIO_2064_REG0F2, 0xF8, 0x90);
4563 mod_radio_reg(pi, RADIO_2064_REG0F3, 0x3, 0x2);
4564 mod_radio_reg(pi, RADIO_2064_REG0F3, 0xf0, 0xa0);
4566 mod_radio_reg(pi, RADIO_2064_REG11F, 0x2, 0x2);
4568 wlc_lcnphy_clear_tx_power_offsets(pi);
4569 mod_phy_reg(pi, 0x4d0, (0x1ff << 6), (10) << 6);
4574 static void WLBANDINITFN(wlc_lcnphy_baseband_init) (phy_info_t *pi)
4577 wlc_lcnphy_tbl_init(pi);
4578 wlc_lcnphy_rev0_baseband_init(pi);
4579 if (LCNREV_IS(pi->pubpi.phy_rev, 2))
4580 wlc_lcnphy_rev2_baseband_init(pi);
4581 wlc_lcnphy_bu_tweaks(pi);
4584 static void WLBANDINITFN(wlc_radio_2064_init) (phy_info_t *pi)
4587 lcnphy_radio_regs_t *lcnphyregs = NULL;
4589 lcnphyregs = lcnphy_radio_regs_2064;
4591 for (i = 0; lcnphyregs[i].address != 0xffff; i++)
4592 if (CHSPEC_IS5G(pi->radio_chanspec) && lcnphyregs[i].do_init_a)
4594 ((lcnphyregs[i].address & 0x3fff) |
4595 RADIO_DEFAULT_CORE),
4596 (u16) lcnphyregs[i].init_a);
4597 else if (lcnphyregs[i].do_init_g)
4599 ((lcnphyregs[i].address & 0x3fff) |
4600 RADIO_DEFAULT_CORE),
4601 (u16) lcnphyregs[i].init_g);
4603 write_radio_reg(pi, RADIO_2064_REG032, 0x62);
4604 write_radio_reg(pi, RADIO_2064_REG033, 0x19);
4606 write_radio_reg(pi, RADIO_2064_REG090, 0x10);
4608 write_radio_reg(pi, RADIO_2064_REG010, 0x00);
4610 if (LCNREV_IS(pi->pubpi.phy_rev, 1)) {
4612 write_radio_reg(pi, RADIO_2064_REG060, 0x7f);
4613 write_radio_reg(pi, RADIO_2064_REG061, 0x72);
4614 write_radio_reg(pi, RADIO_2064_REG062, 0x7f);
4617 write_radio_reg(pi, RADIO_2064_REG01D, 0x02);
4618 write_radio_reg(pi, RADIO_2064_REG01E, 0x06);
4620 mod_phy_reg(pi, 0x4ea, (0x7 << 0), 0 << 0);
4622 mod_phy_reg(pi, 0x4ea, (0x7 << 3), 1 << 3);
4624 mod_phy_reg(pi, 0x4ea, (0x7 << 6), 2 << 6);
4626 mod_phy_reg(pi, 0x4ea, (0x7 << 9), 3 << 9);
4628 mod_phy_reg(pi, 0x4ea, (0x7 << 12), 4 << 12);
4630 write_phy_reg(pi, 0x4ea, 0x4688);
4632 mod_phy_reg(pi, 0x4eb, (0x7 << 0), 2 << 0);
4634 mod_phy_reg(pi, 0x4eb, (0x7 << 6), 0 << 6);
4636 mod_phy_reg(pi, 0x46a, (0xffff << 0), 25 << 0);
4638 wlc_lcnphy_set_tx_locc(pi, 0);
4640 wlc_lcnphy_rcal(pi);
4642 wlc_lcnphy_rc_cal(pi);
4645 static void WLBANDINITFN(wlc_lcnphy_radio_init) (phy_info_t *pi)
4647 if (NORADIO_ENAB(pi->pubpi))
4650 wlc_radio_2064_init(pi);
4653 static void wlc_lcnphy_rcal(phy_info_t *pi)
4657 if (NORADIO_ENAB(pi->pubpi))
4660 and_radio_reg(pi, RADIO_2064_REG05B, 0xfD);
4662 or_radio_reg(pi, RADIO_2064_REG004, 0x40);
4663 or_radio_reg(pi, RADIO_2064_REG120, 0x10);
4665 or_radio_reg(pi, RADIO_2064_REG078, 0x80);
4666 or_radio_reg(pi, RADIO_2064_REG129, 0x02);
4668 or_radio_reg(pi, RADIO_2064_REG057, 0x01);
4670 or_radio_reg(pi, RADIO_2064_REG05B, 0x02);
4672 SPINWAIT(!wlc_radio_2064_rcal_done(pi), 10 * 1000 * 1000);
4674 if (wlc_radio_2064_rcal_done(pi)) {
4675 rcal_value = (u8) read_radio_reg(pi, RADIO_2064_REG05C);
4676 rcal_value = rcal_value & 0x1f;
4679 and_radio_reg(pi, RADIO_2064_REG05B, 0xfD);
4681 and_radio_reg(pi, RADIO_2064_REG057, 0xFE);
4684 static void wlc_lcnphy_rc_cal(phy_info_t *pi)
4689 if (NORADIO_ENAB(pi->pubpi))
4692 dflt_rc_cal_val = 7;
4693 if (LCNREV_IS(pi->pubpi.phy_rev, 1))
4694 dflt_rc_cal_val = 11;
4696 (dflt_rc_cal_val << 10) | (dflt_rc_cal_val << 5) |
4698 write_phy_reg(pi, 0x933, flt_val);
4699 write_phy_reg(pi, 0x934, flt_val);
4700 write_phy_reg(pi, 0x935, flt_val);
4701 write_phy_reg(pi, 0x936, flt_val);
4702 write_phy_reg(pi, 0x937, (flt_val & 0x1FF));
4707 static bool wlc_phy_txpwr_srom_read_lcnphy(phy_info_t *pi)
4711 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
4713 if (CHSPEC_IS2G(pi->radio_chanspec)) {
4715 u32 offset_ofdm, offset_mcs;
4717 pi_lcn->lcnphy_tr_isolation_mid =
4718 (u8) PHY_GETINTVAR(pi, "triso2g");
4720 pi_lcn->lcnphy_rx_power_offset =
4721 (u8) PHY_GETINTVAR(pi, "rxpo2g");
4723 pi->txpa_2g[0] = (s16) PHY_GETINTVAR(pi, "pa0b0");
4724 pi->txpa_2g[1] = (s16) PHY_GETINTVAR(pi, "pa0b1");
4725 pi->txpa_2g[2] = (s16) PHY_GETINTVAR(pi, "pa0b2");
4727 pi_lcn->lcnphy_rssi_vf = (u8) PHY_GETINTVAR(pi, "rssismf2g");
4728 pi_lcn->lcnphy_rssi_vc = (u8) PHY_GETINTVAR(pi, "rssismc2g");
4729 pi_lcn->lcnphy_rssi_gs = (u8) PHY_GETINTVAR(pi, "rssisav2g");
4732 pi_lcn->lcnphy_rssi_vf_lowtemp = pi_lcn->lcnphy_rssi_vf;
4733 pi_lcn->lcnphy_rssi_vc_lowtemp = pi_lcn->lcnphy_rssi_vc;
4734 pi_lcn->lcnphy_rssi_gs_lowtemp = pi_lcn->lcnphy_rssi_gs;
4736 pi_lcn->lcnphy_rssi_vf_hightemp =
4737 pi_lcn->lcnphy_rssi_vf;
4738 pi_lcn->lcnphy_rssi_vc_hightemp =
4739 pi_lcn->lcnphy_rssi_vc;
4740 pi_lcn->lcnphy_rssi_gs_hightemp =
4741 pi_lcn->lcnphy_rssi_gs;
4744 txpwr = (s8) PHY_GETINTVAR(pi, "maxp2ga0");
4745 pi->tx_srom_max_2g = txpwr;
4747 for (i = 0; i < PWRTBL_NUM_COEFF; i++) {
4748 pi->txpa_2g_low_temp[i] = pi->txpa_2g[i];
4749 pi->txpa_2g_high_temp[i] = pi->txpa_2g[i];
4752 cckpo = (u16) PHY_GETINTVAR(pi, "cck2gpo");
4754 uint max_pwr_chan = txpwr;
4756 for (i = TXP_FIRST_CCK; i <= TXP_LAST_CCK; i++) {
4757 pi->tx_srom_max_rate_2g[i] = max_pwr_chan -
4758 ((cckpo & 0xf) * 2);
4762 offset_ofdm = (u32) PHY_GETINTVAR(pi, "ofdm2gpo");
4763 for (i = TXP_FIRST_OFDM; i <= TXP_LAST_OFDM; i++) {
4764 pi->tx_srom_max_rate_2g[i] = max_pwr_chan -
4765 ((offset_ofdm & 0xf) * 2);
4771 opo = (u8) PHY_GETINTVAR(pi, "opo");
4773 for (i = TXP_FIRST_CCK; i <= TXP_LAST_CCK; i++) {
4774 pi->tx_srom_max_rate_2g[i] = txpwr;
4777 offset_ofdm = (u32) PHY_GETINTVAR(pi, "ofdm2gpo");
4779 for (i = TXP_FIRST_OFDM; i <= TXP_LAST_OFDM; i++) {
4780 pi->tx_srom_max_rate_2g[i] = txpwr -
4781 ((offset_ofdm & 0xf) * 2);
4785 ((u16) PHY_GETINTVAR(pi, "mcs2gpo1") << 16) |
4786 (u16) PHY_GETINTVAR(pi, "mcs2gpo0");
4787 pi_lcn->lcnphy_mcs20_po = offset_mcs;
4788 for (i = TXP_FIRST_SISO_MCS_20;
4789 i <= TXP_LAST_SISO_MCS_20; i++) {
4790 pi->tx_srom_max_rate_2g[i] =
4791 txpwr - ((offset_mcs & 0xf) * 2);
4796 pi_lcn->lcnphy_rawtempsense =
4797 (u16) PHY_GETINTVAR(pi, "rawtempsense");
4798 pi_lcn->lcnphy_measPower =
4799 (u8) PHY_GETINTVAR(pi, "measpower");
4800 pi_lcn->lcnphy_tempsense_slope =
4801 (u8) PHY_GETINTVAR(pi, "tempsense_slope");
4802 pi_lcn->lcnphy_hw_iqcal_en =
4803 (bool) PHY_GETINTVAR(pi, "hw_iqcal_en");
4804 pi_lcn->lcnphy_iqcal_swp_dis =
4805 (bool) PHY_GETINTVAR(pi, "iqcal_swp_dis");
4806 pi_lcn->lcnphy_tempcorrx =
4807 (u8) PHY_GETINTVAR(pi, "tempcorrx");
4808 pi_lcn->lcnphy_tempsense_option =
4809 (u8) PHY_GETINTVAR(pi, "tempsense_option");
4810 pi_lcn->lcnphy_freqoffset_corr =
4811 (u8) PHY_GETINTVAR(pi, "freqoffset_corr");
4812 if ((u8) getintvar(pi->vars, "aa2g") > 1)
4813 wlc_phy_ant_rxdiv_set((wlc_phy_t *) pi,
4814 (u8) getintvar(pi->vars,
4817 pi_lcn->lcnphy_cck_dig_filt_type = -1;
4818 if (PHY_GETVAR(pi, "cckdigfilttype")) {
4820 temp = (s16) PHY_GETINTVAR(pi, "cckdigfilttype");
4822 pi_lcn->lcnphy_cck_dig_filt_type = temp;
4829 void wlc_2064_vco_cal(phy_info_t *pi)
4833 mod_radio_reg(pi, RADIO_2064_REG057, 1 << 3, 1 << 3);
4834 calnrst = (u8) read_radio_reg(pi, RADIO_2064_REG056) & 0xf8;
4835 write_radio_reg(pi, RADIO_2064_REG056, calnrst);
4837 write_radio_reg(pi, RADIO_2064_REG056, calnrst | 0x03);
4839 write_radio_reg(pi, RADIO_2064_REG056, calnrst | 0x07);
4841 mod_radio_reg(pi, RADIO_2064_REG057, 1 << 3, 0);
4845 wlc_lcnphy_radio_2064_channel_tune_4313(phy_info_t *pi, u8 channel)
4848 const chan_info_2064_lcnphy_t *ci;
4849 u8 rfpll_doubler = 0;
4850 u8 pll_pwrup, pll_pwrup_ovr;
4851 fixed qFxtal, qFref, qFvco, qFcal;
4852 u8 d15, d16, f16, e44, e45;
4853 u32 div_int, div_frac, fvco3, fpfd, fref3, fcal_div;
4854 u16 loop_bw, d30, setCount;
4855 if (NORADIO_ENAB(pi->pubpi))
4857 ci = &chan_info_2064_lcnphy[0];
4860 mod_radio_reg(pi, RADIO_2064_REG09D, 0x4, 0x1 << 2);
4862 write_radio_reg(pi, RADIO_2064_REG09E, 0xf);
4863 if (!rfpll_doubler) {
4864 loop_bw = PLL_2064_LOOP_BW;
4867 loop_bw = PLL_2064_LOOP_BW_DOUBLER;
4868 d30 = PLL_2064_D30_DOUBLER;
4871 if (CHSPEC_IS2G(pi->radio_chanspec)) {
4872 for (i = 0; i < ARRAY_SIZE(chan_info_2064_lcnphy); i++)
4873 if (chan_info_2064_lcnphy[i].chan == channel)
4876 if (i >= ARRAY_SIZE(chan_info_2064_lcnphy)) {
4880 ci = &chan_info_2064_lcnphy[i];
4883 write_radio_reg(pi, RADIO_2064_REG02A, ci->logen_buftune);
4885 mod_radio_reg(pi, RADIO_2064_REG030, 0x3, ci->logen_rccr_tx);
4887 mod_radio_reg(pi, RADIO_2064_REG091, 0x3, ci->txrf_mix_tune_ctrl);
4889 mod_radio_reg(pi, RADIO_2064_REG038, 0xf, ci->pa_input_tune_g);
4891 mod_radio_reg(pi, RADIO_2064_REG030, 0x3 << 2,
4892 (ci->logen_rccr_rx) << 2);
4894 mod_radio_reg(pi, RADIO_2064_REG05E, 0xf, ci->pa_rxrf_lna1_freq_tune);
4896 mod_radio_reg(pi, RADIO_2064_REG05E, (0xf) << 4,
4897 (ci->pa_rxrf_lna2_freq_tune) << 4);
4899 write_radio_reg(pi, RADIO_2064_REG06C, ci->rxrf_rxrf_spare1);
4901 pll_pwrup = (u8) read_radio_reg(pi, RADIO_2064_REG044);
4902 pll_pwrup_ovr = (u8) read_radio_reg(pi, RADIO_2064_REG12B);
4904 or_radio_reg(pi, RADIO_2064_REG044, 0x07);
4906 or_radio_reg(pi, RADIO_2064_REG12B, (0x07) << 1);
4910 fpfd = rfpll_doubler ? (pi->xtalfreq << 1) : (pi->xtalfreq);
4911 if (pi->xtalfreq > 26000000)
4913 if (pi->xtalfreq > 52000000)
4921 fvco3 = (ci->freq * 3);
4924 qFxtal = wlc_lcnphy_qdiv_roundup(pi->xtalfreq, PLL_2064_MHZ, 16);
4925 qFref = wlc_lcnphy_qdiv_roundup(fpfd, PLL_2064_MHZ, 16);
4926 qFcal = pi->xtalfreq * fcal_div / PLL_2064_MHZ;
4927 qFvco = wlc_lcnphy_qdiv_roundup(fvco3, 2, 16);
4929 write_radio_reg(pi, RADIO_2064_REG04F, 0x02);
4931 d15 = (pi->xtalfreq * fcal_div * 4 / 5) / PLL_2064_MHZ - 1;
4932 write_radio_reg(pi, RADIO_2064_REG052, (0x07 & (d15 >> 2)));
4933 write_radio_reg(pi, RADIO_2064_REG053, (d15 & 0x3) << 5);
4935 d16 = (qFcal * 8 / (d15 + 1)) - 1;
4936 write_radio_reg(pi, RADIO_2064_REG051, d16);
4938 f16 = ((d16 + 1) * (d15 + 1)) / qFcal;
4939 setCount = f16 * 3 * (ci->freq) / 32 - 1;
4940 mod_radio_reg(pi, RADIO_2064_REG053, (0x0f << 0),
4941 (u8) (setCount >> 8));
4943 or_radio_reg(pi, RADIO_2064_REG053, 0x10);
4944 write_radio_reg(pi, RADIO_2064_REG054, (u8) (setCount & 0xff));
4946 div_int = ((fvco3 * (PLL_2064_MHZ >> 4)) / fref3) << 4;
4948 div_frac = ((fvco3 * (PLL_2064_MHZ >> 4)) % fref3) << 4;
4949 while (div_frac >= fref3) {
4953 div_frac = wlc_lcnphy_qdiv_roundup(div_frac, fref3, 20);
4955 mod_radio_reg(pi, RADIO_2064_REG045, (0x1f << 0),
4956 (u8) (div_int >> 4));
4957 mod_radio_reg(pi, RADIO_2064_REG046, (0x1f << 4),
4958 (u8) (div_int << 4));
4959 mod_radio_reg(pi, RADIO_2064_REG046, (0x0f << 0),
4960 (u8) (div_frac >> 16));
4961 write_radio_reg(pi, RADIO_2064_REG047, (u8) (div_frac >> 8) & 0xff);
4962 write_radio_reg(pi, RADIO_2064_REG048, (u8) div_frac & 0xff);
4964 write_radio_reg(pi, RADIO_2064_REG040, 0xfb);
4966 write_radio_reg(pi, RADIO_2064_REG041, 0x9A);
4967 write_radio_reg(pi, RADIO_2064_REG042, 0xA3);
4968 write_radio_reg(pi, RADIO_2064_REG043, 0x0C);
4971 u8 h29, h23, c28, d29, h28_ten, e30, h30_ten, cp_current;
4972 u16 c29, c38, c30, g30, d28;
4979 d28 = (((PLL_2064_HIGH_END_KVCO - PLL_2064_LOW_END_KVCO) *
4980 (fvco3 / 2 - PLL_2064_LOW_END_VCO)) /
4981 (PLL_2064_HIGH_END_VCO - PLL_2064_LOW_END_VCO))
4982 + PLL_2064_LOW_END_KVCO;
4983 h28_ten = (d28 * 10) / c28;
4985 e30 = (d30 - 680) / 490;
4986 g30 = 680 + (e30 * 490);
4987 h30_ten = (g30 * 10) / c30;
4988 cp_current = ((c38 * h29 * h23 * 100) / h28_ten) / h30_ten;
4989 mod_radio_reg(pi, RADIO_2064_REG03C, 0x3f, cp_current);
4991 if (channel >= 1 && channel <= 5)
4992 write_radio_reg(pi, RADIO_2064_REG03C, 0x8);
4994 write_radio_reg(pi, RADIO_2064_REG03C, 0x7);
4995 write_radio_reg(pi, RADIO_2064_REG03D, 0x3);
4997 mod_radio_reg(pi, RADIO_2064_REG044, 0x0c, 0x0c);
5000 wlc_2064_vco_cal(pi);
5002 write_radio_reg(pi, RADIO_2064_REG044, pll_pwrup);
5003 write_radio_reg(pi, RADIO_2064_REG12B, pll_pwrup_ovr);
5004 if (LCNREV_IS(pi->pubpi.phy_rev, 1)) {
5005 write_radio_reg(pi, RADIO_2064_REG038, 3);
5006 write_radio_reg(pi, RADIO_2064_REG091, 7);
5010 bool wlc_phy_tpc_isenabled_lcnphy(phy_info_t *pi)
5012 if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi))
5015 return (LCNPHY_TX_PWR_CTRL_HW ==
5016 wlc_lcnphy_get_tx_pwr_ctrl((pi)));
5019 void wlc_phy_txpower_recalc_target_lcnphy(phy_info_t *pi)
5022 if (wlc_lcnphy_tempsense_based_pwr_ctrl_enabled(pi)) {
5023 wlc_lcnphy_calib_modes(pi, LCNPHY_PERICAL_TEMPBASED_TXPWRCTRL);
5024 } else if (wlc_lcnphy_tssi_based_pwr_ctrl_enabled(pi)) {
5026 pwr_ctrl = wlc_lcnphy_get_tx_pwr_ctrl(pi);
5027 wlc_lcnphy_set_tx_pwr_ctrl(pi, LCNPHY_TX_PWR_CTRL_OFF);
5028 wlc_lcnphy_txpower_recalc_target(pi);
5030 wlc_lcnphy_set_tx_pwr_ctrl(pi, pwr_ctrl);
5035 void wlc_phy_detach_lcnphy(phy_info_t *pi)
5037 kfree(pi->u.pi_lcnphy);
5040 bool wlc_phy_attach_lcnphy(phy_info_t *pi)
5042 phy_info_lcnphy_t *pi_lcn;
5044 pi->u.pi_lcnphy = kzalloc(sizeof(phy_info_lcnphy_t), GFP_ATOMIC);
5045 if (pi->u.pi_lcnphy == NULL) {
5049 pi_lcn = pi->u.pi_lcnphy;
5051 if ((0 == (pi->sh->boardflags & BFL_NOPA)) && !NORADIO_ENAB(pi->pubpi)) {
5052 pi->hwpwrctrl = true;
5053 pi->hwpwrctrl_capable = true;
5056 pi->xtalfreq = si_alp_clock(pi->sh->sih);
5057 pi_lcn->lcnphy_papd_rxGnCtrl_init = 0;
5059 pi->pi_fptr.init = wlc_phy_init_lcnphy;
5060 pi->pi_fptr.calinit = wlc_phy_cal_init_lcnphy;
5061 pi->pi_fptr.chanset = wlc_phy_chanspec_set_lcnphy;
5062 pi->pi_fptr.txpwrrecalc = wlc_phy_txpower_recalc_target_lcnphy;
5063 pi->pi_fptr.txiqccget = wlc_lcnphy_get_tx_iqcc;
5064 pi->pi_fptr.txiqccset = wlc_lcnphy_set_tx_iqcc;
5065 pi->pi_fptr.txloccget = wlc_lcnphy_get_tx_locc;
5066 pi->pi_fptr.radioloftget = wlc_lcnphy_get_radio_loft;
5067 pi->pi_fptr.detach = wlc_phy_detach_lcnphy;
5069 if (!wlc_phy_txpwr_srom_read_lcnphy(pi))
5072 if ((pi->sh->boardflags & BFL_FEM) && (LCNREV_IS(pi->pubpi.phy_rev, 1))) {
5073 if (pi_lcn->lcnphy_tempsense_option == 3) {
5074 pi->hwpwrctrl = true;
5075 pi->hwpwrctrl_capable = true;
5076 pi->temppwrctrl_capable = false;
5078 pi->hwpwrctrl = false;
5079 pi->hwpwrctrl_capable = false;
5080 pi->temppwrctrl_capable = true;
5087 static void wlc_lcnphy_set_rx_gain(phy_info_t *pi, u32 gain)
5089 u16 trsw, ext_lna, lna1, lna2, tia, biq0, biq1, gain0_15, gain16_19;
5091 trsw = (gain & ((u32) 1 << 28)) ? 0 : 1;
5092 ext_lna = (u16) (gain >> 29) & 0x01;
5093 lna1 = (u16) (gain >> 0) & 0x0f;
5094 lna2 = (u16) (gain >> 4) & 0x0f;
5095 tia = (u16) (gain >> 8) & 0xf;
5096 biq0 = (u16) (gain >> 12) & 0xf;
5097 biq1 = (u16) (gain >> 16) & 0xf;
5099 gain0_15 = (u16) ((lna1 & 0x3) | ((lna1 & 0x3) << 2) |
5100 ((lna2 & 0x3) << 4) | ((lna2 & 0x3) << 6) |
5101 ((tia & 0xf) << 8) | ((biq0 & 0xf) << 12));
5104 mod_phy_reg(pi, 0x44d, (0x1 << 0), trsw << 0);
5105 mod_phy_reg(pi, 0x4b1, (0x1 << 9), ext_lna << 9);
5106 mod_phy_reg(pi, 0x4b1, (0x1 << 10), ext_lna << 10);
5107 mod_phy_reg(pi, 0x4b6, (0xffff << 0), gain0_15 << 0);
5108 mod_phy_reg(pi, 0x4b7, (0xf << 0), gain16_19 << 0);
5110 if (CHSPEC_IS2G(pi->radio_chanspec)) {
5111 mod_phy_reg(pi, 0x4b1, (0x3 << 11), lna1 << 11);
5112 mod_phy_reg(pi, 0x4e6, (0x3 << 3), lna1 << 3);
5114 wlc_lcnphy_rx_gain_override_enable(pi, true);
5117 static u32 wlc_lcnphy_get_receive_power(phy_info_t *pi, s32 *gain_index)
5119 u32 received_power = 0;
5122 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
5125 if (*gain_index >= 0)
5126 gain_code = lcnphy_23bitgaincode_table[*gain_index];
5128 if (-1 == *gain_index) {
5130 while ((*gain_index <= (s32) max_index)
5131 && (received_power < 700)) {
5132 wlc_lcnphy_set_rx_gain(pi,
5133 lcnphy_23bitgaincode_table
5136 wlc_lcnphy_measure_digital_power(pi,
5138 lcnphy_noise_samples);
5143 wlc_lcnphy_set_rx_gain(pi, gain_code);
5145 wlc_lcnphy_measure_digital_power(pi,
5147 lcnphy_noise_samples);
5150 return received_power;
5153 s32 wlc_lcnphy_rx_signal_power(phy_info_t *pi, s32 gain_index)
5156 s32 nominal_power_db;
5157 s32 log_val, gain_mismatch, desired_gain, input_power_offset_db,
5159 s32 received_power, temperature;
5161 phy_info_lcnphy_t *pi_lcn = pi->u.pi_lcnphy;
5163 received_power = wlc_lcnphy_get_receive_power(pi, &gain_index);
5165 gain = lcnphy_gain_table[gain_index];
5167 nominal_power_db = read_phy_reg(pi, 0x425) >> 8;
5170 u32 power = (received_power * 16);
5171 u32 msb1, msb2, val1, val2, diff1, diff2;
5172 msb1 = ffs(power) - 1;
5176 diff1 = (power - val1);
5177 diff2 = (val2 - power);
5184 log_val = log_val * 3;
5186 gain_mismatch = (nominal_power_db / 2) - (log_val);
5188 desired_gain = gain + gain_mismatch;
5190 input_power_offset_db = read_phy_reg(pi, 0x434) & 0xFF;
5192 if (input_power_offset_db > 127)
5193 input_power_offset_db -= 256;
5195 input_power_db = input_power_offset_db - desired_gain;
5198 input_power_db + lcnphy_gain_index_offset_for_rssi[gain_index];
5200 freq = wlc_phy_channel2freq(CHSPEC_CHANNEL(pi->radio_chanspec));
5201 if ((freq > 2427) && (freq <= 2467))
5202 input_power_db = input_power_db - 1;
5204 temperature = pi_lcn->lcnphy_lastsensed_temperature;
5206 if ((temperature - 15) < -30) {
5208 input_power_db + (((temperature - 10 - 25) * 286) >> 12) -
5210 } else if ((temperature - 15) < 4) {
5212 input_power_db + (((temperature - 10 - 25) * 286) >> 12) -
5216 input_power_db + (((temperature - 10 - 25) * 286) >> 12);
5219 wlc_lcnphy_rx_gain_override_enable(pi, 0);
5221 return input_power_db;
5225 wlc_lcnphy_load_tx_iir_filter(phy_info_t *pi, bool is_ofdm, s16 filt_type)
5227 s16 filt_index = -1;
5269 for (j = 0; j < LCNPHY_NUM_TX_DIG_FILTERS_CCK; j++) {
5270 if (filt_type == LCNPHY_txdigfiltcoeffs_cck[j][0]) {
5271 filt_index = (s16) j;
5276 if (filt_index != -1) {
5277 for (j = 0; j < LCNPHY_NUM_DIG_FILT_COEFFS; j++) {
5278 write_phy_reg(pi, addr[j],
5279 LCNPHY_txdigfiltcoeffs_cck
5280 [filt_index][j + 1]);
5284 for (j = 0; j < LCNPHY_NUM_TX_DIG_FILTERS_OFDM; j++) {
5285 if (filt_type == LCNPHY_txdigfiltcoeffs_ofdm[j][0]) {
5286 filt_index = (s16) j;
5291 if (filt_index != -1) {
5292 for (j = 0; j < LCNPHY_NUM_DIG_FILT_COEFFS; j++) {
5293 write_phy_reg(pi, addr_ofdm[j],
5294 LCNPHY_txdigfiltcoeffs_ofdm
5295 [filt_index][j + 1]);
5300 return (filt_index != -1) ? 0 : -1;