2 comedi/drivers/amplc_dio200.c
4 Driver for Amplicon PC212E, PC214E, PC215E, PC218E, PC272E.
6 Copyright (C) 2005-2013 MEV Ltd. <http://www.mev.co.uk/>
8 COMEDI - Linux Control and Measurement Device Interface
9 Copyright (C) 1998,2000 David A. Schleef <ds@schleef.org>
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2 of the License, or
14 (at your option) any later version.
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
22 * Driver: amplc_dio200
23 * Description: Amplicon 200 Series ISA Digital I/O
24 * Author: Ian Abbott <abbotti@mev.co.uk>
25 * Devices: [Amplicon] PC212E (pc212e), PC214E (pc214e), PC215E (pc215e),
26 * PC218E (pc218e), PC272E (pc272e)
27 * Updated: Mon, 18 Mar 2013 14:40:41 +0000
31 * Configuration options:
32 * [0] - I/O port base address
33 * [1] - IRQ (optional, but commands won't work without it)
35 * Passing a zero for an option is the same as leaving it unspecified.
39 * PC212E PC214E PC215E
40 * ------------- ------------- -------------
43 * 1 CTR-Y1 PPI-Y PPI-Y
44 * 2 CTR-Y2 CTR-Z1* CTR-Z1
45 * 3 CTR-Z1 INTERRUPT* CTR-Z2
50 * ------------- -------------
60 * Each PPI is a 8255 chip providing 24 DIO channels. The DIO channels
61 * are configurable as inputs or outputs in four groups:
63 * Port A - channels 0 to 7
64 * Port B - channels 8 to 15
65 * Port CL - channels 16 to 19
66 * Port CH - channels 20 to 23
68 * Only mode 0 of the 8255 chips is supported.
70 * Each CTR is a 8254 chip providing 3 16-bit counter channels. Each
71 * channel is configured individually with INSN_CONFIG instructions. The
72 * specific type of configuration instruction is specified in data[0].
73 * Some configuration instructions expect an additional parameter in
74 * data[1]; others return a value in data[1]. The following configuration
75 * instructions are supported:
77 * INSN_CONFIG_SET_COUNTER_MODE. Sets the counter channel's mode and
78 * BCD/binary setting specified in data[1].
80 * INSN_CONFIG_8254_READ_STATUS. Reads the status register value for the
81 * counter channel into data[1].
83 * INSN_CONFIG_SET_CLOCK_SRC. Sets the counter channel's clock source as
84 * specified in data[1] (this is a hardware-specific value). Not
85 * supported on PC214E. For the other boards, valid clock sources are
88 * 0. CLK n, the counter channel's dedicated CLK input from the SK1
89 * connector. (N.B. for other values, the counter channel's CLKn
90 * pin on the SK1 connector is an output!)
91 * 1. Internal 10 MHz clock.
92 * 2. Internal 1 MHz clock.
93 * 3. Internal 100 kHz clock.
94 * 4. Internal 10 kHz clock.
95 * 5. Internal 1 kHz clock.
96 * 6. OUT n-1, the output of counter channel n-1 (see note 1 below).
97 * 7. Ext Clock, the counter chip's dedicated Ext Clock input from
98 * the SK1 connector. This pin is shared by all three counter
99 * channels on the chip.
101 * INSN_CONFIG_GET_CLOCK_SRC. Returns the counter channel's current
102 * clock source in data[1]. For internal clock sources, data[2] is set
103 * to the period in ns.
105 * INSN_CONFIG_SET_GATE_SRC. Sets the counter channel's gate source as
106 * specified in data[2] (this is a hardware-specific value). Not
107 * supported on PC214E. For the other boards, valid gate sources are 0
110 * 0. VCC (internal +5V d.c.), i.e. gate permanently enabled.
111 * 1. GND (internal 0V d.c.), i.e. gate permanently disabled.
112 * 2. GAT n, the counter channel's dedicated GAT input from the SK1
113 * connector. (N.B. for other values, the counter channel's GATn
114 * pin on the SK1 connector is an output!)
115 * 3. /OUT n-2, the inverted output of counter channel n-2 (see note
122 * INSN_CONFIG_GET_GATE_SRC. Returns the counter channel's current gate
125 * Clock and gate interconnection notes:
127 * 1. Clock source OUT n-1 is the output of the preceding channel on the
128 * same counter subdevice if n > 0, or the output of channel 2 on the
129 * preceding counter subdevice (see note 3) if n = 0.
131 * 2. Gate source /OUT n-2 is the inverted output of channel 0 on the
132 * same counter subdevice if n = 2, or the inverted output of channel n+1
133 * on the preceding counter subdevice (see note 3) if n < 2.
135 * 3. The counter subdevices are connected in a ring, so the highest
136 * counter subdevice precedes the lowest.
138 * The 'INTERRUPT' subdevice pretends to be a digital input subdevice. The
139 * digital inputs come from the interrupt status register. The number of
140 * channels matches the number of interrupt sources. The PC214E does not
141 * have an interrupt status register; see notes on 'INTERRUPT SOURCES'
146 * PC212E PC214E PC215E
147 * ------------- ------------- -------------
149 * 0 PPI-X-C0 JUMPER-J5 PPI-X-C0
150 * 1 PPI-X-C3 PPI-X-C3
151 * 2 CTR-Y1-OUT1 PPI-Y-C0
152 * 3 CTR-Y2-OUT1 PPI-Y-C3
153 * 4 CTR-Z1-OUT1 CTR-Z1-OUT1
154 * 5 CTR-Z2-OUT1 CTR-Z2-OUT1
157 * ------------- -------------
159 * 0 CTR-X1-OUT1 PPI-X-C0
160 * 1 CTR-X2-OUT1 PPI-X-C3
161 * 2 CTR-Y1-OUT1 PPI-Y-C0
162 * 3 CTR-Y2-OUT1 PPI-Y-C3
163 * 4 CTR-Z1-OUT1 PPI-Z-C0
164 * 5 CTR-Z2-OUT1 PPI-Z-C3
166 * When an interrupt source is enabled in the interrupt source enable
167 * register, a rising edge on the source signal latches the corresponding
168 * bit to 1 in the interrupt status register.
170 * When the interrupt status register value as a whole (actually, just the
171 * 6 least significant bits) goes from zero to non-zero, the board will
172 * generate an interrupt. No further interrupts will occur until the
173 * interrupt status register is cleared to zero. To clear a bit to zero in
174 * the interrupt status register, the corresponding interrupt source must
175 * be disabled in the interrupt source enable register (there is no
176 * separate interrupt clear register).
178 * The PC214E does not have an interrupt source enable register or an
179 * interrupt status register; its 'INTERRUPT' subdevice has a single
180 * channel and its interrupt source is selected by the position of jumper
185 * The driver supports a read streaming acquisition command on the
186 * 'INTERRUPT' subdevice. The channel list selects the interrupt sources
187 * to be enabled. All channels will be sampled together (convert_src ==
188 * TRIG_NOW). The scan begins a short time after the hardware interrupt
189 * occurs, subject to interrupt latencies (scan_begin_src == TRIG_EXT,
190 * scan_begin_arg == 0). The value read from the interrupt status register
191 * is packed into a short value, one bit per requested channel, in the
192 * order they appear in the channel list.
195 #include <linux/module.h>
196 #include "../comedidev.h"
198 #include "amplc_dio200.h"
201 * Board descriptions.
203 static const struct dio200_board dio200_isa_boards[] = {
208 sd_8255, sd_8254, sd_8254, sd_8254, sd_8254, sd_intr
210 .sdinfo = { 0x00, 0x08, 0x0c, 0x10, 0x14, 0x3f },
212 .has_clk_gat_sce = true,
217 sd_8255, sd_8255, sd_8254, sd_intr
219 .sdinfo = { 0x00, 0x08, 0x10, 0x01 },
224 sd_8255, sd_8255, sd_8254, sd_8254, sd_intr
226 .sdinfo = { 0x00, 0x08, 0x10, 0x14, 0x3f },
228 .has_clk_gat_sce = true,
233 sd_8254, sd_8254, sd_8255, sd_8254, sd_8254, sd_intr
235 .sdinfo = { 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, 0x3f },
237 .has_clk_gat_sce = true,
242 sd_8255, sd_8255, sd_8255, sd_intr
244 .sdinfo = { 0x00, 0x08, 0x10, 0x3f },
249 static int dio200_attach(struct comedi_device *dev, struct comedi_devconfig *it)
253 ret = comedi_request_region(dev, it->options[0], 0x20);
257 return amplc_dio200_common_attach(dev, it->options[1], 0);
260 static struct comedi_driver amplc_dio200_driver = {
261 .driver_name = "amplc_dio200",
262 .module = THIS_MODULE,
263 .attach = dio200_attach,
264 .detach = comedi_legacy_detach,
265 .board_name = &dio200_isa_boards[0].name,
266 .offset = sizeof(struct dio200_board),
267 .num_names = ARRAY_SIZE(dio200_isa_boards),
269 module_comedi_driver(amplc_dio200_driver);
271 MODULE_AUTHOR("Comedi http://www.comedi.org");
272 MODULE_DESCRIPTION("Comedi driver for Amplicon 200 Series ISA DIO boards");
273 MODULE_LICENSE("GPL");