2 * comedi/drivers/cb_pcimdas.c
3 * Comedi driver for Computer Boards PCIM-DAS1602/16 and PCIe-DAS1602/16
5 * COMEDI - Linux Control and Measurement Device Interface
6 * Copyright (C) 2000 David A. Schleef <ds@schleef.org>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
21 * Description: Measurement Computing PCI Migration series boards
22 * Devices: [ComputerBoards] PCIM-DAS1602/16 (cb_pcimdas), PCIe-DAS1602/16
23 * Author: Richard Bytheway
24 * Updated: Mon, 13 Oct 2014 11:57:39 +0000
25 * Status: experimental
27 * Written to support the PCIM-DAS1602/16 and PCIe-DAS1602/16.
29 * Configuration Options:
32 * Manual configuration of PCI(e) cards is not supported; they are configured
35 * Developed from cb_pcidas and skel by Richard Bytheway (mocelet@sucs.org).
36 * Only supports DIO, AO and simple AI in it's present form.
37 * No interrupts, multi channel or FIFO AI,
38 * although the card looks like it could support this.
40 * http://www.mccdaq.com/PDFs/Manuals/pcim-das1602-16.pdf
41 * http://www.mccdaq.com/PDFs/Manuals/pcie-das1602-16.pdf
44 #include <linux/module.h>
45 #include <linux/interrupt.h>
47 #include "../comedi_pci.h"
49 #include "comedi_8254.h"
54 * PCI Bar 1 Register map
55 * see plx9052.h for register and bit defines
59 * PCI Bar 2 Register map (devpriv->daqio)
61 #define PCIMDAS_AI_REG 0x00
62 #define PCIMDAS_AI_SOFTTRIG_REG 0x00
63 #define PCIMDAS_AO_REG(x) (0x02 + ((x) * 2))
66 * PCI Bar 3 Register map (devpriv->BADR3)
68 #define PCIMDAS_MUX_REG 0x00
69 #define PCIMDAS_MUX(_lo, _hi) ((_lo) | ((_hi) << 4))
70 #define PCIMDAS_DI_DO_REG 0x01
71 #define PCIMDAS_STATUS_REG 0x02
72 #define PCIMDAS_STATUS_EOC BIT(7)
73 #define PCIMDAS_STATUS_UB BIT(6)
74 #define PCIMDAS_STATUS_MUX BIT(5)
75 #define PCIMDAS_STATUS_CLK BIT(4)
76 #define PCIMDAS_STATUS_TO_CURR_MUX(x) ((x) & 0xf)
77 #define PCIMDAS_CONV_STATUS_REG 0x03
78 #define PCIMDAS_CONV_STATUS_EOC BIT(7)
79 #define PCIMDAS_CONV_STATUS_EOB BIT(6)
80 #define PCIMDAS_CONV_STATUS_EOA BIT(5)
81 #define PCIMDAS_CONV_STATUS_FNE BIT(4)
82 #define PCIMDAS_CONV_STATUS_FHF BIT(3)
83 #define PCIMDAS_CONV_STATUS_OVERRUN BIT(2)
84 #define PCIMDAS_IRQ_REG 0x04
85 #define PCIMDAS_IRQ_INTE BIT(7)
86 #define PCIMDAS_IRQ_INT BIT(6)
87 #define PCIMDAS_IRQ_OVERRUN BIT(4)
88 #define PCIMDAS_IRQ_EOA BIT(3)
89 #define PCIMDAS_IRQ_EOA_INT_SEL BIT(2)
90 #define PCIMDAS_IRQ_INTSEL(x) ((x) << 0)
91 #define PCIMDAS_IRQ_INTSEL_EOC PCIMDAS_IRQ_INTSEL(0)
92 #define PCIMDAS_IRQ_INTSEL_FNE PCIMDAS_IRQ_INTSEL(1)
93 #define PCIMDAS_IRQ_INTSEL_EOB PCIMDAS_IRQ_INTSEL(2)
94 #define PCIMDAS_IRQ_INTSEL_FHF_EOA PCIMDAS_IRQ_INTSEL(3)
95 #define PCIMDAS_PACER_REG 0x05
96 #define PCIMDAS_PACER_GATE_STATUS BIT(6)
97 #define PCIMDAS_PACER_GATE_POL BIT(5)
98 #define PCIMDAS_PACER_GATE_LATCH BIT(4)
99 #define PCIMDAS_PACER_GATE_EN BIT(3)
100 #define PCIMDAS_PACER_EXT_PACER_POL BIT(2)
101 #define PCIMDAS_PACER_SRC(x) ((x) << 0)
102 #define PCIMDAS_PACER_SRC_POLLED PCIMDAS_PACER_SRC(0)
103 #define PCIMDAS_PACER_SRC_EXT PCIMDAS_PACER_SRC(2)
104 #define PCIMDAS_PACER_SRC_INT PCIMDAS_PACER_SRC(3)
105 #define PCIMDAS_PACER_SRC_MASK (3 << 0)
106 #define PCIMDAS_BURST_REG 0x06
107 #define PCIMDAS_BURST_BME BIT(1)
108 #define PCIMDAS_BURST_CONV_EN BIT(0)
109 #define PCIMDAS_GAIN_REG 0x07
110 #define PCIMDAS_8254_BASE 0x08
111 #define PCIMDAS_USER_CNTR_REG 0x0c
112 #define PCIMDAS_USER_CNTR_CTR1_CLK_SEL BIT(0)
113 #define PCIMDAS_RESIDUE_MSB_REG 0x0d
114 #define PCIMDAS_RESIDUE_LSB_REG 0x0e
117 * PCI Bar 4 Register map (dev->iobase)
119 #define PCIMDAS_8255_BASE 0x00
121 static const struct comedi_lrange cb_pcimdas_ai_bip_range = {
130 static const struct comedi_lrange cb_pcimdas_ai_uni_range = {
140 * The Analog Output range is not programmable. The DAC ranges are
141 * jumper-settable on the board. The settings are not software-readable.
143 static const struct comedi_lrange cb_pcimdas_ao_range = {
155 * this structure is for data unique to this hardware driver. If
156 * several hardware drivers keep similar information in this structure,
157 * feel free to suggest moving the variable to the struct comedi_device
160 struct cb_pcimdas_private {
166 static int cb_pcimdas_ai_eoc(struct comedi_device *dev,
167 struct comedi_subdevice *s,
168 struct comedi_insn *insn,
169 unsigned long context)
171 struct cb_pcimdas_private *devpriv = dev->private;
174 status = inb(devpriv->BADR3 + PCIMDAS_STATUS_REG);
175 if ((status & PCIMDAS_STATUS_EOC) == 0)
180 static int cb_pcimdas_ai_insn_read(struct comedi_device *dev,
181 struct comedi_subdevice *s,
182 struct comedi_insn *insn,
185 struct cb_pcimdas_private *devpriv = dev->private;
186 unsigned int chan = CR_CHAN(insn->chanspec);
187 unsigned int range = CR_RANGE(insn->chanspec);
192 /* only support sw initiated reads from a single channel */
194 /* configure for sw initiated read */
195 d = inb(devpriv->BADR3 + PCIMDAS_PACER_REG);
196 if ((d & PCIMDAS_PACER_SRC_MASK) != PCIMDAS_PACER_SRC_POLLED) {
197 d &= ~PCIMDAS_PACER_SRC_MASK;
198 d |= PCIMDAS_PACER_SRC_POLLED;
199 outb(d, devpriv->BADR3 + PCIMDAS_PACER_REG);
202 /* set bursting off, conversions on */
203 outb(PCIMDAS_BURST_CONV_EN, devpriv->BADR3 + PCIMDAS_BURST_REG);
206 outb(range, devpriv->BADR3 + PCIMDAS_GAIN_REG);
208 /* set mux for single channel scan */
209 outb(PCIMDAS_MUX(chan, chan), devpriv->BADR3 + PCIMDAS_MUX_REG);
211 /* convert n samples */
212 for (n = 0; n < insn->n; n++) {
213 /* trigger conversion */
214 outw(0, devpriv->daqio + PCIMDAS_AI_SOFTTRIG_REG);
216 /* wait for conversion to end */
217 ret = comedi_timeout(dev, s, insn, cb_pcimdas_ai_eoc, 0);
222 data[n] = inw(devpriv->daqio + PCIMDAS_AI_REG);
225 /* return the number of samples read/written */
229 static int cb_pcimdas_ao_insn_write(struct comedi_device *dev,
230 struct comedi_subdevice *s,
231 struct comedi_insn *insn,
234 struct cb_pcimdas_private *devpriv = dev->private;
235 unsigned int chan = CR_CHAN(insn->chanspec);
236 unsigned int val = s->readback[chan];
239 for (i = 0; i < insn->n; i++) {
241 outw(val, devpriv->daqio + PCIMDAS_AO_REG(chan));
243 s->readback[chan] = val;
248 static int cb_pcimdas_di_insn_bits(struct comedi_device *dev,
249 struct comedi_subdevice *s,
250 struct comedi_insn *insn,
253 struct cb_pcimdas_private *devpriv = dev->private;
256 val = inb(devpriv->BADR3 + PCIMDAS_DI_DO_REG);
258 data[1] = val & 0x0f;
263 static int cb_pcimdas_do_insn_bits(struct comedi_device *dev,
264 struct comedi_subdevice *s,
265 struct comedi_insn *insn,
268 struct cb_pcimdas_private *devpriv = dev->private;
270 if (comedi_dio_update_state(s, data))
271 outb(s->state, devpriv->BADR3 + PCIMDAS_DI_DO_REG);
278 static int cb_pcimdas_counter_insn_config(struct comedi_device *dev,
279 struct comedi_subdevice *s,
280 struct comedi_insn *insn,
283 struct cb_pcimdas_private *devpriv = dev->private;
287 case INSN_CONFIG_SET_CLOCK_SRC:
289 case 0: /* internal 100 kHz clock */
290 ctrl = PCIMDAS_USER_CNTR_CTR1_CLK_SEL;
292 case 1: /* external clk on pin 21 */
298 outb(ctrl, devpriv->BADR3 + PCIMDAS_USER_CNTR_REG);
300 case INSN_CONFIG_GET_CLOCK_SRC:
301 ctrl = inb(devpriv->BADR3 + PCIMDAS_USER_CNTR_REG);
302 if (ctrl & PCIMDAS_USER_CNTR_CTR1_CLK_SEL) {
304 data[2] = I8254_OSC_BASE_100KHZ;
317 static unsigned int cb_pcimdas_pacer_clk(struct comedi_device *dev)
319 struct cb_pcimdas_private *devpriv = dev->private;
322 /* The Pacer Clock jumper selects a 10 MHz or 1 MHz clock */
323 status = inb(devpriv->BADR3 + PCIMDAS_STATUS_REG);
324 if (status & PCIMDAS_STATUS_CLK)
325 return I8254_OSC_BASE_10MHZ;
326 return I8254_OSC_BASE_1MHZ;
329 static bool cb_pcimdas_is_ai_se(struct comedi_device *dev)
331 struct cb_pcimdas_private *devpriv = dev->private;
335 * The number of Analog Input channels is set with the
336 * Analog Input Mode Switch on the board. The board can
337 * have 16 single-ended or 8 differential channels.
339 status = inb(devpriv->BADR3 + PCIMDAS_STATUS_REG);
340 return status & PCIMDAS_STATUS_MUX;
343 static bool cb_pcimdas_is_ai_uni(struct comedi_device *dev)
345 struct cb_pcimdas_private *devpriv = dev->private;
349 * The Analog Input range polarity is set with the
350 * Analog Input Polarity Switch on the board. The
351 * inputs can be set to Unipolar or Bipolar ranges.
353 status = inb(devpriv->BADR3 + PCIMDAS_STATUS_REG);
354 return status & PCIMDAS_STATUS_UB;
357 static int cb_pcimdas_auto_attach(struct comedi_device *dev,
358 unsigned long context_unused)
360 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
361 struct cb_pcimdas_private *devpriv;
362 struct comedi_subdevice *s;
365 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
369 ret = comedi_pci_enable(dev);
373 devpriv->daqio = pci_resource_start(pcidev, 2);
374 devpriv->BADR3 = pci_resource_start(pcidev, 3);
375 dev->iobase = pci_resource_start(pcidev, 4);
377 dev->pacer = comedi_8254_init(devpriv->BADR3 + PCIMDAS_8254_BASE,
378 cb_pcimdas_pacer_clk(dev),
383 ret = comedi_alloc_subdevices(dev, 6);
387 /* Analog Input subdevice */
388 s = &dev->subdevices[0];
389 s->type = COMEDI_SUBD_AI;
390 s->subdev_flags = SDF_READABLE;
391 if (cb_pcimdas_is_ai_se(dev)) {
392 s->subdev_flags |= SDF_GROUND;
395 s->subdev_flags |= SDF_DIFF;
399 s->range_table = cb_pcimdas_is_ai_uni(dev) ? &cb_pcimdas_ai_uni_range
400 : &cb_pcimdas_ai_bip_range;
401 s->insn_read = cb_pcimdas_ai_insn_read;
403 /* Analog Output subdevice */
404 s = &dev->subdevices[1];
405 s->type = COMEDI_SUBD_AO;
406 s->subdev_flags = SDF_WRITABLE;
409 s->range_table = &cb_pcimdas_ao_range;
410 s->insn_write = cb_pcimdas_ao_insn_write;
412 ret = comedi_alloc_subdev_readback(s);
416 /* Digital I/O subdevice */
417 s = &dev->subdevices[2];
418 ret = subdev_8255_init(dev, s, NULL, PCIMDAS_8255_BASE);
422 /* Digital Input subdevice (main connector) */
423 s = &dev->subdevices[3];
424 s->type = COMEDI_SUBD_DI;
425 s->subdev_flags = SDF_READABLE;
428 s->range_table = &range_digital;
429 s->insn_bits = cb_pcimdas_di_insn_bits;
431 /* Digital Output subdevice (main connector) */
432 s = &dev->subdevices[4];
433 s->type = COMEDI_SUBD_DO;
434 s->subdev_flags = SDF_WRITABLE;
437 s->range_table = &range_digital;
438 s->insn_bits = cb_pcimdas_do_insn_bits;
440 /* Counter subdevice (8254) */
441 s = &dev->subdevices[5];
442 comedi_8254_subdevice_init(s, dev->pacer);
444 dev->pacer->insn_config = cb_pcimdas_counter_insn_config;
446 /* counters 1 and 2 are used internally for the pacer */
447 comedi_8254_set_busy(dev->pacer, 1, true);
448 comedi_8254_set_busy(dev->pacer, 2, true);
453 static struct comedi_driver cb_pcimdas_driver = {
454 .driver_name = "cb_pcimdas",
455 .module = THIS_MODULE,
456 .auto_attach = cb_pcimdas_auto_attach,
457 .detach = comedi_pci_detach,
460 static int cb_pcimdas_pci_probe(struct pci_dev *dev,
461 const struct pci_device_id *id)
463 return comedi_pci_auto_config(dev, &cb_pcimdas_driver,
467 static const struct pci_device_id cb_pcimdas_pci_table[] = {
468 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0056) }, /* PCIM-DAS1602/16 */
469 { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0115) }, /* PCIe-DAS1602/16 */
472 MODULE_DEVICE_TABLE(pci, cb_pcimdas_pci_table);
474 static struct pci_driver cb_pcimdas_pci_driver = {
475 .name = "cb_pcimdas",
476 .id_table = cb_pcimdas_pci_table,
477 .probe = cb_pcimdas_pci_probe,
478 .remove = comedi_pci_auto_unconfig,
480 module_comedi_pci_driver(cb_pcimdas_driver, cb_pcimdas_pci_driver);
482 MODULE_AUTHOR("Comedi http://www.comedi.org");
483 MODULE_DESCRIPTION("Comedi driver for PCIM-DAS1602/16 and PCIe-DAS1602/16");
484 MODULE_LICENSE("GPL");