2 comedi/drivers/ni_6527.c
3 driver for National Instruments PCI-6527
5 COMEDI - Linux Control and Measurement Device Interface
6 Copyright (C) 1999,2002,2003 David A. Schleef <ds@schleef.org>
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
20 Description: National Instruments 6527
23 Devices: [National Instruments] PCI-6527 (ni6527), PXI-6527
24 Updated: Sat, 25 Jan 2003 13:24:40 -0800
30 Manuals (available from ftp://ftp.natinst.com/support/manuals)
32 370106b.pdf 6527 Register Level Programmer Manual
39 #include <linux/module.h>
40 #include <linux/pci.h>
41 #include <linux/interrupt.h>
43 #include "../comedidev.h"
45 #include "comedi_fc.h"
48 #define DRIVER_NAME "ni_6527"
50 #define NI6527_DIO_SIZE 4096
51 #define NI6527_MITE_SIZE 4096
53 #define Port_Register(x) (0x00+(x))
54 #define ID_Register 0x06
56 #define Clear_Register 0x07
58 #define ClrOverflow 0x04
59 #define ClrFilter 0x02
60 #define ClrInterval 0x01
62 #define Filter_Interval(x) (0x08+(x))
63 #define Filter_Enable(x) (0x0c+(x))
65 #define Change_Status 0x14
66 #define MasterInterruptStatus 0x04
68 #define EdgeStatus 0x01
70 #define Master_Interrupt_Control 0x15
71 #define FallingEdgeIntEnable 0x10
72 #define RisingEdgeIntEnable 0x08
73 #define MasterInterruptEnable 0x04
74 #define OverflowIntEnable 0x02
75 #define EdgeIntEnable 0x01
77 #define Rising_Edge_Detection_Enable(x) (0x018+(x))
78 #define Falling_Edge_Detection_Enable(x) (0x020+(x))
89 static const struct ni6527_board ni6527_boards[] = {
98 struct ni6527_private {
99 struct mite_struct *mite;
100 unsigned int filter_interval;
101 unsigned int filter_enable;
104 static int ni6527_di_insn_config(struct comedi_device *dev,
105 struct comedi_subdevice *s,
106 struct comedi_insn *insn, unsigned int *data)
108 struct ni6527_private *devpriv = dev->private;
109 int chan = CR_CHAN(insn->chanspec);
110 unsigned int interval;
115 if (data[0] != INSN_CONFIG_FILTER)
119 interval = (data[1] + 100) / 200;
120 data[1] = interval * 200;
122 if (interval != devpriv->filter_interval) {
123 writeb(interval & 0xff,
124 devpriv->mite->daq_io_addr + Filter_Interval(0));
125 writeb((interval >> 8) & 0xff,
126 devpriv->mite->daq_io_addr + Filter_Interval(1));
127 writeb((interval >> 16) & 0x0f,
128 devpriv->mite->daq_io_addr + Filter_Interval(2));
131 devpriv->mite->daq_io_addr + Clear_Register);
133 devpriv->filter_interval = interval;
136 devpriv->filter_enable |= 1 << chan;
138 devpriv->filter_enable &= ~(1 << chan);
141 writeb(devpriv->filter_enable,
142 devpriv->mite->daq_io_addr + Filter_Enable(0));
143 writeb(devpriv->filter_enable >> 8,
144 devpriv->mite->daq_io_addr + Filter_Enable(1));
145 writeb(devpriv->filter_enable >> 16,
146 devpriv->mite->daq_io_addr + Filter_Enable(2));
151 static int ni6527_di_insn_bits(struct comedi_device *dev,
152 struct comedi_subdevice *s,
153 struct comedi_insn *insn, unsigned int *data)
155 struct ni6527_private *devpriv = dev->private;
157 data[1] = readb(devpriv->mite->daq_io_addr + Port_Register(0));
158 data[1] |= readb(devpriv->mite->daq_io_addr + Port_Register(1)) << 8;
159 data[1] |= readb(devpriv->mite->daq_io_addr + Port_Register(2)) << 16;
164 static int ni6527_do_insn_bits(struct comedi_device *dev,
165 struct comedi_subdevice *s,
166 struct comedi_insn *insn,
169 struct ni6527_private *devpriv = dev->private;
172 mask = comedi_dio_update_state(s, data);
174 /* Outputs are inverted */
175 if (mask & 0x0000ff) {
176 writeb(s->state ^ 0xff,
177 devpriv->mite->daq_io_addr + Port_Register(3));
179 if (mask & 0x00ff00) {
180 writeb((s->state >> 8) ^ 0xff,
181 devpriv->mite->daq_io_addr + Port_Register(4));
183 if (mask & 0xff0000) {
184 writeb((s->state >> 16) ^ 0xff,
185 devpriv->mite->daq_io_addr + Port_Register(5));
194 static irqreturn_t ni6527_interrupt(int irq, void *d)
196 struct comedi_device *dev = d;
197 struct ni6527_private *devpriv = dev->private;
198 struct comedi_subdevice *s = &dev->subdevices[2];
201 status = readb(devpriv->mite->daq_io_addr + Change_Status);
202 if ((status & MasterInterruptStatus) == 0)
204 if ((status & EdgeStatus) == 0)
207 writeb(ClrEdge | ClrOverflow,
208 devpriv->mite->daq_io_addr + Clear_Register);
210 comedi_buf_put(s->async, 0);
211 s->async->events |= COMEDI_CB_EOS;
212 comedi_event(dev, s);
216 static int ni6527_intr_cmdtest(struct comedi_device *dev,
217 struct comedi_subdevice *s,
218 struct comedi_cmd *cmd)
222 /* Step 1 : check if triggers are trivially valid */
224 err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
225 err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_OTHER);
226 err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW);
227 err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
228 err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT);
233 /* Step 2a : make sure trigger sources are unique */
234 /* Step 2b : and mutually compatible */
239 /* Step 3: check if arguments are trivially valid */
241 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
242 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
243 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
244 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, 1);
245 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
250 /* step 4: fix up any arguments */
258 static int ni6527_intr_cmd(struct comedi_device *dev,
259 struct comedi_subdevice *s)
261 struct ni6527_private *devpriv = dev->private;
262 /* struct comedi_cmd *cmd = &s->async->cmd; */
264 writeb(ClrEdge | ClrOverflow,
265 devpriv->mite->daq_io_addr + Clear_Register);
266 writeb(FallingEdgeIntEnable | RisingEdgeIntEnable |
267 MasterInterruptEnable | EdgeIntEnable,
268 devpriv->mite->daq_io_addr + Master_Interrupt_Control);
273 static int ni6527_intr_cancel(struct comedi_device *dev,
274 struct comedi_subdevice *s)
276 struct ni6527_private *devpriv = dev->private;
278 writeb(0x00, devpriv->mite->daq_io_addr + Master_Interrupt_Control);
283 static int ni6527_intr_insn_bits(struct comedi_device *dev,
284 struct comedi_subdevice *s,
285 struct comedi_insn *insn, unsigned int *data)
291 static int ni6527_intr_insn_config(struct comedi_device *dev,
292 struct comedi_subdevice *s,
293 struct comedi_insn *insn, unsigned int *data)
295 struct ni6527_private *devpriv = dev->private;
299 if (data[0] != INSN_CONFIG_CHANGE_NOTIFY)
303 devpriv->mite->daq_io_addr + Rising_Edge_Detection_Enable(0));
305 devpriv->mite->daq_io_addr + Rising_Edge_Detection_Enable(1));
306 writeb(data[1] >> 16,
307 devpriv->mite->daq_io_addr + Rising_Edge_Detection_Enable(2));
310 devpriv->mite->daq_io_addr + Falling_Edge_Detection_Enable(0));
312 devpriv->mite->daq_io_addr + Falling_Edge_Detection_Enable(1));
313 writeb(data[2] >> 16,
314 devpriv->mite->daq_io_addr + Falling_Edge_Detection_Enable(2));
319 static int ni6527_auto_attach(struct comedi_device *dev,
320 unsigned long context)
322 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
323 const struct ni6527_board *board = NULL;
324 struct ni6527_private *devpriv;
325 struct comedi_subdevice *s;
328 if (context < ARRAY_SIZE(ni6527_boards))
329 board = &ni6527_boards[context];
332 dev->board_ptr = board;
333 dev->board_name = board->name;
335 ret = comedi_pci_enable(dev);
339 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
343 devpriv->mite = mite_alloc(pcidev);
347 ret = mite_setup(devpriv->mite);
349 dev_err(dev->class_dev, "error setting up mite\n");
353 dev_info(dev->class_dev, "board: %s, ID=0x%02x\n", dev->board_name,
354 readb(devpriv->mite->daq_io_addr + ID_Register));
356 ret = comedi_alloc_subdevices(dev, 3);
360 s = &dev->subdevices[0];
361 s->type = COMEDI_SUBD_DI;
362 s->subdev_flags = SDF_READABLE;
364 s->range_table = &range_digital;
366 s->insn_config = ni6527_di_insn_config;
367 s->insn_bits = ni6527_di_insn_bits;
369 s = &dev->subdevices[1];
370 s->type = COMEDI_SUBD_DO;
371 s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
373 s->range_table = &range_unknown; /* FIXME: actually conductance */
375 s->insn_bits = ni6527_do_insn_bits;
377 s = &dev->subdevices[2];
378 dev->read_subdev = s;
379 s->type = COMEDI_SUBD_DI;
380 s->subdev_flags = SDF_READABLE | SDF_CMD_READ;
382 s->range_table = &range_unknown;
384 s->do_cmdtest = ni6527_intr_cmdtest;
385 s->do_cmd = ni6527_intr_cmd;
386 s->cancel = ni6527_intr_cancel;
387 s->insn_bits = ni6527_intr_insn_bits;
388 s->insn_config = ni6527_intr_insn_config;
390 writeb(0x00, devpriv->mite->daq_io_addr + Filter_Enable(0));
391 writeb(0x00, devpriv->mite->daq_io_addr + Filter_Enable(1));
392 writeb(0x00, devpriv->mite->daq_io_addr + Filter_Enable(2));
394 writeb(ClrEdge | ClrOverflow | ClrFilter | ClrInterval,
395 devpriv->mite->daq_io_addr + Clear_Register);
396 writeb(0x00, devpriv->mite->daq_io_addr + Master_Interrupt_Control);
398 ret = request_irq(mite_irq(devpriv->mite), ni6527_interrupt,
399 IRQF_SHARED, DRIVER_NAME, dev);
401 dev_warn(dev->class_dev, "irq not available\n");
403 dev->irq = mite_irq(devpriv->mite);
408 static void ni6527_detach(struct comedi_device *dev)
410 struct ni6527_private *devpriv = dev->private;
412 if (devpriv && devpriv->mite && devpriv->mite->daq_io_addr)
414 devpriv->mite->daq_io_addr + Master_Interrupt_Control);
416 free_irq(dev->irq, dev);
417 if (devpriv && devpriv->mite) {
418 mite_unsetup(devpriv->mite);
419 mite_free(devpriv->mite);
421 comedi_pci_disable(dev);
424 static struct comedi_driver ni6527_driver = {
425 .driver_name = DRIVER_NAME,
426 .module = THIS_MODULE,
427 .auto_attach = ni6527_auto_attach,
428 .detach = ni6527_detach,
431 static int ni6527_pci_probe(struct pci_dev *dev,
432 const struct pci_device_id *id)
434 return comedi_pci_auto_config(dev, &ni6527_driver, id->driver_data);
437 static DEFINE_PCI_DEVICE_TABLE(ni6527_pci_table) = {
438 { PCI_VDEVICE(NI, 0x2b10), BOARD_PXI6527 },
439 { PCI_VDEVICE(NI, 0x2b20), BOARD_PCI6527 },
442 MODULE_DEVICE_TABLE(pci, ni6527_pci_table);
444 static struct pci_driver ni6527_pci_driver = {
446 .id_table = ni6527_pci_table,
447 .probe = ni6527_pci_probe,
448 .remove = comedi_pci_auto_unconfig,
450 module_comedi_pci_driver(ni6527_driver, ni6527_pci_driver);
452 MODULE_AUTHOR("Comedi http://www.comedi.org");
453 MODULE_DESCRIPTION("Comedi low-level driver");
454 MODULE_LICENSE("GPL");