2 comedi/drivers/ni_6527.c
3 driver for National Instruments PCI-6527
5 COMEDI - Linux Control and Measurement Device Interface
6 Copyright (C) 1999,2002,2003 David A. Schleef <ds@schleef.org>
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 Description: National Instruments 6527
28 Devices: [National Instruments] PCI-6527 (ni6527), PXI-6527
29 Updated: Sat, 25 Jan 2003 13:24:40 -0800
35 Manuals (available from ftp://ftp.natinst.com/support/manuals)
37 370106b.pdf 6527 Register Level Programmer Manual
44 #include <linux/pci.h>
45 #include <linux/interrupt.h>
47 #include "../comedidev.h"
49 #include "comedi_fc.h"
52 #define DRIVER_NAME "ni_6527"
54 #define NI6527_DIO_SIZE 4096
55 #define NI6527_MITE_SIZE 4096
57 #define Port_Register(x) (0x00+(x))
58 #define ID_Register 0x06
60 #define Clear_Register 0x07
62 #define ClrOverflow 0x04
63 #define ClrFilter 0x02
64 #define ClrInterval 0x01
66 #define Filter_Interval(x) (0x08+(x))
67 #define Filter_Enable(x) (0x0c+(x))
69 #define Change_Status 0x14
70 #define MasterInterruptStatus 0x04
72 #define EdgeStatus 0x01
74 #define Master_Interrupt_Control 0x15
75 #define FallingEdgeIntEnable 0x10
76 #define RisingEdgeIntEnable 0x08
77 #define MasterInterruptEnable 0x04
78 #define OverflowIntEnable 0x02
79 #define EdgeIntEnable 0x01
81 #define Rising_Edge_Detection_Enable(x) (0x018+(x))
82 #define Falling_Edge_Detection_Enable(x) (0x020+(x))
93 static const struct ni6527_board ni6527_boards[] = {
102 struct ni6527_private {
103 struct mite_struct *mite;
104 unsigned int filter_interval;
105 unsigned int filter_enable;
108 static int ni6527_di_insn_config(struct comedi_device *dev,
109 struct comedi_subdevice *s,
110 struct comedi_insn *insn, unsigned int *data)
112 struct ni6527_private *devpriv = dev->private;
113 int chan = CR_CHAN(insn->chanspec);
114 unsigned int interval;
119 if (data[0] != INSN_CONFIG_FILTER)
123 interval = (data[1] + 100) / 200;
124 data[1] = interval * 200;
126 if (interval != devpriv->filter_interval) {
127 writeb(interval & 0xff,
128 devpriv->mite->daq_io_addr + Filter_Interval(0));
129 writeb((interval >> 8) & 0xff,
130 devpriv->mite->daq_io_addr + Filter_Interval(1));
131 writeb((interval >> 16) & 0x0f,
132 devpriv->mite->daq_io_addr + Filter_Interval(2));
135 devpriv->mite->daq_io_addr + Clear_Register);
137 devpriv->filter_interval = interval;
140 devpriv->filter_enable |= 1 << chan;
142 devpriv->filter_enable &= ~(1 << chan);
145 writeb(devpriv->filter_enable,
146 devpriv->mite->daq_io_addr + Filter_Enable(0));
147 writeb(devpriv->filter_enable >> 8,
148 devpriv->mite->daq_io_addr + Filter_Enable(1));
149 writeb(devpriv->filter_enable >> 16,
150 devpriv->mite->daq_io_addr + Filter_Enable(2));
155 static int ni6527_di_insn_bits(struct comedi_device *dev,
156 struct comedi_subdevice *s,
157 struct comedi_insn *insn, unsigned int *data)
159 struct ni6527_private *devpriv = dev->private;
161 data[1] = readb(devpriv->mite->daq_io_addr + Port_Register(0));
162 data[1] |= readb(devpriv->mite->daq_io_addr + Port_Register(1)) << 8;
163 data[1] |= readb(devpriv->mite->daq_io_addr + Port_Register(2)) << 16;
168 static int ni6527_do_insn_bits(struct comedi_device *dev,
169 struct comedi_subdevice *s,
170 struct comedi_insn *insn, unsigned int *data)
172 struct ni6527_private *devpriv = dev->private;
175 s->state &= ~data[0];
176 s->state |= (data[0] & data[1]);
178 /* The open relay state on the board cooresponds to 1,
179 * but in Comedi, it is represented by 0. */
180 if (data[0] & 0x0000ff) {
181 writeb((s->state ^ 0xff),
182 devpriv->mite->daq_io_addr + Port_Register(3));
184 if (data[0] & 0x00ff00) {
185 writeb((s->state >> 8) ^ 0xff,
186 devpriv->mite->daq_io_addr + Port_Register(4));
188 if (data[0] & 0xff0000) {
189 writeb((s->state >> 16) ^ 0xff,
190 devpriv->mite->daq_io_addr + Port_Register(5));
198 static irqreturn_t ni6527_interrupt(int irq, void *d)
200 struct comedi_device *dev = d;
201 struct ni6527_private *devpriv = dev->private;
202 struct comedi_subdevice *s = &dev->subdevices[2];
205 status = readb(devpriv->mite->daq_io_addr + Change_Status);
206 if ((status & MasterInterruptStatus) == 0)
208 if ((status & EdgeStatus) == 0)
211 writeb(ClrEdge | ClrOverflow,
212 devpriv->mite->daq_io_addr + Clear_Register);
214 comedi_buf_put(s->async, 0);
215 s->async->events |= COMEDI_CB_EOS;
216 comedi_event(dev, s);
220 static int ni6527_intr_cmdtest(struct comedi_device *dev,
221 struct comedi_subdevice *s,
222 struct comedi_cmd *cmd)
226 /* Step 1 : check if triggers are trivially valid */
228 err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
229 err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_OTHER);
230 err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW);
231 err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
232 err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT);
237 /* Step 2a : make sure trigger sources are unique */
238 /* Step 2b : and mutually compatible */
243 /* Step 3: check if arguments are trivially valid */
245 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
246 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
247 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
248 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, 1);
249 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
254 /* step 4: fix up any arguments */
262 static int ni6527_intr_cmd(struct comedi_device *dev,
263 struct comedi_subdevice *s)
265 struct ni6527_private *devpriv = dev->private;
266 /* struct comedi_cmd *cmd = &s->async->cmd; */
268 writeb(ClrEdge | ClrOverflow,
269 devpriv->mite->daq_io_addr + Clear_Register);
270 writeb(FallingEdgeIntEnable | RisingEdgeIntEnable |
271 MasterInterruptEnable | EdgeIntEnable,
272 devpriv->mite->daq_io_addr + Master_Interrupt_Control);
277 static int ni6527_intr_cancel(struct comedi_device *dev,
278 struct comedi_subdevice *s)
280 struct ni6527_private *devpriv = dev->private;
282 writeb(0x00, devpriv->mite->daq_io_addr + Master_Interrupt_Control);
287 static int ni6527_intr_insn_bits(struct comedi_device *dev,
288 struct comedi_subdevice *s,
289 struct comedi_insn *insn, unsigned int *data)
295 static int ni6527_intr_insn_config(struct comedi_device *dev,
296 struct comedi_subdevice *s,
297 struct comedi_insn *insn, unsigned int *data)
299 struct ni6527_private *devpriv = dev->private;
303 if (data[0] != INSN_CONFIG_CHANGE_NOTIFY)
307 devpriv->mite->daq_io_addr + Rising_Edge_Detection_Enable(0));
309 devpriv->mite->daq_io_addr + Rising_Edge_Detection_Enable(1));
310 writeb(data[1] >> 16,
311 devpriv->mite->daq_io_addr + Rising_Edge_Detection_Enable(2));
314 devpriv->mite->daq_io_addr + Falling_Edge_Detection_Enable(0));
316 devpriv->mite->daq_io_addr + Falling_Edge_Detection_Enable(1));
317 writeb(data[2] >> 16,
318 devpriv->mite->daq_io_addr + Falling_Edge_Detection_Enable(2));
323 static int ni6527_auto_attach(struct comedi_device *dev,
324 unsigned long context)
326 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
327 const struct ni6527_board *board = NULL;
328 struct ni6527_private *devpriv;
329 struct comedi_subdevice *s;
332 if (context < ARRAY_SIZE(ni6527_boards))
333 board = &ni6527_boards[context];
336 dev->board_ptr = board;
337 dev->board_name = board->name;
339 ret = comedi_pci_enable(dev);
343 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
346 dev->private = devpriv;
348 devpriv->mite = mite_alloc(pcidev);
352 ret = mite_setup(devpriv->mite);
354 dev_err(dev->class_dev, "error setting up mite\n");
358 dev_info(dev->class_dev, "board: %s, ID=0x%02x\n", dev->board_name,
359 readb(devpriv->mite->daq_io_addr + ID_Register));
361 ret = comedi_alloc_subdevices(dev, 3);
365 s = &dev->subdevices[0];
366 s->type = COMEDI_SUBD_DI;
367 s->subdev_flags = SDF_READABLE;
369 s->range_table = &range_digital;
371 s->insn_config = ni6527_di_insn_config;
372 s->insn_bits = ni6527_di_insn_bits;
374 s = &dev->subdevices[1];
375 s->type = COMEDI_SUBD_DO;
376 s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
378 s->range_table = &range_unknown; /* FIXME: actually conductance */
380 s->insn_bits = ni6527_do_insn_bits;
382 s = &dev->subdevices[2];
383 dev->read_subdev = s;
384 s->type = COMEDI_SUBD_DI;
385 s->subdev_flags = SDF_READABLE | SDF_CMD_READ;
387 s->range_table = &range_unknown;
389 s->do_cmdtest = ni6527_intr_cmdtest;
390 s->do_cmd = ni6527_intr_cmd;
391 s->cancel = ni6527_intr_cancel;
392 s->insn_bits = ni6527_intr_insn_bits;
393 s->insn_config = ni6527_intr_insn_config;
395 writeb(0x00, devpriv->mite->daq_io_addr + Filter_Enable(0));
396 writeb(0x00, devpriv->mite->daq_io_addr + Filter_Enable(1));
397 writeb(0x00, devpriv->mite->daq_io_addr + Filter_Enable(2));
399 writeb(ClrEdge | ClrOverflow | ClrFilter | ClrInterval,
400 devpriv->mite->daq_io_addr + Clear_Register);
401 writeb(0x00, devpriv->mite->daq_io_addr + Master_Interrupt_Control);
403 ret = request_irq(mite_irq(devpriv->mite), ni6527_interrupt,
404 IRQF_SHARED, DRIVER_NAME, dev);
406 dev_warn(dev->class_dev, "irq not available\n");
408 dev->irq = mite_irq(devpriv->mite);
413 static void ni6527_detach(struct comedi_device *dev)
415 struct ni6527_private *devpriv = dev->private;
417 if (devpriv && devpriv->mite && devpriv->mite->daq_io_addr)
419 devpriv->mite->daq_io_addr + Master_Interrupt_Control);
421 free_irq(dev->irq, dev);
422 if (devpriv && devpriv->mite) {
423 mite_unsetup(devpriv->mite);
424 mite_free(devpriv->mite);
426 comedi_pci_disable(dev);
429 static struct comedi_driver ni6527_driver = {
430 .driver_name = DRIVER_NAME,
431 .module = THIS_MODULE,
432 .auto_attach = ni6527_auto_attach,
433 .detach = ni6527_detach,
436 static int ni6527_pci_probe(struct pci_dev *dev,
437 const struct pci_device_id *id)
439 return comedi_pci_auto_config(dev, &ni6527_driver, id->driver_data);
442 static DEFINE_PCI_DEVICE_TABLE(ni6527_pci_table) = {
443 { PCI_VDEVICE(NI, 0x2b10), BOARD_PXI6527 },
444 { PCI_VDEVICE(NI, 0x2b20), BOARD_PCI6527 },
447 MODULE_DEVICE_TABLE(pci, ni6527_pci_table);
449 static struct pci_driver ni6527_pci_driver = {
451 .id_table = ni6527_pci_table,
452 .probe = ni6527_pci_probe,
453 .remove = comedi_pci_auto_unconfig,
455 module_comedi_pci_driver(ni6527_driver, ni6527_pci_driver);
457 MODULE_AUTHOR("Comedi http://www.comedi.org");
458 MODULE_DESCRIPTION("Comedi low-level driver");
459 MODULE_LICENSE("GPL");