2 comedi/drivers/ni_at_ao.c
3 Driver for NI AT-AO-6/10 boards
5 COMEDI - Linux Control and Measurement Device Interface
6 Copyright (C) 2000,2002 David A. Schleef <ds@schleef.org>
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
20 Description: National Instruments AT-AO-6/10
21 Devices: [National Instruments] AT-AO-6 (at-ao-6), AT-AO-10 (at-ao-10)
24 Updated: Sun Dec 26 12:26:28 EST 2004
26 Configuration options:
27 [0] - I/O port base address
30 [3] - analog output range, set by jumpers on hardware (0 for -10 to 10V
31 bipolar, 1 for 0V to 10V unipolar)
35 * Register-level programming information can be found in NI
36 * document 320379.pdf.
39 #include <linux/module.h>
40 #include "../comedidev.h"
45 #define ATAO_DIO_REG 0x00
46 #define ATAO_CFG2 0x02 /* W 16 */
47 #define CALLD1 (1 << 15)
48 #define CALLD0 (1 << 14)
49 #define FFRTEN (1 << 13)
50 #define DAC2S8 (1 << 12)
51 #define DAC2S6 (1 << 11)
52 #define DAC2S4 (1 << 10)
53 #define DAC2S2 (1 << 9)
54 #define DAC2S0 (1 << 8)
55 #define LDAC8 (1 << 7)
56 #define LDAC6 (1 << 6)
57 #define LDAC4 (1 << 5)
58 #define LDAC2 (1 << 4)
59 #define LDAC0 (1 << 3)
60 #define PROMEN (1 << 2)
62 #define SDATA (1 << 0)
63 #define ATAO_CFG3 0x04 /* W 16 */
64 #define DMAMODE (1 << 6)
65 #define CLKOUT (1 << 5)
66 #define RCLKEN (1 << 4)
67 #define DOUTEN2 (1 << 3)
68 #define DOUTEN1 (1 << 2)
69 #define EN2_5V (1 << 1)
70 #define SCANEN (1 << 0)
71 #define ATAO_82C53_BASE 0x06 /* RW 8 */
72 #define ATAO_82C53_CNTR1 0x06 /* RW 8 */
73 #define ATAO_82C53_CNTR2 0x07 /* RW 8 */
74 #define ATAO_82C53_CNTR3 0x08 /* RW 8 */
75 #define ATAO_82C53_CNTRCMD 0x09 /* W 8 */
76 #define CNTRSEL1 (1 << 7)
77 #define CNTRSEL0 (1 << 6)
78 #define RWSEL1 (1 << 5)
79 #define RWSEL0 (1 << 4)
80 #define MODESEL2 (1 << 3)
81 #define MODESEL1 (1 << 2)
82 #define MODESEL0 (1 << 1)
83 #define BCDSEL (1 << 0)
84 /* read-back command */
85 #define COUNT (1 << 5)
86 #define STATUS (1 << 4)
87 #define CNTR3 (1 << 3)
88 #define CNTR2 (1 << 2)
89 #define CNTR1 (1 << 1)
92 #define _NULL (1 << 6)
95 #define MODE2 (1 << 3)
96 #define MODE1 (1 << 2)
97 #define MODE0 (1 << 1)
99 #define ATAO_CFG1_REG 0x0a
100 #define ATAO_CFG1_EXTINT2EN (1 << 15)
101 #define ATAO_CFG1_EXTINT1EN (1 << 14)
102 #define ATAO_CFG1_CNTINT2EN (1 << 13)
103 #define ATAO_CFG1_CNTINT1EN (1 << 12)
104 #define ATAO_CFG1_TCINTEN (1 << 11)
105 #define ATAO_CFG1_CNT1SRC (1 << 10)
106 #define ATAO_CFG1_CNT2SRC (1 << 9)
107 #define ATAO_CFG1_FIFOEN (1 << 8)
108 #define ATAO_CFG1_GRP2WR (1 << 7)
109 #define ATAO_CFG1_EXTUPDEN (1 << 6)
110 #define ATAO_CFG1_DMARQ (1 << 5)
111 #define ATAO_CFG1_DMAEN (1 << 4)
112 #define ATAO_CFG1_CH(x) (((x) & 0xf) << 0)
113 #define ATAO_STATUS_REG 0x0a
114 #define ATAO_STATUS_FH (1 << 6)
115 #define ATAO_STATUS_FE (1 << 5)
116 #define ATAO_STATUS_FF (1 << 4)
117 #define ATAO_STATUS_INT2 (1 << 3)
118 #define ATAO_STATUS_INT1 (1 << 2)
119 #define ATAO_STATUS_TCINT (1 << 1)
120 #define ATAO_STATUS_PROMOUT (1 << 0)
121 #define ATAO_FIFO_WRITE 0x0c /* W 16 */
122 #define ATAO_FIFO_CLEAR 0x0c /* R 16 */
123 #define ATAO_DACn(x) (0x0c + ((x) * 2)) /* W */
125 /* registers with _2_ are accessed when GRP2WR is set in CFG1 */
127 #define ATAO_2_DMATCCLR 0x00 /* W 16 */
128 #define ATAO_2_INT1CLR 0x02 /* W 16 */
129 #define ATAO_2_INT2CLR 0x04 /* W 16 */
130 #define ATAO_2_RTSISHFT 0x06 /* W 8 */
131 #define ATAO_RTSISHFT_RSI (1 << 0)
132 #define ATAO_2_RTSISTRB 0x07 /* W 8 */
135 * Board descriptions for two imaginary boards. Describing the
136 * boards in this way is optional, and completely driver-dependent.
137 * Some drivers use arrays such as this, other do not.
144 struct atao_private {
150 /* Used for AO readback */
151 unsigned int ao_readback[10];
154 static void atao_reset(struct comedi_device *dev)
156 struct atao_private *devpriv = dev->private;
158 /* This is the reset sequence described in the manual */
161 outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG);
163 outb(RWSEL0 | MODESEL2, dev->iobase + ATAO_82C53_CNTRCMD);
164 outb(0x03, dev->iobase + ATAO_82C53_CNTR1);
165 outb(CNTRSEL0 | RWSEL0 | MODESEL2, dev->iobase + ATAO_82C53_CNTRCMD);
168 outw(devpriv->cfg2, dev->iobase + ATAO_CFG2);
171 outw(devpriv->cfg3, dev->iobase + ATAO_CFG3);
173 inw(dev->iobase + ATAO_FIFO_CLEAR);
175 devpriv->cfg1 |= ATAO_CFG1_GRP2WR;
176 outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG);
178 outw(0, dev->iobase + ATAO_2_INT1CLR);
179 outw(0, dev->iobase + ATAO_2_INT2CLR);
180 outw(0, dev->iobase + ATAO_2_DMATCCLR);
182 devpriv->cfg1 &= ~ATAO_CFG1_GRP2WR;
183 outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG);
186 static int atao_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
187 struct comedi_insn *insn, unsigned int *data)
189 struct atao_private *devpriv = dev->private;
191 int chan = CR_CHAN(insn->chanspec);
194 for (i = 0; i < insn->n; i++) {
195 bits = data[i] - 0x800;
197 devpriv->cfg1 |= ATAO_CFG1_GRP2WR;
198 outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG);
200 outw(bits, dev->iobase + ATAO_DACn(chan));
202 devpriv->cfg1 &= ~ATAO_CFG1_GRP2WR;
203 outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG);
205 devpriv->ao_readback[chan] = data[i];
211 static int atao_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
212 struct comedi_insn *insn, unsigned int *data)
214 struct atao_private *devpriv = dev->private;
216 int chan = CR_CHAN(insn->chanspec);
218 for (i = 0; i < insn->n; i++)
219 data[i] = devpriv->ao_readback[chan];
224 static int atao_dio_insn_bits(struct comedi_device *dev,
225 struct comedi_subdevice *s,
226 struct comedi_insn *insn,
229 if (comedi_dio_update_state(s, data))
230 outw(s->state, dev->iobase + ATAO_DIO_REG);
232 data[1] = inw(dev->iobase + ATAO_DIO_REG);
237 static int atao_dio_insn_config(struct comedi_device *dev,
238 struct comedi_subdevice *s,
239 struct comedi_insn *insn,
242 struct atao_private *devpriv = dev->private;
243 unsigned int chan = CR_CHAN(insn->chanspec);
252 ret = comedi_dio_insn_config(dev, s, insn, data, mask);
256 if (s->io_bits & 0x0f)
257 devpriv->cfg3 |= DOUTEN1;
259 devpriv->cfg3 &= ~DOUTEN1;
260 if (s->io_bits & 0xf0)
261 devpriv->cfg3 |= DOUTEN2;
263 devpriv->cfg3 &= ~DOUTEN2;
265 outw(devpriv->cfg3, dev->iobase + ATAO_CFG3);
271 * Figure 2-1 in the manual shows 3 chips labeled DAC8800, which
272 * are 8-channel 8-bit DACs. These are most likely the calibration
273 * DACs. It is not explicitly stated in the manual how to access
274 * the caldacs, but we can guess.
276 static int atao_calib_insn_read(struct comedi_device *dev,
277 struct comedi_subdevice *s,
278 struct comedi_insn *insn, unsigned int *data)
281 for (i = 0; i < insn->n; i++)
282 data[i] = 0; /* XXX */
286 static int atao_calib_insn_write(struct comedi_device *dev,
287 struct comedi_subdevice *s,
288 struct comedi_insn *insn, unsigned int *data)
290 struct atao_private *devpriv = dev->private;
291 unsigned int bitstring, bit;
292 unsigned int chan = CR_CHAN(insn->chanspec);
294 bitstring = ((chan & 0x7) << 8) | (data[insn->n - 1] & 0xff);
296 for (bit = 1 << (11 - 1); bit; bit >>= 1) {
297 outw(devpriv->cfg2 | ((bit & bitstring) ? SDATA : 0),
298 dev->iobase + ATAO_CFG2);
299 outw(devpriv->cfg2 | SCLK | ((bit & bitstring) ? SDATA : 0),
300 dev->iobase + ATAO_CFG2);
302 /* strobe the appropriate caldac */
303 outw(devpriv->cfg2 | (((chan >> 3) + 1) << 14),
304 dev->iobase + ATAO_CFG2);
305 outw(devpriv->cfg2, dev->iobase + ATAO_CFG2);
310 static int atao_attach(struct comedi_device *dev, struct comedi_devconfig *it)
312 const struct atao_board *board = comedi_board(dev);
313 struct atao_private *devpriv;
314 struct comedi_subdevice *s;
318 ao_unipolar = it->options[3];
320 ret = comedi_request_region(dev, it->options[0], 0x20);
324 devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
328 ret = comedi_alloc_subdevices(dev, 4);
332 s = &dev->subdevices[0];
333 /* analog output subdevice */
334 s->type = COMEDI_SUBD_AO;
335 s->subdev_flags = SDF_WRITABLE;
336 s->n_chan = board->n_ao_chans;
337 s->maxdata = (1 << 12) - 1;
339 s->range_table = &range_unipolar10;
341 s->range_table = &range_bipolar10;
342 s->insn_write = &atao_ao_winsn;
343 s->insn_read = &atao_ao_rinsn;
345 s = &dev->subdevices[1];
346 /* digital i/o subdevice */
347 s->type = COMEDI_SUBD_DIO;
348 s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
351 s->range_table = &range_digital;
352 s->insn_bits = atao_dio_insn_bits;
353 s->insn_config = atao_dio_insn_config;
355 s = &dev->subdevices[2];
356 /* caldac subdevice */
357 s->type = COMEDI_SUBD_CALIB;
358 s->subdev_flags = SDF_WRITABLE | SDF_INTERNAL;
361 s->insn_read = atao_calib_insn_read;
362 s->insn_write = atao_calib_insn_write;
364 s = &dev->subdevices[3];
365 /* eeprom subdevice */
366 /* s->type=COMEDI_SUBD_EEPROM; */
367 s->type = COMEDI_SUBD_UNUSED;
371 printk(KERN_INFO "\n");
376 static const struct atao_board atao_boards[] = {
386 static struct comedi_driver ni_at_ao_driver = {
387 .driver_name = "ni_at_ao",
388 .module = THIS_MODULE,
389 .attach = atao_attach,
390 .detach = comedi_legacy_detach,
391 .board_name = &atao_boards[0].name,
392 .offset = sizeof(struct atao_board),
393 .num_names = ARRAY_SIZE(atao_boards),
395 module_comedi_driver(ni_at_ao_driver);
397 MODULE_AUTHOR("Comedi http://www.comedi.org");
398 MODULE_DESCRIPTION("Comedi low-level driver");
399 MODULE_LICENSE("GPL");