drivers/staging/comedi/drivers/ni_labpc.c

   1 /*
   2     comedi/drivers/ni_labpc.c
   3     Driver for National Instruments Lab-PC series boards and compatibles
   4     Copyright (C) 2001, 2002, 2003 Frank Mori Hess <fmhess@users.sourceforge.net>
   5
   6     This program is free software; you can redistribute it and/or modify
   7     it under the terms of the GNU General Public License as published by
   8     the Free Software Foundation; either version 2 of the License, or
   9     (at your option) any later version.
  10
  11     This program is distributed in the hope that it will be useful,
  12     but WITHOUT ANY WARRANTY; without even the implied warranty of
  13     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14     GNU General Public License for more details.
  15
  16     You should have received a copy of the GNU General Public License
  17     along with this program; if not, write to the Free Software
  18     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19
  20 ************************************************************************
  21 */
  22 /*
  23 Driver: ni_labpc
  24 Description: National Instruments Lab-PC (& compatibles)
  25 Author: Frank Mori Hess <fmhess@users.sourceforge.net>
  26 Devices: [National Instruments] Lab-PC-1200 (labpc-1200),
  27   Lab-PC-1200AI (labpc-1200ai), Lab-PC+ (lab-pc+), PCI-1200 (ni_labpc)
  28 Status: works
  29
  30 Tested with lab-pc-1200.  For the older Lab-PC+, not all input ranges
  31 and analog references will work, the available ranges/arefs will
  32 depend on how you have configured the jumpers on your board
  33 (see your owner's manual).
  34
  35 Kernel-level ISA plug-and-play support for the lab-pc-1200
  36 boards has not
  37 yet been added to the driver, mainly due to the fact that
  38 I don't know the device id numbers.  If you have one
  39 of these boards,
  40 please file a bug report at http://comedi.org/
  41 so I can get the necessary information from you.
  42
  43 The 1200 series boards have onboard calibration dacs for correcting
  44 analog input/output offsets and gains.  The proper settings for these
  45 caldacs are stored on the board's eeprom.  To read the caldac values
  46 from the eeprom and store them into a file that can be then be used by
  47 comedilib, use the comedi_calibrate program.
  48
  49 Configuration options - ISA boards:
  50   [0] - I/O port base address
  51   [1] - IRQ (optional, required for timed or externally triggered conversions)
  52   [2] - DMA channel (optional)
  53
  54 Configuration options - PCI boards:
  55   [0] - bus (optional)
  56   [1] - slot (optional)
  57
  58 The Lab-pc+ has quirky chanlist requirements
  59 when scanning multiple channels.  Multiple channel scan
  60 sequence must start at highest channel, then decrement down to
  61 channel 0.  The rest of the cards can scan down like lab-pc+ or scan
  62 up from channel zero.  Chanlists consisting of all one channel
  63 are also legal, and allow you to pace conversions in bursts.
  64
  65 */
  66
  67 /*
  68
  69 NI manuals:
  70 341309a (labpc-1200 register manual)
  71 340914a (pci-1200)
  72 320502b (lab-pc+)
  73
  74 */
  75
  76 #include <linux/pci.h>
  77 #include <linux/interrupt.h>
  78 #include <linux/slab.h>
  79 #include <linux/io.h>
  80 #include <linux/delay.h>
  81
  82 #include "../comedidev.h"
  83
  84 #include <asm/dma.h>
  85
  86 #include "8253.h"
  87 #include "8255.h"
  88 #include "mite.h"
  89 #include "comedi_fc.h"
  90 #include "ni_labpc.h"
  91
  92 /* size of io region used by board */
  93 #define LABPC_SIZE           32
  94 /* 2 MHz master clock */
  95 #define LABPC_TIMER_BASE            500
  96
  97 /* Registers for the lab-pc+ */
  98
  99 /* write-only registers */
 100 #define COMMAND1_REG    0x0
 101 #define   ADC_GAIN_MASK (0x7 << 4)
 102 #define   ADC_CHAN_BITS(x)      ((x) & 0x7)
 103 /* enables multi channel scans */
 104 #define   ADC_SCAN_EN_BIT       0x80
 105 #define COMMAND2_REG    0x1
 106 /* enable pretriggering (used in conjunction with SWTRIG) */
 107 #define   PRETRIG_BIT   0x1
 108 /* enable paced conversions on external trigger */
 109 #define   HWTRIG_BIT    0x2
 110 /* enable paced conversions */
 111 #define   SWTRIG_BIT    0x4
 112 /* use two cascaded counters for pacing */
 113 #define   CASCADE_BIT   0x8
 114 #define   DAC_PACED_BIT(channel)        (0x40 << ((channel) & 0x1))
 115 #define COMMAND3_REG    0x2
 116 /* enable dma transfers */
 117 #define   DMA_EN_BIT    0x1
 118 /* enable interrupts for 8255 */
 119 #define   DIO_INTR_EN_BIT       0x2
 120 /* enable dma terminal count interrupt */
 121 #define   DMATC_INTR_EN_BIT     0x4
 122 /* enable timer interrupt */
 123 #define   TIMER_INTR_EN_BIT     0x8
 124 /* enable error interrupt */
 125 #define   ERR_INTR_EN_BIT       0x10
 126 /* enable fifo not empty interrupt */
 127 #define   ADC_FNE_INTR_EN_BIT   0x20
 128 #define ADC_CONVERT_REG 0x3
 129 #define DAC_LSB_REG(channel)    (0x4 + 2 * ((channel) & 0x1))
 130 #define DAC_MSB_REG(channel)    (0x5 + 2 * ((channel) & 0x1))
 131 #define ADC_CLEAR_REG   0x8
 132 #define DMATC_CLEAR_REG 0xa
 133 #define TIMER_CLEAR_REG 0xc
 134 /* 1200 boards only */
 135 #define COMMAND6_REG    0xe
 136 /* select ground or common-mode reference */
 137 #define   ADC_COMMON_BIT        0x1
 138 /*  adc unipolar */
 139 #define   ADC_UNIP_BIT  0x2
 140 /*  dac unipolar */
 141 #define   DAC_UNIP_BIT(channel) (0x4 << ((channel) & 0x1))
 142 /* enable fifo half full interrupt */
 143 #define   ADC_FHF_INTR_EN_BIT   0x20
 144 /* enable interrupt on end of hardware count */
 145 #define   A1_INTR_EN_BIT        0x40
 146 /* scan up from channel zero instead of down to zero */
 147 #define   ADC_SCAN_UP_BIT 0x80
 148 #define COMMAND4_REG    0xf
 149 /* enables 'interval' scanning */
 150 #define   INTERVAL_SCAN_EN_BIT  0x1
 151 /* enables external signal on counter b1 output to trigger scan */
 152 #define   EXT_SCAN_EN_BIT       0x2
 153 /* chooses direction (output or input) for EXTCONV* line */
 154 #define   EXT_CONVERT_OUT_BIT   0x4
 155 /* chooses differential inputs for adc (in conjunction with board jumper) */
 156 #define   ADC_DIFF_BIT  0x8
 157 #define   EXT_CONVERT_DISABLE_BIT       0x10
 158 /* 1200 boards only, calibration stuff */
 159 #define COMMAND5_REG    0x1c
 160 /* enable eeprom for write */
 161 #define   EEPROM_WRITE_UNPROTECT_BIT    0x4
 162 /* enable dithering */
 163 #define   DITHER_EN_BIT 0x8
 164 /* load calibration dac */
 165 #define   CALDAC_LOAD_BIT       0x10
 166 /* serial clock - rising edge writes, falling edge reads */
 167 #define   SCLOCK_BIT    0x20
 168 /* serial data bit for writing to eeprom or calibration dacs */
 169 #define   SDATA_BIT     0x40
 170 /* enable eeprom for read/write */
 171 #define   EEPROM_EN_BIT 0x80
 172 #define INTERVAL_COUNT_REG      0x1e
 173 #define INTERVAL_LOAD_REG       0x1f
 174 #define   INTERVAL_LOAD_BITS    0x1
 175
 176 /* read-only registers */
 177 #define STATUS1_REG     0x0
 178 /* data is available in fifo */
 179 #define   DATA_AVAIL_BIT        0x1
 180 /* overrun has occurred */
 181 #define   OVERRUN_BIT   0x2
 182 /* fifo overflow */
 183 #define   OVERFLOW_BIT  0x4
 184 /* timer interrupt has occurred */
 185 #define   TIMER_BIT     0x8
 186 /* dma terminal count has occurred */
 187 #define   DMATC_BIT     0x10
 188 /* external trigger has occurred */
 189 #define   EXT_TRIG_BIT  0x40
 190 /* 1200 boards only */
 191 #define STATUS2_REG     0x1d
 192 /* programmable eeprom serial output */
 193 #define   EEPROM_OUT_BIT        0x1
 194 /* counter A1 terminal count */
 195 #define   A1_TC_BIT     0x2
 196 /* fifo not half full */
 197 #define   FNHF_BIT      0x4
 198 #define ADC_FIFO_REG    0xa
 199
 200 #define DIO_BASE_REG    0x10
 201 #define COUNTER_A_BASE_REG      0x14
 202 #define COUNTER_A_CONTROL_REG   (COUNTER_A_BASE_REG + 0x3)
 203 /* check modes put conversion pacer output in harmless state (a0 mode 2) */
 204 #define   INIT_A0_BITS  0x14
 205 /* put hardware conversion counter output in harmless state (a1 mode 0) */
 206 #define   INIT_A1_BITS  0x70
 207 #define COUNTER_B_BASE_REG      0x18
 208
 209 enum scan_mode {
 210         MODE_SINGLE_CHAN,
 211         MODE_SINGLE_CHAN_INTERVAL,
 212         MODE_MULT_CHAN_UP,
 213         MODE_MULT_CHAN_DOWN,
 214 };
 215
 216 static const int labpc_plus_ai_gain_bits[] = {
 217         0x00, 0x10, 0x20, 0x30, 0x40, 0x50, 0x60, 0x70,
 218         0x00, 0x10, 0x20, 0x30, 0x40, 0x50, 0x60, 0x70,
 219 };
 220
 221 static const struct comedi_lrange range_labpc_plus_ai = {
 222         16, {
 223                 BIP_RANGE(5),
 224                 BIP_RANGE(4),
 225                 BIP_RANGE(2.5),
 226                 BIP_RANGE(1),
 227                 BIP_RANGE(0.5),
 228                 BIP_RANGE(0.25),
 229                 BIP_RANGE(0.1),
 230                 BIP_RANGE(0.05),
 231                 UNI_RANGE(10),
 232                 UNI_RANGE(8),
 233                 UNI_RANGE(5),
 234                 UNI_RANGE(2),
 235                 UNI_RANGE(1),
 236                 UNI_RANGE(0.5),
 237                 UNI_RANGE(0.2),
 238                 UNI_RANGE(0.1)
 239         }
 240 };
 241
 242 const int labpc_1200_ai_gain_bits[] = {
 243         0x00, 0x20, 0x30, 0x40, 0x50, 0x60, 0x70,
 244         0x00, 0x20, 0x30, 0x40, 0x50, 0x60, 0x70,
 245 };
 246 EXPORT_SYMBOL_GPL(labpc_1200_ai_gain_bits);
 247
 248 const struct comedi_lrange range_labpc_1200_ai = {
 249         14, {
 250                 BIP_RANGE(5),
 251                 BIP_RANGE(2.5),
 252                 BIP_RANGE(1),
 253                 BIP_RANGE(0.5),
 254                 BIP_RANGE(0.25),
 255                 BIP_RANGE(0.1),
 256                 BIP_RANGE(0.05),
 257                 UNI_RANGE(10),
 258                 UNI_RANGE(5),
 259                 UNI_RANGE(2),
 260                 UNI_RANGE(1),
 261                 UNI_RANGE(0.5),
 262                 UNI_RANGE(0.2),
 263                 UNI_RANGE(0.1)
 264         }
 265 };
 266 EXPORT_SYMBOL_GPL(range_labpc_1200_ai);
 267
 268 static const struct comedi_lrange range_labpc_ao = {
 269         2, {
 270                 BIP_RANGE(5),
 271                 UNI_RANGE(10)
 272         }
 273 };
 274
 275 /* functions that do inb/outb and readb/writeb so we can use
 276  * function pointers to decide which to use */
 277 static inline unsigned int labpc_inb(unsigned long address)
 278 {
 279         return inb(address);
 280 }
 281
 282 static inline void labpc_outb(unsigned int byte, unsigned long address)
 283 {
 284         outb(byte, address);
 285 }
 286
 287 static inline unsigned int labpc_readb(unsigned long address)
 288 {
 289         return readb((void __iomem *)address);
 290 }
 291
 292 static inline void labpc_writeb(unsigned int byte, unsigned long address)
 293 {
 294         writeb(byte, (void __iomem *)address);
 295 }
 296
 297 static const struct labpc_boardinfo labpc_boards[] = {
 298         {
 299                 .name                   = "lab-pc-1200",
 300                 .ai_speed               = 10000,
 301                 .bustype                = isa_bustype,
 302                 .register_layout        = labpc_1200_layout,
 303                 .has_ao                 = 1,
 304                 .ai_range_table         = &range_labpc_1200_ai,
 305                 .ai_range_code          = labpc_1200_ai_gain_bits,
 306                 .ai_scan_up             = 1,
 307         }, {
 308                 .name                   = "lab-pc-1200ai",
 309                 .ai_speed               = 10000,
 310                 .bustype                = isa_bustype,
 311                 .register_layout        = labpc_1200_layout,
 312                 .ai_range_table         = &range_labpc_1200_ai,
 313                 .ai_range_code          = labpc_1200_ai_gain_bits,
 314                 .ai_scan_up             = 1,
 315         }, {
 316                 .name                   = "lab-pc+",
 317                 .ai_speed               = 12000,
 318                 .bustype                = isa_bustype,
 319                 .register_layout        = labpc_plus_layout,
 320                 .has_ao                 = 1,
 321                 .ai_range_table         = &range_labpc_plus_ai,
 322                 .ai_range_code          = labpc_plus_ai_gain_bits,
 323         },
 324 #ifdef CONFIG_COMEDI_PCI_DRIVERS
 325         {
 326                 .name                   = "pci-1200",
 327                 .device_id              = 0x161,
 328                 .ai_speed               = 10000,
 329                 .bustype                = pci_bustype,
 330                 .register_layout        = labpc_1200_layout,
 331                 .has_ao                 = 1,
 332                 .ai_range_table         = &range_labpc_1200_ai,
 333                 .ai_range_code          = labpc_1200_ai_gain_bits,
 334                 .ai_scan_up             = 1,
 335                 .has_mmio               = 1,
 336         },
 337 #endif
 338 };
 339
 340 /* size in bytes of dma buffer */
 341 static const int dma_buffer_size = 0xff00;
 342 /* 2 bytes per sample */
 343 static const int sample_size = 2;
 344
 345 static bool labpc_range_is_unipolar(struct comedi_subdevice *s,
 346                                     unsigned int range)
 347 {
 348         const struct comedi_lrange *lrange = s->range_table;
 349         const struct comedi_krange *krange = &lrange->range[range];
 350
 351         if (krange->min < 0)
 352                 return false;
 353         else
 354                 return true;
 355 }
 356
 357 static void labpc_clear_adc_fifo(const struct comedi_device *dev)
 358 {
 359         struct labpc_private *devpriv = dev->private;
 360
 361         devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
 362         devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 363         devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 364 }
 365
 366 static int labpc_ai_insn_read(struct comedi_device *dev,
 367                               struct comedi_subdevice *s,
 368                               struct comedi_insn *insn,
 369                               unsigned int *data)
 370 {
 371         const struct labpc_boardinfo *board = comedi_board(dev);
 372         struct labpc_private *devpriv = dev->private;
 373         int i, n;
 374         int chan, range;
 375         int lsb, msb;
 376         int timeout = 1000;
 377         unsigned long flags;
 378
 379         /*  disable timed conversions */
 380         spin_lock_irqsave(&dev->spinlock, flags);
 381         devpriv->cmd2 &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
 382         devpriv->write_byte(devpriv->cmd2, dev->iobase + COMMAND2_REG);
 383         spin_unlock_irqrestore(&dev->spinlock, flags);
 384
 385         /*  disable interrupt generation and dma */
 386         devpriv->cmd3 = 0;
 387         devpriv->write_byte(devpriv->cmd3, dev->iobase + COMMAND3_REG);
 388
 389         /* set gain and channel */
 390         devpriv->cmd1 = 0;
 391         chan = CR_CHAN(insn->chanspec);
 392         range = CR_RANGE(insn->chanspec);
 393         devpriv->cmd1 |= board->ai_range_code[range];
 394         /* munge channel bits for differential/scan disabled mode */
 395         if (CR_AREF(insn->chanspec) == AREF_DIFF)
 396                 chan *= 2;
 397         devpriv->cmd1 |= ADC_CHAN_BITS(chan);
 398         devpriv->write_byte(devpriv->cmd1, dev->iobase + COMMAND1_REG);
 399
 400         /* setup cmd6 register for 1200 boards */
 401         if (board->register_layout == labpc_1200_layout) {
 402                 /*  reference inputs to ground or common? */
 403                 if (CR_AREF(insn->chanspec) != AREF_GROUND)
 404                         devpriv->cmd6 |= ADC_COMMON_BIT;
 405                 else
 406                         devpriv->cmd6 &= ~ADC_COMMON_BIT;
 407                 /* bipolar or unipolar range? */
 408                 if (labpc_range_is_unipolar(s, range))
 409                         devpriv->cmd6 |= ADC_UNIP_BIT;
 410                 else
 411                         devpriv->cmd6 &= ~ADC_UNIP_BIT;
 412                 /* don't interrupt on fifo half full */
 413                 devpriv->cmd6 &= ~ADC_FHF_INTR_EN_BIT;
 414                 /* don't enable interrupt on counter a1 terminal count? */
 415                 devpriv->cmd6 &= ~A1_INTR_EN_BIT;
 416                 /* write to register */
 417                 devpriv->write_byte(devpriv->cmd6, dev->iobase + COMMAND6_REG);
 418         }
 419         /* setup cmd4 register */
 420         devpriv->cmd4 = 0;
 421         devpriv->cmd4 |= EXT_CONVERT_DISABLE_BIT;
 422         /* single-ended/differential */
 423         if (CR_AREF(insn->chanspec) == AREF_DIFF)
 424                 devpriv->cmd4 |= ADC_DIFF_BIT;
 425         devpriv->write_byte(devpriv->cmd4, dev->iobase + COMMAND4_REG);
 426
 427         /*
 428          * initialize pacer counter output to make sure it doesn't
 429          * cause any problems
 430          */
 431         devpriv->write_byte(INIT_A0_BITS, dev->iobase + COUNTER_A_CONTROL_REG);
 432
 433         labpc_clear_adc_fifo(dev);
 434
 435         for (n = 0; n < insn->n; n++) {
 436                 /* trigger conversion */
 437                 devpriv->write_byte(0x1, dev->iobase + ADC_CONVERT_REG);
 438
 439                 for (i = 0; i < timeout; i++) {
 440                         if (devpriv->read_byte(dev->iobase +
 441                                                STATUS1_REG) & DATA_AVAIL_BIT)
 442                                 break;
 443                         udelay(1);
 444                 }
 445                 if (i == timeout) {
 446                         comedi_error(dev, "timeout");
 447                         return -ETIME;
 448                 }
 449                 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 450                 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 451                 data[n] = (msb << 8) | lsb;
 452         }
 453
 454         return n;
 455 }
 456
 457 #ifdef CONFIG_ISA_DMA_API
 458 /* utility function that suggests a dma transfer size in bytes */
 459 static unsigned int labpc_suggest_transfer_size(const struct comedi_cmd *cmd)
 460 {
 461         unsigned int size;
 462         unsigned int freq;
 463
 464         if (cmd->convert_src == TRIG_TIMER)
 465                 freq = 1000000000 / cmd->convert_arg;
 466         /* return some default value */
 467         else
 468                 freq = 0xffffffff;
 469
 470         /* make buffer fill in no more than 1/3 second */
 471         size = (freq / 3) * sample_size;
 472
 473         /* set a minimum and maximum size allowed */
 474         if (size > dma_buffer_size)
 475                 size = dma_buffer_size - dma_buffer_size % sample_size;
 476         else if (size < sample_size)
 477                 size = sample_size;
 478
 479         return size;
 480 }
 481 #endif
 482
 483 static int labpc_use_continuous_mode(const struct comedi_cmd *cmd,
 484                                      enum scan_mode mode)
 485 {
 486         if (mode == MODE_SINGLE_CHAN)
 487                 return 1;
 488
 489         if (cmd->scan_begin_src == TRIG_FOLLOW)
 490                 return 1;
 491
 492         return 0;
 493 }
 494
 495 static unsigned int labpc_ai_convert_period(const struct comedi_cmd *cmd,
 496                                             enum scan_mode mode)
 497 {
 498         if (cmd->convert_src != TRIG_TIMER)
 499                 return 0;
 500
 501         if (mode == MODE_SINGLE_CHAN && cmd->scan_begin_src == TRIG_TIMER)
 502                 return cmd->scan_begin_arg;
 503
 504         return cmd->convert_arg;
 505 }
 506
 507 static void labpc_set_ai_convert_period(struct comedi_cmd *cmd,
 508                                         enum scan_mode mode, unsigned int ns)
 509 {
 510         if (cmd->convert_src != TRIG_TIMER)
 511                 return;
 512
 513         if (mode == MODE_SINGLE_CHAN &&
 514             cmd->scan_begin_src == TRIG_TIMER) {
 515                 cmd->scan_begin_arg = ns;
 516                 if (cmd->convert_arg > cmd->scan_begin_arg)
 517                         cmd->convert_arg = cmd->scan_begin_arg;
 518         } else
 519                 cmd->convert_arg = ns;
 520 }
 521
 522 static unsigned int labpc_ai_scan_period(const struct comedi_cmd *cmd,
 523                                         enum scan_mode mode)
 524 {
 525         if (cmd->scan_begin_src != TRIG_TIMER)
 526                 return 0;
 527
 528         if (mode == MODE_SINGLE_CHAN && cmd->convert_src == TRIG_TIMER)
 529                 return 0;
 530
 531         return cmd->scan_begin_arg;
 532 }
 533
 534 static void labpc_set_ai_scan_period(struct comedi_cmd *cmd,
 535                                      enum scan_mode mode, unsigned int ns)
 536 {
 537         if (cmd->scan_begin_src != TRIG_TIMER)
 538                 return;
 539
 540         if (mode == MODE_SINGLE_CHAN && cmd->convert_src == TRIG_TIMER)
 541                 return;
 542
 543         cmd->scan_begin_arg = ns;
 544 }
 545
 546 /* figures out what counter values to use based on command */
 547 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd,
 548                              enum scan_mode mode)
 549 {
 550         struct labpc_private *devpriv = dev->private;
 551         /* max value for 16 bit counter in mode 2 */
 552         const int max_counter_value = 0x10000;
 553         /* min value for 16 bit counter in mode 2 */
 554         const int min_counter_value = 2;
 555         unsigned int base_period;
 556         unsigned int scan_period;
 557         unsigned int convert_period;
 558
 559         /*
 560          * if both convert and scan triggers are TRIG_TIMER, then they
 561          * both rely on counter b0
 562          */
 563         convert_period = labpc_ai_convert_period(cmd, mode);
 564         scan_period = labpc_ai_scan_period(cmd, mode);
 565         if (convert_period && scan_period) {
 566                 /*
 567                  * pick the lowest b0 divisor value we can (for maximum input
 568                  * clock speed on convert and scan counters)
 569                  */
 570                 devpriv->divisor_b0 = (scan_period - 1) /
 571                     (LABPC_TIMER_BASE * max_counter_value) + 1;
 572                 if (devpriv->divisor_b0 < min_counter_value)
 573                         devpriv->divisor_b0 = min_counter_value;
 574                 if (devpriv->divisor_b0 > max_counter_value)
 575                         devpriv->divisor_b0 = max_counter_value;
 576
 577                 base_period = LABPC_TIMER_BASE * devpriv->divisor_b0;
 578
 579                 /*  set a0 for conversion frequency and b1 for scan frequency */
 580                 switch (cmd->flags & TRIG_ROUND_MASK) {
 581                 default:
 582                 case TRIG_ROUND_NEAREST:
 583                         devpriv->divisor_a0 =
 584                             (convert_period + (base_period / 2)) / base_period;
 585                         devpriv->divisor_b1 =
 586                             (scan_period + (base_period / 2)) / base_period;
 587                         break;
 588                 case TRIG_ROUND_UP:
 589                         devpriv->divisor_a0 =
 590                             (convert_period + (base_period - 1)) / base_period;
 591                         devpriv->divisor_b1 =
 592                             (scan_period + (base_period - 1)) / base_period;
 593                         break;
 594                 case TRIG_ROUND_DOWN:
 595                         devpriv->divisor_a0 = convert_period / base_period;
 596                         devpriv->divisor_b1 = scan_period / base_period;
 597                         break;
 598                 }
 599                 /*  make sure a0 and b1 values are acceptable */
 600                 if (devpriv->divisor_a0 < min_counter_value)
 601                         devpriv->divisor_a0 = min_counter_value;
 602                 if (devpriv->divisor_a0 > max_counter_value)
 603                         devpriv->divisor_a0 = max_counter_value;
 604                 if (devpriv->divisor_b1 < min_counter_value)
 605                         devpriv->divisor_b1 = min_counter_value;
 606                 if (devpriv->divisor_b1 > max_counter_value)
 607                         devpriv->divisor_b1 = max_counter_value;
 608                 /*  write corrected timings to command */
 609                 labpc_set_ai_convert_period(cmd, mode,
 610                                             base_period * devpriv->divisor_a0);
 611                 labpc_set_ai_scan_period(cmd, mode,
 612                                          base_period * devpriv->divisor_b1);
 613                 /*
 614                  * if only one TRIG_TIMER is used, we can employ the generic
 615                  * cascaded timing functions
 616                  */
 617         } else if (scan_period) {
 618                 /*
 619                  * calculate cascaded counter values
 620                  * that give desired scan timing
 621                  */
 622                 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
 623                                                &(devpriv->divisor_b1),
 624                                                &(devpriv->divisor_b0),
 625                                                &scan_period,
 626                                                cmd->flags & TRIG_ROUND_MASK);
 627                 labpc_set_ai_scan_period(cmd, mode, scan_period);
 628         } else if (convert_period) {
 629                 /*
 630                  * calculate cascaded counter values
 631                  * that give desired conversion timing
 632                  */
 633                 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
 634                                                &(devpriv->divisor_a0),
 635                                                &(devpriv->divisor_b0),
 636                                                &convert_period,
 637                                                cmd->flags & TRIG_ROUND_MASK);
 638                 labpc_set_ai_convert_period(cmd, mode, convert_period);
 639         }
 640 }
 641
 642 static enum scan_mode labpc_ai_scan_mode(const struct comedi_cmd *cmd)
 643 {
 644         if (cmd->chanlist_len == 1)
 645                 return MODE_SINGLE_CHAN;
 646
 647         /* chanlist may be NULL during cmdtest. */
 648         if (cmd->chanlist == NULL)
 649                 return MODE_MULT_CHAN_UP;
 650
 651         if (CR_CHAN(cmd->chanlist[0]) == CR_CHAN(cmd->chanlist[1]))
 652                 return MODE_SINGLE_CHAN_INTERVAL;
 653
 654         if (CR_CHAN(cmd->chanlist[0]) < CR_CHAN(cmd->chanlist[1]))
 655                 return MODE_MULT_CHAN_UP;
 656
 657         if (CR_CHAN(cmd->chanlist[0]) > CR_CHAN(cmd->chanlist[1]))
 658                 return MODE_MULT_CHAN_DOWN;
 659
 660         pr_err("ni_labpc: bug! cannot determine AI scan mode\n");
 661         return 0;
 662 }
 663
 664 static int labpc_ai_chanlist_invalid(const struct comedi_device *dev,
 665                                      const struct comedi_cmd *cmd,
 666                                      enum scan_mode mode)
 667 {
 668         int channel, range, aref, i;
 669
 670         if (cmd->chanlist == NULL)
 671                 return 0;
 672
 673         if (mode == MODE_SINGLE_CHAN)
 674                 return 0;
 675
 676         if (mode == MODE_SINGLE_CHAN_INTERVAL) {
 677                 if (cmd->chanlist_len > 0xff) {
 678                         comedi_error(dev,
 679                                      "ni_labpc: chanlist too long for single channel interval mode\n");
 680                         return 1;
 681                 }
 682         }
 683
 684         channel = CR_CHAN(cmd->chanlist[0]);
 685         range = CR_RANGE(cmd->chanlist[0]);
 686         aref = CR_AREF(cmd->chanlist[0]);
 687
 688         for (i = 0; i < cmd->chanlist_len; i++) {
 689
 690                 switch (mode) {
 691                 case MODE_SINGLE_CHAN_INTERVAL:
 692                         if (CR_CHAN(cmd->chanlist[i]) != channel) {
 693                                 comedi_error(dev,
 694                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 695                                 return 1;
 696                         }
 697                         break;
 698                 case MODE_MULT_CHAN_UP:
 699                         if (CR_CHAN(cmd->chanlist[i]) != i) {
 700                                 comedi_error(dev,
 701                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 702                                 return 1;
 703                         }
 704                         break;
 705                 case MODE_MULT_CHAN_DOWN:
 706                         if (CR_CHAN(cmd->chanlist[i]) !=
 707                             cmd->chanlist_len - i - 1) {
 708                                 comedi_error(dev,
 709                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 710                                 return 1;
 711                         }
 712                         break;
 713                 default:
 714                         dev_err(dev->class_dev,
 715                                 "ni_labpc: bug! in chanlist check\n");
 716                         return 1;
 717                         break;
 718                 }
 719
 720                 if (CR_RANGE(cmd->chanlist[i]) != range) {
 721                         comedi_error(dev,
 722                                      "entries in chanlist must all have the same range\n");
 723                         return 1;
 724                 }
 725
 726                 if (CR_AREF(cmd->chanlist[i]) != aref) {
 727                         comedi_error(dev,
 728                                      "entries in chanlist must all have the same reference\n");
 729                         return 1;
 730                 }
 731         }
 732
 733         return 0;
 734 }
 735
 736 static int labpc_ai_cmdtest(struct comedi_device *dev,
 737                             struct comedi_subdevice *s, struct comedi_cmd *cmd)
 738 {
 739         const struct labpc_boardinfo *board = comedi_board(dev);
 740         int err = 0;
 741         int tmp, tmp2;
 742         unsigned int stop_mask;
 743         enum scan_mode mode;
 744
 745         /* Step 1 : check if triggers are trivially valid */
 746
 747         err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
 748         err |= cfc_check_trigger_src(&cmd->scan_begin_src,
 749                                         TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT);
 750         err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_TIMER | TRIG_EXT);
 751         err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
 752
 753         stop_mask = TRIG_COUNT | TRIG_NONE;
 754         if (board->register_layout == labpc_1200_layout)
 755                 stop_mask |= TRIG_EXT;
 756         err |= cfc_check_trigger_src(&cmd->stop_src, stop_mask);
 757
 758         if (err)
 759                 return 1;
 760
 761         /* Step 2a : make sure trigger sources are unique */
 762
 763         err |= cfc_check_trigger_is_unique(cmd->start_src);
 764         err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
 765         err |= cfc_check_trigger_is_unique(cmd->convert_src);
 766         err |= cfc_check_trigger_is_unique(cmd->stop_src);
 767
 768         /* Step 2b : and mutually compatible */
 769
 770         /* can't have external stop and start triggers at once */
 771         if (cmd->start_src == TRIG_EXT && cmd->stop_src == TRIG_EXT)
 772                 err++;
 773
 774         if (err)
 775                 return 2;
 776
 777         /* Step 3: check if arguments are trivially valid */
 778
 779         if (cmd->start_arg == TRIG_NOW)
 780                 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
 781
 782         if (!cmd->chanlist_len)
 783                 err |= -EINVAL;
 784         err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
 785
 786         if (cmd->convert_src == TRIG_TIMER)
 787                 err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
 788                                                  board->ai_speed);
 789
 790         /* make sure scan timing is not too fast */
 791         if (cmd->scan_begin_src == TRIG_TIMER) {
 792                 if (cmd->convert_src == TRIG_TIMER)
 793                         err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
 794                                         cmd->convert_arg * cmd->chanlist_len);
 795                 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
 796                                 board->ai_speed * cmd->chanlist_len);
 797         }
 798
 799         switch (cmd->stop_src) {
 800         case TRIG_COUNT:
 801                 err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
 802                 break;
 803         case TRIG_NONE:
 804                 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
 805                 break;
 806                 /*
 807                  * TRIG_EXT doesn't care since it doesn't
 808                  * trigger off a numbered channel
 809                  */
 810         default:
 811                 break;
 812         }
 813
 814         if (err)
 815                 return 3;
 816
 817         /* step 4: fix up any arguments */
 818
 819         tmp = cmd->convert_arg;
 820         tmp2 = cmd->scan_begin_arg;
 821         mode = labpc_ai_scan_mode(cmd);
 822         labpc_adc_timing(dev, cmd, mode);
 823         if (tmp != cmd->convert_arg || tmp2 != cmd->scan_begin_arg)
 824                 err++;
 825
 826         if (err)
 827                 return 4;
 828
 829         if (labpc_ai_chanlist_invalid(dev, cmd, mode))
 830                 return 5;
 831
 832         return 0;
 833 }
 834
 835 static inline int labpc_counter_load(struct comedi_device *dev,
 836                                      unsigned long base_address,
 837                                      unsigned int counter_number,
 838                                      unsigned int count, unsigned int mode)
 839 {
 840         const struct labpc_boardinfo *board = comedi_board(dev);
 841
 842         if (board->has_mmio)
 843                 return i8254_mm_load((void __iomem *)base_address, 0,
 844                                      counter_number, count, mode);
 845         else
 846                 return i8254_load(base_address, 0, counter_number, count, mode);
 847 }
 848
 849 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
 850 {
 851         const struct labpc_boardinfo *board = comedi_board(dev);
 852         struct labpc_private *devpriv = dev->private;
 853         int channel, range, aref;
 854 #ifdef CONFIG_ISA_DMA_API
 855         unsigned long irq_flags;
 856 #endif
 857         int ret;
 858         struct comedi_async *async = s->async;
 859         struct comedi_cmd *cmd = &async->cmd;
 860         enum transfer_type xfer;
 861         enum scan_mode mode;
 862         unsigned long flags;
 863
 864         if (!dev->irq) {
 865                 comedi_error(dev, "no irq assigned, cannot perform command");
 866                 return -1;
 867         }
 868
 869         range = CR_RANGE(cmd->chanlist[0]);
 870         aref = CR_AREF(cmd->chanlist[0]);
 871
 872         /* make sure board is disabled before setting up acquisition */
 873         spin_lock_irqsave(&dev->spinlock, flags);
 874         devpriv->cmd2 &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
 875         devpriv->write_byte(devpriv->cmd2, dev->iobase + COMMAND2_REG);
 876         spin_unlock_irqrestore(&dev->spinlock, flags);
 877
 878         devpriv->cmd3 = 0;
 879         devpriv->write_byte(devpriv->cmd3, dev->iobase + COMMAND3_REG);
 880
 881         /*  initialize software conversion count */
 882         if (cmd->stop_src == TRIG_COUNT)
 883                 devpriv->count = cmd->stop_arg * cmd->chanlist_len;
 884
 885         /*  setup hardware conversion counter */
 886         if (cmd->stop_src == TRIG_EXT) {
 887                 /*
 888                  * load counter a1 with count of 3
 889                  * (pc+ manual says this is minimum allowed) using mode 0
 890                  */
 891                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
 892                                          1, 3, 0);
 893                 if (ret < 0) {
 894                         comedi_error(dev, "error loading counter a1");
 895                         return -1;
 896                 }
 897         } else                  /*
 898                                  * otherwise, just put a1 in mode 0
 899                                  * with no count to set its output low
 900                                  */
 901                 devpriv->write_byte(INIT_A1_BITS,
 902                                     dev->iobase + COUNTER_A_CONTROL_REG);
 903
 904 #ifdef CONFIG_ISA_DMA_API
 905         /*  figure out what method we will use to transfer data */
 906         if (devpriv->dma_chan &&        /*  need a dma channel allocated */
 907                 /*
 908                  * dma unsafe at RT priority,
 909                  * and too much setup time for TRIG_WAKE_EOS for
 910                  */
 911             (cmd->flags & (TRIG_WAKE_EOS | TRIG_RT)) == 0 &&
 912             /*  only available on the isa boards */
 913             board->bustype == isa_bustype) {
 914                 xfer = isa_dma_transfer;
 915                 /* pc-plus has no fifo-half full interrupt */
 916         } else
 917 #endif
 918         if (board->register_layout == labpc_1200_layout &&
 919                    /*  wake-end-of-scan should interrupt on fifo not empty */
 920                    (cmd->flags & TRIG_WAKE_EOS) == 0 &&
 921                    /*  make sure we are taking more than just a few points */
 922                    (cmd->stop_src != TRIG_COUNT || devpriv->count > 256)) {
 923                 xfer = fifo_half_full_transfer;
 924         } else
 925                 xfer = fifo_not_empty_transfer;
 926         devpriv->current_transfer = xfer;
 927         mode = labpc_ai_scan_mode(cmd);
 928
 929         /*  setup cmd6 register for 1200 boards */
 930         if (board->register_layout == labpc_1200_layout) {
 931                 /*  reference inputs to ground or common? */
 932                 if (aref != AREF_GROUND)
 933                         devpriv->cmd6 |= ADC_COMMON_BIT;
 934                 else
 935                         devpriv->cmd6 &= ~ADC_COMMON_BIT;
 936                 /*  bipolar or unipolar range? */
 937                 if (labpc_range_is_unipolar(s, range))
 938                         devpriv->cmd6 |= ADC_UNIP_BIT;
 939                 else
 940                         devpriv->cmd6 &= ~ADC_UNIP_BIT;
 941                 /*  interrupt on fifo half full? */
 942                 if (xfer == fifo_half_full_transfer)
 943                         devpriv->cmd6 |= ADC_FHF_INTR_EN_BIT;
 944                 else
 945                         devpriv->cmd6 &= ~ADC_FHF_INTR_EN_BIT;
 946                 /*  enable interrupt on counter a1 terminal count? */
 947                 if (cmd->stop_src == TRIG_EXT)
 948                         devpriv->cmd6 |= A1_INTR_EN_BIT;
 949                 else
 950                         devpriv->cmd6 &= ~A1_INTR_EN_BIT;
 951                 /*  are we scanning up or down through channels? */
 952                 if (mode == MODE_MULT_CHAN_UP)
 953                         devpriv->cmd6 |= ADC_SCAN_UP_BIT;
 954                 else
 955                         devpriv->cmd6 &= ~ADC_SCAN_UP_BIT;
 956                 /*  write to register */
 957                 devpriv->write_byte(devpriv->cmd6, dev->iobase + COMMAND6_REG);
 958         }
 959
 960         /* setup channel list, etc (cmd1 register) */
 961         devpriv->cmd1 = 0;
 962         if (mode == MODE_MULT_CHAN_UP)
 963                 channel = CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1]);
 964         else
 965                 channel = CR_CHAN(cmd->chanlist[0]);
 966         /* munge channel bits for differential / scan disabled mode */
 967         if ((mode == MODE_SINGLE_CHAN || mode == MODE_SINGLE_CHAN_INTERVAL) &&
 968             aref == AREF_DIFF)
 969                 channel *= 2;
 970         devpriv->cmd1 |= ADC_CHAN_BITS(channel);
 971         devpriv->cmd1 |= board->ai_range_code[range];
 972         devpriv->write_byte(devpriv->cmd1, dev->iobase + COMMAND1_REG);
 973         /* manual says to set scan enable bit on second pass */
 974         if (mode == MODE_MULT_CHAN_UP || mode == MODE_MULT_CHAN_DOWN) {
 975                 devpriv->cmd1 |= ADC_SCAN_EN_BIT;
 976                 /* need a brief delay before enabling scan, or scan
 977                  * list will get screwed when you switch
 978                  * between scan up to scan down mode - dunno why */
 979                 udelay(1);
 980                 devpriv->write_byte(devpriv->cmd1, dev->iobase + COMMAND1_REG);
 981         }
 982
 983         devpriv->write_byte(cmd->chanlist_len,
 984                             dev->iobase + INTERVAL_COUNT_REG);
 985         /*  load count */
 986         devpriv->write_byte(INTERVAL_LOAD_BITS,
 987                             dev->iobase + INTERVAL_LOAD_REG);
 988
 989         if (cmd->convert_src == TRIG_TIMER || cmd->scan_begin_src == TRIG_TIMER) {
 990                 /*  set up pacing */
 991                 labpc_adc_timing(dev, cmd, mode);
 992                 /*  load counter b0 in mode 3 */
 993                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
 994                                          0, devpriv->divisor_b0, 3);
 995                 if (ret < 0) {
 996                         comedi_error(dev, "error loading counter b0");
 997                         return -1;
 998                 }
 999         }
1000         /*  set up conversion pacing */
1001         if (labpc_ai_convert_period(cmd, mode)) {
1002                 /*  load counter a0 in mode 2 */
1003                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
1004                                          0, devpriv->divisor_a0, 2);
1005                 if (ret < 0) {
1006                         comedi_error(dev, "error loading counter a0");
1007                         return -1;
1008                 }
1009         } else
1010                 devpriv->write_byte(INIT_A0_BITS,
1011                                     dev->iobase + COUNTER_A_CONTROL_REG);
1012
1013         /*  set up scan pacing */
1014         if (labpc_ai_scan_period(cmd, mode)) {
1015                 /*  load counter b1 in mode 2 */
1016                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
1017                                          1, devpriv->divisor_b1, 2);
1018                 if (ret < 0) {
1019                         comedi_error(dev, "error loading counter b1");
1020                         return -1;
1021                 }
1022         }
1023
1024         labpc_clear_adc_fifo(dev);
1025
1026 #ifdef CONFIG_ISA_DMA_API
1027         /*  set up dma transfer */
1028         if (xfer == isa_dma_transfer) {
1029                 irq_flags = claim_dma_lock();
1030                 disable_dma(devpriv->dma_chan);
1031                 /* clear flip-flop to make sure 2-byte registers for
1032                  * count and address get set correctly */
1033                 clear_dma_ff(devpriv->dma_chan);
1034                 set_dma_addr(devpriv->dma_chan,
1035                              virt_to_bus(devpriv->dma_buffer));
1036                 /*  set appropriate size of transfer */
1037                 devpriv->dma_transfer_size = labpc_suggest_transfer_size(cmd);
1038                 if (cmd->stop_src == TRIG_COUNT &&
1039                     devpriv->count * sample_size < devpriv->dma_transfer_size) {
1040                         devpriv->dma_transfer_size =
1041                             devpriv->count * sample_size;
1042                 }
1043                 set_dma_count(devpriv->dma_chan, devpriv->dma_transfer_size);
1044                 enable_dma(devpriv->dma_chan);
1045                 release_dma_lock(irq_flags);
1046                 /*  enable board's dma */
1047                 devpriv->cmd3 |= DMA_EN_BIT | DMATC_INTR_EN_BIT;
1048         } else
1049                 devpriv->cmd3 &= ~DMA_EN_BIT & ~DMATC_INTR_EN_BIT;
1050 #endif
1051
1052         /*  enable error interrupts */
1053         devpriv->cmd3 |= ERR_INTR_EN_BIT;
1054         /*  enable fifo not empty interrupt? */
1055         if (xfer == fifo_not_empty_transfer)
1056                 devpriv->cmd3 |= ADC_FNE_INTR_EN_BIT;
1057         else
1058                 devpriv->cmd3 &= ~ADC_FNE_INTR_EN_BIT;
1059         devpriv->write_byte(devpriv->cmd3, dev->iobase + COMMAND3_REG);
1060
1061         /*  setup any external triggering/pacing (cmd4 register) */
1062         devpriv->cmd4 = 0;
1063         if (cmd->convert_src != TRIG_EXT)
1064                 devpriv->cmd4 |= EXT_CONVERT_DISABLE_BIT;
1065         /* XXX should discard first scan when using interval scanning
1066          * since manual says it is not synced with scan clock */
1067         if (labpc_use_continuous_mode(cmd, mode) == 0) {
1068                 devpriv->cmd4 |= INTERVAL_SCAN_EN_BIT;
1069                 if (cmd->scan_begin_src == TRIG_EXT)
1070                         devpriv->cmd4 |= EXT_SCAN_EN_BIT;
1071         }
1072         /*  single-ended/differential */
1073         if (aref == AREF_DIFF)
1074                 devpriv->cmd4 |= ADC_DIFF_BIT;
1075         devpriv->write_byte(devpriv->cmd4, dev->iobase + COMMAND4_REG);
1076
1077         /*  startup acquisition */
1078
1079         /*  cmd2 reg */
1080         /*  use 2 cascaded counters for pacing */
1081         spin_lock_irqsave(&dev->spinlock, flags);
1082         devpriv->cmd2 |= CASCADE_BIT;
1083         switch (cmd->start_src) {
1084         case TRIG_EXT:
1085                 devpriv->cmd2 |= HWTRIG_BIT;
1086                 devpriv->cmd2 &= ~PRETRIG_BIT & ~SWTRIG_BIT;
1087                 break;
1088         case TRIG_NOW:
1089                 devpriv->cmd2 |= SWTRIG_BIT;
1090                 devpriv->cmd2 &= ~PRETRIG_BIT & ~HWTRIG_BIT;
1091                 break;
1092         default:
1093                 comedi_error(dev, "bug with start_src");
1094                 spin_unlock_irqrestore(&dev->spinlock, flags);
1095                 return -1;
1096                 break;
1097         }
1098         switch (cmd->stop_src) {
1099         case TRIG_EXT:
1100                 devpriv->cmd2 |= HWTRIG_BIT | PRETRIG_BIT;
1101                 break;
1102         case TRIG_COUNT:
1103         case TRIG_NONE:
1104                 break;
1105         default:
1106                 comedi_error(dev, "bug with stop_src");
1107                 spin_unlock_irqrestore(&dev->spinlock, flags);
1108                 return -1;
1109         }
1110         devpriv->write_byte(devpriv->cmd2, dev->iobase + COMMAND2_REG);
1111         spin_unlock_irqrestore(&dev->spinlock, flags);
1112
1113         return 0;
1114 }
1115
1116 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
1117 {
1118         struct labpc_private *devpriv = dev->private;
1119         unsigned long flags;
1120
1121         spin_lock_irqsave(&dev->spinlock, flags);
1122         devpriv->cmd2 &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
1123         devpriv->write_byte(devpriv->cmd2, dev->iobase + COMMAND2_REG);
1124         spin_unlock_irqrestore(&dev->spinlock, flags);
1125
1126         devpriv->cmd3 = 0;
1127         devpriv->write_byte(devpriv->cmd3, dev->iobase + COMMAND3_REG);
1128
1129         return 0;
1130 }
1131
1132 #ifdef CONFIG_ISA_DMA_API
1133 static void labpc_drain_dma(struct comedi_device *dev)
1134 {
1135         struct labpc_private *devpriv = dev->private;
1136         struct comedi_subdevice *s = dev->read_subdev;
1137         struct comedi_async *async = s->async;
1138         int status;
1139         unsigned long flags;
1140         unsigned int max_points, num_points, residue, leftover;
1141         int i;
1142
1143         status = devpriv->stat1;
1144
1145         flags = claim_dma_lock();
1146         disable_dma(devpriv->dma_chan);
1147         /* clear flip-flop to make sure 2-byte registers for
1148          * count and address get set correctly */
1149         clear_dma_ff(devpriv->dma_chan);
1150
1151         /*  figure out how many points to read */
1152         max_points = devpriv->dma_transfer_size / sample_size;
1153         /* residue is the number of points left to be done on the dma
1154          * transfer.  It should always be zero at this point unless
1155          * the stop_src is set to external triggering.
1156          */
1157         residue = get_dma_residue(devpriv->dma_chan) / sample_size;
1158         num_points = max_points - residue;
1159         if (devpriv->count < num_points && async->cmd.stop_src == TRIG_COUNT)
1160                 num_points = devpriv->count;
1161
1162         /*  figure out how many points will be stored next time */
1163         leftover = 0;
1164         if (async->cmd.stop_src != TRIG_COUNT) {
1165                 leftover = devpriv->dma_transfer_size / sample_size;
1166         } else if (devpriv->count > num_points) {
1167                 leftover = devpriv->count - num_points;
1168                 if (leftover > max_points)
1169                         leftover = max_points;
1170         }
1171
1172         /* write data to comedi buffer */
1173         for (i = 0; i < num_points; i++)
1174                 cfc_write_to_buffer(s, devpriv->dma_buffer[i]);
1175
1176         if (async->cmd.stop_src == TRIG_COUNT)
1177                 devpriv->count -= num_points;
1178
1179         /*  set address and count for next transfer */
1180         set_dma_addr(devpriv->dma_chan, virt_to_bus(devpriv->dma_buffer));
1181         set_dma_count(devpriv->dma_chan, leftover * sample_size);
1182         release_dma_lock(flags);
1183
1184         async->events |= COMEDI_CB_BLOCK;
1185 }
1186
1187 static void handle_isa_dma(struct comedi_device *dev)
1188 {
1189         struct labpc_private *devpriv = dev->private;
1190
1191         labpc_drain_dma(dev);
1192
1193         enable_dma(devpriv->dma_chan);
1194
1195         /*  clear dma tc interrupt */
1196         devpriv->write_byte(0x1, dev->iobase + DMATC_CLEAR_REG);
1197 }
1198 #endif
1199
1200 /* read all available samples from ai fifo */
1201 static int labpc_drain_fifo(struct comedi_device *dev)
1202 {
1203         struct labpc_private *devpriv = dev->private;
1204         unsigned int lsb, msb;
1205         short data;
1206         struct comedi_async *async = dev->read_subdev->async;
1207         const int timeout = 10000;
1208         unsigned int i;
1209
1210         devpriv->stat1 = devpriv->read_byte(dev->iobase + STATUS1_REG);
1211
1212         for (i = 0; (devpriv->stat1 & DATA_AVAIL_BIT) && i < timeout;
1213              i++) {
1214                 /*  quit if we have all the data we want */
1215                 if (async->cmd.stop_src == TRIG_COUNT) {
1216                         if (devpriv->count == 0)
1217                                 break;
1218                         devpriv->count--;
1219                 }
1220                 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1221                 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1222                 data = (msb << 8) | lsb;
1223                 cfc_write_to_buffer(dev->read_subdev, data);
1224                 devpriv->stat1 = devpriv->read_byte(dev->iobase + STATUS1_REG);
1225         }
1226         if (i == timeout) {
1227                 comedi_error(dev, "ai timeout, fifo never empties");
1228                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1229                 return -1;
1230         }
1231
1232         return 0;
1233 }
1234
1235 /* makes sure all data acquired by board is transferred to comedi (used
1236  * when acquisition is terminated by stop_src == TRIG_EXT). */
1237 static void labpc_drain_dregs(struct comedi_device *dev)
1238 {
1239 #ifdef CONFIG_ISA_DMA_API
1240         struct labpc_private *devpriv = dev->private;
1241
1242         if (devpriv->current_transfer == isa_dma_transfer)
1243                 labpc_drain_dma(dev);
1244 #endif
1245
1246         labpc_drain_fifo(dev);
1247 }
1248
1249 /* interrupt service routine */
1250 static irqreturn_t labpc_interrupt(int irq, void *d)
1251 {
1252         struct comedi_device *dev = d;
1253         const struct labpc_boardinfo *board = comedi_board(dev);
1254         struct labpc_private *devpriv = dev->private;
1255         struct comedi_subdevice *s = dev->read_subdev;
1256         struct comedi_async *async;
1257         struct comedi_cmd *cmd;
1258
1259         if (!dev->attached) {
1260                 comedi_error(dev, "premature interrupt");
1261                 return IRQ_HANDLED;
1262         }
1263
1264         async = s->async;
1265         cmd = &async->cmd;
1266         async->events = 0;
1267
1268         /* read board status */
1269         devpriv->stat1 = devpriv->read_byte(dev->iobase + STATUS1_REG);
1270         if (board->register_layout == labpc_1200_layout)
1271                 devpriv->stat2 = devpriv->read_byte(dev->iobase + STATUS2_REG);
1272
1273         if ((devpriv->stat1 & (DMATC_BIT | TIMER_BIT | OVERFLOW_BIT |
1274                                OVERRUN_BIT | DATA_AVAIL_BIT)) == 0
1275             && (devpriv->stat2 & A1_TC_BIT) == 0
1276             && (devpriv->stat2 & FNHF_BIT)) {
1277                 return IRQ_NONE;
1278         }
1279
1280         if (devpriv->stat1 & OVERRUN_BIT) {
1281                 /* clear error interrupt */
1282                 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1283                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1284                 comedi_event(dev, s);
1285                 comedi_error(dev, "overrun");
1286                 return IRQ_HANDLED;
1287         }
1288
1289 #ifdef CONFIG_ISA_DMA_API
1290         if (devpriv->current_transfer == isa_dma_transfer) {
1291                 /*
1292                  * if a dma terminal count of external stop trigger
1293                  * has occurred
1294                  */
1295                 if (devpriv->stat1 & DMATC_BIT ||
1296                     (board->register_layout == labpc_1200_layout
1297                      && devpriv->stat2 & A1_TC_BIT)) {
1298                         handle_isa_dma(dev);
1299                 }
1300         } else
1301 #endif
1302                 labpc_drain_fifo(dev);
1303
1304         if (devpriv->stat1 & TIMER_BIT) {
1305                 comedi_error(dev, "handled timer interrupt?");
1306                 /*  clear it */
1307                 devpriv->write_byte(0x1, dev->iobase + TIMER_CLEAR_REG);
1308         }
1309
1310         if (devpriv->stat1 & OVERFLOW_BIT) {
1311                 /*  clear error interrupt */
1312                 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1313                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1314                 comedi_event(dev, s);
1315                 comedi_error(dev, "overflow");
1316                 return IRQ_HANDLED;
1317         }
1318         /*  handle external stop trigger */
1319         if (cmd->stop_src == TRIG_EXT) {
1320                 if (devpriv->stat2 & A1_TC_BIT) {
1321                         labpc_drain_dregs(dev);
1322                         labpc_cancel(dev, s);
1323                         async->events |= COMEDI_CB_EOA;
1324                 }
1325         }
1326
1327         /* TRIG_COUNT end of acquisition */
1328         if (cmd->stop_src == TRIG_COUNT) {
1329                 if (devpriv->count == 0) {
1330                         labpc_cancel(dev, s);
1331                         async->events |= COMEDI_CB_EOA;
1332                 }
1333         }
1334
1335         comedi_event(dev, s);
1336         return IRQ_HANDLED;
1337 }
1338
1339 static int labpc_ao_insn_write(struct comedi_device *dev,
1340                                struct comedi_subdevice *s,
1341                                struct comedi_insn *insn,
1342                                unsigned int *data)
1343 {
1344         const struct labpc_boardinfo *board = comedi_board(dev);
1345         struct labpc_private *devpriv = dev->private;
1346         int channel, range;
1347         unsigned long flags;
1348         int lsb, msb;
1349
1350         channel = CR_CHAN(insn->chanspec);
1351
1352         /* turn off pacing of analog output channel */
1353         /* note: hardware bug in daqcard-1200 means pacing cannot
1354          * be independently enabled/disabled for its the two channels */
1355         spin_lock_irqsave(&dev->spinlock, flags);
1356         devpriv->cmd2 &= ~DAC_PACED_BIT(channel);
1357         devpriv->write_byte(devpriv->cmd2, dev->iobase + COMMAND2_REG);
1358         spin_unlock_irqrestore(&dev->spinlock, flags);
1359
1360         /* set range */
1361         if (board->register_layout == labpc_1200_layout) {
1362                 range = CR_RANGE(insn->chanspec);
1363                 if (labpc_range_is_unipolar(s, range))
1364                         devpriv->cmd6 |= DAC_UNIP_BIT(channel);
1365                 else
1366                         devpriv->cmd6 &= ~DAC_UNIP_BIT(channel);
1367                 /*  write to register */
1368                 devpriv->write_byte(devpriv->cmd6, dev->iobase + COMMAND6_REG);
1369         }
1370         /* send data */
1371         lsb = data[0] & 0xff;
1372         msb = (data[0] >> 8) & 0xff;
1373         devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(channel));
1374         devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(channel));
1375
1376         /* remember value for readback */
1377         devpriv->ao_value[channel] = data[0];
1378
1379         return 1;
1380 }
1381
1382 static int labpc_ao_insn_read(struct comedi_device *dev,
1383                               struct comedi_subdevice *s,
1384                               struct comedi_insn *insn,
1385                               unsigned int *data)
1386 {
1387         struct labpc_private *devpriv = dev->private;
1388
1389         data[0] = devpriv->ao_value[CR_CHAN(insn->chanspec)];
1390
1391         return 1;
1392 }
1393
1394 static int labpc_8255_mmio(int dir, int port, int data, unsigned long iobase)
1395 {
1396         if (dir) {
1397                 writeb(data, (void __iomem *)(iobase + port));
1398                 return 0;
1399         } else {
1400                 return readb((void __iomem *)(iobase + port));
1401         }
1402 }
1403
1404 /* lowlevel write to eeprom/dac */
1405 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
1406                              unsigned int value_width)
1407 {
1408         struct labpc_private *devpriv = dev->private;
1409         int i;
1410
1411         for (i = 1; i <= value_width; i++) {
1412                 /*  clear serial clock */
1413                 devpriv->cmd5 &= ~SCLOCK_BIT;
1414                 /*  send bits most significant bit first */
1415                 if (value & (1 << (value_width - i)))
1416                         devpriv->cmd5 |= SDATA_BIT;
1417                 else
1418                         devpriv->cmd5 &= ~SDATA_BIT;
1419                 udelay(1);
1420                 devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1421                 /*  set clock to load bit */
1422                 devpriv->cmd5 |= SCLOCK_BIT;
1423                 udelay(1);
1424                 devpriv->write_byte(devpriv->cmd5,
1425                                     dev->iobase + COMMAND5_REG);
1426         }
1427 }
1428
1429 /* lowlevel read from eeprom */
1430 static unsigned int labpc_serial_in(struct comedi_device *dev)
1431 {
1432         struct labpc_private *devpriv = dev->private;
1433         unsigned int value = 0;
1434         int i;
1435         const int value_width = 8;      /*  number of bits wide values are */
1436
1437         for (i = 1; i <= value_width; i++) {
1438                 /*  set serial clock */
1439                 devpriv->cmd5 |= SCLOCK_BIT;
1440                 udelay(1);
1441                 devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1442                 /*  clear clock bit */
1443                 devpriv->cmd5 &= ~SCLOCK_BIT;
1444                 udelay(1);
1445                 devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1446                 /*  read bits most significant bit first */
1447                 udelay(1);
1448                 devpriv->stat2 = devpriv->read_byte(dev->iobase + STATUS2_REG);
1449                 if (devpriv->stat2 & EEPROM_OUT_BIT)
1450                         value |= 1 << (value_width - i);
1451         }
1452
1453         return value;
1454 }
1455
1456 static unsigned int labpc_eeprom_read(struct comedi_device *dev,
1457                                       unsigned int address)
1458 {
1459         struct labpc_private *devpriv = dev->private;
1460         unsigned int value;
1461         /*  bits to tell eeprom to expect a read */
1462         const int read_instruction = 0x3;
1463         /*  8 bit write lengths to eeprom */
1464         const int write_length = 8;
1465
1466         /*  enable read/write to eeprom */
1467         devpriv->cmd5 &= ~EEPROM_EN_BIT;
1468         udelay(1);
1469         devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1470         devpriv->cmd5 |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
1471         udelay(1);
1472         devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1473
1474         /*  send read instruction */
1475         labpc_serial_out(dev, read_instruction, write_length);
1476         /*  send 8 bit address to read from */
1477         labpc_serial_out(dev, address, write_length);
1478         /*  read result */
1479         value = labpc_serial_in(dev);
1480
1481         /*  disable read/write to eeprom */
1482         devpriv->cmd5 &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1483         udelay(1);
1484         devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1485
1486         return value;
1487 }
1488
1489 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev)
1490 {
1491         struct labpc_private *devpriv = dev->private;
1492         unsigned int value;
1493         const int read_status_instruction = 0x5;
1494         const int write_length = 8;     /*  8 bit write lengths to eeprom */
1495
1496         /*  enable read/write to eeprom */
1497         devpriv->cmd5 &= ~EEPROM_EN_BIT;
1498         udelay(1);
1499         devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1500         devpriv->cmd5 |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
1501         udelay(1);
1502         devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1503
1504         /*  send read status instruction */
1505         labpc_serial_out(dev, read_status_instruction, write_length);
1506         /*  read result */
1507         value = labpc_serial_in(dev);
1508
1509         /*  disable read/write to eeprom */
1510         devpriv->cmd5 &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1511         udelay(1);
1512         devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1513
1514         return value;
1515 }
1516
1517 static int labpc_eeprom_write(struct comedi_device *dev,
1518                                 unsigned int address, unsigned int value)
1519 {
1520         struct labpc_private *devpriv = dev->private;
1521         const int write_enable_instruction = 0x6;
1522         const int write_instruction = 0x2;
1523         const int write_length = 8;     /*  8 bit write lengths to eeprom */
1524         const int write_in_progress_bit = 0x1;
1525         const int timeout = 10000;
1526         int i;
1527
1528         /*  make sure there isn't already a write in progress */
1529         for (i = 0; i < timeout; i++) {
1530                 if ((labpc_eeprom_read_status(dev) & write_in_progress_bit) ==
1531                     0)
1532                         break;
1533         }
1534         if (i == timeout) {
1535                 comedi_error(dev, "eeprom write timed out");
1536                 return -ETIME;
1537         }
1538         /*  update software copy of eeprom */
1539         devpriv->eeprom_data[address] = value;
1540
1541         /*  enable read/write to eeprom */
1542         devpriv->cmd5 &= ~EEPROM_EN_BIT;
1543         udelay(1);
1544         devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1545         devpriv->cmd5 |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
1546         udelay(1);
1547         devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1548
1549         /*  send write_enable instruction */
1550         labpc_serial_out(dev, write_enable_instruction, write_length);
1551         devpriv->cmd5 &= ~EEPROM_EN_BIT;
1552         udelay(1);
1553         devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1554
1555         /*  send write instruction */
1556         devpriv->cmd5 |= EEPROM_EN_BIT;
1557         udelay(1);
1558         devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1559         labpc_serial_out(dev, write_instruction, write_length);
1560         /*  send 8 bit address to write to */
1561         labpc_serial_out(dev, address, write_length);
1562         /*  write value */
1563         labpc_serial_out(dev, value, write_length);
1564         devpriv->cmd5 &= ~EEPROM_EN_BIT;
1565         udelay(1);
1566         devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1567
1568         /*  disable read/write to eeprom */
1569         devpriv->cmd5 &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1570         udelay(1);
1571         devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1572
1573         return 0;
1574 }
1575
1576 /* writes to 8 bit calibration dacs */
1577 static void write_caldac(struct comedi_device *dev, unsigned int channel,
1578                          unsigned int value)
1579 {
1580         struct labpc_private *devpriv = dev->private;
1581
1582         if (value == devpriv->caldac[channel])
1583                 return;
1584         devpriv->caldac[channel] = value;
1585
1586         /*  clear caldac load bit and make sure we don't write to eeprom */
1587         devpriv->cmd5 &=
1588             ~CALDAC_LOAD_BIT & ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1589         udelay(1);
1590         devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1591
1592         /*  write 4 bit channel */
1593         labpc_serial_out(dev, channel, 4);
1594         /*  write 8 bit caldac value */
1595         labpc_serial_out(dev, value, 8);
1596
1597         /*  set and clear caldac bit to load caldac value */
1598         devpriv->cmd5 |= CALDAC_LOAD_BIT;
1599         udelay(1);
1600         devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1601         devpriv->cmd5 &= ~CALDAC_LOAD_BIT;
1602         udelay(1);
1603         devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1604 }
1605
1606 static int labpc_calib_insn_write(struct comedi_device *dev,
1607                                   struct comedi_subdevice *s,
1608                                   struct comedi_insn *insn,
1609                                   unsigned int *data)
1610 {
1611         int channel = CR_CHAN(insn->chanspec);
1612
1613         write_caldac(dev, channel, data[0]);
1614         return 1;
1615 }
1616
1617 static int labpc_calib_insn_read(struct comedi_device *dev,
1618                                  struct comedi_subdevice *s,
1619                                  struct comedi_insn *insn,
1620                                  unsigned int *data)
1621 {
1622         struct labpc_private *devpriv = dev->private;
1623
1624         data[0] = devpriv->caldac[CR_CHAN(insn->chanspec)];
1625
1626         return 1;
1627 }
1628
1629 static int labpc_eeprom_insn_write(struct comedi_device *dev,
1630                                    struct comedi_subdevice *s,
1631                                    struct comedi_insn *insn,
1632                                    unsigned int *data)
1633 {
1634         int channel = CR_CHAN(insn->chanspec);
1635         int ret;
1636
1637         /*  only allow writes to user area of eeprom */
1638         if (channel < 16 || channel > 127) {
1639                 dev_dbg(dev->class_dev,
1640                         "eeprom writes are only allowed to channels 16 through 127 (the pointer and user areas)\n");
1641                 return -EINVAL;
1642         }
1643
1644         ret = labpc_eeprom_write(dev, channel, data[0]);
1645         if (ret < 0)
1646                 return ret;
1647
1648         return 1;
1649 }
1650
1651 static int labpc_eeprom_insn_read(struct comedi_device *dev,
1652                                   struct comedi_subdevice *s,
1653                                   struct comedi_insn *insn,
1654                                   unsigned int *data)
1655 {
1656         struct labpc_private *devpriv = dev->private;
1657
1658         data[0] = devpriv->eeprom_data[CR_CHAN(insn->chanspec)];
1659
1660         return 1;
1661 }
1662
1663 int labpc_common_attach(struct comedi_device *dev, unsigned long iobase,
1664                         unsigned int irq, unsigned int dma_chan)
1665 {
1666         const struct labpc_boardinfo *board = comedi_board(dev);
1667         struct labpc_private *devpriv = dev->private;
1668         struct comedi_subdevice *s;
1669         unsigned long isr_flags;
1670         int ret;
1671         int i;
1672
1673         dev->board_name = board->name;
1674
1675         dev_info(dev->class_dev, "ni_labpc: %s\n", dev->board_name);
1676         if (iobase == 0) {
1677                 dev_err(dev->class_dev, "io base address is zero!\n");
1678                 return -EINVAL;
1679         }
1680         /*  request io regions for isa boards */
1681         if (board->bustype == isa_bustype) {
1682                 /* check if io addresses are available */
1683                 if (!request_region(iobase, LABPC_SIZE, dev->board_name)) {
1684                         dev_err(dev->class_dev, "I/O port conflict\n");
1685                         return -EIO;
1686                 }
1687         }
1688         dev->iobase = iobase;
1689
1690         if (board->has_mmio) {
1691                 devpriv->read_byte = labpc_readb;
1692                 devpriv->write_byte = labpc_writeb;
1693         } else {
1694                 devpriv->read_byte = labpc_inb;
1695                 devpriv->write_byte = labpc_outb;
1696         }
1697         /* initialize board's command registers */
1698         devpriv->write_byte(devpriv->cmd1, dev->iobase + COMMAND1_REG);
1699         devpriv->write_byte(devpriv->cmd2, dev->iobase + COMMAND2_REG);
1700         devpriv->write_byte(devpriv->cmd3, dev->iobase + COMMAND3_REG);
1701         devpriv->write_byte(devpriv->cmd4, dev->iobase + COMMAND4_REG);
1702         if (board->register_layout == labpc_1200_layout) {
1703                 devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1704                 devpriv->write_byte(devpriv->cmd6, dev->iobase + COMMAND6_REG);
1705         }
1706
1707         /* grab our IRQ */
1708         if (irq) {
1709                 isr_flags = 0;
1710                 if (board->bustype == pci_bustype ||
1711                     board->bustype == pcmcia_bustype)
1712                         isr_flags |= IRQF_SHARED;
1713                 if (request_irq(irq, labpc_interrupt, isr_flags,
1714                                 dev->board_name, dev)) {
1715                         dev_err(dev->class_dev, "unable to allocate irq %u\n",
1716                                 irq);
1717                         return -EINVAL;
1718                 }
1719         }
1720         dev->irq = irq;
1721
1722 #ifdef CONFIG_ISA_DMA_API
1723         /* grab dma channel */
1724         if (dma_chan > 3) {
1725                 dev_err(dev->class_dev, "invalid dma channel %u\n", dma_chan);
1726                 return -EINVAL;
1727         } else if (dma_chan) {
1728                 unsigned long dma_flags;
1729
1730                 /* allocate dma buffer */
1731                 devpriv->dma_buffer = kmalloc(dma_buffer_size,
1732                                               GFP_KERNEL | GFP_DMA);
1733                 if (devpriv->dma_buffer == NULL)
1734                         return -ENOMEM;
1735
1736                 if (request_dma(dma_chan, dev->board_name)) {
1737                         dev_err(dev->class_dev,
1738                                 "failed to allocate dma channel %u\n",
1739                                 dma_chan);
1740                         return -EINVAL;
1741                 }
1742                 devpriv->dma_chan = dma_chan;
1743                 dma_flags = claim_dma_lock();
1744                 disable_dma(devpriv->dma_chan);
1745                 set_dma_mode(devpriv->dma_chan, DMA_MODE_READ);
1746                 release_dma_lock(dma_flags);
1747         }
1748 #endif
1749
1750         ret = comedi_alloc_subdevices(dev, 5);
1751         if (ret)
1752                 return ret;
1753
1754         /* analog input subdevice */
1755         s = &dev->subdevices[0];
1756         s->type         = COMEDI_SUBD_AI;
1757         s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_COMMON | SDF_DIFF;
1758         s->n_chan       = 8;
1759         s->len_chanlist = 8;
1760         s->maxdata      = 0x0fff;
1761         s->range_table  = board->ai_range_table;
1762         s->insn_read    = labpc_ai_insn_read;
1763         if (dev->irq) {
1764                 dev->read_subdev = s;
1765                 s->subdev_flags |= SDF_CMD_READ;
1766                 s->do_cmd       = labpc_ai_cmd;
1767                 s->do_cmdtest   = labpc_ai_cmdtest;
1768                 s->cancel       = labpc_cancel;
1769         }
1770
1771         /* analog output */
1772         s = &dev->subdevices[1];
1773         if (board->has_ao) {
1774                 s->type         = COMEDI_SUBD_AO;
1775                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_GROUND;
1776                 s->n_chan       = NUM_AO_CHAN;
1777                 s->maxdata      = 0x0fff;
1778                 s->range_table  = &range_labpc_ao;
1779                 s->insn_read    = labpc_ao_insn_read;
1780                 s->insn_write   = labpc_ao_insn_write;
1781
1782                 /* initialize analog outputs to a known value */
1783                 for (i = 0; i < s->n_chan; i++) {
1784                         short lsb, msb;
1785
1786                         devpriv->ao_value[i] = s->maxdata / 2;
1787                         lsb = devpriv->ao_value[i] & 0xff;
1788                         msb = (devpriv->ao_value[i] >> 8) & 0xff;
1789                         devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(i));
1790                         devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(i));
1791                 }
1792         } else {
1793                 s->type         = COMEDI_SUBD_UNUSED;
1794         }
1795
1796         /* 8255 dio */
1797         s = &dev->subdevices[2];
1798         ret = subdev_8255_init(dev, s,
1799                                (board->has_mmio) ? labpc_8255_mmio : NULL,
1800                                dev->iobase + DIO_BASE_REG);
1801         if (ret)
1802                 return ret;
1803
1804         /*  calibration subdevices for boards that have one */
1805         s = &dev->subdevices[3];
1806         if (board->register_layout == labpc_1200_layout) {
1807                 s->type         = COMEDI_SUBD_CALIB;
1808                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
1809                 s->n_chan       = 16;
1810                 s->maxdata      = 0xff;
1811                 s->insn_read    = labpc_calib_insn_read;
1812                 s->insn_write   = labpc_calib_insn_write;
1813
1814                 for (i = 0; i < s->n_chan; i++)
1815                         write_caldac(dev, i, s->maxdata / 2);
1816         } else
1817                 s->type         = COMEDI_SUBD_UNUSED;
1818
1819         /* EEPROM */
1820         s = &dev->subdevices[4];
1821         if (board->register_layout == labpc_1200_layout) {
1822                 s->type         = COMEDI_SUBD_MEMORY;
1823                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
1824                 s->n_chan       = EEPROM_SIZE;
1825                 s->maxdata      = 0xff;
1826                 s->insn_read    = labpc_eeprom_insn_read;
1827                 s->insn_write   = labpc_eeprom_insn_write;
1828
1829                 for (i = 0; i < s->n_chan; i++)
1830                         devpriv->eeprom_data[i] = labpc_eeprom_read(dev, i);
1831         } else
1832                 s->type         = COMEDI_SUBD_UNUSED;
1833
1834         return 0;
1835 }
1836 EXPORT_SYMBOL_GPL(labpc_common_attach);
1837
1838 static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1839 {
1840         const struct labpc_boardinfo *board = comedi_board(dev);
1841         struct labpc_private *devpriv;
1842         unsigned long iobase = 0;
1843         unsigned int irq = 0;
1844         unsigned int dma_chan = 0;
1845
1846         devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
1847         if (!devpriv)
1848                 return -ENOMEM;
1849         dev->private = devpriv;
1850
1851         /* get base address, irq etc. based on bustype */
1852         switch (board->bustype) {
1853         case isa_bustype:
1854 #ifdef CONFIG_ISA_DMA_API
1855                 iobase = it->options[0];
1856                 irq = it->options[1];
1857                 dma_chan = it->options[2];
1858 #else
1859                 dev_err(dev->class_dev,
1860                         "ni_labpc driver has not been built with ISA DMA support.\n");
1861                 return -EINVAL;
1862 #endif
1863                 break;
1864         case pci_bustype:
1865 #ifdef CONFIG_COMEDI_PCI_DRIVERS
1866                 dev_err(dev->class_dev,
1867                         "manual configuration of PCI board '%s' is not supported\n",
1868                         board->name);
1869                 return -EINVAL;
1870 #else
1871                 dev_err(dev->class_dev,
1872                         "ni_labpc driver has not been built with PCI support.\n");
1873                 return -EINVAL;
1874 #endif
1875                 break;
1876         default:
1877                 dev_err(dev->class_dev,
1878                         "ni_labpc: bug! couldn't determine board type\n");
1879                 return -EINVAL;
1880                 break;
1881         }
1882
1883         return labpc_common_attach(dev, iobase, irq, dma_chan);
1884 }
1885
1886 static const struct labpc_boardinfo *
1887 labpc_pci_find_boardinfo(struct pci_dev *pcidev)
1888 {
1889         unsigned int device_id = pcidev->device;
1890         unsigned int n;
1891
1892         for (n = 0; n < ARRAY_SIZE(labpc_boards); n++) {
1893                 const struct labpc_boardinfo *board = &labpc_boards[n];
1894                 if (board->bustype == pci_bustype &&
1895                     board->device_id == device_id)
1896                         return board;
1897         }
1898         return NULL;
1899 }
1900
1901 static int labpc_auto_attach(struct comedi_device *dev,
1902                                        unsigned long context_unused)
1903 {
1904         struct pci_dev *pcidev = comedi_to_pci_dev(dev);
1905         struct labpc_private *devpriv;
1906         unsigned long iobase;
1907         unsigned int irq;
1908         int ret;
1909
1910         if (!IS_ENABLED(CONFIG_COMEDI_PCI_DRIVERS))
1911                 return -ENODEV;
1912
1913         ret = comedi_pci_enable(dev);
1914         if (ret)
1915                 return ret;
1916
1917         devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
1918         if (!devpriv)
1919                 return -ENOMEM;
1920         dev->private = devpriv;
1921
1922         dev->board_ptr = labpc_pci_find_boardinfo(pcidev);
1923         if (!dev->board_ptr)
1924                 return -ENODEV;
1925         devpriv->mite = mite_alloc(pcidev);
1926         if (!devpriv->mite)
1927                 return -ENOMEM;
1928         ret = mite_setup(devpriv->mite);
1929         if (ret < 0)
1930                 return ret;
1931         iobase = (unsigned long)devpriv->mite->daq_io_addr;
1932         irq = mite_irq(devpriv->mite);
1933         return labpc_common_attach(dev, iobase, irq, 0);
1934 }
1935
1936 void labpc_common_detach(struct comedi_device *dev)
1937 {
1938         const struct labpc_boardinfo *board = comedi_board(dev);
1939         struct labpc_private *devpriv = dev->private;
1940         struct comedi_subdevice *s;
1941
1942         if (!board)
1943                 return;
1944         if (dev->subdevices) {
1945                 s = &dev->subdevices[2];
1946                 subdev_8255_cleanup(dev, s);
1947         }
1948 #ifdef CONFIG_ISA_DMA_API
1949         /* only free stuff if it has been allocated by _attach */
1950         kfree(devpriv->dma_buffer);
1951         if (devpriv->dma_chan)
1952                 free_dma(devpriv->dma_chan);
1953 #endif
1954         if (dev->irq)
1955                 free_irq(dev->irq, dev);
1956         if (board->bustype == isa_bustype && dev->iobase)
1957                 release_region(dev->iobase, LABPC_SIZE);
1958 #ifdef CONFIG_COMEDI_PCI_DRIVERS
1959         if (devpriv->mite) {
1960                 mite_unsetup(devpriv->mite);
1961                 mite_free(devpriv->mite);
1962         }
1963         if (board->bustype == pci_bustype)
1964                 comedi_pci_disable(dev);
1965 #endif
1966 }
1967 EXPORT_SYMBOL_GPL(labpc_common_detach);
1968
1969 static struct comedi_driver labpc_driver = {
1970         .driver_name    = "ni_labpc",
1971         .module         = THIS_MODULE,
1972         .attach         = labpc_attach,
1973         .auto_attach    = labpc_auto_attach,
1974         .detach         = labpc_common_detach,
1975         .num_names      = ARRAY_SIZE(labpc_boards),
1976         .board_name     = &labpc_boards[0].name,
1977         .offset         = sizeof(struct labpc_boardinfo),
1978 };
1979
1980 #ifdef CONFIG_COMEDI_PCI_DRIVERS
1981 static DEFINE_PCI_DEVICE_TABLE(labpc_pci_table) = {
1982         { PCI_DEVICE(PCI_VENDOR_ID_NI, 0x161) },
1983         { 0 }
1984 };
1985 MODULE_DEVICE_TABLE(pci, labpc_pci_table);
1986
1987 static int labpc_pci_probe(struct pci_dev *dev,
1988                            const struct pci_device_id *id)
1989 {
1990         return comedi_pci_auto_config(dev, &labpc_driver, id->driver_data);
1991 }
1992
1993 static struct pci_driver labpc_pci_driver = {
1994         .name           = "ni_labpc",
1995         .id_table       = labpc_pci_table,
1996         .probe          = labpc_pci_probe,
1997         .remove         = comedi_pci_auto_unconfig,
1998 };
1999 module_comedi_pci_driver(labpc_driver, labpc_pci_driver);
2000 #else
2001 module_comedi_driver(labpc_driver);
2002 #endif
2003
2004
2005 MODULE_AUTHOR("Comedi http://www.comedi.org");
2006 MODULE_DESCRIPTION("Comedi low-level driver");
2007 MODULE_LICENSE("GPL");