drivers/staging/comedi/drivers/ni_labpc.c

   1 /*
   2     comedi/drivers/ni_labpc.c
   3     Driver for National Instruments Lab-PC series boards and compatibles
   4     Copyright (C) 2001, 2002, 2003 Frank Mori Hess <fmhess@users.sourceforge.net>
   5
   6     This program is free software; you can redistribute it and/or modify
   7     it under the terms of the GNU General Public License as published by
   8     the Free Software Foundation; either version 2 of the License, or
   9     (at your option) any later version.
  10
  11     This program is distributed in the hope that it will be useful,
  12     but WITHOUT ANY WARRANTY; without even the implied warranty of
  13     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14     GNU General Public License for more details.
  15
  16     You should have received a copy of the GNU General Public License
  17     along with this program; if not, write to the Free Software
  18     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19
  20 ************************************************************************
  21 */
  22 /*
  23 Driver: ni_labpc
  24 Description: National Instruments Lab-PC (& compatibles)
  25 Author: Frank Mori Hess <fmhess@users.sourceforge.net>
  26 Devices: [National Instruments] Lab-PC-1200 (labpc-1200),
  27   Lab-PC-1200AI (labpc-1200ai), Lab-PC+ (lab-pc+), PCI-1200 (ni_labpc)
  28 Status: works
  29
  30 Tested with lab-pc-1200.  For the older Lab-PC+, not all input ranges
  31 and analog references will work, the available ranges/arefs will
  32 depend on how you have configured the jumpers on your board
  33 (see your owner's manual).
  34
  35 Kernel-level ISA plug-and-play support for the lab-pc-1200
  36 boards has not
  37 yet been added to the driver, mainly due to the fact that
  38 I don't know the device id numbers.  If you have one
  39 of these boards,
  40 please file a bug report at http://comedi.org/
  41 so I can get the necessary information from you.
  42
  43 The 1200 series boards have onboard calibration dacs for correcting
  44 analog input/output offsets and gains.  The proper settings for these
  45 caldacs are stored on the board's eeprom.  To read the caldac values
  46 from the eeprom and store them into a file that can be then be used by
  47 comedilib, use the comedi_calibrate program.
  48
  49 Configuration options - ISA boards:
  50   [0] - I/O port base address
  51   [1] - IRQ (optional, required for timed or externally triggered conversions)
  52   [2] - DMA channel (optional)
  53
  54 Configuration options - PCI boards:
  55   [0] - bus (optional)
  56   [1] - slot (optional)
  57
  58 The Lab-pc+ has quirky chanlist requirements
  59 when scanning multiple channels.  Multiple channel scan
  60 sequence must start at highest channel, then decrement down to
  61 channel 0.  The rest of the cards can scan down like lab-pc+ or scan
  62 up from channel zero.  Chanlists consisting of all one channel
  63 are also legal, and allow you to pace conversions in bursts.
  64
  65 */
  66
  67 /*
  68
  69 NI manuals:
  70 341309a (labpc-1200 register manual)
  71 340914a (pci-1200)
  72 320502b (lab-pc+)
  73
  74 */
  75
  76 #include <linux/pci.h>
  77 #include <linux/interrupt.h>
  78 #include <linux/slab.h>
  79 #include <linux/io.h>
  80 #include <linux/delay.h>
  81
  82 #include "../comedidev.h"
  83
  84 #include <asm/dma.h>
  85
  86 #include "8253.h"
  87 #include "8255.h"
  88 #include "mite.h"
  89 #include "comedi_fc.h"
  90 #include "ni_labpc.h"
  91
  92 /* size of io region used by board */
  93 #define LABPC_SIZE           32
  94 /* 2 MHz master clock */
  95 #define LABPC_TIMER_BASE            500
  96
  97 /* Registers for the lab-pc+ */
  98
  99 /* write-only registers */
 100 #define COMMAND1_REG    0x0
 101 #define   ADC_GAIN_MASK (0x7 << 4)
 102 #define   ADC_CHAN_BITS(x)      ((x) & 0x7)
 103 /* enables multi channel scans */
 104 #define   ADC_SCAN_EN_BIT       0x80
 105 #define COMMAND2_REG    0x1
 106 /* enable pretriggering (used in conjunction with SWTRIG) */
 107 #define   PRETRIG_BIT   0x1
 108 /* enable paced conversions on external trigger */
 109 #define   HWTRIG_BIT    0x2
 110 /* enable paced conversions */
 111 #define   SWTRIG_BIT    0x4
 112 /* use two cascaded counters for pacing */
 113 #define   CASCADE_BIT   0x8
 114 #define   DAC_PACED_BIT(channel)        (0x40 << ((channel) & 0x1))
 115 #define COMMAND3_REG    0x2
 116 /* enable dma transfers */
 117 #define   DMA_EN_BIT    0x1
 118 /* enable interrupts for 8255 */
 119 #define   DIO_INTR_EN_BIT       0x2
 120 /* enable dma terminal count interrupt */
 121 #define   DMATC_INTR_EN_BIT     0x4
 122 /* enable timer interrupt */
 123 #define   TIMER_INTR_EN_BIT     0x8
 124 /* enable error interrupt */
 125 #define   ERR_INTR_EN_BIT       0x10
 126 /* enable fifo not empty interrupt */
 127 #define   ADC_FNE_INTR_EN_BIT   0x20
 128 #define ADC_CONVERT_REG 0x3
 129 #define DAC_LSB_REG(channel)    (0x4 + 2 * ((channel) & 0x1))
 130 #define DAC_MSB_REG(channel)    (0x5 + 2 * ((channel) & 0x1))
 131 #define ADC_CLEAR_REG   0x8
 132 #define DMATC_CLEAR_REG 0xa
 133 #define TIMER_CLEAR_REG 0xc
 134 /* 1200 boards only */
 135 #define COMMAND6_REG    0xe
 136 /* select ground or common-mode reference */
 137 #define   ADC_COMMON_BIT        0x1
 138 /*  adc unipolar */
 139 #define   ADC_UNIP_BIT  0x2
 140 /*  dac unipolar */
 141 #define   DAC_UNIP_BIT(channel) (0x4 << ((channel) & 0x1))
 142 /* enable fifo half full interrupt */
 143 #define   ADC_FHF_INTR_EN_BIT   0x20
 144 /* enable interrupt on end of hardware count */
 145 #define   A1_INTR_EN_BIT        0x40
 146 /* scan up from channel zero instead of down to zero */
 147 #define   ADC_SCAN_UP_BIT 0x80
 148 #define COMMAND4_REG    0xf
 149 /* enables 'interval' scanning */
 150 #define   INTERVAL_SCAN_EN_BIT  0x1
 151 /* enables external signal on counter b1 output to trigger scan */
 152 #define   EXT_SCAN_EN_BIT       0x2
 153 /* chooses direction (output or input) for EXTCONV* line */
 154 #define   EXT_CONVERT_OUT_BIT   0x4
 155 /* chooses differential inputs for adc (in conjunction with board jumper) */
 156 #define   ADC_DIFF_BIT  0x8
 157 #define   EXT_CONVERT_DISABLE_BIT       0x10
 158 /* 1200 boards only, calibration stuff */
 159 #define COMMAND5_REG    0x1c
 160 /* enable eeprom for write */
 161 #define   EEPROM_WRITE_UNPROTECT_BIT    0x4
 162 /* enable dithering */
 163 #define   DITHER_EN_BIT 0x8
 164 /* load calibration dac */
 165 #define   CALDAC_LOAD_BIT       0x10
 166 /* serial clock - rising edge writes, falling edge reads */
 167 #define   SCLOCK_BIT    0x20
 168 /* serial data bit for writing to eeprom or calibration dacs */
 169 #define   SDATA_BIT     0x40
 170 /* enable eeprom for read/write */
 171 #define   EEPROM_EN_BIT 0x80
 172 #define INTERVAL_COUNT_REG      0x1e
 173 #define INTERVAL_LOAD_REG       0x1f
 174 #define   INTERVAL_LOAD_BITS    0x1
 175
 176 /* read-only registers */
 177 #define STATUS1_REG     0x0
 178 /* data is available in fifo */
 179 #define   DATA_AVAIL_BIT        0x1
 180 /* overrun has occurred */
 181 #define   OVERRUN_BIT   0x2
 182 /* fifo overflow */
 183 #define   OVERFLOW_BIT  0x4
 184 /* timer interrupt has occurred */
 185 #define   TIMER_BIT     0x8
 186 /* dma terminal count has occurred */
 187 #define   DMATC_BIT     0x10
 188 /* external trigger has occurred */
 189 #define   EXT_TRIG_BIT  0x40
 190 /* 1200 boards only */
 191 #define STATUS2_REG     0x1d
 192 /* programmable eeprom serial output */
 193 #define   EEPROM_OUT_BIT        0x1
 194 /* counter A1 terminal count */
 195 #define   A1_TC_BIT     0x2
 196 /* fifo not half full */
 197 #define   FNHF_BIT      0x4
 198 #define ADC_FIFO_REG    0xa
 199
 200 #define DIO_BASE_REG    0x10
 201 #define COUNTER_A_BASE_REG      0x14
 202 #define COUNTER_A_CONTROL_REG   (COUNTER_A_BASE_REG + 0x3)
 203 /* check modes put conversion pacer output in harmless state (a0 mode 2) */
 204 #define   INIT_A0_BITS  0x14
 205 /* put hardware conversion counter output in harmless state (a1 mode 0) */
 206 #define   INIT_A1_BITS  0x70
 207 #define COUNTER_B_BASE_REG      0x18
 208
 209 enum scan_mode {
 210         MODE_SINGLE_CHAN,
 211         MODE_SINGLE_CHAN_INTERVAL,
 212         MODE_MULT_CHAN_UP,
 213         MODE_MULT_CHAN_DOWN,
 214 };
 215
 216 static const int labpc_plus_ai_gain_bits[] = {
 217         0x00, 0x10, 0x20, 0x30, 0x40, 0x50, 0x60, 0x70,
 218         0x00, 0x10, 0x20, 0x30, 0x40, 0x50, 0x60, 0x70,
 219 };
 220
 221 static const struct comedi_lrange range_labpc_plus_ai = {
 222         16, {
 223                 BIP_RANGE(5),
 224                 BIP_RANGE(4),
 225                 BIP_RANGE(2.5),
 226                 BIP_RANGE(1),
 227                 BIP_RANGE(0.5),
 228                 BIP_RANGE(0.25),
 229                 BIP_RANGE(0.1),
 230                 BIP_RANGE(0.05),
 231                 UNI_RANGE(10),
 232                 UNI_RANGE(8),
 233                 UNI_RANGE(5),
 234                 UNI_RANGE(2),
 235                 UNI_RANGE(1),
 236                 UNI_RANGE(0.5),
 237                 UNI_RANGE(0.2),
 238                 UNI_RANGE(0.1)
 239         }
 240 };
 241
 242 const int labpc_1200_ai_gain_bits[] = {
 243         0x00, 0x20, 0x30, 0x40, 0x50, 0x60, 0x70,
 244         0x00, 0x20, 0x30, 0x40, 0x50, 0x60, 0x70,
 245 };
 246 EXPORT_SYMBOL_GPL(labpc_1200_ai_gain_bits);
 247
 248 const struct comedi_lrange range_labpc_1200_ai = {
 249         14, {
 250                 BIP_RANGE(5),
 251                 BIP_RANGE(2.5),
 252                 BIP_RANGE(1),
 253                 BIP_RANGE(0.5),
 254                 BIP_RANGE(0.25),
 255                 BIP_RANGE(0.1),
 256                 BIP_RANGE(0.05),
 257                 UNI_RANGE(10),
 258                 UNI_RANGE(5),
 259                 UNI_RANGE(2),
 260                 UNI_RANGE(1),
 261                 UNI_RANGE(0.5),
 262                 UNI_RANGE(0.2),
 263                 UNI_RANGE(0.1)
 264         }
 265 };
 266 EXPORT_SYMBOL_GPL(range_labpc_1200_ai);
 267
 268 static const struct comedi_lrange range_labpc_ao = {
 269         2, {
 270                 BIP_RANGE(5),
 271                 UNI_RANGE(10)
 272         }
 273 };
 274
 275 /* functions that do inb/outb and readb/writeb so we can use
 276  * function pointers to decide which to use */
 277 static inline unsigned int labpc_inb(unsigned long address)
 278 {
 279         return inb(address);
 280 }
 281
 282 static inline void labpc_outb(unsigned int byte, unsigned long address)
 283 {
 284         outb(byte, address);
 285 }
 286
 287 static inline unsigned int labpc_readb(unsigned long address)
 288 {
 289         return readb((void __iomem *)address);
 290 }
 291
 292 static inline void labpc_writeb(unsigned int byte, unsigned long address)
 293 {
 294         writeb(byte, (void __iomem *)address);
 295 }
 296
 297 static const struct labpc_boardinfo labpc_boards[] = {
 298         {
 299                 .name                   = "lab-pc-1200",
 300                 .ai_speed               = 10000,
 301                 .bustype                = isa_bustype,
 302                 .register_layout        = labpc_1200_layout,
 303                 .has_ao                 = 1,
 304                 .ai_range_table         = &range_labpc_1200_ai,
 305                 .ai_range_code          = labpc_1200_ai_gain_bits,
 306                 .ai_scan_up             = 1,
 307         }, {
 308                 .name                   = "lab-pc-1200ai",
 309                 .ai_speed               = 10000,
 310                 .bustype                = isa_bustype,
 311                 .register_layout        = labpc_1200_layout,
 312                 .ai_range_table         = &range_labpc_1200_ai,
 313                 .ai_range_code          = labpc_1200_ai_gain_bits,
 314                 .ai_scan_up             = 1,
 315         }, {
 316                 .name                   = "lab-pc+",
 317                 .ai_speed               = 12000,
 318                 .bustype                = isa_bustype,
 319                 .register_layout        = labpc_plus_layout,
 320                 .has_ao                 = 1,
 321                 .ai_range_table         = &range_labpc_plus_ai,
 322                 .ai_range_code          = labpc_plus_ai_gain_bits,
 323         },
 324 #ifdef CONFIG_COMEDI_PCI_DRIVERS
 325         {
 326                 .name                   = "pci-1200",
 327                 .device_id              = 0x161,
 328                 .ai_speed               = 10000,
 329                 .bustype                = pci_bustype,
 330                 .register_layout        = labpc_1200_layout,
 331                 .has_ao                 = 1,
 332                 .ai_range_table         = &range_labpc_1200_ai,
 333                 .ai_range_code          = labpc_1200_ai_gain_bits,
 334                 .ai_scan_up             = 1,
 335                 .has_mmio               = 1,
 336         },
 337 #endif
 338 };
 339
 340 /* size in bytes of dma buffer */
 341 static const int dma_buffer_size = 0xff00;
 342 /* 2 bytes per sample */
 343 static const int sample_size = 2;
 344
 345 static bool labpc_range_is_unipolar(struct comedi_subdevice *s,
 346                                     unsigned int range)
 347 {
 348         const struct comedi_lrange *lrange = s->range_table;
 349         const struct comedi_krange *krange = &lrange->range[range];
 350
 351         if (krange->min < 0)
 352                 return false;
 353         else
 354                 return true;
 355 }
 356
 357 static void labpc_clear_adc_fifo(const struct comedi_device *dev)
 358 {
 359         struct labpc_private *devpriv = dev->private;
 360
 361         devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
 362         devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 363         devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 364 }
 365
 366 static int labpc_ai_insn_read(struct comedi_device *dev,
 367                               struct comedi_subdevice *s,
 368                               struct comedi_insn *insn,
 369                               unsigned int *data)
 370 {
 371         const struct labpc_boardinfo *board = comedi_board(dev);
 372         struct labpc_private *devpriv = dev->private;
 373         int i, n;
 374         int chan, range;
 375         int lsb, msb;
 376         int timeout = 1000;
 377         unsigned long flags;
 378
 379         /*  disable timed conversions */
 380         spin_lock_irqsave(&dev->spinlock, flags);
 381         devpriv->cmd2 &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
 382         devpriv->write_byte(devpriv->cmd2, dev->iobase + COMMAND2_REG);
 383         spin_unlock_irqrestore(&dev->spinlock, flags);
 384
 385         /*  disable interrupt generation and dma */
 386         devpriv->cmd3 = 0;
 387         devpriv->write_byte(devpriv->cmd3, dev->iobase + COMMAND3_REG);
 388
 389         /* set gain and channel */
 390         devpriv->cmd1 = 0;
 391         chan = CR_CHAN(insn->chanspec);
 392         range = CR_RANGE(insn->chanspec);
 393         devpriv->cmd1 |= board->ai_range_code[range];
 394         /* munge channel bits for differential/scan disabled mode */
 395         if (CR_AREF(insn->chanspec) == AREF_DIFF)
 396                 chan *= 2;
 397         devpriv->cmd1 |= ADC_CHAN_BITS(chan);
 398         devpriv->write_byte(devpriv->cmd1, dev->iobase + COMMAND1_REG);
 399
 400         /* setup cmd6 register for 1200 boards */
 401         if (board->register_layout == labpc_1200_layout) {
 402                 /*  reference inputs to ground or common? */
 403                 if (CR_AREF(insn->chanspec) != AREF_GROUND)
 404                         devpriv->cmd6 |= ADC_COMMON_BIT;
 405                 else
 406                         devpriv->cmd6 &= ~ADC_COMMON_BIT;
 407                 /* bipolar or unipolar range? */
 408                 if (labpc_range_is_unipolar(s, range))
 409                         devpriv->cmd6 |= ADC_UNIP_BIT;
 410                 else
 411                         devpriv->cmd6 &= ~ADC_UNIP_BIT;
 412                 /* don't interrupt on fifo half full */
 413                 devpriv->cmd6 &= ~ADC_FHF_INTR_EN_BIT;
 414                 /* don't enable interrupt on counter a1 terminal count? */
 415                 devpriv->cmd6 &= ~A1_INTR_EN_BIT;
 416                 /* write to register */
 417                 devpriv->write_byte(devpriv->cmd6, dev->iobase + COMMAND6_REG);
 418         }
 419         /* setup cmd4 register */
 420         devpriv->cmd4 = 0;
 421         devpriv->cmd4 |= EXT_CONVERT_DISABLE_BIT;
 422         /* single-ended/differential */
 423         if (CR_AREF(insn->chanspec) == AREF_DIFF)
 424                 devpriv->cmd4 |= ADC_DIFF_BIT;
 425         devpriv->write_byte(devpriv->cmd4, dev->iobase + COMMAND4_REG);
 426
 427         /*
 428          * initialize pacer counter output to make sure it doesn't
 429          * cause any problems
 430          */
 431         devpriv->write_byte(INIT_A0_BITS, dev->iobase + COUNTER_A_CONTROL_REG);
 432
 433         labpc_clear_adc_fifo(dev);
 434
 435         for (n = 0; n < insn->n; n++) {
 436                 /* trigger conversion */
 437                 devpriv->write_byte(0x1, dev->iobase + ADC_CONVERT_REG);
 438
 439                 for (i = 0; i < timeout; i++) {
 440                         if (devpriv->read_byte(dev->iobase +
 441                                                STATUS1_REG) & DATA_AVAIL_BIT)
 442                                 break;
 443                         udelay(1);
 444                 }
 445                 if (i == timeout) {
 446                         comedi_error(dev, "timeout");
 447                         return -ETIME;
 448                 }
 449                 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 450                 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 451                 data[n] = (msb << 8) | lsb;
 452         }
 453
 454         return n;
 455 }
 456
 457 #ifdef CONFIG_ISA_DMA_API
 458 /* utility function that suggests a dma transfer size in bytes */
 459 static unsigned int labpc_suggest_transfer_size(const struct comedi_cmd *cmd)
 460 {
 461         unsigned int size;
 462         unsigned int freq;
 463
 464         if (cmd->convert_src == TRIG_TIMER)
 465                 freq = 1000000000 / cmd->convert_arg;
 466         /* return some default value */
 467         else
 468                 freq = 0xffffffff;
 469
 470         /* make buffer fill in no more than 1/3 second */
 471         size = (freq / 3) * sample_size;
 472
 473         /* set a minimum and maximum size allowed */
 474         if (size > dma_buffer_size)
 475                 size = dma_buffer_size - dma_buffer_size % sample_size;
 476         else if (size < sample_size)
 477                 size = sample_size;
 478
 479         return size;
 480 }
 481 #endif
 482
 483 static int labpc_use_continuous_mode(const struct comedi_cmd *cmd,
 484                                      enum scan_mode mode)
 485 {
 486         if (mode == MODE_SINGLE_CHAN)
 487                 return 1;
 488
 489         if (cmd->scan_begin_src == TRIG_FOLLOW)
 490                 return 1;
 491
 492         return 0;
 493 }
 494
 495 static unsigned int labpc_ai_convert_period(const struct comedi_cmd *cmd,
 496                                             enum scan_mode mode)
 497 {
 498         if (cmd->convert_src != TRIG_TIMER)
 499                 return 0;
 500
 501         if (mode == MODE_SINGLE_CHAN && cmd->scan_begin_src == TRIG_TIMER)
 502                 return cmd->scan_begin_arg;
 503
 504         return cmd->convert_arg;
 505 }
 506
 507 static void labpc_set_ai_convert_period(struct comedi_cmd *cmd,
 508                                         enum scan_mode mode, unsigned int ns)
 509 {
 510         if (cmd->convert_src != TRIG_TIMER)
 511                 return;
 512
 513         if (mode == MODE_SINGLE_CHAN &&
 514             cmd->scan_begin_src == TRIG_TIMER) {
 515                 cmd->scan_begin_arg = ns;
 516                 if (cmd->convert_arg > cmd->scan_begin_arg)
 517                         cmd->convert_arg = cmd->scan_begin_arg;
 518         } else
 519                 cmd->convert_arg = ns;
 520 }
 521
 522 static unsigned int labpc_ai_scan_period(const struct comedi_cmd *cmd,
 523                                         enum scan_mode mode)
 524 {
 525         if (cmd->scan_begin_src != TRIG_TIMER)
 526                 return 0;
 527
 528         if (mode == MODE_SINGLE_CHAN && cmd->convert_src == TRIG_TIMER)
 529                 return 0;
 530
 531         return cmd->scan_begin_arg;
 532 }
 533
 534 static void labpc_set_ai_scan_period(struct comedi_cmd *cmd,
 535                                      enum scan_mode mode, unsigned int ns)
 536 {
 537         if (cmd->scan_begin_src != TRIG_TIMER)
 538                 return;
 539
 540         if (mode == MODE_SINGLE_CHAN && cmd->convert_src == TRIG_TIMER)
 541                 return;
 542
 543         cmd->scan_begin_arg = ns;
 544 }
 545
 546 /* figures out what counter values to use based on command */
 547 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd,
 548                              enum scan_mode mode)
 549 {
 550         struct labpc_private *devpriv = dev->private;
 551         /* max value for 16 bit counter in mode 2 */
 552         const int max_counter_value = 0x10000;
 553         /* min value for 16 bit counter in mode 2 */
 554         const int min_counter_value = 2;
 555         unsigned int base_period;
 556         unsigned int scan_period;
 557         unsigned int convert_period;
 558
 559         /*
 560          * if both convert and scan triggers are TRIG_TIMER, then they
 561          * both rely on counter b0
 562          */
 563         convert_period = labpc_ai_convert_period(cmd, mode);
 564         scan_period = labpc_ai_scan_period(cmd, mode);
 565         if (convert_period && scan_period) {
 566                 /*
 567                  * pick the lowest b0 divisor value we can (for maximum input
 568                  * clock speed on convert and scan counters)
 569                  */
 570                 devpriv->divisor_b0 = (scan_period - 1) /
 571                     (LABPC_TIMER_BASE * max_counter_value) + 1;
 572                 if (devpriv->divisor_b0 < min_counter_value)
 573                         devpriv->divisor_b0 = min_counter_value;
 574                 if (devpriv->divisor_b0 > max_counter_value)
 575                         devpriv->divisor_b0 = max_counter_value;
 576
 577                 base_period = LABPC_TIMER_BASE * devpriv->divisor_b0;
 578
 579                 /*  set a0 for conversion frequency and b1 for scan frequency */
 580                 switch (cmd->flags & TRIG_ROUND_MASK) {
 581                 default:
 582                 case TRIG_ROUND_NEAREST:
 583                         devpriv->divisor_a0 =
 584                             (convert_period + (base_period / 2)) / base_period;
 585                         devpriv->divisor_b1 =
 586                             (scan_period + (base_period / 2)) / base_period;
 587                         break;
 588                 case TRIG_ROUND_UP:
 589                         devpriv->divisor_a0 =
 590                             (convert_period + (base_period - 1)) / base_period;
 591                         devpriv->divisor_b1 =
 592                             (scan_period + (base_period - 1)) / base_period;
 593                         break;
 594                 case TRIG_ROUND_DOWN:
 595                         devpriv->divisor_a0 = convert_period / base_period;
 596                         devpriv->divisor_b1 = scan_period / base_period;
 597                         break;
 598                 }
 599                 /*  make sure a0 and b1 values are acceptable */
 600                 if (devpriv->divisor_a0 < min_counter_value)
 601                         devpriv->divisor_a0 = min_counter_value;
 602                 if (devpriv->divisor_a0 > max_counter_value)
 603                         devpriv->divisor_a0 = max_counter_value;
 604                 if (devpriv->divisor_b1 < min_counter_value)
 605                         devpriv->divisor_b1 = min_counter_value;
 606                 if (devpriv->divisor_b1 > max_counter_value)
 607                         devpriv->divisor_b1 = max_counter_value;
 608                 /*  write corrected timings to command */
 609                 labpc_set_ai_convert_period(cmd, mode,
 610                                             base_period * devpriv->divisor_a0);
 611                 labpc_set_ai_scan_period(cmd, mode,
 612                                          base_period * devpriv->divisor_b1);
 613                 /*
 614                  * if only one TRIG_TIMER is used, we can employ the generic
 615                  * cascaded timing functions
 616                  */
 617         } else if (scan_period) {
 618                 /*
 619                  * calculate cascaded counter values
 620                  * that give desired scan timing
 621                  */
 622                 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
 623                                                &(devpriv->divisor_b1),
 624                                                &(devpriv->divisor_b0),
 625                                                &scan_period,
 626                                                cmd->flags & TRIG_ROUND_MASK);
 627                 labpc_set_ai_scan_period(cmd, mode, scan_period);
 628         } else if (convert_period) {
 629                 /*
 630                  * calculate cascaded counter values
 631                  * that give desired conversion timing
 632                  */
 633                 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
 634                                                &(devpriv->divisor_a0),
 635                                                &(devpriv->divisor_b0),
 636                                                &convert_period,
 637                                                cmd->flags & TRIG_ROUND_MASK);
 638                 labpc_set_ai_convert_period(cmd, mode, convert_period);
 639         }
 640 }
 641
 642 static enum scan_mode labpc_ai_scan_mode(const struct comedi_cmd *cmd)
 643 {
 644         if (cmd->chanlist_len == 1)
 645                 return MODE_SINGLE_CHAN;
 646
 647         /* chanlist may be NULL during cmdtest. */
 648         if (cmd->chanlist == NULL)
 649                 return MODE_MULT_CHAN_UP;
 650
 651         if (CR_CHAN(cmd->chanlist[0]) == CR_CHAN(cmd->chanlist[1]))
 652                 return MODE_SINGLE_CHAN_INTERVAL;
 653
 654         if (CR_CHAN(cmd->chanlist[0]) < CR_CHAN(cmd->chanlist[1]))
 655                 return MODE_MULT_CHAN_UP;
 656
 657         if (CR_CHAN(cmd->chanlist[0]) > CR_CHAN(cmd->chanlist[1]))
 658                 return MODE_MULT_CHAN_DOWN;
 659
 660         pr_err("ni_labpc: bug! cannot determine AI scan mode\n");
 661         return 0;
 662 }
 663
 664 static int labpc_ai_chanlist_invalid(const struct comedi_device *dev,
 665                                      const struct comedi_cmd *cmd,
 666                                      enum scan_mode mode)
 667 {
 668         int channel, range, aref, i;
 669
 670         if (cmd->chanlist == NULL)
 671                 return 0;
 672
 673         if (mode == MODE_SINGLE_CHAN)
 674                 return 0;
 675
 676         if (mode == MODE_SINGLE_CHAN_INTERVAL) {
 677                 if (cmd->chanlist_len > 0xff) {
 678                         comedi_error(dev,
 679                                      "ni_labpc: chanlist too long for single channel interval mode\n");
 680                         return 1;
 681                 }
 682         }
 683
 684         channel = CR_CHAN(cmd->chanlist[0]);
 685         range = CR_RANGE(cmd->chanlist[0]);
 686         aref = CR_AREF(cmd->chanlist[0]);
 687
 688         for (i = 0; i < cmd->chanlist_len; i++) {
 689
 690                 switch (mode) {
 691                 case MODE_SINGLE_CHAN_INTERVAL:
 692                         if (CR_CHAN(cmd->chanlist[i]) != channel) {
 693                                 comedi_error(dev,
 694                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 695                                 return 1;
 696                         }
 697                         break;
 698                 case MODE_MULT_CHAN_UP:
 699                         if (CR_CHAN(cmd->chanlist[i]) != i) {
 700                                 comedi_error(dev,
 701                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 702                                 return 1;
 703                         }
 704                         break;
 705                 case MODE_MULT_CHAN_DOWN:
 706                         if (CR_CHAN(cmd->chanlist[i]) !=
 707                             cmd->chanlist_len - i - 1) {
 708                                 comedi_error(dev,
 709                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 710                                 return 1;
 711                         }
 712                         break;
 713                 default:
 714                         dev_err(dev->class_dev,
 715                                 "ni_labpc: bug! in chanlist check\n");
 716                         return 1;
 717                         break;
 718                 }
 719
 720                 if (CR_RANGE(cmd->chanlist[i]) != range) {
 721                         comedi_error(dev,
 722                                      "entries in chanlist must all have the same range\n");
 723                         return 1;
 724                 }
 725
 726                 if (CR_AREF(cmd->chanlist[i]) != aref) {
 727                         comedi_error(dev,
 728                                      "entries in chanlist must all have the same reference\n");
 729                         return 1;
 730                 }
 731         }
 732
 733         return 0;
 734 }
 735
 736 static int labpc_ai_cmdtest(struct comedi_device *dev,
 737                             struct comedi_subdevice *s, struct comedi_cmd *cmd)
 738 {
 739         const struct labpc_boardinfo *board = comedi_board(dev);
 740         int err = 0;
 741         int tmp, tmp2;
 742         unsigned int stop_mask;
 743         enum scan_mode mode;
 744
 745         /* Step 1 : check if triggers are trivially valid */
 746
 747         err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
 748         err |= cfc_check_trigger_src(&cmd->scan_begin_src,
 749                                         TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT);
 750         err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_TIMER | TRIG_EXT);
 751         err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
 752
 753         stop_mask = TRIG_COUNT | TRIG_NONE;
 754         if (board->register_layout == labpc_1200_layout)
 755                 stop_mask |= TRIG_EXT;
 756         err |= cfc_check_trigger_src(&cmd->stop_src, stop_mask);
 757
 758         if (err)
 759                 return 1;
 760
 761         /* Step 2a : make sure trigger sources are unique */
 762
 763         err |= cfc_check_trigger_is_unique(cmd->start_src);
 764         err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
 765         err |= cfc_check_trigger_is_unique(cmd->convert_src);
 766         err |= cfc_check_trigger_is_unique(cmd->stop_src);
 767
 768         /* Step 2b : and mutually compatible */
 769
 770         /* can't have external stop and start triggers at once */
 771         if (cmd->start_src == TRIG_EXT && cmd->stop_src == TRIG_EXT)
 772                 err++;
 773
 774         if (err)
 775                 return 2;
 776
 777         /* Step 3: check if arguments are trivially valid */
 778
 779         if (cmd->start_arg == TRIG_NOW)
 780                 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
 781
 782         if (!cmd->chanlist_len)
 783                 err |= -EINVAL;
 784         err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
 785
 786         if (cmd->convert_src == TRIG_TIMER)
 787                 err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
 788                                                  board->ai_speed);
 789
 790         /* make sure scan timing is not too fast */
 791         if (cmd->scan_begin_src == TRIG_TIMER) {
 792                 if (cmd->convert_src == TRIG_TIMER)
 793                         err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
 794                                         cmd->convert_arg * cmd->chanlist_len);
 795                 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
 796                                 board->ai_speed * cmd->chanlist_len);
 797         }
 798
 799         switch (cmd->stop_src) {
 800         case TRIG_COUNT:
 801                 err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
 802                 break;
 803         case TRIG_NONE:
 804                 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
 805                 break;
 806                 /*
 807                  * TRIG_EXT doesn't care since it doesn't
 808                  * trigger off a numbered channel
 809                  */
 810         default:
 811                 break;
 812         }
 813
 814         if (err)
 815                 return 3;
 816
 817         /* step 4: fix up any arguments */
 818
 819         tmp = cmd->convert_arg;
 820         tmp2 = cmd->scan_begin_arg;
 821         mode = labpc_ai_scan_mode(cmd);
 822         labpc_adc_timing(dev, cmd, mode);
 823         if (tmp != cmd->convert_arg || tmp2 != cmd->scan_begin_arg)
 824                 err++;
 825
 826         if (err)
 827                 return 4;
 828
 829         if (labpc_ai_chanlist_invalid(dev, cmd, mode))
 830                 return 5;
 831
 832         return 0;
 833 }
 834
 835 static inline int labpc_counter_load(struct comedi_device *dev,
 836                                      unsigned long base_address,
 837                                      unsigned int counter_number,
 838                                      unsigned int count, unsigned int mode)
 839 {
 840         const struct labpc_boardinfo *board = comedi_board(dev);
 841
 842         if (board->has_mmio)
 843                 return i8254_mm_load((void __iomem *)base_address, 0,
 844                                      counter_number, count, mode);
 845         else
 846                 return i8254_load(base_address, 0, counter_number, count, mode);
 847 }
 848
 849 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
 850 {
 851         const struct labpc_boardinfo *board = comedi_board(dev);
 852         struct labpc_private *devpriv = dev->private;
 853         int channel, range, aref;
 854         int ret;
 855         struct comedi_async *async = s->async;
 856         struct comedi_cmd *cmd = &async->cmd;
 857         enum transfer_type xfer;
 858         enum scan_mode mode;
 859         unsigned long flags;
 860
 861         if (!dev->irq) {
 862                 comedi_error(dev, "no irq assigned, cannot perform command");
 863                 return -1;
 864         }
 865
 866         range = CR_RANGE(cmd->chanlist[0]);
 867         aref = CR_AREF(cmd->chanlist[0]);
 868
 869         /* make sure board is disabled before setting up acquisition */
 870         spin_lock_irqsave(&dev->spinlock, flags);
 871         devpriv->cmd2 &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
 872         devpriv->write_byte(devpriv->cmd2, dev->iobase + COMMAND2_REG);
 873         spin_unlock_irqrestore(&dev->spinlock, flags);
 874
 875         devpriv->cmd3 = 0;
 876         devpriv->write_byte(devpriv->cmd3, dev->iobase + COMMAND3_REG);
 877
 878         /*  initialize software conversion count */
 879         if (cmd->stop_src == TRIG_COUNT)
 880                 devpriv->count = cmd->stop_arg * cmd->chanlist_len;
 881
 882         /*  setup hardware conversion counter */
 883         if (cmd->stop_src == TRIG_EXT) {
 884                 /*
 885                  * load counter a1 with count of 3
 886                  * (pc+ manual says this is minimum allowed) using mode 0
 887                  */
 888                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
 889                                          1, 3, 0);
 890                 if (ret < 0) {
 891                         comedi_error(dev, "error loading counter a1");
 892                         return -1;
 893                 }
 894         } else                  /*
 895                                  * otherwise, just put a1 in mode 0
 896                                  * with no count to set its output low
 897                                  */
 898                 devpriv->write_byte(INIT_A1_BITS,
 899                                     dev->iobase + COUNTER_A_CONTROL_REG);
 900
 901 #ifdef CONFIG_ISA_DMA_API
 902         /*  figure out what method we will use to transfer data */
 903         if (devpriv->dma_chan &&        /*  need a dma channel allocated */
 904                 /*
 905                  * dma unsafe at RT priority,
 906                  * and too much setup time for TRIG_WAKE_EOS for
 907                  */
 908             (cmd->flags & (TRIG_WAKE_EOS | TRIG_RT)) == 0 &&
 909             /*  only available on the isa boards */
 910             board->bustype == isa_bustype) {
 911                 xfer = isa_dma_transfer;
 912                 /* pc-plus has no fifo-half full interrupt */
 913         } else
 914 #endif
 915         if (board->register_layout == labpc_1200_layout &&
 916                    /*  wake-end-of-scan should interrupt on fifo not empty */
 917                    (cmd->flags & TRIG_WAKE_EOS) == 0 &&
 918                    /*  make sure we are taking more than just a few points */
 919                    (cmd->stop_src != TRIG_COUNT || devpriv->count > 256)) {
 920                 xfer = fifo_half_full_transfer;
 921         } else
 922                 xfer = fifo_not_empty_transfer;
 923         devpriv->current_transfer = xfer;
 924         mode = labpc_ai_scan_mode(cmd);
 925
 926         /*  setup cmd6 register for 1200 boards */
 927         if (board->register_layout == labpc_1200_layout) {
 928                 /*  reference inputs to ground or common? */
 929                 if (aref != AREF_GROUND)
 930                         devpriv->cmd6 |= ADC_COMMON_BIT;
 931                 else
 932                         devpriv->cmd6 &= ~ADC_COMMON_BIT;
 933                 /*  bipolar or unipolar range? */
 934                 if (labpc_range_is_unipolar(s, range))
 935                         devpriv->cmd6 |= ADC_UNIP_BIT;
 936                 else
 937                         devpriv->cmd6 &= ~ADC_UNIP_BIT;
 938                 /*  interrupt on fifo half full? */
 939                 if (xfer == fifo_half_full_transfer)
 940                         devpriv->cmd6 |= ADC_FHF_INTR_EN_BIT;
 941                 else
 942                         devpriv->cmd6 &= ~ADC_FHF_INTR_EN_BIT;
 943                 /*  enable interrupt on counter a1 terminal count? */
 944                 if (cmd->stop_src == TRIG_EXT)
 945                         devpriv->cmd6 |= A1_INTR_EN_BIT;
 946                 else
 947                         devpriv->cmd6 &= ~A1_INTR_EN_BIT;
 948                 /*  are we scanning up or down through channels? */
 949                 if (mode == MODE_MULT_CHAN_UP)
 950                         devpriv->cmd6 |= ADC_SCAN_UP_BIT;
 951                 else
 952                         devpriv->cmd6 &= ~ADC_SCAN_UP_BIT;
 953                 /*  write to register */
 954                 devpriv->write_byte(devpriv->cmd6, dev->iobase + COMMAND6_REG);
 955         }
 956
 957         /* setup channel list, etc (cmd1 register) */
 958         devpriv->cmd1 = 0;
 959         if (mode == MODE_MULT_CHAN_UP)
 960                 channel = CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1]);
 961         else
 962                 channel = CR_CHAN(cmd->chanlist[0]);
 963         /* munge channel bits for differential / scan disabled mode */
 964         if ((mode == MODE_SINGLE_CHAN || mode == MODE_SINGLE_CHAN_INTERVAL) &&
 965             aref == AREF_DIFF)
 966                 channel *= 2;
 967         devpriv->cmd1 |= ADC_CHAN_BITS(channel);
 968         devpriv->cmd1 |= board->ai_range_code[range];
 969         devpriv->write_byte(devpriv->cmd1, dev->iobase + COMMAND1_REG);
 970         /* manual says to set scan enable bit on second pass */
 971         if (mode == MODE_MULT_CHAN_UP || mode == MODE_MULT_CHAN_DOWN) {
 972                 devpriv->cmd1 |= ADC_SCAN_EN_BIT;
 973                 /* need a brief delay before enabling scan, or scan
 974                  * list will get screwed when you switch
 975                  * between scan up to scan down mode - dunno why */
 976                 udelay(1);
 977                 devpriv->write_byte(devpriv->cmd1, dev->iobase + COMMAND1_REG);
 978         }
 979
 980         devpriv->write_byte(cmd->chanlist_len,
 981                             dev->iobase + INTERVAL_COUNT_REG);
 982         /*  load count */
 983         devpriv->write_byte(INTERVAL_LOAD_BITS,
 984                             dev->iobase + INTERVAL_LOAD_REG);
 985
 986         if (cmd->convert_src == TRIG_TIMER || cmd->scan_begin_src == TRIG_TIMER) {
 987                 /*  set up pacing */
 988                 labpc_adc_timing(dev, cmd, mode);
 989                 /*  load counter b0 in mode 3 */
 990                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
 991                                          0, devpriv->divisor_b0, 3);
 992                 if (ret < 0) {
 993                         comedi_error(dev, "error loading counter b0");
 994                         return -1;
 995                 }
 996         }
 997         /*  set up conversion pacing */
 998         if (labpc_ai_convert_period(cmd, mode)) {
 999                 /*  load counter a0 in mode 2 */
1000                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
1001                                          0, devpriv->divisor_a0, 2);
1002                 if (ret < 0) {
1003                         comedi_error(dev, "error loading counter a0");
1004                         return -1;
1005                 }
1006         } else
1007                 devpriv->write_byte(INIT_A0_BITS,
1008                                     dev->iobase + COUNTER_A_CONTROL_REG);
1009
1010         /*  set up scan pacing */
1011         if (labpc_ai_scan_period(cmd, mode)) {
1012                 /*  load counter b1 in mode 2 */
1013                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
1014                                          1, devpriv->divisor_b1, 2);
1015                 if (ret < 0) {
1016                         comedi_error(dev, "error loading counter b1");
1017                         return -1;
1018                 }
1019         }
1020
1021         labpc_clear_adc_fifo(dev);
1022
1023 #ifdef CONFIG_ISA_DMA_API
1024         /*  set up dma transfer */
1025         if (xfer == isa_dma_transfer) {
1026                 unsigned long irq_flags;
1027
1028                 irq_flags = claim_dma_lock();
1029                 disable_dma(devpriv->dma_chan);
1030                 /* clear flip-flop to make sure 2-byte registers for
1031                  * count and address get set correctly */
1032                 clear_dma_ff(devpriv->dma_chan);
1033                 set_dma_addr(devpriv->dma_chan,
1034                              virt_to_bus(devpriv->dma_buffer));
1035                 /*  set appropriate size of transfer */
1036                 devpriv->dma_transfer_size = labpc_suggest_transfer_size(cmd);
1037                 if (cmd->stop_src == TRIG_COUNT &&
1038                     devpriv->count * sample_size < devpriv->dma_transfer_size) {
1039                         devpriv->dma_transfer_size =
1040                             devpriv->count * sample_size;
1041                 }
1042                 set_dma_count(devpriv->dma_chan, devpriv->dma_transfer_size);
1043                 enable_dma(devpriv->dma_chan);
1044                 release_dma_lock(irq_flags);
1045                 /*  enable board's dma */
1046                 devpriv->cmd3 |= DMA_EN_BIT | DMATC_INTR_EN_BIT;
1047         } else
1048                 devpriv->cmd3 &= ~DMA_EN_BIT & ~DMATC_INTR_EN_BIT;
1049 #endif
1050
1051         /*  enable error interrupts */
1052         devpriv->cmd3 |= ERR_INTR_EN_BIT;
1053         /*  enable fifo not empty interrupt? */
1054         if (xfer == fifo_not_empty_transfer)
1055                 devpriv->cmd3 |= ADC_FNE_INTR_EN_BIT;
1056         else
1057                 devpriv->cmd3 &= ~ADC_FNE_INTR_EN_BIT;
1058         devpriv->write_byte(devpriv->cmd3, dev->iobase + COMMAND3_REG);
1059
1060         /*  setup any external triggering/pacing (cmd4 register) */
1061         devpriv->cmd4 = 0;
1062         if (cmd->convert_src != TRIG_EXT)
1063                 devpriv->cmd4 |= EXT_CONVERT_DISABLE_BIT;
1064         /* XXX should discard first scan when using interval scanning
1065          * since manual says it is not synced with scan clock */
1066         if (labpc_use_continuous_mode(cmd, mode) == 0) {
1067                 devpriv->cmd4 |= INTERVAL_SCAN_EN_BIT;
1068                 if (cmd->scan_begin_src == TRIG_EXT)
1069                         devpriv->cmd4 |= EXT_SCAN_EN_BIT;
1070         }
1071         /*  single-ended/differential */
1072         if (aref == AREF_DIFF)
1073                 devpriv->cmd4 |= ADC_DIFF_BIT;
1074         devpriv->write_byte(devpriv->cmd4, dev->iobase + COMMAND4_REG);
1075
1076         /*  startup acquisition */
1077
1078         /*  cmd2 reg */
1079         /*  use 2 cascaded counters for pacing */
1080         spin_lock_irqsave(&dev->spinlock, flags);
1081         devpriv->cmd2 |= CASCADE_BIT;
1082         switch (cmd->start_src) {
1083         case TRIG_EXT:
1084                 devpriv->cmd2 |= HWTRIG_BIT;
1085                 devpriv->cmd2 &= ~PRETRIG_BIT & ~SWTRIG_BIT;
1086                 break;
1087         case TRIG_NOW:
1088                 devpriv->cmd2 |= SWTRIG_BIT;
1089                 devpriv->cmd2 &= ~PRETRIG_BIT & ~HWTRIG_BIT;
1090                 break;
1091         default:
1092                 comedi_error(dev, "bug with start_src");
1093                 spin_unlock_irqrestore(&dev->spinlock, flags);
1094                 return -1;
1095                 break;
1096         }
1097         switch (cmd->stop_src) {
1098         case TRIG_EXT:
1099                 devpriv->cmd2 |= HWTRIG_BIT | PRETRIG_BIT;
1100                 break;
1101         case TRIG_COUNT:
1102         case TRIG_NONE:
1103                 break;
1104         default:
1105                 comedi_error(dev, "bug with stop_src");
1106                 spin_unlock_irqrestore(&dev->spinlock, flags);
1107                 return -1;
1108         }
1109         devpriv->write_byte(devpriv->cmd2, dev->iobase + COMMAND2_REG);
1110         spin_unlock_irqrestore(&dev->spinlock, flags);
1111
1112         return 0;
1113 }
1114
1115 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
1116 {
1117         struct labpc_private *devpriv = dev->private;
1118         unsigned long flags;
1119
1120         spin_lock_irqsave(&dev->spinlock, flags);
1121         devpriv->cmd2 &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
1122         devpriv->write_byte(devpriv->cmd2, dev->iobase + COMMAND2_REG);
1123         spin_unlock_irqrestore(&dev->spinlock, flags);
1124
1125         devpriv->cmd3 = 0;
1126         devpriv->write_byte(devpriv->cmd3, dev->iobase + COMMAND3_REG);
1127
1128         return 0;
1129 }
1130
1131 #ifdef CONFIG_ISA_DMA_API
1132 static void labpc_drain_dma(struct comedi_device *dev)
1133 {
1134         struct labpc_private *devpriv = dev->private;
1135         struct comedi_subdevice *s = dev->read_subdev;
1136         struct comedi_async *async = s->async;
1137         int status;
1138         unsigned long flags;
1139         unsigned int max_points, num_points, residue, leftover;
1140         int i;
1141
1142         status = devpriv->stat1;
1143
1144         flags = claim_dma_lock();
1145         disable_dma(devpriv->dma_chan);
1146         /* clear flip-flop to make sure 2-byte registers for
1147          * count and address get set correctly */
1148         clear_dma_ff(devpriv->dma_chan);
1149
1150         /*  figure out how many points to read */
1151         max_points = devpriv->dma_transfer_size / sample_size;
1152         /* residue is the number of points left to be done on the dma
1153          * transfer.  It should always be zero at this point unless
1154          * the stop_src is set to external triggering.
1155          */
1156         residue = get_dma_residue(devpriv->dma_chan) / sample_size;
1157         num_points = max_points - residue;
1158         if (devpriv->count < num_points && async->cmd.stop_src == TRIG_COUNT)
1159                 num_points = devpriv->count;
1160
1161         /*  figure out how many points will be stored next time */
1162         leftover = 0;
1163         if (async->cmd.stop_src != TRIG_COUNT) {
1164                 leftover = devpriv->dma_transfer_size / sample_size;
1165         } else if (devpriv->count > num_points) {
1166                 leftover = devpriv->count - num_points;
1167                 if (leftover > max_points)
1168                         leftover = max_points;
1169         }
1170
1171         /* write data to comedi buffer */
1172         for (i = 0; i < num_points; i++)
1173                 cfc_write_to_buffer(s, devpriv->dma_buffer[i]);
1174
1175         if (async->cmd.stop_src == TRIG_COUNT)
1176                 devpriv->count -= num_points;
1177
1178         /*  set address and count for next transfer */
1179         set_dma_addr(devpriv->dma_chan, virt_to_bus(devpriv->dma_buffer));
1180         set_dma_count(devpriv->dma_chan, leftover * sample_size);
1181         release_dma_lock(flags);
1182
1183         async->events |= COMEDI_CB_BLOCK;
1184 }
1185
1186 static void handle_isa_dma(struct comedi_device *dev)
1187 {
1188         struct labpc_private *devpriv = dev->private;
1189
1190         labpc_drain_dma(dev);
1191
1192         enable_dma(devpriv->dma_chan);
1193
1194         /*  clear dma tc interrupt */
1195         devpriv->write_byte(0x1, dev->iobase + DMATC_CLEAR_REG);
1196 }
1197 #endif
1198
1199 /* read all available samples from ai fifo */
1200 static int labpc_drain_fifo(struct comedi_device *dev)
1201 {
1202         struct labpc_private *devpriv = dev->private;
1203         unsigned int lsb, msb;
1204         short data;
1205         struct comedi_async *async = dev->read_subdev->async;
1206         const int timeout = 10000;
1207         unsigned int i;
1208
1209         devpriv->stat1 = devpriv->read_byte(dev->iobase + STATUS1_REG);
1210
1211         for (i = 0; (devpriv->stat1 & DATA_AVAIL_BIT) && i < timeout;
1212              i++) {
1213                 /*  quit if we have all the data we want */
1214                 if (async->cmd.stop_src == TRIG_COUNT) {
1215                         if (devpriv->count == 0)
1216                                 break;
1217                         devpriv->count--;
1218                 }
1219                 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1220                 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1221                 data = (msb << 8) | lsb;
1222                 cfc_write_to_buffer(dev->read_subdev, data);
1223                 devpriv->stat1 = devpriv->read_byte(dev->iobase + STATUS1_REG);
1224         }
1225         if (i == timeout) {
1226                 comedi_error(dev, "ai timeout, fifo never empties");
1227                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1228                 return -1;
1229         }
1230
1231         return 0;
1232 }
1233
1234 /* makes sure all data acquired by board is transferred to comedi (used
1235  * when acquisition is terminated by stop_src == TRIG_EXT). */
1236 static void labpc_drain_dregs(struct comedi_device *dev)
1237 {
1238 #ifdef CONFIG_ISA_DMA_API
1239         struct labpc_private *devpriv = dev->private;
1240
1241         if (devpriv->current_transfer == isa_dma_transfer)
1242                 labpc_drain_dma(dev);
1243 #endif
1244
1245         labpc_drain_fifo(dev);
1246 }
1247
1248 /* interrupt service routine */
1249 static irqreturn_t labpc_interrupt(int irq, void *d)
1250 {
1251         struct comedi_device *dev = d;
1252         const struct labpc_boardinfo *board = comedi_board(dev);
1253         struct labpc_private *devpriv = dev->private;
1254         struct comedi_subdevice *s = dev->read_subdev;
1255         struct comedi_async *async;
1256         struct comedi_cmd *cmd;
1257
1258         if (!dev->attached) {
1259                 comedi_error(dev, "premature interrupt");
1260                 return IRQ_HANDLED;
1261         }
1262
1263         async = s->async;
1264         cmd = &async->cmd;
1265         async->events = 0;
1266
1267         /* read board status */
1268         devpriv->stat1 = devpriv->read_byte(dev->iobase + STATUS1_REG);
1269         if (board->register_layout == labpc_1200_layout)
1270                 devpriv->stat2 = devpriv->read_byte(dev->iobase + STATUS2_REG);
1271
1272         if ((devpriv->stat1 & (DMATC_BIT | TIMER_BIT | OVERFLOW_BIT |
1273                                OVERRUN_BIT | DATA_AVAIL_BIT)) == 0
1274             && (devpriv->stat2 & A1_TC_BIT) == 0
1275             && (devpriv->stat2 & FNHF_BIT)) {
1276                 return IRQ_NONE;
1277         }
1278
1279         if (devpriv->stat1 & OVERRUN_BIT) {
1280                 /* clear error interrupt */
1281                 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1282                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1283                 comedi_event(dev, s);
1284                 comedi_error(dev, "overrun");
1285                 return IRQ_HANDLED;
1286         }
1287
1288 #ifdef CONFIG_ISA_DMA_API
1289         if (devpriv->current_transfer == isa_dma_transfer) {
1290                 /*
1291                  * if a dma terminal count of external stop trigger
1292                  * has occurred
1293                  */
1294                 if (devpriv->stat1 & DMATC_BIT ||
1295                     (board->register_layout == labpc_1200_layout
1296                      && devpriv->stat2 & A1_TC_BIT)) {
1297                         handle_isa_dma(dev);
1298                 }
1299         } else
1300 #endif
1301                 labpc_drain_fifo(dev);
1302
1303         if (devpriv->stat1 & TIMER_BIT) {
1304                 comedi_error(dev, "handled timer interrupt?");
1305                 /*  clear it */
1306                 devpriv->write_byte(0x1, dev->iobase + TIMER_CLEAR_REG);
1307         }
1308
1309         if (devpriv->stat1 & OVERFLOW_BIT) {
1310                 /*  clear error interrupt */
1311                 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1312                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1313                 comedi_event(dev, s);
1314                 comedi_error(dev, "overflow");
1315                 return IRQ_HANDLED;
1316         }
1317         /*  handle external stop trigger */
1318         if (cmd->stop_src == TRIG_EXT) {
1319                 if (devpriv->stat2 & A1_TC_BIT) {
1320                         labpc_drain_dregs(dev);
1321                         labpc_cancel(dev, s);
1322                         async->events |= COMEDI_CB_EOA;
1323                 }
1324         }
1325
1326         /* TRIG_COUNT end of acquisition */
1327         if (cmd->stop_src == TRIG_COUNT) {
1328                 if (devpriv->count == 0) {
1329                         labpc_cancel(dev, s);
1330                         async->events |= COMEDI_CB_EOA;
1331                 }
1332         }
1333
1334         comedi_event(dev, s);
1335         return IRQ_HANDLED;
1336 }
1337
1338 static int labpc_ao_insn_write(struct comedi_device *dev,
1339                                struct comedi_subdevice *s,
1340                                struct comedi_insn *insn,
1341                                unsigned int *data)
1342 {
1343         const struct labpc_boardinfo *board = comedi_board(dev);
1344         struct labpc_private *devpriv = dev->private;
1345         int channel, range;
1346         unsigned long flags;
1347         int lsb, msb;
1348
1349         channel = CR_CHAN(insn->chanspec);
1350
1351         /* turn off pacing of analog output channel */
1352         /* note: hardware bug in daqcard-1200 means pacing cannot
1353          * be independently enabled/disabled for its the two channels */
1354         spin_lock_irqsave(&dev->spinlock, flags);
1355         devpriv->cmd2 &= ~DAC_PACED_BIT(channel);
1356         devpriv->write_byte(devpriv->cmd2, dev->iobase + COMMAND2_REG);
1357         spin_unlock_irqrestore(&dev->spinlock, flags);
1358
1359         /* set range */
1360         if (board->register_layout == labpc_1200_layout) {
1361                 range = CR_RANGE(insn->chanspec);
1362                 if (labpc_range_is_unipolar(s, range))
1363                         devpriv->cmd6 |= DAC_UNIP_BIT(channel);
1364                 else
1365                         devpriv->cmd6 &= ~DAC_UNIP_BIT(channel);
1366                 /*  write to register */
1367                 devpriv->write_byte(devpriv->cmd6, dev->iobase + COMMAND6_REG);
1368         }
1369         /* send data */
1370         lsb = data[0] & 0xff;
1371         msb = (data[0] >> 8) & 0xff;
1372         devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(channel));
1373         devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(channel));
1374
1375         /* remember value for readback */
1376         devpriv->ao_value[channel] = data[0];
1377
1378         return 1;
1379 }
1380
1381 static int labpc_ao_insn_read(struct comedi_device *dev,
1382                               struct comedi_subdevice *s,
1383                               struct comedi_insn *insn,
1384                               unsigned int *data)
1385 {
1386         struct labpc_private *devpriv = dev->private;
1387
1388         data[0] = devpriv->ao_value[CR_CHAN(insn->chanspec)];
1389
1390         return 1;
1391 }
1392
1393 static int labpc_8255_mmio(int dir, int port, int data, unsigned long iobase)
1394 {
1395         if (dir) {
1396                 writeb(data, (void __iomem *)(iobase + port));
1397                 return 0;
1398         } else {
1399                 return readb((void __iomem *)(iobase + port));
1400         }
1401 }
1402
1403 /* lowlevel write to eeprom/dac */
1404 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
1405                              unsigned int value_width)
1406 {
1407         struct labpc_private *devpriv = dev->private;
1408         int i;
1409
1410         for (i = 1; i <= value_width; i++) {
1411                 /*  clear serial clock */
1412                 devpriv->cmd5 &= ~SCLOCK_BIT;
1413                 /*  send bits most significant bit first */
1414                 if (value & (1 << (value_width - i)))
1415                         devpriv->cmd5 |= SDATA_BIT;
1416                 else
1417                         devpriv->cmd5 &= ~SDATA_BIT;
1418                 udelay(1);
1419                 devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1420                 /*  set clock to load bit */
1421                 devpriv->cmd5 |= SCLOCK_BIT;
1422                 udelay(1);
1423                 devpriv->write_byte(devpriv->cmd5,
1424                                     dev->iobase + COMMAND5_REG);
1425         }
1426 }
1427
1428 /* lowlevel read from eeprom */
1429 static unsigned int labpc_serial_in(struct comedi_device *dev)
1430 {
1431         struct labpc_private *devpriv = dev->private;
1432         unsigned int value = 0;
1433         int i;
1434         const int value_width = 8;      /*  number of bits wide values are */
1435
1436         for (i = 1; i <= value_width; i++) {
1437                 /*  set serial clock */
1438                 devpriv->cmd5 |= SCLOCK_BIT;
1439                 udelay(1);
1440                 devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1441                 /*  clear clock bit */
1442                 devpriv->cmd5 &= ~SCLOCK_BIT;
1443                 udelay(1);
1444                 devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1445                 /*  read bits most significant bit first */
1446                 udelay(1);
1447                 devpriv->stat2 = devpriv->read_byte(dev->iobase + STATUS2_REG);
1448                 if (devpriv->stat2 & EEPROM_OUT_BIT)
1449                         value |= 1 << (value_width - i);
1450         }
1451
1452         return value;
1453 }
1454
1455 static unsigned int labpc_eeprom_read(struct comedi_device *dev,
1456                                       unsigned int address)
1457 {
1458         struct labpc_private *devpriv = dev->private;
1459         unsigned int value;
1460         /*  bits to tell eeprom to expect a read */
1461         const int read_instruction = 0x3;
1462         /*  8 bit write lengths to eeprom */
1463         const int write_length = 8;
1464
1465         /*  enable read/write to eeprom */
1466         devpriv->cmd5 &= ~EEPROM_EN_BIT;
1467         udelay(1);
1468         devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1469         devpriv->cmd5 |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
1470         udelay(1);
1471         devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1472
1473         /*  send read instruction */
1474         labpc_serial_out(dev, read_instruction, write_length);
1475         /*  send 8 bit address to read from */
1476         labpc_serial_out(dev, address, write_length);
1477         /*  read result */
1478         value = labpc_serial_in(dev);
1479
1480         /*  disable read/write to eeprom */
1481         devpriv->cmd5 &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1482         udelay(1);
1483         devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1484
1485         return value;
1486 }
1487
1488 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev)
1489 {
1490         struct labpc_private *devpriv = dev->private;
1491         unsigned int value;
1492         const int read_status_instruction = 0x5;
1493         const int write_length = 8;     /*  8 bit write lengths to eeprom */
1494
1495         /*  enable read/write to eeprom */
1496         devpriv->cmd5 &= ~EEPROM_EN_BIT;
1497         udelay(1);
1498         devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1499         devpriv->cmd5 |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
1500         udelay(1);
1501         devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1502
1503         /*  send read status instruction */
1504         labpc_serial_out(dev, read_status_instruction, write_length);
1505         /*  read result */
1506         value = labpc_serial_in(dev);
1507
1508         /*  disable read/write to eeprom */
1509         devpriv->cmd5 &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1510         udelay(1);
1511         devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1512
1513         return value;
1514 }
1515
1516 static int labpc_eeprom_write(struct comedi_device *dev,
1517                                 unsigned int address, unsigned int value)
1518 {
1519         struct labpc_private *devpriv = dev->private;
1520         const int write_enable_instruction = 0x6;
1521         const int write_instruction = 0x2;
1522         const int write_length = 8;     /*  8 bit write lengths to eeprom */
1523         const int write_in_progress_bit = 0x1;
1524         const int timeout = 10000;
1525         int i;
1526
1527         /*  make sure there isn't already a write in progress */
1528         for (i = 0; i < timeout; i++) {
1529                 if ((labpc_eeprom_read_status(dev) & write_in_progress_bit) ==
1530                     0)
1531                         break;
1532         }
1533         if (i == timeout) {
1534                 comedi_error(dev, "eeprom write timed out");
1535                 return -ETIME;
1536         }
1537         /*  update software copy of eeprom */
1538         devpriv->eeprom_data[address] = value;
1539
1540         /*  enable read/write to eeprom */
1541         devpriv->cmd5 &= ~EEPROM_EN_BIT;
1542         udelay(1);
1543         devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1544         devpriv->cmd5 |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
1545         udelay(1);
1546         devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1547
1548         /*  send write_enable instruction */
1549         labpc_serial_out(dev, write_enable_instruction, write_length);
1550         devpriv->cmd5 &= ~EEPROM_EN_BIT;
1551         udelay(1);
1552         devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1553
1554         /*  send write instruction */
1555         devpriv->cmd5 |= EEPROM_EN_BIT;
1556         udelay(1);
1557         devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1558         labpc_serial_out(dev, write_instruction, write_length);
1559         /*  send 8 bit address to write to */
1560         labpc_serial_out(dev, address, write_length);
1561         /*  write value */
1562         labpc_serial_out(dev, value, write_length);
1563         devpriv->cmd5 &= ~EEPROM_EN_BIT;
1564         udelay(1);
1565         devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1566
1567         /*  disable read/write to eeprom */
1568         devpriv->cmd5 &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1569         udelay(1);
1570         devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1571
1572         return 0;
1573 }
1574
1575 /* writes to 8 bit calibration dacs */
1576 static void write_caldac(struct comedi_device *dev, unsigned int channel,
1577                          unsigned int value)
1578 {
1579         struct labpc_private *devpriv = dev->private;
1580
1581         if (value == devpriv->caldac[channel])
1582                 return;
1583         devpriv->caldac[channel] = value;
1584
1585         /*  clear caldac load bit and make sure we don't write to eeprom */
1586         devpriv->cmd5 &=
1587             ~CALDAC_LOAD_BIT & ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1588         udelay(1);
1589         devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1590
1591         /*  write 4 bit channel */
1592         labpc_serial_out(dev, channel, 4);
1593         /*  write 8 bit caldac value */
1594         labpc_serial_out(dev, value, 8);
1595
1596         /*  set and clear caldac bit to load caldac value */
1597         devpriv->cmd5 |= CALDAC_LOAD_BIT;
1598         udelay(1);
1599         devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1600         devpriv->cmd5 &= ~CALDAC_LOAD_BIT;
1601         udelay(1);
1602         devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1603 }
1604
1605 static int labpc_calib_insn_write(struct comedi_device *dev,
1606                                   struct comedi_subdevice *s,
1607                                   struct comedi_insn *insn,
1608                                   unsigned int *data)
1609 {
1610         int channel = CR_CHAN(insn->chanspec);
1611
1612         write_caldac(dev, channel, data[0]);
1613         return 1;
1614 }
1615
1616 static int labpc_calib_insn_read(struct comedi_device *dev,
1617                                  struct comedi_subdevice *s,
1618                                  struct comedi_insn *insn,
1619                                  unsigned int *data)
1620 {
1621         struct labpc_private *devpriv = dev->private;
1622
1623         data[0] = devpriv->caldac[CR_CHAN(insn->chanspec)];
1624
1625         return 1;
1626 }
1627
1628 static int labpc_eeprom_insn_write(struct comedi_device *dev,
1629                                    struct comedi_subdevice *s,
1630                                    struct comedi_insn *insn,
1631                                    unsigned int *data)
1632 {
1633         int channel = CR_CHAN(insn->chanspec);
1634         int ret;
1635
1636         /*  only allow writes to user area of eeprom */
1637         if (channel < 16 || channel > 127) {
1638                 dev_dbg(dev->class_dev,
1639                         "eeprom writes are only allowed to channels 16 through 127 (the pointer and user areas)\n");
1640                 return -EINVAL;
1641         }
1642
1643         ret = labpc_eeprom_write(dev, channel, data[0]);
1644         if (ret < 0)
1645                 return ret;
1646
1647         return 1;
1648 }
1649
1650 static int labpc_eeprom_insn_read(struct comedi_device *dev,
1651                                   struct comedi_subdevice *s,
1652                                   struct comedi_insn *insn,
1653                                   unsigned int *data)
1654 {
1655         struct labpc_private *devpriv = dev->private;
1656
1657         data[0] = devpriv->eeprom_data[CR_CHAN(insn->chanspec)];
1658
1659         return 1;
1660 }
1661
1662 int labpc_common_attach(struct comedi_device *dev, unsigned long iobase,
1663                         unsigned int irq, unsigned int dma_chan)
1664 {
1665         const struct labpc_boardinfo *board = comedi_board(dev);
1666         struct labpc_private *devpriv = dev->private;
1667         struct comedi_subdevice *s;
1668         unsigned long isr_flags;
1669         int ret;
1670         int i;
1671
1672         dev->board_name = board->name;
1673
1674         dev_info(dev->class_dev, "ni_labpc: %s\n", dev->board_name);
1675         if (iobase == 0) {
1676                 dev_err(dev->class_dev, "io base address is zero!\n");
1677                 return -EINVAL;
1678         }
1679         /*  request io regions for isa boards */
1680         if (board->bustype == isa_bustype) {
1681                 /* check if io addresses are available */
1682                 if (!request_region(iobase, LABPC_SIZE, dev->board_name)) {
1683                         dev_err(dev->class_dev, "I/O port conflict\n");
1684                         return -EIO;
1685                 }
1686         }
1687         dev->iobase = iobase;
1688
1689         if (board->has_mmio) {
1690                 devpriv->read_byte = labpc_readb;
1691                 devpriv->write_byte = labpc_writeb;
1692         } else {
1693                 devpriv->read_byte = labpc_inb;
1694                 devpriv->write_byte = labpc_outb;
1695         }
1696         /* initialize board's command registers */
1697         devpriv->write_byte(devpriv->cmd1, dev->iobase + COMMAND1_REG);
1698         devpriv->write_byte(devpriv->cmd2, dev->iobase + COMMAND2_REG);
1699         devpriv->write_byte(devpriv->cmd3, dev->iobase + COMMAND3_REG);
1700         devpriv->write_byte(devpriv->cmd4, dev->iobase + COMMAND4_REG);
1701         if (board->register_layout == labpc_1200_layout) {
1702                 devpriv->write_byte(devpriv->cmd5, dev->iobase + COMMAND5_REG);
1703                 devpriv->write_byte(devpriv->cmd6, dev->iobase + COMMAND6_REG);
1704         }
1705
1706         /* grab our IRQ */
1707         if (irq) {
1708                 isr_flags = 0;
1709                 if (board->bustype == pci_bustype ||
1710                     board->bustype == pcmcia_bustype)
1711                         isr_flags |= IRQF_SHARED;
1712                 if (request_irq(irq, labpc_interrupt, isr_flags,
1713                                 dev->board_name, dev)) {
1714                         dev_err(dev->class_dev, "unable to allocate irq %u\n",
1715                                 irq);
1716                         return -EINVAL;
1717                 }
1718         }
1719         dev->irq = irq;
1720
1721 #ifdef CONFIG_ISA_DMA_API
1722         /* grab dma channel */
1723         if (dma_chan > 3) {
1724                 dev_err(dev->class_dev, "invalid dma channel %u\n", dma_chan);
1725                 return -EINVAL;
1726         } else if (dma_chan) {
1727                 unsigned long dma_flags;
1728
1729                 /* allocate dma buffer */
1730                 devpriv->dma_buffer = kmalloc(dma_buffer_size,
1731                                               GFP_KERNEL | GFP_DMA);
1732                 if (devpriv->dma_buffer == NULL)
1733                         return -ENOMEM;
1734
1735                 if (request_dma(dma_chan, dev->board_name)) {
1736                         dev_err(dev->class_dev,
1737                                 "failed to allocate dma channel %u\n",
1738                                 dma_chan);
1739                         return -EINVAL;
1740                 }
1741                 devpriv->dma_chan = dma_chan;
1742                 dma_flags = claim_dma_lock();
1743                 disable_dma(devpriv->dma_chan);
1744                 set_dma_mode(devpriv->dma_chan, DMA_MODE_READ);
1745                 release_dma_lock(dma_flags);
1746         }
1747 #endif
1748
1749         ret = comedi_alloc_subdevices(dev, 5);
1750         if (ret)
1751                 return ret;
1752
1753         /* analog input subdevice */
1754         s = &dev->subdevices[0];
1755         s->type         = COMEDI_SUBD_AI;
1756         s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_COMMON | SDF_DIFF;
1757         s->n_chan       = 8;
1758         s->len_chanlist = 8;
1759         s->maxdata      = 0x0fff;
1760         s->range_table  = board->ai_range_table;
1761         s->insn_read    = labpc_ai_insn_read;
1762         if (dev->irq) {
1763                 dev->read_subdev = s;
1764                 s->subdev_flags |= SDF_CMD_READ;
1765                 s->do_cmd       = labpc_ai_cmd;
1766                 s->do_cmdtest   = labpc_ai_cmdtest;
1767                 s->cancel       = labpc_cancel;
1768         }
1769
1770         /* analog output */
1771         s = &dev->subdevices[1];
1772         if (board->has_ao) {
1773                 s->type         = COMEDI_SUBD_AO;
1774                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_GROUND;
1775                 s->n_chan       = NUM_AO_CHAN;
1776                 s->maxdata      = 0x0fff;
1777                 s->range_table  = &range_labpc_ao;
1778                 s->insn_read    = labpc_ao_insn_read;
1779                 s->insn_write   = labpc_ao_insn_write;
1780
1781                 /* initialize analog outputs to a known value */
1782                 for (i = 0; i < s->n_chan; i++) {
1783                         short lsb, msb;
1784
1785                         devpriv->ao_value[i] = s->maxdata / 2;
1786                         lsb = devpriv->ao_value[i] & 0xff;
1787                         msb = (devpriv->ao_value[i] >> 8) & 0xff;
1788                         devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(i));
1789                         devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(i));
1790                 }
1791         } else {
1792                 s->type         = COMEDI_SUBD_UNUSED;
1793         }
1794
1795         /* 8255 dio */
1796         s = &dev->subdevices[2];
1797         ret = subdev_8255_init(dev, s,
1798                                (board->has_mmio) ? labpc_8255_mmio : NULL,
1799                                dev->iobase + DIO_BASE_REG);
1800         if (ret)
1801                 return ret;
1802
1803         /*  calibration subdevices for boards that have one */
1804         s = &dev->subdevices[3];
1805         if (board->register_layout == labpc_1200_layout) {
1806                 s->type         = COMEDI_SUBD_CALIB;
1807                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
1808                 s->n_chan       = 16;
1809                 s->maxdata      = 0xff;
1810                 s->insn_read    = labpc_calib_insn_read;
1811                 s->insn_write   = labpc_calib_insn_write;
1812
1813                 for (i = 0; i < s->n_chan; i++)
1814                         write_caldac(dev, i, s->maxdata / 2);
1815         } else
1816                 s->type         = COMEDI_SUBD_UNUSED;
1817
1818         /* EEPROM */
1819         s = &dev->subdevices[4];
1820         if (board->register_layout == labpc_1200_layout) {
1821                 s->type         = COMEDI_SUBD_MEMORY;
1822                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
1823                 s->n_chan       = EEPROM_SIZE;
1824                 s->maxdata      = 0xff;
1825                 s->insn_read    = labpc_eeprom_insn_read;
1826                 s->insn_write   = labpc_eeprom_insn_write;
1827
1828                 for (i = 0; i < s->n_chan; i++)
1829                         devpriv->eeprom_data[i] = labpc_eeprom_read(dev, i);
1830         } else
1831                 s->type         = COMEDI_SUBD_UNUSED;
1832
1833         return 0;
1834 }
1835 EXPORT_SYMBOL_GPL(labpc_common_attach);
1836
1837 static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1838 {
1839         const struct labpc_boardinfo *board = comedi_board(dev);
1840         struct labpc_private *devpriv;
1841         unsigned long iobase = 0;
1842         unsigned int irq = 0;
1843         unsigned int dma_chan = 0;
1844
1845         devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
1846         if (!devpriv)
1847                 return -ENOMEM;
1848         dev->private = devpriv;
1849
1850         /* get base address, irq etc. based on bustype */
1851         switch (board->bustype) {
1852         case isa_bustype:
1853 #ifdef CONFIG_ISA_DMA_API
1854                 iobase = it->options[0];
1855                 irq = it->options[1];
1856                 dma_chan = it->options[2];
1857 #else
1858                 dev_err(dev->class_dev,
1859                         "ni_labpc driver has not been built with ISA DMA support.\n");
1860                 return -EINVAL;
1861 #endif
1862                 break;
1863         case pci_bustype:
1864 #ifdef CONFIG_COMEDI_PCI_DRIVERS
1865                 dev_err(dev->class_dev,
1866                         "manual configuration of PCI board '%s' is not supported\n",
1867                         board->name);
1868                 return -EINVAL;
1869 #else
1870                 dev_err(dev->class_dev,
1871                         "ni_labpc driver has not been built with PCI support.\n");
1872                 return -EINVAL;
1873 #endif
1874                 break;
1875         default:
1876                 dev_err(dev->class_dev,
1877                         "ni_labpc: bug! couldn't determine board type\n");
1878                 return -EINVAL;
1879                 break;
1880         }
1881
1882         return labpc_common_attach(dev, iobase, irq, dma_chan);
1883 }
1884
1885 static const struct labpc_boardinfo *
1886 labpc_pci_find_boardinfo(struct pci_dev *pcidev)
1887 {
1888         unsigned int device_id = pcidev->device;
1889         unsigned int n;
1890
1891         for (n = 0; n < ARRAY_SIZE(labpc_boards); n++) {
1892                 const struct labpc_boardinfo *board = &labpc_boards[n];
1893                 if (board->bustype == pci_bustype &&
1894                     board->device_id == device_id)
1895                         return board;
1896         }
1897         return NULL;
1898 }
1899
1900 static int labpc_auto_attach(struct comedi_device *dev,
1901                                        unsigned long context_unused)
1902 {
1903         struct pci_dev *pcidev = comedi_to_pci_dev(dev);
1904         struct labpc_private *devpriv;
1905         unsigned long iobase;
1906         unsigned int irq;
1907         int ret;
1908
1909         if (!IS_ENABLED(CONFIG_COMEDI_PCI_DRIVERS))
1910                 return -ENODEV;
1911
1912         ret = comedi_pci_enable(dev);
1913         if (ret)
1914                 return ret;
1915
1916         devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
1917         if (!devpriv)
1918                 return -ENOMEM;
1919         dev->private = devpriv;
1920
1921         dev->board_ptr = labpc_pci_find_boardinfo(pcidev);
1922         if (!dev->board_ptr)
1923                 return -ENODEV;
1924         devpriv->mite = mite_alloc(pcidev);
1925         if (!devpriv->mite)
1926                 return -ENOMEM;
1927         ret = mite_setup(devpriv->mite);
1928         if (ret < 0)
1929                 return ret;
1930         iobase = (unsigned long)devpriv->mite->daq_io_addr;
1931         irq = mite_irq(devpriv->mite);
1932         return labpc_common_attach(dev, iobase, irq, 0);
1933 }
1934
1935 void labpc_common_detach(struct comedi_device *dev)
1936 {
1937         const struct labpc_boardinfo *board = comedi_board(dev);
1938         struct labpc_private *devpriv = dev->private;
1939         struct comedi_subdevice *s;
1940
1941         if (!board)
1942                 return;
1943         if (dev->subdevices) {
1944                 s = &dev->subdevices[2];
1945                 subdev_8255_cleanup(dev, s);
1946         }
1947 #ifdef CONFIG_ISA_DMA_API
1948         /* only free stuff if it has been allocated by _attach */
1949         kfree(devpriv->dma_buffer);
1950         if (devpriv->dma_chan)
1951                 free_dma(devpriv->dma_chan);
1952 #endif
1953         if (dev->irq)
1954                 free_irq(dev->irq, dev);
1955         if (board->bustype == isa_bustype && dev->iobase)
1956                 release_region(dev->iobase, LABPC_SIZE);
1957 #ifdef CONFIG_COMEDI_PCI_DRIVERS
1958         if (devpriv->mite) {
1959                 mite_unsetup(devpriv->mite);
1960                 mite_free(devpriv->mite);
1961         }
1962         if (board->bustype == pci_bustype)
1963                 comedi_pci_disable(dev);
1964 #endif
1965 }
1966 EXPORT_SYMBOL_GPL(labpc_common_detach);
1967
1968 static struct comedi_driver labpc_driver = {
1969         .driver_name    = "ni_labpc",
1970         .module         = THIS_MODULE,
1971         .attach         = labpc_attach,
1972         .auto_attach    = labpc_auto_attach,
1973         .detach         = labpc_common_detach,
1974         .num_names      = ARRAY_SIZE(labpc_boards),
1975         .board_name     = &labpc_boards[0].name,
1976         .offset         = sizeof(struct labpc_boardinfo),
1977 };
1978
1979 #ifdef CONFIG_COMEDI_PCI_DRIVERS
1980 static DEFINE_PCI_DEVICE_TABLE(labpc_pci_table) = {
1981         { PCI_DEVICE(PCI_VENDOR_ID_NI, 0x161) },
1982         { 0 }
1983 };
1984 MODULE_DEVICE_TABLE(pci, labpc_pci_table);
1985
1986 static int labpc_pci_probe(struct pci_dev *dev,
1987                            const struct pci_device_id *id)
1988 {
1989         return comedi_pci_auto_config(dev, &labpc_driver, id->driver_data);
1990 }
1991
1992 static struct pci_driver labpc_pci_driver = {
1993         .name           = "ni_labpc",
1994         .id_table       = labpc_pci_table,
1995         .probe          = labpc_pci_probe,
1996         .remove         = comedi_pci_auto_unconfig,
1997 };
1998 module_comedi_pci_driver(labpc_driver, labpc_pci_driver);
1999 #else
2000 module_comedi_driver(labpc_driver);
2001 #endif
2002
2003
2004 MODULE_AUTHOR("Comedi http://www.comedi.org");
2005 MODULE_DESCRIPTION("Comedi low-level driver");
2006 MODULE_LICENSE("GPL");