drivers/staging/comedi/drivers/ni_labpc.c

   1 /*
   2     comedi/drivers/ni_labpc.c
   3     Driver for National Instruments Lab-PC series boards and compatibles
   4     Copyright (C) 2001, 2002, 2003 Frank Mori Hess <fmhess@users.sourceforge.net>
   5
   6     This program is free software; you can redistribute it and/or modify
   7     it under the terms of the GNU General Public License as published by
   8     the Free Software Foundation; either version 2 of the License, or
   9     (at your option) any later version.
  10
  11     This program is distributed in the hope that it will be useful,
  12     but WITHOUT ANY WARRANTY; without even the implied warranty of
  13     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14     GNU General Public License for more details.
  15
  16     You should have received a copy of the GNU General Public License
  17     along with this program; if not, write to the Free Software
  18     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19
  20 ************************************************************************
  21 */
  22 /*
  23 Driver: ni_labpc
  24 Description: National Instruments Lab-PC (& compatibles)
  25 Author: Frank Mori Hess <fmhess@users.sourceforge.net>
  26 Devices: [National Instruments] Lab-PC-1200 (labpc-1200),
  27   Lab-PC-1200AI (labpc-1200ai), Lab-PC+ (lab-pc+), PCI-1200 (ni_labpc)
  28 Status: works
  29
  30 Tested with lab-pc-1200.  For the older Lab-PC+, not all input ranges
  31 and analog references will work, the available ranges/arefs will
  32 depend on how you have configured the jumpers on your board
  33 (see your owner's manual).
  34
  35 Kernel-level ISA plug-and-play support for the lab-pc-1200
  36 boards has not
  37 yet been added to the driver, mainly due to the fact that
  38 I don't know the device id numbers.  If you have one
  39 of these boards,
  40 please file a bug report at http://comedi.org/
  41 so I can get the necessary information from you.
  42
  43 The 1200 series boards have onboard calibration dacs for correcting
  44 analog input/output offsets and gains.  The proper settings for these
  45 caldacs are stored on the board's eeprom.  To read the caldac values
  46 from the eeprom and store them into a file that can be then be used by
  47 comedilib, use the comedi_calibrate program.
  48
  49 Configuration options - ISA boards:
  50   [0] - I/O port base address
  51   [1] - IRQ (optional, required for timed or externally triggered conversions)
  52   [2] - DMA channel (optional)
  53
  54 Configuration options - PCI boards:
  55   [0] - bus (optional)
  56   [1] - slot (optional)
  57
  58 The Lab-pc+ has quirky chanlist requirements
  59 when scanning multiple channels.  Multiple channel scan
  60 sequence must start at highest channel, then decrement down to
  61 channel 0.  The rest of the cards can scan down like lab-pc+ or scan
  62 up from channel zero.  Chanlists consisting of all one channel
  63 are also legal, and allow you to pace conversions in bursts.
  64
  65 */
  66
  67 /*
  68
  69 NI manuals:
  70 341309a (labpc-1200 register manual)
  71 340914a (pci-1200)
  72 320502b (lab-pc+)
  73
  74 */
  75
  76 #include <linux/pci.h>
  77 #include <linux/interrupt.h>
  78 #include <linux/slab.h>
  79 #include <linux/io.h>
  80 #include <linux/delay.h>
  81
  82 #include "../comedidev.h"
  83
  84 #include <asm/dma.h>
  85
  86 #include "8253.h"
  87 #include "8255.h"
  88 #include "mite.h"
  89 #include "comedi_fc.h"
  90 #include "ni_labpc.h"
  91
  92 #define DRV_NAME "ni_labpc"
  93
  94 /* size of io region used by board */
  95 #define LABPC_SIZE           32
  96 /* 2 MHz master clock */
  97 #define LABPC_TIMER_BASE            500
  98
  99 /* Registers for the lab-pc+ */
 100
 101 /* write-only registers */
 102 #define COMMAND1_REG    0x0
 103 #define   ADC_GAIN_MASK (0x7 << 4)
 104 #define   ADC_CHAN_BITS(x)      ((x) & 0x7)
 105 /* enables multi channel scans */
 106 #define   ADC_SCAN_EN_BIT       0x80
 107 #define COMMAND2_REG    0x1
 108 /* enable pretriggering (used in conjunction with SWTRIG) */
 109 #define   PRETRIG_BIT   0x1
 110 /* enable paced conversions on external trigger */
 111 #define   HWTRIG_BIT    0x2
 112 /* enable paced conversions */
 113 #define   SWTRIG_BIT    0x4
 114 /* use two cascaded counters for pacing */
 115 #define   CASCADE_BIT   0x8
 116 #define   DAC_PACED_BIT(channel)        (0x40 << ((channel) & 0x1))
 117 #define COMMAND3_REG    0x2
 118 /* enable dma transfers */
 119 #define   DMA_EN_BIT    0x1
 120 /* enable interrupts for 8255 */
 121 #define   DIO_INTR_EN_BIT       0x2
 122 /* enable dma terminal count interrupt */
 123 #define   DMATC_INTR_EN_BIT     0x4
 124 /* enable timer interrupt */
 125 #define   TIMER_INTR_EN_BIT     0x8
 126 /* enable error interrupt */
 127 #define   ERR_INTR_EN_BIT       0x10
 128 /* enable fifo not empty interrupt */
 129 #define   ADC_FNE_INTR_EN_BIT   0x20
 130 #define ADC_CONVERT_REG 0x3
 131 #define DAC_LSB_REG(channel)    (0x4 + 2 * ((channel) & 0x1))
 132 #define DAC_MSB_REG(channel)    (0x5 + 2 * ((channel) & 0x1))
 133 #define ADC_CLEAR_REG   0x8
 134 #define DMATC_CLEAR_REG 0xa
 135 #define TIMER_CLEAR_REG 0xc
 136 /* 1200 boards only */
 137 #define COMMAND6_REG    0xe
 138 /* select ground or common-mode reference */
 139 #define   ADC_COMMON_BIT        0x1
 140 /*  adc unipolar */
 141 #define   ADC_UNIP_BIT  0x2
 142 /*  dac unipolar */
 143 #define   DAC_UNIP_BIT(channel) (0x4 << ((channel) & 0x1))
 144 /* enable fifo half full interrupt */
 145 #define   ADC_FHF_INTR_EN_BIT   0x20
 146 /* enable interrupt on end of hardware count */
 147 #define   A1_INTR_EN_BIT        0x40
 148 /* scan up from channel zero instead of down to zero */
 149 #define   ADC_SCAN_UP_BIT 0x80
 150 #define COMMAND4_REG    0xf
 151 /* enables 'interval' scanning */
 152 #define   INTERVAL_SCAN_EN_BIT  0x1
 153 /* enables external signal on counter b1 output to trigger scan */
 154 #define   EXT_SCAN_EN_BIT       0x2
 155 /* chooses direction (output or input) for EXTCONV* line */
 156 #define   EXT_CONVERT_OUT_BIT   0x4
 157 /* chooses differential inputs for adc (in conjunction with board jumper) */
 158 #define   ADC_DIFF_BIT  0x8
 159 #define   EXT_CONVERT_DISABLE_BIT       0x10
 160 /* 1200 boards only, calibration stuff */
 161 #define COMMAND5_REG    0x1c
 162 /* enable eeprom for write */
 163 #define   EEPROM_WRITE_UNPROTECT_BIT    0x4
 164 /* enable dithering */
 165 #define   DITHER_EN_BIT 0x8
 166 /* load calibration dac */
 167 #define   CALDAC_LOAD_BIT       0x10
 168 /* serial clock - rising edge writes, falling edge reads */
 169 #define   SCLOCK_BIT    0x20
 170 /* serial data bit for writing to eeprom or calibration dacs */
 171 #define   SDATA_BIT     0x40
 172 /* enable eeprom for read/write */
 173 #define   EEPROM_EN_BIT 0x80
 174 #define INTERVAL_COUNT_REG      0x1e
 175 #define INTERVAL_LOAD_REG       0x1f
 176 #define   INTERVAL_LOAD_BITS    0x1
 177
 178 /* read-only registers */
 179 #define STATUS1_REG     0x0
 180 /* data is available in fifo */
 181 #define   DATA_AVAIL_BIT        0x1
 182 /* overrun has occurred */
 183 #define   OVERRUN_BIT   0x2
 184 /* fifo overflow */
 185 #define   OVERFLOW_BIT  0x4
 186 /* timer interrupt has occurred */
 187 #define   TIMER_BIT     0x8
 188 /* dma terminal count has occurred */
 189 #define   DMATC_BIT     0x10
 190 /* external trigger has occurred */
 191 #define   EXT_TRIG_BIT  0x40
 192 /* 1200 boards only */
 193 #define STATUS2_REG     0x1d
 194 /* programmable eeprom serial output */
 195 #define   EEPROM_OUT_BIT        0x1
 196 /* counter A1 terminal count */
 197 #define   A1_TC_BIT     0x2
 198 /* fifo not half full */
 199 #define   FNHF_BIT      0x4
 200 #define ADC_FIFO_REG    0xa
 201
 202 #define DIO_BASE_REG    0x10
 203 #define COUNTER_A_BASE_REG      0x14
 204 #define COUNTER_A_CONTROL_REG   (COUNTER_A_BASE_REG + 0x3)
 205 /* check modes put conversion pacer output in harmless state (a0 mode 2) */
 206 #define   INIT_A0_BITS  0x14
 207 /* put hardware conversion counter output in harmless state (a1 mode 0) */
 208 #define   INIT_A1_BITS  0x70
 209 #define COUNTER_B_BASE_REG      0x18
 210
 211 enum scan_mode {
 212         MODE_SINGLE_CHAN,
 213         MODE_SINGLE_CHAN_INTERVAL,
 214         MODE_MULT_CHAN_UP,
 215         MODE_MULT_CHAN_DOWN,
 216 };
 217
 218 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd,
 219                              enum scan_mode scan_mode);
 220 #ifdef CONFIG_ISA_DMA_API
 221 static unsigned int labpc_suggest_transfer_size(const struct comedi_cmd *cmd);
 222 #endif
 223
 224 /* analog input ranges */
 225 #define NUM_LABPC_PLUS_AI_RANGES 16
 226 /* indicates unipolar ranges */
 227 static const int labpc_plus_is_unipolar[NUM_LABPC_PLUS_AI_RANGES] = {
 228         0,
 229         0,
 230         0,
 231         0,
 232         0,
 233         0,
 234         0,
 235         0,
 236         1,
 237         1,
 238         1,
 239         1,
 240         1,
 241         1,
 242         1,
 243         1,
 244 };
 245
 246 /* map range index to gain bits */
 247 static const int labpc_plus_ai_gain_bits[NUM_LABPC_PLUS_AI_RANGES] = {
 248         0x00,
 249         0x10,
 250         0x20,
 251         0x30,
 252         0x40,
 253         0x50,
 254         0x60,
 255         0x70,
 256         0x00,
 257         0x10,
 258         0x20,
 259         0x30,
 260         0x40,
 261         0x50,
 262         0x60,
 263         0x70,
 264 };
 265
 266 static const struct comedi_lrange range_labpc_plus_ai = {
 267         NUM_LABPC_PLUS_AI_RANGES,
 268         {
 269          BIP_RANGE(5),
 270          BIP_RANGE(4),
 271          BIP_RANGE(2.5),
 272          BIP_RANGE(1),
 273          BIP_RANGE(0.5),
 274          BIP_RANGE(0.25),
 275          BIP_RANGE(0.1),
 276          BIP_RANGE(0.05),
 277          UNI_RANGE(10),
 278          UNI_RANGE(8),
 279          UNI_RANGE(5),
 280          UNI_RANGE(2),
 281          UNI_RANGE(1),
 282          UNI_RANGE(0.5),
 283          UNI_RANGE(0.2),
 284          UNI_RANGE(0.1),
 285          }
 286 };
 287
 288 #define NUM_LABPC_1200_AI_RANGES 14
 289 /* indicates unipolar ranges */
 290 const int labpc_1200_is_unipolar[NUM_LABPC_1200_AI_RANGES] = {
 291         0,
 292         0,
 293         0,
 294         0,
 295         0,
 296         0,
 297         0,
 298         1,
 299         1,
 300         1,
 301         1,
 302         1,
 303         1,
 304         1,
 305 };
 306 EXPORT_SYMBOL_GPL(labpc_1200_is_unipolar);
 307
 308 /* map range index to gain bits */
 309 const int labpc_1200_ai_gain_bits[NUM_LABPC_1200_AI_RANGES] = {
 310         0x00,
 311         0x20,
 312         0x30,
 313         0x40,
 314         0x50,
 315         0x60,
 316         0x70,
 317         0x00,
 318         0x20,
 319         0x30,
 320         0x40,
 321         0x50,
 322         0x60,
 323         0x70,
 324 };
 325 EXPORT_SYMBOL_GPL(labpc_1200_ai_gain_bits);
 326
 327 const struct comedi_lrange range_labpc_1200_ai = {
 328         NUM_LABPC_1200_AI_RANGES,
 329         {
 330          BIP_RANGE(5),
 331          BIP_RANGE(2.5),
 332          BIP_RANGE(1),
 333          BIP_RANGE(0.5),
 334          BIP_RANGE(0.25),
 335          BIP_RANGE(0.1),
 336          BIP_RANGE(0.05),
 337          UNI_RANGE(10),
 338          UNI_RANGE(5),
 339          UNI_RANGE(2),
 340          UNI_RANGE(1),
 341          UNI_RANGE(0.5),
 342          UNI_RANGE(0.2),
 343          UNI_RANGE(0.1),
 344          }
 345 };
 346 EXPORT_SYMBOL_GPL(range_labpc_1200_ai);
 347
 348 /* analog output ranges */
 349 #define AO_RANGE_IS_UNIPOLAR 0x1
 350 static const struct comedi_lrange range_labpc_ao = {
 351         2,
 352         {
 353          BIP_RANGE(5),
 354          UNI_RANGE(10),
 355          }
 356 };
 357
 358 /* functions that do inb/outb and readb/writeb so we can use
 359  * function pointers to decide which to use */
 360 static inline unsigned int labpc_inb(unsigned long address)
 361 {
 362         return inb(address);
 363 }
 364
 365 static inline void labpc_outb(unsigned int byte, unsigned long address)
 366 {
 367         outb(byte, address);
 368 }
 369
 370 static inline unsigned int labpc_readb(unsigned long address)
 371 {
 372         return readb((void __iomem *)address);
 373 }
 374
 375 static inline void labpc_writeb(unsigned int byte, unsigned long address)
 376 {
 377         writeb(byte, (void __iomem *)address);
 378 }
 379
 380 static const struct labpc_boardinfo labpc_boards[] = {
 381         {
 382          .name = "lab-pc-1200",
 383          .ai_speed = 10000,
 384          .bustype = isa_bustype,
 385          .register_layout = labpc_1200_layout,
 386          .has_ao = 1,
 387          .ai_range_table = &range_labpc_1200_ai,
 388          .ai_range_code = labpc_1200_ai_gain_bits,
 389          .ai_range_is_unipolar = labpc_1200_is_unipolar,
 390          .ai_scan_up = 1,
 391          .memory_mapped_io = 0,
 392          },
 393         {
 394          .name = "lab-pc-1200ai",
 395          .ai_speed = 10000,
 396          .bustype = isa_bustype,
 397          .register_layout = labpc_1200_layout,
 398          .has_ao = 0,
 399          .ai_range_table = &range_labpc_1200_ai,
 400          .ai_range_code = labpc_1200_ai_gain_bits,
 401          .ai_range_is_unipolar = labpc_1200_is_unipolar,
 402          .ai_scan_up = 1,
 403          .memory_mapped_io = 0,
 404          },
 405         {
 406          .name = "lab-pc+",
 407          .ai_speed = 12000,
 408          .bustype = isa_bustype,
 409          .register_layout = labpc_plus_layout,
 410          .has_ao = 1,
 411          .ai_range_table = &range_labpc_plus_ai,
 412          .ai_range_code = labpc_plus_ai_gain_bits,
 413          .ai_range_is_unipolar = labpc_plus_is_unipolar,
 414          .ai_scan_up = 0,
 415          .memory_mapped_io = 0,
 416          },
 417 #ifdef CONFIG_COMEDI_PCI_DRIVERS
 418         {
 419          .name = "pci-1200",
 420          .device_id = 0x161,
 421          .ai_speed = 10000,
 422          .bustype = pci_bustype,
 423          .register_layout = labpc_1200_layout,
 424          .has_ao = 1,
 425          .ai_range_table = &range_labpc_1200_ai,
 426          .ai_range_code = labpc_1200_ai_gain_bits,
 427          .ai_range_is_unipolar = labpc_1200_is_unipolar,
 428          .ai_scan_up = 1,
 429          .memory_mapped_io = 1,
 430          },
 431 /* dummy entry so pci board works when comedi_config is passed driver name */
 432         {
 433          .name = DRV_NAME,
 434          .bustype = pci_bustype,
 435          },
 436 #endif
 437 };
 438
 439 /* size in bytes of dma buffer */
 440 static const int dma_buffer_size = 0xff00;
 441 /* 2 bytes per sample */
 442 static const int sample_size = 2;
 443
 444 static inline int labpc_counter_load(struct comedi_device *dev,
 445                                      unsigned long base_address,
 446                                      unsigned int counter_number,
 447                                      unsigned int count, unsigned int mode)
 448 {
 449         const struct labpc_boardinfo *thisboard = comedi_board(dev);
 450
 451         if (thisboard->memory_mapped_io)
 452                 return i8254_mm_load((void __iomem *)base_address, 0,
 453                                      counter_number, count, mode);
 454         else
 455                 return i8254_load(base_address, 0, counter_number, count, mode);
 456 }
 457
 458 static void labpc_clear_adc_fifo(const struct comedi_device *dev)
 459 {
 460         struct labpc_private *devpriv = dev->private;
 461
 462         devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
 463         devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 464         devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
 465 }
 466
 467 static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
 468 {
 469         struct labpc_private *devpriv = dev->private;
 470         unsigned long flags;
 471
 472         spin_lock_irqsave(&dev->spinlock, flags);
 473         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
 474         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
 475         spin_unlock_irqrestore(&dev->spinlock, flags);
 476
 477         devpriv->command3_bits = 0;
 478         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
 479
 480         return 0;
 481 }
 482
 483 static enum scan_mode labpc_ai_scan_mode(const struct comedi_cmd *cmd)
 484 {
 485         if (cmd->chanlist_len == 1)
 486                 return MODE_SINGLE_CHAN;
 487
 488         /* chanlist may be NULL during cmdtest. */
 489         if (cmd->chanlist == NULL)
 490                 return MODE_MULT_CHAN_UP;
 491
 492         if (CR_CHAN(cmd->chanlist[0]) == CR_CHAN(cmd->chanlist[1]))
 493                 return MODE_SINGLE_CHAN_INTERVAL;
 494
 495         if (CR_CHAN(cmd->chanlist[0]) < CR_CHAN(cmd->chanlist[1]))
 496                 return MODE_MULT_CHAN_UP;
 497
 498         if (CR_CHAN(cmd->chanlist[0]) > CR_CHAN(cmd->chanlist[1]))
 499                 return MODE_MULT_CHAN_DOWN;
 500
 501         pr_err("ni_labpc: bug! cannot determine AI scan mode\n");
 502         return 0;
 503 }
 504
 505 static int labpc_ai_chanlist_invalid(const struct comedi_device *dev,
 506                                      const struct comedi_cmd *cmd,
 507                                      enum scan_mode mode)
 508 {
 509         int channel, range, aref, i;
 510
 511         if (cmd->chanlist == NULL)
 512                 return 0;
 513
 514         if (mode == MODE_SINGLE_CHAN)
 515                 return 0;
 516
 517         if (mode == MODE_SINGLE_CHAN_INTERVAL) {
 518                 if (cmd->chanlist_len > 0xff) {
 519                         comedi_error(dev,
 520                                      "ni_labpc: chanlist too long for single channel interval mode\n");
 521                         return 1;
 522                 }
 523         }
 524
 525         channel = CR_CHAN(cmd->chanlist[0]);
 526         range = CR_RANGE(cmd->chanlist[0]);
 527         aref = CR_AREF(cmd->chanlist[0]);
 528
 529         for (i = 0; i < cmd->chanlist_len; i++) {
 530
 531                 switch (mode) {
 532                 case MODE_SINGLE_CHAN_INTERVAL:
 533                         if (CR_CHAN(cmd->chanlist[i]) != channel) {
 534                                 comedi_error(dev,
 535                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 536                                 return 1;
 537                         }
 538                         break;
 539                 case MODE_MULT_CHAN_UP:
 540                         if (CR_CHAN(cmd->chanlist[i]) != i) {
 541                                 comedi_error(dev,
 542                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 543                                 return 1;
 544                         }
 545                         break;
 546                 case MODE_MULT_CHAN_DOWN:
 547                         if (CR_CHAN(cmd->chanlist[i]) !=
 548                             cmd->chanlist_len - i - 1) {
 549                                 comedi_error(dev,
 550                                              "channel scanning order specified in chanlist is not supported by hardware.\n");
 551                                 return 1;
 552                         }
 553                         break;
 554                 default:
 555                         dev_err(dev->class_dev,
 556                                 "ni_labpc: bug! in chanlist check\n");
 557                         return 1;
 558                         break;
 559                 }
 560
 561                 if (CR_RANGE(cmd->chanlist[i]) != range) {
 562                         comedi_error(dev,
 563                                      "entries in chanlist must all have the same range\n");
 564                         return 1;
 565                 }
 566
 567                 if (CR_AREF(cmd->chanlist[i]) != aref) {
 568                         comedi_error(dev,
 569                                      "entries in chanlist must all have the same reference\n");
 570                         return 1;
 571                 }
 572         }
 573
 574         return 0;
 575 }
 576
 577 static int labpc_use_continuous_mode(const struct comedi_cmd *cmd,
 578                                      enum scan_mode mode)
 579 {
 580         if (mode == MODE_SINGLE_CHAN)
 581                 return 1;
 582
 583         if (cmd->scan_begin_src == TRIG_FOLLOW)
 584                 return 1;
 585
 586         return 0;
 587 }
 588
 589 static unsigned int labpc_ai_convert_period(const struct comedi_cmd *cmd,
 590                                             enum scan_mode mode)
 591 {
 592         if (cmd->convert_src != TRIG_TIMER)
 593                 return 0;
 594
 595         if (mode == MODE_SINGLE_CHAN && cmd->scan_begin_src == TRIG_TIMER)
 596                 return cmd->scan_begin_arg;
 597
 598         return cmd->convert_arg;
 599 }
 600
 601 static void labpc_set_ai_convert_period(struct comedi_cmd *cmd,
 602                                         enum scan_mode mode, unsigned int ns)
 603 {
 604         if (cmd->convert_src != TRIG_TIMER)
 605                 return;
 606
 607         if (mode == MODE_SINGLE_CHAN &&
 608             cmd->scan_begin_src == TRIG_TIMER) {
 609                 cmd->scan_begin_arg = ns;
 610                 if (cmd->convert_arg > cmd->scan_begin_arg)
 611                         cmd->convert_arg = cmd->scan_begin_arg;
 612         } else
 613                 cmd->convert_arg = ns;
 614 }
 615
 616 static unsigned int labpc_ai_scan_period(const struct comedi_cmd *cmd,
 617                                         enum scan_mode mode)
 618 {
 619         if (cmd->scan_begin_src != TRIG_TIMER)
 620                 return 0;
 621
 622         if (mode == MODE_SINGLE_CHAN && cmd->convert_src == TRIG_TIMER)
 623                 return 0;
 624
 625         return cmd->scan_begin_arg;
 626 }
 627
 628 static void labpc_set_ai_scan_period(struct comedi_cmd *cmd,
 629                                      enum scan_mode mode, unsigned int ns)
 630 {
 631         if (cmd->scan_begin_src != TRIG_TIMER)
 632                 return;
 633
 634         if (mode == MODE_SINGLE_CHAN && cmd->convert_src == TRIG_TIMER)
 635                 return;
 636
 637         cmd->scan_begin_arg = ns;
 638 }
 639
 640 static int labpc_ai_cmdtest(struct comedi_device *dev,
 641                             struct comedi_subdevice *s, struct comedi_cmd *cmd)
 642 {
 643         const struct labpc_boardinfo *thisboard = comedi_board(dev);
 644         int err = 0;
 645         int tmp, tmp2;
 646         unsigned int stop_mask;
 647         enum scan_mode mode;
 648
 649         /* Step 1 : check if triggers are trivially valid */
 650
 651         err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
 652         err |= cfc_check_trigger_src(&cmd->scan_begin_src,
 653                                         TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT);
 654         err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_TIMER | TRIG_EXT);
 655         err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
 656
 657         stop_mask = TRIG_COUNT | TRIG_NONE;
 658         if (thisboard->register_layout == labpc_1200_layout)
 659                 stop_mask |= TRIG_EXT;
 660         err |= cfc_check_trigger_src(&cmd->stop_src, stop_mask);
 661
 662         if (err)
 663                 return 1;
 664
 665         /* Step 2a : make sure trigger sources are unique */
 666
 667         err |= cfc_check_trigger_is_unique(cmd->start_src);
 668         err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
 669         err |= cfc_check_trigger_is_unique(cmd->convert_src);
 670         err |= cfc_check_trigger_is_unique(cmd->stop_src);
 671
 672         /* Step 2b : and mutually compatible */
 673
 674         /* can't have external stop and start triggers at once */
 675         if (cmd->start_src == TRIG_EXT && cmd->stop_src == TRIG_EXT)
 676                 err++;
 677
 678         if (err)
 679                 return 2;
 680
 681         /* Step 3: check if arguments are trivially valid */
 682
 683         if (cmd->start_arg == TRIG_NOW)
 684                 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
 685
 686         if (!cmd->chanlist_len)
 687                 err |= -EINVAL;
 688         err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
 689
 690         if (cmd->convert_src == TRIG_TIMER)
 691                 err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
 692                                                  thisboard->ai_speed);
 693
 694         /* make sure scan timing is not too fast */
 695         if (cmd->scan_begin_src == TRIG_TIMER) {
 696                 if (cmd->convert_src == TRIG_TIMER)
 697                         err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
 698                                         cmd->convert_arg * cmd->chanlist_len);
 699                 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
 700                                 thisboard->ai_speed * cmd->chanlist_len);
 701         }
 702
 703         switch (cmd->stop_src) {
 704         case TRIG_COUNT:
 705                 err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
 706                 break;
 707         case TRIG_NONE:
 708                 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
 709                 break;
 710                 /*
 711                  * TRIG_EXT doesn't care since it doesn't
 712                  * trigger off a numbered channel
 713                  */
 714         default:
 715                 break;
 716         }
 717
 718         if (err)
 719                 return 3;
 720
 721         /* step 4: fix up any arguments */
 722
 723         tmp = cmd->convert_arg;
 724         tmp2 = cmd->scan_begin_arg;
 725         mode = labpc_ai_scan_mode(cmd);
 726         labpc_adc_timing(dev, cmd, mode);
 727         if (tmp != cmd->convert_arg || tmp2 != cmd->scan_begin_arg)
 728                 err++;
 729
 730         if (err)
 731                 return 4;
 732
 733         if (labpc_ai_chanlist_invalid(dev, cmd, mode))
 734                 return 5;
 735
 736         return 0;
 737 }
 738
 739 static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
 740 {
 741         const struct labpc_boardinfo *thisboard = comedi_board(dev);
 742         struct labpc_private *devpriv = dev->private;
 743         int channel, range, aref;
 744 #ifdef CONFIG_ISA_DMA_API
 745         unsigned long irq_flags;
 746 #endif
 747         int ret;
 748         struct comedi_async *async = s->async;
 749         struct comedi_cmd *cmd = &async->cmd;
 750         enum transfer_type xfer;
 751         enum scan_mode mode;
 752         unsigned long flags;
 753
 754         if (!dev->irq) {
 755                 comedi_error(dev, "no irq assigned, cannot perform command");
 756                 return -1;
 757         }
 758
 759         range = CR_RANGE(cmd->chanlist[0]);
 760         aref = CR_AREF(cmd->chanlist[0]);
 761
 762         /* make sure board is disabled before setting up acquisition */
 763         spin_lock_irqsave(&dev->spinlock, flags);
 764         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
 765         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
 766         spin_unlock_irqrestore(&dev->spinlock, flags);
 767
 768         devpriv->command3_bits = 0;
 769         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
 770
 771         /*  initialize software conversion count */
 772         if (cmd->stop_src == TRIG_COUNT)
 773                 devpriv->count = cmd->stop_arg * cmd->chanlist_len;
 774
 775         /*  setup hardware conversion counter */
 776         if (cmd->stop_src == TRIG_EXT) {
 777                 /*
 778                  * load counter a1 with count of 3
 779                  * (pc+ manual says this is minimum allowed) using mode 0
 780                  */
 781                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
 782                                          1, 3, 0);
 783                 if (ret < 0) {
 784                         comedi_error(dev, "error loading counter a1");
 785                         return -1;
 786                 }
 787         } else                  /*
 788                                  * otherwise, just put a1 in mode 0
 789                                  * with no count to set its output low
 790                                  */
 791                 devpriv->write_byte(INIT_A1_BITS,
 792                                     dev->iobase + COUNTER_A_CONTROL_REG);
 793
 794 #ifdef CONFIG_ISA_DMA_API
 795         /*  figure out what method we will use to transfer data */
 796         if (devpriv->dma_chan &&        /*  need a dma channel allocated */
 797                 /*
 798                  * dma unsafe at RT priority,
 799                  * and too much setup time for TRIG_WAKE_EOS for
 800                  */
 801             (cmd->flags & (TRIG_WAKE_EOS | TRIG_RT)) == 0 &&
 802             /*  only available on the isa boards */
 803             thisboard->bustype == isa_bustype) {
 804                 xfer = isa_dma_transfer;
 805                 /* pc-plus has no fifo-half full interrupt */
 806         } else
 807 #endif
 808         if (thisboard->register_layout == labpc_1200_layout &&
 809                    /*  wake-end-of-scan should interrupt on fifo not empty */
 810                    (cmd->flags & TRIG_WAKE_EOS) == 0 &&
 811                    /*  make sure we are taking more than just a few points */
 812                    (cmd->stop_src != TRIG_COUNT || devpriv->count > 256)) {
 813                 xfer = fifo_half_full_transfer;
 814         } else
 815                 xfer = fifo_not_empty_transfer;
 816         devpriv->current_transfer = xfer;
 817         mode = labpc_ai_scan_mode(cmd);
 818
 819         /*  setup command6 register for 1200 boards */
 820         if (thisboard->register_layout == labpc_1200_layout) {
 821                 /*  reference inputs to ground or common? */
 822                 if (aref != AREF_GROUND)
 823                         devpriv->command6_bits |= ADC_COMMON_BIT;
 824                 else
 825                         devpriv->command6_bits &= ~ADC_COMMON_BIT;
 826                 /*  bipolar or unipolar range? */
 827                 if (thisboard->ai_range_is_unipolar[range])
 828                         devpriv->command6_bits |= ADC_UNIP_BIT;
 829                 else
 830                         devpriv->command6_bits &= ~ADC_UNIP_BIT;
 831                 /*  interrupt on fifo half full? */
 832                 if (xfer == fifo_half_full_transfer)
 833                         devpriv->command6_bits |= ADC_FHF_INTR_EN_BIT;
 834                 else
 835                         devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT;
 836                 /*  enable interrupt on counter a1 terminal count? */
 837                 if (cmd->stop_src == TRIG_EXT)
 838                         devpriv->command6_bits |= A1_INTR_EN_BIT;
 839                 else
 840                         devpriv->command6_bits &= ~A1_INTR_EN_BIT;
 841                 /*  are we scanning up or down through channels? */
 842                 if (mode == MODE_MULT_CHAN_UP)
 843                         devpriv->command6_bits |= ADC_SCAN_UP_BIT;
 844                 else
 845                         devpriv->command6_bits &= ~ADC_SCAN_UP_BIT;
 846                 /*  write to register */
 847                 devpriv->write_byte(devpriv->command6_bits,
 848                                     dev->iobase + COMMAND6_REG);
 849         }
 850
 851         /* setup channel list, etc (command1 register) */
 852         devpriv->command1_bits = 0;
 853         if (mode == MODE_MULT_CHAN_UP)
 854                 channel = CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1]);
 855         else
 856                 channel = CR_CHAN(cmd->chanlist[0]);
 857         /* munge channel bits for differential / scan disabled mode */
 858         if ((mode == MODE_SINGLE_CHAN || mode == MODE_SINGLE_CHAN_INTERVAL) &&
 859             aref == AREF_DIFF)
 860                 channel *= 2;
 861         devpriv->command1_bits |= ADC_CHAN_BITS(channel);
 862         devpriv->command1_bits |= thisboard->ai_range_code[range];
 863         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
 864         /* manual says to set scan enable bit on second pass */
 865         if (mode == MODE_MULT_CHAN_UP || mode == MODE_MULT_CHAN_DOWN) {
 866                 devpriv->command1_bits |= ADC_SCAN_EN_BIT;
 867                 /* need a brief delay before enabling scan, or scan
 868                  * list will get screwed when you switch
 869                  * between scan up to scan down mode - dunno why */
 870                 udelay(1);
 871                 devpriv->write_byte(devpriv->command1_bits,
 872                                     dev->iobase + COMMAND1_REG);
 873         }
 874
 875         devpriv->write_byte(cmd->chanlist_len,
 876                             dev->iobase + INTERVAL_COUNT_REG);
 877         /*  load count */
 878         devpriv->write_byte(INTERVAL_LOAD_BITS,
 879                             dev->iobase + INTERVAL_LOAD_REG);
 880
 881         if (cmd->convert_src == TRIG_TIMER || cmd->scan_begin_src == TRIG_TIMER) {
 882                 /*  set up pacing */
 883                 labpc_adc_timing(dev, cmd, mode);
 884                 /*  load counter b0 in mode 3 */
 885                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
 886                                          0, devpriv->divisor_b0, 3);
 887                 if (ret < 0) {
 888                         comedi_error(dev, "error loading counter b0");
 889                         return -1;
 890                 }
 891         }
 892         /*  set up conversion pacing */
 893         if (labpc_ai_convert_period(cmd, mode)) {
 894                 /*  load counter a0 in mode 2 */
 895                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_A_BASE_REG,
 896                                          0, devpriv->divisor_a0, 2);
 897                 if (ret < 0) {
 898                         comedi_error(dev, "error loading counter a0");
 899                         return -1;
 900                 }
 901         } else
 902                 devpriv->write_byte(INIT_A0_BITS,
 903                                     dev->iobase + COUNTER_A_CONTROL_REG);
 904
 905         /*  set up scan pacing */
 906         if (labpc_ai_scan_period(cmd, mode)) {
 907                 /*  load counter b1 in mode 2 */
 908                 ret = labpc_counter_load(dev, dev->iobase + COUNTER_B_BASE_REG,
 909                                          1, devpriv->divisor_b1, 2);
 910                 if (ret < 0) {
 911                         comedi_error(dev, "error loading counter b1");
 912                         return -1;
 913                 }
 914         }
 915
 916         labpc_clear_adc_fifo(dev);
 917
 918 #ifdef CONFIG_ISA_DMA_API
 919         /*  set up dma transfer */
 920         if (xfer == isa_dma_transfer) {
 921                 irq_flags = claim_dma_lock();
 922                 disable_dma(devpriv->dma_chan);
 923                 /* clear flip-flop to make sure 2-byte registers for
 924                  * count and address get set correctly */
 925                 clear_dma_ff(devpriv->dma_chan);
 926                 set_dma_addr(devpriv->dma_chan,
 927                              virt_to_bus(devpriv->dma_buffer));
 928                 /*  set appropriate size of transfer */
 929                 devpriv->dma_transfer_size = labpc_suggest_transfer_size(cmd);
 930                 if (cmd->stop_src == TRIG_COUNT &&
 931                     devpriv->count * sample_size < devpriv->dma_transfer_size) {
 932                         devpriv->dma_transfer_size =
 933                             devpriv->count * sample_size;
 934                 }
 935                 set_dma_count(devpriv->dma_chan, devpriv->dma_transfer_size);
 936                 enable_dma(devpriv->dma_chan);
 937                 release_dma_lock(irq_flags);
 938                 /*  enable board's dma */
 939                 devpriv->command3_bits |= DMA_EN_BIT | DMATC_INTR_EN_BIT;
 940         } else
 941                 devpriv->command3_bits &= ~DMA_EN_BIT & ~DMATC_INTR_EN_BIT;
 942 #endif
 943
 944         /*  enable error interrupts */
 945         devpriv->command3_bits |= ERR_INTR_EN_BIT;
 946         /*  enable fifo not empty interrupt? */
 947         if (xfer == fifo_not_empty_transfer)
 948                 devpriv->command3_bits |= ADC_FNE_INTR_EN_BIT;
 949         else
 950                 devpriv->command3_bits &= ~ADC_FNE_INTR_EN_BIT;
 951         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
 952
 953         /*  setup any external triggering/pacing (command4 register) */
 954         devpriv->command4_bits = 0;
 955         if (cmd->convert_src != TRIG_EXT)
 956                 devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT;
 957         /* XXX should discard first scan when using interval scanning
 958          * since manual says it is not synced with scan clock */
 959         if (labpc_use_continuous_mode(cmd, mode) == 0) {
 960                 devpriv->command4_bits |= INTERVAL_SCAN_EN_BIT;
 961                 if (cmd->scan_begin_src == TRIG_EXT)
 962                         devpriv->command4_bits |= EXT_SCAN_EN_BIT;
 963         }
 964         /*  single-ended/differential */
 965         if (aref == AREF_DIFF)
 966                 devpriv->command4_bits |= ADC_DIFF_BIT;
 967         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
 968
 969         /*  startup acquisition */
 970
 971         /*  command2 reg */
 972         /*  use 2 cascaded counters for pacing */
 973         spin_lock_irqsave(&dev->spinlock, flags);
 974         devpriv->command2_bits |= CASCADE_BIT;
 975         switch (cmd->start_src) {
 976         case TRIG_EXT:
 977                 devpriv->command2_bits |= HWTRIG_BIT;
 978                 devpriv->command2_bits &= ~PRETRIG_BIT & ~SWTRIG_BIT;
 979                 break;
 980         case TRIG_NOW:
 981                 devpriv->command2_bits |= SWTRIG_BIT;
 982                 devpriv->command2_bits &= ~PRETRIG_BIT & ~HWTRIG_BIT;
 983                 break;
 984         default:
 985                 comedi_error(dev, "bug with start_src");
 986                 spin_unlock_irqrestore(&dev->spinlock, flags);
 987                 return -1;
 988                 break;
 989         }
 990         switch (cmd->stop_src) {
 991         case TRIG_EXT:
 992                 devpriv->command2_bits |= HWTRIG_BIT | PRETRIG_BIT;
 993                 break;
 994         case TRIG_COUNT:
 995         case TRIG_NONE:
 996                 break;
 997         default:
 998                 comedi_error(dev, "bug with stop_src");
 999                 spin_unlock_irqrestore(&dev->spinlock, flags);
1000                 return -1;
1001         }
1002         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1003         spin_unlock_irqrestore(&dev->spinlock, flags);
1004
1005         return 0;
1006 }
1007
1008 static int labpc_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1009                           struct comedi_insn *insn, unsigned int *data)
1010 {
1011         const struct labpc_boardinfo *thisboard = comedi_board(dev);
1012         struct labpc_private *devpriv = dev->private;
1013         int i, n;
1014         int chan, range;
1015         int lsb, msb;
1016         int timeout = 1000;
1017         unsigned long flags;
1018
1019         /*  disable timed conversions */
1020         spin_lock_irqsave(&dev->spinlock, flags);
1021         devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
1022         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1023         spin_unlock_irqrestore(&dev->spinlock, flags);
1024
1025         /*  disable interrupt generation and dma */
1026         devpriv->command3_bits = 0;
1027         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1028
1029         /* set gain and channel */
1030         devpriv->command1_bits = 0;
1031         chan = CR_CHAN(insn->chanspec);
1032         range = CR_RANGE(insn->chanspec);
1033         devpriv->command1_bits |= thisboard->ai_range_code[range];
1034         /* munge channel bits for differential/scan disabled mode */
1035         if (CR_AREF(insn->chanspec) == AREF_DIFF)
1036                 chan *= 2;
1037         devpriv->command1_bits |= ADC_CHAN_BITS(chan);
1038         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
1039
1040         /* setup command6 register for 1200 boards */
1041         if (thisboard->register_layout == labpc_1200_layout) {
1042                 /*  reference inputs to ground or common? */
1043                 if (CR_AREF(insn->chanspec) != AREF_GROUND)
1044                         devpriv->command6_bits |= ADC_COMMON_BIT;
1045                 else
1046                         devpriv->command6_bits &= ~ADC_COMMON_BIT;
1047                 /* bipolar or unipolar range? */
1048                 if (thisboard->ai_range_is_unipolar[range])
1049                         devpriv->command6_bits |= ADC_UNIP_BIT;
1050                 else
1051                         devpriv->command6_bits &= ~ADC_UNIP_BIT;
1052                 /* don't interrupt on fifo half full */
1053                 devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT;
1054                 /* don't enable interrupt on counter a1 terminal count? */
1055                 devpriv->command6_bits &= ~A1_INTR_EN_BIT;
1056                 /* write to register */
1057                 devpriv->write_byte(devpriv->command6_bits,
1058                                     dev->iobase + COMMAND6_REG);
1059         }
1060         /* setup command4 register */
1061         devpriv->command4_bits = 0;
1062         devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT;
1063         /* single-ended/differential */
1064         if (CR_AREF(insn->chanspec) == AREF_DIFF)
1065                 devpriv->command4_bits |= ADC_DIFF_BIT;
1066         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
1067
1068         /*
1069          * initialize pacer counter output to make sure it doesn't
1070          * cause any problems
1071          */
1072         devpriv->write_byte(INIT_A0_BITS, dev->iobase + COUNTER_A_CONTROL_REG);
1073
1074         labpc_clear_adc_fifo(dev);
1075
1076         for (n = 0; n < insn->n; n++) {
1077                 /* trigger conversion */
1078                 devpriv->write_byte(0x1, dev->iobase + ADC_CONVERT_REG);
1079
1080                 for (i = 0; i < timeout; i++) {
1081                         if (devpriv->read_byte(dev->iobase +
1082                                                STATUS1_REG) & DATA_AVAIL_BIT)
1083                                 break;
1084                         udelay(1);
1085                 }
1086                 if (i == timeout) {
1087                         comedi_error(dev, "timeout");
1088                         return -ETIME;
1089                 }
1090                 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1091                 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1092                 data[n] = (msb << 8) | lsb;
1093         }
1094
1095         return n;
1096 }
1097
1098 #ifdef CONFIG_ISA_DMA_API
1099 /* utility function that suggests a dma transfer size in bytes */
1100 static unsigned int labpc_suggest_transfer_size(const struct comedi_cmd *cmd)
1101 {
1102         unsigned int size;
1103         unsigned int freq;
1104
1105         if (cmd->convert_src == TRIG_TIMER)
1106                 freq = 1000000000 / cmd->convert_arg;
1107         /* return some default value */
1108         else
1109                 freq = 0xffffffff;
1110
1111         /* make buffer fill in no more than 1/3 second */
1112         size = (freq / 3) * sample_size;
1113
1114         /* set a minimum and maximum size allowed */
1115         if (size > dma_buffer_size)
1116                 size = dma_buffer_size - dma_buffer_size % sample_size;
1117         else if (size < sample_size)
1118                 size = sample_size;
1119
1120         return size;
1121 }
1122 #endif
1123
1124 /* figures out what counter values to use based on command */
1125 static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd,
1126                              enum scan_mode mode)
1127 {
1128         struct labpc_private *devpriv = dev->private;
1129         /* max value for 16 bit counter in mode 2 */
1130         const int max_counter_value = 0x10000;
1131         /* min value for 16 bit counter in mode 2 */
1132         const int min_counter_value = 2;
1133         unsigned int base_period;
1134         unsigned int scan_period;
1135         unsigned int convert_period;
1136
1137         /*
1138          * if both convert and scan triggers are TRIG_TIMER, then they
1139          * both rely on counter b0
1140          */
1141         convert_period = labpc_ai_convert_period(cmd, mode);
1142         scan_period = labpc_ai_scan_period(cmd, mode);
1143         if (convert_period && scan_period) {
1144                 /*
1145                  * pick the lowest b0 divisor value we can (for maximum input
1146                  * clock speed on convert and scan counters)
1147                  */
1148                 devpriv->divisor_b0 = (scan_period - 1) /
1149                     (LABPC_TIMER_BASE * max_counter_value) + 1;
1150                 if (devpriv->divisor_b0 < min_counter_value)
1151                         devpriv->divisor_b0 = min_counter_value;
1152                 if (devpriv->divisor_b0 > max_counter_value)
1153                         devpriv->divisor_b0 = max_counter_value;
1154
1155                 base_period = LABPC_TIMER_BASE * devpriv->divisor_b0;
1156
1157                 /*  set a0 for conversion frequency and b1 for scan frequency */
1158                 switch (cmd->flags & TRIG_ROUND_MASK) {
1159                 default:
1160                 case TRIG_ROUND_NEAREST:
1161                         devpriv->divisor_a0 =
1162                             (convert_period + (base_period / 2)) / base_period;
1163                         devpriv->divisor_b1 =
1164                             (scan_period + (base_period / 2)) / base_period;
1165                         break;
1166                 case TRIG_ROUND_UP:
1167                         devpriv->divisor_a0 =
1168                             (convert_period + (base_period - 1)) / base_period;
1169                         devpriv->divisor_b1 =
1170                             (scan_period + (base_period - 1)) / base_period;
1171                         break;
1172                 case TRIG_ROUND_DOWN:
1173                         devpriv->divisor_a0 = convert_period / base_period;
1174                         devpriv->divisor_b1 = scan_period / base_period;
1175                         break;
1176                 }
1177                 /*  make sure a0 and b1 values are acceptable */
1178                 if (devpriv->divisor_a0 < min_counter_value)
1179                         devpriv->divisor_a0 = min_counter_value;
1180                 if (devpriv->divisor_a0 > max_counter_value)
1181                         devpriv->divisor_a0 = max_counter_value;
1182                 if (devpriv->divisor_b1 < min_counter_value)
1183                         devpriv->divisor_b1 = min_counter_value;
1184                 if (devpriv->divisor_b1 > max_counter_value)
1185                         devpriv->divisor_b1 = max_counter_value;
1186                 /*  write corrected timings to command */
1187                 labpc_set_ai_convert_period(cmd, mode,
1188                                             base_period * devpriv->divisor_a0);
1189                 labpc_set_ai_scan_period(cmd, mode,
1190                                          base_period * devpriv->divisor_b1);
1191                 /*
1192                  * if only one TRIG_TIMER is used, we can employ the generic
1193                  * cascaded timing functions
1194                  */
1195         } else if (scan_period) {
1196                 /*
1197                  * calculate cascaded counter values
1198                  * that give desired scan timing
1199                  */
1200                 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
1201                                                &(devpriv->divisor_b1),
1202                                                &(devpriv->divisor_b0),
1203                                                &scan_period,
1204                                                cmd->flags & TRIG_ROUND_MASK);
1205                 labpc_set_ai_scan_period(cmd, mode, scan_period);
1206         } else if (convert_period) {
1207                 /*
1208                  * calculate cascaded counter values
1209                  * that give desired conversion timing
1210                  */
1211                 i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
1212                                                &(devpriv->divisor_a0),
1213                                                &(devpriv->divisor_b0),
1214                                                &convert_period,
1215                                                cmd->flags & TRIG_ROUND_MASK);
1216                 labpc_set_ai_convert_period(cmd, mode, convert_period);
1217         }
1218 }
1219
1220 #ifdef CONFIG_ISA_DMA_API
1221 static void labpc_drain_dma(struct comedi_device *dev)
1222 {
1223         struct labpc_private *devpriv = dev->private;
1224         struct comedi_subdevice *s = dev->read_subdev;
1225         struct comedi_async *async = s->async;
1226         int status;
1227         unsigned long flags;
1228         unsigned int max_points, num_points, residue, leftover;
1229         int i;
1230
1231         status = devpriv->status1_bits;
1232
1233         flags = claim_dma_lock();
1234         disable_dma(devpriv->dma_chan);
1235         /* clear flip-flop to make sure 2-byte registers for
1236          * count and address get set correctly */
1237         clear_dma_ff(devpriv->dma_chan);
1238
1239         /*  figure out how many points to read */
1240         max_points = devpriv->dma_transfer_size / sample_size;
1241         /* residue is the number of points left to be done on the dma
1242          * transfer.  It should always be zero at this point unless
1243          * the stop_src is set to external triggering.
1244          */
1245         residue = get_dma_residue(devpriv->dma_chan) / sample_size;
1246         num_points = max_points - residue;
1247         if (devpriv->count < num_points && async->cmd.stop_src == TRIG_COUNT)
1248                 num_points = devpriv->count;
1249
1250         /*  figure out how many points will be stored next time */
1251         leftover = 0;
1252         if (async->cmd.stop_src != TRIG_COUNT) {
1253                 leftover = devpriv->dma_transfer_size / sample_size;
1254         } else if (devpriv->count > num_points) {
1255                 leftover = devpriv->count - num_points;
1256                 if (leftover > max_points)
1257                         leftover = max_points;
1258         }
1259
1260         /* write data to comedi buffer */
1261         for (i = 0; i < num_points; i++)
1262                 cfc_write_to_buffer(s, devpriv->dma_buffer[i]);
1263
1264         if (async->cmd.stop_src == TRIG_COUNT)
1265                 devpriv->count -= num_points;
1266
1267         /*  set address and count for next transfer */
1268         set_dma_addr(devpriv->dma_chan, virt_to_bus(devpriv->dma_buffer));
1269         set_dma_count(devpriv->dma_chan, leftover * sample_size);
1270         release_dma_lock(flags);
1271
1272         async->events |= COMEDI_CB_BLOCK;
1273 }
1274
1275 static void handle_isa_dma(struct comedi_device *dev)
1276 {
1277         struct labpc_private *devpriv = dev->private;
1278
1279         labpc_drain_dma(dev);
1280
1281         enable_dma(devpriv->dma_chan);
1282
1283         /*  clear dma tc interrupt */
1284         devpriv->write_byte(0x1, dev->iobase + DMATC_CLEAR_REG);
1285 }
1286 #endif
1287
1288 /* read all available samples from ai fifo */
1289 static int labpc_drain_fifo(struct comedi_device *dev)
1290 {
1291         struct labpc_private *devpriv = dev->private;
1292         unsigned int lsb, msb;
1293         short data;
1294         struct comedi_async *async = dev->read_subdev->async;
1295         const int timeout = 10000;
1296         unsigned int i;
1297
1298         devpriv->status1_bits = devpriv->read_byte(dev->iobase + STATUS1_REG);
1299
1300         for (i = 0; (devpriv->status1_bits & DATA_AVAIL_BIT) && i < timeout;
1301              i++) {
1302                 /*  quit if we have all the data we want */
1303                 if (async->cmd.stop_src == TRIG_COUNT) {
1304                         if (devpriv->count == 0)
1305                                 break;
1306                         devpriv->count--;
1307                 }
1308                 lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1309                 msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
1310                 data = (msb << 8) | lsb;
1311                 cfc_write_to_buffer(dev->read_subdev, data);
1312                 devpriv->status1_bits =
1313                     devpriv->read_byte(dev->iobase + STATUS1_REG);
1314         }
1315         if (i == timeout) {
1316                 comedi_error(dev, "ai timeout, fifo never empties");
1317                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1318                 return -1;
1319         }
1320
1321         return 0;
1322 }
1323
1324 /* makes sure all data acquired by board is transferred to comedi (used
1325  * when acquisition is terminated by stop_src == TRIG_EXT). */
1326 static void labpc_drain_dregs(struct comedi_device *dev)
1327 {
1328 #ifdef CONFIG_ISA_DMA_API
1329         struct labpc_private *devpriv = dev->private;
1330
1331         if (devpriv->current_transfer == isa_dma_transfer)
1332                 labpc_drain_dma(dev);
1333 #endif
1334
1335         labpc_drain_fifo(dev);
1336 }
1337
1338 /* interrupt service routine */
1339 static irqreturn_t labpc_interrupt(int irq, void *d)
1340 {
1341         struct comedi_device *dev = d;
1342         const struct labpc_boardinfo *thisboard = comedi_board(dev);
1343         struct labpc_private *devpriv = dev->private;
1344         struct comedi_subdevice *s = dev->read_subdev;
1345         struct comedi_async *async;
1346         struct comedi_cmd *cmd;
1347
1348         if (!dev->attached) {
1349                 comedi_error(dev, "premature interrupt");
1350                 return IRQ_HANDLED;
1351         }
1352
1353         async = s->async;
1354         cmd = &async->cmd;
1355         async->events = 0;
1356
1357         /* read board status */
1358         devpriv->status1_bits = devpriv->read_byte(dev->iobase + STATUS1_REG);
1359         if (thisboard->register_layout == labpc_1200_layout)
1360                 devpriv->status2_bits =
1361                     devpriv->read_byte(dev->iobase + STATUS2_REG);
1362
1363         if ((devpriv->status1_bits & (DMATC_BIT | TIMER_BIT | OVERFLOW_BIT |
1364                                       OVERRUN_BIT | DATA_AVAIL_BIT)) == 0
1365             && (devpriv->status2_bits & A1_TC_BIT) == 0
1366             && (devpriv->status2_bits & FNHF_BIT)) {
1367                 return IRQ_NONE;
1368         }
1369
1370         if (devpriv->status1_bits & OVERRUN_BIT) {
1371                 /* clear error interrupt */
1372                 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1373                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1374                 comedi_event(dev, s);
1375                 comedi_error(dev, "overrun");
1376                 return IRQ_HANDLED;
1377         }
1378
1379 #ifdef CONFIG_ISA_DMA_API
1380         if (devpriv->current_transfer == isa_dma_transfer) {
1381                 /*
1382                  * if a dma terminal count of external stop trigger
1383                  * has occurred
1384                  */
1385                 if (devpriv->status1_bits & DMATC_BIT ||
1386                     (thisboard->register_layout == labpc_1200_layout
1387                      && devpriv->status2_bits & A1_TC_BIT)) {
1388                         handle_isa_dma(dev);
1389                 }
1390         } else
1391 #endif
1392                 labpc_drain_fifo(dev);
1393
1394         if (devpriv->status1_bits & TIMER_BIT) {
1395                 comedi_error(dev, "handled timer interrupt?");
1396                 /*  clear it */
1397                 devpriv->write_byte(0x1, dev->iobase + TIMER_CLEAR_REG);
1398         }
1399
1400         if (devpriv->status1_bits & OVERFLOW_BIT) {
1401                 /*  clear error interrupt */
1402                 devpriv->write_byte(0x1, dev->iobase + ADC_CLEAR_REG);
1403                 async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
1404                 comedi_event(dev, s);
1405                 comedi_error(dev, "overflow");
1406                 return IRQ_HANDLED;
1407         }
1408         /*  handle external stop trigger */
1409         if (cmd->stop_src == TRIG_EXT) {
1410                 if (devpriv->status2_bits & A1_TC_BIT) {
1411                         labpc_drain_dregs(dev);
1412                         labpc_cancel(dev, s);
1413                         async->events |= COMEDI_CB_EOA;
1414                 }
1415         }
1416
1417         /* TRIG_COUNT end of acquisition */
1418         if (cmd->stop_src == TRIG_COUNT) {
1419                 if (devpriv->count == 0) {
1420                         labpc_cancel(dev, s);
1421                         async->events |= COMEDI_CB_EOA;
1422                 }
1423         }
1424
1425         comedi_event(dev, s);
1426         return IRQ_HANDLED;
1427 }
1428
1429 /* analog output insn */
1430 static int labpc_ao_winsn(struct comedi_device *dev, struct comedi_subdevice *s,
1431                           struct comedi_insn *insn, unsigned int *data)
1432 {
1433         const struct labpc_boardinfo *thisboard = comedi_board(dev);
1434         struct labpc_private *devpriv = dev->private;
1435         int channel, range;
1436         unsigned long flags;
1437         int lsb, msb;
1438
1439         channel = CR_CHAN(insn->chanspec);
1440
1441         /* turn off pacing of analog output channel */
1442         /* note: hardware bug in daqcard-1200 means pacing cannot
1443          * be independently enabled/disabled for its the two channels */
1444         spin_lock_irqsave(&dev->spinlock, flags);
1445         devpriv->command2_bits &= ~DAC_PACED_BIT(channel);
1446         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1447         spin_unlock_irqrestore(&dev->spinlock, flags);
1448
1449         /* set range */
1450         if (thisboard->register_layout == labpc_1200_layout) {
1451                 range = CR_RANGE(insn->chanspec);
1452                 if (range & AO_RANGE_IS_UNIPOLAR)
1453                         devpriv->command6_bits |= DAC_UNIP_BIT(channel);
1454                 else
1455                         devpriv->command6_bits &= ~DAC_UNIP_BIT(channel);
1456                 /*  write to register */
1457                 devpriv->write_byte(devpriv->command6_bits,
1458                                     dev->iobase + COMMAND6_REG);
1459         }
1460         /* send data */
1461         lsb = data[0] & 0xff;
1462         msb = (data[0] >> 8) & 0xff;
1463         devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(channel));
1464         devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(channel));
1465
1466         /* remember value for readback */
1467         devpriv->ao_value[channel] = data[0];
1468
1469         return 1;
1470 }
1471
1472 /* analog output readback insn */
1473 static int labpc_ao_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
1474                           struct comedi_insn *insn, unsigned int *data)
1475 {
1476         struct labpc_private *devpriv = dev->private;
1477
1478         data[0] = devpriv->ao_value[CR_CHAN(insn->chanspec)];
1479
1480         return 1;
1481 }
1482
1483 static int labpc_dio_mem_callback(int dir, int port, int data,
1484                                   unsigned long iobase)
1485 {
1486         if (dir) {
1487                 writeb(data, (void __iomem *)(iobase + port));
1488                 return 0;
1489         } else {
1490                 return readb((void __iomem *)(iobase + port));
1491         }
1492 }
1493
1494 /* lowlevel write to eeprom/dac */
1495 static void labpc_serial_out(struct comedi_device *dev, unsigned int value,
1496                              unsigned int value_width)
1497 {
1498         struct labpc_private *devpriv = dev->private;
1499         int i;
1500
1501         for (i = 1; i <= value_width; i++) {
1502                 /*  clear serial clock */
1503                 devpriv->command5_bits &= ~SCLOCK_BIT;
1504                 /*  send bits most significant bit first */
1505                 if (value & (1 << (value_width - i)))
1506                         devpriv->command5_bits |= SDATA_BIT;
1507                 else
1508                         devpriv->command5_bits &= ~SDATA_BIT;
1509                 udelay(1);
1510                 devpriv->write_byte(devpriv->command5_bits,
1511                                     dev->iobase + COMMAND5_REG);
1512                 /*  set clock to load bit */
1513                 devpriv->command5_bits |= SCLOCK_BIT;
1514                 udelay(1);
1515                 devpriv->write_byte(devpriv->command5_bits,
1516                                     dev->iobase + COMMAND5_REG);
1517         }
1518 }
1519
1520 /* lowlevel read from eeprom */
1521 static unsigned int labpc_serial_in(struct comedi_device *dev)
1522 {
1523         struct labpc_private *devpriv = dev->private;
1524         unsigned int value = 0;
1525         int i;
1526         const int value_width = 8;      /*  number of bits wide values are */
1527
1528         for (i = 1; i <= value_width; i++) {
1529                 /*  set serial clock */
1530                 devpriv->command5_bits |= SCLOCK_BIT;
1531                 udelay(1);
1532                 devpriv->write_byte(devpriv->command5_bits,
1533                                     dev->iobase + COMMAND5_REG);
1534                 /*  clear clock bit */
1535                 devpriv->command5_bits &= ~SCLOCK_BIT;
1536                 udelay(1);
1537                 devpriv->write_byte(devpriv->command5_bits,
1538                                     dev->iobase + COMMAND5_REG);
1539                 /*  read bits most significant bit first */
1540                 udelay(1);
1541                 devpriv->status2_bits =
1542                     devpriv->read_byte(dev->iobase + STATUS2_REG);
1543                 if (devpriv->status2_bits & EEPROM_OUT_BIT)
1544                         value |= 1 << (value_width - i);
1545         }
1546
1547         return value;
1548 }
1549
1550 static unsigned int labpc_eeprom_read(struct comedi_device *dev,
1551                                       unsigned int address)
1552 {
1553         struct labpc_private *devpriv = dev->private;
1554         unsigned int value;
1555         /*  bits to tell eeprom to expect a read */
1556         const int read_instruction = 0x3;
1557         /*  8 bit write lengths to eeprom */
1558         const int write_length = 8;
1559
1560         /*  enable read/write to eeprom */
1561         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1562         udelay(1);
1563         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1564         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
1565         udelay(1);
1566         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1567
1568         /*  send read instruction */
1569         labpc_serial_out(dev, read_instruction, write_length);
1570         /*  send 8 bit address to read from */
1571         labpc_serial_out(dev, address, write_length);
1572         /*  read result */
1573         value = labpc_serial_in(dev);
1574
1575         /*  disable read/write to eeprom */
1576         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1577         udelay(1);
1578         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1579
1580         return value;
1581 }
1582
1583 static unsigned int labpc_eeprom_read_status(struct comedi_device *dev)
1584 {
1585         struct labpc_private *devpriv = dev->private;
1586         unsigned int value;
1587         const int read_status_instruction = 0x5;
1588         const int write_length = 8;     /*  8 bit write lengths to eeprom */
1589
1590         /*  enable read/write to eeprom */
1591         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1592         udelay(1);
1593         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1594         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
1595         udelay(1);
1596         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1597
1598         /*  send read status instruction */
1599         labpc_serial_out(dev, read_status_instruction, write_length);
1600         /*  read result */
1601         value = labpc_serial_in(dev);
1602
1603         /*  disable read/write to eeprom */
1604         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1605         udelay(1);
1606         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1607
1608         return value;
1609 }
1610
1611 static int labpc_eeprom_write(struct comedi_device *dev,
1612                                 unsigned int address, unsigned int value)
1613 {
1614         struct labpc_private *devpriv = dev->private;
1615         const int write_enable_instruction = 0x6;
1616         const int write_instruction = 0x2;
1617         const int write_length = 8;     /*  8 bit write lengths to eeprom */
1618         const int write_in_progress_bit = 0x1;
1619         const int timeout = 10000;
1620         int i;
1621
1622         /*  make sure there isn't already a write in progress */
1623         for (i = 0; i < timeout; i++) {
1624                 if ((labpc_eeprom_read_status(dev) & write_in_progress_bit) ==
1625                     0)
1626                         break;
1627         }
1628         if (i == timeout) {
1629                 comedi_error(dev, "eeprom write timed out");
1630                 return -ETIME;
1631         }
1632         /*  update software copy of eeprom */
1633         devpriv->eeprom_data[address] = value;
1634
1635         /*  enable read/write to eeprom */
1636         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1637         udelay(1);
1638         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1639         devpriv->command5_bits |= EEPROM_EN_BIT | EEPROM_WRITE_UNPROTECT_BIT;
1640         udelay(1);
1641         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1642
1643         /*  send write_enable instruction */
1644         labpc_serial_out(dev, write_enable_instruction, write_length);
1645         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1646         udelay(1);
1647         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1648
1649         /*  send write instruction */
1650         devpriv->command5_bits |= EEPROM_EN_BIT;
1651         udelay(1);
1652         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1653         labpc_serial_out(dev, write_instruction, write_length);
1654         /*  send 8 bit address to write to */
1655         labpc_serial_out(dev, address, write_length);
1656         /*  write value */
1657         labpc_serial_out(dev, value, write_length);
1658         devpriv->command5_bits &= ~EEPROM_EN_BIT;
1659         udelay(1);
1660         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1661
1662         /*  disable read/write to eeprom */
1663         devpriv->command5_bits &= ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1664         udelay(1);
1665         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1666
1667         return 0;
1668 }
1669
1670 /* writes to 8 bit calibration dacs */
1671 static void write_caldac(struct comedi_device *dev, unsigned int channel,
1672                          unsigned int value)
1673 {
1674         struct labpc_private *devpriv = dev->private;
1675
1676         if (value == devpriv->caldac[channel])
1677                 return;
1678         devpriv->caldac[channel] = value;
1679
1680         /*  clear caldac load bit and make sure we don't write to eeprom */
1681         devpriv->command5_bits &=
1682             ~CALDAC_LOAD_BIT & ~EEPROM_EN_BIT & ~EEPROM_WRITE_UNPROTECT_BIT;
1683         udelay(1);
1684         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1685
1686         /*  write 4 bit channel */
1687         labpc_serial_out(dev, channel, 4);
1688         /*  write 8 bit caldac value */
1689         labpc_serial_out(dev, value, 8);
1690
1691         /*  set and clear caldac bit to load caldac value */
1692         devpriv->command5_bits |= CALDAC_LOAD_BIT;
1693         udelay(1);
1694         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1695         devpriv->command5_bits &= ~CALDAC_LOAD_BIT;
1696         udelay(1);
1697         devpriv->write_byte(devpriv->command5_bits, dev->iobase + COMMAND5_REG);
1698 }
1699
1700 static int labpc_calib_write_insn(struct comedi_device *dev,
1701                                   struct comedi_subdevice *s,
1702                                   struct comedi_insn *insn, unsigned int *data)
1703 {
1704         int channel = CR_CHAN(insn->chanspec);
1705
1706         write_caldac(dev, channel, data[0]);
1707         return 1;
1708 }
1709
1710 static int labpc_calib_read_insn(struct comedi_device *dev,
1711                                  struct comedi_subdevice *s,
1712                                  struct comedi_insn *insn, unsigned int *data)
1713 {
1714         struct labpc_private *devpriv = dev->private;
1715
1716         data[0] = devpriv->caldac[CR_CHAN(insn->chanspec)];
1717
1718         return 1;
1719 }
1720
1721 static int labpc_eeprom_write_insn(struct comedi_device *dev,
1722                                    struct comedi_subdevice *s,
1723                                    struct comedi_insn *insn, unsigned int *data)
1724 {
1725         int channel = CR_CHAN(insn->chanspec);
1726         int ret;
1727
1728         /*  only allow writes to user area of eeprom */
1729         if (channel < 16 || channel > 127) {
1730                 dev_dbg(dev->class_dev,
1731                         "eeprom writes are only allowed to channels 16 through 127 (the pointer and user areas)\n");
1732                 return -EINVAL;
1733         }
1734
1735         ret = labpc_eeprom_write(dev, channel, data[0]);
1736         if (ret < 0)
1737                 return ret;
1738
1739         return 1;
1740 }
1741
1742 static int labpc_eeprom_read_insn(struct comedi_device *dev,
1743                                   struct comedi_subdevice *s,
1744                                   struct comedi_insn *insn, unsigned int *data)
1745 {
1746         struct labpc_private *devpriv = dev->private;
1747
1748         data[0] = devpriv->eeprom_data[CR_CHAN(insn->chanspec)];
1749
1750         return 1;
1751 }
1752
1753 int labpc_common_attach(struct comedi_device *dev, unsigned long iobase,
1754                         unsigned int irq, unsigned int dma_chan)
1755 {
1756         const struct labpc_boardinfo *thisboard = comedi_board(dev);
1757         struct labpc_private *devpriv = dev->private;
1758         struct comedi_subdevice *s;
1759         int i;
1760         unsigned long isr_flags;
1761 #ifdef CONFIG_ISA_DMA_API
1762         unsigned long dma_flags;
1763 #endif
1764         short lsb, msb;
1765         int ret;
1766
1767         dev_info(dev->class_dev, "ni_labpc: %s\n", thisboard->name);
1768         if (iobase == 0) {
1769                 dev_err(dev->class_dev, "io base address is zero!\n");
1770                 return -EINVAL;
1771         }
1772         /*  request io regions for isa boards */
1773         if (thisboard->bustype == isa_bustype) {
1774                 /* check if io addresses are available */
1775                 if (!request_region(iobase, LABPC_SIZE, DRV_NAME)) {
1776                         dev_err(dev->class_dev, "I/O port conflict\n");
1777                         return -EIO;
1778                 }
1779         }
1780         dev->iobase = iobase;
1781
1782         if (thisboard->memory_mapped_io) {
1783                 devpriv->read_byte = labpc_readb;
1784                 devpriv->write_byte = labpc_writeb;
1785         } else {
1786                 devpriv->read_byte = labpc_inb;
1787                 devpriv->write_byte = labpc_outb;
1788         }
1789         /* initialize board's command registers */
1790         devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
1791         devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
1792         devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
1793         devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
1794         if (thisboard->register_layout == labpc_1200_layout) {
1795                 devpriv->write_byte(devpriv->command5_bits,
1796                                     dev->iobase + COMMAND5_REG);
1797                 devpriv->write_byte(devpriv->command6_bits,
1798                                     dev->iobase + COMMAND6_REG);
1799         }
1800
1801         /* grab our IRQ */
1802         if (irq) {
1803                 isr_flags = 0;
1804                 if (thisboard->bustype == pci_bustype
1805                     || thisboard->bustype == pcmcia_bustype)
1806                         isr_flags |= IRQF_SHARED;
1807                 if (request_irq(irq, labpc_interrupt, isr_flags,
1808                                 DRV_NAME, dev)) {
1809                         dev_err(dev->class_dev, "unable to allocate irq %u\n",
1810                                 irq);
1811                         return -EINVAL;
1812                 }
1813         }
1814         dev->irq = irq;
1815
1816 #ifdef CONFIG_ISA_DMA_API
1817         /* grab dma channel */
1818         if (dma_chan > 3) {
1819                 dev_err(dev->class_dev, "invalid dma channel %u\n", dma_chan);
1820                 return -EINVAL;
1821         } else if (dma_chan) {
1822                 /* allocate dma buffer */
1823                 devpriv->dma_buffer = kmalloc(dma_buffer_size,
1824                                               GFP_KERNEL | GFP_DMA);
1825                 if (devpriv->dma_buffer == NULL)
1826                         return -ENOMEM;
1827
1828                 if (request_dma(dma_chan, DRV_NAME)) {
1829                         dev_err(dev->class_dev,
1830                                 "failed to allocate dma channel %u\n",
1831                                 dma_chan);
1832                         return -EINVAL;
1833                 }
1834                 devpriv->dma_chan = dma_chan;
1835                 dma_flags = claim_dma_lock();
1836                 disable_dma(devpriv->dma_chan);
1837                 set_dma_mode(devpriv->dma_chan, DMA_MODE_READ);
1838                 release_dma_lock(dma_flags);
1839         }
1840 #endif
1841
1842         dev->board_name = thisboard->name;
1843
1844         ret = comedi_alloc_subdevices(dev, 5);
1845         if (ret)
1846                 return ret;
1847
1848         /* analog input subdevice */
1849         s = &dev->subdevices[0];
1850         dev->read_subdev = s;
1851         s->type = COMEDI_SUBD_AI;
1852         s->subdev_flags =
1853             SDF_READABLE | SDF_GROUND | SDF_COMMON | SDF_DIFF | SDF_CMD_READ;
1854         s->n_chan = 8;
1855         s->len_chanlist = 8;
1856         s->maxdata = (1 << 12) - 1;     /* 12 bit resolution */
1857         s->range_table = thisboard->ai_range_table;
1858         s->do_cmd = labpc_ai_cmd;
1859         s->do_cmdtest = labpc_ai_cmdtest;
1860         s->insn_read = labpc_ai_rinsn;
1861         s->cancel = labpc_cancel;
1862
1863         /* analog output */
1864         s = &dev->subdevices[1];
1865         if (thisboard->has_ao) {
1866                 /*
1867                  * Could provide command support, except it only has a
1868                  * one sample hardware buffer for analog output and no
1869                  * underrun flag.
1870                  */
1871                 s->type = COMEDI_SUBD_AO;
1872                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_GROUND;
1873                 s->n_chan = NUM_AO_CHAN;
1874                 s->maxdata = (1 << 12) - 1;     /*  12 bit resolution */
1875                 s->range_table = &range_labpc_ao;
1876                 s->insn_read = labpc_ao_rinsn;
1877                 s->insn_write = labpc_ao_winsn;
1878                 /* initialize analog outputs to a known value */
1879                 for (i = 0; i < s->n_chan; i++) {
1880                         devpriv->ao_value[i] = s->maxdata / 2;
1881                         lsb = devpriv->ao_value[i] & 0xff;
1882                         msb = (devpriv->ao_value[i] >> 8) & 0xff;
1883                         devpriv->write_byte(lsb, dev->iobase + DAC_LSB_REG(i));
1884                         devpriv->write_byte(msb, dev->iobase + DAC_MSB_REG(i));
1885                 }
1886         } else {
1887                 s->type = COMEDI_SUBD_UNUSED;
1888         }
1889
1890         /* 8255 dio */
1891         s = &dev->subdevices[2];
1892         /*  if board uses io memory we have to give a custom callback
1893          * function to the 8255 driver */
1894         if (thisboard->memory_mapped_io)
1895                 subdev_8255_init(dev, s, labpc_dio_mem_callback,
1896                                  (unsigned long)(dev->iobase + DIO_BASE_REG));
1897         else
1898                 subdev_8255_init(dev, s, NULL, dev->iobase + DIO_BASE_REG);
1899
1900         /*  calibration subdevices for boards that have one */
1901         s = &dev->subdevices[3];
1902         if (thisboard->register_layout == labpc_1200_layout) {
1903                 s->type = COMEDI_SUBD_CALIB;
1904                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
1905                 s->n_chan = 16;
1906                 s->maxdata = 0xff;
1907                 s->insn_read = labpc_calib_read_insn;
1908                 s->insn_write = labpc_calib_write_insn;
1909
1910                 for (i = 0; i < s->n_chan; i++)
1911                         write_caldac(dev, i, s->maxdata / 2);
1912         } else
1913                 s->type = COMEDI_SUBD_UNUSED;
1914
1915         /* EEPROM */
1916         s = &dev->subdevices[4];
1917         if (thisboard->register_layout == labpc_1200_layout) {
1918                 s->type = COMEDI_SUBD_MEMORY;
1919                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
1920                 s->n_chan = EEPROM_SIZE;
1921                 s->maxdata = 0xff;
1922                 s->insn_read = labpc_eeprom_read_insn;
1923                 s->insn_write = labpc_eeprom_write_insn;
1924
1925                 for (i = 0; i < EEPROM_SIZE; i++)
1926                         devpriv->eeprom_data[i] = labpc_eeprom_read(dev, i);
1927         } else
1928                 s->type = COMEDI_SUBD_UNUSED;
1929
1930         return 0;
1931 }
1932 EXPORT_SYMBOL_GPL(labpc_common_attach);
1933
1934 static int labpc_attach(struct comedi_device *dev, struct comedi_devconfig *it)
1935 {
1936         const struct labpc_boardinfo *thisboard = comedi_board(dev);
1937         struct labpc_private *devpriv;
1938         unsigned long iobase = 0;
1939         unsigned int irq = 0;
1940         unsigned int dma_chan = 0;
1941
1942         devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
1943         if (!devpriv)
1944                 return -ENOMEM;
1945         dev->private = devpriv;
1946
1947         /* get base address, irq etc. based on bustype */
1948         switch (thisboard->bustype) {
1949         case isa_bustype:
1950 #ifdef CONFIG_ISA_DMA_API
1951                 iobase = it->options[0];
1952                 irq = it->options[1];
1953                 dma_chan = it->options[2];
1954 #else
1955                 dev_err(dev->class_dev,
1956                         "ni_labpc driver has not been built with ISA DMA support.\n");
1957                 return -EINVAL;
1958 #endif
1959                 break;
1960         case pci_bustype:
1961 #ifdef CONFIG_COMEDI_PCI_DRIVERS
1962                 dev_err(dev->class_dev,
1963                         "manual configuration of PCI board '%s' is not supported\n",
1964                         thisboard->name);
1965                 return -EINVAL;
1966 #else
1967                 dev_err(dev->class_dev,
1968                         "ni_labpc driver has not been built with PCI support.\n");
1969                 return -EINVAL;
1970 #endif
1971                 break;
1972         default:
1973                 dev_err(dev->class_dev,
1974                         "ni_labpc: bug! couldn't determine board type\n");
1975                 return -EINVAL;
1976                 break;
1977         }
1978
1979         return labpc_common_attach(dev, iobase, irq, dma_chan);
1980 }
1981
1982 static const struct labpc_boardinfo *
1983 labpc_pci_find_boardinfo(struct pci_dev *pcidev)
1984 {
1985         unsigned int device_id = pcidev->device;
1986         unsigned int n;
1987
1988         for (n = 0; n < ARRAY_SIZE(labpc_boards); n++) {
1989                 const struct labpc_boardinfo *board = &labpc_boards[n];
1990                 if (board->bustype == pci_bustype &&
1991                     board->device_id == device_id)
1992                         return board;
1993         }
1994         return NULL;
1995 }
1996
1997 static int labpc_auto_attach(struct comedi_device *dev,
1998                                        unsigned long context_unused)
1999 {
2000         struct pci_dev *pcidev = comedi_to_pci_dev(dev);
2001         struct labpc_private *devpriv;
2002         unsigned long iobase;
2003         unsigned int irq;
2004         int ret;
2005
2006         if (!IS_ENABLED(CONFIG_COMEDI_PCI_DRIVERS))
2007                 return -ENODEV;
2008
2009         ret = comedi_pci_enable(dev);
2010         if (ret)
2011                 return ret;
2012
2013         devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
2014         if (!devpriv)
2015                 return -ENOMEM;
2016         dev->private = devpriv;
2017
2018         dev->board_ptr = labpc_pci_find_boardinfo(pcidev);
2019         if (!dev->board_ptr)
2020                 return -ENODEV;
2021         devpriv->mite = mite_alloc(pcidev);
2022         if (!devpriv->mite)
2023                 return -ENOMEM;
2024         ret = mite_setup(devpriv->mite);
2025         if (ret < 0)
2026                 return ret;
2027         iobase = (unsigned long)devpriv->mite->daq_io_addr;
2028         irq = mite_irq(devpriv->mite);
2029         return labpc_common_attach(dev, iobase, irq, 0);
2030 }
2031
2032 void labpc_common_detach(struct comedi_device *dev)
2033 {
2034         const struct labpc_boardinfo *thisboard = comedi_board(dev);
2035         struct labpc_private *devpriv = dev->private;
2036         struct comedi_subdevice *s;
2037
2038         if (!thisboard)
2039                 return;
2040         if (dev->subdevices) {
2041                 s = &dev->subdevices[2];
2042                 subdev_8255_cleanup(dev, s);
2043         }
2044 #ifdef CONFIG_ISA_DMA_API
2045         /* only free stuff if it has been allocated by _attach */
2046         kfree(devpriv->dma_buffer);
2047         if (devpriv->dma_chan)
2048                 free_dma(devpriv->dma_chan);
2049 #endif
2050         if (dev->irq)
2051                 free_irq(dev->irq, dev);
2052         if (thisboard->bustype == isa_bustype && dev->iobase)
2053                 release_region(dev->iobase, LABPC_SIZE);
2054 #ifdef CONFIG_COMEDI_PCI_DRIVERS
2055         if (devpriv->mite) {
2056                 mite_unsetup(devpriv->mite);
2057                 mite_free(devpriv->mite);
2058         }
2059         if (thisboard->bustype == pci_bustype)
2060                 comedi_pci_disable(dev);
2061 #endif
2062 }
2063 EXPORT_SYMBOL_GPL(labpc_common_detach);
2064
2065 static struct comedi_driver labpc_driver = {
2066         .driver_name    = DRV_NAME,
2067         .module         = THIS_MODULE,
2068         .attach         = labpc_attach,
2069         .auto_attach    = labpc_auto_attach,
2070         .detach         = labpc_common_detach,
2071         .num_names      = ARRAY_SIZE(labpc_boards),
2072         .board_name     = &labpc_boards[0].name,
2073         .offset         = sizeof(struct labpc_boardinfo),
2074 };
2075
2076 #ifdef CONFIG_COMEDI_PCI_DRIVERS
2077 static DEFINE_PCI_DEVICE_TABLE(labpc_pci_table) = {
2078         { PCI_DEVICE(PCI_VENDOR_ID_NI, 0x161) },
2079         { 0 }
2080 };
2081 MODULE_DEVICE_TABLE(pci, labpc_pci_table);
2082
2083 static int labpc_pci_probe(struct pci_dev *dev,
2084                            const struct pci_device_id *id)
2085 {
2086         return comedi_pci_auto_config(dev, &labpc_driver, id->driver_data);
2087 }
2088
2089 static struct pci_driver labpc_pci_driver = {
2090         .name           = DRV_NAME,
2091         .id_table       = labpc_pci_table,
2092         .probe          = labpc_pci_probe,
2093         .remove         = comedi_pci_auto_unconfig,
2094 };
2095 module_comedi_pci_driver(labpc_driver, labpc_pci_driver);
2096 #else
2097 module_comedi_driver(labpc_driver);
2098 #endif
2099
2100
2101 MODULE_AUTHOR("Comedi http://www.comedi.org");
2102 MODULE_DESCRIPTION("Comedi low-level driver");
2103 MODULE_LICENSE("GPL");