1 /*======================================================================
3 comedi/drivers/quatech_daqp_cs.c
5 Quatech DAQP PCMCIA data capture cards COMEDI client driver
6 Copyright (C) 2000, 2003 Brent Baccala <baccala@freesoft.org>
7 The DAQP interface code in this file is released into the public domain.
9 COMEDI - Linux Control and Measurement Device Interface
10 Copyright (C) 1998 David A. Schleef <ds@schleef.org>
11 http://www.comedi.org/
13 quatech_daqp_cs.c 1.10
15 Documentation for the DAQP PCMCIA cards can be found on Quatech's site:
17 ftp://ftp.quatech.com/Manuals/daqp-208.pdf
19 This manual is for both the DAQP-208 and the DAQP-308.
26 - ground ref or differential
27 - single-shot and timed both supported
28 - D/A conversion, single-shot
33 - any kind of triggering - external or D/A channel 1
34 - the card's optional expansion board
35 - the card's timer (for anything other than A/D conversion)
36 - D/A update modes other than immediate (i.e, timed)
37 - fancier timing modes
38 - setting card's FIFO buffer thresholds to anything but default
40 ======================================================================*/
43 Driver: quatech_daqp_cs
44 Description: Quatech DAQP PCMCIA data capture cards
45 Author: Brent Baccala <baccala@freesoft.org>
47 Devices: [Quatech] DAQP-208 (daqp), DAQP-308
50 #include "../comedidev.h"
51 #include <linux/semaphore.h>
53 #include <pcmcia/cistpl.h>
54 #include <pcmcia/cisreg.h>
55 #include <pcmcia/ds.h>
57 #include <linux/completion.h>
59 #include "comedi_fc.h"
64 enum { semaphore, buffer } interrupt_mode;
66 struct completion eos;
71 /* The DAQP communicates with the system through a 16 byte I/O window. */
73 #define DAQP_FIFO_SIZE 4096
76 #define DAQP_SCANLIST 1
77 #define DAQP_CONTROL 2
79 #define DAQP_DIGITAL_IO 3
80 #define DAQP_PACER_LOW 4
81 #define DAQP_PACER_MID 5
82 #define DAQP_PACER_HIGH 6
83 #define DAQP_COMMAND 7
88 #define DAQP_SCANLIST_DIFFERENTIAL 0x4000
89 #define DAQP_SCANLIST_GAIN(x) ((x)<<12)
90 #define DAQP_SCANLIST_CHANNEL(x) ((x)<<8)
91 #define DAQP_SCANLIST_START 0x0080
92 #define DAQP_SCANLIST_EXT_GAIN(x) ((x)<<4)
93 #define DAQP_SCANLIST_EXT_CHANNEL(x) (x)
95 #define DAQP_CONTROL_PACER_100kHz 0xc0
96 #define DAQP_CONTROL_PACER_1MHz 0x80
97 #define DAQP_CONTROL_PACER_5MHz 0x40
98 #define DAQP_CONTROL_PACER_EXTERNAL 0x00
99 #define DAQP_CONTORL_EXPANSION 0x20
100 #define DAQP_CONTROL_EOS_INT_ENABLE 0x10
101 #define DAQP_CONTROL_FIFO_INT_ENABLE 0x08
102 #define DAQP_CONTROL_TRIGGER_ONESHOT 0x00
103 #define DAQP_CONTROL_TRIGGER_CONTINUOUS 0x04
104 #define DAQP_CONTROL_TRIGGER_INTERNAL 0x00
105 #define DAQP_CONTROL_TRIGGER_EXTERNAL 0x02
106 #define DAQP_CONTROL_TRIGGER_RISING 0x00
107 #define DAQP_CONTROL_TRIGGER_FALLING 0x01
109 #define DAQP_STATUS_IDLE 0x80
110 #define DAQP_STATUS_RUNNING 0x40
111 #define DAQP_STATUS_EVENTS 0x38
112 #define DAQP_STATUS_DATA_LOST 0x20
113 #define DAQP_STATUS_END_OF_SCAN 0x10
114 #define DAQP_STATUS_FIFO_THRESHOLD 0x08
115 #define DAQP_STATUS_FIFO_FULL 0x04
116 #define DAQP_STATUS_FIFO_NEARFULL 0x02
117 #define DAQP_STATUS_FIFO_EMPTY 0x01
119 #define DAQP_COMMAND_ARM 0x80
120 #define DAQP_COMMAND_RSTF 0x40
121 #define DAQP_COMMAND_RSTQ 0x20
122 #define DAQP_COMMAND_STOP 0x10
123 #define DAQP_COMMAND_LATCH 0x08
124 #define DAQP_COMMAND_100kHz 0x00
125 #define DAQP_COMMAND_50kHz 0x02
126 #define DAQP_COMMAND_25kHz 0x04
127 #define DAQP_COMMAND_FIFO_DATA 0x01
128 #define DAQP_COMMAND_FIFO_PROGRAM 0x00
130 #define DAQP_AUX_TRIGGER_TTL 0x00
131 #define DAQP_AUX_TRIGGER_ANALOG 0x80
132 #define DAQP_AUX_TRIGGER_PRETRIGGER 0x40
133 #define DAQP_AUX_TIMER_INT_ENABLE 0x20
134 #define DAQP_AUX_TIMER_RELOAD 0x00
135 #define DAQP_AUX_TIMER_PAUSE 0x08
136 #define DAQP_AUX_TIMER_GO 0x10
137 #define DAQP_AUX_TIMER_GO_EXTERNAL 0x18
138 #define DAQP_AUX_TIMER_EXTERNAL_SRC 0x04
139 #define DAQP_AUX_TIMER_INTERNAL_SRC 0x00
140 #define DAQP_AUX_DA_DIRECT 0x00
141 #define DAQP_AUX_DA_OVERFLOW 0x01
142 #define DAQP_AUX_DA_EXTERNAL 0x02
143 #define DAQP_AUX_DA_PACER 0x03
145 #define DAQP_AUX_RUNNING 0x80
146 #define DAQP_AUX_TRIGGERED 0x40
147 #define DAQP_AUX_DA_BUFFER 0x20
148 #define DAQP_AUX_TIMER_OVERFLOW 0x10
149 #define DAQP_AUX_CONVERSION 0x08
150 #define DAQP_AUX_DATA_LOST 0x04
151 #define DAQP_AUX_FIFO_NEARFULL 0x02
152 #define DAQP_AUX_FIFO_EMPTY 0x01
154 static const struct comedi_lrange range_daqp_ai = {
163 /* Cancel a running acquisition */
165 static int daqp_ai_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
167 struct daqp_private *devpriv = dev->private;
172 outb(DAQP_COMMAND_STOP, dev->iobase + DAQP_COMMAND);
174 /* flush any linguring data in FIFO - superfluous here */
175 /* outb(DAQP_COMMAND_RSTF, dev->iobase+DAQP_COMMAND); */
177 devpriv->interrupt_mode = semaphore;
184 * Operates in one of two modes. If devpriv->interrupt_mode is
185 * 'semaphore', just signal the devpriv->eos completion and return
186 * (one-shot mode). Otherwise (continuous mode), read data in from
187 * the card, transfer it to the buffer provided by the higher-level
188 * comedi kernel module, and signal various comedi callback routines,
189 * which run pretty quick.
191 static enum irqreturn daqp_interrupt(int irq, void *dev_id)
193 struct comedi_device *dev = dev_id;
194 struct daqp_private *devpriv = dev->private;
195 struct comedi_subdevice *s = dev->read_subdev;
196 int loop_limit = 10000;
202 switch (devpriv->interrupt_mode) {
204 complete(&devpriv->eos);
208 while (!((status = inb(dev->iobase + DAQP_STATUS))
209 & DAQP_STATUS_FIFO_EMPTY)) {
213 if (status & DAQP_STATUS_DATA_LOST) {
215 COMEDI_CB_EOA | COMEDI_CB_OVERFLOW;
216 dev_warn(dev->class_dev, "data lost\n");
217 daqp_ai_cancel(dev, s);
221 data = inb(dev->iobase + DAQP_FIFO);
222 data |= inb(dev->iobase + DAQP_FIFO) << 8;
225 comedi_buf_put(s->async, data);
227 /* If there's a limit, decrement it
228 * and stop conversion if zero
231 if (devpriv->count > 0) {
233 if (devpriv->count == 0) {
234 daqp_ai_cancel(dev, s);
235 s->async->events |= COMEDI_CB_EOA;
240 if ((loop_limit--) <= 0)
244 if (loop_limit <= 0) {
245 dev_warn(dev->class_dev,
246 "loop_limit reached in daqp_interrupt()\n");
247 daqp_ai_cancel(dev, s);
248 s->async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
251 s->async->events |= COMEDI_CB_BLOCK;
253 comedi_event(dev, s);
258 static void daqp_ai_set_one_scanlist_entry(struct comedi_device *dev,
259 unsigned int chanspec,
262 unsigned int chan = CR_CHAN(chanspec);
263 unsigned int range = CR_RANGE(chanspec);
264 unsigned int aref = CR_AREF(chanspec);
267 val = DAQP_SCANLIST_CHANNEL(chan) | DAQP_SCANLIST_GAIN(range);
269 if (aref == AREF_DIFF)
270 val |= DAQP_SCANLIST_DIFFERENTIAL;
273 val |= DAQP_SCANLIST_START;
275 outb(val & 0xff, dev->iobase + DAQP_SCANLIST);
276 outb((val >> 8) & 0xff, dev->iobase + DAQP_SCANLIST);
279 /* One-shot analog data acquisition routine */
281 static int daqp_ai_insn_read(struct comedi_device *dev,
282 struct comedi_subdevice *s,
283 struct comedi_insn *insn, unsigned int *data)
285 struct daqp_private *devpriv = dev->private;
293 /* Stop any running conversion */
294 daqp_ai_cancel(dev, s);
296 outb(0, dev->iobase + DAQP_AUX);
298 /* Reset scan list queue */
299 outb(DAQP_COMMAND_RSTQ, dev->iobase + DAQP_COMMAND);
301 /* Program one scan list entry */
302 daqp_ai_set_one_scanlist_entry(dev, insn->chanspec, 1);
304 /* Reset data FIFO (see page 28 of DAQP User's Manual) */
306 outb(DAQP_COMMAND_RSTF, dev->iobase + DAQP_COMMAND);
310 v = DAQP_CONTROL_TRIGGER_ONESHOT | DAQP_CONTROL_TRIGGER_INTERNAL
311 | DAQP_CONTROL_PACER_100kHz | DAQP_CONTROL_EOS_INT_ENABLE;
313 outb(v, dev->iobase + DAQP_CONTROL);
315 /* Reset any pending interrupts (my card has a tendency to require
316 * require multiple reads on the status register to achieve this)
320 && (inb(dev->iobase + DAQP_STATUS) & DAQP_STATUS_EVENTS))
323 dev_err(dev->class_dev,
324 "couldn't clear interrupts in status register\n");
328 init_completion(&devpriv->eos);
329 devpriv->interrupt_mode = semaphore;
331 for (i = 0; i < insn->n; i++) {
333 /* Start conversion */
334 outb(DAQP_COMMAND_ARM | DAQP_COMMAND_FIFO_DATA,
335 dev->iobase + DAQP_COMMAND);
337 /* Wait for interrupt service routine to unblock completion */
338 /* Maybe could use a timeout here, but it's interruptible */
339 if (wait_for_completion_interruptible(&devpriv->eos))
342 data[i] = inb(dev->iobase + DAQP_FIFO);
343 data[i] |= inb(dev->iobase + DAQP_FIFO) << 8;
350 /* This function converts ns nanoseconds to a counter value suitable
351 * for programming the device. We always use the DAQP's 5 MHz clock,
352 * which with its 24-bit counter, allows values up to 84 seconds.
353 * Also, the function adjusts ns so that it cooresponds to the actual
354 * time that the device will use.
357 static int daqp_ns_to_timer(unsigned int *ns, int round)
367 /* cmdtest tests a particular command to see if it is valid.
368 * Using the cmdtest ioctl, a user can create a valid cmd
369 * and then have it executed by the cmd ioctl.
371 * cmdtest returns 1,2,3,4 or 0, depending on which tests
372 * the command passes.
375 static int daqp_ai_cmdtest(struct comedi_device *dev,
376 struct comedi_subdevice *s, struct comedi_cmd *cmd)
381 /* Step 1 : check if triggers are trivially valid */
383 err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
384 err |= cfc_check_trigger_src(&cmd->scan_begin_src,
385 TRIG_TIMER | TRIG_FOLLOW);
386 err |= cfc_check_trigger_src(&cmd->convert_src,
387 TRIG_TIMER | TRIG_NOW);
388 err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
389 err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
394 /* Step 2a : make sure trigger sources are unique */
396 err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
397 err |= cfc_check_trigger_is_unique(cmd->convert_src);
398 err |= cfc_check_trigger_is_unique(cmd->stop_src);
400 /* Step 2b : and mutually compatible */
405 /* Step 3: check if arguments are trivially valid */
407 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
409 #define MAX_SPEED 10000 /* 100 kHz - in nanoseconds */
411 if (cmd->scan_begin_src == TRIG_TIMER)
412 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
415 /* If both scan_begin and convert are both timer values, the only
416 * way that can make sense is if the scan time is the number of
417 * conversions times the convert time
420 if (cmd->scan_begin_src == TRIG_TIMER && cmd->convert_src == TRIG_TIMER
421 && cmd->scan_begin_arg != cmd->convert_arg * cmd->scan_end_arg) {
425 if (cmd->convert_src == TRIG_TIMER)
426 err |= cfc_check_trigger_arg_min(&cmd->convert_arg, MAX_SPEED);
428 err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
430 if (cmd->stop_src == TRIG_COUNT)
431 err |= cfc_check_trigger_arg_max(&cmd->stop_arg, 0x00ffffff);
433 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
438 /* step 4: fix up any arguments */
440 if (cmd->scan_begin_src == TRIG_TIMER) {
441 tmp = cmd->scan_begin_arg;
442 daqp_ns_to_timer(&cmd->scan_begin_arg,
443 cmd->flags & TRIG_ROUND_MASK);
444 if (tmp != cmd->scan_begin_arg)
448 if (cmd->convert_src == TRIG_TIMER) {
449 tmp = cmd->convert_arg;
450 daqp_ns_to_timer(&cmd->convert_arg,
451 cmd->flags & TRIG_ROUND_MASK);
452 if (tmp != cmd->convert_arg)
462 static int daqp_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
464 struct daqp_private *devpriv = dev->private;
465 struct comedi_cmd *cmd = &s->async->cmd;
467 int scanlist_start_on_every_entry;
476 /* Stop any running conversion */
477 daqp_ai_cancel(dev, s);
479 outb(0, dev->iobase + DAQP_AUX);
481 /* Reset scan list queue */
482 outb(DAQP_COMMAND_RSTQ, dev->iobase + DAQP_COMMAND);
484 /* Program pacer clock
486 * There's two modes we can operate in. If convert_src is
487 * TRIG_TIMER, then convert_arg specifies the time between
488 * each conversion, so we program the pacer clock to that
489 * frequency and set the SCANLIST_START bit on every scanlist
490 * entry. Otherwise, convert_src is TRIG_NOW, which means
491 * we want the fastest possible conversions, scan_begin_src
492 * is TRIG_TIMER, and scan_begin_arg specifies the time between
493 * each scan, so we program the pacer clock to this frequency
494 * and only set the SCANLIST_START bit on the first entry.
497 if (cmd->convert_src == TRIG_TIMER) {
498 counter = daqp_ns_to_timer(&cmd->convert_arg,
499 cmd->flags & TRIG_ROUND_MASK);
500 outb(counter & 0xff, dev->iobase + DAQP_PACER_LOW);
501 outb((counter >> 8) & 0xff, dev->iobase + DAQP_PACER_MID);
502 outb((counter >> 16) & 0xff, dev->iobase + DAQP_PACER_HIGH);
503 scanlist_start_on_every_entry = 1;
505 counter = daqp_ns_to_timer(&cmd->scan_begin_arg,
506 cmd->flags & TRIG_ROUND_MASK);
507 outb(counter & 0xff, dev->iobase + DAQP_PACER_LOW);
508 outb((counter >> 8) & 0xff, dev->iobase + DAQP_PACER_MID);
509 outb((counter >> 16) & 0xff, dev->iobase + DAQP_PACER_HIGH);
510 scanlist_start_on_every_entry = 0;
513 /* Program scan list */
514 for (i = 0; i < cmd->chanlist_len; i++) {
515 int start = (i == 0 || scanlist_start_on_every_entry);
517 daqp_ai_set_one_scanlist_entry(dev, cmd->chanlist[i], start);
520 /* Now it's time to program the FIFO threshold, basically the
521 * number of samples the card will buffer before it interrupts
524 * If we don't have a stop count, then use half the size of
525 * the FIFO (the manufacturer's recommendation). Consider
526 * that the FIFO can hold 2K samples (4K bytes). With the
527 * threshold set at half the FIFO size, we have a margin of
528 * error of 1024 samples. At the chip's maximum sample rate
529 * of 100,000 Hz, the CPU would have to delay interrupt
530 * service for a full 10 milliseconds in order to lose data
531 * here (as opposed to higher up in the kernel). I've never
532 * seen it happen. However, for slow sample rates it may
533 * buffer too much data and introduce too much delay for the
536 * If we have a stop count, then things get more interesting.
537 * If the stop count is less than the FIFO size (actually
538 * three-quarters of the FIFO size - see below), we just use
539 * the stop count itself as the threshold, the card interrupts
540 * us when that many samples have been taken, and we kill the
541 * acquisition at that point and are done. If the stop count
542 * is larger than that, then we divide it by 2 until it's less
543 * than three quarters of the FIFO size (we always leave the
544 * top quarter of the FIFO as protection against sluggish CPU
545 * interrupt response) and use that as the threshold. So, if
546 * the stop count is 4000 samples, we divide by two twice to
547 * get 1000 samples, use that as the threshold, take four
548 * interrupts to get our 4000 samples and are done.
550 * The algorithm could be more clever. For example, if 81000
551 * samples are requested, we could set the threshold to 1500
552 * samples and take 54 interrupts to get 81000. But 54 isn't
553 * a power of two, so this algorithm won't find that option.
554 * Instead, it'll set the threshold at 1266 and take 64
555 * interrupts to get 81024 samples, of which the last 24 will
556 * be discarded... but we won't get the last interrupt until
557 * they've been collected. To find the first option, the
558 * computer could look at the prime decomposition of the
559 * sample count (81000 = 3^4 * 5^3 * 2^3) and factor it into a
560 * threshold (1500 = 3 * 5^3 * 2^2) and an interrupt count (54
561 * = 3^3 * 2). Hmmm... a one-line while loop or prime
562 * decomposition of integers... I'll leave it the way it is.
564 * I'll also note a mini-race condition before ignoring it in
565 * the code. Let's say we're taking 4000 samples, as before.
566 * After 1000 samples, we get an interrupt. But before that
567 * interrupt is completely serviced, another sample is taken
568 * and loaded into the FIFO. Since the interrupt handler
569 * empties the FIFO before returning, it will read 1001 samples.
570 * If that happens four times, we'll end up taking 4004 samples,
571 * not 4000. The interrupt handler will discard the extra four
572 * samples (by halting the acquisition with four samples still
573 * in the FIFO), but we will have to wait for them.
575 * In short, this code works pretty well, but for either of
576 * the two reasons noted, might end up waiting for a few more
577 * samples than actually requested. Shouldn't make too much
581 /* Save away the number of conversions we should perform, and
582 * compute the FIFO threshold (in bytes, not samples - that's
583 * why we multiple devpriv->count by 2 = sizeof(sample))
586 if (cmd->stop_src == TRIG_COUNT) {
587 devpriv->count = cmd->stop_arg * cmd->scan_end_arg;
588 threshold = 2 * devpriv->count;
589 while (threshold > DAQP_FIFO_SIZE * 3 / 4)
593 threshold = DAQP_FIFO_SIZE / 2;
596 /* Reset data FIFO (see page 28 of DAQP User's Manual) */
598 outb(DAQP_COMMAND_RSTF, dev->iobase + DAQP_COMMAND);
600 /* Set FIFO threshold. First two bytes are near-empty
601 * threshold, which is unused; next two bytes are near-full
602 * threshold. We computed the number of bytes we want in the
603 * FIFO when the interrupt is generated, what the card wants
604 * is actually the number of available bytes left in the FIFO
605 * when the interrupt is to happen.
608 outb(0x00, dev->iobase + DAQP_FIFO);
609 outb(0x00, dev->iobase + DAQP_FIFO);
611 outb((DAQP_FIFO_SIZE - threshold) & 0xff, dev->iobase + DAQP_FIFO);
612 outb((DAQP_FIFO_SIZE - threshold) >> 8, dev->iobase + DAQP_FIFO);
616 v = DAQP_CONTROL_TRIGGER_CONTINUOUS | DAQP_CONTROL_TRIGGER_INTERNAL
617 | DAQP_CONTROL_PACER_5MHz | DAQP_CONTROL_FIFO_INT_ENABLE;
619 outb(v, dev->iobase + DAQP_CONTROL);
621 /* Reset any pending interrupts (my card has a tendency to require
622 * require multiple reads on the status register to achieve this)
626 && (inb(dev->iobase + DAQP_STATUS) & DAQP_STATUS_EVENTS))
629 dev_err(dev->class_dev,
630 "couldn't clear interrupts in status register\n");
634 devpriv->interrupt_mode = buffer;
636 /* Start conversion */
637 outb(DAQP_COMMAND_ARM | DAQP_COMMAND_FIFO_DATA,
638 dev->iobase + DAQP_COMMAND);
643 static int daqp_ao_insn_write(struct comedi_device *dev,
644 struct comedi_subdevice *s,
645 struct comedi_insn *insn,
648 struct daqp_private *devpriv = dev->private;
649 unsigned int chan = CR_CHAN(insn->chanspec);
656 /* Make sure D/A update mode is direct update */
657 outb(0, dev->iobase + DAQP_AUX);
659 for (i = 0; i > insn->n; i++) {
662 val ^= 0x0800; /* Flip the sign */
665 outw(val, dev->iobase + DAQP_DA);
671 static int daqp_di_insn_bits(struct comedi_device *dev,
672 struct comedi_subdevice *s,
673 struct comedi_insn *insn,
676 struct daqp_private *devpriv = dev->private;
681 data[0] = inb(dev->iobase + DAQP_DIGITAL_IO);
686 static int daqp_do_insn_bits(struct comedi_device *dev,
687 struct comedi_subdevice *s,
688 struct comedi_insn *insn,
691 struct daqp_private *devpriv = dev->private;
692 unsigned int mask = data[0];
693 unsigned int bits = data[1];
700 s->state |= (bits & mask);
702 outb(s->state, dev->iobase + DAQP_DIGITAL_IO);
710 static int daqp_auto_attach(struct comedi_device *dev,
711 unsigned long context)
713 struct pcmcia_device *link = comedi_to_pcmcia_dev(dev);
714 struct daqp_private *devpriv;
715 struct comedi_subdevice *s;
718 devpriv = kzalloc(sizeof(*devpriv), GFP_KERNEL);
721 dev->private = devpriv;
723 link->config_flags |= CONF_AUTO_SET_IO | CONF_ENABLE_IRQ;
724 ret = comedi_pcmcia_enable(dev, NULL);
727 dev->iobase = link->resource[0]->start;
730 ret = pcmcia_request_irq(link, daqp_interrupt);
734 ret = comedi_alloc_subdevices(dev, 4);
738 s = &dev->subdevices[0];
739 dev->read_subdev = s;
740 s->type = COMEDI_SUBD_AI;
741 s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_DIFF | SDF_CMD_READ;
743 s->len_chanlist = 2048;
745 s->range_table = &range_daqp_ai;
746 s->insn_read = daqp_ai_insn_read;
747 s->do_cmdtest = daqp_ai_cmdtest;
748 s->do_cmd = daqp_ai_cmd;
749 s->cancel = daqp_ai_cancel;
751 s = &dev->subdevices[1];
752 s->type = COMEDI_SUBD_AO;
753 s->subdev_flags = SDF_WRITEABLE;
756 s->range_table = &range_bipolar5;
757 s->insn_write = daqp_ao_insn_write;
759 s = &dev->subdevices[2];
760 s->type = COMEDI_SUBD_DI;
761 s->subdev_flags = SDF_READABLE;
764 s->insn_bits = daqp_di_insn_bits;
766 s = &dev->subdevices[3];
767 s->type = COMEDI_SUBD_DO;
768 s->subdev_flags = SDF_WRITEABLE;
771 s->insn_bits = daqp_do_insn_bits;
776 static struct comedi_driver driver_daqp = {
777 .driver_name = "quatech_daqp_cs",
778 .module = THIS_MODULE,
779 .auto_attach = daqp_auto_attach,
780 .detach = comedi_pcmcia_disable,
783 static int daqp_cs_suspend(struct pcmcia_device *link)
785 struct comedi_device *dev = link->priv;
786 struct daqp_private *devpriv = dev ? dev->private : NULL;
788 /* Mark the device as stopped, to block IO until later */
795 static int daqp_cs_resume(struct pcmcia_device *link)
797 struct comedi_device *dev = link->priv;
798 struct daqp_private *devpriv = dev ? dev->private : NULL;
806 static int daqp_cs_attach(struct pcmcia_device *link)
808 return comedi_pcmcia_auto_config(link, &driver_daqp);
811 static const struct pcmcia_device_id daqp_cs_id_table[] = {
812 PCMCIA_DEVICE_MANF_CARD(0x0137, 0x0027),
815 MODULE_DEVICE_TABLE(pcmcia, daqp_cs_id_table);
817 static struct pcmcia_driver daqp_cs_driver = {
818 .name = "quatech_daqp_cs",
819 .owner = THIS_MODULE,
820 .id_table = daqp_cs_id_table,
821 .probe = daqp_cs_attach,
822 .remove = comedi_pcmcia_auto_unconfig,
823 .suspend = daqp_cs_suspend,
824 .resume = daqp_cs_resume,
826 module_comedi_pcmcia_driver(driver_daqp, daqp_cs_driver);
828 MODULE_DESCRIPTION("Comedi driver for Quatech DAQP PCMCIA data capture cards");
829 MODULE_AUTHOR("Brent Baccala <baccala@freesoft.org>");
830 MODULE_LICENSE("GPL");