2 * Copyright 2003 Digi International (www.digi.com)
3 * Scott H Kilau <Scott_Kilau at digi dot com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2, or (at your option)
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
12 * implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
13 * PURPOSE. See the GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 * NOTE: THIS IS A SHARED HEADER. DO NOT CHANGE CODING STYLE!!!
21 *************************************************************************
25 *************************************************************************/
27 #ifndef __DGAP_DRIVER_H
28 #define __DGAP_DRIVER_H
30 #include <linux/types.h> /* To pick up the varions Linux types */
31 #include <linux/tty.h> /* To pick up the various tty structs/defines */
32 #include <linux/interrupt.h> /* For irqreturn_t type */
42 /* Required for our shared headers! */
43 typedef unsigned char uchar;
45 #if !defined(TTY_FLIPBUF_SIZE)
46 # define TTY_FLIPBUF_SIZE 512
55 # define __chk_user_ptr(x) (void)0
59 # define PARM_STR(VAR, INIT, PERM, DESC) \
60 static char *VAR = INIT; \
62 module_param(VAR, charp, PERM); \
63 MODULE_PARM_DESC(VAR, DESC);
65 # define PARM_INT(VAR, INIT, PERM, DESC) \
66 static int VAR = INIT; \
68 module_param(VAR, int, PERM); \
69 MODULE_PARM_DESC(VAR, DESC);
71 # define PARM_ULONG(VAR, INIT, PERM, DESC) \
72 static ulong VAR = INIT; \
74 module_param(VAR, long, PERM); \
75 MODULE_PARM_DESC(VAR, DESC);
77 /*************************************************************************
81 *************************************************************************/
84 * Driver identification, error and debugging statments
86 * In theory, you can change all occurrences of "digi" in the next
87 * three lines, and the driver printk's will all automagically change.
89 * APR((fmt, args, ...)); Always prints message
90 * DPR((fmt, args, ...)); Only prints if DGAP_TRACER is defined at
91 * compile time and dgap_debug!=0
93 #define DG_NAME "dgap-1.3-16"
94 #define DG_PART "40002347_C"
96 #define PROCSTR "dgap" /* /proc entries */
97 #define DEVSTR "/dev/dg/dgap" /* /dev entries */
98 #define DRVSTR "dgap" /* Driver name string
100 #define APR(args) do { PRINTF_TO_KMEM(args); printk(DRVSTR": "); printk args; \
102 #define RAPR(args) do { PRINTF_TO_KMEM(args); printk args; } while (0)
104 #define TRC_TO_CONSOLE 1
107 * defines from dgap_pci.h
109 #define PCIMAX 32 /* maximum number of PCI boards */
111 #define DIGI_VID 0x114F
113 #define PCI_DEVICE_EPC_DID 0x0002
114 #define PCI_DEVICE_XEM_DID 0x0004
115 #define PCI_DEVICE_XR_DID 0x0005
116 #define PCI_DEVICE_CX_DID 0x0006
117 #define PCI_DEVICE_XRJ_DID 0x0009 /* PLX-based Xr adapter */
118 #define PCI_DEVICE_XR_IBM_DID 0x0011 /* IBM 8-port Async Adapter */
119 #define PCI_DEVICE_XR_BULL_DID 0x0013 /* BULL 8-port Async Adapter */
120 #define PCI_DEVICE_XR_SAIP_DID 0x001c /* SAIP card - Xr adapter */
121 #define PCI_DEVICE_XR_422_DID 0x0012 /* Xr-422 */
122 #define PCI_DEVICE_920_2_DID 0x0034 /* XR-Plus 920 K, 2 port */
123 #define PCI_DEVICE_920_4_DID 0x0026 /* XR-Plus 920 K, 4 port */
124 #define PCI_DEVICE_920_8_DID 0x0027 /* XR-Plus 920 K, 8 port */
125 #define PCI_DEVICE_EPCJ_DID 0x000a /* PLX 9060 chip for PCI */
126 #define PCI_DEVICE_CX_IBM_DID 0x001b /* IBM 128-port Async Adapter */
127 #define PCI_DEVICE_920_8_HP_DID 0x0058 /* HP XR-Plus 920 K, 8 port */
128 #define PCI_DEVICE_XEM_HP_DID 0x0059 /* HP Xem PCI */
130 #define PCI_DEVICE_XEM_NAME "AccelePort XEM"
131 #define PCI_DEVICE_CX_NAME "AccelePort CX"
132 #define PCI_DEVICE_XR_NAME "AccelePort Xr"
133 #define PCI_DEVICE_XRJ_NAME "AccelePort Xr (PLX)"
134 #define PCI_DEVICE_XR_SAIP_NAME "AccelePort Xr (SAIP)"
135 #define PCI_DEVICE_920_2_NAME "AccelePort Xr920 2 port"
136 #define PCI_DEVICE_920_4_NAME "AccelePort Xr920 4 port"
137 #define PCI_DEVICE_920_8_NAME "AccelePort Xr920 8 port"
138 #define PCI_DEVICE_XR_422_NAME "AccelePort Xr 422"
139 #define PCI_DEVICE_EPCJ_NAME "AccelePort EPC (PLX)"
140 #define PCI_DEVICE_XR_BULL_NAME "AccelePort Xr (BULL)"
141 #define PCI_DEVICE_XR_IBM_NAME "AccelePort Xr (IBM)"
142 #define PCI_DEVICE_CX_IBM_NAME "AccelePort CX (IBM)"
143 #define PCI_DEVICE_920_8_HP_NAME "AccelePort Xr920 8 port (HP)"
144 #define PCI_DEVICE_XEM_HP_NAME "AccelePort XEM (HP)"
147 * On the PCI boards, there is no IO space allocated
148 * The I/O registers will be in the first 3 bytes of the
149 * upper 2MB of the 4MB memory space. The board memory
150 * will be mapped into the low 2MB of the 4MB memory space
153 /* Potential location of PCI Bios from E0000 to FFFFF*/
154 #define PCI_BIOS_SIZE 0x00020000
156 /* Size of Memory and I/O for PCI (4MB) */
157 #define PCI_RAM_SIZE 0x00400000
159 /* Size of Memory (2MB) */
160 #define PCI_MEM_SIZE 0x00200000
162 /* Max PCI Window Size (2MB) */
163 #define PCI_WIN_SIZE 0x00200000
165 #define PCI_WIN_SHIFT 21 /* 21 bits max */
167 /* Offset of I/0 in Memory (2MB) */
168 #define PCI_IO_OFFSET 0x00200000
170 /* Size of IO (2MB) */
171 #define PCI_IO_SIZE 0x00200000
174 * Debugging levels can be set using debug insmod variable
175 * They can also be compiled out completely.
178 #define DBG_INIT (dgap_debug & 0x01)
179 #define DBG_BASIC (dgap_debug & 0x02)
180 #define DBG_CORE (dgap_debug & 0x04)
182 #define DBG_OPEN (dgap_debug & 0x08)
183 #define DBG_CLOSE (dgap_debug & 0x10)
184 #define DBG_READ (dgap_debug & 0x20)
185 #define DBG_WRITE (dgap_debug & 0x40)
187 #define DBG_IOCTL (dgap_debug & 0x80)
189 #define DBG_PROC (dgap_debug & 0x100)
190 #define DBG_PARAM (dgap_debug & 0x200)
191 #define DBG_PSCAN (dgap_debug & 0x400)
192 #define DBG_EVENT (dgap_debug & 0x800)
194 #define DBG_DRAIN (dgap_debug & 0x1000)
195 #define DBG_CARR (dgap_debug & 0x2000)
197 #define DBG_MGMT (dgap_debug & 0x4000)
200 #if defined(DGAP_TRACER)
202 # if defined(TRC_TO_KMEM)
204 # define TRC_ON_OVERFLOW_WRAP_AROUND
205 # undef TRC_ON_OVERFLOW_SHIFT_BUFFER
206 # endif //TRC_TO_KMEM
208 # define TRC_MAXMSG 1024
209 # define TRC_OVERFLOW "(OVERFLOW)"
210 # define TRC_DTRC "/usr/bin/dtrc"
212 #if defined TRC_TO_CONSOLE
213 #define PRINTF_TO_CONSOLE(args) { printk(DRVSTR": "); printk args; }
214 #else //!defined TRACE_TO_CONSOLE
215 #define PRINTF_TO_CONSOLE(args)
218 #if defined TRC_TO_KMEM
219 #define PRINTF_TO_KMEM(args) dgap_tracef args
220 #else //!defined TRC_TO_KMEM
221 #define PRINTF_TO_KMEM(args)
224 #define TRC(args) { PRINTF_TO_KMEM(args); PRINTF_TO_CONSOLE(args) }
226 # define DPR_INIT(ARGS) if (DBG_INIT) TRC(ARGS)
227 # define DPR_BASIC(ARGS) if (DBG_BASIC) TRC(ARGS)
228 # define DPR_CORE(ARGS) if (DBG_CORE) TRC(ARGS)
229 # define DPR_OPEN(ARGS) if (DBG_OPEN) TRC(ARGS)
230 # define DPR_CLOSE(ARGS) if (DBG_CLOSE) TRC(ARGS)
231 # define DPR_READ(ARGS) if (DBG_READ) TRC(ARGS)
232 # define DPR_WRITE(ARGS) if (DBG_WRITE) TRC(ARGS)
233 # define DPR_IOCTL(ARGS) if (DBG_IOCTL) TRC(ARGS)
234 # define DPR_PROC(ARGS) if (DBG_PROC) TRC(ARGS)
235 # define DPR_PARAM(ARGS) if (DBG_PARAM) TRC(ARGS)
236 # define DPR_PSCAN(ARGS) if (DBG_PSCAN) TRC(ARGS)
237 # define DPR_EVENT(ARGS) if (DBG_EVENT) TRC(ARGS)
238 # define DPR_DRAIN(ARGS) if (DBG_DRAIN) TRC(ARGS)
239 # define DPR_CARR(ARGS) if (DBG_CARR) TRC(ARGS)
240 # define DPR_MGMT(ARGS) if (DBG_MGMT) TRC(ARGS)
242 # define DPR(ARGS) if (dgap_debug) TRC(ARGS)
243 # define P(X) dgap_tracef(#X "=%p\n", X)
244 # define X(X) dgap_tracef(#X "=%x\n", X)
246 #else//!defined DGAP_TRACER
248 #define PRINTF_TO_KMEM(args)
250 # define DPR_INIT(ARGS)
251 # define DPR_BASIC(ARGS)
252 # define DPR_CORE(ARGS)
253 # define DPR_OPEN(ARGS)
254 # define DPR_CLOSE(ARGS)
255 # define DPR_READ(ARGS)
256 # define DPR_WRITE(ARGS)
257 # define DPR_IOCTL(ARGS)
258 # define DPR_PROC(ARGS)
259 # define DPR_PARAM(ARGS)
260 # define DPR_PSCAN(ARGS)
261 # define DPR_EVENT(ARGS)
262 # define DPR_DRAIN(ARGS)
263 # define DPR_CARR(ARGS)
264 # define DPR_MGMT(ARGS)
270 /* Number of boards we support at once. */
273 #define MAXTTYNAMELEN 200
275 /* Our 3 magic numbers for our board, channel and unit structs */
276 #define DGAP_BOARD_MAGIC 0x5c6df104
277 #define DGAP_CHANNEL_MAGIC 0x6c6df104
278 #define DGAP_UNIT_MAGIC 0x7c6df104
280 /* Serial port types */
281 #define DGAP_SERIAL 0
284 #define SERIAL_TYPE_NORMAL 1
286 /* 4 extra for alignment play space */
287 #define WRITEBUFLEN ((4096) + 4)
288 #define MYFLIPLEN N_TTY_BUF_SIZE
290 #define SBREAK_TIME 0x25
291 #define U2BSIZE 0x400
293 #define dgap_jiffies_from_ms(a) (((a) * HZ) / 1000)
296 * Our major for the mgmt devices.
298 * We can use 22, because Digi was allocated 22 and 23 for the epca driver.
299 * 22 has now become obsolete now that the "cu" devices have
300 * been removed from 2.6.
301 * Also, this *IS* the epca driver, just PCI only now.
303 #ifndef DIGI_DGAP_MAJOR
304 # define DIGI_DGAP_MAJOR 22
308 * The parameters we use to define the periods of the moving averages.
310 #define MA_PERIOD (HZ / 10)
311 #define SMA_DUR (1 * HZ)
312 #define EMA_DUR (1 * HZ)
313 #define SMA_NPERIODS (SMA_DUR / MA_PERIOD)
314 #define EMA_NPERIODS (EMA_DUR / MA_PERIOD)
317 * Define a local default termios struct. All ports will be created
318 * with this termios initially. This is the same structure that is defined
319 * as the default in tty_io.c with the same settings overriden as in serial.c
321 * In short, this should match the internal serial ports' defaults.
323 #define DEFAULT_IFLAGS (ICRNL | IXON)
324 #define DEFAULT_OFLAGS (OPOST | ONLCR)
325 #define DEFAULT_CFLAGS (B9600 | CS8 | CREAD | HUPCL | CLOCAL)
326 #define DEFAULT_LFLAGS (ISIG | ICANON | ECHO | ECHOE | ECHOK | \
327 ECHOCTL | ECHOKE | IEXTEN)
329 #ifndef _POSIX_VDISABLE
330 #define _POSIX_VDISABLE '\0'
333 #define SNIFF_MAX 65536 /* Sniff buffer size (2^n) */
334 #define SNIFF_MASK (SNIFF_MAX - 1) /* Sniff wrap mask */
336 #define VPDSIZE (512)
339 * Lock function/defines.
340 * Makes spotting lock/unlock locations easier.
342 # define DGAP_SPINLOCK_INIT(x) spin_lock_init(&(x))
343 # define DGAP_LOCK(x,y) spin_lock_irqsave(&(x), y)
344 # define DGAP_UNLOCK(x,y) spin_unlock_irqrestore(&(x), y)
345 # define DGAP_TRYLOCK(x,y) spin_trylock(&(x))
347 /************************************************************************
349 ************************************************************************/
350 #define START 0x0004L /* Execution start address */
352 #define CMDBUF 0x0d10L /* Command (cm_t) structure offset */
353 #define CMDSTART 0x0400L /* Start of command buffer */
354 #define CMDMAX 0x0800L /* End of command buffer */
356 #define EVBUF 0x0d18L /* Event (ev_t) structure */
357 #define EVSTART 0x0800L /* Start of event buffer */
358 #define EVMAX 0x0c00L /* End of event buffer */
359 #define FEP5_PLUS 0x0E40 /* ASCII '5' and ASCII 'A' is here */
360 #define ECS_SEG 0x0E44 /* Segment of the extended channel structure */
361 #define LINE_SPEED 0x10 /* Offset into ECS_SEG for line speed */
362 /* if the fep has extended capabilities */
364 /* BIOS MAGIC SPOTS */
365 #define ERROR 0x0C14L /* BIOS error code */
366 #define SEQUENCE 0x0C12L /* BIOS sequence indicator */
367 #define POSTAREA 0x0C00L /* POST complete message area */
369 /* FEP MAGIC SPOTS */
370 #define FEPSTAT POSTAREA /* OS here when FEP comes up */
371 #define NCHAN 0x0C02L /* number of ports FEP sees */
372 #define PANIC 0x0C10L /* PANIC area for FEP */
373 #define KMEMEM 0x0C30L /* Memory for KME use */
374 #define CONFIG 0x0CD0L /* Concentrator configuration info */
375 #define CONFIGSIZE 0x0030 /* configuration info size */
376 #define DOWNREQ 0x0D00 /* Download request buffer pointer */
378 #define CHANBUF 0x1000L /* Async channel (bs_t) structs */
379 #define FEPOSSIZE 0x1FFF /* 8K FEPOS */
381 #define XEMPORTS 0xC02 /*
382 * Offset in board memory where FEP5 stores
383 * how many ports it has detected.
384 * NOTE: FEP5 reports 64 ports when the user
385 * has the cable in EBI OUT instead of EBI IN.
395 #define LOWMEM 0x0100
396 #define HIGHMEM 0x7f00
398 #define FEPTIMEOUT 200000
400 #define ENABLE_INTR 0x0e04 /* Enable interrupts flag */
401 #define FEPPOLL_MIN 1 /* minimum of 1 millisecond */
402 #define FEPPOLL_MAX 20 /* maximum of 20 milliseconds */
403 #define FEPPOLL 0x0c26 /* Fep event poll interval */
405 #define IALTPIN 0x0080 /* Input flag to swap DSR <-> DCD */
407 /************************************************************************
408 * FEP supported functions
409 ************************************************************************/
410 #define SRLOW 0xe0 /* Set receive low water */
411 #define SRHIGH 0xe1 /* Set receive high water */
412 #define FLUSHTX 0xe2 /* Flush transmit buffer */
413 #define PAUSETX 0xe3 /* Pause data transmission */
414 #define RESUMETX 0xe4 /* Resume data transmission */
415 #define SMINT 0xe5 /* Set Modem Interrupt */
416 #define SAFLOWC 0xe6 /* Set Aux. flow control chars */
417 #define SBREAK 0xe8 /* Send break */
418 #define SMODEM 0xe9 /* Set 8530 modem control lines */
419 #define SIFLAG 0xea /* Set UNIX iflags */
420 #define SFLOWC 0xeb /* Set flow control characters */
421 #define STLOW 0xec /* Set transmit low water mark */
422 #define RPAUSE 0xee /* Pause receive */
423 #define RRESUME 0xef /* Resume receive */
424 #define CHRESET 0xf0 /* Reset Channel */
425 #define BUFSETALL 0xf2 /* Set Tx & Rx buffer size avail*/
426 #define SOFLAG 0xf3 /* Set UNIX oflags */
427 #define SHFLOW 0xf4 /* Set hardware handshake */
428 #define SCFLAG 0xf5 /* Set UNIX cflags */
429 #define SVNEXT 0xf6 /* Set VNEXT character */
430 #define SPINTFC 0xfc /* Reserved */
431 #define SCOMMODE 0xfd /* Set RS232/422 mode */
434 /************************************************************************
436 ************************************************************************/
437 #define MODE_232 0x00
438 #define MODE_422 0x01
441 /************************************************************************
443 ************************************************************************/
444 #define IFBREAK 0x01 /* Break received */
445 #define IFTLW 0x02 /* Transmit low water */
446 #define IFTEM 0x04 /* Transmitter empty */
447 #define IFDATA 0x08 /* Receive data present */
448 #define IFMODEM 0x20 /* Modem status change */
450 /************************************************************************
452 ************************************************************************/
453 # define DM_RTS 0x02 /* Request to send */
454 # define DM_CD 0x80 /* Carrier detect */
455 # define DM_DSR 0x20 /* Data set ready */
456 # define DM_CTS 0x10 /* Clear to send */
457 # define DM_RI 0x40 /* Ring indicator */
458 # define DM_DTR 0x01 /* Data terminal ready */
461 * defines from dgap_conf.h
463 #define NULLNODE 0 /* header node, not used */
464 #define BNODE 1 /* Board node */
465 #define LNODE 2 /* Line node */
466 #define CNODE 3 /* Concentrator node */
467 #define MNODE 4 /* EBI Module node */
468 #define TNODE 5 /* tty name prefix node */
469 #define CUNODE 6 /* cu name prefix (non-SCO) */
470 #define PNODE 7 /* trans. print prefix node */
471 #define JNODE 8 /* maJor number node */
472 #define ANODE 9 /* altpin */
473 #define TSNODE 10 /* tty structure size */
474 #define CSNODE 11 /* channel structure size */
475 #define BSNODE 12 /* board structure size */
476 #define USNODE 13 /* unit schedule structure size */
477 #define FSNODE 14 /* f2200 structure size */
478 #define VSNODE 15 /* size of VPIX structures */
479 #define INTRNODE 16 /* enable interrupt */
481 /* Enumeration of tokens */
486 #define EPCFS 11 /* start of EPC family definitions */
503 #define EPCFE 25 /* end of EPC family definitions */
514 #define AVANFS 42 /* start of Avanstar family definitions */
517 #define AVANFE 43 /* end of Avanstar family definitions */
519 #define DA2000FS 44 /* start of AccelePort 2000 family definitions */
520 #define DA22 44 /* AccelePort 2002 */
521 #define DA24 45 /* AccelePort 2004 */
522 #define DA28 46 /* AccelePort 2008 */
523 #define DA216 47 /* AccelePort 2016 */
524 #define DAR4 48 /* AccelePort RAS 4 port */
525 #define DAR8 49 /* AccelePort RAS 8 port */
526 #define DDR24 50 /* DataFire RAS 24 port */
527 #define DDR30 51 /* DataFire RAS 30 port */
528 #define DDR48 52 /* DataFire RAS 48 port */
529 #define DDR60 53 /* DataFire RAS 60 port */
530 #define DA2000FE 53 /* end of AccelePort 2000/RAS family definitions */
532 #define PCXRFS 106 /* start of PCXR family definitions */
537 #define APORT4_920I 110
538 #define APORT8_920I 111
539 #define APORT4_920P 112
540 #define APORT8_920P 113
541 #define APORT2_920P 114
542 #define PCXRFE 117 /* end of PCXR family definitions */
559 /* The following tokens can appear in multiple places */
586 #define TOTAL_BOARD 2
587 #define CURRENT_BRD 4
590 #define MEM_ADDRESS 10
592 #define FIELDS_PER_PAGE 18
605 #define MAX_FIELD 512
617 #define ONETONINE "123456789"
618 #define ALL "1234567890"
621 * All the possible states the driver can be while being loaded.
624 DRIVER_INITIALIZED = 0,
625 DRIVER_NEED_CONFIG_LOAD,
626 DRIVER_REQUESTED_CONFIG,
631 * All the possible states the board can be while booting up.
641 NEED_DEVICE_CREATION,
642 REQUESTED_DEVICE_CREATION,
643 FINISHED_DEVICE_CREATION,
653 FINISHED_PROC_CREATION,
658 * All the possible states that a requested concentrator image can be in.
661 NO_PENDING_CONCENTRATOR_REQUESTS = 0,
663 REQUESTED_CONCENTRATOR
669 * Modem line constants are defined as macros because DSR and
670 * DCD are swapable using the ditty altpin option.
672 #define D_CD(ch) ch->ch_cd /* Carrier detect */
673 #define D_DSR(ch) ch->ch_dsr /* Data set ready */
674 #define D_RTS(ch) DM_RTS /* Request to send */
675 #define D_CTS(ch) DM_CTS /* Clear to send */
676 #define D_RI(ch) DM_RI /* Ring indicator */
677 #define D_DTR(ch) DM_DTR /* Data terminal ready */
680 /*************************************************************************
682 * Structures and closely related defines.
684 *************************************************************************/
688 * A structure to hold a statistics counter. We also
689 * compute moving averages for this counter.
693 u32 cnt; /* Total count */
694 ulong accum; /* Acuumulator per period */
695 ulong sma; /* Simple moving average */
696 ulong ema; /* Exponential moving average */
700 /************************************************************************
701 * Device flag definitions for bd_flags.
702 ************************************************************************/
703 #define BD_FEP5PLUS 0x0001 /* Supports FEP5 Plus commands */
704 #define BD_HAS_VPD 0x0002 /* Board has VPD info available */
708 * Per-board information
712 int magic; /* Board Magic number. */
713 int boardnum; /* Board number: 0-3 */
714 int firstminor; /* First minor, e.g. 0, 30, 60 */
716 int type; /* Type of board */
717 char *name; /* Product Name */
718 struct pci_dev *pdev; /* Pointer to the pci_dev struct */
719 u16 vendor; /* PCI vendor ID */
720 u16 device; /* PCI device ID */
721 u16 subvendor; /* PCI subsystem vendor ID */
722 u16 subdevice; /* PCI subsystem device ID */
723 uchar rev; /* PCI revision ID */
724 uint pci_bus; /* PCI bus value */
725 uint pci_slot; /* PCI slot value */
726 u16 maxports; /* MAX ports this board can handle */
727 uchar vpd[VPDSIZE]; /* VPD of board, if found */
728 u32 bd_flags; /* Board flags */
730 spinlock_t bd_lock; /* Used to protect board */
732 u32 state; /* State of card. */
733 wait_queue_head_t state_wait; /* Place to sleep on for state change */
735 struct tasklet_struct helper_tasklet; /* Poll helper tasklet */
740 struct cnode * bd_config; /* Config of board */
742 u16 nasync; /* Number of ports on card */
744 u32 use_interrupts; /* Should we be interrupt driven? */
745 ulong irq; /* Interrupt request number */
746 ulong intr_count; /* Count of interrupts */
747 u32 intr_used; /* Non-zero if using interrupts */
748 u32 intr_running; /* Non-zero if FEP knows its doing interrupts */
750 ulong port; /* Start of base io port of the card */
751 ulong port_end; /* End of base io port of the card */
752 ulong membase; /* Start of base memory of the card */
753 ulong membase_end; /* End of base memory of the card */
755 uchar *re_map_port; /* Remapped io port of the card */
756 uchar *re_map_membase;/* Remapped memory of the card */
758 uchar runwait; /* # Processes waiting for FEP */
759 uchar inhibit_poller; /* Tells the poller to leave us alone */
761 struct channel_t *channels[MAXPORTS]; /* array of pointers to our channels. */
763 struct tty_driver *SerialDriver;
764 char SerialName[200];
765 struct tty_driver *PrintDriver;
768 u32 dgap_Major_Serial_Registered;
769 u32 dgap_Major_TransparentPrint_Registered;
771 u32 dgap_Serial_Major;
772 u32 dgap_TransparentPrint_Major;
774 struct bs_t *bd_bs; /* Base structure pointer */
776 char *flipbuf; /* Our flip buffer, alloced if board is found */
777 char *flipflagbuf; /* Our flip flag buffer, alloced if board is found */
779 u16 dpatype; /* The board "type", as defined by DPA */
780 u16 dpastatus; /* The board "status", as defined by DPA */
781 wait_queue_head_t kme_wait; /* Needed for DPA support */
783 u32 conc_dl_status; /* Status of any pending conc download */
793 /************************************************************************
794 * Unit flag definitions for un_flags.
795 ************************************************************************/
796 #define UN_ISOPEN 0x0001 /* Device is open */
797 #define UN_CLOSING 0x0002 /* Line is being closed */
798 #define UN_IMM 0x0004 /* Service immediately */
799 #define UN_BUSY 0x0008 /* Some work this channel */
800 #define UN_BREAKI 0x0010 /* Input break received */
801 #define UN_PWAIT 0x0020 /* Printer waiting for terminal */
802 #define UN_TIME 0x0040 /* Waiting on time */
803 #define UN_EMPTY 0x0080 /* Waiting output queue empty */
804 #define UN_LOW 0x0100 /* Waiting output low water mark*/
805 #define UN_EXCL_OPEN 0x0200 /* Open for exclusive use */
806 #define UN_WOPEN 0x0400 /* Device waiting for open */
807 #define UN_WIOCTL 0x0800 /* Device waiting for open */
808 #define UN_HANGUP 0x8000 /* Carrier lost */
812 /************************************************************************
813 * Structure for terminal or printer unit.
814 ************************************************************************/
816 int magic; /* Unit Magic Number. */
817 struct channel_t *un_ch;
820 u32 un_open_count; /* Counter of opens to port */
821 struct tty_struct *un_tty;/* Pointer to unit tty structure */
822 u32 un_flags; /* Unit flags */
823 wait_queue_head_t un_flags_wait; /* Place to sleep to wait on unit */
824 u32 un_dev; /* Minor device number */
825 tcflag_t un_oflag; /* oflags being done on board */
826 tcflag_t un_lflag; /* lflags being done on board */
827 struct device *un_sysfs;
831 /************************************************************************
832 * Device flag definitions for ch_flags.
833 ************************************************************************/
834 #define CH_PRON 0x0001 /* Printer on string */
835 #define CH_OUT 0x0002 /* Dial-out device open */
836 #define CH_STOP 0x0004 /* Output is stopped */
837 #define CH_STOPI 0x0008 /* Input is stopped */
838 #define CH_CD 0x0010 /* Carrier is present */
839 #define CH_FCAR 0x0020 /* Carrier forced on */
841 #define CH_RXBLOCK 0x0080 /* Enable rx blocked flag */
842 #define CH_WLOW 0x0100 /* Term waiting low event */
843 #define CH_WEMPTY 0x0200 /* Term waiting empty event */
844 #define CH_RENABLE 0x0400 /* Buffer just emptied */
845 #define CH_RACTIVE 0x0800 /* Process active in xxread() */
846 #define CH_RWAIT 0x1000 /* Process waiting in xxread() */
847 #define CH_BAUD0 0x2000 /* Used for checking B0 transitions */
848 #define CH_HANGUP 0x8000 /* Hangup received */
851 * Definitions for ch_sniff_flags
853 #define SNIFF_OPEN 0x1
854 #define SNIFF_WAIT_DATA 0x2
855 #define SNIFF_WAIT_SPACE 0x4
858 /************************************************************************
859 *** Definitions for Digi ditty(1) command.
860 ************************************************************************/
864 * Copyright (c) 1988-96 Digi International Inc., All Rights Reserved.
867 /************************************************************************
868 * This module provides application access to special Digi
869 * serial line enhancements which are not standard UNIX(tm) features.
870 ************************************************************************/
872 #if !defined(TIOCMODG)
874 #define TIOCMODG ('d'<<8) | 250 /* get modem ctrl state */
875 #define TIOCMODS ('d'<<8) | 251 /* set modem ctrl state */
878 #define TIOCM_LE 0x01 /* line enable */
879 #define TIOCM_DTR 0x02 /* data terminal ready */
880 #define TIOCM_RTS 0x04 /* request to send */
881 #define TIOCM_ST 0x08 /* secondary transmit */
882 #define TIOCM_SR 0x10 /* secondary receive */
883 #define TIOCM_CTS 0x20 /* clear to send */
884 #define TIOCM_CAR 0x40 /* carrier detect */
885 #define TIOCM_RNG 0x80 /* ring indicator */
886 #define TIOCM_DSR 0x100 /* data set ready */
887 #define TIOCM_RI TIOCM_RNG /* ring (alternate) */
888 #define TIOCM_CD TIOCM_CAR /* carrier detect (alt) */
893 #if !defined(TIOCMSET)
894 #define TIOCMSET ('d'<<8) | 252 /* set modem ctrl state */
895 #define TIOCMGET ('d'<<8) | 253 /* set modem ctrl state */
898 #if !defined(TIOCMBIC)
899 #define TIOCMBIC ('d'<<8) | 254 /* set modem ctrl state */
900 #define TIOCMBIS ('d'<<8) | 255 /* set modem ctrl state */
904 #if !defined(TIOCSDTR)
905 #define TIOCSDTR ('e'<<8) | 0 /* set DTR */
906 #define TIOCCDTR ('e'<<8) | 1 /* clear DTR */
909 /************************************************************************
910 * Ioctl command arguments for DIGI parameters.
911 ************************************************************************/
912 #define DIGI_GETA ('e'<<8) | 94 /* Read params */
914 #define DIGI_SETA ('e'<<8) | 95 /* Set params */
915 #define DIGI_SETAW ('e'<<8) | 96 /* Drain & set params */
916 #define DIGI_SETAF ('e'<<8) | 97 /* Drain, flush & set params */
918 #define DIGI_KME ('e'<<8) | 98 /* Read/Write Host */
921 #define DIGI_GETFLOW ('e'<<8) | 99 /* Get startc/stopc flow */
922 /* control characters */
923 #define DIGI_SETFLOW ('e'<<8) | 100 /* Set startc/stopc flow */
924 /* control characters */
925 #define DIGI_GETAFLOW ('e'<<8) | 101 /* Get Aux. startc/stopc */
926 /* flow control chars */
927 #define DIGI_SETAFLOW ('e'<<8) | 102 /* Set Aux. startc/stopc */
928 /* flow control chars */
930 #define DIGI_GEDELAY ('d'<<8) | 246 /* Get edelay */
931 #define DIGI_SEDELAY ('d'<<8) | 247 /* Set edelay */
934 unsigned char startc; /* flow cntl start char */
935 unsigned char stopc; /* flow cntl stop char */
940 #define F2200_GETA ('e'<<8) | 104 /* Get 2x36 flow cntl flags */
941 #define F2200_SETAW ('e'<<8) | 105 /* Set 2x36 flow cntl flags */
942 #define F2200_MASK 0x03 /* 2200 flow cntl bit mask */
943 #define FCNTL_2200 0x01 /* 2x36 terminal flow cntl */
944 #define PCNTL_2200 0x02 /* 2x36 printer flow cntl */
945 #define F2200_XON 0xf8
946 #define P2200_XON 0xf9
947 #define F2200_XOFF 0xfa
948 #define P2200_XOFF 0xfb
950 #define FXOFF_MASK 0x03 /* 2200 flow status mask */
951 #define RCVD_FXOFF 0x01 /* 2x36 Terminal XOFF rcvd */
952 #define RCVD_PXOFF 0x02 /* 2x36 Printer XOFF rcvd */
955 /************************************************************************
956 * Values for digi_flags
957 ************************************************************************/
958 #define DIGI_IXON 0x0001 /* Handle IXON in the FEP */
959 #define DIGI_FAST 0x0002 /* Fast baud rates */
960 #define RTSPACE 0x0004 /* RTS input flow control */
961 #define CTSPACE 0x0008 /* CTS output flow control */
962 #define DSRPACE 0x0010 /* DSR output flow control */
963 #define DCDPACE 0x0020 /* DCD output flow control */
964 #define DTRPACE 0x0040 /* DTR input flow control */
965 #define DIGI_COOK 0x0080 /* Cooked processing done in FEP */
966 #define DIGI_FORCEDCD 0x0100 /* Force carrier */
967 #define DIGI_ALTPIN 0x0200 /* Alternate RJ-45 pin config */
968 #define DIGI_AIXON 0x0400 /* Aux flow control in fep */
969 #define DIGI_PRINTER 0x0800 /* Hold port open for flow cntrl*/
970 #define DIGI_PP_INPUT 0x1000 /* Change parallel port to input*/
971 #define DIGI_DTR_TOGGLE 0x2000 /* Support DTR Toggle */
972 #define DIGI_422 0x4000 /* for 422/232 selectable panel */
973 #define DIGI_RTS_TOGGLE 0x8000 /* Support RTS Toggle */
975 /************************************************************************
976 * These options are not supported on the comxi.
977 ************************************************************************/
978 #define DIGI_COMXI (DIGI_FAST|DIGI_COOK|DSRPACE|DCDPACE|DTRPACE)
980 #define DIGI_PLEN 28 /* String length */
981 #define DIGI_TSIZ 10 /* Terminal string len */
983 /************************************************************************
984 * Structure used with ioctl commands for DIGI parameters.
985 ************************************************************************/
987 unsigned short digi_flags; /* Flags (see above) */
988 unsigned short digi_maxcps; /* Max printer CPS */
989 unsigned short digi_maxchar; /* Max chars in print queue */
990 unsigned short digi_bufsize; /* Buffer size */
991 unsigned char digi_onlen; /* Length of ON string */
992 unsigned char digi_offlen; /* Length of OFF string */
993 char digi_onstr[DIGI_PLEN]; /* Printer on string */
994 char digi_offstr[DIGI_PLEN]; /* Printer off string */
995 char digi_term[DIGI_TSIZ]; /* terminal string */
998 /************************************************************************
999 * KME definitions and structures.
1000 ************************************************************************/
1001 #define RW_IDLE 0 /* Operation complete */
1002 #define RW_READ 1 /* Read Concentrator Memory */
1003 #define RW_WRITE 2 /* Write Concentrator Memory */
1006 unsigned char rw_req; /* Request type */
1007 unsigned char rw_board; /* Host Adapter board number */
1008 unsigned char rw_conc; /* Concentrator number */
1009 unsigned char rw_reserved; /* Reserved for expansion */
1010 unsigned long rw_addr; /* Address in concentrator */
1011 unsigned short rw_size; /* Read/write request length */
1012 unsigned char rw_data[128]; /* Data to read/write */
1015 /***********************************************************************
1016 * Shrink Buffer and Board Information definitions and structures.
1018 ************************************************************************/
1019 /* Board type return codes */
1020 #define PCXI_TYPE 1 /* Board type at the designated port is a PC/Xi */
1021 #define PCXM_TYPE 2 /* Board type at the designated port is a PC/Xm */
1022 #define PCXE_TYPE 3 /* Board type at the designated port is a PC/Xe */
1023 #define MCXI_TYPE 4 /* Board type at the designated port is a MC/Xi */
1024 #define COMXI_TYPE 5 /* Board type at the designated port is a COM/Xi */
1026 /* Non-Zero Result codes. */
1027 #define RESULT_NOBDFND 1 /* A Digi product at that port is not config installed */
1028 #define RESULT_NODESCT 2 /* A memory descriptor was not obtainable */
1029 #define RESULT_NOOSSIG 3 /* FEP/OS signature was not detected on the board */
1030 #define RESULT_TOOSML 4 /* Too small an area to shrink. */
1031 #define RESULT_NOCHAN 5 /* Channel structure for the board was not found */
1033 struct shrink_buf_struct {
1034 unsigned long shrink_buf_vaddr; /* Virtual address of board */
1035 unsigned long shrink_buf_phys; /* Physical address of board */
1036 unsigned long shrink_buf_bseg; /* Amount of board memory */
1037 unsigned long shrink_buf_hseg; /* '186 Beginning of Dual-Port */
1039 unsigned long shrink_buf_lseg; /* '186 Beginning of freed memory */
1040 unsigned long shrink_buf_mseg; /* Linear address from start of
1041 dual-port were freed memory
1042 begins, host viewpoint. */
1044 unsigned long shrink_buf_bdparam; /* Parameter for xxmemon and
1047 unsigned long shrink_buf_reserva; /* Reserved */
1048 unsigned long shrink_buf_reservb; /* Reserved */
1049 unsigned long shrink_buf_reservc; /* Reserved */
1050 unsigned long shrink_buf_reservd; /* Reserved */
1052 unsigned char shrink_buf_result; /* Reason for call failing
1053 Zero is Good return */
1054 unsigned char shrink_buf_init; /* Non-Zero if it caused an
1057 unsigned char shrink_buf_anports; /* Number of async ports */
1058 unsigned char shrink_buf_snports; /* Number of sync ports */
1059 unsigned char shrink_buf_type; /* Board type 1 = PC/Xi,
1064 unsigned char shrink_buf_card; /* Card number */
1068 /************************************************************************
1069 * Structure to get driver status information
1070 ************************************************************************/
1072 unsigned long dinfo_nboards; /* # boards configured */
1073 char dinfo_reserved[12]; /* for future expansion */
1074 char dinfo_version[16]; /* driver version */
1077 #define DIGI_GETDD ('d'<<8) | 248 /* get driver info */
1079 /************************************************************************
1080 * Structure used with ioctl commands for per-board information
1082 * physsize and memsize differ when board has "windowed" memory
1083 ************************************************************************/
1085 unsigned long info_bdnum; /* Board number (0 based) */
1086 unsigned long info_ioport; /* io port address */
1087 unsigned long info_physaddr; /* memory address */
1088 unsigned long info_physsize; /* Size of host mem window */
1089 unsigned long info_memsize; /* Amount of dual-port mem */
1091 unsigned short info_bdtype; /* Board type */
1092 unsigned short info_nports; /* number of ports */
1093 char info_bdstate; /* board state */
1094 char info_reserved[7]; /* for future expansion */
1097 #define DIGI_GETBD ('d'<<8) | 249 /* get board info */
1100 unsigned int info_chan; /* Channel number (0 based) */
1101 unsigned int info_brd; /* Board number (0 based) */
1102 unsigned long info_cflag; /* cflag for channel */
1103 unsigned long info_iflag; /* iflag for channel */
1104 unsigned long info_oflag; /* oflag for channel */
1105 unsigned long info_mstat; /* mstat for channel */
1106 unsigned long info_tx_data; /* tx_data for channel */
1107 unsigned long info_rx_data; /* rx_data for channel */
1108 unsigned long info_hflow; /* hflow for channel */
1109 unsigned long info_reserved[8]; /* for future expansion */
1112 #define DIGI_GETSTAT ('d'<<8) | 244 /* get board info */
1113 /************************************************************************
1115 * Structure used with ioctl commands for per-channel information
1117 ************************************************************************/
1119 unsigned long info_bdnum; /* Board number (0 based) */
1120 unsigned long info_channel; /* Channel index number */
1121 unsigned long info_ch_cflag; /* Channel cflag */
1122 unsigned long info_ch_iflag; /* Channel iflag */
1123 unsigned long info_ch_oflag; /* Channel oflag */
1124 unsigned long info_chsize; /* Channel structure size */
1125 unsigned long info_sleep_stat; /* sleep status */
1126 dev_t info_dev; /* device number */
1127 unsigned char info_initstate; /* Channel init state */
1128 unsigned char info_running; /* Channel running state */
1129 long reserved[8]; /* reserved for future use */
1133 * This structure is used with the DIGI_FEPCMD ioctl to
1134 * tell the driver which port to send the command for.
1140 int chan; /* channel index (zero based) */
1141 int bdid; /* board index (zero based) */
1145 * info_sleep_stat defines
1147 #define INFO_RUNWAIT 0x0001
1148 #define INFO_WOPEN 0x0002
1149 #define INFO_TTIOW 0x0004
1150 #define INFO_CH_RWAIT 0x0008
1151 #define INFO_CH_WEMPTY 0x0010
1152 #define INFO_CH_WLOW 0x0020
1153 #define INFO_XXBUF_BUSY 0x0040
1155 #define DIGI_GETCH ('d'<<8) | 245 /* get board info */
1157 /* Board type definitions */
1159 #define SUBTYPE 0007
1165 #define T_SP_PLUS 0005
1166 # define T_HERC 0000
1171 #define T_COMXI 0000
1175 #define T_PCLITE 0040
1179 #define T_A2K_4_8 0070
1180 #define BUSTYPE 0700
1181 #define T_ISABUS 0000
1182 #define T_MCBUS 0100
1183 #define T_EISABUS 0200
1184 #define T_PCIBUS 0400
1186 /* Board State Definitions */
1188 #define BD_RUNNING 0x0
1189 #define BD_REASON 0x7f
1190 #define BD_NOTFOUND 0x1
1191 #define BD_NOIOPORT 0x2
1192 #define BD_NOMEM 0x3
1193 #define BD_NOBIOS 0x4
1194 #define BD_NOFEP 0x5
1195 #define BD_FAILED 0x6
1196 #define BD_ALLOCATED 0x7
1197 #define BD_TRIBOOT 0x8
1198 #define BD_BADKME 0x80
1200 #define DIGI_LOOPBACK ('d'<<8) | 252 /* Enable/disable UART internal loopback */
1201 #define DIGI_SPOLL ('d'<<8) | 254 /* change poller rate */
1203 #define DIGI_SETCUSTOMBAUD _IOW('e', 106, int) /* Set integer baud rate */
1204 #define DIGI_GETCUSTOMBAUD _IOR('e', 107, int) /* Get integer baud rate */
1205 #define DIGI_RESET_PORT ('e'<<8) | 93 /* Reset port */
1207 /************************************************************************
1208 * Channel information structure.
1209 ************************************************************************/
1211 int magic; /* Channel Magic Number */
1212 struct bs_t *ch_bs; /* Base structure pointer */
1213 struct cm_t *ch_cm; /* Command queue pointer */
1214 struct board_t *ch_bd; /* Board structure pointer */
1215 unsigned char *ch_vaddr; /* FEP memory origin */
1216 unsigned char *ch_taddr; /* Write buffer origin */
1217 unsigned char *ch_raddr; /* Read buffer origin */
1218 struct digi_t ch_digi; /* Transparent Print structure */
1219 struct un_t ch_tun; /* Terminal unit info */
1220 struct un_t ch_pun; /* Printer unit info */
1222 spinlock_t ch_lock; /* provide for serialization */
1223 wait_queue_head_t ch_flags_wait;
1226 uchar pscan_savechar;
1228 u32 ch_portnum; /* Port number, 0 offset. */
1229 u32 ch_open_count; /* open count */
1230 u32 ch_flags; /* Channel flags */
1233 u32 ch_close_delay; /* How long we should drop RTS/DTR for */
1235 u32 ch_cpstime; /* Time for CPS calculations */
1237 tcflag_t ch_c_iflag; /* channel iflags */
1238 tcflag_t ch_c_cflag; /* channel cflags */
1239 tcflag_t ch_c_oflag; /* channel oflags */
1240 tcflag_t ch_c_lflag; /* channel lflags */
1242 u16 ch_fepiflag; /* FEP tty iflags */
1243 u16 ch_fepcflag; /* FEP tty cflags */
1244 u16 ch_fepoflag; /* FEP tty oflags */
1245 u16 ch_wopen; /* Waiting for open process cnt */
1246 u16 ch_tstart; /* Transmit buffer start */
1247 u16 ch_tsize; /* Transmit buffer size */
1248 u16 ch_rstart; /* Receive buffer start */
1249 u16 ch_rsize; /* Receive buffer size */
1250 u16 ch_rdelay; /* Receive delay time */
1252 u16 ch_tlw; /* Our currently set low water mark */
1254 u16 ch_cook; /* Output character mask */
1256 uchar ch_card; /* Card channel is on */
1257 uchar ch_stopc; /* Stop character */
1258 uchar ch_startc; /* Start character */
1260 uchar ch_mostat; /* FEP output modem status */
1261 uchar ch_mistat; /* FEP input modem status */
1262 uchar ch_mforce; /* Modem values to be forced */
1263 uchar ch_mval; /* Force values */
1264 uchar ch_fepstopc; /* FEP stop character */
1265 uchar ch_fepstartc; /* FEP start character */
1267 uchar ch_astopc; /* Auxiliary Stop character */
1268 uchar ch_astartc; /* Auxiliary Start character */
1269 uchar ch_fepastopc; /* Auxiliary FEP stop char */
1270 uchar ch_fepastartc; /* Auxiliary FEP start char */
1272 uchar ch_hflow; /* FEP hardware handshake */
1273 uchar ch_dsr; /* stores real dsr value */
1274 uchar ch_cd; /* stores real cd value */
1275 uchar ch_tx_win; /* channel tx buffer window */
1276 uchar ch_rx_win; /* channel rx buffer window */
1277 uint ch_custom_speed; /* Custom baud, if set */
1278 uint ch_baud_info; /* Current baud info for /proc output */
1279 ulong ch_rxcount; /* total of data received so far */
1280 ulong ch_txcount; /* total of data transmitted so far */
1281 ulong ch_err_parity; /* Count of parity errors on channel */
1282 ulong ch_err_frame; /* Count of framing errors on channel */
1283 ulong ch_err_break; /* Count of breaks on channel */
1284 ulong ch_err_overrun; /* Count of overruns on channel */
1288 char *ch_sniff_buf; /* Sniff buffer for proc */
1289 ulong ch_sniff_flags; /* Channel flags */
1290 wait_queue_head_t ch_sniff_wait;
1293 /************************************************************************
1294 * Command structure definition.
1295 ************************************************************************/
1297 volatile unsigned short cm_head; /* Command buffer head offset */
1298 volatile unsigned short cm_tail; /* Command buffer tail offset */
1299 volatile unsigned short cm_start; /* start offset of buffer */
1300 volatile unsigned short cm_max; /* last offset of buffer */
1303 /************************************************************************
1304 * Event structure definition.
1305 ************************************************************************/
1307 volatile unsigned short ev_head; /* Command buffer head offset */
1308 volatile unsigned short ev_tail; /* Command buffer tail offset */
1309 volatile unsigned short ev_start; /* start offset of buffer */
1310 volatile unsigned short ev_max; /* last offset of buffer */
1313 /************************************************************************
1314 * Download buffer structure.
1315 ************************************************************************/
1317 uchar dl_type; /* Header */
1318 uchar dl_seq; /* Download sequence */
1319 ushort dl_srev; /* Software revision number */
1320 ushort dl_lrev; /* Low revision number */
1321 ushort dl_hrev; /* High revision number */
1322 ushort dl_seg; /* Start segment address */
1323 ushort dl_size; /* Number of bytes to download */
1324 uchar dl_data[1024]; /* Download data */
1327 /************************************************************************
1328 * Per channel buffer structure
1329 ************************************************************************
1330 * Base Structure Entries Usage Meanings to Host *
1332 * W = read write R = read only *
1333 * C = changed by commands only *
1334 * U = unknown (may be changed w/o notice) *
1335 ************************************************************************/
1337 volatile unsigned short tp_jmp; /* Transmit poll jump */
1338 volatile unsigned short tc_jmp; /* Cooked procedure jump */
1339 volatile unsigned short ri_jmp; /* Not currently used */
1340 volatile unsigned short rp_jmp; /* Receive poll jump */
1342 volatile unsigned short tx_seg; /* W Tx segment */
1343 volatile unsigned short tx_head; /* W Tx buffer head offset */
1344 volatile unsigned short tx_tail; /* R Tx buffer tail offset */
1345 volatile unsigned short tx_max; /* W Tx buffer size - 1 */
1347 volatile unsigned short rx_seg; /* W Rx segment */
1348 volatile unsigned short rx_head; /* W Rx buffer head offset */
1349 volatile unsigned short rx_tail; /* R Rx buffer tail offset */
1350 volatile unsigned short rx_max; /* W Rx buffer size - 1 */
1352 volatile unsigned short tx_lw; /* W Tx buffer low water mark */
1353 volatile unsigned short rx_lw; /* W Rx buffer low water mark */
1354 volatile unsigned short rx_hw; /* W Rx buffer high water mark */
1355 volatile unsigned short incr; /* W Increment to next channel */
1357 volatile unsigned short fepdev; /* U SCC device base address */
1358 volatile unsigned short edelay; /* W Exception delay */
1359 volatile unsigned short blen; /* W Break length */
1360 volatile unsigned short btime; /* U Break complete time */
1362 volatile unsigned short iflag; /* C UNIX input flags */
1363 volatile unsigned short oflag; /* C UNIX output flags */
1364 volatile unsigned short cflag; /* C UNIX control flags */
1365 volatile unsigned short wfill[13]; /* U Reserved for expansion */
1367 volatile unsigned char num; /* U Channel number */
1368 volatile unsigned char ract; /* U Receiver active counter */
1369 volatile unsigned char bstat; /* U Break status bits */
1370 volatile unsigned char tbusy; /* W Transmit busy */
1371 volatile unsigned char iempty; /* W Transmit empty event enable */
1372 volatile unsigned char ilow; /* W Transmit low-water event enable */
1373 volatile unsigned char idata; /* W Receive data interrupt enable */
1374 volatile unsigned char eflag; /* U Host event flags */
1376 volatile unsigned char tflag; /* U Transmit flags */
1377 volatile unsigned char rflag; /* U Receive flags */
1378 volatile unsigned char xmask; /* U Transmit ready flags */
1379 volatile unsigned char xval; /* U Transmit ready value */
1380 volatile unsigned char m_stat; /* RC Modem status bits */
1381 volatile unsigned char m_change; /* U Modem bits which changed */
1382 volatile unsigned char m_int; /* W Modem interrupt enable bits */
1383 volatile unsigned char m_last; /* U Last modem status */
1385 volatile unsigned char mtran; /* C Unreported modem trans */
1386 volatile unsigned char orun; /* C Buffer overrun occurred */
1387 volatile unsigned char astartc; /* W Auxiliary Xon char */
1388 volatile unsigned char astopc; /* W Auxiliary Xoff char */
1389 volatile unsigned char startc; /* W Xon character */
1390 volatile unsigned char stopc; /* W Xoff character */
1391 volatile unsigned char vnextc; /* W Vnext character */
1392 volatile unsigned char hflow; /* C Software flow control */
1394 volatile unsigned char fillc; /* U Delay Fill character */
1395 volatile unsigned char ochar; /* U Saved output character */
1396 volatile unsigned char omask; /* U Output character mask */
1398 volatile unsigned char bfill[13]; /* U Reserved for expansion */
1400 volatile unsigned char scc[16]; /* U SCC registers */
1410 char type; /* Board Type */
1411 short port; /* I/O Address */
1412 char *portstr; /* I/O Address in string */
1413 long addr; /* Memory Address */
1414 char *addrstr; /* Memory Address in string */
1415 long pcibus; /* PCI BUS */
1416 char *pcibusstr; /* PCI BUS in string */
1417 long pcislot; /* PCI SLOT */
1418 char *pcislotstr; /* PCI SLOT in string */
1419 char nport; /* Number of Ports */
1420 char *id; /* tty id */
1421 int start; /* start of tty counting */
1422 char *method; /* Install method */
1434 char conc1; /* total concs in line1 */
1435 char conc2; /* total concs in line2 */
1436 char module1; /* total modules for line1 */
1437 char module2; /* total modules for line2 */
1438 char *status; /* config status */
1439 char *dimstatus; /* Y/N */
1440 int status_index; /* field pointer */