2 * Copyright 2003 Digi International (www.digi.com)
3 * Scott H Kilau <Scott_Kilau at digi dot com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2, or (at your option)
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
12 * implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
13 * PURPOSE. See the GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 * NOTE: THIS IS A SHARED HEADER. DO NOT CHANGE CODING STYLE!!!
21 *************************************************************************
25 *************************************************************************/
27 #ifndef __DGAP_DRIVER_H
28 #define __DGAP_DRIVER_H
30 #include <linux/types.h> /* To pick up the varions Linux types */
31 #include <linux/tty.h> /* To pick up the various tty structs/defines */
32 #include <linux/interrupt.h> /* For irqreturn_t type */
42 /* Required for our shared headers! */
43 typedef unsigned char uchar;
45 #if !defined(TTY_FLIPBUF_SIZE)
46 # define TTY_FLIPBUF_SIZE 512
49 /*************************************************************************
53 *************************************************************************/
56 * Driver identification
58 #define DG_NAME "dgap-1.3-16"
59 #define DG_PART "40002347_C"
63 * defines from dgap_pci.h
65 #define PCIMAX 32 /* maximum number of PCI boards */
67 #define DIGI_VID 0x114F
69 #define PCI_DEV_EPC_DID 0x0002
70 #define PCI_DEV_XEM_DID 0x0004
71 #define PCI_DEV_XR_DID 0x0005
72 #define PCI_DEV_CX_DID 0x0006
73 #define PCI_DEV_XRJ_DID 0x0009 /* PLX-based Xr adapter */
74 #define PCI_DEV_XR_IBM_DID 0x0011 /* IBM 8-port Async Adapter */
75 #define PCI_DEV_XR_BULL_DID 0x0013 /* BULL 8-port Async Adapter */
76 #define PCI_DEV_XR_SAIP_DID 0x001c /* SAIP card - Xr adapter */
77 #define PCI_DEV_XR_422_DID 0x0012 /* Xr-422 */
78 #define PCI_DEV_920_2_DID 0x0034 /* XR-Plus 920 K, 2 port */
79 #define PCI_DEV_920_4_DID 0x0026 /* XR-Plus 920 K, 4 port */
80 #define PCI_DEV_920_8_DID 0x0027 /* XR-Plus 920 K, 8 port */
81 #define PCI_DEV_EPCJ_DID 0x000a /* PLX 9060 chip for PCI */
82 #define PCI_DEV_CX_IBM_DID 0x001b /* IBM 128-port Async Adapter */
83 #define PCI_DEV_920_8_HP_DID 0x0058 /* HP XR-Plus 920 K, 8 port */
84 #define PCI_DEV_XEM_HP_DID 0x0059 /* HP Xem PCI */
86 #define PCI_DEV_XEM_NAME "AccelePort XEM"
87 #define PCI_DEV_CX_NAME "AccelePort CX"
88 #define PCI_DEV_XR_NAME "AccelePort Xr"
89 #define PCI_DEV_XRJ_NAME "AccelePort Xr (PLX)"
90 #define PCI_DEV_XR_SAIP_NAME "AccelePort Xr (SAIP)"
91 #define PCI_DEV_920_2_NAME "AccelePort Xr920 2 port"
92 #define PCI_DEV_920_4_NAME "AccelePort Xr920 4 port"
93 #define PCI_DEV_920_8_NAME "AccelePort Xr920 8 port"
94 #define PCI_DEV_XR_422_NAME "AccelePort Xr 422"
95 #define PCI_DEV_EPCJ_NAME "AccelePort EPC (PLX)"
96 #define PCI_DEV_XR_BULL_NAME "AccelePort Xr (BULL)"
97 #define PCI_DEV_XR_IBM_NAME "AccelePort Xr (IBM)"
98 #define PCI_DEV_CX_IBM_NAME "AccelePort CX (IBM)"
99 #define PCI_DEV_920_8_HP_NAME "AccelePort Xr920 8 port (HP)"
100 #define PCI_DEV_XEM_HP_NAME "AccelePort XEM (HP)"
103 * On the PCI boards, there is no IO space allocated
104 * The I/O registers will be in the first 3 bytes of the
105 * upper 2MB of the 4MB memory space. The board memory
106 * will be mapped into the low 2MB of the 4MB memory space
109 /* Potential location of PCI Bios from E0000 to FFFFF*/
110 #define PCI_BIOS_SIZE 0x00020000
112 /* Size of Memory and I/O for PCI (4MB) */
113 #define PCI_RAM_SIZE 0x00400000
115 /* Size of Memory (2MB) */
116 #define PCI_MEM_SIZE 0x00200000
118 /* Max PCI Window Size (2MB) */
119 #define PCI_WIN_SIZE 0x00200000
121 #define PCI_WIN_SHIFT 21 /* 21 bits max */
123 /* Offset of I/0 in Memory (2MB) */
124 #define PCI_IO_OFFSET 0x00200000
126 /* Size of IO (2MB) */
127 #define PCI_IO_SIZE 0x00200000
129 /* Number of boards we support at once. */
132 #define MAXTTYNAMELEN 200
134 /* Our 3 magic numbers for our board, channel and unit structs */
135 #define DGAP_BOARD_MAGIC 0x5c6df104
136 #define DGAP_CHANNEL_MAGIC 0x6c6df104
137 #define DGAP_UNIT_MAGIC 0x7c6df104
139 /* Serial port types */
140 #define DGAP_SERIAL 0
143 #define SERIAL_TYPE_NORMAL 1
145 /* 4 extra for alignment play space */
146 #define WRITEBUFLEN ((4096) + 4)
147 #define MYFLIPLEN N_TTY_BUF_SIZE
149 #define SBREAK_TIME 0x25
150 #define U2BSIZE 0x400
152 #define dgap_jiffies_from_ms(a) (((a) * HZ) / 1000)
155 * Our major for the mgmt devices.
157 * We can use 22, because Digi was allocated 22 and 23 for the epca driver.
158 * 22 has now become obsolete now that the "cu" devices have
159 * been removed from 2.6.
160 * Also, this *IS* the epca driver, just PCI only now.
162 #ifndef DIGI_DGAP_MAJOR
163 # define DIGI_DGAP_MAJOR 22
167 * The parameters we use to define the periods of the moving averages.
169 #define MA_PERIOD (HZ / 10)
170 #define SMA_DUR (1 * HZ)
171 #define EMA_DUR (1 * HZ)
172 #define SMA_NPERIODS (SMA_DUR / MA_PERIOD)
173 #define EMA_NPERIODS (EMA_DUR / MA_PERIOD)
176 * Define a local default termios struct. All ports will be created
177 * with this termios initially. This is the same structure that is defined
178 * as the default in tty_io.c with the same settings overriden as in serial.c
180 * In short, this should match the internal serial ports' defaults.
182 #define DEFAULT_IFLAGS (ICRNL | IXON)
183 #define DEFAULT_OFLAGS (OPOST | ONLCR)
184 #define DEFAULT_CFLAGS (B9600 | CS8 | CREAD | HUPCL | CLOCAL)
185 #define DEFAULT_LFLAGS (ISIG | ICANON | ECHO | ECHOE | ECHOK | \
186 ECHOCTL | ECHOKE | IEXTEN)
188 #ifndef _POSIX_VDISABLE
189 #define _POSIX_VDISABLE '\0'
192 #define SNIFF_MAX 65536 /* Sniff buffer size (2^n) */
193 #define SNIFF_MASK (SNIFF_MAX - 1) /* Sniff wrap mask */
195 #define VPDSIZE (512)
198 * Lock function/defines.
199 * Makes spotting lock/unlock locations easier.
201 # define DGAP_LOCK(x,y) spin_lock_irqsave(&(x), y)
202 # define DGAP_UNLOCK(x,y) spin_unlock_irqrestore(&(x), y)
204 /************************************************************************
206 ************************************************************************/
207 #define START 0x0004L /* Execution start address */
209 #define CMDBUF 0x0d10L /* Command (cm_t) structure offset */
210 #define CMDSTART 0x0400L /* Start of command buffer */
211 #define CMDMAX 0x0800L /* End of command buffer */
213 #define EVBUF 0x0d18L /* Event (ev_t) structure */
214 #define EVSTART 0x0800L /* Start of event buffer */
215 #define EVMAX 0x0c00L /* End of event buffer */
216 #define FEP5_PLUS 0x0E40 /* ASCII '5' and ASCII 'A' is here */
217 #define ECS_SEG 0x0E44 /* Segment of the extended channel structure */
218 #define LINE_SPEED 0x10 /* Offset into ECS_SEG for line speed */
219 /* if the fep has extended capabilities */
221 /* BIOS MAGIC SPOTS */
222 #define ERROR 0x0C14L /* BIOS error code */
223 #define SEQUENCE 0x0C12L /* BIOS sequence indicator */
224 #define POSTAREA 0x0C00L /* POST complete message area */
226 /* FEP MAGIC SPOTS */
227 #define FEPSTAT POSTAREA /* OS here when FEP comes up */
228 #define NCHAN 0x0C02L /* number of ports FEP sees */
229 #define PANIC 0x0C10L /* PANIC area for FEP */
230 #define KMEMEM 0x0C30L /* Memory for KME use */
231 #define CONFIG 0x0CD0L /* Concentrator configuration info */
232 #define CONFIGSIZE 0x0030 /* configuration info size */
233 #define DOWNREQ 0x0D00 /* Download request buffer pointer */
235 #define CHANBUF 0x1000L /* Async channel (bs_t) structs */
236 #define FEPOSSIZE 0x1FFF /* 8K FEPOS */
238 #define XEMPORTS 0xC02 /*
239 * Offset in board memory where FEP5 stores
240 * how many ports it has detected.
241 * NOTE: FEP5 reports 64 ports when the user
242 * has the cable in EBI OUT instead of EBI IN.
252 #define LOWMEM 0x0100
253 #define HIGHMEM 0x7f00
255 #define FEPTIMEOUT 200000
257 #define ENABLE_INTR 0x0e04 /* Enable interrupts flag */
258 #define FEPPOLL_MIN 1 /* minimum of 1 millisecond */
259 #define FEPPOLL_MAX 20 /* maximum of 20 milliseconds */
260 #define FEPPOLL 0x0c26 /* Fep event poll interval */
262 #define IALTPIN 0x0080 /* Input flag to swap DSR <-> DCD */
264 /************************************************************************
265 * FEP supported functions
266 ************************************************************************/
267 #define SRLOW 0xe0 /* Set receive low water */
268 #define SRHIGH 0xe1 /* Set receive high water */
269 #define FLUSHTX 0xe2 /* Flush transmit buffer */
270 #define PAUSETX 0xe3 /* Pause data transmission */
271 #define RESUMETX 0xe4 /* Resume data transmission */
272 #define SMINT 0xe5 /* Set Modem Interrupt */
273 #define SAFLOWC 0xe6 /* Set Aux. flow control chars */
274 #define SBREAK 0xe8 /* Send break */
275 #define SMODEM 0xe9 /* Set 8530 modem control lines */
276 #define SIFLAG 0xea /* Set UNIX iflags */
277 #define SFLOWC 0xeb /* Set flow control characters */
278 #define STLOW 0xec /* Set transmit low water mark */
279 #define RPAUSE 0xee /* Pause receive */
280 #define RRESUME 0xef /* Resume receive */
281 #define CHRESET 0xf0 /* Reset Channel */
282 #define BUFSETALL 0xf2 /* Set Tx & Rx buffer size avail*/
283 #define SOFLAG 0xf3 /* Set UNIX oflags */
284 #define SHFLOW 0xf4 /* Set hardware handshake */
285 #define SCFLAG 0xf5 /* Set UNIX cflags */
286 #define SVNEXT 0xf6 /* Set VNEXT character */
287 #define SPINTFC 0xfc /* Reserved */
288 #define SCOMMODE 0xfd /* Set RS232/422 mode */
291 /************************************************************************
293 ************************************************************************/
294 #define MODE_232 0x00
295 #define MODE_422 0x01
298 /************************************************************************
300 ************************************************************************/
301 #define IFBREAK 0x01 /* Break received */
302 #define IFTLW 0x02 /* Transmit low water */
303 #define IFTEM 0x04 /* Transmitter empty */
304 #define IFDATA 0x08 /* Receive data present */
305 #define IFMODEM 0x20 /* Modem status change */
307 /************************************************************************
309 ************************************************************************/
310 # define DM_RTS 0x02 /* Request to send */
311 # define DM_CD 0x80 /* Carrier detect */
312 # define DM_DSR 0x20 /* Data set ready */
313 # define DM_CTS 0x10 /* Clear to send */
314 # define DM_RI 0x40 /* Ring indicator */
315 # define DM_DTR 0x01 /* Data terminal ready */
318 * defines from dgap_conf.h
320 #define NULLNODE 0 /* header node, not used */
321 #define BNODE 1 /* Board node */
322 #define LNODE 2 /* Line node */
323 #define CNODE 3 /* Concentrator node */
324 #define MNODE 4 /* EBI Module node */
325 #define TNODE 5 /* tty name prefix node */
326 #define CUNODE 6 /* cu name prefix (non-SCO) */
327 #define PNODE 7 /* trans. print prefix node */
328 #define JNODE 8 /* maJor number node */
329 #define ANODE 9 /* altpin */
330 #define TSNODE 10 /* tty structure size */
331 #define CSNODE 11 /* channel structure size */
332 #define BSNODE 12 /* board structure size */
333 #define USNODE 13 /* unit schedule structure size */
334 #define FSNODE 14 /* f2200 structure size */
335 #define VSNODE 15 /* size of VPIX structures */
336 #define INTRNODE 16 /* enable interrupt */
338 /* Enumeration of tokens */
343 #define EPCFS 11 /* start of EPC family definitions */
360 #define EPCFE 25 /* end of EPC family definitions */
371 #define AVANFS 42 /* start of Avanstar family definitions */
374 #define AVANFE 43 /* end of Avanstar family definitions */
376 #define DA2000FS 44 /* start of AccelePort 2000 family definitions */
377 #define DA22 44 /* AccelePort 2002 */
378 #define DA24 45 /* AccelePort 2004 */
379 #define DA28 46 /* AccelePort 2008 */
380 #define DA216 47 /* AccelePort 2016 */
381 #define DAR4 48 /* AccelePort RAS 4 port */
382 #define DAR8 49 /* AccelePort RAS 8 port */
383 #define DDR24 50 /* DataFire RAS 24 port */
384 #define DDR30 51 /* DataFire RAS 30 port */
385 #define DDR48 52 /* DataFire RAS 48 port */
386 #define DDR60 53 /* DataFire RAS 60 port */
387 #define DA2000FE 53 /* end of AccelePort 2000/RAS family definitions */
389 #define PCXRFS 106 /* start of PCXR family definitions */
394 #define APORT4_920I 110
395 #define APORT8_920I 111
396 #define APORT4_920P 112
397 #define APORT8_920P 113
398 #define APORT2_920P 114
399 #define PCXRFE 117 /* end of PCXR family definitions */
416 /* The following tokens can appear in multiple places */
443 #define TOTAL_BOARD 2
444 #define CURRENT_BRD 4
447 #define MEM_ADDRESS 10
449 #define FIELDS_PER_PAGE 18
462 #define MAX_FIELD 512
474 #define ONETONINE "123456789"
475 #define ALL "1234567890"
478 * All the possible states the driver can be while being loaded.
481 DRIVER_INITIALIZED = 0,
482 DRIVER_NEED_CONFIG_LOAD,
483 DRIVER_REQUESTED_CONFIG,
488 * All the possible states the board can be while booting up.
498 NEED_DEVICE_CREATION,
499 REQUESTED_DEVICE_CREATION,
500 FINISHED_DEVICE_CREATION,
510 FINISHED_PROC_CREATION,
515 * All the possible states that a requested concentrator image can be in.
518 NO_PENDING_CONCENTRATOR_REQUESTS = 0,
520 REQUESTED_CONCENTRATOR
526 * Modem line constants are defined as macros because DSR and
527 * DCD are swapable using the ditty altpin option.
529 #define D_CD(ch) ch->ch_cd /* Carrier detect */
530 #define D_DSR(ch) ch->ch_dsr /* Data set ready */
531 #define D_RTS(ch) DM_RTS /* Request to send */
532 #define D_CTS(ch) DM_CTS /* Clear to send */
533 #define D_RI(ch) DM_RI /* Ring indicator */
534 #define D_DTR(ch) DM_DTR /* Data terminal ready */
537 /*************************************************************************
539 * Structures and closely related defines.
541 *************************************************************************/
545 * A structure to hold a statistics counter. We also
546 * compute moving averages for this counter.
549 u32 cnt; /* Total count */
550 ulong accum; /* Acuumulator per period */
551 ulong sma; /* Simple moving average */
552 ulong ema; /* Exponential moving average */
556 /************************************************************************
557 * Device flag definitions for bd_flags.
558 ************************************************************************/
559 #define BD_FEP5PLUS 0x0001 /* Supports FEP5 Plus commands */
560 #define BD_HAS_VPD 0x0002 /* Board has VPD info available */
563 * Per-board information
566 int magic; /* Board Magic number. */
567 int boardnum; /* Board number: 0-3 */
568 int firstminor; /* First minor, e.g. 0, 30, 60 */
570 int type; /* Type of board */
571 char *name; /* Product Name */
572 struct pci_dev *pdev; /* Pointer to the pci_dev struct */
573 u16 vendor; /* PCI vendor ID */
574 u16 device; /* PCI device ID */
575 u16 subvendor; /* PCI subsystem vendor ID */
576 u16 subdevice; /* PCI subsystem device ID */
577 uchar rev; /* PCI revision ID */
578 uint pci_bus; /* PCI bus value */
579 uint pci_slot; /* PCI slot value */
580 u16 maxports; /* MAX ports this board can handle */
581 uchar vpd[VPDSIZE]; /* VPD of board, if found */
582 u32 bd_flags; /* Board flags */
584 spinlock_t bd_lock; /* Used to protect board */
586 u32 state; /* State of card. */
587 wait_queue_head_t state_wait; /* Place to sleep on for state change */
589 struct tasklet_struct helper_tasklet; /* Poll helper tasklet */
594 struct cnode *bd_config; /* Config of board */
596 u16 nasync; /* Number of ports on card */
598 u32 use_interrupts; /* Should we be interrupt driven? */
599 ulong irq; /* Interrupt request number */
600 ulong intr_count; /* Count of interrupts */
601 u32 intr_used; /* Non-zero if using interrupts */
602 u32 intr_running; /* Non-zero if FEP knows its doing interrupts */
604 ulong port; /* Start of base io port of the card */
605 ulong port_end; /* End of base io port of the card */
606 ulong membase; /* Start of base memory of the card */
607 ulong membase_end; /* End of base memory of the card */
609 uchar *re_map_port; /* Remapped io port of the card */
610 uchar *re_map_membase;/* Remapped memory of the card */
612 uchar runwait; /* # Processes waiting for FEP */
613 uchar inhibit_poller; /* Tells the poller to leave us alone */
615 struct channel_t *channels[MAXPORTS]; /* array of pointers to our channels. */
617 struct tty_driver *SerialDriver;
618 struct tty_port *SerialPorts;
619 char SerialName[200];
620 struct tty_driver *PrintDriver;
621 struct tty_port *PrinterPorts;
624 u32 dgap_Major_Serial_Registered;
625 u32 dgap_Major_TransparentPrint_Registered;
627 u32 dgap_Serial_Major;
628 u32 dgap_TransparentPrint_Major;
630 struct bs_t *bd_bs; /* Base structure pointer */
632 char *flipbuf; /* Our flip buffer, alloced if board is found */
633 char *flipflagbuf; /* Our flip flag buffer, alloced if board is found */
635 u16 dpatype; /* The board "type", as defined by DPA */
636 u16 dpastatus; /* The board "status", as defined by DPA */
637 wait_queue_head_t kme_wait; /* Needed for DPA support */
639 u32 conc_dl_status; /* Status of any pending conc download */
644 /************************************************************************
645 * Unit flag definitions for un_flags.
646 ************************************************************************/
647 #define UN_ISOPEN 0x0001 /* Device is open */
648 #define UN_CLOSING 0x0002 /* Line is being closed */
649 #define UN_IMM 0x0004 /* Service immediately */
650 #define UN_BUSY 0x0008 /* Some work this channel */
651 #define UN_BREAKI 0x0010 /* Input break received */
652 #define UN_PWAIT 0x0020 /* Printer waiting for terminal */
653 #define UN_TIME 0x0040 /* Waiting on time */
654 #define UN_EMPTY 0x0080 /* Waiting output queue empty */
655 #define UN_LOW 0x0100 /* Waiting output low water mark*/
656 #define UN_EXCL_OPEN 0x0200 /* Open for exclusive use */
657 #define UN_WOPEN 0x0400 /* Device waiting for open */
658 #define UN_WIOCTL 0x0800 /* Device waiting for open */
659 #define UN_HANGUP 0x8000 /* Carrier lost */
663 /************************************************************************
664 * Structure for terminal or printer unit.
665 ************************************************************************/
667 int magic; /* Unit Magic Number. */
668 struct channel_t *un_ch;
671 u32 un_open_count; /* Counter of opens to port */
672 struct tty_struct *un_tty;/* Pointer to unit tty structure */
673 u32 un_flags; /* Unit flags */
674 wait_queue_head_t un_flags_wait; /* Place to sleep to wait on unit */
675 u32 un_dev; /* Minor device number */
676 tcflag_t un_oflag; /* oflags being done on board */
677 tcflag_t un_lflag; /* lflags being done on board */
678 struct device *un_sysfs;
682 /************************************************************************
683 * Device flag definitions for ch_flags.
684 ************************************************************************/
685 #define CH_PRON 0x0001 /* Printer on string */
686 #define CH_OUT 0x0002 /* Dial-out device open */
687 #define CH_STOP 0x0004 /* Output is stopped */
688 #define CH_STOPI 0x0008 /* Input is stopped */
689 #define CH_CD 0x0010 /* Carrier is present */
690 #define CH_FCAR 0x0020 /* Carrier forced on */
692 #define CH_RXBLOCK 0x0080 /* Enable rx blocked flag */
693 #define CH_WLOW 0x0100 /* Term waiting low event */
694 #define CH_WEMPTY 0x0200 /* Term waiting empty event */
695 #define CH_RENABLE 0x0400 /* Buffer just emptied */
696 #define CH_RACTIVE 0x0800 /* Process active in xxread() */
697 #define CH_RWAIT 0x1000 /* Process waiting in xxread() */
698 #define CH_BAUD0 0x2000 /* Used for checking B0 transitions */
699 #define CH_HANGUP 0x8000 /* Hangup received */
702 * Definitions for ch_sniff_flags
704 #define SNIFF_OPEN 0x1
705 #define SNIFF_WAIT_DATA 0x2
706 #define SNIFF_WAIT_SPACE 0x4
709 /************************************************************************
710 *** Definitions for Digi ditty(1) command.
711 ************************************************************************/
713 /************************************************************************
714 * This module provides application access to special Digi
715 * serial line enhancements which are not standard UNIX(tm) features.
716 ************************************************************************/
718 #if !defined(TIOCMODG)
720 #define TIOCMODG (('d'<<8) | 250) /* get modem ctrl state */
721 #define TIOCMODS (('d'<<8) | 251) /* set modem ctrl state */
724 #define TIOCM_LE 0x01 /* line enable */
725 #define TIOCM_DTR 0x02 /* data terminal ready */
726 #define TIOCM_RTS 0x04 /* request to send */
727 #define TIOCM_ST 0x08 /* secondary transmit */
728 #define TIOCM_SR 0x10 /* secondary receive */
729 #define TIOCM_CTS 0x20 /* clear to send */
730 #define TIOCM_CAR 0x40 /* carrier detect */
731 #define TIOCM_RNG 0x80 /* ring indicator */
732 #define TIOCM_DSR 0x100 /* data set ready */
733 #define TIOCM_RI TIOCM_RNG /* ring (alternate) */
734 #define TIOCM_CD TIOCM_CAR /* carrier detect (alt) */
739 #if !defined(TIOCMSET)
740 #define TIOCMSET (('d'<<8) | 252) /* set modem ctrl state */
741 #define TIOCMGET (('d'<<8) | 253) /* set modem ctrl state */
744 #if !defined(TIOCMBIC)
745 #define TIOCMBIC (('d'<<8) | 254) /* set modem ctrl state */
746 #define TIOCMBIS (('d'<<8) | 255) /* set modem ctrl state */
750 #if !defined(TIOCSDTR)
751 #define TIOCSDTR (('e'<<8) | 0) /* set DTR */
752 #define TIOCCDTR (('e'<<8) | 1) /* clear DTR */
755 /************************************************************************
756 * Ioctl command arguments for DIGI parameters.
757 ************************************************************************/
758 #define DIGI_GETA (('e'<<8) | 94) /* Read params */
760 #define DIGI_SETA (('e'<<8) | 95) /* Set params */
761 #define DIGI_SETAW (('e'<<8) | 96) /* Drain & set params */
762 #define DIGI_SETAF (('e'<<8) | 97) /* Drain, flush & set params */
764 #define DIGI_KME (('e'<<8) | 98) /* Read/Write Host */
767 #define DIGI_GETFLOW (('e'<<8) | 99) /* Get startc/stopc flow */
768 /* control characters */
769 #define DIGI_SETFLOW (('e'<<8) | 100) /* Set startc/stopc flow */
770 /* control characters */
771 #define DIGI_GETAFLOW (('e'<<8) | 101) /* Get Aux. startc/stopc */
772 /* flow control chars */
773 #define DIGI_SETAFLOW (('e'<<8) | 102) /* Set Aux. startc/stopc */
774 /* flow control chars */
776 #define DIGI_GEDELAY (('d'<<8) | 246) /* Get edelay */
777 #define DIGI_SEDELAY (('d'<<8) | 247) /* Set edelay */
780 unsigned char startc; /* flow cntl start char */
781 unsigned char stopc; /* flow cntl stop char */
786 #define F2200_GETA (('e'<<8) | 104) /* Get 2x36 flow cntl flags */
787 #define F2200_SETAW (('e'<<8) | 105) /* Set 2x36 flow cntl flags */
788 #define F2200_MASK 0x03 /* 2200 flow cntl bit mask */
789 #define FCNTL_2200 0x01 /* 2x36 terminal flow cntl */
790 #define PCNTL_2200 0x02 /* 2x36 printer flow cntl */
791 #define F2200_XON 0xf8
792 #define P2200_XON 0xf9
793 #define F2200_XOFF 0xfa
794 #define P2200_XOFF 0xfb
796 #define FXOFF_MASK 0x03 /* 2200 flow status mask */
797 #define RCVD_FXOFF 0x01 /* 2x36 Terminal XOFF rcvd */
798 #define RCVD_PXOFF 0x02 /* 2x36 Printer XOFF rcvd */
801 /************************************************************************
802 * Values for digi_flags
803 ************************************************************************/
804 #define DIGI_IXON 0x0001 /* Handle IXON in the FEP */
805 #define DIGI_FAST 0x0002 /* Fast baud rates */
806 #define RTSPACE 0x0004 /* RTS input flow control */
807 #define CTSPACE 0x0008 /* CTS output flow control */
808 #define DSRPACE 0x0010 /* DSR output flow control */
809 #define DCDPACE 0x0020 /* DCD output flow control */
810 #define DTRPACE 0x0040 /* DTR input flow control */
811 #define DIGI_COOK 0x0080 /* Cooked processing done in FEP */
812 #define DIGI_FORCEDCD 0x0100 /* Force carrier */
813 #define DIGI_ALTPIN 0x0200 /* Alternate RJ-45 pin config */
814 #define DIGI_AIXON 0x0400 /* Aux flow control in fep */
815 #define DIGI_PRINTER 0x0800 /* Hold port open for flow cntrl*/
816 #define DIGI_PP_INPUT 0x1000 /* Change parallel port to input*/
817 #define DIGI_DTR_TOGGLE 0x2000 /* Support DTR Toggle */
818 #define DIGI_422 0x4000 /* for 422/232 selectable panel */
819 #define DIGI_RTS_TOGGLE 0x8000 /* Support RTS Toggle */
821 /************************************************************************
822 * These options are not supported on the comxi.
823 ************************************************************************/
824 #define DIGI_COMXI (DIGI_FAST|DIGI_COOK|DSRPACE|DCDPACE|DTRPACE)
826 #define DIGI_PLEN 28 /* String length */
827 #define DIGI_TSIZ 10 /* Terminal string len */
829 /************************************************************************
830 * Structure used with ioctl commands for DIGI parameters.
831 ************************************************************************/
833 unsigned short digi_flags; /* Flags (see above) */
834 unsigned short digi_maxcps; /* Max printer CPS */
835 unsigned short digi_maxchar; /* Max chars in print queue */
836 unsigned short digi_bufsize; /* Buffer size */
837 unsigned char digi_onlen; /* Length of ON string */
838 unsigned char digi_offlen; /* Length of OFF string */
839 char digi_onstr[DIGI_PLEN]; /* Printer on string */
840 char digi_offstr[DIGI_PLEN]; /* Printer off string */
841 char digi_term[DIGI_TSIZ]; /* terminal string */
844 /************************************************************************
845 * KME definitions and structures.
846 ************************************************************************/
847 #define RW_IDLE 0 /* Operation complete */
848 #define RW_READ 1 /* Read Concentrator Memory */
849 #define RW_WRITE 2 /* Write Concentrator Memory */
852 unsigned char rw_req; /* Request type */
853 unsigned char rw_board; /* Host Adapter board number */
854 unsigned char rw_conc; /* Concentrator number */
855 unsigned char rw_reserved; /* Reserved for expansion */
856 unsigned long rw_addr; /* Address in concentrator */
857 unsigned short rw_size; /* Read/write request length */
858 unsigned char rw_data[128]; /* Data to read/write */
861 /***********************************************************************
862 * Shrink Buffer and Board Information definitions and structures.
864 ************************************************************************/
865 /* Board type return codes */
866 #define PCXI_TYPE 1 /* Board type at the designated port is a PC/Xi */
867 #define PCXM_TYPE 2 /* Board type at the designated port is a PC/Xm */
868 #define PCXE_TYPE 3 /* Board type at the designated port is a PC/Xe */
869 #define MCXI_TYPE 4 /* Board type at the designated port is a MC/Xi */
870 #define COMXI_TYPE 5 /* Board type at the designated port is a COM/Xi */
872 /* Non-Zero Result codes. */
873 #define RESULT_NOBDFND 1 /* A Digi product at that port is not config installed */
874 #define RESULT_NODESCT 2 /* A memory descriptor was not obtainable */
875 #define RESULT_NOOSSIG 3 /* FEP/OS signature was not detected on the board */
876 #define RESULT_TOOSML 4 /* Too small an area to shrink. */
877 #define RESULT_NOCHAN 5 /* Channel structure for the board was not found */
879 struct shrink_buf_struct {
880 unsigned long shrink_buf_vaddr; /* Virtual address of board */
881 unsigned long shrink_buf_phys; /* Physical address of board */
882 unsigned long shrink_buf_bseg; /* Amount of board memory */
883 unsigned long shrink_buf_hseg; /* '186 Beginning of Dual-Port */
885 unsigned long shrink_buf_lseg; /* '186 Beginning of freed memory */
886 unsigned long shrink_buf_mseg; /* Linear address from start of
887 dual-port were freed memory
888 begins, host viewpoint. */
890 unsigned long shrink_buf_bdparam; /* Parameter for xxmemon and
893 unsigned long shrink_buf_reserva; /* Reserved */
894 unsigned long shrink_buf_reservb; /* Reserved */
895 unsigned long shrink_buf_reservc; /* Reserved */
896 unsigned long shrink_buf_reservd; /* Reserved */
898 unsigned char shrink_buf_result; /* Reason for call failing
899 Zero is Good return */
900 unsigned char shrink_buf_init; /* Non-Zero if it caused an
903 unsigned char shrink_buf_anports; /* Number of async ports */
904 unsigned char shrink_buf_snports; /* Number of sync ports */
905 unsigned char shrink_buf_type; /* Board type 1 = PC/Xi,
910 unsigned char shrink_buf_card; /* Card number */
914 /************************************************************************
915 * Structure to get driver status information
916 ************************************************************************/
918 unsigned long dinfo_nboards; /* # boards configured */
919 char dinfo_reserved[12]; /* for future expansion */
920 char dinfo_version[16]; /* driver version */
923 #define DIGI_GETDD (('d'<<8) | 248) /* get driver info */
925 /************************************************************************
926 * Structure used with ioctl commands for per-board information
928 * physsize and memsize differ when board has "windowed" memory
929 ************************************************************************/
931 unsigned long info_bdnum; /* Board number (0 based) */
932 unsigned long info_ioport; /* io port address */
933 unsigned long info_physaddr; /* memory address */
934 unsigned long info_physsize; /* Size of host mem window */
935 unsigned long info_memsize; /* Amount of dual-port mem */
937 unsigned short info_bdtype; /* Board type */
938 unsigned short info_nports; /* number of ports */
939 char info_bdstate; /* board state */
940 char info_reserved[7]; /* for future expansion */
943 #define DIGI_GETBD (('d'<<8) | 249) /* get board info */
946 unsigned int info_chan; /* Channel number (0 based) */
947 unsigned int info_brd; /* Board number (0 based) */
948 unsigned long info_cflag; /* cflag for channel */
949 unsigned long info_iflag; /* iflag for channel */
950 unsigned long info_oflag; /* oflag for channel */
951 unsigned long info_mstat; /* mstat for channel */
952 unsigned long info_tx_data; /* tx_data for channel */
953 unsigned long info_rx_data; /* rx_data for channel */
954 unsigned long info_hflow; /* hflow for channel */
955 unsigned long info_reserved[8]; /* for future expansion */
958 #define DIGI_GETSTAT (('d'<<8) | 244) /* get board info */
959 /************************************************************************
961 * Structure used with ioctl commands for per-channel information
963 ************************************************************************/
965 unsigned long info_bdnum; /* Board number (0 based) */
966 unsigned long info_channel; /* Channel index number */
967 unsigned long info_ch_cflag; /* Channel cflag */
968 unsigned long info_ch_iflag; /* Channel iflag */
969 unsigned long info_ch_oflag; /* Channel oflag */
970 unsigned long info_chsize; /* Channel structure size */
971 unsigned long info_sleep_stat; /* sleep status */
972 dev_t info_dev; /* device number */
973 unsigned char info_initstate; /* Channel init state */
974 unsigned char info_running; /* Channel running state */
975 long reserved[8]; /* reserved for future use */
979 * This structure is used with the DIGI_FEPCMD ioctl to
980 * tell the driver which port to send the command for.
986 int chan; /* channel index (zero based) */
987 int bdid; /* board index (zero based) */
991 * info_sleep_stat defines
993 #define INFO_RUNWAIT 0x0001
994 #define INFO_WOPEN 0x0002
995 #define INFO_TTIOW 0x0004
996 #define INFO_CH_RWAIT 0x0008
997 #define INFO_CH_WEMPTY 0x0010
998 #define INFO_CH_WLOW 0x0020
999 #define INFO_XXBUF_BUSY 0x0040
1001 #define DIGI_GETCH (('d'<<8) | 245) /* get board info */
1003 /* Board type definitions */
1005 #define SUBTYPE 0007
1011 #define T_SP_PLUS 0005
1012 # define T_HERC 0000
1017 #define T_COMXI 0000
1021 #define T_PCLITE 0040
1025 #define T_A2K_4_8 0070
1026 #define BUSTYPE 0700
1027 #define T_ISABUS 0000
1028 #define T_MCBUS 0100
1029 #define T_EISABUS 0200
1030 #define T_PCIBUS 0400
1032 /* Board State Definitions */
1034 #define BD_RUNNING 0x0
1035 #define BD_REASON 0x7f
1036 #define BD_NOTFOUND 0x1
1037 #define BD_NOIOPORT 0x2
1038 #define BD_NOMEM 0x3
1039 #define BD_NOBIOS 0x4
1040 #define BD_NOFEP 0x5
1041 #define BD_FAILED 0x6
1042 #define BD_ALLOCATED 0x7
1043 #define BD_TRIBOOT 0x8
1044 #define BD_BADKME 0x80
1046 #define DIGI_LOOPBACK (('d'<<8) | 252) /* Enable/disable UART internal loopback */
1047 #define DIGI_SPOLL (('d'<<8) | 254) /* change poller rate */
1049 #define DIGI_SETCUSTOMBAUD _IOW('e', 106, int) /* Set integer baud rate */
1050 #define DIGI_GETCUSTOMBAUD _IOR('e', 107, int) /* Get integer baud rate */
1051 #define DIGI_RESET_PORT (('e'<<8) | 93) /* Reset port */
1053 /************************************************************************
1054 * Channel information structure.
1055 ************************************************************************/
1057 int magic; /* Channel Magic Number */
1058 struct bs_t *ch_bs; /* Base structure pointer */
1059 struct cm_t *ch_cm; /* Command queue pointer */
1060 struct board_t *ch_bd; /* Board structure pointer */
1061 unsigned char *ch_vaddr; /* FEP memory origin */
1062 unsigned char *ch_taddr; /* Write buffer origin */
1063 unsigned char *ch_raddr; /* Read buffer origin */
1064 struct digi_t ch_digi; /* Transparent Print structure */
1065 struct un_t ch_tun; /* Terminal unit info */
1066 struct un_t ch_pun; /* Printer unit info */
1068 spinlock_t ch_lock; /* provide for serialization */
1069 wait_queue_head_t ch_flags_wait;
1072 uchar pscan_savechar;
1074 u32 ch_portnum; /* Port number, 0 offset. */
1075 u32 ch_open_count; /* open count */
1076 u32 ch_flags; /* Channel flags */
1079 u32 ch_close_delay; /* How long we should drop RTS/DTR for */
1081 u32 ch_cpstime; /* Time for CPS calculations */
1083 tcflag_t ch_c_iflag; /* channel iflags */
1084 tcflag_t ch_c_cflag; /* channel cflags */
1085 tcflag_t ch_c_oflag; /* channel oflags */
1086 tcflag_t ch_c_lflag; /* channel lflags */
1088 u16 ch_fepiflag; /* FEP tty iflags */
1089 u16 ch_fepcflag; /* FEP tty cflags */
1090 u16 ch_fepoflag; /* FEP tty oflags */
1091 u16 ch_wopen; /* Waiting for open process cnt */
1092 u16 ch_tstart; /* Transmit buffer start */
1093 u16 ch_tsize; /* Transmit buffer size */
1094 u16 ch_rstart; /* Receive buffer start */
1095 u16 ch_rsize; /* Receive buffer size */
1096 u16 ch_rdelay; /* Receive delay time */
1098 u16 ch_tlw; /* Our currently set low water mark */
1100 u16 ch_cook; /* Output character mask */
1102 uchar ch_card; /* Card channel is on */
1103 uchar ch_stopc; /* Stop character */
1104 uchar ch_startc; /* Start character */
1106 uchar ch_mostat; /* FEP output modem status */
1107 uchar ch_mistat; /* FEP input modem status */
1108 uchar ch_mforce; /* Modem values to be forced */
1109 uchar ch_mval; /* Force values */
1110 uchar ch_fepstopc; /* FEP stop character */
1111 uchar ch_fepstartc; /* FEP start character */
1113 uchar ch_astopc; /* Auxiliary Stop character */
1114 uchar ch_astartc; /* Auxiliary Start character */
1115 uchar ch_fepastopc; /* Auxiliary FEP stop char */
1116 uchar ch_fepastartc; /* Auxiliary FEP start char */
1118 uchar ch_hflow; /* FEP hardware handshake */
1119 uchar ch_dsr; /* stores real dsr value */
1120 uchar ch_cd; /* stores real cd value */
1121 uchar ch_tx_win; /* channel tx buffer window */
1122 uchar ch_rx_win; /* channel rx buffer window */
1123 uint ch_custom_speed; /* Custom baud, if set */
1124 uint ch_baud_info; /* Current baud info for /proc output */
1125 ulong ch_rxcount; /* total of data received so far */
1126 ulong ch_txcount; /* total of data transmitted so far */
1127 ulong ch_err_parity; /* Count of parity errors on channel */
1128 ulong ch_err_frame; /* Count of framing errors on channel */
1129 ulong ch_err_break; /* Count of breaks on channel */
1130 ulong ch_err_overrun; /* Count of overruns on channel */
1134 char *ch_sniff_buf; /* Sniff buffer for proc */
1135 ulong ch_sniff_flags; /* Channel flags */
1136 wait_queue_head_t ch_sniff_wait;
1139 /************************************************************************
1140 * Command structure definition.
1141 ************************************************************************/
1143 volatile unsigned short cm_head; /* Command buffer head offset */
1144 volatile unsigned short cm_tail; /* Command buffer tail offset */
1145 volatile unsigned short cm_start; /* start offset of buffer */
1146 volatile unsigned short cm_max; /* last offset of buffer */
1149 /************************************************************************
1150 * Event structure definition.
1151 ************************************************************************/
1153 volatile unsigned short ev_head; /* Command buffer head offset */
1154 volatile unsigned short ev_tail; /* Command buffer tail offset */
1155 volatile unsigned short ev_start; /* start offset of buffer */
1156 volatile unsigned short ev_max; /* last offset of buffer */
1159 /************************************************************************
1160 * Download buffer structure.
1161 ************************************************************************/
1163 uchar dl_type; /* Header */
1164 uchar dl_seq; /* Download sequence */
1165 ushort dl_srev; /* Software revision number */
1166 ushort dl_lrev; /* Low revision number */
1167 ushort dl_hrev; /* High revision number */
1168 ushort dl_seg; /* Start segment address */
1169 ushort dl_size; /* Number of bytes to download */
1170 uchar dl_data[1024]; /* Download data */
1173 /************************************************************************
1174 * Per channel buffer structure
1175 ************************************************************************
1176 * Base Structure Entries Usage Meanings to Host *
1178 * W = read write R = read only *
1179 * C = changed by commands only *
1180 * U = unknown (may be changed w/o notice) *
1181 ************************************************************************/
1183 volatile unsigned short tp_jmp; /* Transmit poll jump */
1184 volatile unsigned short tc_jmp; /* Cooked procedure jump */
1185 volatile unsigned short ri_jmp; /* Not currently used */
1186 volatile unsigned short rp_jmp; /* Receive poll jump */
1188 volatile unsigned short tx_seg; /* W Tx segment */
1189 volatile unsigned short tx_head; /* W Tx buffer head offset */
1190 volatile unsigned short tx_tail; /* R Tx buffer tail offset */
1191 volatile unsigned short tx_max; /* W Tx buffer size - 1 */
1193 volatile unsigned short rx_seg; /* W Rx segment */
1194 volatile unsigned short rx_head; /* W Rx buffer head offset */
1195 volatile unsigned short rx_tail; /* R Rx buffer tail offset */
1196 volatile unsigned short rx_max; /* W Rx buffer size - 1 */
1198 volatile unsigned short tx_lw; /* W Tx buffer low water mark */
1199 volatile unsigned short rx_lw; /* W Rx buffer low water mark */
1200 volatile unsigned short rx_hw; /* W Rx buffer high water mark */
1201 volatile unsigned short incr; /* W Increment to next channel */
1203 volatile unsigned short fepdev; /* U SCC device base address */
1204 volatile unsigned short edelay; /* W Exception delay */
1205 volatile unsigned short blen; /* W Break length */
1206 volatile unsigned short btime; /* U Break complete time */
1208 volatile unsigned short iflag; /* C UNIX input flags */
1209 volatile unsigned short oflag; /* C UNIX output flags */
1210 volatile unsigned short cflag; /* C UNIX control flags */
1211 volatile unsigned short wfill[13]; /* U Reserved for expansion */
1213 volatile unsigned char num; /* U Channel number */
1214 volatile unsigned char ract; /* U Receiver active counter */
1215 volatile unsigned char bstat; /* U Break status bits */
1216 volatile unsigned char tbusy; /* W Transmit busy */
1217 volatile unsigned char iempty; /* W Transmit empty event enable */
1218 volatile unsigned char ilow; /* W Transmit low-water event enable */
1219 volatile unsigned char idata; /* W Receive data interrupt enable */
1220 volatile unsigned char eflag; /* U Host event flags */
1222 volatile unsigned char tflag; /* U Transmit flags */
1223 volatile unsigned char rflag; /* U Receive flags */
1224 volatile unsigned char xmask; /* U Transmit ready flags */
1225 volatile unsigned char xval; /* U Transmit ready value */
1226 volatile unsigned char m_stat; /* RC Modem status bits */
1227 volatile unsigned char m_change; /* U Modem bits which changed */
1228 volatile unsigned char m_int; /* W Modem interrupt enable bits */
1229 volatile unsigned char m_last; /* U Last modem status */
1231 volatile unsigned char mtran; /* C Unreported modem trans */
1232 volatile unsigned char orun; /* C Buffer overrun occurred */
1233 volatile unsigned char astartc; /* W Auxiliary Xon char */
1234 volatile unsigned char astopc; /* W Auxiliary Xoff char */
1235 volatile unsigned char startc; /* W Xon character */
1236 volatile unsigned char stopc; /* W Xoff character */
1237 volatile unsigned char vnextc; /* W Vnext character */
1238 volatile unsigned char hflow; /* C Software flow control */
1240 volatile unsigned char fillc; /* U Delay Fill character */
1241 volatile unsigned char ochar; /* U Saved output character */
1242 volatile unsigned char omask; /* U Output character mask */
1244 volatile unsigned char bfill[13]; /* U Reserved for expansion */
1246 volatile unsigned char scc[16]; /* U SCC registers */
1256 char type; /* Board Type */
1257 short port; /* I/O Address */
1258 char *portstr; /* I/O Address in string */
1259 long addr; /* Memory Address */
1260 char *addrstr; /* Memory Address in string */
1261 long pcibus; /* PCI BUS */
1262 char *pcibusstr; /* PCI BUS in string */
1263 long pcislot; /* PCI SLOT */
1264 char *pcislotstr; /* PCI SLOT in string */
1265 char nport; /* Number of Ports */
1266 char *id; /* tty id */
1267 int start; /* start of tty counting */
1268 char *method; /* Install method */
1280 char conc1; /* total concs in line1 */
1281 char conc2; /* total concs in line2 */
1282 char module1; /* total modules for line1 */
1283 char module2; /* total modules for line2 */
1284 char *status; /* config status */
1285 char *dimstatus; /* Y/N */
1286 int status_index; /* field pointer */