2 * Copyright 2003 Digi International (www.digi.com)
3 * Scott H Kilau <Scott_Kilau at digi dot com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2, or (at your option)
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
12 * implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
13 * PURPOSE. See the GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 * NOTE: THIS IS A SHARED HEADER. DO NOT CHANGE CODING STYLE!!!
21 *************************************************************************
25 *************************************************************************/
27 #ifndef __DGAP_DRIVER_H
28 #define __DGAP_DRIVER_H
30 #include <linux/types.h> /* To pick up the varions Linux types */
31 #include <linux/tty.h> /* To pick up the various tty structs/defines */
32 #include <linux/interrupt.h> /* For irqreturn_t type */
34 #include "dgap_types.h" /* Additional types needed by the Digi header files */
35 #include "digi.h" /* Digi specific ioctl header */
36 #include "dgap_kcompat.h" /* Kernel 2.4/2.6 compat includes */
38 /*************************************************************************
42 *************************************************************************/
45 * Driver identification, error and debugging statments
47 * In theory, you can change all occurrences of "digi" in the next
48 * three lines, and the driver printk's will all automagically change.
50 * APR((fmt, args, ...)); Always prints message
51 * DPR((fmt, args, ...)); Only prints if DGAP_TRACER is defined at
52 * compile time and dgap_debug!=0
54 #define DG_NAME "dgap-1.3-16"
55 #define DG_PART "40002347_C"
57 #define PROCSTR "dgap" /* /proc entries */
58 #define DEVSTR "/dev/dg/dgap" /* /dev entries */
59 #define DRVSTR "dgap" /* Driver name string
61 #define APR(args) do { PRINTF_TO_KMEM(args); printk(DRVSTR": "); printk args; \
63 #define RAPR(args) do { PRINTF_TO_KMEM(args); printk args; } while (0)
65 #define TRC_TO_CONSOLE 1
68 * defines from dgap_pci.h
70 #define PCIMAX 32 /* maximum number of PCI boards */
72 #define DIGI_VID 0x114F
74 #define PCI_DEVICE_EPC_DID 0x0002
75 #define PCI_DEVICE_XEM_DID 0x0004
76 #define PCI_DEVICE_XR_DID 0x0005
77 #define PCI_DEVICE_CX_DID 0x0006
78 #define PCI_DEVICE_XRJ_DID 0x0009 /* PLX-based Xr adapter */
79 #define PCI_DEVICE_XR_IBM_DID 0x0011 /* IBM 8-port Async Adapter */
80 #define PCI_DEVICE_XR_BULL_DID 0x0013 /* BULL 8-port Async Adapter */
81 #define PCI_DEVICE_XR_SAIP_DID 0x001c /* SAIP card - Xr adapter */
82 #define PCI_DEVICE_XR_422_DID 0x0012 /* Xr-422 */
83 #define PCI_DEVICE_920_2_DID 0x0034 /* XR-Plus 920 K, 2 port */
84 #define PCI_DEVICE_920_4_DID 0x0026 /* XR-Plus 920 K, 4 port */
85 #define PCI_DEVICE_920_8_DID 0x0027 /* XR-Plus 920 K, 8 port */
86 #define PCI_DEVICE_EPCJ_DID 0x000a /* PLX 9060 chip for PCI */
87 #define PCI_DEVICE_CX_IBM_DID 0x001b /* IBM 128-port Async Adapter */
88 #define PCI_DEVICE_920_8_HP_DID 0x0058 /* HP XR-Plus 920 K, 8 port */
89 #define PCI_DEVICE_XEM_HP_DID 0x0059 /* HP Xem PCI */
91 #define PCI_DEVICE_XEM_NAME "AccelePort XEM"
92 #define PCI_DEVICE_CX_NAME "AccelePort CX"
93 #define PCI_DEVICE_XR_NAME "AccelePort Xr"
94 #define PCI_DEVICE_XRJ_NAME "AccelePort Xr (PLX)"
95 #define PCI_DEVICE_XR_SAIP_NAME "AccelePort Xr (SAIP)"
96 #define PCI_DEVICE_920_2_NAME "AccelePort Xr920 2 port"
97 #define PCI_DEVICE_920_4_NAME "AccelePort Xr920 4 port"
98 #define PCI_DEVICE_920_8_NAME "AccelePort Xr920 8 port"
99 #define PCI_DEVICE_XR_422_NAME "AccelePort Xr 422"
100 #define PCI_DEVICE_EPCJ_NAME "AccelePort EPC (PLX)"
101 #define PCI_DEVICE_XR_BULL_NAME "AccelePort Xr (BULL)"
102 #define PCI_DEVICE_XR_IBM_NAME "AccelePort Xr (IBM)"
103 #define PCI_DEVICE_CX_IBM_NAME "AccelePort CX (IBM)"
104 #define PCI_DEVICE_920_8_HP_NAME "AccelePort Xr920 8 port (HP)"
105 #define PCI_DEVICE_XEM_HP_NAME "AccelePort XEM (HP)"
108 * On the PCI boards, there is no IO space allocated
109 * The I/O registers will be in the first 3 bytes of the
110 * upper 2MB of the 4MB memory space. The board memory
111 * will be mapped into the low 2MB of the 4MB memory space
114 /* Potential location of PCI Bios from E0000 to FFFFF*/
115 #define PCI_BIOS_SIZE 0x00020000
117 /* Size of Memory and I/O for PCI (4MB) */
118 #define PCI_RAM_SIZE 0x00400000
120 /* Size of Memory (2MB) */
121 #define PCI_MEM_SIZE 0x00200000
123 /* Max PCI Window Size (2MB) */
124 #define PCI_WIN_SIZE 0x00200000
126 #define PCI_WIN_SHIFT 21 /* 21 bits max */
128 /* Offset of I/0 in Memory (2MB) */
129 #define PCI_IO_OFFSET 0x00200000
131 /* Size of IO (2MB) */
132 #define PCI_IO_SIZE 0x00200000
135 * Debugging levels can be set using debug insmod variable
136 * They can also be compiled out completely.
139 #define DBG_INIT (dgap_debug & 0x01)
140 #define DBG_BASIC (dgap_debug & 0x02)
141 #define DBG_CORE (dgap_debug & 0x04)
143 #define DBG_OPEN (dgap_debug & 0x08)
144 #define DBG_CLOSE (dgap_debug & 0x10)
145 #define DBG_READ (dgap_debug & 0x20)
146 #define DBG_WRITE (dgap_debug & 0x40)
148 #define DBG_IOCTL (dgap_debug & 0x80)
150 #define DBG_PROC (dgap_debug & 0x100)
151 #define DBG_PARAM (dgap_debug & 0x200)
152 #define DBG_PSCAN (dgap_debug & 0x400)
153 #define DBG_EVENT (dgap_debug & 0x800)
155 #define DBG_DRAIN (dgap_debug & 0x1000)
156 #define DBG_CARR (dgap_debug & 0x2000)
158 #define DBG_MGMT (dgap_debug & 0x4000)
161 #if defined(DGAP_TRACER)
163 # if defined(TRC_TO_KMEM)
165 # define TRC_ON_OVERFLOW_WRAP_AROUND
166 # undef TRC_ON_OVERFLOW_SHIFT_BUFFER
167 # endif //TRC_TO_KMEM
169 # define TRC_MAXMSG 1024
170 # define TRC_OVERFLOW "(OVERFLOW)"
171 # define TRC_DTRC "/usr/bin/dtrc"
173 #if defined TRC_TO_CONSOLE
174 #define PRINTF_TO_CONSOLE(args) { printk(DRVSTR": "); printk args; }
175 #else //!defined TRACE_TO_CONSOLE
176 #define PRINTF_TO_CONSOLE(args)
179 #if defined TRC_TO_KMEM
180 #define PRINTF_TO_KMEM(args) dgap_tracef args
181 #else //!defined TRC_TO_KMEM
182 #define PRINTF_TO_KMEM(args)
185 #define TRC(args) { PRINTF_TO_KMEM(args); PRINTF_TO_CONSOLE(args) }
187 # define DPR_INIT(ARGS) if (DBG_INIT) TRC(ARGS)
188 # define DPR_BASIC(ARGS) if (DBG_BASIC) TRC(ARGS)
189 # define DPR_CORE(ARGS) if (DBG_CORE) TRC(ARGS)
190 # define DPR_OPEN(ARGS) if (DBG_OPEN) TRC(ARGS)
191 # define DPR_CLOSE(ARGS) if (DBG_CLOSE) TRC(ARGS)
192 # define DPR_READ(ARGS) if (DBG_READ) TRC(ARGS)
193 # define DPR_WRITE(ARGS) if (DBG_WRITE) TRC(ARGS)
194 # define DPR_IOCTL(ARGS) if (DBG_IOCTL) TRC(ARGS)
195 # define DPR_PROC(ARGS) if (DBG_PROC) TRC(ARGS)
196 # define DPR_PARAM(ARGS) if (DBG_PARAM) TRC(ARGS)
197 # define DPR_PSCAN(ARGS) if (DBG_PSCAN) TRC(ARGS)
198 # define DPR_EVENT(ARGS) if (DBG_EVENT) TRC(ARGS)
199 # define DPR_DRAIN(ARGS) if (DBG_DRAIN) TRC(ARGS)
200 # define DPR_CARR(ARGS) if (DBG_CARR) TRC(ARGS)
201 # define DPR_MGMT(ARGS) if (DBG_MGMT) TRC(ARGS)
203 # define DPR(ARGS) if (dgap_debug) TRC(ARGS)
204 # define P(X) dgap_tracef(#X "=%p\n", X)
205 # define X(X) dgap_tracef(#X "=%x\n", X)
207 #else//!defined DGAP_TRACER
209 #define PRINTF_TO_KMEM(args)
211 # define DPR_INIT(ARGS)
212 # define DPR_BASIC(ARGS)
213 # define DPR_CORE(ARGS)
214 # define DPR_OPEN(ARGS)
215 # define DPR_CLOSE(ARGS)
216 # define DPR_READ(ARGS)
217 # define DPR_WRITE(ARGS)
218 # define DPR_IOCTL(ARGS)
219 # define DPR_PROC(ARGS)
220 # define DPR_PARAM(ARGS)
221 # define DPR_PSCAN(ARGS)
222 # define DPR_EVENT(ARGS)
223 # define DPR_DRAIN(ARGS)
224 # define DPR_CARR(ARGS)
225 # define DPR_MGMT(ARGS)
231 /* Number of boards we support at once. */
234 #define MAXTTYNAMELEN 200
236 /* Our 3 magic numbers for our board, channel and unit structs */
237 #define DGAP_BOARD_MAGIC 0x5c6df104
238 #define DGAP_CHANNEL_MAGIC 0x6c6df104
239 #define DGAP_UNIT_MAGIC 0x7c6df104
241 /* Serial port types */
242 #define DGAP_SERIAL 0
245 #define SERIAL_TYPE_NORMAL 1
247 /* 4 extra for alignment play space */
248 #define WRITEBUFLEN ((4096) + 4)
249 #define MYFLIPLEN N_TTY_BUF_SIZE
251 #define SBREAK_TIME 0x25
252 #define U2BSIZE 0x400
254 #define dgap_jiffies_from_ms(a) (((a) * HZ) / 1000)
257 * Our major for the mgmt devices.
259 * We can use 22, because Digi was allocated 22 and 23 for the epca driver.
260 * 22 has now become obsolete now that the "cu" devices have
261 * been removed from 2.6.
262 * Also, this *IS* the epca driver, just PCI only now.
264 #ifndef DIGI_DGAP_MAJOR
265 # define DIGI_DGAP_MAJOR 22
269 * The parameters we use to define the periods of the moving averages.
271 #define MA_PERIOD (HZ / 10)
272 #define SMA_DUR (1 * HZ)
273 #define EMA_DUR (1 * HZ)
274 #define SMA_NPERIODS (SMA_DUR / MA_PERIOD)
275 #define EMA_NPERIODS (EMA_DUR / MA_PERIOD)
278 * Define a local default termios struct. All ports will be created
279 * with this termios initially. This is the same structure that is defined
280 * as the default in tty_io.c with the same settings overriden as in serial.c
282 * In short, this should match the internal serial ports' defaults.
284 #define DEFAULT_IFLAGS (ICRNL | IXON)
285 #define DEFAULT_OFLAGS (OPOST | ONLCR)
286 #define DEFAULT_CFLAGS (B9600 | CS8 | CREAD | HUPCL | CLOCAL)
287 #define DEFAULT_LFLAGS (ISIG | ICANON | ECHO | ECHOE | ECHOK | \
288 ECHOCTL | ECHOKE | IEXTEN)
290 #ifndef _POSIX_VDISABLE
291 #define _POSIX_VDISABLE '\0'
294 #define SNIFF_MAX 65536 /* Sniff buffer size (2^n) */
295 #define SNIFF_MASK (SNIFF_MAX - 1) /* Sniff wrap mask */
297 #define VPDSIZE (512)
300 * Lock function/defines.
301 * Makes spotting lock/unlock locations easier.
303 # define DGAP_SPINLOCK_INIT(x) spin_lock_init(&(x))
304 # define DGAP_LOCK(x,y) spin_lock_irqsave(&(x), y)
305 # define DGAP_UNLOCK(x,y) spin_unlock_irqrestore(&(x), y)
306 # define DGAP_TRYLOCK(x,y) spin_trylock(&(x))
308 /************************************************************************
310 ************************************************************************/
311 #define START 0x0004L /* Execution start address */
313 #define CMDBUF 0x0d10L /* Command (cm_t) structure offset */
314 #define CMDSTART 0x0400L /* Start of command buffer */
315 #define CMDMAX 0x0800L /* End of command buffer */
317 #define EVBUF 0x0d18L /* Event (ev_t) structure */
318 #define EVSTART 0x0800L /* Start of event buffer */
319 #define EVMAX 0x0c00L /* End of event buffer */
320 #define FEP5_PLUS 0x0E40 /* ASCII '5' and ASCII 'A' is here */
321 #define ECS_SEG 0x0E44 /* Segment of the extended channel structure */
322 #define LINE_SPEED 0x10 /* Offset into ECS_SEG for line speed */
323 /* if the fep has extended capabilities */
325 /* BIOS MAGIC SPOTS */
326 #define ERROR 0x0C14L /* BIOS error code */
327 #define SEQUENCE 0x0C12L /* BIOS sequence indicator */
328 #define POSTAREA 0x0C00L /* POST complete message area */
330 /* FEP MAGIC SPOTS */
331 #define FEPSTAT POSTAREA /* OS here when FEP comes up */
332 #define NCHAN 0x0C02L /* number of ports FEP sees */
333 #define PANIC 0x0C10L /* PANIC area for FEP */
334 #define KMEMEM 0x0C30L /* Memory for KME use */
335 #define CONFIG 0x0CD0L /* Concentrator configuration info */
336 #define CONFIGSIZE 0x0030 /* configuration info size */
337 #define DOWNREQ 0x0D00 /* Download request buffer pointer */
339 #define CHANBUF 0x1000L /* Async channel (bs_t) structs */
340 #define FEPOSSIZE 0x1FFF /* 8K FEPOS */
342 #define XEMPORTS 0xC02 /*
343 * Offset in board memory where FEP5 stores
344 * how many ports it has detected.
345 * NOTE: FEP5 reports 64 ports when the user
346 * has the cable in EBI OUT instead of EBI IN.
356 #define LOWMEM 0x0100
357 #define HIGHMEM 0x7f00
359 #define FEPTIMEOUT 200000
361 #define ENABLE_INTR 0x0e04 /* Enable interrupts flag */
362 #define FEPPOLL_MIN 1 /* minimum of 1 millisecond */
363 #define FEPPOLL_MAX 20 /* maximum of 20 milliseconds */
364 #define FEPPOLL 0x0c26 /* Fep event poll interval */
366 #define IALTPIN 0x0080 /* Input flag to swap DSR <-> DCD */
368 /************************************************************************
369 * FEP supported functions
370 ************************************************************************/
371 #define SRLOW 0xe0 /* Set receive low water */
372 #define SRHIGH 0xe1 /* Set receive high water */
373 #define FLUSHTX 0xe2 /* Flush transmit buffer */
374 #define PAUSETX 0xe3 /* Pause data transmission */
375 #define RESUMETX 0xe4 /* Resume data transmission */
376 #define SMINT 0xe5 /* Set Modem Interrupt */
377 #define SAFLOWC 0xe6 /* Set Aux. flow control chars */
378 #define SBREAK 0xe8 /* Send break */
379 #define SMODEM 0xe9 /* Set 8530 modem control lines */
380 #define SIFLAG 0xea /* Set UNIX iflags */
381 #define SFLOWC 0xeb /* Set flow control characters */
382 #define STLOW 0xec /* Set transmit low water mark */
383 #define RPAUSE 0xee /* Pause receive */
384 #define RRESUME 0xef /* Resume receive */
385 #define CHRESET 0xf0 /* Reset Channel */
386 #define BUFSETALL 0xf2 /* Set Tx & Rx buffer size avail*/
387 #define SOFLAG 0xf3 /* Set UNIX oflags */
388 #define SHFLOW 0xf4 /* Set hardware handshake */
389 #define SCFLAG 0xf5 /* Set UNIX cflags */
390 #define SVNEXT 0xf6 /* Set VNEXT character */
391 #define SPINTFC 0xfc /* Reserved */
392 #define SCOMMODE 0xfd /* Set RS232/422 mode */
395 /************************************************************************
397 ************************************************************************/
398 #define MODE_232 0x00
399 #define MODE_422 0x01
402 /************************************************************************
404 ************************************************************************/
405 #define IFBREAK 0x01 /* Break received */
406 #define IFTLW 0x02 /* Transmit low water */
407 #define IFTEM 0x04 /* Transmitter empty */
408 #define IFDATA 0x08 /* Receive data present */
409 #define IFMODEM 0x20 /* Modem status change */
411 /************************************************************************
413 ************************************************************************/
414 # define DM_RTS 0x02 /* Request to send */
415 # define DM_CD 0x80 /* Carrier detect */
416 # define DM_DSR 0x20 /* Data set ready */
417 # define DM_CTS 0x10 /* Clear to send */
418 # define DM_RI 0x40 /* Ring indicator */
419 # define DM_DTR 0x01 /* Data terminal ready */
422 * All the possible states the driver can be while being loaded.
425 DRIVER_INITIALIZED = 0,
426 DRIVER_NEED_CONFIG_LOAD,
427 DRIVER_REQUESTED_CONFIG,
432 * All the possible states the board can be while booting up.
442 NEED_DEVICE_CREATION,
443 REQUESTED_DEVICE_CREATION,
444 FINISHED_DEVICE_CREATION,
454 FINISHED_PROC_CREATION,
459 * All the possible states that a requested concentrator image can be in.
462 NO_PENDING_CONCENTRATOR_REQUESTS = 0,
464 REQUESTED_CONCENTRATOR
467 extern char *dgap_state_text[];
468 extern char *dgap_driver_state_text[];
472 * Modem line constants are defined as macros because DSR and
473 * DCD are swapable using the ditty altpin option.
475 #define D_CD(ch) ch->ch_cd /* Carrier detect */
476 #define D_DSR(ch) ch->ch_dsr /* Data set ready */
477 #define D_RTS(ch) DM_RTS /* Request to send */
478 #define D_CTS(ch) DM_CTS /* Clear to send */
479 #define D_RI(ch) DM_RI /* Ring indicator */
480 #define D_DTR(ch) DM_DTR /* Data terminal ready */
483 /*************************************************************************
485 * Structures and closely related defines.
487 *************************************************************************/
491 * A structure to hold a statistics counter. We also
492 * compute moving averages for this counter.
496 u32 cnt; /* Total count */
497 ulong accum; /* Acuumulator per period */
498 ulong sma; /* Simple moving average */
499 ulong ema; /* Exponential moving average */
503 /************************************************************************
504 * Device flag definitions for bd_flags.
505 ************************************************************************/
506 #define BD_FEP5PLUS 0x0001 /* Supports FEP5 Plus commands */
507 #define BD_HAS_VPD 0x0002 /* Board has VPD info available */
511 * Per-board information
515 int magic; /* Board Magic number. */
516 int boardnum; /* Board number: 0-3 */
517 int firstminor; /* First minor, e.g. 0, 30, 60 */
519 int type; /* Type of board */
520 char *name; /* Product Name */
521 struct pci_dev *pdev; /* Pointer to the pci_dev struct */
522 u16 vendor; /* PCI vendor ID */
523 u16 device; /* PCI device ID */
524 u16 subvendor; /* PCI subsystem vendor ID */
525 u16 subdevice; /* PCI subsystem device ID */
526 uchar rev; /* PCI revision ID */
527 uint pci_bus; /* PCI bus value */
528 uint pci_slot; /* PCI slot value */
529 u16 maxports; /* MAX ports this board can handle */
530 uchar vpd[VPDSIZE]; /* VPD of board, if found */
531 u32 bd_flags; /* Board flags */
533 spinlock_t bd_lock; /* Used to protect board */
535 u32 state; /* State of card. */
536 wait_queue_head_t state_wait; /* Place to sleep on for state change */
538 struct tasklet_struct helper_tasklet; /* Poll helper tasklet */
543 struct cnode * bd_config; /* Config of board */
545 u16 nasync; /* Number of ports on card */
547 u32 use_interrupts; /* Should we be interrupt driven? */
548 ulong irq; /* Interrupt request number */
549 ulong intr_count; /* Count of interrupts */
550 u32 intr_used; /* Non-zero if using interrupts */
551 u32 intr_running; /* Non-zero if FEP knows its doing interrupts */
553 ulong port; /* Start of base io port of the card */
554 ulong port_end; /* End of base io port of the card */
555 ulong membase; /* Start of base memory of the card */
556 ulong membase_end; /* End of base memory of the card */
558 uchar *re_map_port; /* Remapped io port of the card */
559 uchar *re_map_membase;/* Remapped memory of the card */
561 uchar runwait; /* # Processes waiting for FEP */
562 uchar inhibit_poller; /* Tells the poller to leave us alone */
564 struct channel_t *channels[MAXPORTS]; /* array of pointers to our channels. */
566 struct tty_driver *SerialDriver;
567 char SerialName[200];
568 struct tty_driver *PrintDriver;
571 u32 dgap_Major_Serial_Registered;
572 u32 dgap_Major_TransparentPrint_Registered;
574 u32 dgap_Serial_Major;
575 u32 dgap_TransparentPrint_Major;
577 struct bs_t *bd_bs; /* Base structure pointer */
579 char *flipbuf; /* Our flip buffer, alloced if board is found */
580 char *flipflagbuf; /* Our flip flag buffer, alloced if board is found */
582 u16 dpatype; /* The board "type", as defined by DPA */
583 u16 dpastatus; /* The board "status", as defined by DPA */
584 wait_queue_head_t kme_wait; /* Needed for DPA support */
586 u32 conc_dl_status; /* Status of any pending conc download */
596 /************************************************************************
597 * Unit flag definitions for un_flags.
598 ************************************************************************/
599 #define UN_ISOPEN 0x0001 /* Device is open */
600 #define UN_CLOSING 0x0002 /* Line is being closed */
601 #define UN_IMM 0x0004 /* Service immediately */
602 #define UN_BUSY 0x0008 /* Some work this channel */
603 #define UN_BREAKI 0x0010 /* Input break received */
604 #define UN_PWAIT 0x0020 /* Printer waiting for terminal */
605 #define UN_TIME 0x0040 /* Waiting on time */
606 #define UN_EMPTY 0x0080 /* Waiting output queue empty */
607 #define UN_LOW 0x0100 /* Waiting output low water mark*/
608 #define UN_EXCL_OPEN 0x0200 /* Open for exclusive use */
609 #define UN_WOPEN 0x0400 /* Device waiting for open */
610 #define UN_WIOCTL 0x0800 /* Device waiting for open */
611 #define UN_HANGUP 0x8000 /* Carrier lost */
615 /************************************************************************
616 * Structure for terminal or printer unit.
617 ************************************************************************/
619 int magic; /* Unit Magic Number. */
620 struct channel_t *un_ch;
623 u32 un_open_count; /* Counter of opens to port */
624 struct tty_struct *un_tty;/* Pointer to unit tty structure */
625 u32 un_flags; /* Unit flags */
626 wait_queue_head_t un_flags_wait; /* Place to sleep to wait on unit */
627 u32 un_dev; /* Minor device number */
628 tcflag_t un_oflag; /* oflags being done on board */
629 tcflag_t un_lflag; /* lflags being done on board */
630 struct device *un_sysfs;
634 /************************************************************************
635 * Device flag definitions for ch_flags.
636 ************************************************************************/
637 #define CH_PRON 0x0001 /* Printer on string */
638 #define CH_OUT 0x0002 /* Dial-out device open */
639 #define CH_STOP 0x0004 /* Output is stopped */
640 #define CH_STOPI 0x0008 /* Input is stopped */
641 #define CH_CD 0x0010 /* Carrier is present */
642 #define CH_FCAR 0x0020 /* Carrier forced on */
644 #define CH_RXBLOCK 0x0080 /* Enable rx blocked flag */
645 #define CH_WLOW 0x0100 /* Term waiting low event */
646 #define CH_WEMPTY 0x0200 /* Term waiting empty event */
647 #define CH_RENABLE 0x0400 /* Buffer just emptied */
648 #define CH_RACTIVE 0x0800 /* Process active in xxread() */
649 #define CH_RWAIT 0x1000 /* Process waiting in xxread() */
650 #define CH_BAUD0 0x2000 /* Used for checking B0 transitions */
651 #define CH_HANGUP 0x8000 /* Hangup received */
654 * Definitions for ch_sniff_flags
656 #define SNIFF_OPEN 0x1
657 #define SNIFF_WAIT_DATA 0x2
658 #define SNIFF_WAIT_SPACE 0x4
661 /************************************************************************
662 * Channel information structure.
663 ************************************************************************/
665 int magic; /* Channel Magic Number */
666 struct bs_t *ch_bs; /* Base structure pointer */
667 struct cm_t *ch_cm; /* Command queue pointer */
668 struct board_t *ch_bd; /* Board structure pointer */
669 unsigned char *ch_vaddr; /* FEP memory origin */
670 unsigned char *ch_taddr; /* Write buffer origin */
671 unsigned char *ch_raddr; /* Read buffer origin */
672 struct digi_t ch_digi; /* Transparent Print structure */
673 struct un_t ch_tun; /* Terminal unit info */
674 struct un_t ch_pun; /* Printer unit info */
676 spinlock_t ch_lock; /* provide for serialization */
677 wait_queue_head_t ch_flags_wait;
680 uchar pscan_savechar;
682 u32 ch_portnum; /* Port number, 0 offset. */
683 u32 ch_open_count; /* open count */
684 u32 ch_flags; /* Channel flags */
687 u32 ch_close_delay; /* How long we should drop RTS/DTR for */
689 u32 ch_cpstime; /* Time for CPS calculations */
691 tcflag_t ch_c_iflag; /* channel iflags */
692 tcflag_t ch_c_cflag; /* channel cflags */
693 tcflag_t ch_c_oflag; /* channel oflags */
694 tcflag_t ch_c_lflag; /* channel lflags */
696 u16 ch_fepiflag; /* FEP tty iflags */
697 u16 ch_fepcflag; /* FEP tty cflags */
698 u16 ch_fepoflag; /* FEP tty oflags */
699 u16 ch_wopen; /* Waiting for open process cnt */
700 u16 ch_tstart; /* Transmit buffer start */
701 u16 ch_tsize; /* Transmit buffer size */
702 u16 ch_rstart; /* Receive buffer start */
703 u16 ch_rsize; /* Receive buffer size */
704 u16 ch_rdelay; /* Receive delay time */
706 u16 ch_tlw; /* Our currently set low water mark */
708 u16 ch_cook; /* Output character mask */
710 uchar ch_card; /* Card channel is on */
711 uchar ch_stopc; /* Stop character */
712 uchar ch_startc; /* Start character */
714 uchar ch_mostat; /* FEP output modem status */
715 uchar ch_mistat; /* FEP input modem status */
716 uchar ch_mforce; /* Modem values to be forced */
717 uchar ch_mval; /* Force values */
718 uchar ch_fepstopc; /* FEP stop character */
719 uchar ch_fepstartc; /* FEP start character */
721 uchar ch_astopc; /* Auxiliary Stop character */
722 uchar ch_astartc; /* Auxiliary Start character */
723 uchar ch_fepastopc; /* Auxiliary FEP stop char */
724 uchar ch_fepastartc; /* Auxiliary FEP start char */
726 uchar ch_hflow; /* FEP hardware handshake */
727 uchar ch_dsr; /* stores real dsr value */
728 uchar ch_cd; /* stores real cd value */
729 uchar ch_tx_win; /* channel tx buffer window */
730 uchar ch_rx_win; /* channel rx buffer window */
731 uint ch_custom_speed; /* Custom baud, if set */
732 uint ch_baud_info; /* Current baud info for /proc output */
733 ulong ch_rxcount; /* total of data received so far */
734 ulong ch_txcount; /* total of data transmitted so far */
735 ulong ch_err_parity; /* Count of parity errors on channel */
736 ulong ch_err_frame; /* Count of framing errors on channel */
737 ulong ch_err_break; /* Count of breaks on channel */
738 ulong ch_err_overrun; /* Count of overruns on channel */
742 char *ch_sniff_buf; /* Sniff buffer for proc */
743 ulong ch_sniff_flags; /* Channel flags */
744 wait_queue_head_t ch_sniff_wait;
747 /************************************************************************
748 * Command structure definition.
749 ************************************************************************/
751 volatile unsigned short cm_head; /* Command buffer head offset */
752 volatile unsigned short cm_tail; /* Command buffer tail offset */
753 volatile unsigned short cm_start; /* start offset of buffer */
754 volatile unsigned short cm_max; /* last offset of buffer */
757 /************************************************************************
758 * Event structure definition.
759 ************************************************************************/
761 volatile unsigned short ev_head; /* Command buffer head offset */
762 volatile unsigned short ev_tail; /* Command buffer tail offset */
763 volatile unsigned short ev_start; /* start offset of buffer */
764 volatile unsigned short ev_max; /* last offset of buffer */
767 /************************************************************************
768 * Download buffer structure.
769 ************************************************************************/
771 uchar dl_type; /* Header */
772 uchar dl_seq; /* Download sequence */
773 ushort dl_srev; /* Software revision number */
774 ushort dl_lrev; /* Low revision number */
775 ushort dl_hrev; /* High revision number */
776 ushort dl_seg; /* Start segment address */
777 ushort dl_size; /* Number of bytes to download */
778 uchar dl_data[1024]; /* Download data */
781 /************************************************************************
782 * Per channel buffer structure
783 ************************************************************************
784 * Base Structure Entries Usage Meanings to Host *
786 * W = read write R = read only *
787 * C = changed by commands only *
788 * U = unknown (may be changed w/o notice) *
789 ************************************************************************/
791 volatile unsigned short tp_jmp; /* Transmit poll jump */
792 volatile unsigned short tc_jmp; /* Cooked procedure jump */
793 volatile unsigned short ri_jmp; /* Not currently used */
794 volatile unsigned short rp_jmp; /* Receive poll jump */
796 volatile unsigned short tx_seg; /* W Tx segment */
797 volatile unsigned short tx_head; /* W Tx buffer head offset */
798 volatile unsigned short tx_tail; /* R Tx buffer tail offset */
799 volatile unsigned short tx_max; /* W Tx buffer size - 1 */
801 volatile unsigned short rx_seg; /* W Rx segment */
802 volatile unsigned short rx_head; /* W Rx buffer head offset */
803 volatile unsigned short rx_tail; /* R Rx buffer tail offset */
804 volatile unsigned short rx_max; /* W Rx buffer size - 1 */
806 volatile unsigned short tx_lw; /* W Tx buffer low water mark */
807 volatile unsigned short rx_lw; /* W Rx buffer low water mark */
808 volatile unsigned short rx_hw; /* W Rx buffer high water mark */
809 volatile unsigned short incr; /* W Increment to next channel */
811 volatile unsigned short fepdev; /* U SCC device base address */
812 volatile unsigned short edelay; /* W Exception delay */
813 volatile unsigned short blen; /* W Break length */
814 volatile unsigned short btime; /* U Break complete time */
816 volatile unsigned short iflag; /* C UNIX input flags */
817 volatile unsigned short oflag; /* C UNIX output flags */
818 volatile unsigned short cflag; /* C UNIX control flags */
819 volatile unsigned short wfill[13]; /* U Reserved for expansion */
821 volatile unsigned char num; /* U Channel number */
822 volatile unsigned char ract; /* U Receiver active counter */
823 volatile unsigned char bstat; /* U Break status bits */
824 volatile unsigned char tbusy; /* W Transmit busy */
825 volatile unsigned char iempty; /* W Transmit empty event enable */
826 volatile unsigned char ilow; /* W Transmit low-water event enable */
827 volatile unsigned char idata; /* W Receive data interrupt enable */
828 volatile unsigned char eflag; /* U Host event flags */
830 volatile unsigned char tflag; /* U Transmit flags */
831 volatile unsigned char rflag; /* U Receive flags */
832 volatile unsigned char xmask; /* U Transmit ready flags */
833 volatile unsigned char xval; /* U Transmit ready value */
834 volatile unsigned char m_stat; /* RC Modem status bits */
835 volatile unsigned char m_change; /* U Modem bits which changed */
836 volatile unsigned char m_int; /* W Modem interrupt enable bits */
837 volatile unsigned char m_last; /* U Last modem status */
839 volatile unsigned char mtran; /* C Unreported modem trans */
840 volatile unsigned char orun; /* C Buffer overrun occurred */
841 volatile unsigned char astartc; /* W Auxiliary Xon char */
842 volatile unsigned char astopc; /* W Auxiliary Xoff char */
843 volatile unsigned char startc; /* W Xon character */
844 volatile unsigned char stopc; /* W Xoff character */
845 volatile unsigned char vnextc; /* W Vnext character */
846 volatile unsigned char hflow; /* C Software flow control */
848 volatile unsigned char fillc; /* U Delay Fill character */
849 volatile unsigned char ochar; /* U Saved output character */
850 volatile unsigned char omask; /* U Output character mask */
852 volatile unsigned char bfill[13]; /* U Reserved for expansion */
854 volatile unsigned char scc[16]; /* U SCC registers */
857 /*************************************************************************
859 * Prototypes for non-static functions used in more than one module
861 *************************************************************************/
863 extern int dgap_ms_sleep(ulong ms);
864 extern char *dgap_ioctl_name(int cmd);
865 extern void dgap_do_bios_load(struct board_t *brd, uchar __user *ubios, int len);
866 extern void dgap_do_fep_load(struct board_t *brd, uchar __user *ufep, int len);
867 extern void dgap_do_conc_load(struct board_t *brd, uchar *uaddr, int len);
868 extern void dgap_do_config_load(uchar __user *uaddr, int len);
869 extern int dgap_after_config_loaded(void);
870 extern int dgap_finalize_board_init(struct board_t *brd);
873 * Our Global Variables.
875 extern int dgap_driver_state; /* The state of the driver */
876 extern int dgap_debug; /* Debug variable */
877 extern int dgap_rawreadok; /* Set if user wants rawreads */
878 extern int dgap_poll_tick; /* Poll interval - 20 ms */
879 extern spinlock_t dgap_global_lock; /* Driver global spinlock */
880 extern uint dgap_NumBoards; /* Total number of boards */
881 extern struct board_t *dgap_Board[MAXBOARDS]; /* Array of board structs */
882 extern ulong dgap_poll_counter; /* Times the poller has run */
883 extern char *dgap_config_buf; /* The config file buffer */
884 extern spinlock_t dgap_dl_lock; /* Downloader spinlock */
885 extern wait_queue_head_t dgap_dl_wait; /* Wait queue for downloader */
886 extern int dgap_dl_action; /* Action flag for downloader */
887 extern int dgap_registerttyswithsysfs; /* Should we register the */
888 /* ttys with sysfs or not */
891 * Global functions declared in dgap_fep5.c, but must be hidden from
892 * user space programs.
894 extern void dgap_poll_tasklet(unsigned long data);
895 extern void dgap_cmdb(struct channel_t *ch, uchar cmd, uchar byte1, uchar byte2, uint ncmds);
896 extern void dgap_cmdw(struct channel_t *ch, uchar cmd, u16 word, uint ncmds);
897 extern void dgap_wmove(struct channel_t *ch, char *buf, uint cnt);
898 extern int dgap_param(struct tty_struct *tty);
899 extern void dgap_parity_scan(struct channel_t *ch, unsigned char *cbuf, unsigned char *fbuf, int *len);
900 extern uint dgap_get_custom_baud(struct channel_t *ch);
901 extern void dgap_firmware_reset_port(struct channel_t *ch);