2 * Copyright 2003 Digi International (www.digi.com)
3 * Scott H Kilau <Scott_Kilau at digi dot com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2, or (at your option)
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
12 * implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
13 * PURPOSE. See the GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 * NOTE: THIS IS A SHARED HEADER. DO NOT CHANGE CODING STYLE!!!
21 *************************************************************************
25 *************************************************************************/
27 #ifndef __DGAP_DRIVER_H
28 #define __DGAP_DRIVER_H
30 #include <linux/types.h> /* To pick up the varions Linux types */
31 #include <linux/tty.h> /* To pick up the various tty structs/defines */
32 #include <linux/interrupt.h> /* For irqreturn_t type */
34 #include "digi.h" /* Digi specific ioctl header */
44 /* Required for our shared headers! */
45 typedef unsigned char uchar;
47 #if !defined(TTY_FLIPBUF_SIZE)
48 # define TTY_FLIPBUF_SIZE 512
57 # define __chk_user_ptr(x) (void)0
61 # define PARM_STR(VAR, INIT, PERM, DESC) \
62 static char *VAR = INIT; \
64 module_param(VAR, charp, PERM); \
65 MODULE_PARM_DESC(VAR, DESC);
67 # define PARM_INT(VAR, INIT, PERM, DESC) \
68 static int VAR = INIT; \
70 module_param(VAR, int, PERM); \
71 MODULE_PARM_DESC(VAR, DESC);
73 # define PARM_ULONG(VAR, INIT, PERM, DESC) \
74 static ulong VAR = INIT; \
76 module_param(VAR, long, PERM); \
77 MODULE_PARM_DESC(VAR, DESC);
79 /*************************************************************************
83 *************************************************************************/
86 * Driver identification, error and debugging statments
88 * In theory, you can change all occurrences of "digi" in the next
89 * three lines, and the driver printk's will all automagically change.
91 * APR((fmt, args, ...)); Always prints message
92 * DPR((fmt, args, ...)); Only prints if DGAP_TRACER is defined at
93 * compile time and dgap_debug!=0
95 #define DG_NAME "dgap-1.3-16"
96 #define DG_PART "40002347_C"
98 #define PROCSTR "dgap" /* /proc entries */
99 #define DEVSTR "/dev/dg/dgap" /* /dev entries */
100 #define DRVSTR "dgap" /* Driver name string
101 * displayed by APR */
102 #define APR(args) do { PRINTF_TO_KMEM(args); printk(DRVSTR": "); printk args; \
104 #define RAPR(args) do { PRINTF_TO_KMEM(args); printk args; } while (0)
106 #define TRC_TO_CONSOLE 1
109 * defines from dgap_pci.h
111 #define PCIMAX 32 /* maximum number of PCI boards */
113 #define DIGI_VID 0x114F
115 #define PCI_DEVICE_EPC_DID 0x0002
116 #define PCI_DEVICE_XEM_DID 0x0004
117 #define PCI_DEVICE_XR_DID 0x0005
118 #define PCI_DEVICE_CX_DID 0x0006
119 #define PCI_DEVICE_XRJ_DID 0x0009 /* PLX-based Xr adapter */
120 #define PCI_DEVICE_XR_IBM_DID 0x0011 /* IBM 8-port Async Adapter */
121 #define PCI_DEVICE_XR_BULL_DID 0x0013 /* BULL 8-port Async Adapter */
122 #define PCI_DEVICE_XR_SAIP_DID 0x001c /* SAIP card - Xr adapter */
123 #define PCI_DEVICE_XR_422_DID 0x0012 /* Xr-422 */
124 #define PCI_DEVICE_920_2_DID 0x0034 /* XR-Plus 920 K, 2 port */
125 #define PCI_DEVICE_920_4_DID 0x0026 /* XR-Plus 920 K, 4 port */
126 #define PCI_DEVICE_920_8_DID 0x0027 /* XR-Plus 920 K, 8 port */
127 #define PCI_DEVICE_EPCJ_DID 0x000a /* PLX 9060 chip for PCI */
128 #define PCI_DEVICE_CX_IBM_DID 0x001b /* IBM 128-port Async Adapter */
129 #define PCI_DEVICE_920_8_HP_DID 0x0058 /* HP XR-Plus 920 K, 8 port */
130 #define PCI_DEVICE_XEM_HP_DID 0x0059 /* HP Xem PCI */
132 #define PCI_DEVICE_XEM_NAME "AccelePort XEM"
133 #define PCI_DEVICE_CX_NAME "AccelePort CX"
134 #define PCI_DEVICE_XR_NAME "AccelePort Xr"
135 #define PCI_DEVICE_XRJ_NAME "AccelePort Xr (PLX)"
136 #define PCI_DEVICE_XR_SAIP_NAME "AccelePort Xr (SAIP)"
137 #define PCI_DEVICE_920_2_NAME "AccelePort Xr920 2 port"
138 #define PCI_DEVICE_920_4_NAME "AccelePort Xr920 4 port"
139 #define PCI_DEVICE_920_8_NAME "AccelePort Xr920 8 port"
140 #define PCI_DEVICE_XR_422_NAME "AccelePort Xr 422"
141 #define PCI_DEVICE_EPCJ_NAME "AccelePort EPC (PLX)"
142 #define PCI_DEVICE_XR_BULL_NAME "AccelePort Xr (BULL)"
143 #define PCI_DEVICE_XR_IBM_NAME "AccelePort Xr (IBM)"
144 #define PCI_DEVICE_CX_IBM_NAME "AccelePort CX (IBM)"
145 #define PCI_DEVICE_920_8_HP_NAME "AccelePort Xr920 8 port (HP)"
146 #define PCI_DEVICE_XEM_HP_NAME "AccelePort XEM (HP)"
149 * On the PCI boards, there is no IO space allocated
150 * The I/O registers will be in the first 3 bytes of the
151 * upper 2MB of the 4MB memory space. The board memory
152 * will be mapped into the low 2MB of the 4MB memory space
155 /* Potential location of PCI Bios from E0000 to FFFFF*/
156 #define PCI_BIOS_SIZE 0x00020000
158 /* Size of Memory and I/O for PCI (4MB) */
159 #define PCI_RAM_SIZE 0x00400000
161 /* Size of Memory (2MB) */
162 #define PCI_MEM_SIZE 0x00200000
164 /* Max PCI Window Size (2MB) */
165 #define PCI_WIN_SIZE 0x00200000
167 #define PCI_WIN_SHIFT 21 /* 21 bits max */
169 /* Offset of I/0 in Memory (2MB) */
170 #define PCI_IO_OFFSET 0x00200000
172 /* Size of IO (2MB) */
173 #define PCI_IO_SIZE 0x00200000
176 * Debugging levels can be set using debug insmod variable
177 * They can also be compiled out completely.
180 #define DBG_INIT (dgap_debug & 0x01)
181 #define DBG_BASIC (dgap_debug & 0x02)
182 #define DBG_CORE (dgap_debug & 0x04)
184 #define DBG_OPEN (dgap_debug & 0x08)
185 #define DBG_CLOSE (dgap_debug & 0x10)
186 #define DBG_READ (dgap_debug & 0x20)
187 #define DBG_WRITE (dgap_debug & 0x40)
189 #define DBG_IOCTL (dgap_debug & 0x80)
191 #define DBG_PROC (dgap_debug & 0x100)
192 #define DBG_PARAM (dgap_debug & 0x200)
193 #define DBG_PSCAN (dgap_debug & 0x400)
194 #define DBG_EVENT (dgap_debug & 0x800)
196 #define DBG_DRAIN (dgap_debug & 0x1000)
197 #define DBG_CARR (dgap_debug & 0x2000)
199 #define DBG_MGMT (dgap_debug & 0x4000)
202 #if defined(DGAP_TRACER)
204 # if defined(TRC_TO_KMEM)
206 # define TRC_ON_OVERFLOW_WRAP_AROUND
207 # undef TRC_ON_OVERFLOW_SHIFT_BUFFER
208 # endif //TRC_TO_KMEM
210 # define TRC_MAXMSG 1024
211 # define TRC_OVERFLOW "(OVERFLOW)"
212 # define TRC_DTRC "/usr/bin/dtrc"
214 #if defined TRC_TO_CONSOLE
215 #define PRINTF_TO_CONSOLE(args) { printk(DRVSTR": "); printk args; }
216 #else //!defined TRACE_TO_CONSOLE
217 #define PRINTF_TO_CONSOLE(args)
220 #if defined TRC_TO_KMEM
221 #define PRINTF_TO_KMEM(args) dgap_tracef args
222 #else //!defined TRC_TO_KMEM
223 #define PRINTF_TO_KMEM(args)
226 #define TRC(args) { PRINTF_TO_KMEM(args); PRINTF_TO_CONSOLE(args) }
228 # define DPR_INIT(ARGS) if (DBG_INIT) TRC(ARGS)
229 # define DPR_BASIC(ARGS) if (DBG_BASIC) TRC(ARGS)
230 # define DPR_CORE(ARGS) if (DBG_CORE) TRC(ARGS)
231 # define DPR_OPEN(ARGS) if (DBG_OPEN) TRC(ARGS)
232 # define DPR_CLOSE(ARGS) if (DBG_CLOSE) TRC(ARGS)
233 # define DPR_READ(ARGS) if (DBG_READ) TRC(ARGS)
234 # define DPR_WRITE(ARGS) if (DBG_WRITE) TRC(ARGS)
235 # define DPR_IOCTL(ARGS) if (DBG_IOCTL) TRC(ARGS)
236 # define DPR_PROC(ARGS) if (DBG_PROC) TRC(ARGS)
237 # define DPR_PARAM(ARGS) if (DBG_PARAM) TRC(ARGS)
238 # define DPR_PSCAN(ARGS) if (DBG_PSCAN) TRC(ARGS)
239 # define DPR_EVENT(ARGS) if (DBG_EVENT) TRC(ARGS)
240 # define DPR_DRAIN(ARGS) if (DBG_DRAIN) TRC(ARGS)
241 # define DPR_CARR(ARGS) if (DBG_CARR) TRC(ARGS)
242 # define DPR_MGMT(ARGS) if (DBG_MGMT) TRC(ARGS)
244 # define DPR(ARGS) if (dgap_debug) TRC(ARGS)
245 # define P(X) dgap_tracef(#X "=%p\n", X)
246 # define X(X) dgap_tracef(#X "=%x\n", X)
248 #else//!defined DGAP_TRACER
250 #define PRINTF_TO_KMEM(args)
252 # define DPR_INIT(ARGS)
253 # define DPR_BASIC(ARGS)
254 # define DPR_CORE(ARGS)
255 # define DPR_OPEN(ARGS)
256 # define DPR_CLOSE(ARGS)
257 # define DPR_READ(ARGS)
258 # define DPR_WRITE(ARGS)
259 # define DPR_IOCTL(ARGS)
260 # define DPR_PROC(ARGS)
261 # define DPR_PARAM(ARGS)
262 # define DPR_PSCAN(ARGS)
263 # define DPR_EVENT(ARGS)
264 # define DPR_DRAIN(ARGS)
265 # define DPR_CARR(ARGS)
266 # define DPR_MGMT(ARGS)
272 /* Number of boards we support at once. */
275 #define MAXTTYNAMELEN 200
277 /* Our 3 magic numbers for our board, channel and unit structs */
278 #define DGAP_BOARD_MAGIC 0x5c6df104
279 #define DGAP_CHANNEL_MAGIC 0x6c6df104
280 #define DGAP_UNIT_MAGIC 0x7c6df104
282 /* Serial port types */
283 #define DGAP_SERIAL 0
286 #define SERIAL_TYPE_NORMAL 1
288 /* 4 extra for alignment play space */
289 #define WRITEBUFLEN ((4096) + 4)
290 #define MYFLIPLEN N_TTY_BUF_SIZE
292 #define SBREAK_TIME 0x25
293 #define U2BSIZE 0x400
295 #define dgap_jiffies_from_ms(a) (((a) * HZ) / 1000)
298 * Our major for the mgmt devices.
300 * We can use 22, because Digi was allocated 22 and 23 for the epca driver.
301 * 22 has now become obsolete now that the "cu" devices have
302 * been removed from 2.6.
303 * Also, this *IS* the epca driver, just PCI only now.
305 #ifndef DIGI_DGAP_MAJOR
306 # define DIGI_DGAP_MAJOR 22
310 * The parameters we use to define the periods of the moving averages.
312 #define MA_PERIOD (HZ / 10)
313 #define SMA_DUR (1 * HZ)
314 #define EMA_DUR (1 * HZ)
315 #define SMA_NPERIODS (SMA_DUR / MA_PERIOD)
316 #define EMA_NPERIODS (EMA_DUR / MA_PERIOD)
319 * Define a local default termios struct. All ports will be created
320 * with this termios initially. This is the same structure that is defined
321 * as the default in tty_io.c with the same settings overriden as in serial.c
323 * In short, this should match the internal serial ports' defaults.
325 #define DEFAULT_IFLAGS (ICRNL | IXON)
326 #define DEFAULT_OFLAGS (OPOST | ONLCR)
327 #define DEFAULT_CFLAGS (B9600 | CS8 | CREAD | HUPCL | CLOCAL)
328 #define DEFAULT_LFLAGS (ISIG | ICANON | ECHO | ECHOE | ECHOK | \
329 ECHOCTL | ECHOKE | IEXTEN)
331 #ifndef _POSIX_VDISABLE
332 #define _POSIX_VDISABLE '\0'
335 #define SNIFF_MAX 65536 /* Sniff buffer size (2^n) */
336 #define SNIFF_MASK (SNIFF_MAX - 1) /* Sniff wrap mask */
338 #define VPDSIZE (512)
341 * Lock function/defines.
342 * Makes spotting lock/unlock locations easier.
344 # define DGAP_SPINLOCK_INIT(x) spin_lock_init(&(x))
345 # define DGAP_LOCK(x,y) spin_lock_irqsave(&(x), y)
346 # define DGAP_UNLOCK(x,y) spin_unlock_irqrestore(&(x), y)
347 # define DGAP_TRYLOCK(x,y) spin_trylock(&(x))
349 /************************************************************************
351 ************************************************************************/
352 #define START 0x0004L /* Execution start address */
354 #define CMDBUF 0x0d10L /* Command (cm_t) structure offset */
355 #define CMDSTART 0x0400L /* Start of command buffer */
356 #define CMDMAX 0x0800L /* End of command buffer */
358 #define EVBUF 0x0d18L /* Event (ev_t) structure */
359 #define EVSTART 0x0800L /* Start of event buffer */
360 #define EVMAX 0x0c00L /* End of event buffer */
361 #define FEP5_PLUS 0x0E40 /* ASCII '5' and ASCII 'A' is here */
362 #define ECS_SEG 0x0E44 /* Segment of the extended channel structure */
363 #define LINE_SPEED 0x10 /* Offset into ECS_SEG for line speed */
364 /* if the fep has extended capabilities */
366 /* BIOS MAGIC SPOTS */
367 #define ERROR 0x0C14L /* BIOS error code */
368 #define SEQUENCE 0x0C12L /* BIOS sequence indicator */
369 #define POSTAREA 0x0C00L /* POST complete message area */
371 /* FEP MAGIC SPOTS */
372 #define FEPSTAT POSTAREA /* OS here when FEP comes up */
373 #define NCHAN 0x0C02L /* number of ports FEP sees */
374 #define PANIC 0x0C10L /* PANIC area for FEP */
375 #define KMEMEM 0x0C30L /* Memory for KME use */
376 #define CONFIG 0x0CD0L /* Concentrator configuration info */
377 #define CONFIGSIZE 0x0030 /* configuration info size */
378 #define DOWNREQ 0x0D00 /* Download request buffer pointer */
380 #define CHANBUF 0x1000L /* Async channel (bs_t) structs */
381 #define FEPOSSIZE 0x1FFF /* 8K FEPOS */
383 #define XEMPORTS 0xC02 /*
384 * Offset in board memory where FEP5 stores
385 * how many ports it has detected.
386 * NOTE: FEP5 reports 64 ports when the user
387 * has the cable in EBI OUT instead of EBI IN.
397 #define LOWMEM 0x0100
398 #define HIGHMEM 0x7f00
400 #define FEPTIMEOUT 200000
402 #define ENABLE_INTR 0x0e04 /* Enable interrupts flag */
403 #define FEPPOLL_MIN 1 /* minimum of 1 millisecond */
404 #define FEPPOLL_MAX 20 /* maximum of 20 milliseconds */
405 #define FEPPOLL 0x0c26 /* Fep event poll interval */
407 #define IALTPIN 0x0080 /* Input flag to swap DSR <-> DCD */
409 /************************************************************************
410 * FEP supported functions
411 ************************************************************************/
412 #define SRLOW 0xe0 /* Set receive low water */
413 #define SRHIGH 0xe1 /* Set receive high water */
414 #define FLUSHTX 0xe2 /* Flush transmit buffer */
415 #define PAUSETX 0xe3 /* Pause data transmission */
416 #define RESUMETX 0xe4 /* Resume data transmission */
417 #define SMINT 0xe5 /* Set Modem Interrupt */
418 #define SAFLOWC 0xe6 /* Set Aux. flow control chars */
419 #define SBREAK 0xe8 /* Send break */
420 #define SMODEM 0xe9 /* Set 8530 modem control lines */
421 #define SIFLAG 0xea /* Set UNIX iflags */
422 #define SFLOWC 0xeb /* Set flow control characters */
423 #define STLOW 0xec /* Set transmit low water mark */
424 #define RPAUSE 0xee /* Pause receive */
425 #define RRESUME 0xef /* Resume receive */
426 #define CHRESET 0xf0 /* Reset Channel */
427 #define BUFSETALL 0xf2 /* Set Tx & Rx buffer size avail*/
428 #define SOFLAG 0xf3 /* Set UNIX oflags */
429 #define SHFLOW 0xf4 /* Set hardware handshake */
430 #define SCFLAG 0xf5 /* Set UNIX cflags */
431 #define SVNEXT 0xf6 /* Set VNEXT character */
432 #define SPINTFC 0xfc /* Reserved */
433 #define SCOMMODE 0xfd /* Set RS232/422 mode */
436 /************************************************************************
438 ************************************************************************/
439 #define MODE_232 0x00
440 #define MODE_422 0x01
443 /************************************************************************
445 ************************************************************************/
446 #define IFBREAK 0x01 /* Break received */
447 #define IFTLW 0x02 /* Transmit low water */
448 #define IFTEM 0x04 /* Transmitter empty */
449 #define IFDATA 0x08 /* Receive data present */
450 #define IFMODEM 0x20 /* Modem status change */
452 /************************************************************************
454 ************************************************************************/
455 # define DM_RTS 0x02 /* Request to send */
456 # define DM_CD 0x80 /* Carrier detect */
457 # define DM_DSR 0x20 /* Data set ready */
458 # define DM_CTS 0x10 /* Clear to send */
459 # define DM_RI 0x40 /* Ring indicator */
460 # define DM_DTR 0x01 /* Data terminal ready */
463 * defines from dgap_conf.h
465 #define NULLNODE 0 /* header node, not used */
466 #define BNODE 1 /* Board node */
467 #define LNODE 2 /* Line node */
468 #define CNODE 3 /* Concentrator node */
469 #define MNODE 4 /* EBI Module node */
470 #define TNODE 5 /* tty name prefix node */
471 #define CUNODE 6 /* cu name prefix (non-SCO) */
472 #define PNODE 7 /* trans. print prefix node */
473 #define JNODE 8 /* maJor number node */
474 #define ANODE 9 /* altpin */
475 #define TSNODE 10 /* tty structure size */
476 #define CSNODE 11 /* channel structure size */
477 #define BSNODE 12 /* board structure size */
478 #define USNODE 13 /* unit schedule structure size */
479 #define FSNODE 14 /* f2200 structure size */
480 #define VSNODE 15 /* size of VPIX structures */
481 #define INTRNODE 16 /* enable interrupt */
483 /* Enumeration of tokens */
488 #define EPCFS 11 /* start of EPC family definitions */
505 #define EPCFE 25 /* end of EPC family definitions */
516 #define AVANFS 42 /* start of Avanstar family definitions */
519 #define AVANFE 43 /* end of Avanstar family definitions */
521 #define DA2000FS 44 /* start of AccelePort 2000 family definitions */
522 #define DA22 44 /* AccelePort 2002 */
523 #define DA24 45 /* AccelePort 2004 */
524 #define DA28 46 /* AccelePort 2008 */
525 #define DA216 47 /* AccelePort 2016 */
526 #define DAR4 48 /* AccelePort RAS 4 port */
527 #define DAR8 49 /* AccelePort RAS 8 port */
528 #define DDR24 50 /* DataFire RAS 24 port */
529 #define DDR30 51 /* DataFire RAS 30 port */
530 #define DDR48 52 /* DataFire RAS 48 port */
531 #define DDR60 53 /* DataFire RAS 60 port */
532 #define DA2000FE 53 /* end of AccelePort 2000/RAS family definitions */
534 #define PCXRFS 106 /* start of PCXR family definitions */
539 #define APORT4_920I 110
540 #define APORT8_920I 111
541 #define APORT4_920P 112
542 #define APORT8_920P 113
543 #define APORT2_920P 114
544 #define PCXRFE 117 /* end of PCXR family definitions */
561 /* The following tokens can appear in multiple places */
588 #define TOTAL_BOARD 2
589 #define CURRENT_BRD 4
592 #define MEM_ADDRESS 10
594 #define FIELDS_PER_PAGE 18
607 #define MAX_FIELD 512
619 #define ONETONINE "123456789"
620 #define ALL "1234567890"
623 * All the possible states the driver can be while being loaded.
626 DRIVER_INITIALIZED = 0,
627 DRIVER_NEED_CONFIG_LOAD,
628 DRIVER_REQUESTED_CONFIG,
633 * All the possible states the board can be while booting up.
643 NEED_DEVICE_CREATION,
644 REQUESTED_DEVICE_CREATION,
645 FINISHED_DEVICE_CREATION,
655 FINISHED_PROC_CREATION,
660 * All the possible states that a requested concentrator image can be in.
663 NO_PENDING_CONCENTRATOR_REQUESTS = 0,
665 REQUESTED_CONCENTRATOR
668 extern char *dgap_state_text[];
669 extern char *dgap_driver_state_text[];
673 * Modem line constants are defined as macros because DSR and
674 * DCD are swapable using the ditty altpin option.
676 #define D_CD(ch) ch->ch_cd /* Carrier detect */
677 #define D_DSR(ch) ch->ch_dsr /* Data set ready */
678 #define D_RTS(ch) DM_RTS /* Request to send */
679 #define D_CTS(ch) DM_CTS /* Clear to send */
680 #define D_RI(ch) DM_RI /* Ring indicator */
681 #define D_DTR(ch) DM_DTR /* Data terminal ready */
684 /*************************************************************************
686 * Structures and closely related defines.
688 *************************************************************************/
692 * A structure to hold a statistics counter. We also
693 * compute moving averages for this counter.
697 u32 cnt; /* Total count */
698 ulong accum; /* Acuumulator per period */
699 ulong sma; /* Simple moving average */
700 ulong ema; /* Exponential moving average */
704 /************************************************************************
705 * Device flag definitions for bd_flags.
706 ************************************************************************/
707 #define BD_FEP5PLUS 0x0001 /* Supports FEP5 Plus commands */
708 #define BD_HAS_VPD 0x0002 /* Board has VPD info available */
712 * Per-board information
716 int magic; /* Board Magic number. */
717 int boardnum; /* Board number: 0-3 */
718 int firstminor; /* First minor, e.g. 0, 30, 60 */
720 int type; /* Type of board */
721 char *name; /* Product Name */
722 struct pci_dev *pdev; /* Pointer to the pci_dev struct */
723 u16 vendor; /* PCI vendor ID */
724 u16 device; /* PCI device ID */
725 u16 subvendor; /* PCI subsystem vendor ID */
726 u16 subdevice; /* PCI subsystem device ID */
727 uchar rev; /* PCI revision ID */
728 uint pci_bus; /* PCI bus value */
729 uint pci_slot; /* PCI slot value */
730 u16 maxports; /* MAX ports this board can handle */
731 uchar vpd[VPDSIZE]; /* VPD of board, if found */
732 u32 bd_flags; /* Board flags */
734 spinlock_t bd_lock; /* Used to protect board */
736 u32 state; /* State of card. */
737 wait_queue_head_t state_wait; /* Place to sleep on for state change */
739 struct tasklet_struct helper_tasklet; /* Poll helper tasklet */
744 struct cnode * bd_config; /* Config of board */
746 u16 nasync; /* Number of ports on card */
748 u32 use_interrupts; /* Should we be interrupt driven? */
749 ulong irq; /* Interrupt request number */
750 ulong intr_count; /* Count of interrupts */
751 u32 intr_used; /* Non-zero if using interrupts */
752 u32 intr_running; /* Non-zero if FEP knows its doing interrupts */
754 ulong port; /* Start of base io port of the card */
755 ulong port_end; /* End of base io port of the card */
756 ulong membase; /* Start of base memory of the card */
757 ulong membase_end; /* End of base memory of the card */
759 uchar *re_map_port; /* Remapped io port of the card */
760 uchar *re_map_membase;/* Remapped memory of the card */
762 uchar runwait; /* # Processes waiting for FEP */
763 uchar inhibit_poller; /* Tells the poller to leave us alone */
765 struct channel_t *channels[MAXPORTS]; /* array of pointers to our channels. */
767 struct tty_driver *SerialDriver;
768 char SerialName[200];
769 struct tty_driver *PrintDriver;
772 u32 dgap_Major_Serial_Registered;
773 u32 dgap_Major_TransparentPrint_Registered;
775 u32 dgap_Serial_Major;
776 u32 dgap_TransparentPrint_Major;
778 struct bs_t *bd_bs; /* Base structure pointer */
780 char *flipbuf; /* Our flip buffer, alloced if board is found */
781 char *flipflagbuf; /* Our flip flag buffer, alloced if board is found */
783 u16 dpatype; /* The board "type", as defined by DPA */
784 u16 dpastatus; /* The board "status", as defined by DPA */
785 wait_queue_head_t kme_wait; /* Needed for DPA support */
787 u32 conc_dl_status; /* Status of any pending conc download */
797 /************************************************************************
798 * Unit flag definitions for un_flags.
799 ************************************************************************/
800 #define UN_ISOPEN 0x0001 /* Device is open */
801 #define UN_CLOSING 0x0002 /* Line is being closed */
802 #define UN_IMM 0x0004 /* Service immediately */
803 #define UN_BUSY 0x0008 /* Some work this channel */
804 #define UN_BREAKI 0x0010 /* Input break received */
805 #define UN_PWAIT 0x0020 /* Printer waiting for terminal */
806 #define UN_TIME 0x0040 /* Waiting on time */
807 #define UN_EMPTY 0x0080 /* Waiting output queue empty */
808 #define UN_LOW 0x0100 /* Waiting output low water mark*/
809 #define UN_EXCL_OPEN 0x0200 /* Open for exclusive use */
810 #define UN_WOPEN 0x0400 /* Device waiting for open */
811 #define UN_WIOCTL 0x0800 /* Device waiting for open */
812 #define UN_HANGUP 0x8000 /* Carrier lost */
816 /************************************************************************
817 * Structure for terminal or printer unit.
818 ************************************************************************/
820 int magic; /* Unit Magic Number. */
821 struct channel_t *un_ch;
824 u32 un_open_count; /* Counter of opens to port */
825 struct tty_struct *un_tty;/* Pointer to unit tty structure */
826 u32 un_flags; /* Unit flags */
827 wait_queue_head_t un_flags_wait; /* Place to sleep to wait on unit */
828 u32 un_dev; /* Minor device number */
829 tcflag_t un_oflag; /* oflags being done on board */
830 tcflag_t un_lflag; /* lflags being done on board */
831 struct device *un_sysfs;
835 /************************************************************************
836 * Device flag definitions for ch_flags.
837 ************************************************************************/
838 #define CH_PRON 0x0001 /* Printer on string */
839 #define CH_OUT 0x0002 /* Dial-out device open */
840 #define CH_STOP 0x0004 /* Output is stopped */
841 #define CH_STOPI 0x0008 /* Input is stopped */
842 #define CH_CD 0x0010 /* Carrier is present */
843 #define CH_FCAR 0x0020 /* Carrier forced on */
845 #define CH_RXBLOCK 0x0080 /* Enable rx blocked flag */
846 #define CH_WLOW 0x0100 /* Term waiting low event */
847 #define CH_WEMPTY 0x0200 /* Term waiting empty event */
848 #define CH_RENABLE 0x0400 /* Buffer just emptied */
849 #define CH_RACTIVE 0x0800 /* Process active in xxread() */
850 #define CH_RWAIT 0x1000 /* Process waiting in xxread() */
851 #define CH_BAUD0 0x2000 /* Used for checking B0 transitions */
852 #define CH_HANGUP 0x8000 /* Hangup received */
855 * Definitions for ch_sniff_flags
857 #define SNIFF_OPEN 0x1
858 #define SNIFF_WAIT_DATA 0x2
859 #define SNIFF_WAIT_SPACE 0x4
862 /************************************************************************
863 * Channel information structure.
864 ************************************************************************/
866 int magic; /* Channel Magic Number */
867 struct bs_t *ch_bs; /* Base structure pointer */
868 struct cm_t *ch_cm; /* Command queue pointer */
869 struct board_t *ch_bd; /* Board structure pointer */
870 unsigned char *ch_vaddr; /* FEP memory origin */
871 unsigned char *ch_taddr; /* Write buffer origin */
872 unsigned char *ch_raddr; /* Read buffer origin */
873 struct digi_t ch_digi; /* Transparent Print structure */
874 struct un_t ch_tun; /* Terminal unit info */
875 struct un_t ch_pun; /* Printer unit info */
877 spinlock_t ch_lock; /* provide for serialization */
878 wait_queue_head_t ch_flags_wait;
881 uchar pscan_savechar;
883 u32 ch_portnum; /* Port number, 0 offset. */
884 u32 ch_open_count; /* open count */
885 u32 ch_flags; /* Channel flags */
888 u32 ch_close_delay; /* How long we should drop RTS/DTR for */
890 u32 ch_cpstime; /* Time for CPS calculations */
892 tcflag_t ch_c_iflag; /* channel iflags */
893 tcflag_t ch_c_cflag; /* channel cflags */
894 tcflag_t ch_c_oflag; /* channel oflags */
895 tcflag_t ch_c_lflag; /* channel lflags */
897 u16 ch_fepiflag; /* FEP tty iflags */
898 u16 ch_fepcflag; /* FEP tty cflags */
899 u16 ch_fepoflag; /* FEP tty oflags */
900 u16 ch_wopen; /* Waiting for open process cnt */
901 u16 ch_tstart; /* Transmit buffer start */
902 u16 ch_tsize; /* Transmit buffer size */
903 u16 ch_rstart; /* Receive buffer start */
904 u16 ch_rsize; /* Receive buffer size */
905 u16 ch_rdelay; /* Receive delay time */
907 u16 ch_tlw; /* Our currently set low water mark */
909 u16 ch_cook; /* Output character mask */
911 uchar ch_card; /* Card channel is on */
912 uchar ch_stopc; /* Stop character */
913 uchar ch_startc; /* Start character */
915 uchar ch_mostat; /* FEP output modem status */
916 uchar ch_mistat; /* FEP input modem status */
917 uchar ch_mforce; /* Modem values to be forced */
918 uchar ch_mval; /* Force values */
919 uchar ch_fepstopc; /* FEP stop character */
920 uchar ch_fepstartc; /* FEP start character */
922 uchar ch_astopc; /* Auxiliary Stop character */
923 uchar ch_astartc; /* Auxiliary Start character */
924 uchar ch_fepastopc; /* Auxiliary FEP stop char */
925 uchar ch_fepastartc; /* Auxiliary FEP start char */
927 uchar ch_hflow; /* FEP hardware handshake */
928 uchar ch_dsr; /* stores real dsr value */
929 uchar ch_cd; /* stores real cd value */
930 uchar ch_tx_win; /* channel tx buffer window */
931 uchar ch_rx_win; /* channel rx buffer window */
932 uint ch_custom_speed; /* Custom baud, if set */
933 uint ch_baud_info; /* Current baud info for /proc output */
934 ulong ch_rxcount; /* total of data received so far */
935 ulong ch_txcount; /* total of data transmitted so far */
936 ulong ch_err_parity; /* Count of parity errors on channel */
937 ulong ch_err_frame; /* Count of framing errors on channel */
938 ulong ch_err_break; /* Count of breaks on channel */
939 ulong ch_err_overrun; /* Count of overruns on channel */
943 char *ch_sniff_buf; /* Sniff buffer for proc */
944 ulong ch_sniff_flags; /* Channel flags */
945 wait_queue_head_t ch_sniff_wait;
948 /************************************************************************
949 * Command structure definition.
950 ************************************************************************/
952 volatile unsigned short cm_head; /* Command buffer head offset */
953 volatile unsigned short cm_tail; /* Command buffer tail offset */
954 volatile unsigned short cm_start; /* start offset of buffer */
955 volatile unsigned short cm_max; /* last offset of buffer */
958 /************************************************************************
959 * Event structure definition.
960 ************************************************************************/
962 volatile unsigned short ev_head; /* Command buffer head offset */
963 volatile unsigned short ev_tail; /* Command buffer tail offset */
964 volatile unsigned short ev_start; /* start offset of buffer */
965 volatile unsigned short ev_max; /* last offset of buffer */
968 /************************************************************************
969 * Download buffer structure.
970 ************************************************************************/
972 uchar dl_type; /* Header */
973 uchar dl_seq; /* Download sequence */
974 ushort dl_srev; /* Software revision number */
975 ushort dl_lrev; /* Low revision number */
976 ushort dl_hrev; /* High revision number */
977 ushort dl_seg; /* Start segment address */
978 ushort dl_size; /* Number of bytes to download */
979 uchar dl_data[1024]; /* Download data */
982 /************************************************************************
983 * Per channel buffer structure
984 ************************************************************************
985 * Base Structure Entries Usage Meanings to Host *
987 * W = read write R = read only *
988 * C = changed by commands only *
989 * U = unknown (may be changed w/o notice) *
990 ************************************************************************/
992 volatile unsigned short tp_jmp; /* Transmit poll jump */
993 volatile unsigned short tc_jmp; /* Cooked procedure jump */
994 volatile unsigned short ri_jmp; /* Not currently used */
995 volatile unsigned short rp_jmp; /* Receive poll jump */
997 volatile unsigned short tx_seg; /* W Tx segment */
998 volatile unsigned short tx_head; /* W Tx buffer head offset */
999 volatile unsigned short tx_tail; /* R Tx buffer tail offset */
1000 volatile unsigned short tx_max; /* W Tx buffer size - 1 */
1002 volatile unsigned short rx_seg; /* W Rx segment */
1003 volatile unsigned short rx_head; /* W Rx buffer head offset */
1004 volatile unsigned short rx_tail; /* R Rx buffer tail offset */
1005 volatile unsigned short rx_max; /* W Rx buffer size - 1 */
1007 volatile unsigned short tx_lw; /* W Tx buffer low water mark */
1008 volatile unsigned short rx_lw; /* W Rx buffer low water mark */
1009 volatile unsigned short rx_hw; /* W Rx buffer high water mark */
1010 volatile unsigned short incr; /* W Increment to next channel */
1012 volatile unsigned short fepdev; /* U SCC device base address */
1013 volatile unsigned short edelay; /* W Exception delay */
1014 volatile unsigned short blen; /* W Break length */
1015 volatile unsigned short btime; /* U Break complete time */
1017 volatile unsigned short iflag; /* C UNIX input flags */
1018 volatile unsigned short oflag; /* C UNIX output flags */
1019 volatile unsigned short cflag; /* C UNIX control flags */
1020 volatile unsigned short wfill[13]; /* U Reserved for expansion */
1022 volatile unsigned char num; /* U Channel number */
1023 volatile unsigned char ract; /* U Receiver active counter */
1024 volatile unsigned char bstat; /* U Break status bits */
1025 volatile unsigned char tbusy; /* W Transmit busy */
1026 volatile unsigned char iempty; /* W Transmit empty event enable */
1027 volatile unsigned char ilow; /* W Transmit low-water event enable */
1028 volatile unsigned char idata; /* W Receive data interrupt enable */
1029 volatile unsigned char eflag; /* U Host event flags */
1031 volatile unsigned char tflag; /* U Transmit flags */
1032 volatile unsigned char rflag; /* U Receive flags */
1033 volatile unsigned char xmask; /* U Transmit ready flags */
1034 volatile unsigned char xval; /* U Transmit ready value */
1035 volatile unsigned char m_stat; /* RC Modem status bits */
1036 volatile unsigned char m_change; /* U Modem bits which changed */
1037 volatile unsigned char m_int; /* W Modem interrupt enable bits */
1038 volatile unsigned char m_last; /* U Last modem status */
1040 volatile unsigned char mtran; /* C Unreported modem trans */
1041 volatile unsigned char orun; /* C Buffer overrun occurred */
1042 volatile unsigned char astartc; /* W Auxiliary Xon char */
1043 volatile unsigned char astopc; /* W Auxiliary Xoff char */
1044 volatile unsigned char startc; /* W Xon character */
1045 volatile unsigned char stopc; /* W Xoff character */
1046 volatile unsigned char vnextc; /* W Vnext character */
1047 volatile unsigned char hflow; /* C Software flow control */
1049 volatile unsigned char fillc; /* U Delay Fill character */
1050 volatile unsigned char ochar; /* U Saved output character */
1051 volatile unsigned char omask; /* U Output character mask */
1053 volatile unsigned char bfill[13]; /* U Reserved for expansion */
1055 volatile unsigned char scc[16]; /* U SCC registers */
1065 char type; /* Board Type */
1066 short port; /* I/O Address */
1067 char *portstr; /* I/O Address in string */
1068 long addr; /* Memory Address */
1069 char *addrstr; /* Memory Address in string */
1070 long pcibus; /* PCI BUS */
1071 char *pcibusstr; /* PCI BUS in string */
1072 long pcislot; /* PCI SLOT */
1073 char *pcislotstr; /* PCI SLOT in string */
1074 char nport; /* Number of Ports */
1075 char *id; /* tty id */
1076 int start; /* start of tty counting */
1077 char *method; /* Install method */
1089 char conc1; /* total concs in line1 */
1090 char conc2; /* total concs in line2 */
1091 char module1; /* total modules for line1 */
1092 char module2; /* total modules for line2 */
1093 char *status; /* config status */
1094 char *dimstatus; /* Y/N */
1095 int status_index; /* field pointer */
1159 /*************************************************************************
1161 * Prototypes for non-static functions used in more than one module
1163 *************************************************************************/
1165 extern int dgap_ms_sleep(ulong ms);
1166 extern char *dgap_ioctl_name(int cmd);
1167 extern void dgap_do_bios_load(struct board_t *brd, uchar __user *ubios, int len);
1168 extern void dgap_do_fep_load(struct board_t *brd, uchar __user *ufep, int len);
1169 extern void dgap_do_conc_load(struct board_t *brd, uchar *uaddr, int len);
1170 extern void dgap_do_config_load(uchar __user *uaddr, int len);
1171 extern int dgap_after_config_loaded(void);
1172 extern int dgap_finalize_board_init(struct board_t *brd);
1175 * Our Global Variables.
1177 extern int dgap_driver_state; /* The state of the driver */
1178 extern int dgap_debug; /* Debug variable */
1179 extern int dgap_rawreadok; /* Set if user wants rawreads */
1180 extern int dgap_poll_tick; /* Poll interval - 20 ms */
1181 extern spinlock_t dgap_global_lock; /* Driver global spinlock */
1182 extern uint dgap_NumBoards; /* Total number of boards */
1183 extern struct board_t *dgap_Board[MAXBOARDS]; /* Array of board structs */
1184 extern ulong dgap_poll_counter; /* Times the poller has run */
1185 extern char *dgap_config_buf; /* The config file buffer */
1186 extern spinlock_t dgap_dl_lock; /* Downloader spinlock */
1187 extern wait_queue_head_t dgap_dl_wait; /* Wait queue for downloader */
1188 extern int dgap_dl_action; /* Action flag for downloader */
1189 extern int dgap_registerttyswithsysfs; /* Should we register the */
1190 /* ttys with sysfs or not */
1193 * Global functions declared in dgap_fep5.c, but must be hidden from
1194 * user space programs.
1196 extern void dgap_poll_tasklet(unsigned long data);
1197 extern void dgap_cmdb(struct channel_t *ch, uchar cmd, uchar byte1, uchar byte2, uint ncmds);
1198 extern void dgap_cmdw(struct channel_t *ch, uchar cmd, u16 word, uint ncmds);
1199 extern void dgap_wmove(struct channel_t *ch, char *buf, uint cnt);
1200 extern int dgap_param(struct tty_struct *tty);
1201 extern void dgap_parity_scan(struct channel_t *ch, unsigned char *cbuf, unsigned char *fbuf, int *len);
1202 extern uint dgap_get_custom_baud(struct channel_t *ch);
1203 extern void dgap_firmware_reset_port(struct channel_t *ch);