2 * drivers/usb/gadget/emxx_udc.c
3 * EMXX FCD (Function Controller Driver) for USB.
5 * Copyright (C) 2010 Renesas Electronics Corporation
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2
9 * as published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA.
21 #include <linux/kernel.h>
22 #include <linux/module.h>
23 #include <linux/platform_device.h>
24 #include <linux/delay.h>
25 #include <linux/ioport.h>
26 #include <linux/slab.h>
27 #include <linux/errno.h>
28 #include <linux/init.h>
29 #include <linux/list.h>
30 #include <linux/interrupt.h>
31 #include <linux/proc_fs.h>
32 #include <linux/clk.h>
33 #include <linux/ctype.h>
34 #include <linux/string.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/workqueue.h>
37 #include <linux/device.h>
39 #include <linux/usb/ch9.h>
40 #include <linux/usb/gadget.h>
42 #include <linux/irq.h>
43 #include <linux/gpio.h>
47 #define DRIVER_DESC "EMXX UDC driver"
48 #define DMA_ADDR_INVALID (~(dma_addr_t)0)
50 static const char driver_name[] = "emxx_udc";
51 static const char driver_desc[] = DRIVER_DESC;
53 /*===========================================================================*/
55 static void _nbu2ss_ep_dma_abort(struct nbu2ss_udc *, struct nbu2ss_ep *);
56 static void _nbu2ss_ep0_enable(struct nbu2ss_udc *);
57 /*static void _nbu2ss_ep0_disable(struct nbu2ss_udc *);*/
58 static void _nbu2ss_ep_done(struct nbu2ss_ep *, struct nbu2ss_req *, int);
59 static void _nbu2ss_set_test_mode(struct nbu2ss_udc *, u32 mode);
60 static void _nbu2ss_endpoint_toggle_reset(struct nbu2ss_udc *udc, u8 ep_adrs);
62 static int _nbu2ss_pullup(struct nbu2ss_udc *, int);
63 static void _nbu2ss_fifo_flush(struct nbu2ss_udc *, struct nbu2ss_ep *);
65 /*===========================================================================*/
67 #define _nbu2ss_zero_len_pkt(udc, epnum) \
68 _nbu2ss_ep_in_end(udc, epnum, 0, 0)
71 /*===========================================================================*/
73 struct nbu2ss_udc udc_controller;
76 /*-------------------------------------------------------------------------*/
78 static inline u32 _nbu2ss_readl(void *address)
80 return __raw_readl(address);
83 /*-------------------------------------------------------------------------*/
85 static inline void _nbu2ss_writel(void *address, u32 udata)
87 __raw_writel(udata, address);
90 /*-------------------------------------------------------------------------*/
92 static inline void _nbu2ss_bitset(void *address, u32 udata)
94 u32 reg_dt = __raw_readl(address) | (udata);
96 __raw_writel(reg_dt, address);
99 /*-------------------------------------------------------------------------*/
101 static inline void _nbu2ss_bitclr(void *address, u32 udata)
103 u32 reg_dt = __raw_readl(address) & ~(udata);
105 __raw_writel(reg_dt, address);
108 #ifdef UDC_DEBUG_DUMP
109 /*-------------------------------------------------------------------------*/
110 static void _nbu2ss_dump_register(struct nbu2ss_udc *udc)
115 pr_info("=== %s()\n", __func__);
118 ERR("%s udc == NULL\n", __func__);
122 spin_unlock(&udc->lock);
124 dev_dbg(&udc->dev, "\n-USB REG-\n");
125 for (i = 0x0 ; i < USB_BASE_SIZE ; i += 16) {
126 reg_data = _nbu2ss_readl(
127 (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i));
128 dev_dbg(&udc->dev, "USB%04x =%08x", i, (int)reg_data);
130 reg_data = _nbu2ss_readl(
131 (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i + 4));
132 dev_dbg(&udc->dev, " %08x", (int)reg_data);
134 reg_data = _nbu2ss_readl(
135 (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i + 8));
136 dev_dbg(&udc->dev, " %08x", (int)reg_data);
138 reg_data = _nbu2ss_readl(
139 (u32 *)IO_ADDRESS(USB_BASE_ADDRESS + i + 12));
140 dev_dbg(&udc->dev, " %08x\n", (int)reg_data);
144 spin_lock(&udc->lock);
146 #endif /* UDC_DEBUG_DUMP */
148 /*-------------------------------------------------------------------------*/
149 /* Endpoint 0 Callback (Complete) */
150 static void _nbu2ss_ep0_complete(struct usb_ep *_ep, struct usb_request *_req)
155 struct usb_ctrlrequest *p_ctrl;
156 struct nbu2ss_udc *udc;
158 if ((_ep == NULL) || (_req == NULL))
161 udc = (struct nbu2ss_udc *)_req->context;
163 if ((p_ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
165 if (p_ctrl->bRequest == USB_REQ_SET_FEATURE) {
166 /*-------------------------------------------------*/
168 recipient = (u8)(p_ctrl->bRequestType & USB_RECIP_MASK);
169 selector = p_ctrl->wValue;
170 if ((recipient == USB_RECIP_DEVICE) &&
171 (selector == USB_DEVICE_TEST_MODE)) {
172 test_mode = (u32)(p_ctrl->wIndex >> 8);
173 _nbu2ss_set_test_mode(udc, test_mode);
179 /*-------------------------------------------------------------------------*/
180 /* Initialization usb_request */
181 static void _nbu2ss_create_ep0_packet(
182 struct nbu2ss_udc *udc,
187 udc->ep0_req.req.buf = p_buf;
188 udc->ep0_req.req.length = length;
189 udc->ep0_req.req.dma = 0;
190 udc->ep0_req.req.zero = TRUE;
191 udc->ep0_req.req.complete = _nbu2ss_ep0_complete;
192 udc->ep0_req.req.status = -EINPROGRESS;
193 udc->ep0_req.req.context = udc;
194 udc->ep0_req.req.actual = 0;
197 /*-------------------------------------------------------------------------*/
198 /* Acquisition of the first address of RAM(FIFO) */
199 static u32 _nbu2ss_get_begin_ram_address(struct nbu2ss_udc *udc)
202 u32 data, last_ram_adr, use_ram_size;
204 PT_EP_REGS p_ep_regs;
206 last_ram_adr = (D_RAM_SIZE_CTRL / sizeof(u32)) * 2;
209 for (num = 0; num < NUM_ENDPOINTS - 1; num++) {
210 p_ep_regs = &udc->p_regs->EP_REGS[num];
211 data = _nbu2ss_readl(&p_ep_regs->EP_PCKT_ADRS);
212 buf_type = _nbu2ss_readl(&p_ep_regs->EP_CONTROL) & EPn_BUF_TYPE;
215 use_ram_size += (data & EPn_MPKT) / sizeof(u32);
218 use_ram_size += ((data & EPn_MPKT) / sizeof(u32)) * 2;
221 if ((data >> 16) > last_ram_adr)
222 last_ram_adr = data>>16;
225 return last_ram_adr + use_ram_size;
228 /*-------------------------------------------------------------------------*/
229 /* Construction of Endpoint */
230 static int _nbu2ss_ep_init(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
241 /*-------------------------------------------------------------*/
242 /* RAM Transfer Address */
243 begin_adrs = _nbu2ss_get_begin_ram_address(udc);
244 data = (begin_adrs << 16) | ep->ep.maxpacket;
245 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_PCKT_ADRS, data);
247 /*-------------------------------------------------------------*/
248 /* Interrupt Enable */
249 data = 1 << (ep->epnum + 8);
250 _nbu2ss_bitset(&udc->p_regs->USB_INT_ENA, data);
252 /*-------------------------------------------------------------*/
253 /* Endpoint Type(Mode) */
254 /* Bulk, Interrupt, ISO */
255 switch (ep->ep_type) {
256 case USB_ENDPOINT_XFER_BULK:
260 case USB_ENDPOINT_XFER_INT:
261 data = EPn_BUF_SINGLE | EPn_INTERRUPT;
264 case USB_ENDPOINT_XFER_ISOC:
273 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
274 _nbu2ss_endpoint_toggle_reset(udc, (ep->epnum|ep->direct));
276 if (ep->direct == USB_DIR_OUT) {
277 /*---------------------------------------------------------*/
279 data = EPn_EN | EPn_BCLR | EPn_DIR0;
280 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
282 data = (EPn_ONAK | EPn_OSTL_EN | EPn_OSTL);
283 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
285 data = (EPn_OUT_EN | EPn_OUT_END_EN);
286 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
288 /*---------------------------------------------------------*/
290 data = (EPn_EN | EPn_BCLR | EPn_AUTO);
291 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
294 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
296 data = (EPn_IN_EN | EPn_IN_END_EN);
297 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
303 /*-------------------------------------------------------------------------*/
304 /* Release of Endpoint */
305 static int _nbu2ss_epn_exit(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
310 if ((ep->epnum == 0) || (udc->vbus_active == 0))
315 /*-------------------------------------------------------------*/
316 /* RAM Transfer Address */
317 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_PCKT_ADRS, 0);
319 /*-------------------------------------------------------------*/
320 /* Interrupt Disable */
321 data = 1 << (ep->epnum + 8);
322 _nbu2ss_bitclr(&udc->p_regs->USB_INT_ENA, data);
324 if (ep->direct == USB_DIR_OUT) {
325 /*---------------------------------------------------------*/
327 data = EPn_ONAK | EPn_BCLR;
328 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
330 data = EPn_EN | EPn_DIR0;
331 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
333 data = EPn_OUT_EN | EPn_OUT_END_EN;
334 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
336 /*---------------------------------------------------------*/
339 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
341 data = EPn_EN | EPn_AUTO;
342 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
344 data = EPn_IN_EN | EPn_IN_END_EN;
345 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
351 /*-------------------------------------------------------------------------*/
352 /* DMA setting (without Endpoint 0) */
353 static void _nbu2ss_ep_dma_init(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
358 data = _nbu2ss_readl(&udc->p_regs->USBSSCONF);
359 if (((ep->epnum == 0) || (data & (1 << ep->epnum)) == 0))
360 return; /* Not Support DMA */
364 if (ep->direct == USB_DIR_OUT) {
365 /*---------------------------------------------------------*/
367 data = ep->ep.maxpacket;
368 _nbu2ss_writel(&udc->p_regs->EP_DCR[num].EP_DCR2, data);
370 /*---------------------------------------------------------*/
371 /* Transfer Direct */
372 data = DCR1_EPn_DIR0;
373 _nbu2ss_bitset(&udc->p_regs->EP_DCR[num].EP_DCR1, data);
375 /*---------------------------------------------------------*/
377 data = EPn_STOP_MODE | EPn_STOP_SET | EPn_DMAMODE0;
378 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_DMA_CTRL, data);
380 /*---------------------------------------------------------*/
382 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, EPn_AUTO);
384 /*---------------------------------------------------------*/
386 data = EPn_BURST_SET | EPn_DMAMODE0;
387 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_DMA_CTRL, data);
391 /*-------------------------------------------------------------------------*/
392 /* DMA setting release */
393 static void _nbu2ss_ep_dma_exit(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
397 PT_FC_REGS preg = udc->p_regs;
399 if (udc->vbus_active == 0)
400 return; /* VBUS OFF */
402 data = _nbu2ss_readl(&preg->USBSSCONF);
403 if ((ep->epnum == 0) || ((data & (1 << ep->epnum)) == 0))
404 return; /* Not Support DMA */
408 _nbu2ss_ep_dma_abort(udc, ep);
410 if (ep->direct == USB_DIR_OUT) {
411 /*---------------------------------------------------------*/
413 _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR2, 0);
414 _nbu2ss_bitclr(&preg->EP_DCR[num].EP_DCR1, DCR1_EPn_DIR0);
415 _nbu2ss_writel(&preg->EP_REGS[num].EP_DMA_CTRL, 0);
417 /*---------------------------------------------------------*/
419 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL, EPn_AUTO);
420 _nbu2ss_writel(&preg->EP_REGS[num].EP_DMA_CTRL, 0);
424 /*-------------------------------------------------------------------------*/
426 static void _nbu2ss_ep_dma_abort(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
428 PT_FC_REGS preg = udc->p_regs;
430 _nbu2ss_bitclr(&preg->EP_DCR[ep->epnum-1].EP_DCR1, DCR1_EPn_REQEN);
431 mdelay(DMA_DISABLE_TIME); /* DCR1_EPn_REQEN Clear */
432 _nbu2ss_bitclr(&preg->EP_REGS[ep->epnum-1].EP_DMA_CTRL, EPn_DMA_EN);
435 /*-------------------------------------------------------------------------*/
436 /* Start IN Transfer */
437 static void _nbu2ss_ep_in_end(
438 struct nbu2ss_udc *udc,
446 PT_FC_REGS preg = udc->p_regs;
448 if (length >= sizeof(u32))
452 _nbu2ss_bitclr(&preg->EP0_CONTROL, EP0_AUTO);
454 /* Writing of 1-4 bytes */
456 _nbu2ss_writel(&preg->EP0_WRITE, data32);
458 data = ((length << 5) & EP0_DW) | EP0_DEND;
459 _nbu2ss_writel(&preg->EP0_CONTROL, data);
461 _nbu2ss_bitset(&preg->EP0_CONTROL, EP0_AUTO);
465 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL, EPn_AUTO);
467 /* Writing of 1-4 bytes */
469 _nbu2ss_writel(&preg->EP_REGS[num].EP_WRITE, data32);
471 data = (((((u32)length) << 5) & EPn_DW) | EPn_DEND);
472 _nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, data);
474 _nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, EPn_AUTO);
479 /*-------------------------------------------------------------------------*/
480 static void _nbu2ss_dma_map_single(
481 struct nbu2ss_udc *udc,
482 struct nbu2ss_ep *ep,
483 struct nbu2ss_req *req,
487 if (req->req.dma == DMA_ADDR_INVALID) {
489 req->req.dma = ep->phys_buf;
491 req->req.dma = dma_map_single(
492 udc->gadget.dev.parent,
495 (direct == USB_DIR_IN)
496 ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
501 dma_sync_single_for_device(
502 udc->gadget.dev.parent,
505 (direct == USB_DIR_IN)
506 ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
512 /*-------------------------------------------------------------------------*/
513 static void _nbu2ss_dma_unmap_single(
514 struct nbu2ss_udc *udc,
515 struct nbu2ss_ep *ep,
516 struct nbu2ss_req *req,
524 if (direct == USB_DIR_OUT) {
525 count = req->req.actual % 4;
528 p += (req->req.actual - count);
529 memcpy(data, p, count);
534 if (req->unaligned) {
535 if (direct == USB_DIR_OUT)
536 memcpy(req->req.buf, ep->virt_buf,
537 req->req.actual & 0xfffffffc);
539 dma_unmap_single(udc->gadget.dev.parent,
540 req->req.dma, req->req.length,
541 (direct == USB_DIR_IN)
544 req->req.dma = DMA_ADDR_INVALID;
548 dma_sync_single_for_cpu(udc->gadget.dev.parent,
549 req->req.dma, req->req.length,
550 (direct == USB_DIR_IN)
557 p += (req->req.actual - count);
558 memcpy(p, data, count);
563 /*-------------------------------------------------------------------------*/
564 /* Endpoint 0 OUT Transfer (PIO) */
565 static int EP0_out_PIO(struct nbu2ss_udc *udc, u8 *pBuf, u32 length)
570 USB_REG_ACCESS *pBuf32 = (USB_REG_ACCESS *)pBuf;
572 /*------------------------------------------------------------*/
574 iWordLength = length / sizeof(u32);
576 /*------------------------------------------------------------*/
579 for (i = 0; i < iWordLength; i++) {
580 pBuf32->dw = _nbu2ss_readl(&udc->p_regs->EP0_READ);
583 nret = iWordLength * sizeof(u32);
589 /*-------------------------------------------------------------------------*/
590 /* Endpoint 0 OUT Transfer (PIO, OverBytes) */
591 static int EP0_out_OverBytes(struct nbu2ss_udc *udc, u8 *pBuf, u32 length)
595 USB_REG_ACCESS Temp32;
596 USB_REG_ACCESS *pBuf32 = (USB_REG_ACCESS *)pBuf;
598 if ((0 < length) && (length < sizeof(u32))) {
599 Temp32.dw = _nbu2ss_readl(&udc->p_regs->EP0_READ);
600 for (i = 0 ; i < length ; i++)
601 pBuf32->byte.DATA[i] = Temp32.byte.DATA[i];
608 /*-------------------------------------------------------------------------*/
609 /* Endpoint 0 IN Transfer (PIO) */
610 static int EP0_in_PIO(struct nbu2ss_udc *udc, u8 *pBuf, u32 length)
613 u32 iMaxLength = EP0_PACKETSIZE;
615 u32 iWriteLength = 0;
616 USB_REG_ACCESS *pBuf32 = (USB_REG_ACCESS *)pBuf;
618 /*------------------------------------------------------------*/
619 /* Transfer Length */
620 if (iMaxLength < length)
621 iWordLength = iMaxLength / sizeof(u32);
623 iWordLength = length / sizeof(u32);
625 /*------------------------------------------------------------*/
627 for (i = 0; i < iWordLength; i++) {
628 _nbu2ss_writel(&udc->p_regs->EP0_WRITE, pBuf32->dw);
630 iWriteLength += sizeof(u32);
636 /*-------------------------------------------------------------------------*/
637 /* Endpoint 0 IN Transfer (PIO, OverBytes) */
638 static int EP0_in_OverBytes(struct nbu2ss_udc *udc, u8 *pBuf, u32 iRemainSize)
641 USB_REG_ACCESS Temp32;
642 USB_REG_ACCESS *pBuf32 = (USB_REG_ACCESS *)pBuf;
644 if ((0 < iRemainSize) && (iRemainSize < sizeof(u32))) {
645 for (i = 0 ; i < iRemainSize ; i++)
646 Temp32.byte.DATA[i] = pBuf32->byte.DATA[i];
647 _nbu2ss_ep_in_end(udc, 0, Temp32.dw, iRemainSize);
655 /*-------------------------------------------------------------------------*/
656 /* Transfer NULL Packet (Epndoint 0) */
657 static int EP0_send_NULL(struct nbu2ss_udc *udc, bool pid_flag)
661 data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
662 data &= ~(u32)EP0_INAK;
665 data |= (EP0_INAK_EN | EP0_PIDCLR | EP0_DEND);
667 data |= (EP0_INAK_EN | EP0_DEND);
669 _nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);
674 /*-------------------------------------------------------------------------*/
675 /* Receive NULL Packet (Endpoint 0) */
676 static int EP0_receive_NULL(struct nbu2ss_udc *udc, bool pid_flag)
680 data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
681 data &= ~(u32)EP0_ONAK;
686 _nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);
691 /*-------------------------------------------------------------------------*/
692 static int _nbu2ss_ep0_in_transfer(
693 struct nbu2ss_udc *udc,
694 struct nbu2ss_ep *ep,
695 struct nbu2ss_req *req
698 u8 *pBuffer; /* IN Data Buffer */
703 /*-------------------------------------------------------------*/
704 /* End confirmation */
705 if (req->req.actual == req->req.length) {
706 if ((req->req.actual % EP0_PACKETSIZE) == 0) {
709 EP0_send_NULL(udc, FALSE);
714 return 0; /* Transfer End */
717 /*-------------------------------------------------------------*/
719 data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
721 data &= ~(u32)EP0_INAK;
722 _nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);
724 iRemainSize = req->req.length - req->req.actual;
725 pBuffer = (u8 *)req->req.buf;
726 pBuffer += req->req.actual;
728 /*-------------------------------------------------------------*/
730 result = EP0_in_PIO(udc, pBuffer, iRemainSize);
732 req->div_len = result;
733 iRemainSize -= result;
735 if (iRemainSize == 0) {
736 EP0_send_NULL(udc, FALSE);
740 if ((iRemainSize < sizeof(u32)) && (result != EP0_PACKETSIZE)) {
742 result += EP0_in_OverBytes(udc, pBuffer, iRemainSize);
743 req->div_len = result;
749 /*-------------------------------------------------------------------------*/
750 static int _nbu2ss_ep0_out_transfer(
751 struct nbu2ss_udc *udc,
752 struct nbu2ss_ep *ep,
753 struct nbu2ss_req *req
762 /*-------------------------------------------------------------*/
763 /* Receive data confirmation */
764 iRecvLength = _nbu2ss_readl(&udc->p_regs->EP0_LENGTH) & EP0_LDATA;
765 if (iRecvLength != 0) {
769 iRemainSize = req->req.length - req->req.actual;
770 pBuffer = (u8 *)req->req.buf;
771 pBuffer += req->req.actual;
773 result = EP0_out_PIO(udc, pBuffer
774 , min(iRemainSize, iRecvLength));
778 req->req.actual += result;
779 iRecvLength -= result;
781 if ((0 < iRecvLength) && (iRecvLength < sizeof(u32))) {
783 iRemainSize -= result;
785 result = EP0_out_OverBytes(udc, pBuffer
786 , min(iRemainSize, iRecvLength));
787 req->req.actual += result;
793 /*-------------------------------------------------------------*/
794 /* End confirmation */
795 if (req->req.actual == req->req.length) {
796 if ((req->req.actual % EP0_PACKETSIZE) == 0) {
799 EP0_receive_NULL(udc, FALSE);
804 return 0; /* Transfer End */
807 if ((req->req.actual % EP0_PACKETSIZE) != 0)
808 return 0; /* Short Packet Transfer End */
810 if (req->req.actual > req->req.length) {
811 ERR(" *** Overrun Error\n");
816 iRemainSize = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
817 if (iRemainSize & EP0_ONAK) {
818 /*---------------------------------------------------*/
820 _nbu2ss_bitclr(&udc->p_regs->EP0_CONTROL, EP0_ONAK);
828 /*-------------------------------------------------------------------------*/
829 static int _nbu2ss_out_dma(
830 struct nbu2ss_udc *udc,
831 struct nbu2ss_req *req,
842 int result = -EINVAL;
843 PT_FC_REGS preg = udc->p_regs;
846 return 1; /* DMA is forwarded */
848 req->dma_flag = TRUE;
849 pBuffer = (u8 *)req->req.dma;
850 pBuffer += req->req.actual;
853 _nbu2ss_writel(&preg->EP_DCR[num].EP_TADR, (u32)pBuffer);
855 /* Number of transfer packets */
856 mpkt = _nbu2ss_readl(&preg->EP_REGS[num].EP_PCKT_ADRS) & EPn_MPKT;
857 dmacnt = (length / mpkt);
858 lmpkt = (length % mpkt) & ~(u32)0x03;
860 if (DMA_MAX_COUNT < dmacnt) {
861 dmacnt = DMA_MAX_COUNT;
863 } else if (0 != lmpkt) {
865 burst = 0; /* Burst OFF */
869 data = mpkt | (lmpkt << 16);
870 _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR2, data);
872 data = ((dmacnt & 0xff) << 16) | DCR1_EPn_DIR0 | DCR1_EPn_REQEN;
873 _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR1, data);
876 _nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT, 0);
877 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_DMA_CTRL, EPn_BURST_SET);
879 _nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT
881 _nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPn_BURST_SET);
883 _nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPn_DMA_EN);
885 result = length & ~(u32)0x03;
886 req->div_len = result;
891 /*-------------------------------------------------------------------------*/
892 static int _nbu2ss_epn_out_pio(
893 struct nbu2ss_udc *udc,
894 struct nbu2ss_ep *ep,
895 struct nbu2ss_req *req,
903 USB_REG_ACCESS Temp32;
904 USB_REG_ACCESS *pBuf32;
906 PT_FC_REGS preg = udc->p_regs;
909 return 1; /* DMA is forwarded */
914 pBuffer = (u8 *)req->req.buf;
915 pBuf32 = (USB_REG_ACCESS *)(pBuffer + req->req.actual);
917 iWordLength = length / sizeof(u32);
918 if (iWordLength > 0) {
919 /*---------------------------------------------------------*/
920 /* Copy of every four bytes */
921 for (i = 0; i < iWordLength; i++) {
923 _nbu2ss_readl(&preg->EP_REGS[ep->epnum-1].EP_READ);
926 result = iWordLength * sizeof(u32);
929 data = length - result;
931 /*---------------------------------------------------------*/
932 /* Copy of fraction byte */
933 Temp32.dw = _nbu2ss_readl(&preg->EP_REGS[ep->epnum-1].EP_READ);
934 for (i = 0 ; i < data ; i++)
935 pBuf32->byte.DATA[i] = Temp32.byte.DATA[i];
939 req->req.actual += result;
941 if ((req->req.actual == req->req.length)
942 || ((req->req.actual % ep->ep.maxpacket) != 0)) {
950 /*-------------------------------------------------------------------------*/
951 static int _nbu2ss_epn_out_data(
952 struct nbu2ss_udc *udc,
953 struct nbu2ss_ep *ep,
954 struct nbu2ss_req *req,
967 iBufSize = min((req->req.length - req->req.actual), data_size);
969 if ((ep->ep_type != USB_ENDPOINT_XFER_INT)
970 && (req->req.dma != 0)
971 && (iBufSize >= sizeof(u32))) {
972 nret = _nbu2ss_out_dma(udc, req, num, iBufSize);
974 iBufSize = min_t(u32, iBufSize, ep->ep.maxpacket);
975 nret = _nbu2ss_epn_out_pio(udc, ep, req, iBufSize);
981 /*-------------------------------------------------------------------------*/
982 static int _nbu2ss_epn_out_transfer(
983 struct nbu2ss_udc *udc,
984 struct nbu2ss_ep *ep,
985 struct nbu2ss_req *req
991 PT_FC_REGS preg = udc->p_regs;
998 /*-------------------------------------------------------------*/
1001 = _nbu2ss_readl(&preg->EP_REGS[num].EP_LEN_DCNT) & EPn_LDATA;
1003 if (iRecvLength != 0) {
1004 result = _nbu2ss_epn_out_data(udc, ep, req, iRecvLength);
1005 if (iRecvLength < ep->ep.maxpacket) {
1006 if (iRecvLength == result) {
1007 req->req.actual += result;
1012 if ((req->req.actual == req->req.length)
1013 || ((req->req.actual % ep->ep.maxpacket) != 0)) {
1020 if ((req->req.actual % ep->ep.maxpacket) == 0) {
1028 if (req->req.actual > req->req.length) {
1029 ERR(" *** Overrun Error\n");
1030 ERR(" *** actual = %d, length = %d\n",
1031 req->req.actual, req->req.length);
1032 result = -EOVERFLOW;
1038 /*-------------------------------------------------------------------------*/
1039 static int _nbu2ss_in_dma(
1040 struct nbu2ss_udc *udc,
1041 struct nbu2ss_ep *ep,
1042 struct nbu2ss_req *req,
1048 u32 mpkt; /* MaxPacketSize */
1049 u32 lmpkt; /* Last Packet Data Size */
1050 u32 dmacnt; /* IN Data Size */
1053 int result = -EINVAL;
1054 PT_FC_REGS preg = udc->p_regs;
1057 return 1; /* DMA is forwarded */
1060 if (req->req.actual == 0)
1061 _nbu2ss_dma_map_single(udc, ep, req, USB_DIR_IN);
1063 req->dma_flag = TRUE;
1065 /* MAX Packet Size */
1066 mpkt = _nbu2ss_readl(&preg->EP_REGS[num].EP_PCKT_ADRS) & EPn_MPKT;
1068 if ((DMA_MAX_COUNT * mpkt) < length)
1069 iWriteLength = DMA_MAX_COUNT * mpkt;
1071 iWriteLength = length;
1073 /*------------------------------------------------------------*/
1074 /* Number of transmission packets */
1075 if (mpkt < iWriteLength) {
1076 dmacnt = iWriteLength / mpkt;
1077 lmpkt = (iWriteLength % mpkt) & ~(u32)0x3;
1081 lmpkt = mpkt & ~(u32)0x3;
1085 lmpkt = iWriteLength & ~(u32)0x3;
1088 /* Packet setting */
1089 data = mpkt | (lmpkt << 16);
1090 _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR2, data);
1092 /* Address setting */
1093 pBuffer = (u8 *)req->req.dma;
1094 pBuffer += req->req.actual;
1095 _nbu2ss_writel(&preg->EP_DCR[num].EP_TADR, (u32)pBuffer);
1097 /* Packet and DMA setting */
1098 data = ((dmacnt & 0xff) << 16) | DCR1_EPn_REQEN;
1099 _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR1, data);
1101 /* Packet setting of EPC */
1102 data = dmacnt << 16;
1103 _nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT, data);
1105 /*DMA setting of EPC */
1106 _nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPn_DMA_EN);
1108 result = iWriteLength & ~(u32)0x3;
1109 req->div_len = result;
1114 /*-------------------------------------------------------------------------*/
1115 static int _nbu2ss_epn_in_pio(
1116 struct nbu2ss_udc *udc,
1117 struct nbu2ss_ep *ep,
1118 struct nbu2ss_req *req,
1126 USB_REG_ACCESS Temp32;
1127 USB_REG_ACCESS *pBuf32 = NULL;
1129 PT_FC_REGS preg = udc->p_regs;
1132 return 1; /* DMA is forwarded */
1135 pBuffer = (u8 *)req->req.buf;
1136 pBuf32 = (USB_REG_ACCESS *)(pBuffer + req->req.actual);
1138 iWordLength = length / sizeof(u32);
1139 if (iWordLength > 0) {
1140 for (i = 0; i < iWordLength; i++) {
1142 &preg->EP_REGS[ep->epnum-1].EP_WRITE
1148 result = iWordLength * sizeof(u32);
1152 if (result != ep->ep.maxpacket) {
1153 data = length - result;
1155 for (i = 0 ; i < data ; i++)
1156 Temp32.byte.DATA[i] = pBuf32->byte.DATA[i];
1158 _nbu2ss_ep_in_end(udc, ep->epnum, Temp32.dw, data);
1162 req->div_len = result;
1167 /*-------------------------------------------------------------------------*/
1168 static int _nbu2ss_epn_in_data(
1169 struct nbu2ss_udc *udc,
1170 struct nbu2ss_ep *ep,
1171 struct nbu2ss_req *req,
1181 num = ep->epnum - 1;
1183 if ((ep->ep_type != USB_ENDPOINT_XFER_INT)
1184 && (req->req.dma != 0)
1185 && (data_size >= sizeof(u32))) {
1186 nret = _nbu2ss_in_dma(udc, ep, req, num, data_size);
1188 data_size = min_t(u32, data_size, ep->ep.maxpacket);
1189 nret = _nbu2ss_epn_in_pio(udc, ep, req, data_size);
1195 /*-------------------------------------------------------------------------*/
1196 static int _nbu2ss_epn_in_transfer(
1197 struct nbu2ss_udc *udc,
1198 struct nbu2ss_ep *ep,
1199 struct nbu2ss_req *req
1210 num = ep->epnum - 1;
1212 status = _nbu2ss_readl(&udc->p_regs->EP_REGS[num].EP_STATUS);
1214 /*-------------------------------------------------------------*/
1215 /* State confirmation of FIFO */
1216 if (req->req.actual == 0) {
1217 if ((status & EPn_IN_EMPTY) == 0)
1218 return 1; /* Not Empty */
1221 if ((status & EPn_IN_FULL) != 0)
1222 return 1; /* Not Empty */
1225 /*-------------------------------------------------------------*/
1227 iBufSize = req->req.length - req->req.actual;
1229 result = _nbu2ss_epn_in_data(udc, ep, req, iBufSize);
1230 else if (req->req.length == 0)
1231 _nbu2ss_zero_len_pkt(udc, ep->epnum);
1236 /*-------------------------------------------------------------------------*/
1237 static int _nbu2ss_start_transfer(
1238 struct nbu2ss_udc *udc,
1239 struct nbu2ss_ep *ep,
1240 struct nbu2ss_req *req,
1245 req->dma_flag = FALSE;
1248 if (req->req.length == 0)
1251 if ((req->req.length % ep->ep.maxpacket) == 0)
1252 req->zero = req->req.zero;
1257 if (ep->epnum == 0) {
1259 switch (udc->ep0state) {
1260 case EP0_IN_DATA_PHASE:
1261 nret = _nbu2ss_ep0_in_transfer(udc, ep, req);
1264 case EP0_OUT_DATA_PHASE:
1265 nret = _nbu2ss_ep0_out_transfer(udc, ep, req);
1268 case EP0_IN_STATUS_PHASE:
1269 nret = EP0_send_NULL(udc, TRUE);
1278 if (ep->direct == USB_DIR_OUT) {
1281 nret = _nbu2ss_epn_out_transfer(udc, ep, req);
1284 nret = _nbu2ss_epn_in_transfer(udc, ep, req);
1291 /*-------------------------------------------------------------------------*/
1292 static void _nbu2ss_restert_transfer(struct nbu2ss_ep *ep)
1296 struct nbu2ss_req *req;
1298 if (list_empty(&ep->queue))
1301 req = list_entry(ep->queue.next, struct nbu2ss_req, queue);
1306 if (ep->epnum > 0) {
1307 length = _nbu2ss_readl(
1308 &ep->udc->p_regs->EP_REGS[ep->epnum-1].EP_LEN_DCNT);
1310 length &= EPn_LDATA;
1311 if (length < ep->ep.maxpacket)
1315 _nbu2ss_start_transfer(ep->udc, ep, req, bflag);
1318 /*-------------------------------------------------------------------------*/
1319 /* Endpoint Toggle Reset */
1320 static void _nbu2ss_endpoint_toggle_reset(
1321 struct nbu2ss_udc *udc,
1327 if ((ep_adrs == 0) || (ep_adrs == 0x80))
1330 num = (ep_adrs & 0x7F) - 1;
1332 if (ep_adrs & USB_DIR_IN)
1335 data = EPn_BCLR | EPn_OPIDCLR;
1337 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
1340 /*-------------------------------------------------------------------------*/
1341 /* Endpoint STALL set */
1342 static void _nbu2ss_set_endpoint_stall(
1343 struct nbu2ss_udc *udc,
1349 struct nbu2ss_ep *ep;
1350 PT_FC_REGS preg = udc->p_regs;
1352 if ((ep_adrs == 0) || (ep_adrs == 0x80)) {
1355 _nbu2ss_bitset(&preg->EP0_CONTROL, EP0_STL);
1358 _nbu2ss_bitclr(&preg->EP0_CONTROL, EP0_STL);
1361 epnum = ep_adrs & USB_ENDPOINT_NUMBER_MASK;
1363 ep = &udc->ep[epnum];
1369 if (ep_adrs & USB_DIR_IN)
1370 data = EPn_BCLR | EPn_ISTL;
1372 data = EPn_OSTL_EN | EPn_OSTL;
1374 _nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, data);
1377 ep->stalled = FALSE;
1378 if (ep_adrs & USB_DIR_IN) {
1379 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL
1383 _nbu2ss_readl(&preg->EP_REGS[num].EP_CONTROL);
1386 data |= EPn_OSTL_EN;
1388 _nbu2ss_writel(&preg->EP_REGS[num].EP_CONTROL
1392 ep->stalled = FALSE;
1395 _nbu2ss_restert_transfer(ep);
1402 /*-------------------------------------------------------------------------*/
1403 /* Device Descriptor */
1404 static struct usb_device_descriptor device_desc = {
1405 .bLength = sizeof(device_desc),
1406 .bDescriptorType = USB_DT_DEVICE,
1407 .bcdUSB = cpu_to_le16(0x0200),
1408 .bDeviceClass = USB_CLASS_VENDOR_SPEC,
1409 .bDeviceSubClass = 0x00,
1410 .bDeviceProtocol = 0x00,
1411 .bMaxPacketSize0 = 64,
1412 .idVendor = cpu_to_le16(0x0409),
1413 .idProduct = cpu_to_le16(0xfff0),
1414 .bcdDevice = 0xffff,
1415 .iManufacturer = 0x00,
1417 .iSerialNumber = 0x00,
1418 .bNumConfigurations = 0x01,
1421 /*-------------------------------------------------------------------------*/
1422 static void _nbu2ss_set_test_mode(struct nbu2ss_udc *udc, u32 mode)
1426 if (mode > MAX_TEST_MODE_NUM)
1429 pr_info("SET FEATURE : test mode = %d\n", mode);
1431 data = _nbu2ss_readl(&udc->p_regs->USB_CONTROL);
1432 data &= ~TEST_FORCE_ENABLE;
1433 data |= mode << TEST_MODE_SHIFT;
1435 _nbu2ss_writel(&udc->p_regs->USB_CONTROL, data);
1436 _nbu2ss_bitset(&udc->p_regs->TEST_CONTROL, CS_TESTMODEEN);
1439 /*-------------------------------------------------------------------------*/
1440 static int _nbu2ss_set_feature_device(
1441 struct nbu2ss_udc *udc,
1446 int result = -EOPNOTSUPP;
1449 case USB_DEVICE_REMOTE_WAKEUP:
1450 if (0x0000 == wIndex) {
1451 udc->remote_wakeup = U2F_ENABLE;
1456 case USB_DEVICE_TEST_MODE:
1457 wIndex = wIndex >> 8;
1458 if (wIndex <= MAX_TEST_MODE_NUM)
1469 /*-------------------------------------------------------------------------*/
1470 static int _nbu2ss_get_ep_stall(struct nbu2ss_udc *udc, u8 ep_adrs)
1473 u32 data = 0, bit_data;
1474 PT_FC_REGS preg = udc->p_regs;
1476 epnum = ep_adrs & ~USB_ENDPOINT_DIR_MASK;
1478 data = _nbu2ss_readl(&preg->EP0_CONTROL);
1482 data = _nbu2ss_readl(&preg->EP_REGS[epnum-1].EP_CONTROL);
1483 if ((data & EPn_EN) == 0)
1486 if (ep_adrs & USB_ENDPOINT_DIR_MASK)
1487 bit_data = EPn_ISTL;
1489 bit_data = EPn_OSTL;
1492 if ((data & bit_data) == 0)
1497 /*-------------------------------------------------------------------------*/
1498 static inline int _nbu2ss_req_feature(struct nbu2ss_udc *udc, bool bset)
1500 u8 recipient = (u8)(udc->ctrl.bRequestType & USB_RECIP_MASK);
1501 u8 direction = (u8)(udc->ctrl.bRequestType & USB_DIR_IN);
1502 u16 selector = udc->ctrl.wValue;
1503 u16 wIndex = udc->ctrl.wIndex;
1505 int result = -EOPNOTSUPP;
1507 if ((0x0000 != udc->ctrl.wLength) ||
1508 (USB_DIR_OUT != direction)) {
1512 switch (recipient) {
1513 case USB_RECIP_DEVICE:
1516 _nbu2ss_set_feature_device(udc, selector, wIndex);
1519 case USB_RECIP_ENDPOINT:
1520 if (0x0000 == (wIndex & 0xFF70)) {
1521 if (USB_ENDPOINT_HALT == selector) {
1522 ep_adrs = wIndex & 0xFF;
1523 if (bset == FALSE) {
1524 _nbu2ss_endpoint_toggle_reset(
1528 _nbu2ss_set_endpoint_stall(
1529 udc, ep_adrs, bset);
1541 _nbu2ss_create_ep0_packet(udc, udc->ep0_buf, 0);
1546 /*-------------------------------------------------------------------------*/
1547 static inline enum usb_device_speed _nbu2ss_get_speed(struct nbu2ss_udc *udc)
1550 enum usb_device_speed speed = USB_SPEED_FULL;
1552 data = _nbu2ss_readl(&udc->p_regs->USB_STATUS);
1553 if (data & HIGH_SPEED)
1554 speed = USB_SPEED_HIGH;
1559 /*-------------------------------------------------------------------------*/
1560 static void _nbu2ss_epn_set_stall(
1561 struct nbu2ss_udc *udc,
1562 struct nbu2ss_ep *ep
1569 PT_FC_REGS preg = udc->p_regs;
1571 if (ep->direct == USB_DIR_IN) {
1573 ; limit_cnt < IN_DATA_EMPTY_COUNT
1576 regdata = _nbu2ss_readl(
1577 &preg->EP_REGS[ep->epnum-1].EP_STATUS);
1579 if ((regdata & EPn_IN_DATA) == 0)
1586 ep_adrs = ep->epnum | ep->direct;
1587 _nbu2ss_set_endpoint_stall(udc, ep_adrs, 1);
1590 /*-------------------------------------------------------------------------*/
1591 static int std_req_get_status(struct nbu2ss_udc *udc)
1594 u16 status_data = 0;
1595 u8 recipient = (u8)(udc->ctrl.bRequestType & USB_RECIP_MASK);
1596 u8 direction = (u8)(udc->ctrl.bRequestType & USB_DIR_IN);
1598 int result = -EINVAL;
1600 if ((0x0000 != udc->ctrl.wValue)
1601 || (USB_DIR_IN != direction)) {
1606 length = min_t(u16, udc->ctrl.wLength, sizeof(status_data));
1608 switch (recipient) {
1609 case USB_RECIP_DEVICE:
1610 if (udc->ctrl.wIndex == 0x0000) {
1611 if (udc->gadget.is_selfpowered)
1612 status_data |= (1 << USB_DEVICE_SELF_POWERED);
1614 if (udc->remote_wakeup)
1615 status_data |= (1 << USB_DEVICE_REMOTE_WAKEUP);
1621 case USB_RECIP_ENDPOINT:
1622 if (0x0000 == (udc->ctrl.wIndex & 0xFF70)) {
1623 ep_adrs = (u8)(udc->ctrl.wIndex & 0xFF);
1624 result = _nbu2ss_get_ep_stall(udc, ep_adrs);
1627 status_data |= (1 << USB_ENDPOINT_HALT);
1636 memcpy(udc->ep0_buf, &status_data, length);
1637 _nbu2ss_create_ep0_packet(udc, udc->ep0_buf, length);
1638 _nbu2ss_ep0_in_transfer(udc, &udc->ep[0], &udc->ep0_req);
1641 ERR("*** Error GET_STATUS\n");
1647 /*-------------------------------------------------------------------------*/
1648 static int std_req_clear_feature(struct nbu2ss_udc *udc)
1650 return _nbu2ss_req_feature(udc, FALSE);
1653 /*-------------------------------------------------------------------------*/
1654 static int std_req_set_feature(struct nbu2ss_udc *udc)
1656 return _nbu2ss_req_feature(udc, TRUE);
1659 /*-------------------------------------------------------------------------*/
1660 static int std_req_set_address(struct nbu2ss_udc *udc)
1663 u32 wValue = udc->ctrl.wValue;
1665 if ((0x00 != udc->ctrl.bRequestType) ||
1666 (0x0000 != udc->ctrl.wIndex) ||
1667 (0x0000 != udc->ctrl.wLength)) {
1671 if (wValue != (wValue & 0x007F))
1674 wValue = wValue << USB_ADRS_SHIFT;
1676 _nbu2ss_writel(&udc->p_regs->USB_ADDRESS, wValue);
1677 _nbu2ss_create_ep0_packet(udc, udc->ep0_buf, 0);
1682 /*-------------------------------------------------------------------------*/
1683 static int std_req_set_configuration(struct nbu2ss_udc *udc)
1685 u32 ConfigValue = (u32)(udc->ctrl.wValue & 0x00ff);
1687 if ((0x0000 != udc->ctrl.wIndex) ||
1688 (0x0000 != udc->ctrl.wLength) ||
1689 (0x00 != udc->ctrl.bRequestType)) {
1693 udc->curr_config = ConfigValue;
1695 if (ConfigValue > 0) {
1696 _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, CONF);
1697 udc->devstate = USB_STATE_CONFIGURED;
1700 _nbu2ss_bitclr(&udc->p_regs->USB_CONTROL, CONF);
1701 udc->devstate = USB_STATE_ADDRESS;
1707 /*-------------------------------------------------------------------------*/
1708 static inline void _nbu2ss_read_request_data(struct nbu2ss_udc *udc, u32 *pdata)
1710 if ((udc == NULL) && (pdata == NULL))
1713 *pdata = _nbu2ss_readl(&udc->p_regs->SETUP_DATA0);
1715 *pdata = _nbu2ss_readl(&udc->p_regs->SETUP_DATA1);
1718 /*-------------------------------------------------------------------------*/
1719 static inline int _nbu2ss_decode_request(struct nbu2ss_udc *udc)
1721 bool bcall_back = TRUE;
1723 struct usb_ctrlrequest *p_ctrl;
1725 p_ctrl = &udc->ctrl;
1726 _nbu2ss_read_request_data(udc, (u32 *)p_ctrl);
1728 /* ep0 state control */
1729 if (p_ctrl->wLength == 0) {
1730 udc->ep0state = EP0_IN_STATUS_PHASE;
1733 if (p_ctrl->bRequestType & USB_DIR_IN)
1734 udc->ep0state = EP0_IN_DATA_PHASE;
1736 udc->ep0state = EP0_OUT_DATA_PHASE;
1739 if ((p_ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
1740 switch (p_ctrl->bRequest) {
1741 case USB_REQ_GET_STATUS:
1742 nret = std_req_get_status(udc);
1746 case USB_REQ_CLEAR_FEATURE:
1747 nret = std_req_clear_feature(udc);
1751 case USB_REQ_SET_FEATURE:
1752 nret = std_req_set_feature(udc);
1756 case USB_REQ_SET_ADDRESS:
1757 nret = std_req_set_address(udc);
1761 case USB_REQ_SET_CONFIGURATION:
1762 nret = std_req_set_configuration(udc);
1770 if (bcall_back == FALSE) {
1771 if (udc->ep0state == EP0_IN_STATUS_PHASE) {
1773 /*--------------------------------------*/
1775 nret = EP0_send_NULL(udc, TRUE);
1780 spin_unlock(&udc->lock);
1781 nret = udc->driver->setup(&udc->gadget, &udc->ctrl);
1782 spin_lock(&udc->lock);
1786 udc->ep0state = EP0_IDLE;
1791 /*-------------------------------------------------------------------------*/
1792 static inline int _nbu2ss_ep0_in_data_stage(struct nbu2ss_udc *udc)
1795 struct nbu2ss_req *req;
1796 struct nbu2ss_ep *ep = &udc->ep[0];
1798 if (list_empty(&ep->queue))
1801 req = list_entry(ep->queue.next, struct nbu2ss_req, queue);
1804 req = &udc->ep0_req;
1806 req->req.actual += req->div_len;
1809 nret = _nbu2ss_ep0_in_transfer(udc, ep, req);
1811 udc->ep0state = EP0_OUT_STATUS_PAHSE;
1812 EP0_receive_NULL(udc, TRUE);
1818 /*-------------------------------------------------------------------------*/
1819 static inline int _nbu2ss_ep0_out_data_stage(struct nbu2ss_udc *udc)
1822 struct nbu2ss_req *req;
1823 struct nbu2ss_ep *ep = &udc->ep[0];
1825 if (list_empty(&ep->queue))
1828 req = list_entry(ep->queue.next, struct nbu2ss_req, queue);
1831 req = &udc->ep0_req;
1833 nret = _nbu2ss_ep0_out_transfer(udc, ep, req);
1835 udc->ep0state = EP0_IN_STATUS_PHASE;
1836 EP0_send_NULL(udc, TRUE);
1838 } else if (nret < 0) {
1839 _nbu2ss_bitset(&udc->p_regs->EP0_CONTROL, EP0_BCLR);
1840 req->req.status = nret;
1846 /*-------------------------------------------------------------------------*/
1847 static inline int _nbu2ss_ep0_status_stage(struct nbu2ss_udc *udc)
1849 struct nbu2ss_req *req;
1850 struct nbu2ss_ep *ep = &udc->ep[0];
1852 if (list_empty(&ep->queue))
1855 req = list_entry(ep->queue.next, struct nbu2ss_req, queue);
1858 req = &udc->ep0_req;
1859 if (req->req.complete)
1860 req->req.complete(&ep->ep, &req->req);
1863 if (req->req.complete)
1864 _nbu2ss_ep_done(ep, req, 0);
1867 udc->ep0state = EP0_IDLE;
1872 /*-------------------------------------------------------------------------*/
1873 static inline void _nbu2ss_ep0_int(struct nbu2ss_udc *udc)
1880 status = _nbu2ss_readl(&udc->p_regs->EP0_STATUS);
1881 intr = status & EP0_STATUS_RW_BIT;
1882 _nbu2ss_writel(&udc->p_regs->EP0_STATUS, ~(u32)intr);
1884 status &= (SETUP_INT | EP0_IN_INT | EP0_OUT_INT
1885 | STG_END_INT | EP0_OUT_NULL_INT);
1888 pr_info("--- %s Not Decode Interrupt\n", __func__);
1889 pr_info("--- EP0_STATUS = 0x%08x\n", intr);
1893 if (udc->gadget.speed == USB_SPEED_UNKNOWN)
1894 udc->gadget.speed = _nbu2ss_get_speed(udc);
1896 for (i = 0; i < EP0_END_XFER; i++) {
1897 switch (udc->ep0state) {
1899 if (status & SETUP_INT) {
1901 nret = _nbu2ss_decode_request(udc);
1905 case EP0_IN_DATA_PHASE:
1906 if (status & EP0_IN_INT) {
1907 status &= ~EP0_IN_INT;
1908 nret = _nbu2ss_ep0_in_data_stage(udc);
1912 case EP0_OUT_DATA_PHASE:
1913 if (status & EP0_OUT_INT) {
1914 status &= ~EP0_OUT_INT;
1915 nret = _nbu2ss_ep0_out_data_stage(udc);
1919 case EP0_IN_STATUS_PHASE:
1920 if ((status & STG_END_INT) || (status & SETUP_INT)) {
1921 status &= ~(STG_END_INT | EP0_IN_INT);
1922 nret = _nbu2ss_ep0_status_stage(udc);
1926 case EP0_OUT_STATUS_PAHSE:
1927 if ((status & STG_END_INT)
1928 || (status & SETUP_INT)
1929 || (status & EP0_OUT_NULL_INT)) {
1930 status &= ~(STG_END_INT
1932 | EP0_OUT_NULL_INT);
1934 nret = _nbu2ss_ep0_status_stage(udc);
1950 _nbu2ss_set_endpoint_stall(udc, 0, TRUE);
1954 /*-------------------------------------------------------------------------*/
1955 static void _nbu2ss_ep_done(
1956 struct nbu2ss_ep *ep,
1957 struct nbu2ss_req *req,
1960 struct nbu2ss_udc *udc = ep->udc;
1962 list_del_init(&req->queue);
1964 if (status == -ECONNRESET)
1965 _nbu2ss_fifo_flush(udc, ep);
1967 if (likely(req->req.status == -EINPROGRESS))
1968 req->req.status = status;
1971 _nbu2ss_epn_set_stall(udc, ep);
1973 if (!list_empty(&ep->queue))
1974 _nbu2ss_restert_transfer(ep);
1978 if ((ep->direct == USB_DIR_OUT) && (ep->epnum > 0) &&
1979 (req->req.dma != 0))
1980 _nbu2ss_dma_unmap_single(udc, ep, req, USB_DIR_OUT);
1983 spin_unlock(&udc->lock);
1984 req->req.complete(&ep->ep, &req->req);
1985 spin_lock(&udc->lock);
1988 /*-------------------------------------------------------------------------*/
1989 static inline void _nbu2ss_epn_in_int(
1990 struct nbu2ss_udc *udc,
1991 struct nbu2ss_ep *ep,
1992 struct nbu2ss_req *req)
1997 PT_FC_REGS preg = udc->p_regs;
2000 return; /* DMA is forwarded */
2002 req->req.actual += req->div_len;
2005 if (req->req.actual != req->req.length) {
2006 /*---------------------------------------------------------*/
2007 /* remainder of data */
2008 result = _nbu2ss_epn_in_transfer(udc, ep, req);
2011 if (req->zero && ((req->req.actual % ep->ep.maxpacket) == 0)) {
2014 _nbu2ss_readl(&preg->EP_REGS[ep->epnum-1].EP_STATUS);
2016 if ((status & EPn_IN_FULL) == 0) {
2017 /*-----------------------------------------*/
2018 /* 0 Length Packet */
2020 _nbu2ss_zero_len_pkt(udc, ep->epnum);
2027 /*---------------------------------------------------------*/
2029 _nbu2ss_ep_done(ep, req, result);
2033 /*-------------------------------------------------------------------------*/
2034 static inline void _nbu2ss_epn_out_int(
2035 struct nbu2ss_udc *udc,
2036 struct nbu2ss_ep *ep,
2037 struct nbu2ss_req *req)
2041 result = _nbu2ss_epn_out_transfer(udc, ep, req);
2043 _nbu2ss_ep_done(ep, req, result);
2046 /*-------------------------------------------------------------------------*/
2047 static inline void _nbu2ss_epn_in_dma_int(
2048 struct nbu2ss_udc *udc,
2049 struct nbu2ss_ep *ep,
2050 struct nbu2ss_req *req)
2054 struct usb_request *preq;
2058 if (req->dma_flag == FALSE)
2061 preq->actual += req->div_len;
2063 req->dma_flag = FALSE;
2066 _nbu2ss_dma_unmap_single(udc, ep, req, USB_DIR_IN);
2069 if (preq->actual != preq->length) {
2070 _nbu2ss_epn_in_transfer(udc, ep, req);
2072 mpkt = ep->ep.maxpacket;
2073 size = preq->actual % mpkt;
2075 if (((preq->actual & 0x03) == 0) && (size < mpkt))
2076 _nbu2ss_ep_in_end(udc, ep->epnum, 0, 0);
2078 _nbu2ss_epn_in_int(udc, ep, req);
2083 /*-------------------------------------------------------------------------*/
2084 static inline void _nbu2ss_epn_out_dma_int(
2085 struct nbu2ss_udc *udc,
2086 struct nbu2ss_ep *ep,
2087 struct nbu2ss_req *req)
2091 u32 dmacnt, ep_dmacnt;
2093 PT_FC_REGS preg = udc->p_regs;
2095 num = ep->epnum - 1;
2097 if (req->req.actual == req->req.length) {
2098 if ((req->req.length % ep->ep.maxpacket) && !req->zero) {
2100 req->dma_flag = FALSE;
2101 _nbu2ss_ep_done(ep, req, 0);
2106 ep_dmacnt = _nbu2ss_readl(&preg->EP_REGS[num].EP_LEN_DCNT)
2110 for (i = 0; i < EPC_PLL_LOCK_COUNT; i++) {
2111 dmacnt = _nbu2ss_readl(&preg->EP_DCR[num].EP_DCR1)
2114 if (ep_dmacnt == dmacnt)
2118 _nbu2ss_bitclr(&preg->EP_DCR[num].EP_DCR1, DCR1_EPn_REQEN);
2121 mpkt = ep->ep.maxpacket;
2122 if ((req->div_len % mpkt) == 0)
2123 req->div_len -= mpkt * dmacnt;
2126 if ((req->req.actual % ep->ep.maxpacket) > 0) {
2127 if (req->req.actual == req->div_len) {
2129 req->dma_flag = FALSE;
2130 _nbu2ss_ep_done(ep, req, 0);
2135 req->req.actual += req->div_len;
2137 req->dma_flag = FALSE;
2139 _nbu2ss_epn_out_int(udc, ep, req);
2142 /*-------------------------------------------------------------------------*/
2143 static inline void _nbu2ss_epn_int(struct nbu2ss_udc *udc, u32 epnum)
2148 struct nbu2ss_req *req;
2149 struct nbu2ss_ep *ep = &udc->ep[epnum];
2153 /* Interrupt Status */
2154 status = _nbu2ss_readl(&udc->p_regs->EP_REGS[num].EP_STATUS);
2156 /* Interrupt Clear */
2157 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_STATUS, ~(u32)status);
2159 if (list_empty(&ep->queue))
2162 req = list_entry(ep->queue.next, struct nbu2ss_req, queue);
2165 /* pr_warn("=== %s(%d) req == NULL\n", __func__, epnum); */
2169 if (status & EPn_OUT_END_INT) {
2170 status &= ~EPn_OUT_INT;
2171 _nbu2ss_epn_out_dma_int(udc, ep, req);
2174 if (status & EPn_OUT_INT)
2175 _nbu2ss_epn_out_int(udc, ep, req);
2177 if (status & EPn_IN_END_INT) {
2178 status &= ~EPn_IN_INT;
2179 _nbu2ss_epn_in_dma_int(udc, ep, req);
2182 if (status & EPn_IN_INT)
2183 _nbu2ss_epn_in_int(udc, ep, req);
2186 /*-------------------------------------------------------------------------*/
2187 static inline void _nbu2ss_ep_int(struct nbu2ss_udc *udc, u32 epnum)
2190 _nbu2ss_ep0_int(udc);
2192 _nbu2ss_epn_int(udc, epnum);
2195 /*-------------------------------------------------------------------------*/
2196 static void _nbu2ss_ep0_enable(struct nbu2ss_udc *udc)
2198 _nbu2ss_bitset(&udc->p_regs->EP0_CONTROL, (EP0_AUTO | EP0_BCLR));
2199 _nbu2ss_writel(&udc->p_regs->EP0_INT_ENA, EP0_INT_EN_BIT);
2203 /*-------------------------------------------------------------------------*/
2204 static void _nbu2ss_ep0_disable(struct nbu2ss_udc *udc)
2206 _nbu2ss_bitclr(&udc->p_regs->EP0_INT_ENA, EP0_INT_EN_BIT);
2208 _nbu2ss_bitset(&udc->p_regs->EP0_CONTROL
2209 , (EP0_BCLR | EP0_INAK | EP0_ONAK | EP0_BCLR));
2211 _nbu2ss_bitclr(&udc->p_regs->EP0_CONTROL, EP0_AUTO);
2215 /*-------------------------------------------------------------------------*/
2216 static int _nbu2ss_nuke(struct nbu2ss_udc *udc,
2217 struct nbu2ss_ep *ep,
2220 struct nbu2ss_req *req;
2222 /* Endpoint Disable */
2223 _nbu2ss_epn_exit(udc, ep);
2226 _nbu2ss_ep_dma_exit(udc, ep);
2228 if (list_empty(&ep->queue))
2231 /* called with irqs blocked */
2232 while (!list_empty(&ep->queue)) {
2233 req = list_entry(ep->queue.next, struct nbu2ss_req, queue);
2234 _nbu2ss_ep_done(ep, req, status);
2240 /*-------------------------------------------------------------------------*/
2241 static void _nbu2ss_quiesce(struct nbu2ss_udc *udc)
2243 struct nbu2ss_ep *ep;
2245 udc->gadget.speed = USB_SPEED_UNKNOWN;
2247 _nbu2ss_nuke(udc, &udc->ep[0], -ESHUTDOWN);
2250 list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
2251 _nbu2ss_nuke(udc, ep, -ESHUTDOWN);
2255 /*-------------------------------------------------------------------------*/
2256 static int _nbu2ss_pullup(struct nbu2ss_udc *udc, int is_on)
2261 ERR("%s, bad param\n", __func__);
2265 if (udc->vbus_active == 0)
2270 /* INFO(" --- D+ Pullup\n"); */
2273 reg_dt = (_nbu2ss_readl(&udc->p_regs->USB_CONTROL)
2274 | PUE2) & ~(u32)CONNECTB;
2276 _nbu2ss_writel(&udc->p_regs->USB_CONTROL, reg_dt);
2281 /* INFO(" --- D+ Pulldown\n"); */
2283 reg_dt = (_nbu2ss_readl(&udc->p_regs->USB_CONTROL) | CONNECTB)
2286 _nbu2ss_writel(&udc->p_regs->USB_CONTROL, reg_dt);
2287 udc->gadget.speed = USB_SPEED_UNKNOWN;
2293 /*-------------------------------------------------------------------------*/
2294 static void _nbu2ss_fifo_flush(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
2296 PT_FC_REGS p = udc->p_regs;
2298 if (udc->vbus_active == 0)
2301 if (ep->epnum == 0) {
2303 _nbu2ss_bitset(&p->EP0_CONTROL, EP0_BCLR);
2307 _nbu2ss_ep_dma_abort(udc, ep);
2308 _nbu2ss_bitset(&p->EP_REGS[ep->epnum - 1].EP_CONTROL, EPn_BCLR);
2312 /*-------------------------------------------------------------------------*/
2313 static int _nbu2ss_enable_controller(struct nbu2ss_udc *udc)
2317 if (udc->udc_enabled)
2321 emxx_open_clockgate(EMXX_CLK_USB1);
2322 /* emxx_clkctrl_off(EMXX_CLKCTRL_USB1); */
2323 /* emxx_clkctrl_on(EMXX_CLKCTRL_USB1); */
2324 emxx_unreset_device(EMXX_RST_USB1);
2329 _nbu2ss_bitset(&udc->p_regs->EPCTR, (DIRPD | EPC_RST));
2330 udelay(EPC_RST_DISABLE_TIME); /* 1us wait */
2332 _nbu2ss_bitclr(&udc->p_regs->EPCTR, DIRPD);
2333 mdelay(EPC_DIRPD_DISABLE_TIME); /* 1ms wait */
2335 _nbu2ss_bitclr(&udc->p_regs->EPCTR, EPC_RST);
2337 _nbu2ss_writel(&udc->p_regs->AHBSCTR, WAIT_MODE);
2340 /* DMA Mode Setting */
2341 if ((system_rev & EMXX_REV_MASK) == EMXX_REV_ES1) {
2342 _nbu2ss_bitset(&udc->p_regs->AHBMCTR, BURST_TYPE);
2343 _nbu2ss_bitclr(&udc->p_regs->AHBMCTR, HTRANS_MODE);
2346 _nbu2ss_writel(&udc->p_regs->AHBMCTR,
2347 HBUSREQ_MODE | HTRANS_MODE | WBURST_TYPE);
2349 while (!(_nbu2ss_readl(&udc->p_regs->EPCTR) & PLL_LOCK)) {
2351 udelay(1); /* 1us wait */
2352 if (waitcnt == EPC_PLL_LOCK_COUNT) {
2353 ERR("*** Reset Cancel failed\n");
2359 if ((system_rev & EMXX_REV_MASK) < EMXX_REV_ES3)
2361 _nbu2ss_bitset(&udc->p_regs->UTMI_CHARACTER_1, USB_SQUSET);
2363 _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, (INT_SEL | SOF_RCV));
2366 _nbu2ss_ep0_enable(udc);
2368 /* USB Interrupt Enable */
2369 _nbu2ss_bitset(&udc->p_regs->USB_INT_ENA, USB_INT_EN_BIT);
2371 udc->udc_enabled = TRUE;
2377 /*-------------------------------------------------------------------------*/
2378 static void _nbu2ss_reset_controller(struct nbu2ss_udc *udc)
2380 _nbu2ss_bitset(&udc->p_regs->EPCTR, EPC_RST);
2381 _nbu2ss_bitclr(&udc->p_regs->EPCTR, EPC_RST);
2384 /*-------------------------------------------------------------------------*/
2385 static void _nbu2ss_disable_controller(struct nbu2ss_udc *udc)
2387 if (udc->udc_enabled) {
2388 udc->udc_enabled = FALSE;
2389 _nbu2ss_reset_controller(udc);
2390 _nbu2ss_bitset(&udc->p_regs->EPCTR, (DIRPD | EPC_RST));
2393 emxx_reset_device(EMXX_RST_USB1);
2394 /* emxx_clkctrl_on(EMXX_CLKCTRL_USB1); */
2395 emxx_close_clockgate(EMXX_CLK_USB1);
2399 /*-------------------------------------------------------------------------*/
2400 static inline void _nbu2ss_check_vbus(struct nbu2ss_udc *udc)
2406 mdelay(VBUS_CHATTERING_MDELAY); /* wait (ms) */
2409 reg_dt = gpio_get_value(VBUS_VALUE);
2412 udc->linux_suspended = 0;
2414 _nbu2ss_reset_controller(udc);
2415 pr_info(" ----- VBUS OFF\n");
2417 if (udc->vbus_active == 1) {
2419 udc->vbus_active = 0;
2420 if (udc->usb_suspended) {
2421 udc->usb_suspended = 0;
2422 /* _nbu2ss_reset_controller(udc); */
2424 udc->devstate = USB_STATE_NOTATTACHED;
2426 _nbu2ss_quiesce(udc);
2428 spin_unlock(&udc->lock);
2429 udc->driver->disconnect(&udc->gadget);
2430 spin_lock(&udc->lock);
2433 _nbu2ss_disable_controller(udc);
2436 mdelay(5); /* wait (5ms) */
2437 reg_dt = gpio_get_value(VBUS_VALUE);
2441 pr_info(" ----- VBUS ON\n");
2443 if (udc->linux_suspended)
2446 if (udc->vbus_active == 0) {
2448 udc->vbus_active = 1;
2449 udc->devstate = USB_STATE_POWERED;
2451 nret = _nbu2ss_enable_controller(udc);
2453 _nbu2ss_disable_controller(udc);
2454 udc->vbus_active = 0;
2458 _nbu2ss_pullup(udc, 1);
2460 #ifdef UDC_DEBUG_DUMP
2461 _nbu2ss_dump_register(udc);
2462 #endif /* UDC_DEBUG_DUMP */
2465 if (udc->devstate == USB_STATE_POWERED)
2466 _nbu2ss_pullup(udc, 1);
2471 /*-------------------------------------------------------------------------*/
2472 static inline void _nbu2ss_int_bus_reset(struct nbu2ss_udc *udc)
2474 udc->devstate = USB_STATE_DEFAULT;
2475 udc->remote_wakeup = 0;
2477 _nbu2ss_quiesce(udc);
2479 udc->ep0state = EP0_IDLE;
2482 /*-------------------------------------------------------------------------*/
2483 static inline void _nbu2ss_int_usb_resume(struct nbu2ss_udc *udc)
2485 if (udc->usb_suspended == 1) {
2486 udc->usb_suspended = 0;
2487 if (udc->driver && udc->driver->resume) {
2488 spin_unlock(&udc->lock);
2489 udc->driver->resume(&udc->gadget);
2490 spin_lock(&udc->lock);
2495 /*-------------------------------------------------------------------------*/
2496 static inline void _nbu2ss_int_usb_suspend(struct nbu2ss_udc *udc)
2500 if (udc->usb_suspended == 0) {
2501 reg_dt = gpio_get_value(VBUS_VALUE);
2506 udc->usb_suspended = 1;
2507 if (udc->driver && udc->driver->suspend) {
2508 spin_unlock(&udc->lock);
2509 udc->driver->suspend(&udc->gadget);
2510 spin_lock(&udc->lock);
2513 _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, SUSPEND);
2517 /*-------------------------------------------------------------------------*/
2518 /* VBUS (GPIO153) Interrupt */
2519 static irqreturn_t _nbu2ss_vbus_irq(int irq, void *_udc)
2521 struct nbu2ss_udc *udc = (struct nbu2ss_udc *)_udc;
2523 spin_lock(&udc->lock);
2524 _nbu2ss_check_vbus(udc);
2525 spin_unlock(&udc->lock);
2530 /*-------------------------------------------------------------------------*/
2531 /* Interrupt (udc) */
2532 static irqreturn_t _nbu2ss_udc_irq(int irq, void *_udc)
2534 u8 suspend_flag = 0;
2538 struct nbu2ss_udc *udc = (struct nbu2ss_udc *)_udc;
2539 PT_FC_REGS preg = udc->p_regs;
2541 if (gpio_get_value(VBUS_VALUE) == 0) {
2542 _nbu2ss_writel(&preg->USB_INT_STA, ~USB_INT_STA_RW);
2543 _nbu2ss_writel(&preg->USB_INT_ENA, 0);
2547 spin_lock(&udc->lock);
2550 if (gpio_get_value(VBUS_VALUE) == 0) {
2551 _nbu2ss_writel(&preg->USB_INT_STA, ~USB_INT_STA_RW);
2552 _nbu2ss_writel(&preg->USB_INT_ENA, 0);
2555 status = _nbu2ss_readl(&preg->USB_INT_STA);
2560 _nbu2ss_writel(&preg->USB_INT_STA, ~(status & USB_INT_STA_RW));
2562 if (status & USB_RST_INT) {
2564 _nbu2ss_int_bus_reset(udc);
2567 if (status & RSUM_INT) {
2569 _nbu2ss_int_usb_resume(udc);
2572 if (status & SPND_INT) {
2577 if (status & EPn_INT) {
2579 int_bit = status >> 8;
2581 for (epnum = 0; epnum < NUM_ENDPOINTS; epnum++) {
2584 _nbu2ss_ep_int(udc, epnum);
2595 _nbu2ss_int_usb_suspend(udc);
2597 spin_unlock(&udc->lock);
2602 /*-------------------------------------------------------------------------*/
2604 static int nbu2ss_ep_enable(
2606 const struct usb_endpoint_descriptor *desc)
2609 unsigned long flags;
2611 struct nbu2ss_ep *ep;
2612 struct nbu2ss_udc *udc;
2614 if ((_ep == NULL) || (desc == NULL)) {
2615 ERR(" *** %s, bad param\n", __func__);
2619 ep = container_of(_ep, struct nbu2ss_ep, ep);
2620 if ((ep == NULL) || (ep->udc == NULL)) {
2621 ERR(" *** %s, ep == NULL !!\n", __func__);
2625 ep_type = usb_endpoint_type(desc);
2626 if ((ep_type == USB_ENDPOINT_XFER_CONTROL)
2627 || (ep_type == USB_ENDPOINT_XFER_ISOC)) {
2629 ERR(" *** %s, bat bmAttributes\n", __func__);
2634 if (udc->vbus_active == 0)
2637 if ((udc->driver == NULL)
2638 || (udc->gadget.speed == USB_SPEED_UNKNOWN)) {
2640 ERR(" *** %s, udc !!\n", __func__);
2644 spin_lock_irqsave(&udc->lock, flags);
2647 ep->epnum = usb_endpoint_num(desc);
2648 ep->direct = desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK;
2649 ep->ep_type = ep_type;
2652 ep->stalled = FALSE;
2654 ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
2657 _nbu2ss_ep_dma_init(udc, ep);
2659 /* Endpoint setting */
2660 _nbu2ss_ep_init(udc, ep);
2662 spin_unlock_irqrestore(&udc->lock, flags);
2667 /*-------------------------------------------------------------------------*/
2668 static int nbu2ss_ep_disable(struct usb_ep *_ep)
2670 struct nbu2ss_ep *ep;
2671 struct nbu2ss_udc *udc;
2672 unsigned long flags;
2675 ERR(" *** %s, bad param\n", __func__);
2679 ep = container_of(_ep, struct nbu2ss_ep, ep);
2680 if ((ep == NULL) || (ep->udc == NULL)) {
2681 ERR(" *** %s, ep == NULL !!\n", __func__);
2686 if (udc->vbus_active == 0)
2689 spin_lock_irqsave(&udc->lock, flags);
2690 _nbu2ss_nuke(udc, ep, -EINPROGRESS); /* dequeue request */
2691 spin_unlock_irqrestore(&udc->lock, flags);
2696 /*-------------------------------------------------------------------------*/
2697 static struct usb_request *nbu2ss_ep_alloc_request(
2701 struct nbu2ss_req *req;
2703 req = kzalloc(sizeof(*req), gfp_flags);
2708 req->req.dma = DMA_ADDR_INVALID;
2710 INIT_LIST_HEAD(&req->queue);
2715 /*-------------------------------------------------------------------------*/
2716 static void nbu2ss_ep_free_request(
2718 struct usb_request *_req)
2720 struct nbu2ss_req *req;
2723 req = container_of(_req, struct nbu2ss_req, req);
2729 /*-------------------------------------------------------------------------*/
2730 static int nbu2ss_ep_queue(
2732 struct usb_request *_req,
2735 struct nbu2ss_req *req;
2736 struct nbu2ss_ep *ep;
2737 struct nbu2ss_udc *udc;
2738 unsigned long flags;
2740 int result = -EINVAL;
2742 /* catch various bogus parameters */
2743 if ((_ep == NULL) || (_req == NULL)) {
2745 ERR("*** %s --- _ep == NULL\n", __func__);
2748 ERR("*** %s --- _req == NULL\n", __func__);
2753 req = container_of(_req, struct nbu2ss_req, req);
2755 (!_req->complete || !_req->buf
2756 || !list_empty(&req->queue))) {
2758 if (!_req->complete)
2759 ERR("*** %s --- !_req->complete\n", __func__);
2762 ERR("*** %s --- !_req->buf\n", __func__);
2764 if (!list_empty(&req->queue))
2765 ERR("*** %s --- !list_empty(&req->queue)\n", __func__);
2770 ep = container_of(_ep, struct nbu2ss_ep, ep);
2773 /* INFO("=== %s(ep%d), zero=%d\n", __func__, ep->epnum, _req->zero); */
2775 if (udc->vbus_active == 0) {
2776 pr_info("Can't ep_queue (VBUS OFF)\n");
2780 if (unlikely(!udc->driver)) {
2781 ERR("%s, bogus device state %p\n", __func__, udc->driver);
2785 spin_lock_irqsave(&udc->lock, flags);
2788 if ((u32)req->req.buf & 0x3)
2789 req->unaligned = TRUE;
2791 req->unaligned = FALSE;
2793 if (req->unaligned) {
2794 if (ep->virt_buf == NULL)
2795 ep->virt_buf = (u8 *)dma_alloc_coherent(
2797 &ep->phys_buf, GFP_KERNEL | GFP_DMA);
2798 if (ep->epnum > 0) {
2799 if (ep->direct == USB_DIR_IN)
2800 memcpy(ep->virt_buf, req->req.buf,
2805 if ((ep->epnum > 0) && (ep->direct == USB_DIR_OUT) &&
2806 (req->req.dma != 0))
2807 _nbu2ss_dma_map_single(udc, ep, req, USB_DIR_OUT);
2810 _req->status = -EINPROGRESS;
2813 bflag = list_empty(&ep->queue);
2814 list_add_tail(&req->queue, &ep->queue);
2816 if ((bflag != FALSE) && (ep->stalled == FALSE)) {
2818 result = _nbu2ss_start_transfer(udc, ep, req, FALSE);
2820 ERR(" *** %s, result = %d\n", __func__, result);
2821 list_del(&req->queue);
2822 } else if ((ep->epnum > 0) && (ep->direct == USB_DIR_OUT)) {
2824 if (req->req.length < 4 &&
2825 req->req.length == req->req.actual)
2827 if (req->req.length == req->req.actual)
2829 _nbu2ss_ep_done(ep, req, result);
2833 spin_unlock_irqrestore(&udc->lock, flags);
2838 /*-------------------------------------------------------------------------*/
2839 static int nbu2ss_ep_dequeue(
2841 struct usb_request *_req)
2843 struct nbu2ss_req *req;
2844 struct nbu2ss_ep *ep;
2845 struct nbu2ss_udc *udc;
2846 unsigned long flags;
2848 /*INFO("=== %s()\n", __func__);*/
2850 /* catch various bogus parameters */
2851 if ((_ep == NULL) || (_req == NULL)) {
2852 /* ERR("%s, bad param(1)\n", __func__); */
2856 ep = container_of(_ep, struct nbu2ss_ep, ep);
2858 ERR("%s, ep == NULL !!\n", __func__);
2866 spin_lock_irqsave(&udc->lock, flags);
2868 /* make sure it's actually queued on this endpoint */
2869 list_for_each_entry(req, &ep->queue, queue) {
2870 if (&req->req == _req)
2873 if (&req->req != _req) {
2874 spin_unlock_irqrestore(&udc->lock, flags);
2875 pr_debug("%s no queue(EINVAL)\n", __func__);
2879 _nbu2ss_ep_done(ep, req, -ECONNRESET);
2881 spin_unlock_irqrestore(&udc->lock, flags);
2886 /*-------------------------------------------------------------------------*/
2887 static int nbu2ss_ep_set_halt(struct usb_ep *_ep, int value)
2890 unsigned long flags;
2892 struct nbu2ss_ep *ep;
2893 struct nbu2ss_udc *udc;
2895 /* INFO("=== %s()\n", __func__); */
2898 ERR("%s, bad param\n", __func__);
2902 ep = container_of(_ep, struct nbu2ss_ep, ep);
2904 ERR("%s, bad ep\n", __func__);
2910 ERR(" *** %s, bad udc\n", __func__);
2914 spin_lock_irqsave(&udc->lock, flags);
2916 ep_adrs = ep->epnum | ep->direct;
2918 _nbu2ss_set_endpoint_stall(udc, ep_adrs, value);
2919 ep->stalled = FALSE;
2921 if (list_empty(&ep->queue))
2922 _nbu2ss_epn_set_stall(udc, ep);
2930 spin_unlock_irqrestore(&udc->lock, flags);
2935 static int nbu2ss_ep_set_wedge(struct usb_ep *_ep)
2937 return nbu2ss_ep_set_halt(_ep, 1);
2940 /*-------------------------------------------------------------------------*/
2941 static int nbu2ss_ep_fifo_status(struct usb_ep *_ep)
2944 struct nbu2ss_ep *ep;
2945 struct nbu2ss_udc *udc;
2946 unsigned long flags;
2949 /* INFO("=== %s()\n", __func__); */
2952 ERR("%s, bad param\n", __func__);
2956 ep = container_of(_ep, struct nbu2ss_ep, ep);
2958 ERR("%s, bad ep\n", __func__);
2964 ERR("%s, bad udc\n", __func__);
2970 data = gpio_get_value(VBUS_VALUE);
2974 spin_lock_irqsave(&udc->lock, flags);
2976 if (ep->epnum == 0) {
2977 data = _nbu2ss_readl(&preg->EP0_LENGTH) & EP0_LDATA;
2980 data = _nbu2ss_readl(&preg->EP_REGS[ep->epnum-1].EP_LEN_DCNT)
2984 spin_unlock_irqrestore(&udc->lock, flags);
2989 /*-------------------------------------------------------------------------*/
2990 static void nbu2ss_ep_fifo_flush(struct usb_ep *_ep)
2993 struct nbu2ss_ep *ep;
2994 struct nbu2ss_udc *udc;
2995 unsigned long flags;
2997 /* INFO("=== %s()\n", __func__); */
3000 ERR("%s, bad param\n", __func__);
3004 ep = container_of(_ep, struct nbu2ss_ep, ep);
3006 ERR("%s, bad ep\n", __func__);
3012 ERR("%s, bad udc\n", __func__);
3016 data = gpio_get_value(VBUS_VALUE);
3020 spin_lock_irqsave(&udc->lock, flags);
3021 _nbu2ss_fifo_flush(udc, ep);
3022 spin_unlock_irqrestore(&udc->lock, flags);
3025 /*-------------------------------------------------------------------------*/
3026 static struct usb_ep_ops nbu2ss_ep_ops = {
3027 .enable = nbu2ss_ep_enable,
3028 .disable = nbu2ss_ep_disable,
3030 .alloc_request = nbu2ss_ep_alloc_request,
3031 .free_request = nbu2ss_ep_free_request,
3033 .queue = nbu2ss_ep_queue,
3034 .dequeue = nbu2ss_ep_dequeue,
3036 .set_halt = nbu2ss_ep_set_halt,
3037 .set_wedge = nbu2ss_ep_set_wedge,
3039 .fifo_status = nbu2ss_ep_fifo_status,
3040 .fifo_flush = nbu2ss_ep_fifo_flush,
3044 /*-------------------------------------------------------------------------*/
3045 /* usb_gadget_ops */
3047 /*-------------------------------------------------------------------------*/
3048 static int nbu2ss_gad_get_frame(struct usb_gadget *pgadget)
3051 struct nbu2ss_udc *udc;
3053 /* INFO("=== %s()\n", __func__); */
3055 if (pgadget == NULL) {
3056 ERR("%s, bad param\n", __func__);
3060 udc = container_of(pgadget, struct nbu2ss_udc, gadget);
3062 ERR("%s, udc == NULL\n", __func__);
3066 data = gpio_get_value(VBUS_VALUE);
3070 data = _nbu2ss_readl(&udc->p_regs->USB_ADDRESS) & FRAME;
3075 /*-------------------------------------------------------------------------*/
3076 static int nbu2ss_gad_wakeup(struct usb_gadget *pgadget)
3081 struct nbu2ss_udc *udc;
3083 /* INFO("=== %s()\n", __func__); */
3085 if (pgadget == NULL) {
3086 ERR("%s, bad param\n", __func__);
3090 udc = container_of(pgadget, struct nbu2ss_udc, gadget);
3092 ERR("%s, udc == NULL\n", __func__);
3096 data = gpio_get_value(VBUS_VALUE);
3098 pr_warn("VBUS LEVEL = %d\n", data);
3102 _nbu2ss_bitset(&udc->p_regs->EPCTR, PLL_RESUME);
3104 for (i = 0; i < EPC_PLL_LOCK_COUNT; i++) {
3105 data = _nbu2ss_readl(&udc->p_regs->EPCTR);
3107 if (data & PLL_LOCK)
3111 _nbu2ss_bitclr(&udc->p_regs->EPCTR, PLL_RESUME);
3116 /*-------------------------------------------------------------------------*/
3117 static int nbu2ss_gad_set_selfpowered(struct usb_gadget *pgadget,
3120 unsigned long flags;
3122 /* INFO("=== %s()\n", __func__); */
3124 if (pgadget == NULL) {
3125 ERR("%s, bad param\n", __func__);
3129 spin_lock_irqsave(&udc->lock, flags);
3130 pgadget->is_selfpowered = (is_selfpowered != 0);
3131 spin_unlock_irqrestore(&udc->lock, flags);
3136 /*-------------------------------------------------------------------------*/
3137 static int nbu2ss_gad_vbus_session(struct usb_gadget *pgadget, int is_active)
3139 /* INFO("=== %s()\n", __func__); */
3143 /*-------------------------------------------------------------------------*/
3144 static int nbu2ss_gad_vbus_draw(struct usb_gadget *pgadget, unsigned mA)
3146 struct nbu2ss_udc *udc;
3147 unsigned long flags;
3149 /* INFO("=== %s()\n", __func__); */
3151 if (pgadget == NULL) {
3152 ERR("%s, bad param\n", __func__);
3156 udc = container_of(pgadget, struct nbu2ss_udc, gadget);
3158 spin_lock_irqsave(&udc->lock, flags);
3160 spin_unlock_irqrestore(&udc->lock, flags);
3165 /*-------------------------------------------------------------------------*/
3166 static int nbu2ss_gad_pullup(struct usb_gadget *pgadget, int is_on)
3168 struct nbu2ss_udc *udc;
3169 unsigned long flags;
3171 /* INFO("=== %s()\n", __func__); */
3173 if (pgadget == NULL) {
3174 ERR("%s, bad param\n", __func__);
3178 udc = container_of(pgadget, struct nbu2ss_udc, gadget);
3180 if (udc->driver == NULL) {
3181 pr_warn("%s, Not Regist Driver\n", __func__);
3185 if (udc->vbus_active == 0)
3188 spin_lock_irqsave(&udc->lock, flags);
3189 _nbu2ss_pullup(udc, is_on);
3190 spin_unlock_irqrestore(&udc->lock, flags);
3195 /*-------------------------------------------------------------------------*/
3196 static int nbu2ss_gad_ioctl(
3197 struct usb_gadget *pgadget,
3199 unsigned long param)
3201 /* INFO("=== %s()\n", __func__); */
3206 static const struct usb_gadget_ops nbu2ss_gadget_ops = {
3207 .get_frame = nbu2ss_gad_get_frame,
3208 .wakeup = nbu2ss_gad_wakeup,
3209 .set_selfpowered = nbu2ss_gad_set_selfpowered,
3210 .vbus_session = nbu2ss_gad_vbus_session,
3211 .vbus_draw = nbu2ss_gad_vbus_draw,
3212 .pullup = nbu2ss_gad_pullup,
3213 .ioctl = nbu2ss_gad_ioctl,
3216 static const char g_ep0_name[] = "ep0";
3217 static const char g_ep1_name[] = "ep1-bulk";
3218 static const char g_ep2_name[] = "ep2-bulk";
3219 static const char g_ep3_name[] = "ep3in-int";
3220 static const char g_ep4_name[] = "ep4-iso";
3221 static const char g_ep5_name[] = "ep5-iso";
3222 static const char g_ep6_name[] = "ep6-bulk";
3223 static const char g_ep7_name[] = "ep7-bulk";
3224 static const char g_ep8_name[] = "ep8in-int";
3225 static const char g_ep9_name[] = "ep9-iso";
3226 static const char g_epa_name[] = "epa-iso";
3227 static const char g_epb_name[] = "epb-bulk";
3228 static const char g_epc_name[] = "epc-nulk";
3229 static const char g_epd_name[] = "epdin-int";
3231 static const char *gp_ep_name[NUM_ENDPOINTS] = {
3248 /*-------------------------------------------------------------------------*/
3249 static void __init nbu2ss_drv_set_ep_info(
3250 struct nbu2ss_udc *udc,
3251 struct nbu2ss_ep *ep,
3257 ep->ep.driver_data = NULL;
3259 ep->ep.ops = &nbu2ss_ep_ops;
3261 if (isdigit(name[2])) {
3267 tempbuf[0] = name[2];
3269 res = kstrtol(tempbuf, 16, &num);
3272 ep->ep.maxpacket = EP0_PACKETSIZE;
3274 ep->ep.maxpacket = EP_PACKETSIZE;
3277 ep->ep.maxpacket = EP_PACKETSIZE;
3280 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
3281 INIT_LIST_HEAD(&ep->queue);
3284 /*-------------------------------------------------------------------------*/
3285 static void __init nbu2ss_drv_ep_init(struct nbu2ss_udc *udc)
3289 INIT_LIST_HEAD(&udc->gadget.ep_list);
3290 udc->gadget.ep0 = &udc->ep[0].ep;
3293 for (i = 0; i < NUM_ENDPOINTS; i++)
3294 nbu2ss_drv_set_ep_info(udc, &udc->ep[i], gp_ep_name[i]);
3296 list_del_init(&udc->ep[0].ep.ep_list);
3299 /*-------------------------------------------------------------------------*/
3300 /* platform_driver */
3301 static int __init nbu2ss_drv_contest_init(
3302 struct platform_device *pdev,
3303 struct nbu2ss_udc *udc)
3305 spin_lock_init(&udc->lock);
3306 udc->dev = &pdev->dev;
3308 udc->gadget.is_selfpowered = 1;
3309 udc->devstate = USB_STATE_NOTATTACHED;
3313 udc->pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
3316 nbu2ss_drv_ep_init(udc);
3319 udc->gadget.ops = &nbu2ss_gadget_ops;
3320 udc->gadget.ep0 = &udc->ep[0].ep;
3321 udc->gadget.speed = USB_SPEED_UNKNOWN;
3322 udc->gadget.name = driver_name;
3323 /* udc->gadget.is_dualspeed = 1; */
3325 device_initialize(&udc->gadget.dev);
3327 dev_set_name(&udc->gadget.dev, "gadget");
3328 udc->gadget.dev.parent = &pdev->dev;
3329 udc->gadget.dev.dma_mask = pdev->dev.dma_mask;
3335 * probe - binds to the platform device
3337 static int nbu2ss_drv_probe(struct platform_device *pdev)
3339 int status = -ENODEV;
3340 struct nbu2ss_udc *udc;
3343 void __iomem *mmio_base;
3345 udc = &udc_controller;
3346 memset(udc, 0, sizeof(struct nbu2ss_udc));
3348 platform_set_drvdata(pdev, udc);
3350 /* require I/O memory and IRQ to be provided as resources */
3351 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3352 mmio_base = devm_ioremap_resource(&pdev->dev, r);
3353 if (IS_ERR(mmio_base))
3354 return PTR_ERR(mmio_base);
3356 irq = platform_get_irq(pdev, 0);
3358 dev_err(&pdev->dev, "failed to get IRQ\n");
3361 status = devm_request_irq(&pdev->dev, irq, _nbu2ss_udc_irq,
3362 0, driver_name, udc);
3365 udc->p_regs = (PT_FC_REGS)mmio_base;
3367 /* USB Function Controller Interrupt */
3369 ERR("request_irq(USB_UDC_IRQ_1) failed\n");
3373 /* Driver Initialization */
3374 status = nbu2ss_drv_contest_init(pdev, udc);
3380 /* VBUS Interrupt */
3381 irq_set_irq_type(INT_VBUS, IRQ_TYPE_EDGE_BOTH);
3382 status = request_irq(INT_VBUS,
3389 ERR("request_irq(INT_VBUS) failed\n");
3399 /*-------------------------------------------------------------------------*/
3400 static void nbu2ss_drv_shutdown(struct platform_device *pdev)
3402 struct nbu2ss_udc *udc;
3404 udc = platform_get_drvdata(pdev);
3408 _nbu2ss_disable_controller(udc);
3411 /*-------------------------------------------------------------------------*/
3412 static int __exit nbu2ss_drv_remove(struct platform_device *pdev)
3414 struct nbu2ss_udc *udc;
3415 struct nbu2ss_ep *ep;
3418 udc = &udc_controller;
3420 for (i = 0; i < NUM_ENDPOINTS; i++) {
3423 dma_free_coherent(NULL, PAGE_SIZE,
3424 (void *)ep->virt_buf, ep->phys_buf);
3427 /* Interrupt Handler - Release */
3428 free_irq(INT_VBUS, udc);
3433 /*-------------------------------------------------------------------------*/
3434 static int nbu2ss_drv_suspend(struct platform_device *pdev, pm_message_t state)
3436 struct nbu2ss_udc *udc;
3438 udc = platform_get_drvdata(pdev);
3442 if (udc->vbus_active) {
3443 udc->vbus_active = 0;
3444 udc->devstate = USB_STATE_NOTATTACHED;
3445 udc->linux_suspended = 1;
3447 if (udc->usb_suspended) {
3448 udc->usb_suspended = 0;
3449 _nbu2ss_reset_controller(udc);
3452 _nbu2ss_quiesce(udc);
3454 _nbu2ss_disable_controller(udc);
3459 /*-------------------------------------------------------------------------*/
3460 static int nbu2ss_drv_resume(struct platform_device *pdev)
3463 struct nbu2ss_udc *udc;
3465 udc = platform_get_drvdata(pdev);
3469 data = gpio_get_value(VBUS_VALUE);
3471 udc->vbus_active = 1;
3472 udc->devstate = USB_STATE_POWERED;
3473 _nbu2ss_enable_controller(udc);
3474 _nbu2ss_pullup(udc, 1);
3477 udc->linux_suspended = 0;
3483 static struct platform_driver udc_driver = {
3484 .probe = nbu2ss_drv_probe,
3485 .shutdown = nbu2ss_drv_shutdown,
3486 .remove = __exit_p(nbu2ss_drv_remove),
3487 .suspend = nbu2ss_drv_suspend,
3488 .resume = nbu2ss_drv_resume,
3490 .name = driver_name,
3494 module_platform_driver(udc_driver);
3496 MODULE_DESCRIPTION(DRIVER_DESC);
3497 MODULE_AUTHOR("Renesas Electronics Corporation");
3498 MODULE_LICENSE("GPL");