3 * 10/100/1000 Base-T Ethernet Driver for the ET1301 and ET131x series MACs
5 * Copyright © 2005 Agere Systems Inc.
9 *------------------------------------------------------------------------------
11 * et131x_initpci.c - Routines and data used to register the driver with the
12 * PCI (and PCI Express) subsystem, as well as basic driver
15 *------------------------------------------------------------------------------
19 * This software is provided subject to the following terms and conditions,
20 * which you should read carefully before using the software. Using this
21 * software indicates your acceptance of these terms and conditions. If you do
22 * not agree with these terms and conditions, do not use the software.
24 * Copyright © 2005 Agere Systems Inc.
25 * All rights reserved.
27 * Redistribution and use in source or binary forms, with or without
28 * modifications, are permitted provided that the following conditions are met:
30 * . Redistributions of source code must retain the above copyright notice, this
31 * list of conditions and the following Disclaimer as comments in the code as
32 * well as in the documentation and/or other materials provided with the
35 * . Redistributions in binary form must reproduce the above copyright notice,
36 * this list of conditions and the following Disclaimer in the documentation
37 * and/or other materials provided with the distribution.
39 * . Neither the name of Agere Systems Inc. nor the names of the contributors
40 * may be used to endorse or promote products derived from this software
41 * without specific prior written permission.
45 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
46 * INCLUDING, BUT NOT LIMITED TO, INFRINGEMENT AND THE IMPLIED WARRANTIES OF
47 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. ANY
48 * USE, MODIFICATION OR DISTRIBUTION OF THIS SOFTWARE IS SOLELY AT THE USERS OWN
49 * RISK. IN NO EVENT SHALL AGERE SYSTEMS INC. OR CONTRIBUTORS BE LIABLE FOR ANY
50 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
51 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
52 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
53 * ON ANY THEORY OF LIABILITY, INCLUDING, BUT NOT LIMITED TO, CONTRACT, STRICT
54 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
55 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
60 #include "et131x_version.h"
61 #include "et131x_debug.h"
62 #include "et131x_defs.h"
64 #include <linux/pci.h>
65 #include <linux/init.h>
66 #include <linux/module.h>
67 #include <linux/types.h>
68 #include <linux/kernel.h>
70 #include <linux/sched.h>
71 #include <linux/ptrace.h>
72 #include <linux/slab.h>
73 #include <linux/ctype.h>
74 #include <linux/string.h>
75 #include <linux/timer.h>
76 #include <linux/interrupt.h>
78 #include <linux/delay.h>
80 #include <linux/bitops.h>
81 #include <asm/system.h>
83 #include <linux/netdevice.h>
84 #include <linux/etherdevice.h>
85 #include <linux/skbuff.h>
86 #include <linux/if_arp.h>
87 #include <linux/ioport.h>
88 #include <linux/random.h>
90 #include "et1310_phy.h"
91 #include "et1310_pm.h"
92 #include "et1310_jagcore.h"
94 #include "et131x_adapter.h"
95 #include "et131x_netdev.h"
96 #include "et131x_config.h"
97 #include "et131x_isr.h"
99 #include "et1310_address_map.h"
100 #include "et1310_tx.h"
101 #include "et1310_rx.h"
102 #include "et1310_mac.h"
103 #include "et1310_eeprom.h"
106 int __devinit et131x_pci_setup(struct pci_dev *pdev,
107 const struct pci_device_id *ent);
108 void __devexit et131x_pci_remove(struct pci_dev *pdev);
111 /* Modinfo parameters (filled out using defines from et131x_version.h) */
112 MODULE_AUTHOR(DRIVER_AUTHOR);
113 MODULE_DESCRIPTION(DRIVER_INFO);
114 MODULE_LICENSE(DRIVER_LICENSE);
116 /* Module Parameters and related data for debugging facilities */
117 #ifdef CONFIG_ET131X_DEBUG
118 static u32 et131x_debug_level = DBG_LVL;
119 static u32 et131x_debug_flags = DBG_DEFAULTS;
123 Level of debugging desired (0-7)
124 7 : DBG_RX_ON | DBG_TX_ON
134 module_param(et131x_debug_level, uint, 0);
135 module_param(et131x_debug_flags, uint, 0);
137 MODULE_PARM_DESC(et131x_debug_level, "Level of debugging desired (0-7)");
139 static dbg_info_t et131x_info = { DRIVER_NAME_EXT, 0, 0 };
140 dbg_info_t *et131x_dbginfo = &et131x_info;
141 #endif /* CONFIG_ET131X_DEBUG */
143 static struct pci_device_id et131x_pci_table[] __devinitdata = {
144 {ET131X_PCI_VENDOR_ID, ET131X_PCI_DEVICE_ID_GIG, PCI_ANY_ID,
145 PCI_ANY_ID, 0, 0, 0UL},
146 {ET131X_PCI_VENDOR_ID, ET131X_PCI_DEVICE_ID_FAST, PCI_ANY_ID,
147 PCI_ANY_ID, 0, 0, 0UL},
151 MODULE_DEVICE_TABLE(pci, et131x_pci_table);
153 static struct pci_driver et131x_driver = {
155 .id_table = et131x_pci_table,
156 .probe = et131x_pci_setup,
157 .remove = __devexit_p(et131x_pci_remove),
158 .suspend = NULL, /* et131x_pci_suspend */
159 .resume = NULL, /* et131x_pci_resume */
164 * et131x_init_module - The "main" entry point called on driver initialization
166 * Returns 0 on success, errno on failure (as defined in errno.h)
168 int et131x_init_module(void)
172 #ifdef CONFIG_ET131X_DEBUG
173 /* Set the level of debug messages displayed using the module
176 et131x_dbginfo->dbgFlags = et131x_debug_flags;
178 switch (et131x_debug_level) {
180 et131x_dbginfo->dbgFlags |= (DBG_RX_ON | DBG_TX_ON);
183 et131x_dbginfo->dbgFlags |= DBG_PARAM_ON;
186 et131x_dbginfo->dbgFlags |= DBG_VERBOSE_ON;
189 et131x_dbginfo->dbgFlags |= DBG_TRACE_ON;
192 et131x_dbginfo->dbgFlags |= DBG_NOTICE_ON;
200 #endif /* CONFIG_ET131X_DEBUG */
202 DBG_ENTER(et131x_dbginfo);
203 DBG_PRINT("%s\n", DRIVER_INFO);
205 result = pci_register_driver(&et131x_driver);
207 DBG_LEAVE(et131x_dbginfo);
212 * et131x_cleanup_module - The entry point called on driver cleanup
214 void et131x_cleanup_module(void)
216 DBG_ENTER(et131x_dbginfo);
218 pci_unregister_driver(&et131x_driver);
220 DBG_LEAVE(et131x_dbginfo);
224 * These macros map the driver-specific init_module() and cleanup_module()
225 * routines so they can be called by the kernel.
227 module_init(et131x_init_module);
228 module_exit(et131x_cleanup_module);
232 * et131x_find_adapter - Find the adapter and get all the assigned resources
233 * @adapter: pointer to our private adapter structure
235 * Returns 0 on success, errno on failure (as defined in errno.h)
237 int et131x_find_adapter(struct et131x_adapter *adapter, struct pci_dev *pdev)
241 uint8_t maxPayload = 0;
242 uint8_t read_size_reg;
244 DBG_ENTER(et131x_dbginfo);
246 /* Allow disabling of Non-Maskable Interrupts in I/O space, to
247 * support validation.
249 if (adapter->RegistryNMIDisable) {
252 RegisterVal = inb(ET1310_NMI_DISABLE);
255 if (adapter->RegistryNMIDisable == 2)
258 outb(ET1310_NMI_DISABLE, RegisterVal);
261 /* We first need to check the EEPROM Status code located at offset
262 * 0xB2 of config space
264 result = pci_read_config_byte(pdev, ET1310_PCI_EEPROM_STATUS,
267 /* THIS IS A WORKAROUND:
268 * I need to call this function twice to get my card in a
269 * LG M1 Express Dual running. I tried also a msleep before this
270 * function, because I thougth there could be some time condidions
271 * but it didn't work. Call the whole function twice also work.
273 result = pci_read_config_byte(pdev, ET1310_PCI_EEPROM_STATUS,
275 if (result != PCIBIOS_SUCCESSFUL) {
276 DBG_ERROR(et131x_dbginfo, "Could not read PCI config space for "
278 DBG_LEAVE(et131x_dbginfo);
282 /* Determine if the error(s) we care about are present. If they are
283 * present, we need to fail.
285 if (eepromStat & 0x4C) {
286 result = pci_read_config_byte(pdev, PCI_REVISION_ID,
287 &adapter->RevisionID);
288 if (result != PCIBIOS_SUCCESSFUL) {
289 DBG_ERROR(et131x_dbginfo,
290 "Could not read PCI config space for "
292 DBG_LEAVE(et131x_dbginfo);
294 } else if (adapter->RevisionID == 0x01) {
296 uint8_t ucTemp[4] = { 0xFE, 0x13, 0x10, 0xFF };
298 /* Re-write the first 4 bytes if we have an eeprom
299 * present and the revision id is 1, this fixes the
300 * corruption seen with 1310 B Silicon
302 for (nLoop = 0; nLoop < 3; nLoop++) {
303 EepromWriteByte(adapter, nLoop, ucTemp[nLoop],
308 DBG_ERROR(et131x_dbginfo,
309 "Fatal EEPROM Status Error - 0x%04x\n", eepromStat);
311 /* This error could mean that there was an error reading the
312 * eeprom or that the eeprom doesn't exist. We will treat
313 * each case the same and not try to gather additional
314 * information that normally would come from the eeprom, like
317 adapter->bEepromPresent = false;
319 DBG_LEAVE(et131x_dbginfo);
322 DBG_TRACE(et131x_dbginfo, "EEPROM Status Code - 0x%04x\n",
324 adapter->bEepromPresent = true;
327 /* Read the EEPROM for information regarding LED behavior. Refer to
328 * ET1310_phy.c, et131x_xcvr_init(), for its use.
330 EepromReadByte(adapter, 0x70, &adapter->eepromData[0], 0, SINGLE_BYTE);
331 EepromReadByte(adapter, 0x71, &adapter->eepromData[1], 0, SINGLE_BYTE);
333 if (adapter->eepromData[0] != 0xcd)
334 /* Disable all optional features */
335 adapter->eepromData[1] = 0x00;
337 /* Let's set up the PORT LOGIC Register. First we need to know what
338 * the max_payload_size is
340 result = pci_read_config_byte(pdev, ET1310_PCI_MAX_PYLD, &maxPayload);
341 if (result != PCIBIOS_SUCCESSFUL) {
342 DBG_ERROR(et131x_dbginfo, "Could not read PCI config space for "
343 "Max Payload Size\n");
344 DBG_LEAVE(et131x_dbginfo);
348 /* Program the Ack/Nak latency and replay timers */
349 maxPayload &= 0x07; /* Only the lower 3 bits are valid */
351 if (maxPayload < 2) {
352 const uint16_t AckNak[2] = { 0x76, 0xD0 };
353 const uint16_t Replay[2] = { 0x1E0, 0x2ED };
355 result = pci_write_config_word(pdev, ET1310_PCI_ACK_NACK,
357 if (result != PCIBIOS_SUCCESSFUL) {
358 DBG_ERROR(et131x_dbginfo,
359 "Could not write PCI config space "
361 DBG_LEAVE(et131x_dbginfo);
365 result = pci_write_config_word(pdev, ET1310_PCI_REPLAY,
367 if (result != PCIBIOS_SUCCESSFUL) {
368 DBG_ERROR(et131x_dbginfo,
369 "Could not write PCI config space "
370 "for Replay Timer\n");
371 DBG_LEAVE(et131x_dbginfo);
376 /* l0s and l1 latency timers. We are using default values.
377 * Representing 001 for L0s and 010 for L1
379 result = pci_write_config_byte(pdev, ET1310_PCI_L0L1LATENCY, 0x11);
380 if (result != PCIBIOS_SUCCESSFUL) {
381 DBG_ERROR(et131x_dbginfo,
382 "Could not write PCI config space for "
384 DBG_LEAVE(et131x_dbginfo);
388 /* Change the max read size to 2k */
389 result = pci_read_config_byte(pdev, 0x51, &read_size_reg);
390 if (result != PCIBIOS_SUCCESSFUL) {
391 DBG_ERROR(et131x_dbginfo,
392 "Could not read PCI config space for Max read size\n");
393 DBG_LEAVE(et131x_dbginfo);
397 read_size_reg &= 0x8f;
398 read_size_reg |= 0x40;
400 result = pci_write_config_byte(pdev, 0x51, read_size_reg);
401 if (result != PCIBIOS_SUCCESSFUL) {
402 DBG_ERROR(et131x_dbginfo,
403 "Could not write PCI config space for Max read size\n");
404 DBG_LEAVE(et131x_dbginfo);
408 /* PCI Express Configuration registers 0x48-0x5B (Device Control) */
409 result = pci_read_config_word(pdev, ET1310_PCI_DEV_CTRL,
410 &adapter->PciXDevCtl);
411 if (result != PCIBIOS_SUCCESSFUL) {
412 DBG_ERROR(et131x_dbginfo,
413 "Could not read PCI config space for PCI Express Dev Ctl\n");
414 DBG_LEAVE(et131x_dbginfo);
418 /* Get MAC address from config space if an eeprom exists, otherwise
419 * the MAC address there will not be valid
421 if (adapter->bEepromPresent) {
424 for (i = 0; i < ETH_ALEN; i++) {
425 result = pci_read_config_byte(
426 pdev, ET1310_PCI_MAC_ADDRESS + i,
427 adapter->PermanentAddress + i);
428 if (result != PCIBIOS_SUCCESSFUL) {
429 DBG_ERROR(et131x_dbginfo,
430 "Could not read PCI config space for MAC address\n");
431 DBG_LEAVE(et131x_dbginfo);
437 DBG_LEAVE(et131x_dbginfo);
442 * et131x_error_timer_handler
443 * @data: timer-specific variable; here a pointer to our adapter structure
445 * The routine called when the error timer expires, to track the number of
448 void et131x_error_timer_handler(unsigned long data)
450 struct et131x_adapter *pAdapter = (struct et131x_adapter *) data;
453 pm_csr.value = readl(&pAdapter->CSRAddress->global.pm_csr.value);
455 if (pm_csr.bits.pm_phy_sw_coma == 0) {
456 if (pAdapter->RegistryMACStat)
457 UpdateMacStatHostCounters(pAdapter);
459 DBG_VERBOSE(et131x_dbginfo,
460 "No interrupts, in PHY coma, pm_csr = 0x%x\n",
463 if (!pAdapter->Bmsr.bits.link_status &&
464 pAdapter->RegistryPhyComa &&
465 pAdapter->PoMgmt.TransPhyComaModeOnBoot < 11) {
466 pAdapter->PoMgmt.TransPhyComaModeOnBoot++;
469 if (pAdapter->PoMgmt.TransPhyComaModeOnBoot == 10) {
470 if (!pAdapter->Bmsr.bits.link_status
471 && pAdapter->RegistryPhyComa) {
472 if (pm_csr.bits.pm_phy_sw_coma == 0) {
473 /* NOTE - This was originally a 'sync with
474 * interrupt'. How to do that under Linux?
476 et131x_enable_interrupts(pAdapter);
477 EnablePhyComa(pAdapter);
482 /* This is a periodic timer, so reschedule */
483 mod_timer(&pAdapter->ErrorTimer, jiffies +
484 TX_ERROR_PERIOD * HZ / 1000);
488 * et131x_link_detection_handler
490 * Timer function for link up at driver load time
492 void et131x_link_detection_handler(unsigned long data)
494 struct et131x_adapter *pAdapter = (struct et131x_adapter *) data;
495 unsigned long lockflags;
497 /* Let everyone know that we have run */
498 pAdapter->bLinkTimerActive = false;
500 if (pAdapter->MediaState == 0) {
501 spin_lock_irqsave(&pAdapter->Lock, lockflags);
503 pAdapter->MediaState = NETIF_STATUS_MEDIA_DISCONNECT;
504 MP_CLEAR_FLAG(pAdapter, fMP_ADAPTER_LINK_DETECTION);
506 spin_unlock_irqrestore(&pAdapter->Lock, lockflags);
508 netif_carrier_off(pAdapter->netdev);
510 pAdapter->bSetPending = false;
515 * et131x_adapter_setup - Set the adapter up as per cassini+ documentation
516 * @adapter: pointer to our private adapter structure
518 * Returns 0 on success, errno on failure (as defined in errno.h)
520 int et131x_adapter_setup(struct et131x_adapter *pAdapter)
524 DBG_ENTER(et131x_dbginfo);
526 /* Configure the JAGCore */
527 ConfigGlobalRegs(pAdapter);
529 ConfigMACRegs1(pAdapter);
530 ConfigMMCRegs(pAdapter);
532 ConfigRxMacRegs(pAdapter);
533 ConfigTxMacRegs(pAdapter);
535 ConfigRxDmaRegs(pAdapter);
536 ConfigTxDmaRegs(pAdapter);
538 ConfigMacStatRegs(pAdapter);
540 /* Move the following code to Timer function?? */
541 status = et131x_xcvr_find(pAdapter);
544 DBG_WARNING(et131x_dbginfo, "Could not find the xcvr\n");
546 /* Prepare the TRUEPHY library. */
547 ET1310_PhyInit(pAdapter);
549 /* Reset the phy now so changes take place */
550 ET1310_PhyReset(pAdapter);
553 ET1310_PhyPowerDown(pAdapter, 1);
556 * We need to turn off 1000 base half dulplex, the mac does not
557 * support it. For the 10/100 part, turn off all gig advertisement
559 if (pAdapter->DeviceID != ET131X_PCI_DEVICE_ID_FAST)
560 ET1310_PhyAdvertise1000BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_FULL);
562 ET1310_PhyAdvertise1000BaseT(pAdapter, TRUEPHY_ADV_DUPLEX_NONE);
565 ET1310_PhyPowerDown(pAdapter, 0);
567 et131x_setphy_normal(pAdapter);
569 DBG_LEAVE(et131x_dbginfo);
574 * et131x_setup_hardware_properties - set up the MAC Address on the ET1310
575 * @adapter: pointer to our private adapter structure
577 void et131x_setup_hardware_properties(struct et131x_adapter *adapter)
579 DBG_ENTER(et131x_dbginfo);
581 /* If have our default mac from registry and no mac address from
582 * EEPROM then we need to generate the last octet and set it on the
585 if (!adapter->bOverrideAddress) {
586 if (adapter->PermanentAddress[0] == 0x00 &&
587 adapter->PermanentAddress[1] == 0x00 &&
588 adapter->PermanentAddress[2] == 0x00 &&
589 adapter->PermanentAddress[3] == 0x00 &&
590 adapter->PermanentAddress[4] == 0x00 &&
591 adapter->PermanentAddress[5] == 0x00) {
593 * We need to randomly generate the last octet so we
594 * decrease our chances of setting the mac address to
595 * same as another one of our cards in the system
597 get_random_bytes(&adapter->CurrentAddress[5], 1);
600 * We have the default value in the register we are
601 * working with so we need to copy the current
602 * address into the permanent address
604 memcpy(adapter->PermanentAddress,
605 adapter->CurrentAddress, ETH_ALEN);
607 /* We do not have an override address, so set the
608 * current address to the permanent address and add
611 memcpy(adapter->CurrentAddress,
612 adapter->PermanentAddress, ETH_ALEN);
616 DBG_LEAVE(et131x_dbginfo);
620 * et131x_soft_reset - Issue a soft reset to the hardware, complete for ET1310
621 * @adapter: pointer to our private adapter structure
623 void et131x_soft_reset(struct et131x_adapter *adapter)
625 DBG_ENTER(et131x_dbginfo);
627 /* Disable MAC Core */
628 writel(0xc00f0000, &adapter->CSRAddress->mac.cfg1.value);
630 /* Set everything to a reset value */
631 writel(0x7F, &adapter->CSRAddress->global.sw_reset.value);
632 writel(0x000f0000, &adapter->CSRAddress->mac.cfg1.value);
633 writel(0x00000000, &adapter->CSRAddress->mac.cfg1.value);
635 DBG_LEAVE(et131x_dbginfo);
639 * et131x_align_allocated_memory - Align allocated memory on a given boundary
640 * @adapter: pointer to our adapter structure
641 * @phys_addr: pointer to Physical address
642 * @offset: pointer to the offset variable
643 * @mask: correct mask
645 void et131x_align_allocated_memory(struct et131x_adapter *adapter,
647 uint64_t *offset, uint64_t mask)
651 DBG_ENTER(et131x_dbginfo);
655 new_addr = *phys_addr & ~mask;
657 if (new_addr != *phys_addr) {
658 /* Move to next aligned block */
659 new_addr += mask + 1;
660 /* Return offset for adjusting virt addr */
661 *offset = new_addr - *phys_addr;
662 /* Return new physical address */
663 *phys_addr = new_addr;
666 DBG_LEAVE(et131x_dbginfo);
670 * et131x_adapter_memory_alloc
671 * @adapter: pointer to our private adapter structure
673 * Returns 0 on success, errno on failure (as defined in errno.h).
675 * Allocate all the memory blocks for send, receive and others.
677 int et131x_adapter_memory_alloc(struct et131x_adapter *adapter)
681 DBG_ENTER(et131x_dbginfo);
684 /* Allocate memory for the Tx Ring */
685 status = et131x_tx_dma_memory_alloc(adapter);
687 DBG_ERROR(et131x_dbginfo,
688 "et131x_tx_dma_memory_alloc FAILED\n");
692 /* Receive buffer memory allocation */
693 status = et131x_rx_dma_memory_alloc(adapter);
695 DBG_ERROR(et131x_dbginfo,
696 "et131x_rx_dma_memory_alloc FAILED\n");
697 et131x_tx_dma_memory_free(adapter);
701 /* Init receive data structures */
702 status = et131x_init_recv(adapter);
704 DBG_ERROR(et131x_dbginfo, "et131x_init_recv FAILED\n");
705 et131x_tx_dma_memory_free(adapter);
706 et131x_rx_dma_memory_free(adapter);
711 DBG_LEAVE(et131x_dbginfo);
716 * et131x_adapter_memory_free - Free all memory allocated for use by Tx & Rx
717 * @adapter: pointer to our private adapter structure
719 void et131x_adapter_memory_free(struct et131x_adapter *adapter)
721 DBG_ENTER(et131x_dbginfo);
723 /* Free DMA memory */
724 et131x_tx_dma_memory_free(adapter);
725 et131x_rx_dma_memory_free(adapter);
727 DBG_LEAVE(et131x_dbginfo);
732 * @pdev: a pointer to the device's pci_dev structure
734 * Registered in the pci_driver structure, this function is called when the
735 * PCI subsystem detects that a PCI device which matches the information
736 * contained in the pci_device_id table has been removed.
738 void __devexit et131x_pci_remove(struct pci_dev *pdev)
740 struct net_device *netdev;
741 struct et131x_adapter *adapter;
743 DBG_ENTER(et131x_dbginfo);
745 /* Retrieve the net_device pointer from the pci_dev struct, as well
746 * as the private adapter struct
748 netdev = (struct net_device *) pci_get_drvdata(pdev);
749 adapter = netdev_priv(netdev);
751 /* Perform device cleanup */
752 unregister_netdev(netdev);
753 et131x_adapter_memory_free(adapter);
754 iounmap(adapter->CSRAddress);
756 pci_release_regions(pdev);
757 pci_disable_device(pdev);
759 DBG_LEAVE(et131x_dbginfo);
763 * et131x_pci_setup - Perform device initialization
764 * @pdev: a pointer to the device's pci_dev structure
765 * @ent: this device's entry in the pci_device_id table
767 * Returns 0 on success, errno on failure (as defined in errno.h)
769 * Registered in the pci_driver structure, this function is called when the
770 * PCI subsystem finds a new PCI device which matches the information
771 * contained in the pci_device_id table. This routine is the equivalent to
772 * a device insertion routine.
774 int __devinit et131x_pci_setup(struct pci_dev *pdev,
775 const struct pci_device_id *ent)
780 struct net_device *netdev = NULL;
781 struct et131x_adapter *adapter = NULL;
783 DBG_ENTER(et131x_dbginfo);
785 /* Enable the device via the PCI subsystem */
786 result = pci_enable_device(pdev);
788 DBG_ERROR(et131x_dbginfo, "pci_enable_device() failed\n");
792 /* Perform some basic PCI checks */
793 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
794 DBG_ERROR(et131x_dbginfo,
795 "Can't find PCI device's base address\n");
800 result = pci_request_regions(pdev, DRIVER_NAME);
802 DBG_ERROR(et131x_dbginfo, "Can't get PCI resources\n");
806 /* Enable PCI bus mastering */
807 DBG_TRACE(et131x_dbginfo, "Setting PCI Bus Mastering...\n");
808 pci_set_master(pdev);
810 /* Query PCI for Power Mgmt Capabilities
812 * NOTE: Now reading PowerMgmt in another location; is this still
815 pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
817 DBG_ERROR(et131x_dbginfo,
818 "Cannot find Power Management capabilities\n");
820 goto err_release_res;
823 /* Check the DMA addressing support of this device */
824 if (!pci_set_dma_mask(pdev, 0xffffffffffffffffULL)) {
825 DBG_TRACE(et131x_dbginfo, "64-bit DMA addressing supported\n");
826 pci_using_dac = true;
829 pci_set_consistent_dma_mask(pdev, 0xffffffffffffffffULL);
831 DBG_ERROR(et131x_dbginfo,
832 "Unable to obtain 64 bit DMA for consistent allocations\n");
833 goto err_release_res;
835 } else if (!pci_set_dma_mask(pdev, 0xffffffffULL)) {
836 DBG_TRACE(et131x_dbginfo,
837 "64-bit DMA addressing NOT supported\n");
838 DBG_TRACE(et131x_dbginfo,
839 "32-bit DMA addressing will be used\n");
840 pci_using_dac = false;
842 DBG_ERROR(et131x_dbginfo, "No usable DMA addressing method\n");
844 goto err_release_res;
847 /* Allocate netdev and private adapter structs */
848 DBG_TRACE(et131x_dbginfo,
849 "Allocate netdev and private adapter structs...\n");
850 netdev = et131x_device_alloc();
851 if (netdev == NULL) {
852 DBG_ERROR(et131x_dbginfo, "Couldn't alloc netdev struct\n");
854 goto err_release_res;
857 /* Setup the fundamental net_device and private adapter structure elements */
858 DBG_TRACE(et131x_dbginfo, "Setting fundamental net_device info...\n");
859 SET_NETDEV_DEV(netdev, &pdev->dev);
862 netdev->features |= NETIF_F_HIGHDMA;
867 * NOTE - Turn this on when we're ready to deal with SG-DMA
869 * NOTE: According to "Linux Device Drivers", 3rd ed, Rubini et al,
870 * if checksumming is not performed in HW, then the kernel will not
874 * "Note that the kernel does not perform scatter/gather I/O to your
875 * device if it does not also provide some form of checksumming as
876 * well. The reason is that, if the kernel has to make a pass over a
877 * fragmented ("nonlinear") packet to calculate the checksum, it
878 * might as well copy the data and coalesce the packet at the same
881 * This has been verified by setting the flags below and still not
882 * receiving a scattered buffer from the network stack, so leave it
883 * off until checksums are calculated in HW.
885 /* netdev->features |= NETIF_F_SG; */
886 /* netdev->features |= NETIF_F_NO_CSUM; */
887 /* netdev->features |= NETIF_F_LLTX; */
889 /* Allocate private adapter struct and copy in relevant information */
890 adapter = netdev_priv(netdev);
891 adapter->pdev = pdev;
892 adapter->netdev = netdev;
893 adapter->VendorID = pdev->vendor;
894 adapter->DeviceID = pdev->device;
896 /* Do the same for the netdev struct */
897 netdev->irq = pdev->irq;
898 netdev->base_addr = pdev->resource[0].start;
900 /* Initialize spinlocks here */
901 DBG_TRACE(et131x_dbginfo, "Initialize spinlocks...\n");
903 spin_lock_init(&adapter->Lock);
904 spin_lock_init(&adapter->TCBSendQLock);
905 spin_lock_init(&adapter->TCBReadyQLock);
906 spin_lock_init(&adapter->SendHWLock);
907 spin_lock_init(&adapter->SendWaitLock);
908 spin_lock_init(&adapter->RcvLock);
909 spin_lock_init(&adapter->RcvPendLock);
910 spin_lock_init(&adapter->FbrLock);
911 spin_lock_init(&adapter->PHYLock);
913 /* Parse configuration parameters into the private adapter struct */
914 et131x_config_parse(adapter);
916 /* Find the physical adapter
918 * NOTE: This is the equivalent of the MpFindAdapter() routine; can we
919 * lump it's init with the device specific init below into a
920 * single init function?
922 /* while (et131x_find_adapter(adapter, pdev) != 0); */
923 et131x_find_adapter(adapter, pdev);
925 /* Map the bus-relative registers to system virtual memory */
926 DBG_TRACE(et131x_dbginfo,
927 "Mapping bus-relative registers to virtual memory...\n");
929 adapter->CSRAddress = ioremap_nocache(pci_resource_start(pdev, 0),
930 pci_resource_len(pdev, 0));
931 if (adapter->CSRAddress == NULL) {
932 DBG_ERROR(et131x_dbginfo, "Cannot map device registers\n");
937 /* Perform device-specific initialization here (See code below) */
939 /* If Phy COMA mode was enabled when we went down, disable it here. */
941 PM_CSR_t GlobalPmCSR = { 0 };
943 GlobalPmCSR.bits.pm_sysclk_gate = 1;
944 GlobalPmCSR.bits.pm_txclk_gate = 1;
945 GlobalPmCSR.bits.pm_rxclk_gate = 1;
946 writel(GlobalPmCSR.value,
947 &adapter->CSRAddress->global.pm_csr.value);
950 /* Issue a global reset to the et1310 */
951 DBG_TRACE(et131x_dbginfo, "Issuing soft reset...\n");
952 et131x_soft_reset(adapter);
954 /* Disable all interrupts (paranoid) */
955 DBG_TRACE(et131x_dbginfo, "Disable device interrupts...\n");
956 et131x_disable_interrupts(adapter);
958 /* Allocate DMA memory */
959 result = et131x_adapter_memory_alloc(adapter);
961 DBG_ERROR(et131x_dbginfo,
962 "Could not alloc adapater memory (DMA)\n");
966 /* Init send data structures */
967 DBG_TRACE(et131x_dbginfo, "Init send data structures...\n");
968 et131x_init_send(adapter);
970 adapter->PoMgmt.PowerState = NdisDeviceStateD0;
972 /* Register the interrupt
974 * NOTE - This is being done in the open routine, where most other
975 * Linux drivers setup IRQ handlers. Make sure device
976 * interrupts are not turned on before the IRQ is registered!!
978 * What we will do here is setup the task structure for the
979 * ISR's deferred handler
981 INIT_WORK(&adapter->task, et131x_isr_handler);
983 /* Determine MAC Address, and copy into the net_device struct */
984 DBG_TRACE(et131x_dbginfo, "Retrieve MAC address...\n");
985 et131x_setup_hardware_properties(adapter);
987 memcpy(netdev->dev_addr, adapter->CurrentAddress, ETH_ALEN);
989 /* Setup et1310 as per the documentation */
990 DBG_TRACE(et131x_dbginfo, "Setup the adapter...\n");
991 et131x_adapter_setup(adapter);
993 /* Create a timer to count errors received by the NIC */
994 init_timer(&adapter->ErrorTimer);
996 adapter->ErrorTimer.expires = jiffies + TX_ERROR_PERIOD * HZ / 1000;
997 adapter->ErrorTimer.function = et131x_error_timer_handler;
998 adapter->ErrorTimer.data = (unsigned long)adapter;
1000 /* Initialize link state */
1001 et131x_link_detection_handler((unsigned long)adapter);
1003 /* Intialize variable for counting how long we do not have
1005 adapter->PoMgmt.TransPhyComaModeOnBoot = 0;
1007 /* We can enable interrupts now
1009 * NOTE - Because registration of interrupt handler is done in the
1010 * device's open(), defer enabling device interrupts to that
1014 /* Register the net_device struct with the Linux network layer */
1015 DBG_TRACE(et131x_dbginfo, "Registering net_device...\n");
1016 result = register_netdev(netdev);
1018 DBG_ERROR(et131x_dbginfo, "register_netdev() failed\n");
1022 /* Register the net_device struct with the PCI subsystem. Save a copy
1023 * of the PCI config space for this device now that the device has
1024 * been initialized, just in case it needs to be quickly restored.
1026 pci_set_drvdata(pdev, netdev);
1028 pci_save_state(adapter->pdev);
1031 DBG_LEAVE(et131x_dbginfo);
1035 et131x_adapter_memory_free(adapter);
1037 iounmap(adapter->CSRAddress);
1039 free_netdev(netdev);
1041 pci_release_regions(pdev);
1043 pci_disable_device(pdev);