drivers/staging/iio/adc/max1363_core.c

   1  /*
   2   * iio/adc/max1363.c
   3   * Copyright (C) 2008-2010 Jonathan Cameron
   4   *
   5   * based on linux/drivers/i2c/chips/max123x
   6   * Copyright (C) 2002-2004 Stefan Eletzhofer
   7   *
   8   * based on linux/drivers/acron/char/pcf8583.c
   9   * Copyright (C) 2000 Russell King
  10   *
  11   * This program is free software; you can redistribute it and/or modify
  12   * it under the terms of the GNU General Public License version 2 as
  13   * published by the Free Software Foundation.
  14   *
  15   * max1363.c
  16   *
  17   * Partial support for max1363 and similar chips.
  18   *
  19   * Not currently implemented.
  20   *
  21   * - Control of internal reference.
  22   */
  23
  24 #include <linux/interrupt.h>
  25 #include <linux/device.h>
  26 #include <linux/kernel.h>
  27 #include <linux/sysfs.h>
  28 #include <linux/list.h>
  29 #include <linux/i2c.h>
  30 #include <linux/regulator/consumer.h>
  31 #include <linux/slab.h>
  32 #include <linux/err.h>
  33 #include <linux/module.h>
  34
  35 #include "../iio.h"
  36 #include "../sysfs.h"
  37 #include "../events.h"
  38 #include "../buffer.h"
  39
  40 #include "max1363.h"
  41
  42 #define MAX1363_MODE_SINGLE(_num, _mask) {                              \
  43                 .conf = MAX1363_CHANNEL_SEL(_num)                       \
  44                         | MAX1363_CONFIG_SCAN_SINGLE_1                  \
  45                         | MAX1363_CONFIG_SE,                            \
  46                         .modemask[0] = _mask,                           \
  47                         }
  48
  49 #define MAX1363_MODE_SCAN_TO_CHANNEL(_num, _mask) {                     \
  50                 .conf = MAX1363_CHANNEL_SEL(_num)                       \
  51                         | MAX1363_CONFIG_SCAN_TO_CS                     \
  52                         | MAX1363_CONFIG_SE,                            \
  53                         .modemask[0] = _mask,                           \
  54                         }
  55
  56 /* note not available for max1363 hence naming */
  57 #define MAX1236_MODE_SCAN_MID_TO_CHANNEL(_mid, _num, _mask) {           \
  58                 .conf = MAX1363_CHANNEL_SEL(_num)                       \
  59                         | MAX1236_SCAN_MID_TO_CHANNEL                   \
  60                         | MAX1363_CONFIG_SE,                            \
  61                         .modemask[0] = _mask                            \
  62 }
  63
  64 #define MAX1363_MODE_DIFF_SINGLE(_nump, _numm, _mask) {                 \
  65                 .conf = MAX1363_CHANNEL_SEL(_nump)                      \
  66                         | MAX1363_CONFIG_SCAN_SINGLE_1                  \
  67                         | MAX1363_CONFIG_DE,                            \
  68                         .modemask[0] = _mask                            \
  69                         }
  70
  71 /* Can't think how to automate naming so specify for now */
  72 #define MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(_num, _numvals, _mask) {      \
  73                 .conf = MAX1363_CHANNEL_SEL(_num)                       \
  74                         | MAX1363_CONFIG_SCAN_TO_CS                     \
  75                         | MAX1363_CONFIG_DE,                            \
  76                         .modemask[0] = _mask                            \
  77                         }
  78
  79 /* note only available for max1363 hence naming */
  80 #define MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(_num, _numvals, _mask) {  \
  81                 .conf = MAX1363_CHANNEL_SEL(_num)                       \
  82                         | MAX1236_SCAN_MID_TO_CHANNEL                   \
  83                         | MAX1363_CONFIG_SE,                            \
  84                         .modemask[0] = _mask                            \
  85 }
  86
  87 static const struct max1363_mode max1363_mode_table[] = {
  88         /* All of the single channel options first */
  89         MAX1363_MODE_SINGLE(0, 1 << 0),
  90         MAX1363_MODE_SINGLE(1, 1 << 1),
  91         MAX1363_MODE_SINGLE(2, 1 << 2),
  92         MAX1363_MODE_SINGLE(3, 1 << 3),
  93         MAX1363_MODE_SINGLE(4, 1 << 4),
  94         MAX1363_MODE_SINGLE(5, 1 << 5),
  95         MAX1363_MODE_SINGLE(6, 1 << 6),
  96         MAX1363_MODE_SINGLE(7, 1 << 7),
  97         MAX1363_MODE_SINGLE(8, 1 << 8),
  98         MAX1363_MODE_SINGLE(9, 1 << 9),
  99         MAX1363_MODE_SINGLE(10, 1 << 10),
 100         MAX1363_MODE_SINGLE(11, 1 << 11),
 101
 102         MAX1363_MODE_DIFF_SINGLE(0, 1, 1 << 12),
 103         MAX1363_MODE_DIFF_SINGLE(2, 3, 1 << 13),
 104         MAX1363_MODE_DIFF_SINGLE(4, 5, 1 << 14),
 105         MAX1363_MODE_DIFF_SINGLE(6, 7, 1 << 15),
 106         MAX1363_MODE_DIFF_SINGLE(8, 9, 1 << 16),
 107         MAX1363_MODE_DIFF_SINGLE(10, 11, 1 << 17),
 108         MAX1363_MODE_DIFF_SINGLE(1, 0, 1 << 18),
 109         MAX1363_MODE_DIFF_SINGLE(3, 2, 1 << 19),
 110         MAX1363_MODE_DIFF_SINGLE(5, 4, 1 << 20),
 111         MAX1363_MODE_DIFF_SINGLE(7, 6, 1 << 21),
 112         MAX1363_MODE_DIFF_SINGLE(9, 8, 1 << 22),
 113         MAX1363_MODE_DIFF_SINGLE(11, 10, 1 << 23),
 114
 115         /* The multichannel scans next */
 116         MAX1363_MODE_SCAN_TO_CHANNEL(1, 0x003),
 117         MAX1363_MODE_SCAN_TO_CHANNEL(2, 0x007),
 118         MAX1236_MODE_SCAN_MID_TO_CHANNEL(2, 3, 0x00C),
 119         MAX1363_MODE_SCAN_TO_CHANNEL(3, 0x00F),
 120         MAX1363_MODE_SCAN_TO_CHANNEL(4, 0x01F),
 121         MAX1363_MODE_SCAN_TO_CHANNEL(5, 0x03F),
 122         MAX1363_MODE_SCAN_TO_CHANNEL(6, 0x07F),
 123         MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 7, 0x0C0),
 124         MAX1363_MODE_SCAN_TO_CHANNEL(7, 0x0FF),
 125         MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 8, 0x1C0),
 126         MAX1363_MODE_SCAN_TO_CHANNEL(8, 0x1FF),
 127         MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 9, 0x3C0),
 128         MAX1363_MODE_SCAN_TO_CHANNEL(9, 0x3FF),
 129         MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 10, 0x7C0),
 130         MAX1363_MODE_SCAN_TO_CHANNEL(10, 0x7FF),
 131         MAX1236_MODE_SCAN_MID_TO_CHANNEL(6, 11, 0xFC0),
 132         MAX1363_MODE_SCAN_TO_CHANNEL(11, 0xFFF),
 133
 134         MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(2, 2, 0x003000),
 135         MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(4, 3, 0x007000),
 136         MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(6, 4, 0x00F000),
 137         MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(8, 2, 0x018000),
 138         MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(8, 5, 0x01F000),
 139         MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(10, 3, 0x038000),
 140         MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(10, 6, 0x3F000),
 141         MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(3, 2, 0x0C0000),
 142         MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(5, 3, 0x1C0000),
 143         MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(7, 4, 0x3C0000),
 144         MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(9, 2, 0x600000),
 145         MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(9, 5, 0x7C0000),
 146         MAX1236_MODE_DIFF_SCAN_MID_TO_CHANNEL(11, 3, 0xE00000),
 147         MAX1363_MODE_DIFF_SCAN_TO_CHANNEL(11, 6, 0xFC0000),
 148 };
 149
 150 const struct max1363_mode
 151 *max1363_match_mode(unsigned long *mask, const struct max1363_chip_info *ci)
 152 {
 153         int i;
 154         if (mask)
 155                 for (i = 0; i < ci->num_modes; i++)
 156                         if (bitmap_subset(mask,
 157                                           max1363_mode_table[ci->mode_list[i]].
 158                                           modemask,
 159                                           MAX1363_MAX_CHANNELS))
 160                                 return &max1363_mode_table[ci->mode_list[i]];
 161         return NULL;
 162 }
 163
 164 static int max1363_write_basic_config(struct i2c_client *client,
 165                                       unsigned char d1,
 166                                       unsigned char d2)
 167 {
 168         u8 tx_buf[2] = {d1, d2};
 169
 170         return i2c_master_send(client, tx_buf, 2);
 171 }
 172
 173 int max1363_set_scan_mode(struct max1363_state *st)
 174 {
 175         st->configbyte &= ~(MAX1363_CHANNEL_SEL_MASK
 176                             | MAX1363_SCAN_MASK
 177                             | MAX1363_SE_DE_MASK);
 178         st->configbyte |= st->current_mode->conf;
 179
 180         return max1363_write_basic_config(st->client,
 181                                           st->setupbyte,
 182                                           st->configbyte);
 183 }
 184
 185 static int max1363_read_single_chan(struct iio_dev *indio_dev,
 186                                     struct iio_chan_spec const *chan,
 187                                     int *val,
 188                                     long m)
 189 {
 190         int ret = 0;
 191         s32 data;
 192         char rxbuf[2];
 193         const unsigned long *mask;
 194         struct max1363_state *st = iio_priv(indio_dev);
 195         struct i2c_client *client = st->client;
 196
 197         mutex_lock(&indio_dev->mlock);
 198         /*
 199          * If monitor mode is enabled, the method for reading a single
 200          * channel will have to be rather different and has not yet
 201          * been implemented.
 202          */
 203         if (st->monitor_on) {
 204                 ret = -EBUSY;
 205                 goto error_ret;
 206         }
 207
 208         /* If ring buffer capture is occurring, query the buffer */
 209         if (iio_buffer_enabled(indio_dev)) {
 210                 mask = max1363_mode_table[chan->address].modemask;
 211                 data = max1363_single_channel_from_ring(mask, st);
 212                 if (data < 0) {
 213                         ret = data;
 214                         goto error_ret;
 215                 }
 216         } else {
 217                 /* Check to see if current scan mode is correct */
 218                 if (st->current_mode != &max1363_mode_table[chan->address]) {
 219                         /* Update scan mode if needed */
 220                         st->current_mode = &max1363_mode_table[chan->address];
 221                         ret = max1363_set_scan_mode(st);
 222                         if (ret < 0)
 223                                 goto error_ret;
 224                 }
 225                 if (st->chip_info->bits != 8) {
 226                         /* Get reading */
 227                         data = i2c_master_recv(client, rxbuf, 2);
 228                         if (data < 0) {
 229                                 ret = data;
 230                                 goto error_ret;
 231                         }
 232                         data = (s32)(rxbuf[1]) | ((s32)(rxbuf[0] & 0x0F)) << 8;
 233                 } else {
 234                         /* Get reading */
 235                         data = i2c_master_recv(client, rxbuf, 1);
 236                         if (data < 0) {
 237                                 ret = data;
 238                                 goto error_ret;
 239                         }
 240                         data = rxbuf[0];
 241                 }
 242         }
 243         *val = data;
 244 error_ret:
 245         mutex_unlock(&indio_dev->mlock);
 246         return ret;
 247
 248 }
 249
 250 static int max1363_read_raw(struct iio_dev *indio_dev,
 251                             struct iio_chan_spec const *chan,
 252                             int *val,
 253                             int *val2,
 254                             long m)
 255 {
 256         struct max1363_state *st = iio_priv(indio_dev);
 257         int ret;
 258         switch (m) {
 259         case 0:
 260                 ret = max1363_read_single_chan(indio_dev, chan, val, m);
 261                 if (ret < 0)
 262                         return ret;
 263                 return IIO_VAL_INT;
 264         case (1 << IIO_CHAN_INFO_SCALE_SHARED):
 265                 if ((1 << (st->chip_info->bits + 1)) >
 266                     st->chip_info->int_vref_mv) {
 267                         *val = 0;
 268                         *val2 = 500000;
 269                         return IIO_VAL_INT_PLUS_MICRO;
 270                 } else {
 271                         *val = (st->chip_info->int_vref_mv)
 272                                 >> st->chip_info->bits;
 273                         return IIO_VAL_INT;
 274                 }
 275         default:
 276                 return -EINVAL;
 277         }
 278         return 0;
 279 }
 280
 281 /* Applies to max1363 */
 282 static const enum max1363_modes max1363_mode_list[] = {
 283         _s0, _s1, _s2, _s3,
 284         s0to1, s0to2, s0to3,
 285         d0m1, d2m3, d1m0, d3m2,
 286         d0m1to2m3, d1m0to3m2,
 287 };
 288
 289 #define MAX1363_EV_M                                            \
 290         (IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING)      \
 291          | IIO_EV_BIT(IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING))
 292 #define MAX1363_INFO_MASK (1 << IIO_CHAN_INFO_SCALE_SHARED)
 293 #define MAX1363_CHAN_U(num, addr, si, bits, evmask)                     \
 294         {                                                               \
 295                 .type = IIO_VOLTAGE,                                    \
 296                 .indexed = 1,                                           \
 297                 .channel = num,                                         \
 298                 .address = addr,                                        \
 299                 .info_mask = MAX1363_INFO_MASK,                         \
 300                 .scan_type = IIO_ST('u', bits, (bits > 8) ? 16 : 8, 0), \
 301                 .scan_index = si,                                       \
 302                 .event_mask = evmask,                                   \
 303         }
 304
 305 /* bipolar channel */
 306 #define MAX1363_CHAN_B(num, num2, addr, si, bits, evmask)               \
 307         {                                                               \
 308                 .type = IIO_VOLTAGE,                                    \
 309                 .differential = 1,                                      \
 310                 .indexed = 1,                                           \
 311                 .channel = num,                                         \
 312                 .channel2 = num2,                                       \
 313                 .address = addr,                                        \
 314                 .info_mask = MAX1363_INFO_MASK,                         \
 315                 .scan_type = IIO_ST('u', bits, (bits > 8) ? 16 : 8, 0), \
 316                 .scan_index = si,                                       \
 317                 .event_mask = evmask,                                   \
 318         }
 319
 320 #define MAX1363_4X_CHANS(bits, em) {                    \
 321         MAX1363_CHAN_U(0, _s0, 0, bits, em),            \
 322         MAX1363_CHAN_U(1, _s1, 1, bits, em),            \
 323         MAX1363_CHAN_U(2, _s2, 2, bits, em),            \
 324         MAX1363_CHAN_U(3, _s3, 3, bits, em),            \
 325         MAX1363_CHAN_B(0, 1, d0m1, 4, bits, em),        \
 326         MAX1363_CHAN_B(2, 3, d2m3, 5, bits, em),        \
 327         MAX1363_CHAN_B(1, 0, d1m0, 6, bits, em),        \
 328         MAX1363_CHAN_B(3, 2, d3m2, 7, bits, em),        \
 329         IIO_CHAN_SOFT_TIMESTAMP(8)                      \
 330         }
 331
 332 static struct iio_chan_spec max1036_channels[] = MAX1363_4X_CHANS(8, 0);
 333 static struct iio_chan_spec max1136_channels[] = MAX1363_4X_CHANS(10, 0);
 334 static struct iio_chan_spec max1236_channels[] = MAX1363_4X_CHANS(12, 0);
 335 static struct iio_chan_spec max1361_channels[] =
 336         MAX1363_4X_CHANS(10, MAX1363_EV_M);
 337 static struct iio_chan_spec max1363_channels[] =
 338         MAX1363_4X_CHANS(12, MAX1363_EV_M);
 339
 340 /* Appies to max1236, max1237 */
 341 static const enum max1363_modes max1236_mode_list[] = {
 342         _s0, _s1, _s2, _s3,
 343         s0to1, s0to2, s0to3,
 344         d0m1, d2m3, d1m0, d3m2,
 345         d0m1to2m3, d1m0to3m2,
 346         s2to3,
 347 };
 348
 349 /* Applies to max1238, max1239 */
 350 static const enum max1363_modes max1238_mode_list[] = {
 351         _s0, _s1, _s2, _s3, _s4, _s5, _s6, _s7, _s8, _s9, _s10, _s11,
 352         s0to1, s0to2, s0to3, s0to4, s0to5, s0to6,
 353         s0to7, s0to8, s0to9, s0to10, s0to11,
 354         d0m1, d2m3, d4m5, d6m7, d8m9, d10m11,
 355         d1m0, d3m2, d5m4, d7m6, d9m8, d11m10,
 356         d0m1to2m3, d0m1to4m5, d0m1to6m7, d0m1to8m9, d0m1to10m11,
 357         d1m0to3m2, d1m0to5m4, d1m0to7m6, d1m0to9m8, d1m0to11m10,
 358         s6to7, s6to8, s6to9, s6to10, s6to11,
 359         d6m7to8m9, d6m7to10m11, d7m6to9m8, d7m6to11m10,
 360 };
 361
 362 #define MAX1363_12X_CHANS(bits) {                       \
 363         MAX1363_CHAN_U(0, _s0, 0, bits, 0),             \
 364         MAX1363_CHAN_U(1, _s1, 1, bits, 0),             \
 365         MAX1363_CHAN_U(2, _s2, 2, bits, 0),             \
 366         MAX1363_CHAN_U(3, _s3, 3, bits, 0),             \
 367         MAX1363_CHAN_U(4, _s4, 4, bits, 0),             \
 368         MAX1363_CHAN_U(5, _s5, 5, bits, 0),             \
 369         MAX1363_CHAN_U(6, _s6, 6, bits, 0),             \
 370         MAX1363_CHAN_U(7, _s7, 7, bits, 0),             \
 371         MAX1363_CHAN_U(8, _s8, 8, bits, 0),             \
 372         MAX1363_CHAN_U(9, _s9, 9, bits, 0),             \
 373         MAX1363_CHAN_U(10, _s10, 10, bits, 0),          \
 374         MAX1363_CHAN_U(11, _s11, 11, bits, 0),          \
 375         MAX1363_CHAN_B(0, 1, d0m1, 12, bits, 0),        \
 376         MAX1363_CHAN_B(2, 3, d2m3, 13, bits, 0),        \
 377         MAX1363_CHAN_B(4, 5, d4m5, 14, bits, 0),        \
 378         MAX1363_CHAN_B(6, 7, d6m7, 15, bits, 0),        \
 379         MAX1363_CHAN_B(8, 9, d8m9, 16, bits, 0),        \
 380         MAX1363_CHAN_B(10, 11, d10m11, 17, bits, 0),    \
 381         MAX1363_CHAN_B(1, 0, d1m0, 18, bits, 0),        \
 382         MAX1363_CHAN_B(3, 2, d3m2, 19, bits, 0),        \
 383         MAX1363_CHAN_B(5, 4, d5m4, 20, bits, 0),        \
 384         MAX1363_CHAN_B(7, 6, d7m6, 21, bits, 0),        \
 385         MAX1363_CHAN_B(9, 8, d9m8, 22, bits, 0),        \
 386         MAX1363_CHAN_B(11, 10, d11m10, 23, bits, 0),    \
 387         IIO_CHAN_SOFT_TIMESTAMP(24)                     \
 388         }
 389 static struct iio_chan_spec max1038_channels[] = MAX1363_12X_CHANS(8);
 390 static struct iio_chan_spec max1138_channels[] = MAX1363_12X_CHANS(10);
 391 static struct iio_chan_spec max1238_channels[] = MAX1363_12X_CHANS(12);
 392
 393 static const enum max1363_modes max11607_mode_list[] = {
 394         _s0, _s1, _s2, _s3,
 395         s0to1, s0to2, s0to3,
 396         s2to3,
 397         d0m1, d2m3, d1m0, d3m2,
 398         d0m1to2m3, d1m0to3m2,
 399 };
 400
 401 static const enum max1363_modes max11608_mode_list[] = {
 402         _s0, _s1, _s2, _s3, _s4, _s5, _s6, _s7,
 403         s0to1, s0to2, s0to3, s0to4, s0to5, s0to6, s0to7,
 404         s6to7,
 405         d0m1, d2m3, d4m5, d6m7,
 406         d1m0, d3m2, d5m4, d7m6,
 407         d0m1to2m3, d0m1to4m5, d0m1to6m7,
 408         d1m0to3m2, d1m0to5m4, d1m0to7m6,
 409 };
 410
 411 #define MAX1363_8X_CHANS(bits) {                        \
 412         MAX1363_CHAN_U(0, _s0, 0, bits, 0),             \
 413         MAX1363_CHAN_U(1, _s1, 1, bits, 0),             \
 414         MAX1363_CHAN_U(2, _s2, 2, bits, 0),             \
 415         MAX1363_CHAN_U(3, _s3, 3, bits, 0),             \
 416         MAX1363_CHAN_U(4, _s4, 4, bits, 0),             \
 417         MAX1363_CHAN_U(5, _s5, 5, bits, 0),             \
 418         MAX1363_CHAN_U(6, _s6, 6, bits, 0),             \
 419         MAX1363_CHAN_U(7, _s7, 7, bits, 0),             \
 420         MAX1363_CHAN_B(0, 1, d0m1, 8, bits, 0), \
 421         MAX1363_CHAN_B(2, 3, d2m3, 9, bits, 0), \
 422         MAX1363_CHAN_B(4, 5, d4m5, 10, bits, 0),        \
 423         MAX1363_CHAN_B(6, 7, d6m7, 11, bits, 0),        \
 424         MAX1363_CHAN_B(1, 0, d1m0, 12, bits, 0),        \
 425         MAX1363_CHAN_B(3, 2, d3m2, 13, bits, 0),        \
 426         MAX1363_CHAN_B(5, 4, d5m4, 14, bits, 0),        \
 427         MAX1363_CHAN_B(7, 6, d7m6, 15, bits, 0),        \
 428         IIO_CHAN_SOFT_TIMESTAMP(16)                     \
 429 }
 430 static struct iio_chan_spec max11602_channels[] = MAX1363_8X_CHANS(8);
 431 static struct iio_chan_spec max11608_channels[] = MAX1363_8X_CHANS(10);
 432 static struct iio_chan_spec max11614_channels[] = MAX1363_8X_CHANS(12);
 433
 434 static const enum max1363_modes max11644_mode_list[] = {
 435         _s0, _s1, s0to1, d0m1, d1m0,
 436 };
 437
 438 #define MAX1363_2X_CHANS(bits) {                        \
 439         MAX1363_CHAN_U(0, _s0, 0, bits, 0),             \
 440         MAX1363_CHAN_U(1, _s1, 1, bits, 0),             \
 441         MAX1363_CHAN_B(0, 1, d0m1, 2, bits, 0), \
 442         MAX1363_CHAN_B(1, 0, d1m0, 3, bits, 0), \
 443         IIO_CHAN_SOFT_TIMESTAMP(4)                      \
 444         }
 445
 446 static struct iio_chan_spec max11646_channels[] = MAX1363_2X_CHANS(10);
 447 static struct iio_chan_spec max11644_channels[] = MAX1363_2X_CHANS(12);
 448
 449 enum { max1361,
 450        max1362,
 451        max1363,
 452        max1364,
 453        max1036,
 454        max1037,
 455        max1038,
 456        max1039,
 457        max1136,
 458        max1137,
 459        max1138,
 460        max1139,
 461        max1236,
 462        max1237,
 463        max1238,
 464        max1239,
 465        max11600,
 466        max11601,
 467        max11602,
 468        max11603,
 469        max11604,
 470        max11605,
 471        max11606,
 472        max11607,
 473        max11608,
 474        max11609,
 475        max11610,
 476        max11611,
 477        max11612,
 478        max11613,
 479        max11614,
 480        max11615,
 481        max11616,
 482        max11617,
 483        max11644,
 484        max11645,
 485        max11646,
 486        max11647
 487 };
 488
 489 static const int max1363_monitor_speeds[] = { 133000, 665000, 33300, 16600,
 490                                               8300, 4200, 2000, 1000 };
 491
 492 static ssize_t max1363_monitor_show_freq(struct device *dev,
 493                                         struct device_attribute *attr,
 494                                         char *buf)
 495 {
 496         struct max1363_state *st = iio_priv(dev_get_drvdata(dev));
 497         return sprintf(buf, "%d\n", max1363_monitor_speeds[st->monitor_speed]);
 498 }
 499
 500 static ssize_t max1363_monitor_store_freq(struct device *dev,
 501                                         struct device_attribute *attr,
 502                                         const char *buf,
 503                                         size_t len)
 504 {
 505         struct iio_dev *indio_dev = dev_get_drvdata(dev);
 506         struct max1363_state *st = iio_priv(indio_dev);
 507         int i, ret;
 508         unsigned long val;
 509         bool found = false;
 510
 511         ret = strict_strtoul(buf, 10, &val);
 512         if (ret)
 513                 return -EINVAL;
 514         for (i = 0; i < ARRAY_SIZE(max1363_monitor_speeds); i++)
 515                 if (val == max1363_monitor_speeds[i]) {
 516                         found = true;
 517                         break;
 518                 }
 519         if (!found)
 520                 return -EINVAL;
 521
 522         mutex_lock(&indio_dev->mlock);
 523         st->monitor_speed = i;
 524         mutex_unlock(&indio_dev->mlock);
 525
 526         return 0;
 527 }
 528
 529 static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR,
 530                         max1363_monitor_show_freq,
 531                         max1363_monitor_store_freq);
 532
 533 static IIO_CONST_ATTR(sampling_frequency_available,
 534                 "133000 665000 33300 16600 8300 4200 2000 1000");
 535
 536 static int max1363_read_thresh(struct iio_dev *indio_dev,
 537                                u64 event_code,
 538                                int *val)
 539 {
 540         struct max1363_state *st = iio_priv(indio_dev);
 541         if (IIO_EVENT_CODE_EXTRACT_DIR(event_code) == IIO_EV_DIR_FALLING)
 542                 *val = st->thresh_low[IIO_EVENT_CODE_EXTRACT_NUM(event_code)];
 543         else
 544                 *val = st->thresh_high[IIO_EVENT_CODE_EXTRACT_NUM(event_code)];
 545         return 0;
 546 }
 547
 548 static int max1363_write_thresh(struct iio_dev *indio_dev,
 549                                 u64 event_code,
 550                                 int val)
 551 {
 552         struct max1363_state *st = iio_priv(indio_dev);
 553         /* make it handle signed correctly as well */
 554         switch (st->chip_info->bits) {
 555         case 10:
 556                 if (val > 0x3FF)
 557                         return -EINVAL;
 558                 break;
 559         case 12:
 560                 if (val > 0xFFF)
 561                         return -EINVAL;
 562                 break;
 563         }
 564
 565         switch (IIO_EVENT_CODE_EXTRACT_DIR(event_code)) {
 566         case IIO_EV_DIR_FALLING:
 567                 st->thresh_low[IIO_EVENT_CODE_EXTRACT_NUM(event_code)] = val;
 568                 break;
 569         case IIO_EV_DIR_RISING:
 570                 st->thresh_high[IIO_EVENT_CODE_EXTRACT_NUM(event_code)] = val;
 571                 break;
 572         }
 573
 574         return 0;
 575 }
 576
 577 static const u64 max1363_event_codes[] = {
 578         IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 0,
 579                              IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING),
 580         IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 1,
 581                              IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING),
 582         IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 2,
 583                              IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING),
 584         IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 3,
 585                              IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING),
 586         IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 0,
 587                              IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING),
 588         IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 1,
 589                              IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING),
 590         IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 2,
 591                              IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING),
 592         IIO_UNMOD_EVENT_CODE(IIO_VOLTAGE, 3,
 593                              IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING),
 594 };
 595
 596 static irqreturn_t max1363_event_handler(int irq, void *private)
 597 {
 598         struct iio_dev *indio_dev = private;
 599         struct max1363_state *st = iio_priv(indio_dev);
 600         s64 timestamp = iio_get_time_ns();
 601         unsigned long mask, loc;
 602         u8 rx;
 603         u8 tx[2] = { st->setupbyte,
 604                      MAX1363_MON_INT_ENABLE | (st->monitor_speed << 1) | 0xF0 };
 605
 606         i2c_master_recv(st->client, &rx, 1);
 607         mask = rx;
 608         for_each_set_bit(loc, &mask, 8)
 609                 iio_push_event(indio_dev, max1363_event_codes[loc], timestamp);
 610         i2c_master_send(st->client, tx, 2);
 611
 612         return IRQ_HANDLED;
 613 }
 614
 615 static int max1363_read_event_config(struct iio_dev *indio_dev,
 616                                      u64 event_code)
 617 {
 618         struct max1363_state *st = iio_priv(indio_dev);
 619
 620         int val;
 621         int number = IIO_EVENT_CODE_EXTRACT_NUM(event_code);
 622         mutex_lock(&indio_dev->mlock);
 623         if (IIO_EVENT_CODE_EXTRACT_DIR(event_code) == IIO_EV_DIR_FALLING)
 624                 val = (1 << number) & st->mask_low;
 625         else
 626                 val = (1 << number) & st->mask_high;
 627         mutex_unlock(&indio_dev->mlock);
 628
 629         return val;
 630 }
 631
 632 static int max1363_monitor_mode_update(struct max1363_state *st, int enabled)
 633 {
 634         u8 *tx_buf;
 635         int ret, i = 3, j;
 636         unsigned long numelements;
 637         int len;
 638         const long *modemask;
 639
 640         if (!enabled) {
 641                 /* transition to ring capture is not currently supported */
 642                 st->setupbyte &= ~MAX1363_SETUP_MONITOR_SETUP;
 643                 st->configbyte &= ~MAX1363_SCAN_MASK;
 644                 st->monitor_on = false;
 645                 return max1363_write_basic_config(st->client,
 646                                                 st->setupbyte,
 647                                                 st->configbyte);
 648         }
 649
 650         /* Ensure we are in the relevant mode */
 651         st->setupbyte |= MAX1363_SETUP_MONITOR_SETUP;
 652         st->configbyte &= ~(MAX1363_CHANNEL_SEL_MASK
 653                             | MAX1363_SCAN_MASK
 654                         | MAX1363_SE_DE_MASK);
 655         st->configbyte |= MAX1363_CONFIG_SCAN_MONITOR_MODE;
 656         if ((st->mask_low | st->mask_high) & 0x0F) {
 657                 st->configbyte |= max1363_mode_table[s0to3].conf;
 658                 modemask = max1363_mode_table[s0to3].modemask;
 659         } else if ((st->mask_low | st->mask_high) & 0x30) {
 660                 st->configbyte |= max1363_mode_table[d0m1to2m3].conf;
 661                 modemask = max1363_mode_table[d0m1to2m3].modemask;
 662         } else {
 663                 st->configbyte |= max1363_mode_table[d1m0to3m2].conf;
 664                 modemask = max1363_mode_table[d1m0to3m2].modemask;
 665         }
 666         numelements = bitmap_weight(modemask, MAX1363_MAX_CHANNELS);
 667         len = 3 * numelements + 3;
 668         tx_buf = kmalloc(len, GFP_KERNEL);
 669         if (!tx_buf) {
 670                 ret = -ENOMEM;
 671                 goto error_ret;
 672         }
 673         tx_buf[0] = st->configbyte;
 674         tx_buf[1] = st->setupbyte;
 675         tx_buf[2] = (st->monitor_speed << 1);
 676
 677         /*
 678          * So we need to do yet another bit of nefarious scan mode
 679          * setup to match what we need.
 680          */
 681         for (j = 0; j < 8; j++)
 682                 if (test_bit(j, modemask)) {
 683                         /* Establish the mode is in the scan */
 684                         if (st->mask_low & (1 << j)) {
 685                                 tx_buf[i] = (st->thresh_low[j] >> 4) & 0xFF;
 686                                 tx_buf[i + 1] = (st->thresh_low[j] << 4) & 0xF0;
 687                         } else if (j < 4) {
 688                                 tx_buf[i] = 0;
 689                                 tx_buf[i + 1] = 0;
 690                         } else {
 691                                 tx_buf[i] = 0x80;
 692                                 tx_buf[i + 1] = 0;
 693                         }
 694                         if (st->mask_high & (1 << j)) {
 695                                 tx_buf[i + 1] |=
 696                                         (st->thresh_high[j] >> 8) & 0x0F;
 697                                 tx_buf[i + 2] = st->thresh_high[j] & 0xFF;
 698                         } else if (j < 4) {
 699                                 tx_buf[i + 1] |= 0x0F;
 700                                 tx_buf[i + 2] = 0xFF;
 701                         } else {
 702                                 tx_buf[i + 1] |= 0x07;
 703                                 tx_buf[i + 2] = 0xFF;
 704                         }
 705                         i += 3;
 706                 }
 707
 708
 709         ret = i2c_master_send(st->client, tx_buf, len);
 710         if (ret < 0)
 711                 goto error_ret;
 712         if (ret != len) {
 713                 ret = -EIO;
 714                 goto error_ret;
 715         }
 716
 717         /*
 718          * Now that we hopefully have sensible thresholds in place it is
 719          * time to turn the interrupts on.
 720          * It is unclear from the data sheet if this should be necessary
 721          * (i.e. whether monitor mode setup is atomic) but it appears to
 722          * be in practice.
 723          */
 724         tx_buf[0] = st->setupbyte;
 725         tx_buf[1] = MAX1363_MON_INT_ENABLE | (st->monitor_speed << 1) | 0xF0;
 726         ret = i2c_master_send(st->client, tx_buf, 2);
 727         if (ret < 0)
 728                 goto error_ret;
 729         if (ret != 2) {
 730                 ret = -EIO;
 731                 goto error_ret;
 732         }
 733         ret = 0;
 734         st->monitor_on = true;
 735 error_ret:
 736
 737         kfree(tx_buf);
 738
 739         return ret;
 740 }
 741
 742 /*
 743  * To keep this manageable we always use one of 3 scan modes.
 744  * Scan 0...3, 0-1,2-3 and 1-0,3-2
 745  */
 746
 747 static inline int __max1363_check_event_mask(int thismask, int checkmask)
 748 {
 749         int ret = 0;
 750         /* Is it unipolar */
 751         if (thismask < 4) {
 752                 if (checkmask & ~0x0F) {
 753                         ret = -EBUSY;
 754                         goto error_ret;
 755                 }
 756         } else if (thismask < 6) {
 757                 if (checkmask & ~0x30) {
 758                         ret = -EBUSY;
 759                         goto error_ret;
 760                 }
 761         } else if (checkmask & ~0xC0)
 762                 ret = -EBUSY;
 763 error_ret:
 764         return ret;
 765 }
 766
 767 static int max1363_write_event_config(struct iio_dev *indio_dev,
 768                                       u64 event_code,
 769                                       int state)
 770 {
 771         int ret = 0;
 772         struct max1363_state *st = iio_priv(indio_dev);
 773         u16 unifiedmask;
 774         int number = IIO_EVENT_CODE_EXTRACT_NUM(event_code);
 775
 776         mutex_lock(&indio_dev->mlock);
 777         unifiedmask = st->mask_low | st->mask_high;
 778         if (IIO_EVENT_CODE_EXTRACT_DIR(event_code) == IIO_EV_DIR_FALLING) {
 779
 780                 if (state == 0)
 781                         st->mask_low &= ~(1 << number);
 782                 else {
 783                         ret = __max1363_check_event_mask((1 << number),
 784                                                          unifiedmask);
 785                         if (ret)
 786                                 goto error_ret;
 787                         st->mask_low |= (1 << number);
 788                 }
 789         } else {
 790                 if (state == 0)
 791                         st->mask_high &= ~(1 << number);
 792                 else {
 793                         ret = __max1363_check_event_mask((1 << number),
 794                                                          unifiedmask);
 795                         if (ret)
 796                                 goto error_ret;
 797                         st->mask_high |= (1 << number);
 798                 }
 799         }
 800
 801         max1363_monitor_mode_update(st, !!(st->mask_high | st->mask_low));
 802 error_ret:
 803         mutex_unlock(&indio_dev->mlock);
 804
 805         return ret;
 806 }
 807
 808 /*
 809  * As with scan_elements, only certain sets of these can
 810  * be combined.
 811  */
 812 static struct attribute *max1363_event_attributes[] = {
 813         &iio_dev_attr_sampling_frequency.dev_attr.attr,
 814         &iio_const_attr_sampling_frequency_available.dev_attr.attr,
 815         NULL,
 816 };
 817
 818 static struct attribute_group max1363_event_attribute_group = {
 819         .attrs = max1363_event_attributes,
 820         .name = "events",
 821 };
 822
 823 #define MAX1363_EVENT_FUNCS                                             \
 824
 825
 826 static const struct iio_info max1238_info = {
 827         .read_raw = &max1363_read_raw,
 828         .driver_module = THIS_MODULE,
 829 };
 830
 831 static const struct iio_info max1363_info = {
 832         .read_event_value = &max1363_read_thresh,
 833         .write_event_value = &max1363_write_thresh,
 834         .read_event_config = &max1363_read_event_config,
 835         .write_event_config = &max1363_write_event_config,
 836         .read_raw = &max1363_read_raw,
 837         .driver_module = THIS_MODULE,
 838         .event_attrs = &max1363_event_attribute_group,
 839 };
 840
 841 /* max1363 and max1368 tested - rest from data sheet */
 842 static const struct max1363_chip_info max1363_chip_info_tbl[] = {
 843         [max1361] = {
 844                 .bits = 10,
 845                 .int_vref_mv = 2048,
 846                 .mode_list = max1363_mode_list,
 847                 .num_modes = ARRAY_SIZE(max1363_mode_list),
 848                 .default_mode = s0to3,
 849                 .channels = max1361_channels,
 850                 .num_channels = ARRAY_SIZE(max1361_channels),
 851                 .info = &max1363_info,
 852         },
 853         [max1362] = {
 854                 .bits = 10,
 855                 .int_vref_mv = 4096,
 856                 .mode_list = max1363_mode_list,
 857                 .num_modes = ARRAY_SIZE(max1363_mode_list),
 858                 .default_mode = s0to3,
 859                 .channels = max1361_channels,
 860                 .num_channels = ARRAY_SIZE(max1361_channels),
 861                 .info = &max1363_info,
 862         },
 863         [max1363] = {
 864                 .bits = 12,
 865                 .int_vref_mv = 2048,
 866                 .mode_list = max1363_mode_list,
 867                 .num_modes = ARRAY_SIZE(max1363_mode_list),
 868                 .default_mode = s0to3,
 869                 .channels = max1363_channels,
 870                 .num_channels = ARRAY_SIZE(max1363_channels),
 871                 .info = &max1363_info,
 872         },
 873         [max1364] = {
 874                 .bits = 12,
 875                 .int_vref_mv = 4096,
 876                 .mode_list = max1363_mode_list,
 877                 .num_modes = ARRAY_SIZE(max1363_mode_list),
 878                 .default_mode = s0to3,
 879                 .channels = max1363_channels,
 880                 .num_channels = ARRAY_SIZE(max1363_channels),
 881                 .info = &max1363_info,
 882         },
 883         [max1036] = {
 884                 .bits = 8,
 885                 .int_vref_mv = 4096,
 886                 .mode_list = max1236_mode_list,
 887                 .num_modes = ARRAY_SIZE(max1236_mode_list),
 888                 .default_mode = s0to3,
 889                 .info = &max1238_info,
 890                 .channels = max1036_channels,
 891                 .num_channels = ARRAY_SIZE(max1036_channels),
 892         },
 893         [max1037] = {
 894                 .bits = 8,
 895                 .int_vref_mv = 2048,
 896                 .mode_list = max1236_mode_list,
 897                 .num_modes = ARRAY_SIZE(max1236_mode_list),
 898                 .default_mode = s0to3,
 899                 .info = &max1238_info,
 900                 .channels = max1036_channels,
 901                 .num_channels = ARRAY_SIZE(max1036_channels),
 902         },
 903         [max1038] = {
 904                 .bits = 8,
 905                 .int_vref_mv = 4096,
 906                 .mode_list = max1238_mode_list,
 907                 .num_modes = ARRAY_SIZE(max1238_mode_list),
 908                 .default_mode = s0to11,
 909                 .info = &max1238_info,
 910                 .channels = max1038_channels,
 911                 .num_channels = ARRAY_SIZE(max1038_channels),
 912         },
 913         [max1039] = {
 914                 .bits = 8,
 915                 .int_vref_mv = 2048,
 916                 .mode_list = max1238_mode_list,
 917                 .num_modes = ARRAY_SIZE(max1238_mode_list),
 918                 .default_mode = s0to11,
 919                 .info = &max1238_info,
 920                 .channels = max1038_channels,
 921                 .num_channels = ARRAY_SIZE(max1038_channels),
 922         },
 923         [max1136] = {
 924                 .bits = 10,
 925                 .int_vref_mv = 4096,
 926                 .mode_list = max1236_mode_list,
 927                 .num_modes = ARRAY_SIZE(max1236_mode_list),
 928                 .default_mode = s0to3,
 929                 .info = &max1238_info,
 930                 .channels = max1136_channels,
 931                 .num_channels = ARRAY_SIZE(max1136_channels),
 932         },
 933         [max1137] = {
 934                 .bits = 10,
 935                 .int_vref_mv = 2048,
 936                 .mode_list = max1236_mode_list,
 937                 .num_modes = ARRAY_SIZE(max1236_mode_list),
 938                 .default_mode = s0to3,
 939                 .info = &max1238_info,
 940                 .channels = max1136_channels,
 941                 .num_channels = ARRAY_SIZE(max1136_channels),
 942         },
 943         [max1138] = {
 944                 .bits = 10,
 945                 .int_vref_mv = 4096,
 946                 .mode_list = max1238_mode_list,
 947                 .num_modes = ARRAY_SIZE(max1238_mode_list),
 948                 .default_mode = s0to11,
 949                 .info = &max1238_info,
 950                 .channels = max1138_channels,
 951                 .num_channels = ARRAY_SIZE(max1138_channels),
 952         },
 953         [max1139] = {
 954                 .bits = 10,
 955                 .int_vref_mv = 2048,
 956                 .mode_list = max1238_mode_list,
 957                 .num_modes = ARRAY_SIZE(max1238_mode_list),
 958                 .default_mode = s0to11,
 959                 .info = &max1238_info,
 960                 .channels = max1138_channels,
 961                 .num_channels = ARRAY_SIZE(max1138_channels),
 962         },
 963         [max1236] = {
 964                 .bits = 12,
 965                 .int_vref_mv = 4096,
 966                 .mode_list = max1236_mode_list,
 967                 .num_modes = ARRAY_SIZE(max1236_mode_list),
 968                 .default_mode = s0to3,
 969                 .info = &max1238_info,
 970                 .channels = max1236_channels,
 971                 .num_channels = ARRAY_SIZE(max1236_channels),
 972         },
 973         [max1237] = {
 974                 .bits = 12,
 975                 .int_vref_mv = 2048,
 976                 .mode_list = max1236_mode_list,
 977                 .num_modes = ARRAY_SIZE(max1236_mode_list),
 978                 .default_mode = s0to3,
 979                 .info = &max1238_info,
 980                 .channels = max1236_channels,
 981                 .num_channels = ARRAY_SIZE(max1236_channels),
 982         },
 983         [max1238] = {
 984                 .bits = 12,
 985                 .int_vref_mv = 4096,
 986                 .mode_list = max1238_mode_list,
 987                 .num_modes = ARRAY_SIZE(max1238_mode_list),
 988                 .default_mode = s0to11,
 989                 .info = &max1238_info,
 990                 .channels = max1238_channels,
 991                 .num_channels = ARRAY_SIZE(max1238_channels),
 992         },
 993         [max1239] = {
 994                 .bits = 12,
 995                 .int_vref_mv = 2048,
 996                 .mode_list = max1238_mode_list,
 997                 .num_modes = ARRAY_SIZE(max1238_mode_list),
 998                 .default_mode = s0to11,
 999                 .info = &max1238_info,
1000                 .channels = max1238_channels,
1001                 .num_channels = ARRAY_SIZE(max1238_channels),
1002         },
1003         [max11600] = {
1004                 .bits = 8,
1005                 .int_vref_mv = 4096,
1006                 .mode_list = max11607_mode_list,
1007                 .num_modes = ARRAY_SIZE(max11607_mode_list),
1008                 .default_mode = s0to3,
1009                 .info = &max1238_info,
1010                 .channels = max1036_channels,
1011                 .num_channels = ARRAY_SIZE(max1036_channels),
1012         },
1013         [max11601] = {
1014                 .bits = 8,
1015                 .int_vref_mv = 2048,
1016                 .mode_list = max11607_mode_list,
1017                 .num_modes = ARRAY_SIZE(max11607_mode_list),
1018                 .default_mode = s0to3,
1019                 .info = &max1238_info,
1020                 .channels = max1036_channels,
1021                 .num_channels = ARRAY_SIZE(max1036_channels),
1022         },
1023         [max11602] = {
1024                 .bits = 8,
1025                 .int_vref_mv = 4096,
1026                 .mode_list = max11608_mode_list,
1027                 .num_modes = ARRAY_SIZE(max11608_mode_list),
1028                 .default_mode = s0to7,
1029                 .info = &max1238_info,
1030                 .channels = max11602_channels,
1031                 .num_channels = ARRAY_SIZE(max11602_channels),
1032         },
1033         [max11603] = {
1034                 .bits = 8,
1035                 .int_vref_mv = 2048,
1036                 .mode_list = max11608_mode_list,
1037                 .num_modes = ARRAY_SIZE(max11608_mode_list),
1038                 .default_mode = s0to7,
1039                 .info = &max1238_info,
1040                 .channels = max11602_channels,
1041                 .num_channels = ARRAY_SIZE(max11602_channels),
1042         },
1043         [max11604] = {
1044                 .bits = 8,
1045                 .int_vref_mv = 4098,
1046                 .mode_list = max1238_mode_list,
1047                 .num_modes = ARRAY_SIZE(max1238_mode_list),
1048                 .default_mode = s0to11,
1049                 .info = &max1238_info,
1050                 .channels = max1238_channels,
1051                 .num_channels = ARRAY_SIZE(max1238_channels),
1052         },
1053         [max11605] = {
1054                 .bits = 8,
1055                 .int_vref_mv = 2048,
1056                 .mode_list = max1238_mode_list,
1057                 .num_modes = ARRAY_SIZE(max1238_mode_list),
1058                 .default_mode = s0to11,
1059                 .info = &max1238_info,
1060                 .channels = max1238_channels,
1061                 .num_channels = ARRAY_SIZE(max1238_channels),
1062         },
1063         [max11606] = {
1064                 .bits = 10,
1065                 .int_vref_mv = 4096,
1066                 .mode_list = max11607_mode_list,
1067                 .num_modes = ARRAY_SIZE(max11607_mode_list),
1068                 .default_mode = s0to3,
1069                 .info = &max1238_info,
1070                 .channels = max1136_channels,
1071                 .num_channels = ARRAY_SIZE(max1136_channels),
1072         },
1073         [max11607] = {
1074                 .bits = 10,
1075                 .int_vref_mv = 2048,
1076                 .mode_list = max11607_mode_list,
1077                 .num_modes = ARRAY_SIZE(max11607_mode_list),
1078                 .default_mode = s0to3,
1079                 .info = &max1238_info,
1080                 .channels = max1136_channels,
1081                 .num_channels = ARRAY_SIZE(max1136_channels),
1082         },
1083         [max11608] = {
1084                 .bits = 10,
1085                 .int_vref_mv = 4096,
1086                 .mode_list = max11608_mode_list,
1087                 .num_modes = ARRAY_SIZE(max11608_mode_list),
1088                 .default_mode = s0to7,
1089                 .info = &max1238_info,
1090                 .channels = max11608_channels,
1091                 .num_channels = ARRAY_SIZE(max11608_channels),
1092         },
1093         [max11609] = {
1094                 .bits = 10,
1095                 .int_vref_mv = 2048,
1096                 .mode_list = max11608_mode_list,
1097                 .num_modes = ARRAY_SIZE(max11608_mode_list),
1098                 .default_mode = s0to7,
1099                 .info = &max1238_info,
1100                 .channels = max11608_channels,
1101                 .num_channels = ARRAY_SIZE(max11608_channels),
1102         },
1103         [max11610] = {
1104                 .bits = 10,
1105                 .int_vref_mv = 4098,
1106                 .mode_list = max1238_mode_list,
1107                 .num_modes = ARRAY_SIZE(max1238_mode_list),
1108                 .default_mode = s0to11,
1109                 .info = &max1238_info,
1110                 .channels = max1238_channels,
1111                 .num_channels = ARRAY_SIZE(max1238_channels),
1112         },
1113         [max11611] = {
1114                 .bits = 10,
1115                 .int_vref_mv = 2048,
1116                 .mode_list = max1238_mode_list,
1117                 .num_modes = ARRAY_SIZE(max1238_mode_list),
1118                 .default_mode = s0to11,
1119                 .info = &max1238_info,
1120                 .channels = max1238_channels,
1121                 .num_channels = ARRAY_SIZE(max1238_channels),
1122         },
1123         [max11612] = {
1124                 .bits = 12,
1125                 .int_vref_mv = 4096,
1126                 .mode_list = max11607_mode_list,
1127                 .num_modes = ARRAY_SIZE(max11607_mode_list),
1128                 .default_mode = s0to3,
1129                 .info = &max1238_info,
1130                 .channels = max1363_channels,
1131                 .num_channels = ARRAY_SIZE(max1363_channels),
1132         },
1133         [max11613] = {
1134                 .bits = 12,
1135                 .int_vref_mv = 2048,
1136                 .mode_list = max11607_mode_list,
1137                 .num_modes = ARRAY_SIZE(max11607_mode_list),
1138                 .default_mode = s0to3,
1139                 .info = &max1238_info,
1140                 .channels = max1363_channels,
1141                 .num_channels = ARRAY_SIZE(max1363_channels),
1142         },
1143         [max11614] = {
1144                 .bits = 12,
1145                 .int_vref_mv = 4096,
1146                 .mode_list = max11608_mode_list,
1147                 .num_modes = ARRAY_SIZE(max11608_mode_list),
1148                 .default_mode = s0to7,
1149                 .info = &max1238_info,
1150                 .channels = max11614_channels,
1151                 .num_channels = ARRAY_SIZE(max11614_channels),
1152         },
1153         [max11615] = {
1154                 .bits = 12,
1155                 .int_vref_mv = 2048,
1156                 .mode_list = max11608_mode_list,
1157                 .num_modes = ARRAY_SIZE(max11608_mode_list),
1158                 .default_mode = s0to7,
1159                 .info = &max1238_info,
1160                 .channels = max11614_channels,
1161                 .num_channels = ARRAY_SIZE(max11614_channels),
1162         },
1163         [max11616] = {
1164                 .bits = 12,
1165                 .int_vref_mv = 4098,
1166                 .mode_list = max1238_mode_list,
1167                 .num_modes = ARRAY_SIZE(max1238_mode_list),
1168                 .default_mode = s0to11,
1169                 .info = &max1238_info,
1170                 .channels = max1238_channels,
1171                 .num_channels = ARRAY_SIZE(max1238_channels),
1172         },
1173         [max11617] = {
1174                 .bits = 12,
1175                 .int_vref_mv = 2048,
1176                 .mode_list = max1238_mode_list,
1177                 .num_modes = ARRAY_SIZE(max1238_mode_list),
1178                 .default_mode = s0to11,
1179                 .info = &max1238_info,
1180                 .channels = max1238_channels,
1181                 .num_channels = ARRAY_SIZE(max1238_channels),
1182         },
1183         [max11644] = {
1184                 .bits = 12,
1185                 .int_vref_mv = 2048,
1186                 .mode_list = max11644_mode_list,
1187                 .num_modes = ARRAY_SIZE(max11644_mode_list),
1188                 .default_mode = s0to1,
1189                 .info = &max1238_info,
1190                 .channels = max11644_channels,
1191                 .num_channels = ARRAY_SIZE(max11644_channels),
1192         },
1193         [max11645] = {
1194                 .bits = 12,
1195                 .int_vref_mv = 4096,
1196                 .mode_list = max11644_mode_list,
1197                 .num_modes = ARRAY_SIZE(max11644_mode_list),
1198                 .default_mode = s0to1,
1199                 .info = &max1238_info,
1200                 .channels = max11644_channels,
1201                 .num_channels = ARRAY_SIZE(max11644_channels),
1202         },
1203         [max11646] = {
1204                 .bits = 10,
1205                 .int_vref_mv = 2048,
1206                 .mode_list = max11644_mode_list,
1207                 .num_modes = ARRAY_SIZE(max11644_mode_list),
1208                 .default_mode = s0to1,
1209                 .info = &max1238_info,
1210                 .channels = max11646_channels,
1211                 .num_channels = ARRAY_SIZE(max11646_channels),
1212         },
1213         [max11647] = {
1214                 .bits = 10,
1215                 .int_vref_mv = 4096,
1216                 .mode_list = max11644_mode_list,
1217                 .num_modes = ARRAY_SIZE(max11644_mode_list),
1218                 .default_mode = s0to1,
1219                 .info = &max1238_info,
1220                 .channels = max11646_channels,
1221                 .num_channels = ARRAY_SIZE(max11646_channels),
1222         },
1223 };
1224
1225
1226
1227 static int max1363_initial_setup(struct max1363_state *st)
1228 {
1229         st->setupbyte = MAX1363_SETUP_AIN3_IS_AIN3_REF_IS_VDD
1230                 | MAX1363_SETUP_POWER_UP_INT_REF
1231                 | MAX1363_SETUP_INT_CLOCK
1232                 | MAX1363_SETUP_UNIPOLAR
1233                 | MAX1363_SETUP_NORESET;
1234
1235         /* Set scan mode writes the config anyway so wait until then*/
1236         st->setupbyte = MAX1363_SETUP_BYTE(st->setupbyte);
1237         st->current_mode = &max1363_mode_table[st->chip_info->default_mode];
1238         st->configbyte = MAX1363_CONFIG_BYTE(st->configbyte);
1239
1240         return max1363_set_scan_mode(st);
1241 }
1242
1243 static int __devinit max1363_probe(struct i2c_client *client,
1244                                    const struct i2c_device_id *id)
1245 {
1246         int ret, i;
1247         struct max1363_state *st;
1248         struct iio_dev *indio_dev;
1249         struct regulator *reg;
1250
1251         reg = regulator_get(&client->dev, "vcc");
1252         if (IS_ERR(reg)) {
1253                 ret = PTR_ERR(reg);
1254                 goto error_out;
1255         }
1256
1257         ret = regulator_enable(reg);
1258         if (ret)
1259                 goto error_put_reg;
1260
1261         indio_dev = iio_allocate_device(sizeof(struct max1363_state));
1262         if (indio_dev == NULL) {
1263                 ret = -ENOMEM;
1264                 goto error_disable_reg;
1265         }
1266         st = iio_priv(indio_dev);
1267         st->reg = reg;
1268         /* this is only used for device removal purposes */
1269         i2c_set_clientdata(client, indio_dev);
1270
1271         st->chip_info = &max1363_chip_info_tbl[id->driver_data];
1272         st->client = client;
1273
1274         indio_dev->available_scan_masks
1275                 = kzalloc(BITS_TO_LONGS(MAX1363_MAX_CHANNELS)*sizeof(long)*
1276                           (st->chip_info->num_modes + 1), GFP_KERNEL);
1277         if (!indio_dev->available_scan_masks) {
1278                 ret = -ENOMEM;
1279                 goto error_free_device;
1280         }
1281
1282         for (i = 0; i < st->chip_info->num_modes; i++)
1283                 bitmap_copy(indio_dev->available_scan_masks +
1284                             BITS_TO_LONGS(MAX1363_MAX_CHANNELS)*i,
1285                             max1363_mode_table[st->chip_info->mode_list[i]]
1286                             .modemask, MAX1363_MAX_CHANNELS);
1287         /* Estabilish that the iio_dev is a child of the i2c device */
1288         indio_dev->dev.parent = &client->dev;
1289         indio_dev->name = id->name;
1290         indio_dev->channels = st->chip_info->channels;
1291         indio_dev->num_channels = st->chip_info->num_channels;
1292         indio_dev->info = st->chip_info->info;
1293         indio_dev->modes = INDIO_DIRECT_MODE;
1294         indio_dev->channels = st->chip_info->channels;
1295         indio_dev->num_channels = st->chip_info->num_channels;
1296         ret = max1363_initial_setup(st);
1297         if (ret < 0)
1298                 goto error_free_available_scan_masks;
1299
1300         ret = max1363_register_ring_funcs_and_init(indio_dev);
1301         if (ret)
1302                 goto error_free_available_scan_masks;
1303
1304         ret = iio_buffer_register(indio_dev,
1305                                   st->chip_info->channels,
1306                                   st->chip_info->num_channels);
1307         if (ret)
1308                 goto error_cleanup_ring;
1309
1310         if (client->irq) {
1311                 ret = request_threaded_irq(st->client->irq,
1312                                            NULL,
1313                                            &max1363_event_handler,
1314                                            IRQF_TRIGGER_RISING | IRQF_ONESHOT,
1315                                            "max1363_event",
1316                                            indio_dev);
1317
1318                 if (ret)
1319                         goto error_uninit_ring;
1320         }
1321
1322         ret = iio_device_register(indio_dev);
1323         if (ret < 0)
1324                 goto error_free_irq;
1325
1326         return 0;
1327 error_free_irq:
1328         free_irq(st->client->irq, indio_dev);
1329 error_uninit_ring:
1330         iio_buffer_unregister(indio_dev);
1331 error_cleanup_ring:
1332         max1363_ring_cleanup(indio_dev);
1333 error_free_available_scan_masks:
1334         kfree(indio_dev->available_scan_masks);
1335 error_free_device:
1336         iio_free_device(indio_dev);
1337 error_disable_reg:
1338         regulator_disable(reg);
1339 error_put_reg:
1340         regulator_put(reg);
1341 error_out:
1342         return ret;
1343 }
1344
1345 static int max1363_remove(struct i2c_client *client)
1346 {
1347         struct iio_dev *indio_dev = i2c_get_clientdata(client);
1348         struct max1363_state *st = iio_priv(indio_dev);
1349         struct regulator *reg = st->reg;
1350
1351         iio_device_unregister(indio_dev);
1352         if (client->irq)
1353                 free_irq(st->client->irq, indio_dev);
1354         iio_buffer_unregister(indio_dev);
1355         max1363_ring_cleanup(indio_dev);
1356         kfree(indio_dev->available_scan_masks);
1357         if (!IS_ERR(reg)) {
1358                 regulator_disable(reg);
1359                 regulator_put(reg);
1360         }
1361         iio_free_device(indio_dev);
1362
1363         return 0;
1364 }
1365
1366 static const struct i2c_device_id max1363_id[] = {
1367         { "max1361", max1361 },
1368         { "max1362", max1362 },
1369         { "max1363", max1363 },
1370         { "max1364", max1364 },
1371         { "max1036", max1036 },
1372         { "max1037", max1037 },
1373         { "max1038", max1038 },
1374         { "max1039", max1039 },
1375         { "max1136", max1136 },
1376         { "max1137", max1137 },
1377         { "max1138", max1138 },
1378         { "max1139", max1139 },
1379         { "max1236", max1236 },
1380         { "max1237", max1237 },
1381         { "max1238", max1238 },
1382         { "max1239", max1239 },
1383         { "max11600", max11600 },
1384         { "max11601", max11601 },
1385         { "max11602", max11602 },
1386         { "max11603", max11603 },
1387         { "max11604", max11604 },
1388         { "max11605", max11605 },
1389         { "max11606", max11606 },
1390         { "max11607", max11607 },
1391         { "max11608", max11608 },
1392         { "max11609", max11609 },
1393         { "max11610", max11610 },
1394         { "max11611", max11611 },
1395         { "max11612", max11612 },
1396         { "max11613", max11613 },
1397         { "max11614", max11614 },
1398         { "max11615", max11615 },
1399         { "max11616", max11616 },
1400         { "max11617", max11617 },
1401         {}
1402 };
1403
1404 MODULE_DEVICE_TABLE(i2c, max1363_id);
1405
1406 static struct i2c_driver max1363_driver = {
1407         .driver = {
1408                 .name = "max1363",
1409         },
1410         .probe = max1363_probe,
1411         .remove = max1363_remove,
1412         .id_table = max1363_id,
1413 };
1414
1415 static __init int max1363_init(void)
1416 {
1417         return i2c_add_driver(&max1363_driver);
1418 }
1419
1420 static __exit void max1363_exit(void)
1421 {
1422         i2c_del_driver(&max1363_driver);
1423 }
1424
1425 MODULE_AUTHOR("Jonathan Cameron <jic23@cam.ac.uk>");
1426 MODULE_DESCRIPTION("Maxim 1363 ADC");
1427 MODULE_LICENSE("GPL v2");
1428
1429 module_init(max1363_init);
1430 module_exit(max1363_exit);