drivers/staging/iio/dac/ad5064.c

   1 /*
   2  * AD5024, AD5025, AD5044, AD5045, AD5064, AD5064-1, AD5065, AD5628, AD5648,
   3  * AD5666, AD5668 Digital to analog converters driver
   4  *
   5  * Copyright 2011 Analog Devices Inc.
   6  *
   7  * Licensed under the GPL-2.
   8  */
   9
  10 #include <linux/device.h>
  11 #include <linux/err.h>
  12 #include <linux/module.h>
  13 #include <linux/kernel.h>
  14 #include <linux/spi/spi.h>
  15 #include <linux/slab.h>
  16 #include <linux/sysfs.h>
  17 #include <linux/regulator/consumer.h>
  18
  19 #include <linux/iio/iio.h>
  20 #include <linux/iio/sysfs.h>
  21 #include "dac.h"
  22
  23 #define AD5064_MAX_DAC_CHANNELS                 8
  24 #define AD5064_MAX_VREFS                        4
  25
  26 #define AD5064_ADDR(x)                          ((x) << 20)
  27 #define AD5064_CMD(x)                           ((x) << 24)
  28
  29 #define AD5064_ADDR_DAC(chan)                   (chan)
  30 #define AD5064_ADDR_ALL_DAC                     0xF
  31
  32 #define AD5064_CMD_WRITE_INPUT_N                0x0
  33 #define AD5064_CMD_UPDATE_DAC_N                 0x1
  34 #define AD5064_CMD_WRITE_INPUT_N_UPDATE_ALL     0x2
  35 #define AD5064_CMD_WRITE_INPUT_N_UPDATE_N       0x3
  36 #define AD5064_CMD_POWERDOWN_DAC                0x4
  37 #define AD5064_CMD_CLEAR                        0x5
  38 #define AD5064_CMD_LDAC_MASK                    0x6
  39 #define AD5064_CMD_RESET                        0x7
  40 #define AD5064_CMD_CONFIG                       0x8
  41
  42 #define AD5064_CONFIG_DAISY_CHAIN_ENABLE        BIT(1)
  43 #define AD5064_CONFIG_INT_VREF_ENABLE           BIT(0)
  44
  45 #define AD5064_LDAC_PWRDN_NONE                  0x0
  46 #define AD5064_LDAC_PWRDN_1K                    0x1
  47 #define AD5064_LDAC_PWRDN_100K                  0x2
  48 #define AD5064_LDAC_PWRDN_3STATE                0x3
  49
  50 /**
  51  * struct ad5064_chip_info - chip specific information
  52  * @shared_vref:        whether the vref supply is shared between channels
  53  * @internal_vref:      internal reference voltage. 0 if the chip has no internal
  54  *                      vref.
  55  * @channel:            channel specification
  56  * @num_channels:       number of channels
  57  */
  58
  59 struct ad5064_chip_info {
  60         bool shared_vref;
  61         unsigned long internal_vref;
  62         const struct iio_chan_spec *channels;
  63         unsigned int num_channels;
  64 };
  65
  66 /**
  67  * struct ad5064_state - driver instance specific data
  68  * @spi:                spi_device
  69  * @chip_info:          chip model specific constants, available modes etc
  70  * @vref_reg:           vref supply regulators
  71  * @pwr_down:           whether channel is powered down
  72  * @pwr_down_mode:      channel's current power down mode
  73  * @dac_cache:          current DAC raw value (chip does not support readback)
  74  * @use_internal_vref:  set to true if the internal reference voltage should be
  75  *                      used.
  76  * @data:               spi transfer buffers
  77  */
  78
  79 struct ad5064_state {
  80         struct spi_device               *spi;
  81         const struct ad5064_chip_info   *chip_info;
  82         struct regulator_bulk_data      vref_reg[AD5064_MAX_VREFS];
  83         bool                            pwr_down[AD5064_MAX_DAC_CHANNELS];
  84         u8                              pwr_down_mode[AD5064_MAX_DAC_CHANNELS];
  85         unsigned int                    dac_cache[AD5064_MAX_DAC_CHANNELS];
  86         bool                            use_internal_vref;
  87
  88         /*
  89          * DMA (thus cache coherency maintenance) requires the
  90          * transfer buffers to live in their own cache lines.
  91          */
  92         __be32 data ____cacheline_aligned;
  93 };
  94
  95 enum ad5064_type {
  96         ID_AD5024,
  97         ID_AD5025,
  98         ID_AD5044,
  99         ID_AD5045,
 100         ID_AD5064,
 101         ID_AD5064_1,
 102         ID_AD5065,
 103         ID_AD5628_1,
 104         ID_AD5628_2,
 105         ID_AD5648_1,
 106         ID_AD5648_2,
 107         ID_AD5666_1,
 108         ID_AD5666_2,
 109         ID_AD5668_1,
 110         ID_AD5668_2,
 111 };
 112
 113 static int ad5064_spi_write(struct ad5064_state *st, unsigned int cmd,
 114         unsigned int addr, unsigned int val, unsigned int shift)
 115 {
 116         val <<= shift;
 117
 118         st->data = cpu_to_be32(AD5064_CMD(cmd) | AD5064_ADDR(addr) | val);
 119
 120         return spi_write(st->spi, &st->data, sizeof(st->data));
 121 }
 122
 123 static int ad5064_sync_powerdown_mode(struct ad5064_state *st,
 124         unsigned int channel)
 125 {
 126         unsigned int val;
 127         int ret;
 128
 129         val = (0x1 << channel);
 130
 131         if (st->pwr_down[channel])
 132                 val |= st->pwr_down_mode[channel] << 8;
 133
 134         ret = ad5064_spi_write(st, AD5064_CMD_POWERDOWN_DAC, 0, val, 0);
 135
 136         return ret;
 137 }
 138
 139 static const char ad5064_powerdown_modes[][15] = {
 140         [AD5064_LDAC_PWRDN_NONE]        = "",
 141         [AD5064_LDAC_PWRDN_1K]          = "1kohm_to_gnd",
 142         [AD5064_LDAC_PWRDN_100K]        = "100kohm_to_gnd",
 143         [AD5064_LDAC_PWRDN_3STATE]      = "three_state",
 144 };
 145
 146 static ssize_t ad5064_read_powerdown_mode_available(struct iio_dev *indio_dev,
 147         uintptr_t private, const struct iio_chan_spec *chan, char *buf)
 148 {
 149         return sprintf(buf, "%s %s %s\n", ad5064_powerdown_modes[1],
 150                 ad5064_powerdown_modes[2], ad5064_powerdown_modes[3]);
 151 }
 152
 153 static ssize_t ad5064_read_powerdown_mode(struct iio_dev *indio_dev,
 154         uintptr_t private, const struct iio_chan_spec *chan, char *buf)
 155 {
 156         struct ad5064_state *st = iio_priv(indio_dev);
 157
 158         return sprintf(buf, "%s\n",
 159                 ad5064_powerdown_modes[st->pwr_down_mode[chan->channel]]);
 160 }
 161
 162 static ssize_t ad5064_write_powerdown_mode(struct iio_dev *indio_dev,
 163         uintptr_t private, const struct iio_chan_spec *chan, const char *buf,
 164         size_t len)
 165 {
 166         struct ad5064_state *st = iio_priv(indio_dev);
 167         unsigned int mode, i;
 168         int ret;
 169
 170         mode = 0;
 171
 172         for (i = 1; i < ARRAY_SIZE(ad5064_powerdown_modes); ++i) {
 173                 if (sysfs_streq(buf, ad5064_powerdown_modes[i])) {
 174                         mode = i;
 175                         break;
 176                 }
 177         }
 178         if (mode == 0)
 179                 return  -EINVAL;
 180
 181         mutex_lock(&indio_dev->mlock);
 182         st->pwr_down_mode[chan->channel] = mode;
 183
 184         ret = ad5064_sync_powerdown_mode(st, chan->channel);
 185         mutex_unlock(&indio_dev->mlock);
 186
 187         return ret ? ret : len;
 188 }
 189
 190 static ssize_t ad5064_read_dac_powerdown(struct iio_dev *indio_dev,
 191         uintptr_t private, const struct iio_chan_spec *chan, char *buf)
 192 {
 193         struct ad5064_state *st = iio_priv(indio_dev);
 194
 195         return sprintf(buf, "%d\n", st->pwr_down[chan->channel]);
 196 }
 197
 198 static ssize_t ad5064_write_dac_powerdown(struct iio_dev *indio_dev,
 199          uintptr_t private, const struct iio_chan_spec *chan, const char *buf,
 200          size_t len)
 201 {
 202         struct ad5064_state *st = iio_priv(indio_dev);
 203         bool pwr_down;
 204         int ret;
 205
 206         ret = strtobool(buf, &pwr_down);
 207         if (ret)
 208                 return ret;
 209
 210         mutex_lock(&indio_dev->mlock);
 211         st->pwr_down[chan->channel] = pwr_down;
 212
 213         ret = ad5064_sync_powerdown_mode(st, chan->channel);
 214         mutex_unlock(&indio_dev->mlock);
 215         return ret ? ret : len;
 216 }
 217
 218 static int ad5064_get_vref(struct ad5064_state *st,
 219         struct iio_chan_spec const *chan)
 220 {
 221         unsigned int i;
 222
 223         if (st->use_internal_vref)
 224                 return st->chip_info->internal_vref;
 225
 226         i = st->chip_info->shared_vref ? 0 : chan->channel;
 227         return regulator_get_voltage(st->vref_reg[i].consumer);
 228 }
 229
 230 static int ad5064_read_raw(struct iio_dev *indio_dev,
 231                            struct iio_chan_spec const *chan,
 232                            int *val,
 233                            int *val2,
 234                            long m)
 235 {
 236         struct ad5064_state *st = iio_priv(indio_dev);
 237         int scale_uv;
 238
 239         switch (m) {
 240         case IIO_CHAN_INFO_RAW:
 241                 *val = st->dac_cache[chan->channel];
 242                 return IIO_VAL_INT;
 243         case IIO_CHAN_INFO_SCALE:
 244                 scale_uv = ad5064_get_vref(st, chan);
 245                 if (scale_uv < 0)
 246                         return scale_uv;
 247
 248                 scale_uv = (scale_uv * 100) >> chan->scan_type.realbits;
 249                 *val =  scale_uv / 100000;
 250                 *val2 = (scale_uv % 100000) * 10;
 251                 return IIO_VAL_INT_PLUS_MICRO;
 252         default:
 253                 break;
 254         }
 255         return -EINVAL;
 256 }
 257
 258 static int ad5064_write_raw(struct iio_dev *indio_dev,
 259         struct iio_chan_spec const *chan, int val, int val2, long mask)
 260 {
 261         struct ad5064_state *st = iio_priv(indio_dev);
 262         int ret;
 263
 264         switch (mask) {
 265         case IIO_CHAN_INFO_RAW:
 266                 if (val > (1 << chan->scan_type.realbits) || val < 0)
 267                         return -EINVAL;
 268
 269                 mutex_lock(&indio_dev->mlock);
 270                 ret = ad5064_spi_write(st, AD5064_CMD_WRITE_INPUT_N_UPDATE_N,
 271                                 chan->address, val, chan->scan_type.shift);
 272                 if (ret == 0)
 273                         st->dac_cache[chan->channel] = val;
 274                 mutex_unlock(&indio_dev->mlock);
 275                 break;
 276         default:
 277                 ret = -EINVAL;
 278         }
 279
 280         return ret;
 281 }
 282
 283 static const struct iio_info ad5064_info = {
 284         .read_raw = ad5064_read_raw,
 285         .write_raw = ad5064_write_raw,
 286         .driver_module = THIS_MODULE,
 287 };
 288
 289 static struct iio_chan_spec_ext_info ad5064_ext_info[] = {
 290         {
 291                 .name = "powerdown",
 292                 .read = ad5064_read_dac_powerdown,
 293                 .write = ad5064_write_dac_powerdown,
 294         },
 295         {
 296                 .name = "powerdown_mode",
 297                 .read = ad5064_read_powerdown_mode,
 298                 .write = ad5064_write_powerdown_mode,
 299         },
 300         {
 301                 .name = "powerdown_mode_available",
 302                 .shared = true,
 303                 .read = ad5064_read_powerdown_mode_available,
 304         },
 305         { },
 306 };
 307
 308 #define AD5064_CHANNEL(chan, bits) {                            \
 309         .type = IIO_VOLTAGE,                                    \
 310         .indexed = 1,                                           \
 311         .output = 1,                                            \
 312         .channel = (chan),                                      \
 313         .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |           \
 314         IIO_CHAN_INFO_SCALE_SEPARATE_BIT,                       \
 315         .address = AD5064_ADDR_DAC(chan),                       \
 316         .scan_type = IIO_ST('u', (bits), 16, 20 - (bits)),      \
 317         .ext_info = ad5064_ext_info,                            \
 318 }
 319
 320 #define DECLARE_AD5064_CHANNELS(name, bits) \
 321 const struct iio_chan_spec name[] = { \
 322         AD5064_CHANNEL(0, bits), \
 323         AD5064_CHANNEL(1, bits), \
 324         AD5064_CHANNEL(2, bits), \
 325         AD5064_CHANNEL(3, bits), \
 326         AD5064_CHANNEL(4, bits), \
 327         AD5064_CHANNEL(5, bits), \
 328         AD5064_CHANNEL(6, bits), \
 329         AD5064_CHANNEL(7, bits), \
 330 }
 331
 332 static DECLARE_AD5064_CHANNELS(ad5024_channels, 12);
 333 static DECLARE_AD5064_CHANNELS(ad5044_channels, 14);
 334 static DECLARE_AD5064_CHANNELS(ad5064_channels, 16);
 335
 336 static const struct ad5064_chip_info ad5064_chip_info_tbl[] = {
 337         [ID_AD5024] = {
 338                 .shared_vref = false,
 339                 .channels = ad5024_channels,
 340                 .num_channels = 4,
 341         },
 342         [ID_AD5025] = {
 343                 .shared_vref = false,
 344                 .channels = ad5024_channels,
 345                 .num_channels = 2,
 346         },
 347         [ID_AD5044] = {
 348                 .shared_vref = false,
 349                 .channels = ad5044_channels,
 350                 .num_channels = 4,
 351         },
 352         [ID_AD5045] = {
 353                 .shared_vref = false,
 354                 .channels = ad5044_channels,
 355                 .num_channels = 2,
 356         },
 357         [ID_AD5064] = {
 358                 .shared_vref = false,
 359                 .channels = ad5064_channels,
 360                 .num_channels = 4,
 361         },
 362         [ID_AD5064_1] = {
 363                 .shared_vref = true,
 364                 .channels = ad5064_channels,
 365                 .num_channels = 4,
 366         },
 367         [ID_AD5065] = {
 368                 .shared_vref = false,
 369                 .channels = ad5064_channels,
 370                 .num_channels = 2,
 371         },
 372         [ID_AD5628_1] = {
 373                 .shared_vref = true,
 374                 .internal_vref = 2500000,
 375                 .channels = ad5024_channels,
 376                 .num_channels = 8,
 377         },
 378         [ID_AD5628_2] = {
 379                 .shared_vref = true,
 380                 .internal_vref = 5000000,
 381                 .channels = ad5024_channels,
 382                 .num_channels = 8,
 383         },
 384         [ID_AD5648_1] = {
 385                 .shared_vref = true,
 386                 .internal_vref = 2500000,
 387                 .channels = ad5044_channels,
 388                 .num_channels = 8,
 389         },
 390         [ID_AD5648_2] = {
 391                 .shared_vref = true,
 392                 .internal_vref = 5000000,
 393                 .channels = ad5044_channels,
 394                 .num_channels = 8,
 395         },
 396         [ID_AD5666_1] = {
 397                 .shared_vref = true,
 398                 .internal_vref = 2500000,
 399                 .channels = ad5064_channels,
 400                 .num_channels = 4,
 401         },
 402         [ID_AD5666_2] = {
 403                 .shared_vref = true,
 404                 .internal_vref = 5000000,
 405                 .channels = ad5064_channels,
 406                 .num_channels = 4,
 407         },
 408         [ID_AD5668_1] = {
 409                 .shared_vref = true,
 410                 .internal_vref = 2500000,
 411                 .channels = ad5064_channels,
 412                 .num_channels = 8,
 413         },
 414         [ID_AD5668_2] = {
 415                 .shared_vref = true,
 416                 .internal_vref = 5000000,
 417                 .channels = ad5064_channels,
 418                 .num_channels = 8,
 419         },
 420 };
 421
 422 static inline unsigned int ad5064_num_vref(struct ad5064_state *st)
 423 {
 424         return st->chip_info->shared_vref ? 1 : st->chip_info->num_channels;
 425 }
 426
 427 static const char * const ad5064_vref_names[] = {
 428         "vrefA",
 429         "vrefB",
 430         "vrefC",
 431         "vrefD",
 432 };
 433
 434 static const char * const ad5064_vref_name(struct ad5064_state *st,
 435         unsigned int vref)
 436 {
 437         return st->chip_info->shared_vref ? "vref" : ad5064_vref_names[vref];
 438 }
 439
 440 static int __devinit ad5064_probe(struct spi_device *spi)
 441 {
 442         enum ad5064_type type = spi_get_device_id(spi)->driver_data;
 443         struct iio_dev *indio_dev;
 444         struct ad5064_state *st;
 445         unsigned int i;
 446         int ret;
 447
 448         indio_dev = iio_device_alloc(sizeof(*st));
 449         if (indio_dev == NULL)
 450                 return  -ENOMEM;
 451
 452         st = iio_priv(indio_dev);
 453         spi_set_drvdata(spi, indio_dev);
 454
 455         st->chip_info = &ad5064_chip_info_tbl[type];
 456         st->spi = spi;
 457
 458         for (i = 0; i < ad5064_num_vref(st); ++i)
 459                 st->vref_reg[i].supply = ad5064_vref_name(st, i);
 460
 461         ret = regulator_bulk_get(&st->spi->dev, ad5064_num_vref(st),
 462                 st->vref_reg);
 463         if (ret) {
 464                 if (!st->chip_info->internal_vref)
 465                         goto error_free;
 466                 st->use_internal_vref = true;
 467                 ret = ad5064_spi_write(st, AD5064_CMD_CONFIG, 0,
 468                         AD5064_CONFIG_INT_VREF_ENABLE, 0);
 469                 if (ret) {
 470                         dev_err(&spi->dev, "Failed to enable internal vref: %d\n",
 471                                 ret);
 472                         goto error_free;
 473                 }
 474         } else {
 475                 ret = regulator_bulk_enable(ad5064_num_vref(st), st->vref_reg);
 476                 if (ret)
 477                         goto error_free_reg;
 478         }
 479
 480         for (i = 0; i < st->chip_info->num_channels; ++i) {
 481                 st->pwr_down_mode[i] = AD5064_LDAC_PWRDN_1K;
 482                 st->dac_cache[i] = 0x8000;
 483         }
 484
 485         indio_dev->dev.parent = &spi->dev;
 486         indio_dev->name = spi_get_device_id(spi)->name;
 487         indio_dev->info = &ad5064_info;
 488         indio_dev->modes = INDIO_DIRECT_MODE;
 489         indio_dev->channels = st->chip_info->channels;
 490         indio_dev->num_channels = st->chip_info->num_channels;
 491
 492         ret = iio_device_register(indio_dev);
 493         if (ret)
 494                 goto error_disable_reg;
 495
 496         return 0;
 497
 498 error_disable_reg:
 499         if (!st->use_internal_vref)
 500                 regulator_bulk_disable(ad5064_num_vref(st), st->vref_reg);
 501 error_free_reg:
 502         if (!st->use_internal_vref)
 503                 regulator_bulk_free(ad5064_num_vref(st), st->vref_reg);
 504 error_free:
 505         iio_device_free(indio_dev);
 506
 507         return ret;
 508 }
 509
 510
 511 static int __devexit ad5064_remove(struct spi_device *spi)
 512 {
 513         struct iio_dev *indio_dev = spi_get_drvdata(spi);
 514         struct ad5064_state *st = iio_priv(indio_dev);
 515
 516         iio_device_unregister(indio_dev);
 517
 518         if (!st->use_internal_vref) {
 519                 regulator_bulk_disable(ad5064_num_vref(st), st->vref_reg);
 520                 regulator_bulk_free(ad5064_num_vref(st), st->vref_reg);
 521         }
 522
 523         iio_device_free(indio_dev);
 524
 525         return 0;
 526 }
 527
 528 static const struct spi_device_id ad5064_id[] = {
 529         {"ad5024", ID_AD5024},
 530         {"ad5025", ID_AD5025},
 531         {"ad5044", ID_AD5044},
 532         {"ad5045", ID_AD5045},
 533         {"ad5064", ID_AD5064},
 534         {"ad5064-1", ID_AD5064_1},
 535         {"ad5065", ID_AD5065},
 536         {"ad5628-1", ID_AD5628_1},
 537         {"ad5628-2", ID_AD5628_2},
 538         {"ad5648-1", ID_AD5648_1},
 539         {"ad5648-2", ID_AD5648_2},
 540         {"ad5666-1", ID_AD5666_1},
 541         {"ad5666-2", ID_AD5666_2},
 542         {"ad5668-1", ID_AD5668_1},
 543         {"ad5668-2", ID_AD5668_2},
 544         {"ad5668-3", ID_AD5668_2}, /* similar enough to ad5668-2 */
 545         {}
 546 };
 547 MODULE_DEVICE_TABLE(spi, ad5064_id);
 548
 549 static struct spi_driver ad5064_driver = {
 550         .driver = {
 551                    .name = "ad5064",
 552                    .owner = THIS_MODULE,
 553         },
 554         .probe = ad5064_probe,
 555         .remove = __devexit_p(ad5064_remove),
 556         .id_table = ad5064_id,
 557 };
 558 module_spi_driver(ad5064_driver);
 559
 560 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
 561 MODULE_DESCRIPTION("Analog Devices AD5024/25/44/45/64/64-1/65, AD5628/48/66/68 DAC");
 562 MODULE_LICENSE("GPL v2");