2 * Analog devices AD5764, AD5764R, AD5744, AD5744R quad-channel
3 * Digital to Analog Converters driver
5 * Copyright 2011 Analog Devices Inc.
7 * Licensed under the GPL-2.
10 #include <linux/device.h>
11 #include <linux/err.h>
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/spi/spi.h>
15 #include <linux/slab.h>
16 #include <linux/sysfs.h>
17 #include <linux/regulator/consumer.h>
23 #define AD5764_REG_SF_NOP 0x0
24 #define AD5764_REG_SF_CONFIG 0x1
25 #define AD5764_REG_SF_CLEAR 0x4
26 #define AD5764_REG_SF_LOAD 0x5
27 #define AD5764_REG_DATA(x) ((2 << 3) | (x))
28 #define AD5764_REG_COARSE_GAIN(x) ((3 << 3) | (x))
29 #define AD5764_REG_FINE_GAIN(x) ((4 << 3) | (x))
30 #define AD5764_REG_OFFSET(x) ((5 << 3) | (x))
32 #define AD5764_NUM_CHANNELS 4
35 * struct ad5764_chip_info - chip specific information
36 * @int_vref: Value of the internal reference voltage in uV - 0 if external
37 * reference voltage is used
38 * @channel channel specification
41 struct ad5764_chip_info {
42 unsigned long int_vref;
43 const struct iio_chan_spec *channels;
47 * struct ad5764_state - driver instance specific data
49 * @chip_info: chip info
50 * @vref_reg: vref supply regulators
51 * @data: spi transfer buffers
55 struct spi_device *spi;
56 const struct ad5764_chip_info *chip_info;
57 struct regulator_bulk_data vref_reg[2];
60 * DMA (thus cache coherency maintenance) requires the
61 * transfer buffers to live in their own cache lines.
66 } data[2] ____cacheline_aligned;
76 #define AD5764_CHANNEL(_chan, _bits) { \
77 .type = IIO_VOLTAGE, \
82 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT | \
83 IIO_CHAN_INFO_OFFSET_SHARED_BIT | \
84 IIO_CHAN_INFO_SCALE_SEPARATE_BIT | \
85 IIO_CHAN_INFO_CALIBSCALE_SEPARATE_BIT | \
86 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT, \
87 .scan_type = IIO_ST('u', (_bits), 16, 16 - (_bits)) \
90 #define DECLARE_AD5764_CHANNELS(_name, _bits) \
91 const struct iio_chan_spec _name##_channels[] = { \
92 AD5764_CHANNEL(0, (_bits)), \
93 AD5764_CHANNEL(1, (_bits)), \
94 AD5764_CHANNEL(2, (_bits)), \
95 AD5764_CHANNEL(3, (_bits)), \
98 static DECLARE_AD5764_CHANNELS(ad5764, 16);
99 static DECLARE_AD5764_CHANNELS(ad5744, 14);
101 static const struct ad5764_chip_info ad5764_chip_infos[] = {
104 .channels = ad5744_channels,
108 .channels = ad5744_channels,
112 .channels = ad5764_channels,
116 .channels = ad5764_channels,
120 static int ad5764_write(struct iio_dev *indio_dev, unsigned int reg,
123 struct ad5764_state *st = iio_priv(indio_dev);
126 mutex_lock(&indio_dev->mlock);
127 st->data[0].d32 = cpu_to_be32((reg << 16) | val);
129 ret = spi_write(st->spi, &st->data[0].d8[1], 3);
130 mutex_unlock(&indio_dev->mlock);
135 static int ad5764_read(struct iio_dev *indio_dev, unsigned int reg,
138 struct ad5764_state *st = iio_priv(indio_dev);
139 struct spi_message m;
141 struct spi_transfer t[] = {
143 .tx_buf = &st->data[0].d8[1],
147 .rx_buf = &st->data[1].d8[1],
152 spi_message_init(&m);
153 spi_message_add_tail(&t[0], &m);
154 spi_message_add_tail(&t[1], &m);
156 mutex_lock(&indio_dev->mlock);
158 st->data[0].d32 = cpu_to_be32((1 << 23) | (reg << 16));
160 ret = spi_sync(st->spi, &m);
162 *val = be32_to_cpu(st->data[1].d32) & 0xffff;
164 mutex_unlock(&indio_dev->mlock);
169 static int ad5764_chan_info_to_reg(struct iio_chan_spec const *chan, long info)
173 return AD5764_REG_DATA(chan->address);
174 case IIO_CHAN_INFO_CALIBBIAS:
175 return AD5764_REG_OFFSET(chan->address);
176 case IIO_CHAN_INFO_CALIBSCALE:
177 return AD5764_REG_FINE_GAIN(chan->address);
185 static int ad5764_write_raw(struct iio_dev *indio_dev,
186 struct iio_chan_spec const *chan, int val, int val2, long info)
188 const int max_val = (1 << chan->scan_type.realbits);
192 case IIO_CHAN_INFO_RAW:
193 if (val >= max_val || val < 0)
195 val <<= chan->scan_type.shift;
197 case IIO_CHAN_INFO_CALIBBIAS:
198 if (val >= 128 || val < -128)
201 case IIO_CHAN_INFO_CALIBSCALE:
202 if (val >= 32 || val < -32)
209 reg = ad5764_chan_info_to_reg(chan, info);
210 return ad5764_write(indio_dev, reg, (u16)val);
213 static int ad5764_get_channel_vref(struct ad5764_state *st,
214 unsigned int channel)
216 if (st->chip_info->int_vref)
217 return st->chip_info->int_vref;
219 return regulator_get_voltage(st->vref_reg[channel / 2].consumer);
222 static int ad5764_read_raw(struct iio_dev *indio_dev,
223 struct iio_chan_spec const *chan, int *val, int *val2, long info)
225 struct ad5764_state *st = iio_priv(indio_dev);
226 unsigned long scale_uv;
232 case IIO_CHAN_INFO_RAW:
233 reg = AD5764_REG_DATA(chan->address);
234 ret = ad5764_read(indio_dev, reg, val);
237 *val >>= chan->scan_type.shift;
239 case IIO_CHAN_INFO_CALIBBIAS:
240 reg = AD5764_REG_OFFSET(chan->address);
241 ret = ad5764_read(indio_dev, reg, val);
244 *val = sign_extend32(*val, 7);
246 case IIO_CHAN_INFO_CALIBSCALE:
247 reg = AD5764_REG_FINE_GAIN(chan->address);
248 ret = ad5764_read(indio_dev, reg, val);
251 *val = sign_extend32(*val, 5);
253 case IIO_CHAN_INFO_SCALE:
254 /* vout = 4 * vref + ((dac_code / 65535) - 0.5) */
255 vref = ad5764_get_channel_vref(st, chan->channel);
259 scale_uv = (vref * 4 * 100) >> chan->scan_type.realbits;
260 *val = scale_uv / 100000;
261 *val2 = (scale_uv % 100000) * 10;
262 return IIO_VAL_INT_PLUS_MICRO;
263 case IIO_CHAN_INFO_OFFSET:
264 *val = -(1 << chan->scan_type.realbits) / 2;
271 static const struct iio_info ad5764_info = {
272 .read_raw = ad5764_read_raw,
273 .write_raw = ad5764_write_raw,
274 .driver_module = THIS_MODULE,
277 static int __devinit ad5764_probe(struct spi_device *spi)
279 enum ad5764_type type = spi_get_device_id(spi)->driver_data;
280 struct iio_dev *indio_dev;
281 struct ad5764_state *st;
284 indio_dev = iio_allocate_device(sizeof(*st));
285 if (indio_dev == NULL) {
286 dev_err(&spi->dev, "Failed to allocate iio device\n");
290 st = iio_priv(indio_dev);
291 spi_set_drvdata(spi, indio_dev);
294 st->chip_info = &ad5764_chip_infos[type];
296 indio_dev->dev.parent = &spi->dev;
297 indio_dev->name = spi_get_device_id(spi)->name;
298 indio_dev->info = &ad5764_info;
299 indio_dev->modes = INDIO_DIRECT_MODE;
300 indio_dev->num_channels = AD5764_NUM_CHANNELS;
301 indio_dev->channels = st->chip_info->channels;
303 if (st->chip_info->int_vref == 0) {
304 st->vref_reg[0].supply = "vrefAB";
305 st->vref_reg[1].supply = "vrefCD";
307 ret = regulator_bulk_get(&st->spi->dev,
308 ARRAY_SIZE(st->vref_reg), st->vref_reg);
310 dev_err(&spi->dev, "Failed to request vref regulators: %d\n",
315 ret = regulator_bulk_enable(ARRAY_SIZE(st->vref_reg),
318 dev_err(&spi->dev, "Failed to enable vref regulators: %d\n",
324 ret = iio_device_register(indio_dev);
326 dev_err(&spi->dev, "Failed to register iio device: %d\n", ret);
327 goto error_disable_reg;
333 if (st->chip_info->int_vref == 0)
334 regulator_bulk_disable(ARRAY_SIZE(st->vref_reg), st->vref_reg);
336 if (st->chip_info->int_vref == 0)
337 regulator_bulk_free(ARRAY_SIZE(st->vref_reg), st->vref_reg);
339 iio_free_device(indio_dev);
344 static int __devexit ad5764_remove(struct spi_device *spi)
346 struct iio_dev *indio_dev = spi_get_drvdata(spi);
347 struct ad5764_state *st = iio_priv(indio_dev);
349 iio_device_unregister(indio_dev);
351 if (st->chip_info->int_vref == 0) {
352 regulator_bulk_disable(ARRAY_SIZE(st->vref_reg), st->vref_reg);
353 regulator_bulk_free(ARRAY_SIZE(st->vref_reg), st->vref_reg);
356 iio_free_device(indio_dev);
361 static const struct spi_device_id ad5764_ids[] = {
362 { "ad5744", ID_AD5744 },
363 { "ad5744r", ID_AD5744R },
364 { "ad5764", ID_AD5764 },
365 { "ad5764r", ID_AD5764R },
368 MODULE_DEVICE_TABLE(spi, ad5764_ids);
370 static struct spi_driver ad5764_driver = {
373 .owner = THIS_MODULE,
375 .probe = ad5764_probe,
376 .remove = __devexit_p(ad5764_remove),
377 .id_table = ad5764_ids,
379 module_spi_driver(ad5764_driver);
381 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
382 MODULE_DESCRIPTION("Analog Devices AD5744/AD5744R/AD5764/AD5764R DAC");
383 MODULE_LICENSE("GPL v2");