2 * AD5933 AD5934 Impedance Converter, Network Analyzer
4 * Copyright 2011 Analog Devices Inc.
6 * Licensed under the GPL-2.
9 #include <linux/interrupt.h>
10 #include <linux/device.h>
11 #include <linux/kernel.h>
12 #include <linux/sysfs.h>
13 #include <linux/i2c.h>
14 #include <linux/regulator/consumer.h>
15 #include <linux/slab.h>
16 #include <linux/types.h>
17 #include <linux/err.h>
18 #include <linux/delay.h>
19 #include <linux/module.h>
20 #include <asm/div64.h>
24 #include "../buffer_generic.h"
25 #include "../ring_sw.h"
29 /* AD5933/AD5934 Registers */
30 #define AD5933_REG_CONTROL_HB 0x80 /* R/W, 2 bytes */
31 #define AD5933_REG_CONTROL_LB 0x81 /* R/W, 2 bytes */
32 #define AD5933_REG_FREQ_START 0x82 /* R/W, 3 bytes */
33 #define AD5933_REG_FREQ_INC 0x85 /* R/W, 3 bytes */
34 #define AD5933_REG_INC_NUM 0x88 /* R/W, 2 bytes, 9 bit */
35 #define AD5933_REG_SETTLING_CYCLES 0x8A /* R/W, 2 bytes */
36 #define AD5933_REG_STATUS 0x8F /* R, 1 byte */
37 #define AD5933_REG_TEMP_DATA 0x92 /* R, 2 bytes*/
38 #define AD5933_REG_REAL_DATA 0x94 /* R, 2 bytes*/
39 #define AD5933_REG_IMAG_DATA 0x96 /* R, 2 bytes*/
41 /* AD5933_REG_CONTROL_HB Bits */
42 #define AD5933_CTRL_INIT_START_FREQ (0x1 << 4)
43 #define AD5933_CTRL_START_SWEEP (0x2 << 4)
44 #define AD5933_CTRL_INC_FREQ (0x3 << 4)
45 #define AD5933_CTRL_REPEAT_FREQ (0x4 << 4)
46 #define AD5933_CTRL_MEASURE_TEMP (0x9 << 4)
47 #define AD5933_CTRL_POWER_DOWN (0xA << 4)
48 #define AD5933_CTRL_STANDBY (0xB << 4)
50 #define AD5933_CTRL_RANGE_2000mVpp (0x0 << 1)
51 #define AD5933_CTRL_RANGE_200mVpp (0x1 << 1)
52 #define AD5933_CTRL_RANGE_400mVpp (0x2 << 1)
53 #define AD5933_CTRL_RANGE_1000mVpp (0x3 << 1)
54 #define AD5933_CTRL_RANGE(x) ((x) << 1)
56 #define AD5933_CTRL_PGA_GAIN_1 (0x1 << 0)
57 #define AD5933_CTRL_PGA_GAIN_5 (0x0 << 0)
59 /* AD5933_REG_CONTROL_LB Bits */
60 #define AD5933_CTRL_RESET (0x1 << 4)
61 #define AD5933_CTRL_INT_SYSCLK (0x0 << 3)
62 #define AD5933_CTRL_EXT_SYSCLK (0x1 << 3)
64 /* AD5933_REG_STATUS Bits */
65 #define AD5933_STAT_TEMP_VALID (0x1 << 0)
66 #define AD5933_STAT_DATA_VALID (0x1 << 1)
67 #define AD5933_STAT_SWEEP_DONE (0x1 << 2)
69 /* I2C Block Commands */
70 #define AD5933_I2C_BLOCK_WRITE 0xA0
71 #define AD5933_I2C_BLOCK_READ 0xA1
72 #define AD5933_I2C_ADDR_POINTER 0xB0
75 #define AD5933_INT_OSC_FREQ_Hz 16776000
76 #define AD5933_MAX_OUTPUT_FREQ_Hz 100000
77 #define AD5933_MAX_RETRIES 100
79 #define AD5933_OUT_RANGE 1
80 #define AD5933_OUT_RANGE_AVAIL 2
81 #define AD5933_OUT_SETTLING_CYCLES 3
82 #define AD5933_IN_PGA_GAIN 4
83 #define AD5933_IN_PGA_GAIN_AVAIL 5
84 #define AD5933_FREQ_POINTS 6
86 #define AD5933_POLL_TIME_ms 10
87 #define AD5933_INIT_EXCITATION_TIME_ms 100
90 struct i2c_client *client;
91 struct regulator *reg;
92 struct ad5933_platform_data *pdata;
93 struct delayed_work work;
94 unsigned long mclk_hz;
95 unsigned char ctrl_hb;
96 unsigned char ctrl_lb;
97 unsigned range_avail[4];
98 unsigned short vref_mv;
99 unsigned short settling_cycles;
100 unsigned short freq_points;
104 unsigned poll_time_jiffies;
107 static struct ad5933_platform_data ad5933_default_pdata = {
111 static struct iio_chan_spec ad5933_channels[] = {
112 IIO_CHAN(IIO_TEMP, 0, 1, 1, NULL, 0, 0, 0,
113 0, AD5933_REG_TEMP_DATA, IIO_ST('s', 14, 16, 0), 0),
115 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, "real_raw", 0, 0,
116 (1 << IIO_CHAN_INFO_SCALE_SEPARATE),
117 AD5933_REG_REAL_DATA, 0, IIO_ST('s', 16, 16, 0), 0),
118 IIO_CHAN(IIO_VOLTAGE, 0, 1, 0, "imag_raw", 0, 0,
119 (1 << IIO_CHAN_INFO_SCALE_SEPARATE),
120 AD5933_REG_IMAG_DATA, 1, IIO_ST('s', 16, 16, 0), 0),
123 static int ad5933_i2c_write(struct i2c_client *client,
124 u8 reg, u8 len, u8 *data)
129 ret = i2c_smbus_write_byte_data(client, reg++, *data++);
131 dev_err(&client->dev, "I2C write error\n");
138 static int ad5933_i2c_read(struct i2c_client *client,
139 u8 reg, u8 len, u8 *data)
144 ret = i2c_smbus_read_byte_data(client, reg++);
146 dev_err(&client->dev, "I2C read error\n");
154 static int ad5933_cmd(struct ad5933_state *st, unsigned char cmd)
156 unsigned char dat = st->ctrl_hb | cmd;
158 return ad5933_i2c_write(st->client,
159 AD5933_REG_CONTROL_HB, 1, &dat);
162 static int ad5933_reset(struct ad5933_state *st)
164 unsigned char dat = st->ctrl_lb | AD5933_CTRL_RESET;
165 return ad5933_i2c_write(st->client,
166 AD5933_REG_CONTROL_LB, 1, &dat);
169 static int ad5933_wait_busy(struct ad5933_state *st, unsigned char event)
171 unsigned char val, timeout = AD5933_MAX_RETRIES;
175 ret = ad5933_i2c_read(st->client, AD5933_REG_STATUS, 1, &val);
187 static int ad5933_set_freq(struct ad5933_state *st,
188 unsigned reg, unsigned long freq)
190 unsigned long long freqreg;
196 freqreg = (u64) freq * (u64) (1 << 27);
197 do_div(freqreg, st->mclk_hz / 4);
200 case AD5933_REG_FREQ_START:
201 st->freq_start = freq;
203 case AD5933_REG_FREQ_INC:
210 dat.d32 = cpu_to_be32(freqreg);
211 return ad5933_i2c_write(st->client, reg, 3, &dat.d8[1]);
214 static int ad5933_setup(struct ad5933_state *st)
219 ret = ad5933_reset(st);
223 ret = ad5933_set_freq(st, AD5933_REG_FREQ_START, 10000);
227 ret = ad5933_set_freq(st, AD5933_REG_FREQ_INC, 200);
231 st->settling_cycles = 10;
232 dat = cpu_to_be16(st->settling_cycles);
234 ret = ad5933_i2c_write(st->client,
235 AD5933_REG_SETTLING_CYCLES, 2, (u8 *)&dat);
239 st->freq_points = 100;
240 dat = cpu_to_be16(st->freq_points);
242 return ad5933_i2c_write(st->client, AD5933_REG_INC_NUM, 2, (u8 *)&dat);
245 static void ad5933_calc_out_ranges(struct ad5933_state *st)
248 unsigned normalized_3v3[4] = {1980, 198, 383, 970};
250 for (i = 0; i < 4; i++)
251 st->range_avail[i] = normalized_3v3[i] * st->vref_mv / 3300;
256 * handles: AD5933_REG_FREQ_START and AD5933_REG_FREQ_INC
259 static ssize_t ad5933_show_frequency(struct device *dev,
260 struct device_attribute *attr,
263 struct iio_dev *indio_dev = dev_get_drvdata(dev);
264 struct ad5933_state *st = iio_priv(indio_dev);
265 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
267 unsigned long long freqreg;
273 mutex_lock(&indio_dev->mlock);
274 ret = ad5933_i2c_read(st->client, this_attr->address, 3, &dat.d8[1]);
275 mutex_unlock(&indio_dev->mlock);
279 freqreg = be32_to_cpu(dat.d32) & 0xFFFFFF;
281 freqreg = (u64) freqreg * (u64) (st->mclk_hz / 4);
282 do_div(freqreg, 1 << 27);
284 return sprintf(buf, "%d\n", (int) freqreg);
287 static ssize_t ad5933_store_frequency(struct device *dev,
288 struct device_attribute *attr,
292 struct iio_dev *indio_dev = dev_get_drvdata(dev);
293 struct ad5933_state *st = iio_priv(indio_dev);
294 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
298 ret = strict_strtoul(buf, 10, &val);
302 if (val > AD5933_MAX_OUTPUT_FREQ_Hz)
305 mutex_lock(&indio_dev->mlock);
306 ret = ad5933_set_freq(st, this_attr->address, val);
307 mutex_unlock(&indio_dev->mlock);
309 return ret ? ret : len;
312 static IIO_DEVICE_ATTR(out_voltage0_freq_start, S_IRUGO | S_IWUSR,
313 ad5933_show_frequency,
314 ad5933_store_frequency,
315 AD5933_REG_FREQ_START);
317 static IIO_DEVICE_ATTR(out_voltage0_freq_increment, S_IRUGO | S_IWUSR,
318 ad5933_show_frequency,
319 ad5933_store_frequency,
320 AD5933_REG_FREQ_INC);
322 static ssize_t ad5933_show(struct device *dev,
323 struct device_attribute *attr,
326 struct iio_dev *indio_dev = dev_get_drvdata(dev);
327 struct ad5933_state *st = iio_priv(indio_dev);
328 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
329 int ret = 0, len = 0;
331 mutex_lock(&indio_dev->mlock);
332 switch ((u32) this_attr->address) {
333 case AD5933_OUT_RANGE:
334 len = sprintf(buf, "%d\n",
335 st->range_avail[(st->ctrl_hb >> 1) & 0x3]);
337 case AD5933_OUT_RANGE_AVAIL:
338 len = sprintf(buf, "%d %d %d %d\n", st->range_avail[0],
339 st->range_avail[3], st->range_avail[2],
342 case AD5933_OUT_SETTLING_CYCLES:
343 len = sprintf(buf, "%d\n", st->settling_cycles);
345 case AD5933_IN_PGA_GAIN:
346 len = sprintf(buf, "%s\n",
347 (st->ctrl_hb & AD5933_CTRL_PGA_GAIN_1) ?
350 case AD5933_IN_PGA_GAIN_AVAIL:
351 len = sprintf(buf, "1 0.2\n");
353 case AD5933_FREQ_POINTS:
354 len = sprintf(buf, "%d\n", st->freq_points);
360 mutex_unlock(&indio_dev->mlock);
361 return ret ? ret : len;
364 static ssize_t ad5933_store(struct device *dev,
365 struct device_attribute *attr,
369 struct iio_dev *indio_dev = dev_get_drvdata(dev);
370 struct ad5933_state *st = iio_priv(indio_dev);
371 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
376 if (this_attr->address != AD5933_IN_PGA_GAIN) {
377 ret = strict_strtol(buf, 10, &val);
382 mutex_lock(&indio_dev->mlock);
383 switch ((u32) this_attr->address) {
384 case AD5933_OUT_RANGE:
385 for (i = 0; i < 4; i++)
386 if (val == st->range_avail[i]) {
387 st->ctrl_hb &= ~AD5933_CTRL_RANGE(0x3);
388 st->ctrl_hb |= AD5933_CTRL_RANGE(i);
389 ret = ad5933_cmd(st, 0);
394 case AD5933_IN_PGA_GAIN:
395 if (sysfs_streq(buf, "1")) {
396 st->ctrl_hb |= AD5933_CTRL_PGA_GAIN_1;
397 } else if (sysfs_streq(buf, "0.2")) {
398 st->ctrl_hb &= ~AD5933_CTRL_PGA_GAIN_1;
403 ret = ad5933_cmd(st, 0);
405 case AD5933_OUT_SETTLING_CYCLES:
406 val = clamp(val, 0L, 0x7FFL);
407 st->settling_cycles = val;
409 /* 2x, 4x handling, see datasheet */
411 val = (val >> 1) | (1 << 9);
413 val = (val >> 2) | (3 << 9);
415 dat = cpu_to_be16(val);
416 ret = ad5933_i2c_write(st->client,
417 AD5933_REG_SETTLING_CYCLES, 2, (u8 *)&dat);
419 case AD5933_FREQ_POINTS:
420 val = clamp(val, 0L, 511L);
421 st->freq_points = val;
423 dat = cpu_to_be16(val);
424 ret = ad5933_i2c_write(st->client, AD5933_REG_INC_NUM, 2,
431 mutex_unlock(&indio_dev->mlock);
432 return ret ? ret : len;
435 static IIO_DEVICE_ATTR(out_voltage0_scale, S_IRUGO | S_IWUSR,
440 static IIO_DEVICE_ATTR(out_voltage0_scale_available, S_IRUGO,
443 AD5933_OUT_RANGE_AVAIL);
445 static IIO_DEVICE_ATTR(in_voltage0_scale, S_IRUGO | S_IWUSR,
450 static IIO_DEVICE_ATTR(in_voltage0_scale_available, S_IRUGO,
453 AD5933_IN_PGA_GAIN_AVAIL);
455 static IIO_DEVICE_ATTR(out_voltage0_freq_points, S_IRUGO | S_IWUSR,
460 static IIO_DEVICE_ATTR(out_voltage0_settling_cycles, S_IRUGO | S_IWUSR,
463 AD5933_OUT_SETTLING_CYCLES);
466 * ideally we would handle the scale attributes via the iio_info
467 * (read|write)_raw methods, however this part is a untypical since we
468 * don't create dedicated sysfs channel attributes for out0 and in0.
470 static struct attribute *ad5933_attributes[] = {
471 &iio_dev_attr_out_voltage0_scale.dev_attr.attr,
472 &iio_dev_attr_out_voltage0_scale_available.dev_attr.attr,
473 &iio_dev_attr_out_voltage0_freq_start.dev_attr.attr,
474 &iio_dev_attr_out_voltage0_freq_increment.dev_attr.attr,
475 &iio_dev_attr_out_voltage0_freq_points.dev_attr.attr,
476 &iio_dev_attr_out_voltage0_settling_cycles.dev_attr.attr,
477 &iio_dev_attr_in_voltage0_scale.dev_attr.attr,
478 &iio_dev_attr_in_voltage0_scale_available.dev_attr.attr,
482 static const struct attribute_group ad5933_attribute_group = {
483 .attrs = ad5933_attributes,
486 static int ad5933_read_raw(struct iio_dev *indio_dev,
487 struct iio_chan_spec const *chan,
492 struct ad5933_state *st = iio_priv(indio_dev);
496 mutex_lock(&indio_dev->mlock);
499 if (iio_buffer_enabled(indio_dev)) {
503 ret = ad5933_cmd(st, AD5933_CTRL_MEASURE_TEMP);
506 ret = ad5933_wait_busy(st, AD5933_STAT_TEMP_VALID);
510 ret = ad5933_i2c_read(st->client,
511 AD5933_REG_TEMP_DATA, 2,
515 mutex_unlock(&indio_dev->mlock);
516 ret = be16_to_cpu(dat);
517 /* Temp in Milli degrees Celsius */
519 *val = ret * 1000 / 32;
521 *val = (ret - 16384) * 1000 / 32;
527 mutex_unlock(&indio_dev->mlock);
531 static const struct iio_info ad5933_info = {
532 .read_raw = &ad5933_read_raw,
533 .attrs = &ad5933_attribute_group,
534 .driver_module = THIS_MODULE,
537 static int ad5933_ring_preenable(struct iio_dev *indio_dev)
539 struct ad5933_state *st = iio_priv(indio_dev);
540 struct iio_buffer *ring = indio_dev->buffer;
544 if (!ring->scan_count)
547 d_size = ring->scan_count *
548 ad5933_channels[1].scan_type.storagebits / 8;
550 if (indio_dev->buffer->access->set_bytes_per_datum)
551 indio_dev->buffer->access->
552 set_bytes_per_datum(indio_dev->buffer, d_size);
554 ret = ad5933_reset(st);
558 ret = ad5933_cmd(st, AD5933_CTRL_STANDBY);
562 ret = ad5933_cmd(st, AD5933_CTRL_INIT_START_FREQ);
566 st->state = AD5933_CTRL_INIT_START_FREQ;
571 static int ad5933_ring_postenable(struct iio_dev *indio_dev)
573 struct ad5933_state *st = iio_priv(indio_dev);
575 /* AD5933_CTRL_INIT_START_FREQ:
576 * High Q complex circuits require a long time to reach steady state.
577 * To facilitate the measurement of such impedances, this mode allows
578 * the user full control of the settling time requirement before
579 * entering start frequency sweep mode where the impedance measurement
580 * takes place. In this mode the impedance is excited with the
581 * programmed start frequency (ad5933_ring_preenable),
582 * but no measurement takes place.
585 schedule_delayed_work(&st->work,
586 msecs_to_jiffies(AD5933_INIT_EXCITATION_TIME_ms));
590 static int ad5933_ring_postdisable(struct iio_dev *indio_dev)
592 struct ad5933_state *st = iio_priv(indio_dev);
594 cancel_delayed_work_sync(&st->work);
595 return ad5933_cmd(st, AD5933_CTRL_POWER_DOWN);
598 static const struct iio_buffer_setup_ops ad5933_ring_setup_ops = {
599 .preenable = &ad5933_ring_preenable,
600 .postenable = &ad5933_ring_postenable,
601 .postdisable = &ad5933_ring_postdisable,
604 static int ad5933_register_ring_funcs_and_init(struct iio_dev *indio_dev)
606 indio_dev->buffer = iio_sw_rb_allocate(indio_dev);
607 if (!indio_dev->buffer)
610 /* Effectively select the ring buffer implementation */
611 indio_dev->buffer->access = &ring_sw_access_funcs;
613 /* Ring buffer functions - here trigger setup related */
614 indio_dev->buffer->setup_ops = &ad5933_ring_setup_ops;
616 indio_dev->modes |= INDIO_BUFFER_HARDWARE;
621 static void ad5933_work(struct work_struct *work)
623 struct ad5933_state *st = container_of(work,
624 struct ad5933_state, work.work);
625 struct iio_dev *indio_dev = i2c_get_clientdata(st->client);
626 struct iio_buffer *ring = indio_dev->buffer;
628 unsigned char status;
630 mutex_lock(&indio_dev->mlock);
631 if (st->state == AD5933_CTRL_INIT_START_FREQ) {
633 ad5933_cmd(st, AD5933_CTRL_START_SWEEP);
634 st->state = AD5933_CTRL_START_SWEEP;
635 schedule_delayed_work(&st->work, st->poll_time_jiffies);
636 mutex_unlock(&indio_dev->mlock);
640 ad5933_i2c_read(st->client, AD5933_REG_STATUS, 1, &status);
642 if (status & AD5933_STAT_DATA_VALID) {
643 ad5933_i2c_read(st->client,
644 test_bit(1, ring->scan_mask) ?
645 AD5933_REG_REAL_DATA : AD5933_REG_IMAG_DATA,
646 ring->scan_count * 2, (u8 *)buf);
648 if (ring->scan_count == 2) {
649 buf[0] = be16_to_cpu(buf[0]);
650 buf[1] = be16_to_cpu(buf[1]);
652 buf[0] = be16_to_cpu(buf[0]);
654 /* save datum to the ring */
655 ring->access->store_to(ring, (u8 *)buf, iio_get_time_ns());
657 /* no data available - try again later */
658 schedule_delayed_work(&st->work, st->poll_time_jiffies);
659 mutex_unlock(&indio_dev->mlock);
663 if (status & AD5933_STAT_SWEEP_DONE) {
664 /* last sample received - power down do nothing until
665 * the ring enable is toggled */
666 ad5933_cmd(st, AD5933_CTRL_POWER_DOWN);
668 /* we just received a valid datum, move on to the next */
669 ad5933_cmd(st, AD5933_CTRL_INC_FREQ);
670 schedule_delayed_work(&st->work, st->poll_time_jiffies);
673 mutex_unlock(&indio_dev->mlock);
676 static int __devinit ad5933_probe(struct i2c_client *client,
677 const struct i2c_device_id *id)
679 int ret, voltage_uv = 0;
680 struct ad5933_platform_data *pdata = client->dev.platform_data;
681 struct ad5933_state *st;
682 struct iio_dev *indio_dev = iio_allocate_device(sizeof(*st));
683 if (indio_dev == NULL)
686 st = iio_priv(indio_dev);
687 i2c_set_clientdata(client, indio_dev);
691 st->pdata = &ad5933_default_pdata;
695 st->reg = regulator_get(&client->dev, "vcc");
696 if (!IS_ERR(st->reg)) {
697 ret = regulator_enable(st->reg);
700 voltage_uv = regulator_get_voltage(st->reg);
704 st->vref_mv = voltage_uv / 1000;
706 st->vref_mv = st->pdata->vref_mv;
708 if (st->pdata->ext_clk_Hz) {
709 st->mclk_hz = st->pdata->ext_clk_Hz;
710 st->ctrl_lb = AD5933_CTRL_EXT_SYSCLK;
712 st->mclk_hz = AD5933_INT_OSC_FREQ_Hz;
713 st->ctrl_lb = AD5933_CTRL_INT_SYSCLK;
716 ad5933_calc_out_ranges(st);
717 INIT_DELAYED_WORK(&st->work, ad5933_work);
718 st->poll_time_jiffies = msecs_to_jiffies(AD5933_POLL_TIME_ms);
720 indio_dev->dev.parent = &client->dev;
721 indio_dev->info = &ad5933_info;
722 indio_dev->name = id->name;
723 indio_dev->modes = INDIO_DIRECT_MODE;
724 indio_dev->channels = ad5933_channels;
725 indio_dev->num_channels = 1; /* only register temp0_input */
727 ret = ad5933_register_ring_funcs_and_init(indio_dev);
729 goto error_disable_reg;
731 /* skip temp0_input, register in0_(real|imag)_raw */
732 ret = iio_buffer_register(indio_dev, &ad5933_channels[1], 2);
734 goto error_unreg_ring;
736 /* enable both REAL and IMAG channels by default */
737 iio_scan_mask_set(indio_dev->buffer, 0);
738 iio_scan_mask_set(indio_dev->buffer, 1);
740 ret = ad5933_setup(st);
742 goto error_uninitialize_ring;
744 ret = iio_device_register(indio_dev);
746 goto error_uninitialize_ring;
750 error_uninitialize_ring:
751 iio_buffer_unregister(indio_dev);
753 iio_sw_rb_free(indio_dev->buffer);
755 if (!IS_ERR(st->reg))
756 regulator_disable(st->reg);
758 if (!IS_ERR(st->reg))
759 regulator_put(st->reg);
761 iio_free_device(indio_dev);
766 static __devexit int ad5933_remove(struct i2c_client *client)
768 struct iio_dev *indio_dev = i2c_get_clientdata(client);
769 struct ad5933_state *st = iio_priv(indio_dev);
771 iio_device_unregister(indio_dev);
772 iio_buffer_unregister(indio_dev);
773 iio_sw_rb_free(indio_dev->buffer);
774 if (!IS_ERR(st->reg)) {
775 regulator_disable(st->reg);
776 regulator_put(st->reg);
778 iio_free_device(indio_dev);
783 static const struct i2c_device_id ad5933_id[] = {
789 MODULE_DEVICE_TABLE(i2c, ad5933_id);
791 static struct i2c_driver ad5933_driver = {
795 .probe = ad5933_probe,
796 .remove = __devexit_p(ad5933_remove),
797 .id_table = ad5933_id,
800 static __init int ad5933_init(void)
802 return i2c_add_driver(&ad5933_driver);
804 module_init(ad5933_init);
806 static __exit void ad5933_exit(void)
808 i2c_del_driver(&ad5933_driver);
810 module_exit(ad5933_exit);
812 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
813 MODULE_DESCRIPTION("Analog Devices AD5933 Impedance Conv. Network Analyzer");
814 MODULE_LICENSE("GPL v2");